bcm27xx: switch to 5.15
[openwrt/staging/chunkeey.git] / target / linux / bcm27xx / patches-5.10 / 950-0533-vc4-kms-vc4_plane-Support-2020-colourspace-for-yuv-p.patch
1 From f5c7dd20b383a4ab8212736b37940a4339d80e33 Mon Sep 17 00:00:00 2001
2 From: Dom Cobley <popcornmix@gmail.com>
3 Date: Mon, 12 Apr 2021 17:27:43 +0100
4 Subject: [PATCH] vc4/kms: vc4_plane: Support 2020 colourspace for yuv
5 planes
6
7 https://gist.github.com/popcornmix/6b3e23103c60170b02b148e0ba5d6ed7
8
9 is the script used to generate the 601, 709 and 2020 colourspaces.
10 I've regenetated the existing ones using script so it is reprocable
11 but there are lsb dfferences compared to values here (copied from spec)
12 whose origin is now lost.
13
14 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
15 ---
16 drivers/gpu/drm/vc4/vc4_plane.c | 19 ++++++++++---------
17 drivers/gpu/drm/vc4/vc4_regs.h | 18 ++++++++++++------
18 2 files changed, 22 insertions(+), 15 deletions(-)
19
20 --- a/drivers/gpu/drm/vc4/vc4_plane.c
21 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
22 @@ -644,10 +644,10 @@ static const u32 colorspace_coeffs[2][DR
23 SCALER_CSC1_ITR_R_709_3,
24 SCALER_CSC2_ITR_R_709_3,
25 }, {
26 - /* BT2020. Not supported yet - copy 601 */
27 - SCALER_CSC0_ITR_R_601_5,
28 - SCALER_CSC1_ITR_R_601_5,
29 - SCALER_CSC2_ITR_R_601_5,
30 + /* BT2020 */
31 + SCALER_CSC0_ITR_R_2020,
32 + SCALER_CSC1_ITR_R_2020,
33 + SCALER_CSC2_ITR_R_2020,
34 }
35 }, {
36 /* Full range */
37 @@ -662,10 +662,10 @@ static const u32 colorspace_coeffs[2][DR
38 SCALER_CSC1_ITR_R_709_3_FR,
39 SCALER_CSC2_ITR_R_709_3_FR,
40 }, {
41 - /* BT2020. Not supported yet - copy JFIF */
42 - SCALER_CSC0_JPEG_JFIF,
43 - SCALER_CSC1_JPEG_JFIF,
44 - SCALER_CSC2_JPEG_JFIF,
45 + /* BT2020 */
46 + SCALER_CSC0_ITR_R_2020_FR,
47 + SCALER_CSC1_ITR_R_2020_FR,
48 + SCALER_CSC2_ITR_R_2020_FR,
49 }
50 }
51 };
52 @@ -1487,7 +1487,8 @@ struct drm_plane *vc4_plane_init(struct
53
54 drm_plane_create_color_properties(plane,
55 BIT(DRM_COLOR_YCBCR_BT601) |
56 - BIT(DRM_COLOR_YCBCR_BT709),
57 + BIT(DRM_COLOR_YCBCR_BT709) |
58 + BIT(DRM_COLOR_YCBCR_BT2020),
59 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
60 BIT(DRM_COLOR_YCBCR_FULL_RANGE),
61 DRM_COLOR_YCBCR_BT709,
62 --- a/drivers/gpu/drm/vc4/vc4_regs.h
63 +++ b/drivers/gpu/drm/vc4/vc4_regs.h
64 @@ -975,8 +975,10 @@ enum hvs_pixel_format {
65 #define SCALER_CSC0_COEF_CR_OFS_SHIFT 0
66 #define SCALER_CSC0_ITR_R_601_5 0x00f00000
67 #define SCALER_CSC0_ITR_R_709_3 0x00f00000
68 +#define SCALER_CSC0_ITR_R_2020 0x00f00000
69 #define SCALER_CSC0_JPEG_JFIF 0x00000000
70 #define SCALER_CSC0_ITR_R_709_3_FR 0x00000000
71 +#define SCALER_CSC0_ITR_R_2020_FR 0x00000000
72
73 /* S2.8 contribution of Cb to Green */
74 #define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22)
75 @@ -991,9 +993,11 @@ enum hvs_pixel_format {
76 #define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0)
77 #define SCALER_CSC1_COEF_CR_BLU_SHIFT 0
78 #define SCALER_CSC1_ITR_R_601_5 0xe73304a8
79 -#define SCALER_CSC1_ITR_R_709_3 0xf2b784a8
80 -#define SCALER_CSC1_JPEG_JFIF 0xea34a400
81 -#define SCALER_CSC1_ITR_R_709_3_FR 0xe23d0400
82 +#define SCALER_CSC1_ITR_R_709_3 0xf27784a8
83 +#define SCALER_CSC1_ITR_R_2020 0xf43594a8
84 +#define SCALER_CSC1_JPEG_JFIF 0xea349400
85 +#define SCALER_CSC1_ITR_R_709_3_FR 0xf4388400
86 +#define SCALER_CSC1_ITR_R_2020_FR 0xf5b6d400
87
88 /* S2.8 contribution of Cb to Red */
89 #define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20)
90 @@ -1004,10 +1008,12 @@ enum hvs_pixel_format {
91 /* S2.8 contribution of Cb to Blue */
92 #define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10)
93 #define SCALER_CSC2_COEF_CB_BLU_SHIFT 10
94 -#define SCALER_CSC2_ITR_R_601_5 0x00066204
95 -#define SCALER_CSC2_ITR_R_709_3 0x00072a1c
96 -#define SCALER_CSC2_JPEG_JFIF 0x000599c5
97 +#define SCALER_CSC2_ITR_R_601_5 0x00066604
98 +#define SCALER_CSC2_ITR_R_709_3 0x00072e1d
99 +#define SCALER_CSC2_ITR_R_2020 0x0006b624
100 +#define SCALER_CSC2_JPEG_JFIF 0x00059dc6
101 #define SCALER_CSC2_ITR_R_709_3_FR 0x00064ddb
102 +#define SCALER_CSC2_ITR_R_2020_FR 0x0005e5e2
103
104 #define SCALER_TPZ0_VERT_RECALC BIT(31)
105 #define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8)