ath79: convert ath10k calibration data to NVMEM (built-in MAC)
[openwrt/staging/dangole.git] / target / linux / ath79 / dts / qca9556_avm_fritzdvbc.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca9556_avm_fritz-repeater.dtsi"
4
5 / {
6 compatible = "avm,fritzdvbc", "qca,qca9556";
7 model = "AVM FRITZ!WLAN Repeater DVB-C";
8
9 aliases {
10 led-boot = &led_power;
11 led-failsafe = &led_power;
12 led-running = &led_power;
13 led-upgrade = &led_power;
14 };
15
16 led_spi {
17 compatible = "spi-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20
21 sck-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
22 mosi-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
23 num-chipselects = <0>;
24
25 spi_gpio: led_gpio@0 {
26 compatible = "fairchild,74hc595";
27 reg = <0>;
28 gpio-controller;
29 #gpio-cells = <2>;
30 registers-number = <2>;
31 spi-max-frequency = <10000000>;
32
33 gpio_latch_bit {
34 gpio-hog;
35 gpios = <16 GPIO_ACTIVE_HIGH>;
36 output-high;
37 line-name = "gpio-latch-bit";
38 };
39 };
40 };
41
42 /*
43 * GPIO pins 100 or greater in the vendor GPL dump are redirected
44 * to the shift register.
45 * So OEM source pin 100 becomes 0 on the SR and so forth.
46 */
47 leds {
48 compatible = "gpio-leds";
49
50 led_power: power {
51 label = "green:power";
52 gpios = <&spi_gpio 6 GPIO_ACTIVE_LOW>;
53 };
54
55 wlan {
56 label = "green:wlan";
57 gpios = <&spi_gpio 7 GPIO_ACTIVE_LOW>;
58 linux,default-trigger = "phy1tpt";
59 };
60
61 tv {
62 label = "green:tv";
63 gpios = <&spi_gpio 5 GPIO_ACTIVE_LOW>;
64 };
65
66 rssihigh {
67 label = "green:rssihigh";
68 gpios = <&spi_gpio 1 GPIO_ACTIVE_LOW>;
69 };
70
71 rssimediumhigh {
72 label = "green:rssimediumhigh";
73 gpios = <&spi_gpio 2 GPIO_ACTIVE_LOW>;
74 };
75
76 rssimedium {
77 label = "green:rssimedium";
78 gpios = <&spi_gpio 3 GPIO_ACTIVE_LOW>;
79 };
80
81 rssimediumlow {
82 label = "green:rssimediumlow";
83 gpios = <&spi_gpio 4 GPIO_ACTIVE_LOW>;
84 };
85
86 rssilow {
87 label = "green:rssilow";
88 gpios = <&spi_gpio 0 GPIO_ACTIVE_LOW>;
89 };
90 };
91 };
92
93 &pcie0 {
94 status = "okay";
95
96 wifi@0,0 {
97 compatible = "qcom,ath10k";
98 reg = <0x0000 0 0 0 0>;
99 nvmem-cells = <&cal_urlader_198a>;
100 nvmem-cell-names = "calibration";
101 };
102 };
103
104 &gpio {
105 reset-pcie-ep {
106 gpio-hog;
107 gpios = <109 GPIO_ACTIVE_HIGH>;
108 output-high;
109 line-name = "PCIE EP reset";
110 };
111
112 reset-pcie-bus {
113 gpio-hog;
114 gpios = <110 GPIO_ACTIVE_HIGH>;
115 output-high;
116 line-name = "PCIE Bus reset";
117 };
118 };