watchdog: Implement generic watchdog_reset() version
[project/bcm63xx/u-boot.git] / board / xilinx / zynq / board.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
5 */
6
7 #include <common.h>
8 #include <dm/uclass.h>
9 #include <fdtdec.h>
10 #include <fpga.h>
11 #include <malloc.h>
12 #include <mmc.h>
13 #include <watchdog.h>
14 #include <wdt.h>
15 #include <zynqpl.h>
16 #include <asm/arch/hardware.h>
17 #include <asm/arch/sys_proto.h>
18
19 DECLARE_GLOBAL_DATA_PTR;
20
21 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
22 int board_early_init_f(void)
23 {
24 return 0;
25 }
26 #endif
27
28 int board_init(void)
29 {
30 return 0;
31 }
32
33 int board_late_init(void)
34 {
35 int env_targets_len = 0;
36 const char *mode;
37 char *new_targets;
38 char *env_targets;
39
40 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
41 case ZYNQ_BM_QSPI:
42 mode = "qspi";
43 env_set("modeboot", "qspiboot");
44 break;
45 case ZYNQ_BM_NAND:
46 mode = "nand";
47 env_set("modeboot", "nandboot");
48 break;
49 case ZYNQ_BM_NOR:
50 mode = "nor";
51 env_set("modeboot", "norboot");
52 break;
53 case ZYNQ_BM_SD:
54 mode = "mmc";
55 env_set("modeboot", "sdboot");
56 break;
57 case ZYNQ_BM_JTAG:
58 mode = "pxe dhcp";
59 env_set("modeboot", "jtagboot");
60 break;
61 default:
62 mode = "";
63 env_set("modeboot", "");
64 break;
65 }
66
67 /*
68 * One terminating char + one byte for space between mode
69 * and default boot_targets
70 */
71 env_targets = env_get("boot_targets");
72 if (env_targets)
73 env_targets_len = strlen(env_targets);
74
75 new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
76 if (!new_targets)
77 return -ENOMEM;
78
79 sprintf(new_targets, "%s %s", mode,
80 env_targets ? env_targets : "");
81
82 env_set("boot_targets", new_targets);
83
84 return 0;
85 }
86
87 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
88 int dram_init_banksize(void)
89 {
90 return fdtdec_setup_memory_banksize();
91 }
92
93 int dram_init(void)
94 {
95 if (fdtdec_setup_mem_size_base() != 0)
96 return -EINVAL;
97
98 zynq_ddrc_init();
99
100 return 0;
101 }
102 #else
103 int dram_init(void)
104 {
105 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
106 CONFIG_SYS_SDRAM_SIZE);
107
108 zynq_ddrc_init();
109
110 return 0;
111 }
112 #endif