arch/arm/cpu/armv8/zynqmp/clk.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2014 - 2015 Xilinx, Inc.
   4  * Michal Simek <michal.simek@xilinx.com>
   5  */
   6
   7 #include <common.h>
   8 #include <asm/arch/clk.h>
   9 #include <asm/arch/hardware.h>
  10 #include <asm/arch/sys_proto.h>
  11
  12 DECLARE_GLOBAL_DATA_PTR;
  13
  14 unsigned long zynqmp_get_system_timer_freq(void)
  15 {
  16         u32 ver = zynqmp_get_silicon_version();
  17
  18         switch (ver) {
  19         case ZYNQMP_CSU_VERSION_QEMU:
  20                 return 50000000;
  21         }
  22
  23         return 100000000;
  24 }
  25
  26 #ifdef CONFIG_CLOCKS
  27 /**
  28  * set_cpu_clk_info() - Initialize clock framework
  29  * Always returns zero.
  30  *
  31  * This function is called from common code after relocation and sets up the
  32  * clock framework. The framework must not be used before this function had been
  33  * called.
  34  */
  35 int set_cpu_clk_info(void)
  36 {
  37         gd->cpu_clk = get_tbclk();
  38
  39         gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
  40
  41         gd->bd->bi_dsp_freq = 0;
  42
  43         return 0;
  44 }
  45 #endif