1 // SPDX-License-Identifier: GPL-2.0-or-later
5 #include <dt-bindings/clock/bcm6368-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6368-reset.h>
14 compatible = "brcm,bcm6368";
26 bootargs = "earlycon";
27 stdout-path = "serial0:115200n8";
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
44 mips-hpt-frequency = <200000000>;
47 compatible = "brcm,bmips4350", "mips,mips4Kc";
53 compatible = "brcm,bmips4350", "mips,mips4Kc";
59 cpu_intc: interrupt-controller {
61 compatible = "mti,cpu-interrupt-controller";
64 #interrupt-cells = <1>;
68 device_type = "memory";
76 compatible = "simple-bus";
79 periph_clk: clock-controller@10000004 {
80 compatible = "brcm,bcm6368-clocks";
81 reg = <0x10000004 0x4>;
85 pll_cntl: syscon@10000008 {
86 compatible = "syscon", "simple-mfd";
87 reg = <0x10000008 0x4>;
91 compatible = "syscon-reboot";
97 periph_rst: reset-controller@10000010 {
98 compatible = "brcm,bcm6345-reset";
99 reg = <0x10000010 0x4>;
103 ext_intc0: interrupt-controller@10000018 {
104 #address-cells = <1>;
105 compatible = "brcm,bcm6345-ext-intc";
106 reg = <0x10000018 0x4>;
108 interrupt-controller;
109 #interrupt-cells = <2>;
111 interrupt-parent = <&periph_intc>;
112 interrupts = <BCM6368_IRQ_EXT0>,
118 ext_intc1: interrupt-controller@1000001c {
119 #address-cells = <1>;
120 compatible = "brcm,bcm6345-ext-intc";
121 reg = <0x1000001c 0x4>;
123 interrupt-controller;
124 #interrupt-cells = <2>;
126 interrupt-parent = <&periph_intc>;
127 interrupts = <BCM6368_IRQ_EXT4>,
131 periph_intc: interrupt-controller@10000020 {
132 #address-cells = <1>;
133 compatible = "brcm,bcm6345-l1-intc";
134 reg = <0x10000020 0x10>,
137 interrupt-controller;
138 #interrupt-cells = <1>;
140 interrupt-parent = <&cpu_intc>;
141 interrupts = <2>, <3>;
144 wdt: watchdog@1000005c {
145 compatible = "brcm,bcm7038-wdt";
146 reg = <0x1000005c 0xc>;
148 clocks = <&periph_osc>;
153 gpio_cntl: syscon@10000080 {
154 #address-cells = <1>;
156 compatible = "brcm,bcm6368-gpio-sysctl",
157 "syscon", "simple-mfd";
158 reg = <0x10000080 0x80>;
159 ranges = <0 0x10000080 0x80>;
163 compatible = "brcm,bcm6368-gpio";
164 reg-names = "dirout", "dat";
165 reg = <0x0 0x8>, <0x8 0x8>;
168 gpio-ranges = <&pinctrl 0 0 38>;
172 pinctrl: pinctrl@18 {
173 compatible = "brcm,bcm6368-pinctrl";
174 reg = <0x18 0x4>, <0x38 0x4>;
176 pinctrl_analog_afe_0: analog_afe_0-pins {
177 function = "analog_afe_0";
181 pinctrl_analog_afe_1: analog_afe_1-pins {
182 function = "analog_afe_1";
186 pinctrl_sys_irq: sys_irq-pins {
187 function = "sys_irq";
191 pinctrl_serial_led: serial_led-pins {
192 pinctrl_serial_led_data: serial_led_data-pins {
193 function = "serial_led_data";
197 pinctrl_serial_led_clk: serial_led_clk-pins {
198 function = "serial_led_clk";
203 pinctrl_inet_led: inet_led-pins {
204 function = "inet_led";
208 pinctrl_ephy0_led: ephy0_led-pins {
209 function = "ephy0_led";
213 pinctrl_ephy1_led: ephy1_led-pins {
214 function = "ephy1_led";
218 pinctrl_ephy2_led: ephy2_led-pins {
219 function = "ephy2_led";
223 pinctrl_ephy3_led: ephy3_led-pins {
224 function = "ephy3_led";
228 pinctrl_robosw_led_data: robosw_led_data-pins {
229 function = "robosw_led_data";
233 pinctrl_robosw_led_clk: robosw_led_clk-pins {
234 function = "robosw_led_clk";
238 pinctrl_robosw_led0: robosw_led0-pins {
239 function = "robosw_led0";
243 pinctrl_robosw_led1: robosw_led1-pins {
244 function = "robosw_led1";
248 pinctrl_usb_device_led: usb_device_led-pins {
249 function = "usb_device_led";
253 pinctrl_pci: pci-pins {
254 pinctrl_pci_req1: pci_req1-pins {
255 function = "pci_req1";
259 pinctrl_pci_gnt1: pci_gnt1-pins {
260 function = "pci_gnt1";
264 pinctrl_pci_intb: pci_intb-pins {
265 function = "pci_intb";
269 pinctrl_pci_req0: pci_req0-pins {
270 function = "pci_req0";
274 pinctrl_pci_gnt0: pci_gnt0-pins {
275 function = "pci_gnt0";
280 pinctrl_pcmcia: pcmcia-pins {
281 pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
282 function = "pcmcia_cd1";
286 pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
287 function = "pcmcia_cd2";
291 pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
292 function = "pcmcia_vs1";
296 pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
297 function = "pcmcia_vs2";
302 pinctrl_ebi_cs2: ebi_cs2-pins {
303 function = "ebi_cs2";
307 pinctrl_ebi_cs3: ebi_cs3-pins {
308 function = "ebi_cs3";
312 pinctrl_spi_cs2: spi_cs2-pins {
313 function = "spi_cs2";
317 pinctrl_spi_cs3: spi_cs3-pins {
318 function = "spi_cs3";
322 pinctrl_spi_cs4: spi_cs4-pins {
323 function = "spi_cs4";
327 pinctrl_spi_cs5: spi_cs5-pins {
328 function = "spi_cs5";
332 pinctrl_uart1: uart1-pins {
339 leds: led-controller@100000d0 {
340 #address-cells = <1>;
342 compatible = "brcm,bcm6358-leds";
343 reg = <0x100000d0 0x8>;
348 uart0: serial@10000100 {
349 compatible = "brcm,bcm6345-uart";
350 reg = <0x10000100 0x18>;
352 interrupt-parent = <&periph_intc>;
353 interrupts = <BCM6368_IRQ_UART0>;
355 clocks = <&periph_osc>;
356 clock-names = "periph";
361 uart1: serial@10000120 {
362 compatible = "brcm,bcm6345-uart";
363 reg = <0x10000120 0x18>;
365 interrupt-parent = <&periph_intc>;
366 interrupts = <BCM6368_IRQ_UART1>;
368 clocks = <&periph_osc>;
369 clock-names = "periph";
374 nflash: nand@10000200 {
375 #address-cells = <1>;
377 compatible = "brcm,nand-bcm6368",
378 "brcm,brcmnand-v2.1",
380 reg = <0x10000200 0x180>,
387 interrupt-parent = <&periph_intc>;
388 interrupts = <BCM6368_IRQ_NAND>;
390 clocks = <&periph_clk BCM6368_CLK_NAND>;
391 clock-names = "nand";
396 lsspi: spi@10000800 {
397 #address-cells = <1>;
399 compatible = "brcm,bcm6358-spi";
400 reg = <0x10000800 0x70c>;
402 interrupt-parent = <&periph_intc>;
403 interrupts = <BCM6368_IRQ_SPI>;
405 clocks = <&periph_clk BCM6368_CLK_SPI>;
408 resets = <&periph_rst BCM6368_RST_SPI>;
414 compatible = "brcm,bcm6348-pci";
415 reg = <0x10001000 0x200>;
416 #address-cells = <3>;
420 bus-range = <0x00 0x01>;
421 ranges = <0x2000000 0 0x30000000 0x30000000 0 0x8000000>,
422 <0x1000000 0 0x08000000 0x08000000 0 0x0010000>;
423 linux,pci-probe-only = <1>;
425 interrupt-parent = <&periph_intc>;
426 interrupts = <BCM6368_IRQ_MPI>;
428 resets = <&periph_rst BCM6368_RST_MPI>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pinctrl_pci>;
440 compatible = "brcm,bcm6368-ehci", "generic-ehci";
441 reg = <0x10001500 0x100>;
445 interrupt-parent = <&periph_intc>;
446 interrupts = <BCM6368_IRQ_EHCI>;
455 compatible = "brcm,bcm6368-ohci", "generic-ohci";
456 reg = <0x10001600 0x100>;
460 interrupt-parent = <&periph_intc>;
461 interrupts = <BCM6368_IRQ_OHCI>;
469 usbh: usb-phy@10001700 {
470 compatible = "brcm,bcm6368-usbh-phy";
471 reg = <0x10001700 0x38>;
475 clocks = <&periph_clk BCM6368_CLK_USBH>;
476 clock-names = "usbh";
478 resets = <&periph_rst BCM6368_RST_USBH>;
483 random: rng@10004180 {
484 compatible = "brcm,bcm6368-rng";
485 reg = <0x10004180 0x14>;
487 clocks = <&periph_clk BCM6368_CLK_IPSEC>;
488 clock-names = "ipsec";
490 resets = <&periph_rst BCM6368_RST_IPSEC>;
493 ethernet: ethernet@10006800 {
494 compatible = "brcm,bcm6368-enetsw";
495 reg = <0x10006800 0x80>,
502 interrupt-parent = <&periph_intc>;
503 interrupts = <BCM6368_IRQ_ENETSW_RX_DMA0>,
504 <BCM6368_IRQ_ENETSW_TX_DMA0>;
505 interrupt-names = "rx",
508 clocks = <&periph_clk BCM6368_CLK_SWPKT_USB>,
509 <&periph_clk BCM6368_CLK_SWPKT_SAR>,
510 <&periph_clk BCM6368_CLK_ROBOSW>;
512 resets = <&periph_rst BCM6368_RST_SWITCH>,
513 <&periph_rst BCM6368_RST_EPHY>;
521 switch0: switch@10f00000 {
522 #address-cells = <1>;
524 compatible = "brcm,bcm6368-switch";
525 reg = <0x10f00000 0x8000>;
529 #address-cells = <1>;
535 phy-mode = "internal";
536 ethernet = <ðernet>;
546 mdio: mdio@10f000b0 {
547 #address-cells = <1>;
549 compatible = "brcm,bcm6368-mdio-mux";
550 reg = <0x10f000b0 0x8>;
553 #address-cells = <1>;
557 phy1: ethernet-phy@1 {
558 compatible = "ethernet-phy-ieee802.3-c22";
562 phy2: ethernet-phy@2 {
563 compatible = "ethernet-phy-ieee802.3-c22";
567 phy3: ethernet-phy@3 {
568 compatible = "ethernet-phy-ieee802.3-c22";
572 phy4: ethernet-phy@4 {
573 compatible = "ethernet-phy-ieee802.3-c22";
579 #address-cells = <1>;
586 pflash: nor@18000000 {
587 #address-cells = <1>;
589 compatible = "cfi-flash";
590 reg = <0x18000000 0x2000000>;