Workaround for cortex-A76 errata 1286807

The workaround for Cortex-A76 errata #1286807 is implemented
in this patch.

Change-Id: I6c15af962ac99ce223e009f6d299cefb41043bed
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h
index c3ce1c4d96c263ff340290519b60247ae4bd9cb7..c17370647d35773fbee7f880cacc1ca1e79e0dee 100644 (file)
--- a/include/arch/aarch64/arch_helpers.h
+++ b/include/arch/aarch64/arch_helpers.h
@@ -87,12 +87,13 @@ static inline void _op ## _type(uint64_t v)         \
  * TLB maintenance accessor prototypes
  ******************************************************************************/
 
-#if ERRATA_A57_813419
+#if ERRATA_A57_813419 || ERRATA_A76_1286807
 /*
  * Define function for TLBI instruction with type specifier that implements
- * the workaround for errata 813419 of Cortex-A57.
+ * the workaround for errata 813419 of Cortex-A57 or errata 1286807 of
+ * Cortex-A76.
  */
-#define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(_type)\
+#define DEFINE_TLBIOP_ERRATA_TYPE_FUNC(_type)\
 static inline void tlbi ## _type(void)                 \
 {                                                      \
        __asm__("tlbi " #_type "\n"                     \
@@ -102,9 +103,10 @@ static inline void tlbi ## _type(void)                     \
 
 /*
  * Define function for TLBI instruction with register parameter that implements
- * the workaround for errata 813419 of Cortex-A57.
+ * the workaround for errata 813419 of Cortex-A57 or errata 1286807 of
+ * Cortex-A76.
  */
-#define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(_type) \
+#define DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(_type)    \
 static inline void tlbi ## _type(uint64_t v)                   \
 {                                                              \
        __asm__("tlbi " #_type ", %0\n"                         \
@@ -125,27 +127,51 @@ static inline void dc ## _name(uint64_t v)                        \
 }
 #endif /* ERRATA_A53_819472 || ERRATA_A53_824069 || ERRATA_A53_827319 */
 
+#if ERRATA_A57_813419
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
-#if ERRATA_A57_813419
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3)
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3is)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
+#elif ERRATA_A76_1286807
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle1)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle1is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle2)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle2is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(alle3is)
+DEFINE_TLBIOP_ERRATA_TYPE_FUNC(vmalle1)
 #else
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
+DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3)
 DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is)
-#endif
 DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
+#endif
 
+#if ERRATA_A57_813419
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
-#if ERRATA_A57_813419
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vae3is)
-DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vale3is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vae3is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vale3is)
+#elif ERRATA_A76_1286807
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vaae1is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vaale1is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vae2is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vale2is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vae3is)
+DEFINE_TLBIOP_ERRATA_TYPE_PARAM_FUNC(vale3is)
 #else
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
+DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae3is)
 DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale3is)
 #endif

diff --git a/include/arch/aarch64/asm_macros.S b/include/arch/aarch64/asm_macros.S
index 387be4ca3e95140ed302ff5819ee536f361a8f3f..9b12185591bde73bc3491f2fb66cd01b60e0107e 100644 (file)
--- a/include/arch/aarch64/asm_macros.S
+++ b/include/arch/aarch64/asm_macros.S
@@ -12,9 +12,9 @@
 
 /*
  * TLBI instruction with type specifier that implements the workaround for
- * errata 813419 of Cortex-A57.
+ * errata 813419 of Cortex-A57 or errata 1286807 of Cortex-A76.
  */
-#if ERRATA_A57_813419
+#if ERRATA_A57_813419 || ERRATA_A76_1286807
 #define TLB_INVALIDATE(_type) \
        tlbi    _type; \
        dsb     ish; \

diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S
index 2f250f4bca390c6e15e7b89d5510a4c6a0b755a5..aed7970eda3c4cd3967b8b1682e200099faebf57 100644 (file)
--- a/lib/cpus/aarch64/cortex_a76.S
+++ b/lib/cpus/aarch64/cortex_a76.S
@@ -365,6 +365,22 @@ func check_errata_1275112
        b       cpu_rev_var_ls
 endfunc check_errata_1275112
 
+       /* ---------------------------------------------------
+        * Errata Workaround for Cortex A76 Errata #1286807.
+        * This applies only to revision <= r3p0 of Cortex A76.
+        * Due to the nature of the errata it is applied unconditionally
+        * when built in, report it as applicable in this case
+        * ---------------------------------------------------
+        */
+func check_errata_1286807
+#if ERRATA_A76_1286807
+       mov x0, #ERRATA_APPLIES
+       ret
+#else
+       mov     x1, #0x30
+       b       cpu_rev_var_ls
+#endif
+endfunc check_errata_1286807
 
 func check_errata_cve_2018_3639
 #if WORKAROUND_CVE_2018_3639
@@ -502,6 +518,7 @@ func cortex_a76_errata_report
        report_errata ERRATA_A76_1262606, cortex_a76, 1262606
        report_errata ERRATA_A76_1262888, cortex_a76, 1262888
        report_errata ERRATA_A76_1275112, cortex_a76, 1275112
+       report_errata ERRATA_A76_1286807, cortex_a76, 1286807
        report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639
        report_errata ERRATA_DSU_798953, cortex_a76, dsu_798953
        report_errata ERRATA_DSU_936184, cortex_a76, dsu_936184

diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk
index 6df85b7b36f48a93383e324f481996387e8a460f..e45d79d99ae0ff2bc153d1100679ac3a0786d1ec 100644 (file)
--- a/lib/cpus/cpu-ops.mk
+++ b/lib/cpus/cpu-ops.mk
@@ -226,6 +226,10 @@ ERRATA_A76_1262888 ?=0
 # only to revision <= r3p0 of the Cortex A76 cpu.
 ERRATA_A76_1275112     ?=0
 
+# Flag to apply erratum 1286807 workaround during reset. This erratum applies
+# only to revision <= r3p0 of the Cortex A76 cpu.
+ERRATA_A76_1286807     ?=0
+
 # Flag to apply T32 CLREX workaround during reset. This erratum applies
 # only to r0p0 and r1p0 of the Neoverse N1 cpu.
 ERRATA_N1_1043202      ?=1
@@ -407,6 +411,10 @@ $(eval $(call add_define,ERRATA_A76_1262888))
 $(eval $(call assert_boolean,ERRATA_A76_1275112))
 $(eval $(call add_define,ERRATA_A76_1275112))
 
+# Process ERRATA_A76_1286807 flag
+$(eval $(call assert_boolean,ERRATA_A76_1286807))
+$(eval $(call add_define,ERRATA_A76_1286807))
+
 # Process ERRATA_N1_1043202 flag
 $(eval $(call assert_boolean,ERRATA_N1_1043202))
 $(eval $(call add_define,ERRATA_N1_1043202))