target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "Aruba AP-303H";
  10         compatible = "aruba,ap-303h";
  11
  12         aliases {
  13                 led-boot = &led_system_green;
  14                 led-failsafe = &led_system_red;
  15                 led-running = &led_system_green;
  16                 led-upgrade = &led_system_amber;
  17         };
  18
  19         memory {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x10000000>;
  22         };
  23
  24         soc {
  25                 rng@22000 {
  26                         status = "okay";
  27                 };
  28
  29                 mdio@90000 {
  30                         status = "okay";
  31                         pinctrl-0 = <&mdio_pins>;
  32                         pinctrl-names = "default";
  33
  34                         reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
  35                         reset-delay-us = <2000>;
  36                 };
  37
  38                 counter@4a1000 {
  39                         compatible = "qcom,qca-gcnt";
  40                         reg = <0x4a1000 0x4>;
  41                 };
  42
  43                 ess_tcsr@1953000 {
  44                         compatible = "qcom,tcsr";
  45                         reg = <0x1953000 0x1000>;
  46                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  47                 };
  48
  49                 tcsr@1949000 {
  50                         compatible = "qcom,tcsr";
  51                         reg = <0x1949000 0x100>;
  52                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  53                 };
  54
  55                 tcsr@194b000 {
  56                         compatible = "qcom,tcsr";
  57                         reg = <0x194b000 0x100>;
  58                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  59                 };
  60
  61                 tcsr@1957000 {
  62                         compatible = "qcom,tcsr";
  63                         reg = <0x1957000 0x100>;
  64                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  65                 };
  66
  67                 crypto@8e3a000 {
  68                         status = "okay";
  69                 };
  70
  71                 watchdog@b017000 {
  72                         status = "okay";
  73                 };
  74
  75                 i2c_0: i2c@78b7000 {
  76                         pinctrl-0 = <&i2c_0_pins>;
  77                         pinctrl-names = "default";
  78                         status = "okay";
  79
  80                         tpm@29 {
  81                                 /* No Driver */
  82                                 compatible = "atmel,at97sc3203";
  83                                 reg = <0x29>;
  84                                 read-only;
  85                         };
  86
  87                         power-monitor@40 {
  88                                 /* No driver */
  89                                 compatible = "isl,isl28022";
  90                                 reg = <0x40>;
  91                         };
  92                 };
  93         };
  94
  95         leds {
  96                 compatible = "gpio-leds";
  97
  98                 wifi_green {
  99                         label = "green:wifi";
 100                         gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
 101                         linux,default-trigger = "phy0tpt";
 102                 };
 103
 104                 wifi_amber {
 105                         label = "amber:wifi";
 106                         gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
 107                         linux,default-trigger = "phy1tpt";
 108                 };
 109
 110                 pse {
 111                         label = "green:pse";
 112                         gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
 113                 };
 114
 115                 led_system_red: system_red {
 116                         label = "red:system";
 117                         gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
 118                 };
 119
 120                 led_system_green: system_green {
 121                         label = "green:system";
 122                         gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
 123                 };
 124
 125                 led_system_amber: system_amber {
 126                         label = "amber:system";
 127                         gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
 128                 };
 129         };
 130
 131         keys {
 132                 compatible = "gpio-keys";
 133
 134                 reset {
 135                         label = "Reset button";
 136                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 137                         linux,code = <KEY_RESTART>;
 138                 };
 139         };
 140 };
 141
 142 &blsp_dma {
 143         status = "okay";
 144 };
 145
 146 &blsp1_uart1 {
 147         pinctrl-0 = <&serial_0_pins>;
 148         pinctrl-names = "default";
 149         status = "okay";
 150 };
 151
 152 &blsp1_uart2 {
 153         /* Texas Instruments CC2540T BLE radio */
 154         pinctrl-0 = <&serial_1_pins>;
 155         pinctrl-names = "default";
 156         status = "okay";
 157 };
 158
 159 &cryptobam {
 160         status = "okay";
 161 };
 162
 163 &qpic_bam {
 164         status = "okay";
 165 };
 166
 167 &tlmm {
 168         /*
 169          * In addition to the Pins listed below,
 170          * the following GPIOs have "features":
 171          * 39 - out - active low to force HW reset
 172          * 32 - out - active low to reset TPM
 173          * 43 - out - active low to reset BLE radio
 174          * 41 - out - pulse to set warm reset status
 175          * 34 - out - active low to enable PSE port
 176          * 22 - in  - active low when 802.3at powered
 177          * 29 - in  - active high when DC powered
 178          * 40 - in  - active low when reset due to cold HW reset
 179          * 30 - in  - active low when USB overcurrent detected
 180          * 35 - in  - interrupt line for power monitor chip
 181          * 31 - in  - active low when PSE port active
 182          */
 183         mdio_pins: mdio_pinmux {
 184                 mux_1 {
 185                         pins = "gpio6";
 186                         function = "mdio";
 187                         bias-pull-up;
 188                 };
 189                 mux_2 {
 190                         pins = "gpio7";
 191                         function = "mdc";
 192                         bias-pull-up;
 193                 };
 194         };
 195
 196         spi_0_pins: spi_0_pinmux {
 197                 pin {
 198                         function = "blsp_spi0";
 199                         pins = "gpio13", "gpio14", "gpio15";
 200                         drive-strength = <12>;
 201                         bias-disable;
 202                 };
 203                 pin_cs {
 204                         function = "gpio";
 205                         pins = "gpio12", "gpio59";
 206                         drive-strength = <2>;
 207                         bias-disable;
 208                         output-high;
 209                 };
 210         };
 211
 212         i2c_0_pins: i2c_0_pinmux {
 213                 mux {
 214                         pins = "gpio20", "gpio21";
 215                         function = "blsp_i2c0";
 216                         drive-strength = <4>;
 217                         bias-disable;
 218                 };
 219         };
 220
 221         serial_0_pins: serial_0_pinmux {
 222                 mux {
 223                         pins = "gpio16", "gpio17";
 224                         function = "blsp_uart0";
 225                         bias-disable;
 226                 };
 227         };
 228
 229         serial_1_pins: serial_1_pinmux {
 230                 mux {
 231                         pins = "gpio8", "gpio9";
 232                         function = "blsp_uart1";
 233                         bias-disable;
 234                 };
 235         };
 236
 237         usb-power {
 238                 line-name = "USB-power";
 239                 gpios = <23 GPIO_ACTIVE_HIGH>;
 240                 gpio-hog;
 241                 output-high;
 242         };
 243 };
 244
 245 &blsp1_spi1 {
 246         pinctrl-0 = <&spi_0_pins>;
 247         pinctrl-names = "default";
 248         status = "okay";
 249         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
 250
 251         flash@0 {
 252                 compatible = "jedec,spi-nor";
 253                 reg = <0>;
 254                 spi-max-frequency = <24000000>;
 255
 256                 partitions {
 257                         compatible = "fixed-partitions";
 258                         #address-cells = <1>;
 259                         #size-cells = <1>;
 260
 261                         /*
 262                          * There is no partition map for the NOR flash
 263                          * in the stock firmware.
 264                          *
 265                          * All partitions here are based on offsets
 266                          * found in the U-Boot GPL code and information
 267                          * from smem.
 268                          */
 269
 270                         partition@0 {
 271                                 label = "sbl1";
 272                                 reg = <0x0 0x40000>;
 273                                 read-only;
 274                         };
 275
 276                         partition@40000 {
 277                                 label = "mibib";
 278                                 reg = <0x40000 0x20000>;
 279                                 read-only;
 280                         };
 281
 282                         partition@60000 {
 283                                 label = "qsee";
 284                                 reg = <0x60000 0x60000>;
 285                                 read-only;
 286                         };
 287
 288                         partition@c0000 {
 289                                 label = "cdt";
 290                                 reg = <0xc0000 0x10000>;
 291                                 read-only;
 292                         };
 293
 294                         partition@d0000 {
 295                                 label = "ddrparams";
 296                                 reg = <0xd0000 0x10000>;
 297                                 read-only;
 298                         };
 299
 300                         partition@e0000 {
 301                                 label = "appsblenv";
 302                                 reg = <0xe0000 0x10000>;
 303                                 read-only;
 304                         };
 305
 306                         partition@f0000 {
 307                                 label = "appsbl";
 308                                 reg = <0xf0000 0x100000>;
 309                                 read-only;
 310                         };
 311
 312                         partition@1e0000 {
 313                                 label = "ART";
 314                                 reg = <0x1f0000 0x10000>;
 315                                 read-only;
 316
 317                                 nvmem-layout {
 318                                         compatible = "fixed-layout";
 319                                         #address-cells = <1>;
 320                                         #size-cells = <1>;
 321
 322                                         precal_art_1000: precal@1000 {
 323                                                 reg = <0x1000 0x2f20>;
 324                                         };
 325
 326                                         precal_art_5000: precal@5000 {
 327                                                 reg = <0x5000 0x2f20>;
 328                                         };
 329                                 };
 330                         };
 331
 332                         partition@1f0000 {
 333                                 label = "osss";
 334                                 reg = <0x200000 0x170000>;
 335                                 read-only;
 336                         };
 337
 338                         partition@200000 {
 339                                 label = "pds";
 340                                 reg = <0x370000 0x10000>;
 341                                 read-only;
 342                         };
 343
 344                         partition@380000 {
 345                                 label = "apcd";
 346                                 reg = <0x380000 0x10000>;
 347                                 read-only;
 348                         };
 349
 350                         partition@390000 {
 351                                 label = "mfginfo";
 352                                 reg = <0x390000 0x10000>;
 353                                 read-only;
 354
 355                                 nvmem-layout {
 356                                         compatible = "fixed-layout";
 357                                         #address-cells = <1>;
 358                                         #size-cells = <1>;
 359
 360                                         macaddr_mfginfo_1d: macaddr@1d {
 361                                                 compatible = "mac-base";
 362                                                 reg = <0x1d 0x6>;
 363                                                 #nvmem-cell-cells = <1>;
 364                                         };
 365
 366                                         macaddr_mfginfo_45: macaddr@45 {
 367                                                 compatible = "mac-base";
 368                                                 reg = <0x45 0x6>;
 369                                                 #nvmem-cell-cells = <1>;
 370                                         };
 371                                 };
 372                         };
 373
 374                         partition@3a0000 {
 375                                 label = "fcache";
 376                                 reg = <0x3a0000 0x10000>;
 377                                 read-only;
 378                         };
 379
 380                         partition@3b0000 {
 381                                 /* Called osss1 in smem */
 382                                 label = "u-boot-env-bak";
 383                                 reg = <0x3b0000 0x10000>;
 384                                 read-only;
 385                         };
 386
 387                         partition@3f0000 {
 388                                 label = "u-boot-env";
 389                                 reg = <0x3c0000 0x40000>;
 390                                 read-only;
 391                         };
 392                 };
 393         };
 394
 395         flash@1 {
 396                 status = "okay";
 397
 398                 compatible = "spi-nand";
 399                 reg = <1>;
 400                 spi-max-frequency = <24000000>;
 401
 402                 partitions {
 403                         compatible = "fixed-partitions";
 404                         #address-cells = <1>;
 405                         #size-cells = <1>;
 406
 407                         partition@0 {
 408                                 /* 'aos0' in Aruba firmware */
 409                                 label = "aos0";
 410                                 reg = <0x0 0x2000000>;
 411                                 read-only;
 412                         };
 413
 414                         partition@2000000 {
 415                                 /* 'aos1' in Aruba firmware */
 416                                 label = "ubi";
 417                                 reg = <0x2000000 0x2000000>;
 418                         };
 419
 420                         partition@4000000 {
 421                                 label = "aruba-ubifs";
 422                                 reg = <0x4000000 0x4000000>;
 423                                 read-only;
 424                         };
 425                 };
 426         };
 427 };
 428
 429 &usb3 {
 430         status = "okay";
 431 };
 432
 433 &usb3_dwc {
 434         phys = <&usb3_hs_phy>;
 435         phy-names = "usb2-phy";
 436 };
 437
 438 &usb3_hs_phy {
 439         status = "okay";
 440 };
 441
 442 &gmac {
 443         status = "okay";
 444
 445         nvmem-cell-names = "mac-address";
 446         nvmem-cells = <&macaddr_mfginfo_1d 1>;
 447 };
 448
 449 &switch {
 450         status = "okay";
 451 };
 452
 453 &swport2 {
 454         status = "okay";
 455
 456         label = "lan1";
 457 };
 458
 459 &swport3 {
 460         status = "okay";
 461
 462         label = "lan2";
 463 };
 464
 465 &swport4 {
 466         status = "okay";
 467
 468         label = "lan3";
 469 };
 470
 471 &swport5 {
 472         status = "okay";
 473
 474         label = "wan";
 475         nvmem-cell-names = "mac-address";
 476         nvmem-cells = <&macaddr_mfginfo_1d 0>;
 477 };
 478
 479 &wifi0 {
 480         status = "okay";
 481         nvmem-cell-names = "pre-calibration", "mac-address";
 482         nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_45 0>;
 483         qcom,ath10k-calibration-variant = "Aruba-AP-303";
 484 };
 485
 486 &wifi1 {
 487         status = "okay";
 488         nvmem-cell-names = "pre-calibration", "mac-address";
 489         nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_45 1>;
 490         qcom,ath10k-calibration-variant = "Aruba-AP-303";
 491 };