target/linux/starfive/patches-6.1/0046-riscv-dts-starfive-jh7110-Add-ethernet-device-nodes.patch

   1 From cad740398f4cb6604abf1ddcc70121b2634ac233 Mon Sep 17 00:00:00 2001
   2 From: Samin Guo <samin.guo@starfivetech.com>
   3 Date: Fri, 3 Mar 2023 16:49:31 +0800
   4 Subject: [PATCH 046/122] riscv: dts: starfive: jh7110: Add ethernet device
   5  nodes
   6
   7 Add JH7110 ethernet device node to support gmac driver for the JH7110
   8 RISC-V SoC.
   9
  10 Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
  11 Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
  12 Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
  13 ---
  14  arch/riscv/boot/dts/starfive/jh7110.dtsi | 69 ++++++++++++++++++++++++
  15  1 file changed, 69 insertions(+)
  16
  17 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
  18 +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
  19 @@ -230,6 +230,13 @@
  20                 #clock-cells = <0>;
  21         };
  22
  23 +       stmmac_axi_setup: stmmac-axi-config {
  24 +               snps,lpi_en;
  25 +               snps,wr_osr_lmt = <4>;
  26 +               snps,rd_osr_lmt = <4>;
  27 +               snps,blen = <256 128 64 32 0 0 0>;
  28 +       };
  29 +
  30         tdm_ext: tdm-ext-clock {
  31                 compatible = "fixed-clock";
  32                 clock-output-names = "tdm_ext";
  33 @@ -489,6 +496,68 @@
  34                         #gpio-cells = <2>;
  35                 };
  36
  37 +               gmac0: ethernet@16030000 {
  38 +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
  39 +                       reg = <0x0 0x16030000 0x0 0x10000>;
  40 +                       clocks = <&aoncrg JH7110_AONCLK_GMAC0_AXI>,
  41 +                                <&aoncrg JH7110_AONCLK_GMAC0_AHB>,
  42 +                                <&syscrg JH7110_SYSCLK_GMAC0_PTP>,
  43 +                                <&aoncrg JH7110_AONCLK_GMAC0_TX_INV>,
  44 +                                <&syscrg JH7110_SYSCLK_GMAC0_GTXC>;
  45 +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
  46 +                                     "tx", "gtx";
  47 +                       resets = <&aoncrg JH7110_AONRST_GMAC0_AXI>,
  48 +                                <&aoncrg JH7110_AONRST_GMAC0_AHB>;
  49 +                       reset-names = "stmmaceth", "ahb";
  50 +                       interrupts = <7>, <6>, <5>;
  51 +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
  52 +                       rx-fifo-depth = <2048>;
  53 +                       tx-fifo-depth = <2048>;
  54 +                       snps,multicast-filter-bins = <64>;
  55 +                       snps,perfect-filter-entries = <8>;
  56 +                       snps,fixed-burst;
  57 +                       snps,no-pbl-x8;
  58 +                       snps,force_thresh_dma_mode;
  59 +                       snps,axi-config = <&stmmac_axi_setup>;
  60 +                       snps,tso;
  61 +                       snps,en-tx-lpi-clockgating;
  62 +                       snps,txpbl = <16>;
  63 +                       snps,rxpbl = <16>;
  64 +                       starfive,syscon = <&aon_syscon 0xc 0x12>;
  65 +                       status = "disabled";
  66 +               };
  67 +
  68 +               gmac1: ethernet@16040000 {
  69 +                       compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
  70 +                       reg = <0x0 0x16040000 0x0 0x10000>;
  71 +                       clocks = <&syscrg JH7110_SYSCLK_GMAC1_AXI>,
  72 +                                <&syscrg JH7110_SYSCLK_GMAC1_AHB>,
  73 +                                <&syscrg JH7110_SYSCLK_GMAC1_PTP>,
  74 +                                <&syscrg JH7110_SYSCLK_GMAC1_TX_INV>,
  75 +                                <&syscrg JH7110_SYSCLK_GMAC1_GTXC>;
  76 +                       clock-names = "stmmaceth", "pclk", "ptp_ref",
  77 +                                     "tx", "gtx";
  78 +                       resets = <&syscrg JH7110_SYSRST_GMAC1_AXI>,
  79 +                                <&syscrg JH7110_SYSRST_GMAC1_AHB>;
  80 +                       reset-names = "stmmaceth", "ahb";
  81 +                       interrupts = <78>, <77>, <76>;
  82 +                       interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
  83 +                       rx-fifo-depth = <2048>;
  84 +                       tx-fifo-depth = <2048>;
  85 +                       snps,multicast-filter-bins = <64>;
  86 +                       snps,perfect-filter-entries = <8>;
  87 +                       snps,fixed-burst;
  88 +                       snps,no-pbl-x8;
  89 +                       snps,force_thresh_dma_mode;
  90 +                       snps,axi-config = <&stmmac_axi_setup>;
  91 +                       snps,tso;
  92 +                       snps,en-tx-lpi-clockgating;
  93 +                       snps,txpbl = <16>;
  94 +                       snps,rxpbl = <16>;
  95 +                       starfive,syscon = <&sys_syscon 0x90 0x2>;
  96 +                       status = "disabled";
  97 +               };
  98 +
  99                 aoncrg: clock-controller@17000000 {
 100                         compatible = "starfive,jh7110-aoncrg";
 101                         reg = <0x0 0x17000000 0x0 0x10000>;