BRCMFMAC_43602A1 := kmod-brcmfmac brcmfmac-firmware-43602a1-pcie
BRCMFMAC_4366B1 := kmod-brcmfmac brcmfmac-firmware-4366b1-pcie
-USB2_PACKAGES := kmod-usb-ohci kmod-usb2
-USB3_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3
+USB2_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-phy-bcm-ns-usb2
+USB3_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-phy-bcm-ns-usb2
define Device/Default
# .dtb files are prefixed by SoC type, e.g. bcm4708- which is not included in device/image names
--- /dev/null
+From e8624859dde2ad07633dac7ec86629a516411ea1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 21 Sep 2016 18:01:43 +0200
+Subject: [PATCH] USB: bcma: drop Northstar PHY 2.0 initialization code
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This driver should initialize controller only, PHY initialization should
+be handled by separated PHY driver. We already have phy-bcm-ns-usb2 in
+place so let it makes its duty.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/usb/host/bcma-hcd.c | 80 ++++++++++++++-------------------------------
+ 1 file changed, 25 insertions(+), 55 deletions(-)
+
+--- a/drivers/usb/host/bcma-hcd.c
++++ b/drivers/usb/host/bcma-hcd.c
+@@ -239,44 +239,10 @@ static int bcma_hcd_usb20_old_arm_init(s
+ return 0;
+ }
+
+-static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
+-{
+- struct bcma_device *arm_core;
+- void __iomem *dmu;
+-
+- arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
+- if (!arm_core) {
+- dev_err(&dev->dev, "can not find ARM Cortex A9 ihost core\n");
+- return;
+- }
+-
+- dmu = ioremap_nocache(arm_core->addr_s[0], 0x1000);
+- if (!dmu) {
+- dev_err(&dev->dev, "can not map ARM Cortex A9 ihost core\n");
+- return;
+- }
+-
+- /* Unlock DMU PLL settings */
+- iowrite32(0x0000ea68, dmu + 0x180);
+-
+- /* Write USB 2.0 PLL control setting */
+- iowrite32(0x00dd10c3, dmu + 0x164);
+-
+- /* Lock DMU PLL settings */
+- iowrite32(0x00000000, dmu + 0x180);
+-
+- iounmap(dmu);
+-}
+-
+-static void bcma_hcd_init_chip_arm_hc(struct bcma_device *dev)
++static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
+ {
+ u32 val;
+
+- /*
+- * Delay after PHY initialized to ensure HC is ready to be configured
+- */
+- usleep_range(1000, 2000);
+-
+ /* Set packet buffer OUT threshold */
+ val = bcma_read32(dev, 0x94);
+ val &= 0xffff;
+@@ -287,20 +253,33 @@ static void bcma_hcd_init_chip_arm_hc(st
+ val = bcma_read32(dev, 0x9c);
+ val |= 1;
+ bcma_write32(dev, 0x9c, val);
++
++ /*
++ * Broadcom initializes PHY and then waits to ensure HC is ready to be
++ * configured. In our case the order is reversed. We just initialized
++ * controller and we let HCD initialize PHY, so let's wait (sleep) now.
++ */
++ usleep_range(1000, 2000);
+ }
+
+-static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
++/**
++ * bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
++ */
++static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
+ {
+- bcma_core_enable(dev, 0);
++ struct bcma_device *core = bcma_hcd->core;
++ struct bcma_chipinfo *ci = &core->bus->chipinfo;
++ struct device *dev = &core->dev;
++
++ bcma_core_enable(core, 0);
+
+- if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
+- dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
+- if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
+- dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
+- bcma_hcd_init_chip_arm_phy(dev);
++ if (ci->id == BCMA_CHIP_ID_BCM4707 ||
++ ci->id == BCMA_CHIP_ID_BCM53018)
++ bcma_hcd_usb20_ns_init_hc(core);
+
+- bcma_hcd_init_chip_arm_hc(dev);
+- }
++ of_platform_default_populate(dev->of_node, NULL, dev);
++
++ return 0;
+ }
+
+ static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
+@@ -373,16 +352,7 @@ static int bcma_hcd_usb20_init(struct bc
+ if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
+ return -EOPNOTSUPP;
+
+- switch (dev->id.id) {
+- case BCMA_CORE_NS_USB20:
+- bcma_hcd_init_chip_arm(dev);
+- break;
+- case BCMA_CORE_USB20_HOST:
+- bcma_hcd_init_chip_mips(dev);
+- break;
+- default:
+- return -ENODEV;
+- }
++ bcma_hcd_init_chip_mips(dev);
+
+ /* In AI chips EHCI is addrspace 0, OHCI is 1 */
+ ohci_addr = dev->addr_s[0];
+@@ -451,7 +421,7 @@ static int bcma_hcd_probe(struct bcma_de
+ err = -ENOTSUPP;
+ break;
+ case BCMA_CORE_NS_USB20:
+- err = bcma_hcd_usb20_init(usb_dev);
++ err = bcma_hcd_usb20_ns_init(usb_dev);
+ break;
+ case BCMA_CORE_NS_USB30:
+ err = bcma_hcd_usb30_init(usb_dev);
struct gpio_desc *gpio_desc;
};
-@@ -319,6 +321,10 @@ static const struct usb_ehci_pdata ehci_
+@@ -298,6 +300,10 @@ static const struct usb_ehci_pdata ehci_
static const struct usb_ohci_pdata ohci_pdata = {
};
static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
const char *name, u32 addr,
const void *data,
-@@ -412,6 +418,150 @@ err_unregister_ohci_dev:
+@@ -382,6 +388,150 @@ err_unregister_ohci_dev:
return err;
}
static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
{
struct bcma_device *core = bcma_hcd->core;
-@@ -419,7 +569,13 @@ static int bcma_hcd_usb30_init(struct bc
+@@ -389,7 +539,13 @@ static int bcma_hcd_usb30_init(struct bc
bcma_core_enable(core, 0);
return 0;
}
-@@ -471,11 +627,14 @@ static void bcma_hcd_remove(struct bcma_
+@@ -441,11 +597,14 @@ static void bcma_hcd_remove(struct bcma_
struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
struct platform_device *ohci_dev = usb_dev->ohci_dev;
struct platform_device *ehci_dev = usb_dev->ehci_dev;
+++ /dev/null
-From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
-Subject: [PATCH] USB: bcma: improve USB 2.0 PHY support for BCM4709 and
- BCM47094
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
----
---- a/drivers/usb/host/bcma-hcd.c
-+++ b/drivers/usb/host/bcma-hcd.c
-@@ -32,6 +32,17 @@
- #include <linux/usb/ohci_pdriver.h>
- #include <linux/usb/xhci_pdriver.h>
-
-+/* DMU (Device Management Unit) */
-+#define BCMA_DMU_CRU_USB2_CONTROL 0x0164
-+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK 0x00000FFC
-+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT 2
-+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK 0x00007000
-+#define BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT 12
-+#define BCMA_DMU_CRU_CLKSET_KEY 0x0180
-+#define BCMA_DMU_CRU_STRAPS_CTRL 0x02A0
-+#define BCMA_DMU_CRU_STRAPS_CTRL_USB3 0x00000010
-+#define BCMA_DMU_CRU_STRAPS_CTRL_4BYTE 0x00008000
-+
- MODULE_AUTHOR("Hauke Mehrtens");
- MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
- MODULE_LICENSE("GPL");
-@@ -241,10 +252,35 @@ static int bcma_hcd_usb20_old_arm_init(s
- return 0;
- }
-
-+static u32 bcma_hcd_usb_ref_clk_get_rate(void __iomem *dmu)
-+{
-+ u32 val, ndiv, pdiv, ch2_mdiv, ch2_freq;
-+
-+ /* get divider integer from the cru_genpll_control5 */
-+ val = ioread32(dmu + 0x154);
-+ ndiv = (val >> 20) & 0x3ff;
-+ if (ndiv == 0)
-+ ndiv = 1 << 10;
-+
-+ /* get pdiv and ch2_mdiv from the cru_genpll_control6 */
-+ val = ioread32(dmu + 0x158);
-+ pdiv = (val >> 24) & 0x7;
-+ pdiv = (pdiv == 0) ? (1 << 3) : pdiv;
-+
-+ ch2_mdiv = val & 0xff;
-+ ch2_mdiv = (ch2_mdiv == 0) ? (1 << 8) : ch2_mdiv;
-+
-+ /* calculate ch2_freq based on 25MHz reference clock */
-+ ch2_freq = (25000000 / (pdiv * ch2_mdiv)) * ndiv;
-+
-+ return ch2_freq;
-+}
-+
- static void bcma_hcd_init_chip_arm_phy(struct bcma_device *dev)
- {
- struct bcma_device *arm_core;
- void __iomem *dmu;
-+ u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
-
- arm_core = bcma_find_core(dev->bus, BCMA_CORE_ARMCA9);
- if (!arm_core) {
-@@ -258,14 +294,29 @@ static void bcma_hcd_init_chip_arm_phy(s
- return;
- }
-
-+ ref_clk_rate = bcma_hcd_usb_ref_clk_get_rate(dmu);
-+
-+ usb2ctl = ioread32(dmu + BCMA_DMU_CRU_USB2_CONTROL);
-+
-+ usb_pll_pdiv = usb2ctl;
-+ usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
-+ usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
-+ if (!usb_pll_pdiv)
-+ usb_pll_pdiv = 1 << 3;
-+
-+ /* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
-+ usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
-+
- /* Unlock DMU PLL settings */
-- iowrite32(0x0000ea68, dmu + 0x180);
-+ iowrite32(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
-
- /* Write USB 2.0 PLL control setting */
-- iowrite32(0x00dd10c3, dmu + 0x164);
-+ usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
-+ usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
-+ iowrite32(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
-
- /* Lock DMU PLL settings */
-- iowrite32(0x00000000, dmu + 0x180);
-+ iowrite32(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
-
- iounmap(dmu);
- }
-@@ -293,15 +344,17 @@ static void bcma_hcd_init_chip_arm_hc(st
-
- static void bcma_hcd_init_chip_arm(struct bcma_device *dev)
- {
-+ struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
-+
- bcma_core_enable(dev, 0);
-
-- if (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
-- dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018) {
-- if (dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4707 ||
-- dev->bus->chipinfo.pkg == BCMA_PKG_ID_BCM4708)
-- bcma_hcd_init_chip_arm_phy(dev);
-+ if (chipinfo->id == BCMA_CHIP_ID_BCM4707 ||
-+ chipinfo->id == BCMA_CHIP_ID_BCM47094 ||
-+ chipinfo->id == BCMA_CHIP_ID_BCM53018) {
-+ bcma_hcd_init_chip_arm_phy(dev);
-
-- bcma_hcd_init_chip_arm_hc(dev);
-+ if (1) /* TODO: Exclude BCM53573 */
-+ bcma_hcd_init_chip_arm_hc(dev);
- }
- }
-
projects / openwrt / openwrt.git / commitdiff