CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_KERNEL_GZIP=y
-CONFIG_HAVE_KERNEL_LZ4=y
-CONFIG_HAVE_KERNEL_LZMA=y
-CONFIG_HAVE_KERNEL_LZO=y
-CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
## Device Tree Settings
################################################################################
-dtparam=random=on,watchdog=on,audio=on,i2c0=on,i2c1=on,spi=on
+dtparam=random=on
+dtparam=watchdog=on
+dtparam=audio=on
+dtparam=i2c0=on
+dtparam=i2c1=on
+dtparam=spi=on
#dtoverlay=adau1977-adc
#dtoverlay=audioinjector-wm8731-audio
+#dtoverlay=dionaudio-loco
#dtoverlay=hifiberry-amp
#dtoverlay=hifiberry-dac
#dtoverlay=hifiberry-dacplus
#dtoverlay=hifiberry-digi
#dtoverlay=iqaudio-dac
#dtoverlay=iqaudio-dacplus
+#dtoverlay=iqaudio-digi-wm8804-audio
#dtoverlay=justboom-dac
#dtoverlay=justboom-digi
#dtoverlay=raspidac3
$(eval $(call KernelPackage,sound-soc-digidac1-soundcard))
+define KernelPackage/sound-soc-dionaudio-loco
+ TITLE:=Support for Dion Audio LOCO DAC-AMP
+ KCONFIG:= \
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO \
+ CONFIG_SND_SOC_PCM5102A
+ FILES:= \
+ $(LINUX_DIR)/sound/soc/bcm/snd-soc-dionaudio-loco.ko \
+ $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko
+ AUTOLOAD:=$(call AutoLoad,68,snd-soc-snd-soc-pcm5102a \
+ snd-soc-dionaudio-loco)
+ DEPENDS:= \
+ kmod-sound-soc-bcm2835-i2s
+ $(call AddDepends/sound)
+endef
+
+define KernelPackage/sound-soc-dionaudio-loco/description
+ This package contains support for Dion Audio LOCO DAC-AMP
+endef
+
+$(eval $(call KernelPackage,sound-soc-dionaudio-loco))
+
define KernelPackage/sound-soc-hifiberry-dac
TITLE:=Support for HifiBerry DAC
KCONFIG:= \
$(eval $(call KernelPackage,sound-soc-iqaudio-dac))
+define KernelPackage/sound-soc-iqaudio-digi
+ TITLE:=Support for IQaudIO-DIGI
+ KCONFIG:= \
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI \
+ CONFIG_SND_SOC_WM8804 \
+ CONFIG_SND_SOC_WM8804_I2C
+ FILES:= \
+ $(LINUX_DIR)/sound/soc/bcm/snd-soc-iqaudio-digi.ko \
+ $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \
+ $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko
+ AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804 snd-soc-wm8804-i2c \
+ snd-soc-iqaudio-digi)
+ DEPENDS:= \
+ kmod-sound-soc-bcm2835-i2s \
+ +kmod-i2c-bcm2708
+ $(call AddDepends/sound)
+endef
+
+define KernelPackage/sound-soc-iqaudio-digi/description
+ This package contains support for IQaudIO-DIGI
+endef
+
+$(eval $(call KernelPackage,sound-soc-iqaudio-digi))
+
define KernelPackage/sound-soc-justboom-dac
TITLE:=Support for JustBoom DAC
KCONFIG:= \
-From 436932c454197f4f1e8707fc3d99d2908e6b842c Mon Sep 17 00:00:00 2001
+From 047957666a5478b924a129892c54ab9c41816a43 Mon Sep 17 00:00:00 2001
From: Steve Glendinning <steve.glendinning@smsc.com>
Date: Thu, 19 Feb 2015 18:47:12 +0000
-Subject: [PATCH 001/381] smsx95xx: fix crimes against truesize
+Subject: [PATCH 001/423] smsx95xx: fix crimes against truesize
smsc95xx is adjusting truesize when it shouldn't, and following a recent patch from Eric this is now triggering warnings.
-From 012687428d83585c5d55a08b3779ea278fcc35f6 Mon Sep 17 00:00:00 2001
+From 4b0c62e74a6e2e01e7d37fb6be0865df77c0ad03 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 17 Apr 2015 16:58:45 +0100
-Subject: [PATCH 002/381] smsc95xx: Disable turbo mode by default
+Subject: [PATCH 002/423] smsc95xx: Disable turbo mode by default
---
drivers/net/usb/smsc95xx.c | 2 +-
-From f5f66abf7c99c7786991f7bdd1b91195e8b48913 Mon Sep 17 00:00:00 2001
+From d69c65cb5ad6738d5bec2531df75824c44459800 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Jun 2014 13:42:01 +0100
-Subject: [PATCH 003/381] vmstat: Workaround for issue where dirty page count
+Subject: [PATCH 003/423] vmstat: Workaround for issue where dirty page count
goes negative
See:
-From 47658fca0d3c3476d19d78a985aa105022c96d91 Mon Sep 17 00:00:00 2001
+From 7d5a47372854564f8071edeaf217360d2f53cde0 Mon Sep 17 00:00:00 2001
From: Robert Tiemann <rtie@gmx.de>
Date: Mon, 20 Jul 2015 11:01:25 +0200
-Subject: [PATCH 004/381] BCM2835_DT: Fix I2S register map
+Subject: [PATCH 004/423] BCM2835_DT: Fix I2S register map
---
Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt | 4 ++--
-From 3031c97bab942c5bc206ea1eef5be76f147026f9 Mon Sep 17 00:00:00 2001
+From 8ec469e6ed6a5dd357c04322dfc4e2ddbfcc040b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 4 Dec 2015 17:41:50 +0000
-Subject: [PATCH 005/381] irq-bcm2836: Prevent spurious interrupts, and trap
+Subject: [PATCH 005/423] irq-bcm2836: Prevent spurious interrupts, and trap
them early
The old arch-specific IRQ macros included a dsb to ensure the
-From 3e40206244596cbf6a8056c5e1f1c5aecd446452 Mon Sep 17 00:00:00 2001
+From daf4407e90396b12f87cfd75651505dee67f1c0c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 12 Jun 2015 19:01:05 +0200
-Subject: [PATCH 006/381] irqchip: bcm2835: Add FIQ support
+Subject: [PATCH 006/423] irqchip: bcm2835: Add FIQ support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From ead6c040137ae0efb3936f186740b600aff48c6e Mon Sep 17 00:00:00 2001
+From d6cad8a047430f5095e43e0d0e8f083e6ab411df Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 23 Oct 2015 16:26:55 +0200
-Subject: [PATCH 007/381] irqchip: irq-bcm2835: Add 2836 FIQ support
+Subject: [PATCH 007/423] irqchip: irq-bcm2835: Add 2836 FIQ support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 781c45f28a16084b550f2f096b89193d59b9b3e9 Mon Sep 17 00:00:00 2001
+From cc33367763a6674463698cffab1a4a653df4ebd3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 30 Jun 2015 14:12:42 +0100
-Subject: [PATCH 008/381] serial: 8250: Don't crash when nr_uarts is 0
+Subject: [PATCH 008/423] serial: 8250: Don't crash when nr_uarts is 0
---
drivers/tty/serial/8250/8250_core.c | 2 ++
-From f318a741dc08f59c828e06097374aef494ecaac4 Mon Sep 17 00:00:00 2001
+From f168c856794b7a771661df395f3fd16b8c8435b3 Mon Sep 17 00:00:00 2001
From: notro <notro@tronnes.org>
Date: Thu, 10 Jul 2014 13:59:47 +0200
-Subject: [PATCH 009/381] pinctrl-bcm2835: Set base to 0 give expected gpio
+Subject: [PATCH 009/423] pinctrl-bcm2835: Set base to 0 give expected gpio
numbering
Signed-off-by: Noralf Tronnes <notro@tronnes.org>
-From ba96a12bf302436ffee953c51902a76d22775873 Mon Sep 17 00:00:00 2001
+From 62e5e9d21249eb4818c37bbcc07b334f97684f0b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 24 Feb 2015 13:40:50 +0000
-Subject: [PATCH 010/381] pinctrl-bcm2835: Fix interrupt handling for GPIOs
+Subject: [PATCH 010/423] pinctrl-bcm2835: Fix interrupt handling for GPIOs
28-31 and 46-53
Contrary to the documentation, the BCM2835 GPIO controller actually has
-From bd6aa494e149070c03c9eab94f7e473cdca1cf97 Mon Sep 17 00:00:00 2001
+From 33665d0e0cca6401025655121d66450716353f75 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 26 Feb 2015 09:58:22 +0000
-Subject: [PATCH 011/381] pinctrl-bcm2835: Only request the interrupts listed
+Subject: [PATCH 011/423] pinctrl-bcm2835: Only request the interrupts listed
in the DTB
Although the GPIO controller can generate three interrupts (four counting
-From b20f3df1e261b9a3b9d0051d32a966c251cb3020 Mon Sep 17 00:00:00 2001
+From 9cb63901af94334ee9f4bf55f731633ea478626a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 24 Jun 2015 14:10:44 +0100
-Subject: [PATCH 012/381] spi-bcm2835: Support pin groups other than 7-11
+Subject: [PATCH 012/423] spi-bcm2835: Support pin groups other than 7-11
The spi-bcm2835 driver automatically uses GPIO chip-selects due to
some unreliability of the native ones. In doing so it chooses the
-From 1c2be61a1a6e2eb7cc8b337d732563609f5d8299 Mon Sep 17 00:00:00 2001
+From d9bc838cde2a45c850c3a23d96c8ebe9715ea253 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Wed, 3 Jun 2015 12:26:13 +0200
-Subject: [PATCH 013/381] ARM: bcm2835: Set Serial number and Revision
+Subject: [PATCH 013/423] ARM: bcm2835: Set Serial number and Revision
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 208e73d0e230d021c7b1d778451cbaa6074e6969 Mon Sep 17 00:00:00 2001
+From 5d071d8a4f3a0c60bd48071d64f9d311d019d296 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 16:44:05 +0200
-Subject: [PATCH 014/381] bcm2835-i2s: get base address for DMA from devicetree
+Subject: [PATCH 014/423] bcm2835-i2s: get base address for DMA from devicetree
Code copied from spi-bcm2835. Get physical address from devicetree
instead of using hardcoded constant.
-From 6dc3da3194a366075cd7187a1119bb9d3834eea6 Mon Sep 17 00:00:00 2001
+From b4e96aa5e8f7825050d7ef74ec59d684cedcc8f1 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:21:16 +0200
-Subject: [PATCH 015/381] bcm2835-i2s: add 24bit support, update bclk_ratio to
+Subject: [PATCH 015/423] bcm2835-i2s: add 24bit support, update bclk_ratio to
more correct values
Code ported from bcm2708-i2s driver in Raspberry Pi tree.
-From e1eb1da5932b40e8a201b6b47d7ca2f72119e6e0 Mon Sep 17 00:00:00 2001
+From bd46c6f9df173b2b81bac5cb19814f0b66063b25 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:25:51 +0200
-Subject: [PATCH 016/381] bcm2835-i2s: setup clock only if CPU is clock master
+Subject: [PATCH 016/423] bcm2835-i2s: setup clock only if CPU is clock master
Code ported from bcm2708-i2s driver in Raspberry Pi tree.
-From b963ad6ff4edc8996000399529e0019a1e8b4dde Mon Sep 17 00:00:00 2001
+From 83f3ec096572e1f1878eb5f97632e7830fc606bd Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:49:51 +0200
-Subject: [PATCH 017/381] bcm2835-i2s: Eliminate debugfs directory error
+Subject: [PATCH 017/423] bcm2835-i2s: Eliminate debugfs directory error
Code ported from bcm2708-i2s driver in Raspberry Pi tree.
-From ea1121d3d44b53da76648d498bb1e02185f24198 Mon Sep 17 00:00:00 2001
+From c096f1d64ef032af2c9f2713727de6ec849969c5 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:35:20 +0200
-Subject: [PATCH 018/381] bcm2835-i2s: Register PCM device
+Subject: [PATCH 018/423] bcm2835-i2s: Register PCM device
Code ported from bcm2708-i2s driver in Raspberry Pi tree.
-From d4e3e25ba7157e76f248ad9ec5a0ea87d47a06f8 Mon Sep 17 00:00:00 2001
+From ec8796e8ccf92931ff87fb7626be8f3e63ddc2d0 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:55:21 +0200
-Subject: [PATCH 019/381] bcm2835-i2s: Enable MMAP support via a DT property
+Subject: [PATCH 019/423] bcm2835-i2s: Enable MMAP support via a DT property
Code ported from bcm2708-i2s driver in Raspberry Pi tree.
-From a38557498a7aab4543c991a4f9f5638fe2d611d8 Mon Sep 17 00:00:00 2001
+From a272c5805686c77e924f85e314cb5df77bea40be Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Thu, 9 Apr 2015 12:34:11 +0200
-Subject: [PATCH 020/381] dmaengine: bcm2835: Add slave dma support
+Subject: [PATCH 020/423] dmaengine: bcm2835: Add slave dma support
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 7419ab49d75bc956578201a19008ba3390916d73 Mon Sep 17 00:00:00 2001
+From 5780349e26ba486276936393f666bea55c5dbf1e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 3 Oct 2015 15:58:59 +0200
-Subject: [PATCH 021/381] dmaengine: bcm2835: set residue_granularity field
+Subject: [PATCH 021/423] dmaengine: bcm2835: set residue_granularity field
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From c64813bbb6d293b06994bd8ca2de6075953d8879 Mon Sep 17 00:00:00 2001
+From 24e006fc71be77120ac237af3797f4aa103ca0e1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 3 Oct 2015 22:22:55 +0200
-Subject: [PATCH 022/381] dmaengine: bcm2835: Load driver early and support
+Subject: [PATCH 022/423] dmaengine: bcm2835: Load driver early and support
legacy API
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
-From 15614a5ccb77b1a068e53cb4c85e4a65daf6a38f Mon Sep 17 00:00:00 2001
+From 411b5abcce1b72fdba106a7236548b8b5315a6e6 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sat, 10 Oct 2015 12:29:18 +0200
-Subject: [PATCH 023/381] bcm2835-dma: Fix dreq not set for slave transfers
+Subject: [PATCH 023/423] bcm2835-dma: Fix dreq not set for slave transfers
Set dreq to slave_id if it is not set like in bcm2708-dmaengine.
---
-From 4b94adab9a7d920d584ad95a633c30a244f6149b Mon Sep 17 00:00:00 2001
+From 8eb5210cea099d814f9e583358343d8680c5d05d Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 12:28:30 +0200
-Subject: [PATCH 024/381] bcm2835-dma: Limit cyclic transfers on lite channels
+Subject: [PATCH 024/423] bcm2835-dma: Limit cyclic transfers on lite channels
to 32k
Transfers larger than 32k cause repeated clicking with I2S soundcards.
-From 0b7e0b20da67546344f9fc8e57699adfe61b8953 Mon Sep 17 00:00:00 2001
+From c8963aeb4b3fbebc8e1de91a65e9f188a1e43d59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 15 Aug 2015 20:50:02 +0200
-Subject: [PATCH 025/381] bcm2835: Add support for uart1
+Subject: [PATCH 025/423] bcm2835: Add support for uart1
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From d1f1043ffe1ff3059a2a545a39b129d47006c131 Mon Sep 17 00:00:00 2001
+From ed165fd5d29fa90e6605cb4b87ec5cd35e4209c7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 26 Jun 2015 14:21:20 +0200
-Subject: [PATCH 026/381] firmware: bcm2835: Add missing property tags
+Subject: [PATCH 026/423] firmware: bcm2835: Add missing property tags
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 4f6a7b0ff6afd26d069c4f6b8d3c4fb4b0cc186b Mon Sep 17 00:00:00 2001
+From 50d8450a9fd5b05873e3b404e2089067920d53c1 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Sun, 12 May 2013 12:24:19 +0100
-Subject: [PATCH 027/381] Main bcm2708/bcm2709 linux port
+Subject: [PATCH 027/423] Main bcm2708/bcm2709 linux port
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 06d95a4dd349c4d5f6b52e657ffd1a27e4df3faf Mon Sep 17 00:00:00 2001
+From f455b928205d24aebbf0cc3cf5a9fff4cfb9563e Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 11 Nov 2015 21:01:15 +0000
-Subject: [PATCH 028/381] squash: include ARCH_BCM2708 / ARCH_BCM2709
+Subject: [PATCH 028/423] squash: include ARCH_BCM2708 / ARCH_BCM2709
---
drivers/char/hw_random/Kconfig | 2 +-
-From afd337386d8e58d2590d8f6c6ac85cfc1ba244a5 Mon Sep 17 00:00:00 2001
+From 89ea7c60a305783a6790e7e7e91b1451cd40fe78 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 1 May 2013 19:46:17 +0100
-Subject: [PATCH 029/381] Add dwc_otg driver
+Subject: [PATCH 029/423] Add dwc_otg driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From f370b4458afa944f9e960e95af476c15c8370c56 Mon Sep 17 00:00:00 2001
+From 006091f6aa1f34a2b92fb8ff1defd86d232b7e90 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 17:06:34 +0100
-Subject: [PATCH 030/381] bcm2708 framebuffer driver
+Subject: [PATCH 030/423] bcm2708 framebuffer driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 2ea9159435f6fdc6190126e7c413cb8c37259036 Mon Sep 17 00:00:00 2001
+From 6ab9b89c4a3def17db462e0902bb0ba325a7c191 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 14:22:53 +0100
-Subject: [PATCH 031/381] dmaengine: Add support for BCM2708
+Subject: [PATCH 031/423] dmaengine: Add support for BCM2708
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From ded251905fe3ebb582fd87fecf3454834333afa1 Mon Sep 17 00:00:00 2001
+From ed0042e046abbd2cee8425ff8e8c535cb025c22a Mon Sep 17 00:00:00 2001
From: gellert <gellert@raspberrypi.org>
Date: Fri, 15 Aug 2014 16:35:06 +0100
-Subject: [PATCH 032/381] MMC: added alternative MMC driver
+Subject: [PATCH 032/423] MMC: added alternative MMC driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 8c767f6b8d65c2c59995ed51512faeaf56fbb2c3 Mon Sep 17 00:00:00 2001
+From 7b251a5ab7f06c8f5720a0d49529e0dbe0514503 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 25 Mar 2015 17:49:47 +0000
-Subject: [PATCH 033/381] Adding bcm2835-sdhost driver, and an overlay to
+Subject: [PATCH 033/423] Adding bcm2835-sdhost driver, and an overlay to
enable it
BCM2835 has two SD card interfaces. This driver uses the other one.
-From 663e08c7b0f8cefd880dfe1eb3641830dafa8b5a Mon Sep 17 00:00:00 2001
+From effd8d3a65306de4f6cb43aa2139a75d181d9cee Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 3 Jul 2013 00:31:47 +0100
-Subject: [PATCH 034/381] cma: Add vc_cma driver to enable use of CMA
+Subject: [PATCH 034/423] cma: Add vc_cma driver to enable use of CMA
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From b7b8ef3806db931be95bddf47946e27facc6d5dd Mon Sep 17 00:00:00 2001
+From 809b8fb074a009dec508c02986b27979c5d78b1d Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 26 Mar 2012 22:15:50 +0100
-Subject: [PATCH 035/381] bcm2708: alsa sound driver
+Subject: [PATCH 035/423] bcm2708: alsa sound driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 6862270cc99bacc345403c730c38b17615834aef Mon Sep 17 00:00:00 2001
+From 1b37904494fc7c9923dde14aa08a63405d89d989 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 2 Jul 2013 23:42:01 +0100
-Subject: [PATCH 036/381] bcm2708 vchiq driver
+Subject: [PATCH 036/423] bcm2708 vchiq driver
MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit
-From f5cce853dbe19f479d61c2d91a009edbea5735fc Mon Sep 17 00:00:00 2001
+From 1dc99a2709085bc7bda11bd457280e9f00fd173b Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 16:07:06 +0100
-Subject: [PATCH 037/381] vc_mem: Add vc_mem driver
+Subject: [PATCH 037/423] vc_mem: Add vc_mem driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From f5a5cd2721763f3759fc49d08f1b1ca0b039fcf2 Mon Sep 17 00:00:00 2001
+From 98151664c3404e6ce9abe16241aaef78d260c967 Mon Sep 17 00:00:00 2001
From: Tim Gover <tgover@broadcom.com>
Date: Tue, 22 Jul 2014 15:41:04 +0100
-Subject: [PATCH 038/381] vcsm: VideoCore shared memory service for BCM2835
+Subject: [PATCH 038/423] vcsm: VideoCore shared memory service for BCM2835
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 60d7c4ca1dd8ff0ab4d84f0b3d1d3aaeecede4d7 Mon Sep 17 00:00:00 2001
+From ccfc207deae0f9e76975908af6c16460a4e05650 Mon Sep 17 00:00:00 2001
From: Luke Wren <luke@raspberrypi.org>
Date: Fri, 21 Aug 2015 23:14:48 +0100
-Subject: [PATCH 039/381] Add /dev/gpiomem device for rootless user GPIO access
+Subject: [PATCH 039/423] Add /dev/gpiomem device for rootless user GPIO access
Signed-off-by: Luke Wren <luke@raspberrypi.org>
-From c5c6cdc2f3dc823bf7ac7e31709f192a783f7d56 Mon Sep 17 00:00:00 2001
+From d2e199c4c3e599a0166cbaed671f5446a366ccd6 Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sat, 5 Sep 2015 01:14:45 +0100
-Subject: [PATCH 040/381] Add SMI driver
+Subject: [PATCH 040/423] Add SMI driver
Signed-off-by: Luke Wren <wren6991@gmail.com>
---
-From 6470951ad62727bb57bde4c1a7584baacac7c558 Mon Sep 17 00:00:00 2001
+From f7066cd5ed22219015dd9e55dd2070f4822da956 Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sat, 5 Sep 2015 01:16:10 +0100
-Subject: [PATCH 041/381] Add SMI NAND driver
+Subject: [PATCH 041/423] Add SMI NAND driver
Signed-off-by: Luke Wren <wren6991@gmail.com>
---
-From e33b63b907bb2a83b9c40ebbe15eeced175c8567 Mon Sep 17 00:00:00 2001
+From 687cb2fff7d0f3480fd39e5ffbebe912e46fa972 Mon Sep 17 00:00:00 2001
From: Aron Szabo <aron@aron.ws>
Date: Sat, 16 Jun 2012 12:15:55 +0200
-Subject: [PATCH 042/381] lirc: added support for RaspberryPi GPIO
+Subject: [PATCH 042/423] lirc: added support for RaspberryPi GPIO
lirc_rpi: Use read_current_timer to determine transmitter delay. Thanks to jjmz and others
See: https://github.com/raspberrypi/linux/issues/525
-From 14b034de59582e2dac59aaf95c98d6593cfc5549 Mon Sep 17 00:00:00 2001
+From bf5b94ef7f3f667e384108aa84bee8195da04383 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 3 Jul 2013 00:49:20 +0100
-Subject: [PATCH 043/381] Add cpufreq driver
+Subject: [PATCH 043/423] Add cpufreq driver
Signed-off-by: popcornmix <popcornmix@gmail.com>
---
-From 9bccd57257d3156887d5bbeadbf35898505cd7f6 Mon Sep 17 00:00:00 2001
+From 83b388b35dea05c454a5b2eceec0eff06cc863fb Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 26 Mar 2013 19:24:24 +0000
-Subject: [PATCH 044/381] Added hwmon/thermal driver for reporting core
+Subject: [PATCH 044/423] Added hwmon/thermal driver for reporting core
temperature. Thanks Dorian
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
-From dc4e4461802c9dff395a49212e8420a9f586e247 Mon Sep 17 00:00:00 2001
+From d25b6fcbf3005ae61c5a1940b8a0a47ee545289b Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 15:44:08 +0100
-Subject: [PATCH 045/381] Add Chris Boot's i2c driver
+Subject: [PATCH 045/423] Add Chris Boot's i2c driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 9999c1fcfe8f03afaa2d91c2e9766ce8ae057c65 Mon Sep 17 00:00:00 2001
+From ea599a4e38ae921ec5aa8966163ea442357281df Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 26 Jun 2015 14:27:06 +0200
-Subject: [PATCH 046/381] char: broadcom: Add vcio module
+Subject: [PATCH 046/423] char: broadcom: Add vcio module
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 3ab001bd58d4578bf2beb293f93a91f81e3ad3b4 Mon Sep 17 00:00:00 2001
+From 996a87d316243001486fe36b36a7b6ffb4dd1b28 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 26 Jun 2015 14:25:01 +0200
-Subject: [PATCH 047/381] firmware: bcm2835: Support ARCH_BCM270x
+Subject: [PATCH 047/423] firmware: bcm2835: Support ARCH_BCM270x
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 47ada5db4dbd8a4dd751bbd630d4abbd15131c98 Mon Sep 17 00:00:00 2001
+From b7c2738cecfa7e32e689f9e9f51f7a0283c6e494 Mon Sep 17 00:00:00 2001
From: Vincent Sanders <vincent.sanders@collabora.co.uk>
Date: Wed, 30 Jan 2013 12:45:18 +0000
-Subject: [PATCH 048/381] bcm2835: add v4l2 camera device
+Subject: [PATCH 048/423] bcm2835: add v4l2 camera device
- Supports raw YUV capture, preview, JPEG and H264.
- Uses videobuf2 for data transfer, using dma_buf.
-From b2f75aacf0bfb9e3069bdec7a6481ed4bf7a2b51 Mon Sep 17 00:00:00 2001
+From 5ea28aea74a57b9cbbb59ee7df29c5994fc6ad81 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 11 May 2015 09:00:42 +0100
-Subject: [PATCH 049/381] scripts: Add mkknlimg and knlinfo scripts from tools
+Subject: [PATCH 049/423] scripts: Add mkknlimg and knlinfo scripts from tools
repo
The Raspberry Pi firmware looks for a trailer on the kernel image to
-From 0f79afb206f238e89f1cb5c40299f6fd6a47dda3 Mon Sep 17 00:00:00 2001
+From ef0a1dc5b8069728671aa1d4a9cee2a2beda16be Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 5 Dec 2014 17:26:26 +0000
-Subject: [PATCH 050/381] fdt: Add support for the CONFIG_CMDLINE_EXTEND option
+Subject: [PATCH 050/423] fdt: Add support for the CONFIG_CMDLINE_EXTEND option
---
drivers/of/fdt.c | 29 ++++++++++++++++++++++++-----
-From 4dc11d58769fda62ef7cff1ab506d4c68c232270 Mon Sep 17 00:00:00 2001
+From c159387861a9b3e1b0f9fe12d6afe06f0cb8994d Mon Sep 17 00:00:00 2001
From: notro <notro@tronnes.org>
Date: Wed, 9 Jul 2014 14:46:08 +0200
-Subject: [PATCH 051/381] BCM2708: Add core Device Tree support
+Subject: [PATCH 051/423] BCM2708: Add core Device Tree support
Add the bare minimum needed to boot BCM2708 from a Device Tree.
-From 5869509197e8b3b6080f212a22e7d10310fc0a9b Mon Sep 17 00:00:00 2001
+From d867b1d6a7470aec5946b495a10a311742b08c18 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 15 Aug 2015 20:47:07 +0200
-Subject: [PATCH 052/381] bcm2835: Match with BCM2708 Device Trees
+Subject: [PATCH 052/423] bcm2835: Match with BCM2708 Device Trees
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From 6f58dcfd94cdd56fb1d462f93397a8548d0340c7 Mon Sep 17 00:00:00 2001
+From 6e0a601e2a1eb727b7b3f00c41e5d54197087feb Mon Sep 17 00:00:00 2001
From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Date: Mon, 17 Jun 2013 13:32:11 +0300
-Subject: [PATCH 053/381] fbdev: add FBIOCOPYAREA ioctl
+Subject: [PATCH 053/423] fbdev: add FBIOCOPYAREA ioctl
Based on the patch authored by Ali Gholami Rudi at
https://lkml.org/lkml/2009/7/13/153
-From 634d2880e22cb1f77250db07b0c60e3f1280f645 Mon Sep 17 00:00:00 2001
+From 90df15f55607a4ec3b29374c5f7781300160bac3 Mon Sep 17 00:00:00 2001
From: Harm Hanemaaijer <fgenfb@yahoo.com>
Date: Thu, 20 Jun 2013 20:21:39 +0200
-Subject: [PATCH 057/381] Speed up console framebuffer imageblit function
+Subject: [PATCH 057/423] Speed up console framebuffer imageblit function
Especially on platforms with a slower CPU but a relatively high
framebuffer fill bandwidth, like current ARM devices, the existing
-From 775d5392d5ba612dc856f05fef318b3fd0687f81 Mon Sep 17 00:00:00 2001
+From 531927425d5bfd1525c7d47d321eeddff1eb3364 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 26 Mar 2013 17:26:38 +0000
-Subject: [PATCH 058/381] Allow mac address to be set in smsc95xx
+Subject: [PATCH 058/423] Allow mac address to be set in smsc95xx
Signed-off-by: popcornmix <popcornmix@gmail.com>
---
-From 5e030ebb3c7dd9a757e871ac7434e24b22ca7a16 Mon Sep 17 00:00:00 2001
+From f339686c292d0a4e50fbe6f9ccb294291f103605 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 8 May 2013 11:46:50 +0100
-Subject: [PATCH 059/381] enabling the realtime clock 1-wire chip DS1307 and
+Subject: [PATCH 059/423] enabling the realtime clock 1-wire chip DS1307 and
1-wire on GPIO4 (as a module)
1-wire: Add support for configuring pin for w1-gpio kernel module
-From 151995a5f455ff415d2e2d19ad8528137d53629d Mon Sep 17 00:00:00 2001
+From 934350e21fb2edfd042742892bbd4ea5173208ab Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 3 Jul 2013 00:54:08 +0100
-Subject: [PATCH 060/381] Added Device IDs for August DVB-T 205
+Subject: [PATCH 060/423] Added Device IDs for August DVB-T 205
---
drivers/media/usb/dvb-usb-v2/rtl28xxu.c | 4 ++++
-From 27950dc12923e0679a177ae7d17779a77d9500af Mon Sep 17 00:00:00 2001
+From 1ca424ef0079f90d9c5d1310bcbefe928b5e3fec Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Dec 2013 22:16:19 +0000
-Subject: [PATCH 061/381] config: Enable CONFIG_MEMCG, but leave it disabled
+Subject: [PATCH 061/423] config: Enable CONFIG_MEMCG, but leave it disabled
(due to memory cost). Enable with cgroup_enable=memory.
---
-From 90330d268c0507ca0b41c758feccbab2915e08fc Mon Sep 17 00:00:00 2001
+From fe45c479a680651326d22e6b966df63b2e719f70 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 14:59:51 +0100
-Subject: [PATCH 062/381] ASoC: Add support for PCM5102A codec
+Subject: [PATCH 062/423] ASoC: Add support for PCM5102A codec
Some definitions to support the PCM5102A codec
by Texas Instruments.
-From 2ea95927e8dc5c1ee099f999a24c5bfa028f18bf Mon Sep 17 00:00:00 2001
+From 35b87454d0cc08adf25c4e4e50cfbcae16af45eb Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 19:19:08 +0100
-Subject: [PATCH 063/381] ASoC: Add support for HifiBerry DAC
+Subject: [PATCH 063/423] ASoC: Add support for HifiBerry DAC
This adds a machine driver for the HifiBerry DAC.
It is a sound card that can
-From 2f681005c89b65de1a2aa1426a41cc7b9e243c74 Mon Sep 17 00:00:00 2001
+From 3f7614446e868612ab9099c7c959f43f29aa7e03 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 19:21:34 +0100
-Subject: [PATCH 064/381] ASoC: Add support for Rpi-DAC
+Subject: [PATCH 064/423] ASoC: Add support for Rpi-DAC
---
sound/soc/bcm/Kconfig | 7 +++
-From e83ad608ca30c502633123ce317f7451491951c0 Mon Sep 17 00:00:00 2001
+From 6148931ae669f041a7036c9eb0ec1b225275c1dd Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Wed, 15 Jan 2014 21:41:23 +0100
-Subject: [PATCH 065/381] ASoC: wm8804: Implement MCLK configuration options,
+Subject: [PATCH 065/423] ASoC: wm8804: Implement MCLK configuration options,
add 32bit support WM8804 can run with PLL frequencies of 256xfs and 128xfs
for most sample rates. At 192kHz only 128xfs is supported. The existing
driver selects 128xfs automatically for some lower samples rates. By using an
-From fb61baf20c890884a9e4f55da0f287f27f81a474 Mon Sep 17 00:00:00 2001
+From 8678473916702a1f744f65ca953febb10c297827 Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Wed, 15 Jan 2014 21:42:08 +0100
-Subject: [PATCH 066/381] ASoC: BCM:Add support for HiFiBerry Digi. Driver is
+Subject: [PATCH 066/423] ASoC: BCM:Add support for HiFiBerry Digi. Driver is
based on the patched WM8804 driver.
Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
-From cf98984028b036971f95671070806136d865b96e Mon Sep 17 00:00:00 2001
+From db3e779eb462f937984d57ed072b84c736ac179c Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Thu, 16 Jan 2014 07:36:35 +0100
-Subject: [PATCH 067/381] ASoC: wm8804: Set idle_bias_off to false Idle bias
+Subject: [PATCH 067/423] ASoC: wm8804: Set idle_bias_off to false Idle bias
has been change to remove warning on driver startup
Signed-off-by: Daniel Matuschek <daniel@matuschek.net>
-From f0fc1c656af73bbfc2984e0bb6b90b27bac1a532 Mon Sep 17 00:00:00 2001
+From b4efbfd86348893b2317131b7d355f64e619ab06 Mon Sep 17 00:00:00 2001
From: Gordon Garrity <gordon@iqaudio.com>
Date: Sat, 8 Mar 2014 16:56:57 +0000
-Subject: [PATCH 068/381] Add IQaudIO Sound Card support for Raspberry Pi
+Subject: [PATCH 068/423] Add IQaudIO Sound Card support for Raspberry Pi
Set a limit of 0dB on Digital Volume Control
-From d549bf5e41199399f174701b0f303b385d52beaf Mon Sep 17 00:00:00 2001
+From 2238f04766e0b653319a3291b546ba49d651ce81 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 14 Jul 2014 22:02:09 +0100
-Subject: [PATCH 069/381] hid: Reduce default mouse polling interval to 60Hz
+Subject: [PATCH 069/423] hid: Reduce default mouse polling interval to 60Hz
Reduces overhead when using X
---
-From 03107b2243e688b6c98042d0fd9416db2bd241f6 Mon Sep 17 00:00:00 2001
+From 3d116a8311017380e686bdddf80143d1a6cf885e Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Mon, 4 Aug 2014 10:06:56 +0200
-Subject: [PATCH 070/381] Added support for HiFiBerry DAC+
+Subject: [PATCH 070/423] Added support for HiFiBerry DAC+
The driver is based on the HiFiBerry DAC driver. However HiFiBerry DAC+ uses
a different codec chip (PCM5122), therefore a new driver is necessary.
-From 4076d38775ab7bbdf64875c6e5cec6eb4b27760c Mon Sep 17 00:00:00 2001
+From 7266f151fac2e09d08b71dc0bdd404506dc00055 Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Mon, 4 Aug 2014 11:09:58 +0200
-Subject: [PATCH 071/381] Added driver for HiFiBerry Amp amplifier add-on board
+Subject: [PATCH 071/423] Added driver for HiFiBerry Amp amplifier add-on board
The driver contains a low-level hardware driver for the TAS5713 and the
drivers for the Raspberry Pi I2S subsystem.
-From 1e1cdd39b3ed1a3488e796367f6e339dbe2ecaaa Mon Sep 17 00:00:00 2001
+From 62e75253eba759318d83706ba162a14c53182ff5 Mon Sep 17 00:00:00 2001
From: Ryan Coe <bluemrp9@gmail.com>
Date: Sat, 31 Jan 2015 18:25:49 -0700
-Subject: [PATCH 072/381] Update ds1307 driver for device-tree support
+Subject: [PATCH 072/423] Update ds1307 driver for device-tree support
Signed-off-by: Ryan Coe <bluemrp9@gmail.com>
---
-From 211b0053ad2b173e646e4db1b5dd2f51a2da4ed7 Mon Sep 17 00:00:00 2001
+From 8404a4fe589f3b7a42eb4d3e61719d76dfb83658 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 6 Feb 2015 13:50:57 +0000
-Subject: [PATCH 073/381] BCM270x_DT: Add pwr_led, and the required "input"
+Subject: [PATCH 073/423] BCM270x_DT: Add pwr_led, and the required "input"
trigger
The "input" trigger makes the associated GPIO an input. This is to support
-From 3a1b6b5d57c7f92e98338172dec58c8cd3f2141f Mon Sep 17 00:00:00 2001
+From ec66f897c2625ff0764c64229b4756b0b6f88a03 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 27 Feb 2015 15:10:24 +0000
-Subject: [PATCH 074/381] enc28j60: Add device tree compatible string and an
+Subject: [PATCH 074/423] enc28j60: Add device tree compatible string and an
overlay
---
-From 56a753118a1446feedb1845f37f3e5d3cc4f31a1 Mon Sep 17 00:00:00 2001
+From f48bdbd9477a98b4ab42e72c45ce7162eb09c030 Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbrodkorb@conet.de>
Date: Wed, 25 Mar 2015 09:26:17 +0100
-Subject: [PATCH 075/381] Add driver for rpi-proto
+Subject: [PATCH 075/423] Add driver for rpi-proto
Forward port of 3.10.x driver from https://github.com/koalo
We are using a custom board and would like to use rpi 3.18.x
-From c8647aeede51642c863c13cb741866a8ef13c2a7 Mon Sep 17 00:00:00 2001
+From 212f11d668fe451c892828d1882ddc5d8b591621 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 13 Apr 2015 17:16:29 +0100
-Subject: [PATCH 076/381] config: Add default configs
+Subject: [PATCH 076/423] config: Add default configs
---
arch/arm/configs/bcm2709_defconfig | 1254 +++++++++++++++++++++++++++++++++++
-From d9d77573d48f99b3cc7f760ce4febaf23cfc13e1 Mon Sep 17 00:00:00 2001
+From cc0e6881fbf29462ec038d308a655c935a9096f7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Wed, 29 Apr 2015 17:24:02 +0200
-Subject: [PATCH 077/381] bcm2835: bcm2835_defconfig
+Subject: [PATCH 077/423] bcm2835: bcm2835_defconfig
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-From c756311eb3ca94befe2d0b960232bebb03614a11 Mon Sep 17 00:00:00 2001
+From 6910ec0ffdad51f2a970f8080545c3ce621f3042 Mon Sep 17 00:00:00 2001
From: Gordon Hollingworth <gordon@raspberrypi.org>
Date: Tue, 12 May 2015 14:47:56 +0100
-Subject: [PATCH 078/381] rpi-ft5406: Add touchscreen driver for pi LCD display
+Subject: [PATCH 078/423] rpi-ft5406: Add touchscreen driver for pi LCD display
Fix driver detection failure Check that the buffer response is non-zero meaning the touchscreen was detected
-From c8fda14cc4b13b9a3612ecc5c3c7456a57e2029b Mon Sep 17 00:00:00 2001
+From efa4432e1c5b0a373108e2f4cefc23d882939e0c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 13 Oct 2014 11:47:53 +0100
-Subject: [PATCH 079/381] Improve __copy_to_user and __copy_from_user
+Subject: [PATCH 079/423] Improve __copy_to_user and __copy_from_user
performance
Provide a __copy_from_user that uses memcpy. On BCM2708, use
-From 5b9146b6d47d409c98832d67447a78246e203a36 Mon Sep 17 00:00:00 2001
+From 2fd2d651ece51accc95f9f9fcb8256e7d05a26df Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 25 Jun 2015 12:16:11 +0100
-Subject: [PATCH 080/381] gpio-poweroff: Allow it to work on Raspberry Pi
+Subject: [PATCH 080/423] gpio-poweroff: Allow it to work on Raspberry Pi
The Raspberry Pi firmware manages the power-down and reboot
process. To do this it installs a pm_power_off handler, causing
-From f50f0fbeb5a66ee6bd4e7bc4b911bd46fc76804c Mon Sep 17 00:00:00 2001
+From 2cba4b03311a1d55f96d6e759ffb234f67d02080 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 14 Jul 2015 10:26:09 +0100
-Subject: [PATCH 081/381] spidev: Add "spidev" compatible string to silence
+Subject: [PATCH 081/423] spidev: Add "spidev" compatible string to silence
warning
See: https://github.com/raspberrypi/linux/issues/1054
-From 89380bfcda436c4602001f09d1777957304e1c41 Mon Sep 17 00:00:00 2001
+From 48bbf5d241136bc7cf19db80aeb4b09040dde4da Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 14 Jul 2015 17:00:18 +0100
-Subject: [PATCH 082/381] scripts/dtc: Add overlay support
+Subject: [PATCH 082/423] scripts/dtc: Add overlay support
---
scripts/dtc/checks.c | 119 ++-
-From 17ec32c056210154217ea601c86a16685d58f408 Mon Sep 17 00:00:00 2001
+From cb1da07eaac82084fe16f086989d98b5590a4d61 Mon Sep 17 00:00:00 2001
From: Phil Elwell <pelwell@users.noreply.github.com>
Date: Tue, 14 Jul 2015 14:32:47 +0100
-Subject: [PATCH 083/381] mfd: Add Raspberry Pi Sense HAT core driver
+Subject: [PATCH 083/423] mfd: Add Raspberry Pi Sense HAT core driver
---
drivers/input/joystick/Kconfig | 8 +
-From c7773e6daa5df456d6e0b935321425f3cb7a55b8 Mon Sep 17 00:00:00 2001
+From 10cbc09000e1d326cff1273f92423c30f9a848a9 Mon Sep 17 00:00:00 2001
From: Jan Grulich <jan@grulich.eu>
Date: Mon, 24 Aug 2015 16:03:47 +0100
-Subject: [PATCH 084/381] RaspiDAC3 support
+Subject: [PATCH 084/423] RaspiDAC3 support
Signed-off-by: Jan Grulich <jan@grulich.eu>
-From 669d4b324d47078cffaa557b8fe7ab13ff484cbe Mon Sep 17 00:00:00 2001
+From dcfb4303fbbc327ec5f1b990d12c79384cd5a8db Mon Sep 17 00:00:00 2001
From: Jan Grulich <jan@grulich.eu>
Date: Mon, 24 Aug 2015 16:02:34 +0100
-Subject: [PATCH 085/381] tpa6130a2: Add headphone switch control
+Subject: [PATCH 085/423] tpa6130a2: Add headphone switch control
Signed-off-by: Jan Grulich <jan@grulich.eu>
---
-From 5f1f5e7db749eeaa307b0ba384e29d99b10e3290 Mon Sep 17 00:00:00 2001
+From 20bc23d5669c1a70a03db60768eb3d4b100a658f Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 28 Sep 2015 23:38:59 +0100
-Subject: [PATCH 086/381] irq-bcm2835: Fix building with 2708
+Subject: [PATCH 086/423] irq-bcm2835: Fix building with 2708
---
drivers/irqchip/irq-bcm2835.c | 3 ++-
-From bfcb98a5f383cd1cdd08156f8f7267447ab1b7cd Mon Sep 17 00:00:00 2001
+From cabbd4561f8a04b087fb867cedb002cd5170375f Mon Sep 17 00:00:00 2001
From: P33M <P33M@github.com>
Date: Wed, 21 Oct 2015 14:55:21 +0100
-Subject: [PATCH 087/381] rpi_display: add backlight driver and overlay
+Subject: [PATCH 087/423] rpi_display: add backlight driver and overlay
Add a mailbox-driven backlight controller for the Raspberry Pi DSI
touchscreen display. Requires updated GPU firmware to recognise the
-From 5bb7ea036f5dfa3e3e3e1c674cb3f06e8204743e Mon Sep 17 00:00:00 2001
+From c0af79182427336015c026314b7c35a82c24b7aa Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Mon, 16 Nov 2015 14:05:35 +0000
-Subject: [PATCH 088/381] bcm2835-dma: Fix up convert to DMA pool
+Subject: [PATCH 088/423] bcm2835-dma: Fix up convert to DMA pool
---
drivers/dma/bcm2835-dma.c | 36 ++++++++++++++++++++++++++----------
-From 5e591b39b106e20e3f8128cbd46a20d01eedb185 Mon Sep 17 00:00:00 2001
+From 644468c76c90757811b1490557d7fa1ab8e9477b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 11 Nov 2015 11:38:59 +0000
-Subject: [PATCH 089/381] scripts: Multi-platform support for mkknlimg and
+Subject: [PATCH 089/423] scripts: Multi-platform support for mkknlimg and
knlinfo
The firmware uses tags in the kernel trailer to choose which dtb file
-From d6b537db6d9208d3d512aac65d03a47913787576 Mon Sep 17 00:00:00 2001
+From b2366bf5c6c6c13d7d3b0e7099c6e71f4f775df6 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 2 Mar 2015 13:01:12 -0800
-Subject: [PATCH 090/381] drm/vc4: Add suport for 3D rendering using the V3D
+Subject: [PATCH 090/423] drm/vc4: Add suport for 3D rendering using the V3D
engine.
This is a squash of the out-of-tree development series. Since that
-From 92de07785e3ece5672448a5efa7b3b45957059f6 Mon Sep 17 00:00:00 2001
+From ffe4a5fe0c4dfb0c58193b6ff2e5e7eb37b350ad Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 14 Oct 2015 11:32:14 -0700
-Subject: [PATCH 091/381] drm/vc4: Force HDMI to connected.
+Subject: [PATCH 091/423] drm/vc4: Force HDMI to connected.
For some reason on the downstream tree, the HPD GPIO isn't working.
-From 9d9f602905f1d7de7b0d93d8293ed144f7af0e21 Mon Sep 17 00:00:00 2001
+From ac56795420156559b5381fbf4ad1f607baca2935 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:23:18 -0700
-Subject: [PATCH 092/381] drm/vc4: bo cache locking fixes.
+Subject: [PATCH 092/423] drm/vc4: bo cache locking fixes.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
-From 2520f46f0d6e44f5ecfa534fb5a5f1a11302c83c Mon Sep 17 00:00:00 2001
+From 0ff2836cb0c35edfaa40124957f5884527bd4c1e Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:29:41 -0700
-Subject: [PATCH 093/381] drm/vc4: bo cache locking cleanup.
+Subject: [PATCH 093/423] drm/vc4: bo cache locking cleanup.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
-From e7530cfb655bb473d5c99e27bb44a15f1c921441 Mon Sep 17 00:00:00 2001
+From 616e0a78750f2c92c52ac7f6638a8f5a901afdaf Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:32:24 -0700
-Subject: [PATCH 094/381] drm/vc4: Use job_lock to protect seqno_cb_list.
+Subject: [PATCH 094/423] drm/vc4: Use job_lock to protect seqno_cb_list.
We're (mostly) not supposed to be using struct_mutex in drivers these
days.
-From e619bff96bd0dab8ecf1c8df64ce3d605784fa57 Mon Sep 17 00:00:00 2001
+From c554ca947004989217c25487dfadedd633928dc3 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:44:35 -0700
-Subject: [PATCH 095/381] drm/vc4: Drop struct_mutex around CL validation.
+Subject: [PATCH 095/423] drm/vc4: Drop struct_mutex around CL validation.
We were using it so that we could make sure that shader validation
state didn't change while we were validating, but now shader
-From 4b137e2962b14c62089f4368391fa1ed03cac391 Mon Sep 17 00:00:00 2001
+From c43a9027e42856592c071e5bbc7e38e8f236ce51 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:44:35 -0700
-Subject: [PATCH 096/381] drm/vc4: Drop struct_mutex around CL validation.
+Subject: [PATCH 096/423] drm/vc4: Drop struct_mutex around CL validation.
We were using it so that we could make sure that shader validation
state didn't change while we were validating, but now shader
-From 7a94e7c745428eb542ebbfe6370ae138ad76be4c Mon Sep 17 00:00:00 2001
+From ea5d1ac38aba536dcd088cbf8eae229e4651ccbd Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 20 Oct 2015 13:59:15 +0100
-Subject: [PATCH 097/381] drm/vc4: Add support for more display plane formats.
+Subject: [PATCH 097/423] drm/vc4: Add support for more display plane formats.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
-From c3634a10a0b792baedf12691a83598c89976830c Mon Sep 17 00:00:00 2001
+From 910b5fa15403115a76d5ee2a4f7932b051454e9c Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 23 Oct 2015 12:31:56 +0100
-Subject: [PATCH 098/381] drm/vc4: No need to stop the stopped threads.
+Subject: [PATCH 098/423] drm/vc4: No need to stop the stopped threads.
This was leftover debug code from the hackdriver. We never submit
unless the thread is already idle.
-From f57845691b2419259210ddc7c18fd54240199567 Mon Sep 17 00:00:00 2001
+From bc2764818666e6b24c4dc41e65a472a3fd0bdd74 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 23 Oct 2015 12:33:43 +0100
-Subject: [PATCH 099/381] drm/vc4: Remove extra barrier()s aroudn CTnCA/CTnEA
+Subject: [PATCH 099/423] drm/vc4: Remove extra barrier()s aroudn CTnCA/CTnEA
setup.
The writel() that these expand to already does barriers.
-From b750beb58d214d6a5ed458eb5b2e7a304685a587 Mon Sep 17 00:00:00 2001
+From b474d69ad1b4e5032c565868082e36f64854106e Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 23 Oct 2015 14:57:22 +0100
-Subject: [PATCH 100/381] drm/vc4: Fix a typo in a V3D debug register.
+Subject: [PATCH 100/423] drm/vc4: Fix a typo in a V3D debug register.
Signed-off-by: Eric Anholt <eric@anholt.net>
---
-From 932891dd324ddfc1f8dc2e064a3504f3e120f874 Mon Sep 17 00:00:00 2001
+From 29e3799c22dba7bb579a8caacc957f888965b2dc Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 2 Nov 2015 17:07:33 +0000
-Subject: [PATCH 101/381] drm/vc4: Enable VC4 modules, and increase CMA size
+Subject: [PATCH 101/423] drm/vc4: Enable VC4 modules, and increase CMA size
with overlay
If using the overlay, be careful not to boot to GUI or run startx,
-From bdbaa2432c1a111c5a2fd492bb1751e4a355b16d Mon Sep 17 00:00:00 2001
+From 9727788fde8cab56ee1f6957aa6a0d369401dfbb Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Nov 2015 18:29:58 +0000
-Subject: [PATCH 102/381] squash: fixups
+Subject: [PATCH 102/423] squash: fixups
---
drivers/gpu/drm/vc4/Kconfig | 2 +-
-From b72cb75fa858d098d497ed5404b06f1603015ce9 Mon Sep 17 00:00:00 2001
+From aefe0ee79893899fcbbaeac2c1ea27828d5b9645 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Nov 2015 20:26:03 +0000
-Subject: [PATCH 103/381] squash: add missing vc4-kms-v3d-overlay.dtb to
+Subject: [PATCH 103/423] squash: add missing vc4-kms-v3d-overlay.dtb to
makefile
---
-From df922ac1dfc712933c25f68d31107d96cde7c549 Mon Sep 17 00:00:00 2001
+From 02f9b12f8c9335eb9312bbde0f2a06ae52d35191 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 12 Oct 2015 11:23:34 -0700
-Subject: [PATCH 104/381] clk: bcm2835: Also build the driver for downstream
+Subject: [PATCH 104/423] clk: bcm2835: Also build the driver for downstream
kernels.
Signed-off-by: Eric Anholt <eric@anholt.net>
-From 95a5908e69f5b3040ee0eedb2a3aceac662464ae Mon Sep 17 00:00:00 2001
+From 9bf65a0b3903fdd475b8c6a59426c415ecdf3ec3 Mon Sep 17 00:00:00 2001
From: Holger Steinhaus <hsteinhaus@gmx.de>
Date: Sat, 14 Nov 2015 18:37:43 +0100
-Subject: [PATCH 105/381] dts: Added overlay for gpio_ir_recv driver
+Subject: [PATCH 105/423] dts: Added overlay for gpio_ir_recv driver
---
arch/arm/boot/dts/overlays/Makefile | 1 +
-From 75803fb0ecf8fcb8e2803feb8ee4b8e3d274c835 Mon Sep 17 00:00:00 2001
+From 377a971a6d66cd45f011daeb17eaf6cbba59f54c Mon Sep 17 00:00:00 2001
From: Alistair Buxton <a.j.buxton@gmail.com>
Date: Sun, 1 Nov 2015 22:27:56 +0000
-Subject: [PATCH 106/381] Build i2c_gpio module and add a device tree overlay
+Subject: [PATCH 106/423] Build i2c_gpio module and add a device tree overlay
to configure it.
---
-From 2f5387400fcd2aff2120e945dc0b8050c5ae5dbf Mon Sep 17 00:00:00 2001
+From 40fb51ca3709e962289b659216d5fa29758b5044 Mon Sep 17 00:00:00 2001
From: mwilliams03 <mark.mwilliams@gmail.com>
Date: Sun, 18 Oct 2015 17:07:24 -0700
-Subject: [PATCH 107/381] New overlay for PiScreen2r
+Subject: [PATCH 107/423] New overlay for PiScreen2r
---
arch/arm/boot/dts/overlays/Makefile | 1 +
-From 56cec891d108d33915dd835fa83844f7653ef4dd Mon Sep 17 00:00:00 2001
+From 413f3dadca77a06ea8f0ed1f83a2adc99cdc1fe0 Mon Sep 17 00:00:00 2001
From: Ondrej Wisniewski <ondrej.wisniewski@gmail.com>
Date: Fri, 6 Nov 2015 15:01:28 +0100
-Subject: [PATCH 108/381] dts: Added overlay for Adafruit PiTFT 2.8" capacitive
+Subject: [PATCH 108/423] dts: Added overlay for Adafruit PiTFT 2.8" capacitive
touch screen
---
-From df78c185490e8f728cd0a2a61ae20ab489075bf2 Mon Sep 17 00:00:00 2001
+From 03155cfced4c9bf25f22f125aeeb820ca4d08e64 Mon Sep 17 00:00:00 2001
From: Stuart MacLean <stuart@hifiberry.com>
Date: Fri, 2 Oct 2015 15:12:59 +0100
-Subject: [PATCH 109/381] Add support for the HiFiBerry DAC+ Pro.
+Subject: [PATCH 109/423] Add support for the HiFiBerry DAC+ Pro.
The HiFiBerry DAC+ and DAC+ Pro products both use the existing bcm sound driver with the DAC+ Pro having a special clock device driver representing the two high precision oscillators.
-From 7a9f95c67cbfc0975e1109b904ad03e061fb6877 Mon Sep 17 00:00:00 2001
+From 787c2642cbfe90d0ea548926f3eab12bc5d3e378 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 5 Oct 2015 10:47:45 +0100
-Subject: [PATCH 110/381] BCM270X_DT: Add at86rf233 overlay
+Subject: [PATCH 110/423] BCM270X_DT: Add at86rf233 overlay
Add an overlay to support the Atmel AT86RF233 WPAN transceiver on spi0.0.
-From c9d6f1cb070a832bd49f381dbcc2b7e03c325a6a Mon Sep 17 00:00:00 2001
+From 2da545ccd7f9bada3a8afe11c735f772a1907acc Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 18 Dec 2014 16:07:15 -0800
-Subject: [PATCH 111/381] mm: Remove the PFN busy warning
+Subject: [PATCH 111/423] mm: Remove the PFN busy warning
See commit dae803e165a11bc88ca8dbc07a11077caf97bbcb -- the warning is
expected sometimes when using CMA. However, that commit still spams
-From 51c3910db1015b46ce2a3973cf10ba8e61514821 Mon Sep 17 00:00:00 2001
+From 1936051dc9366b134607f626e92a6c58f3a645e6 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 19 Nov 2014 12:06:38 -0800
-Subject: [PATCH 112/381] drm: Put an optional field in the driver struct for
+Subject: [PATCH 112/423] drm: Put an optional field in the driver struct for
GEM obj struct size.
This allows a driver to derive from the CMA object without copying all
-From 04b14cd6be101594b46fedf0b5a50734ef55af1e Mon Sep 17 00:00:00 2001
+From 513851ff3c5601e7ebcbc0d22df31a0c8ef141e6 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 30 Oct 2015 10:09:02 -0700
-Subject: [PATCH 113/381] drm/vc4: Add an interface for capturing the GPU state
+Subject: [PATCH 113/423] drm/vc4: Add an interface for capturing the GPU state
after a hang.
This can be parsed with vc4-gpu-tools tools for trying to figure out
-From 75f8451653673c272e11dea1c49522424a6b748c Mon Sep 17 00:00:00 2001
+From 20619faf6bc00265bb70b0ef189a1f8618f3e508 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 4 Dec 2015 11:35:34 -0800
-Subject: [PATCH 114/381] drm/vc4: Update a bunch of code to match upstream
+Subject: [PATCH 114/423] drm/vc4: Update a bunch of code to match upstream
submission.
This gets almost everything matching, except for the MSAA support and
-From 3f01cb691c249a57394e64523ba979aaf181f999 Mon Sep 17 00:00:00 2001
+From ea38a9fb0b8312167361ea9957b4f7a3233492aa Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 11 Dec 2015 19:45:03 -0800
-Subject: [PATCH 115/381] drm: Use the driver's gem_object_free function from
+Subject: [PATCH 115/423] drm: Use the driver's gem_object_free function from
CMA helpers.
VC4 wraps the CMA objects in its own structures, so it needs to do its
-From 5405b6f75f7021db041e2dd0bb8720baf6d3122b Mon Sep 17 00:00:00 2001
+From 37a1421ea161a9da980cae4ff81a3fb5521d5090 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 17 Jul 2015 13:15:50 -0700
-Subject: [PATCH 116/381] drm/vc4: Add support for MSAA rendering.
+Subject: [PATCH 116/423] drm/vc4: Add support for MSAA rendering.
For MSAA, you set a bit in the binner that halves the size of tiles in
each direction, so you can pack 4 samples per pixel in the tile
-From 95ef989ba2f3a5e10c742a3f6ed88e16a9f11e56 Mon Sep 17 00:00:00 2001
+From a7d3659d3eefde8fc449f0ca33584a9490165d15 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 8 Dec 2015 14:00:43 -0800
-Subject: [PATCH 117/381] drm/vc4: A few more non-functional changes to sync to
+Subject: [PATCH 117/423] drm/vc4: A few more non-functional changes to sync to
upstream.
At this point all that's left is the force-enable of HDMI connector,
-From dc02b5bdc0f962c1c9da85d98c11612e858280b3 Mon Sep 17 00:00:00 2001
+From d3e66a857abb05fe9eb367e0a8160584ec1db1a7 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 15 Dec 2015 23:46:32 +0000
-Subject: [PATCH 118/381] drm/vc4: Use "hpd-gpios" for HDMI GPIO, like what
+Subject: [PATCH 118/423] drm/vc4: Use "hpd-gpios" for HDMI GPIO, like what
landed upstream.
Signed-off-by: Eric Anholt <eric@anholt.net>
-From 2181b6ab6f7cddcd5ca908007a14fde90cc8d2b1 Mon Sep 17 00:00:00 2001
+From 10caa2cc688e4837723da80f010e89a79e040c26 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 7 Dec 2015 12:35:01 -0800
-Subject: [PATCH 119/381] drm/vc4: Synchronize validation code for v2
+Subject: [PATCH 119/423] drm/vc4: Synchronize validation code for v2
submission upstream.
Signed-off-by: Eric Anholt <eric@anholt.net>
-From f507706440ee0505e7533660f19781ea279355b0 Mon Sep 17 00:00:00 2001
+From f6d5c3deefad3bf030e1410afeac8f562ed7be4d Mon Sep 17 00:00:00 2001
From: janluca <janluca@zedat.fu-berlin.de>
Date: Sun, 27 Dec 2015 14:34:04 +0100
-Subject: [PATCH 120/381] MMC: Do not use mmc_debug if CONFIG_MMC_BCM2835 is
+Subject: [PATCH 120/423] MMC: Do not use mmc_debug if CONFIG_MMC_BCM2835 is
not set
If CONFIG_MMC_BCM2835 was not set the compiling of the kernel failed
-From 7d0e8dc92007a9ad6193e8cda7d954e78e6556ee Mon Sep 17 00:00:00 2001
+From 4baa30f9ca6367b354e98536f838d0b60499a51e Mon Sep 17 00:00:00 2001
From: Devon Fyson <devonfyson@gmail.com>
Date: Wed, 30 Dec 2015 16:40:47 -0500
-Subject: [PATCH 121/381] Extend clock timeout, fix modprobe baudrate
+Subject: [PATCH 121/423] Extend clock timeout, fix modprobe baudrate
parameter.
Set the BSC_CLKT clock streching timeout to 35ms as per SMBus specs.\n- Increase priority of baudrate parameter passed to modprobe (in /etc/modprobe.d/*.conf or command line). Currently custom baudrates don't work because they are overridden by clock-frequency in the platform_device passed to the function.
-From 7883c7188ab1259b74c2442690fedf3d71c534fb Mon Sep 17 00:00:00 2001
+From 0af77632d0318f69474e46a0473e64854562842c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Thu, 31 Dec 2015 16:44:58 +0100
-Subject: [PATCH 122/381] bcm270x_dt: Add dwc2 and dwc-otg overlays
+Subject: [PATCH 122/423] bcm270x_dt: Add dwc2 and dwc-otg overlays
---
arch/arm/boot/dts/overlays/Makefile | 2 ++
-From e1d87aa570e5a036160f35d7b95f6a2c10f96bed Mon Sep 17 00:00:00 2001
+From 2d13c12edb132e32ab3e500cd1f783cc7bba84ac Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Jan 2016 14:42:17 +0000
-Subject: [PATCH 123/381] BCM270X_DT: Add the sdtweak overlay, for tuning
+Subject: [PATCH 123/423] BCM270X_DT: Add the sdtweak overlay, for tuning
sdhost
The sdhost overlay declares the sdhost interface and allows parameters
-From a41f23a2a756f274f1ddc67d6cccc36fa4624f88 Mon Sep 17 00:00:00 2001
+From a49c5fc29582017da47598db437cf253e7620e7e Mon Sep 17 00:00:00 2001
From: Andrew Litt <ajlitt@splunge.net>
Date: Mon, 11 Jan 2016 07:54:21 +0000
-Subject: [PATCH 124/381] bcm2835-mmc: Don't override bus width capabilities
+Subject: [PATCH 124/423] bcm2835-mmc: Don't override bus width capabilities
from devicetree
Take out the force setting of the MMC_CAP_4_BIT_DATA host capability
-From 4ea24183d081b6bf9d6a89de906543719b82ed54 Mon Sep 17 00:00:00 2001
+From c7f6e0ebbdbff464b2eaad598adb9e592e7e5a21 Mon Sep 17 00:00:00 2001
From: Andrew Litt <ajlitt@splunge.net>
Date: Mon, 11 Jan 2016 07:55:54 +0000
-Subject: [PATCH 125/381] SDIO-overlay: add bus_width parameter
+Subject: [PATCH 125/423] SDIO-overlay: add bus_width parameter
Allow setting of the SDIO bus width capability of the bcm2835-mmc
host. This is helpful when only a 1 bit wide bus is connected
-From 807249934e7f9453ba64a5724daecf9f61f42e07 Mon Sep 17 00:00:00 2001
+From 05c2e0a07f9b7f7f348f05f127871be618b66ad8 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:41:45 +0100
-Subject: [PATCH 126/381] bcm2835: extend allowed range of channels and
+Subject: [PATCH 126/423] bcm2835: extend allowed range of channels and
samplerates
Allow everything the videocore accepts.
-From 8148bc7d4147c2197d13425686a56b7c40c78157 Mon Sep 17 00:00:00 2001
+From eeb06bfcdcc321f270753d6ba822c9212c49db00 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:42:18 +0100
-Subject: [PATCH 127/381] bcm2835: restrict channels*rate to 8*960000
+Subject: [PATCH 127/423] bcm2835: restrict channels*rate to 8*960000
This is required at least for SPDIF. If the bitrate goes above,
videocore will either resample the audio or corrupt it due to
-From cd33640409eb73b99703273192971e0ea874652f Mon Sep 17 00:00:00 2001
+From 74e3804dcc18b79f64c2f9d36e5481277ee2f7eb Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:42:48 +0100
-Subject: [PATCH 128/381] rpi: update vc_vchi_audioserv_defs.h
+Subject: [PATCH 128/423] rpi: update vc_vchi_audioserv_defs.h
Add audioserv 3 extensions. The changes were taken from the paste
linked here:
-From a6dd2b7d0cf90158755da4949006feebde8c9fe5 Mon Sep 17 00:00:00 2001
+From 134223185c5da1678106310a2ca98146d8d80c49 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:43:12 +0100
-Subject: [PATCH 129/381] bcm2835: implement channel map API
+Subject: [PATCH 129/423] bcm2835: implement channel map API
Report all layouts supported by the HDMI protocol to userspace.
Make the videocore set the correct layout according to the
-From 16a8daf3e66584f5c1bd3b113675d3fc3b44adc1 Mon Sep 17 00:00:00 2001
+From 8aa6bca1b7f62cc2b953d6384138bb262dc16434 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:43:35 +0100
-Subject: [PATCH 130/381] bcm2835: access controls under the audio mutex
+Subject: [PATCH 130/423] bcm2835: access controls under the audio mutex
I don't think the ALSA framework provides any kind of automatic
synchronization within the control callbacks. We most likely need
-From b5a3fcac12091441ee4d692ad90b7cb7afe7c83d Mon Sep 17 00:00:00 2001
+From bbbdf3afb567a7bded1b606d34ba6d97cbf1fb0a Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:44:03 +0100
-Subject: [PATCH 131/381] bcm2835: always use 2/4/8 channels for multichannel
+Subject: [PATCH 131/423] bcm2835: always use 2/4/8 channels for multichannel
layouts
Pad the unused channels with NA. This means userspace needs to write
-From 1a2d7c95e3ee81f352345ecf1f65944739c7cf53 Mon Sep 17 00:00:00 2001
+From 9e26f4ac9231419f7dcc0f793fb2d1f17748eae9 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:44:24 +0100
-Subject: [PATCH 132/381] bcm2835: only allow stereo if analogue jack is
+Subject: [PATCH 132/423] bcm2835: only allow stereo if analogue jack is
selected
Sending more than 2 channels to videocore while outputting to analogue
-From dffcc96ee1cf290f59191c715076c866e6019c17 Mon Sep 17 00:00:00 2001
+From 44ea54f0017696e00153c389a274b97938f093e9 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:44:47 +0100
-Subject: [PATCH 133/381] bcm2835: interpolate audio delay
+Subject: [PATCH 133/423] bcm2835: interpolate audio delay
It appears the GPU only sends us a message all 10ms to update
the playback progress. Other than this, the playback position
-From 3162c03da716f865fb9b766c8bd7d1dac0386f88 Mon Sep 17 00:00:00 2001
+From 58389f0ac10212334f0146ca72a4ef364e8c15df Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 19 Jan 2016 17:16:38 +0000
-Subject: [PATCH 134/381] bcm2835-sdhost: Add workaround for odd behaviour on
+Subject: [PATCH 134/423] bcm2835-sdhost: Add workaround for odd behaviour on
some cards
For reasons not understood, the sdhost driver fails when reading
-From 594abef9e9d240d6f97a22e8f6cdc6cf0c272cd7 Mon Sep 17 00:00:00 2001
+From 2b579856474546abebe0a3e38899893bbd7345c2 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 22 Jan 2016 16:03:24 +0000
-Subject: [PATCH 135/381] bcm2835-sdhost: Add debug_flags dtparam
+Subject: [PATCH 135/423] bcm2835-sdhost: Add debug_flags dtparam
Bit zero disables the single-read-sectors map:
-From 263629c941a7da06b8cce7f73fe8d8d20d1357b7 Mon Sep 17 00:00:00 2001
+From b02faf882ad1216f89a12391f1499e7c47dbbb13 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 25 Jan 2016 09:12:06 +0000
-Subject: [PATCH 136/381] BCM270X_DT: Add sdio_overclock parameter to sdio
+Subject: [PATCH 136/423] BCM270X_DT: Add sdio_overclock parameter to sdio
overlay
The sdio_overclock parameter is like the overclock_50 parameter, i.e.
-From c762fb624a6a4d3228fcd2f26bbbb19af44d000c Mon Sep 17 00:00:00 2001
+From a74004694a521e40b57db19b761265759d4279e2 Mon Sep 17 00:00:00 2001
From: Michael Lange <linuxstuff@milaw.biz>
Date: Thu, 21 Jan 2016 18:10:16 +0100
-Subject: [PATCH 137/381] rtc: ds1307: add support for the DT property
+Subject: [PATCH 137/423] rtc: ds1307: add support for the DT property
'wakeup-source'
For RTC chips with no IRQ directly connected to the SoC, the RTC chip
-From 44c996c04b54ff4babbfb9432b3d82cb009e5d8c Mon Sep 17 00:00:00 2001
+From 8f9769d2ca0c6743ccaac0f5a43e8a690aaec3c1 Mon Sep 17 00:00:00 2001
From: vitalogy <vitalogy_github@milaw.biz>
Date: Tue, 19 Jan 2016 07:02:02 +0100
-Subject: [PATCH 138/381] dt-overlay: add wittypi-overlay.dts
+Subject: [PATCH 138/423] dt-overlay: add wittypi-overlay.dts
---
arch/arm/boot/dts/overlays/wittypi-overlay.dts | 44 ++++++++++++++++++++++++++
-From 2df3762d6b10aab005679b549ccb656577d788fc Mon Sep 17 00:00:00 2001
+From cdc262a3377780a97c4bf2054d55ec8752d80e89 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 19 Jan 2016 16:28:05 +0000
-Subject: [PATCH 139/381] FIXUP i2c_bcm2708: Don't change module baudrate
+Subject: [PATCH 139/423] FIXUP i2c_bcm2708: Don't change module baudrate
parameter
Overwriting the baudrate module parameter creates an apparent
-From 3bb2e01fd397f375e54f6fe8a33af25aef1c981f Mon Sep 17 00:00:00 2001
+From ccbc06892764dda07be0a17c8541f3dc18de97c6 Mon Sep 17 00:00:00 2001
From: Digital Dreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 4 Feb 2016 14:14:44 +0000
-Subject: [PATCH 140/381] Allow up to 24dB digital gain to be applied when
+Subject: [PATCH 140/423] Allow up to 24dB digital gain to be applied when
using IQAudIO DAC+
24db_digital_gain DT param can be used to specify that PCM512x
-From 6e6173c6faef9a7188ea8d397e339ca5881a6f3a Mon Sep 17 00:00:00 2001
+From 427a1c87dc8100722e3a8c7476573fe3715f5b5a Mon Sep 17 00:00:00 2001
From: Digital Dreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 4 Feb 2016 20:04:00 +0000
-Subject: [PATCH 141/381] Limit PCM512x "Digital" gain to 0dB by default with
+Subject: [PATCH 141/423] Limit PCM512x "Digital" gain to 0dB by default with
HiFiBerry DAC+
24db_digital_gain DT param can be used to specify that PCM512x
-From 6f043ba868aaad8a5c7a802baafbba4e43f787e0 Mon Sep 17 00:00:00 2001
+From 305469eecd74e0c7e78b1646dfbc3bdd498b341e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 8 Feb 2016 09:46:33 +0000
-Subject: [PATCH 142/381] BCM270X_DT: Adjust overlay README formatting
+Subject: [PATCH 142/423] BCM270X_DT: Adjust overlay README formatting
---
arch/arm/boot/dts/overlays/README | 414 +++++++++++++++++++-------------------
-From 6e7c35ac419f74f7edbbc5a09aaa2b4c75b63133 Mon Sep 17 00:00:00 2001
+From 8fcc1b75df2cfc5e75b36ab6cf62232291b47df1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 11 Feb 2016 16:51:01 +0000
-Subject: [PATCH 143/381] bcm2835-sdhost: Major revision
+Subject: [PATCH 143/423] bcm2835-sdhost: Major revision
This is a significant revision of the bcm2835-sdhost driver. It
improves on the original in a number of ways:
-From 6b9beded9c5f2c6d834a51e64cca92fafbc65fbf Mon Sep 17 00:00:00 2001
+From 367af45e7a38258b1198af604070cc09198b1a61 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 12 Feb 2016 15:38:00 +0000
-Subject: [PATCH 144/381] BCM270X_DT: Add dtparams for the SD interface
+Subject: [PATCH 144/423] BCM270X_DT: Add dtparams for the SD interface
Add new base dtparams sd_overclock, sd_force_pio, sd_pio_limit
and sd_debug.
-From f61457732dafaccb0804b0d45a4ae751e60e1db4 Mon Sep 17 00:00:00 2001
+From f9149b39714c2115a49fe806f3e5117fa2f55ec8 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 12 Feb 2016 14:50:25 +0000
-Subject: [PATCH 145/381] dcw_otg: trim xfer length when buffer larger than
+Subject: [PATCH 145/423] dcw_otg: trim xfer length when buffer larger than
allocated size is received
---
-From 681233bfac9474a1defb720fddf90a3087cd1ef4 Mon Sep 17 00:00:00 2001
+From 865b951f9bc7ce938c240eb17e829fd666a3f5eb Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 15 Feb 2016 10:00:27 +0000
-Subject: [PATCH 146/381] bcm2835-sdhost: Restore ATOMIC flag to PIO sg mapping
+Subject: [PATCH 146/423] bcm2835-sdhost: Restore ATOMIC flag to PIO sg mapping
Allocation problems have been seen in a wireless driver, and
this is the only change which might have been responsible.
-From 97c4f995a385631934b1d732271997d44fab0c87 Mon Sep 17 00:00:00 2001
+From af4e7094adf051d1cec6ebc04cfbc5d3049ce126 Mon Sep 17 00:00:00 2001
From: Craig Roberts <cjr@craigroberts.net>
Date: Tue, 16 Feb 2016 10:03:42 +0000
-Subject: [PATCH 147/381] Updated smsc95xx driver to check for a valid MAC
+Subject: [PATCH 147/423] Updated smsc95xx driver to check for a valid MAC
address in eeprom before using smsc95xx.macaddr parameter passed on command
line.
-From 585b22b783df4649751b4ce40074b77ad0cc959b Mon Sep 17 00:00:00 2001
+From f65f992c827f63ab148a991fe3599804704fa338 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Feb 2016 19:02:31 +0000
-Subject: [PATCH 148/381] dcw_otg: Make trimming messages less noisy
+Subject: [PATCH 148/423] dcw_otg: Make trimming messages less noisy
---
drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 6 ++++--
-From 71f287127dd0aafa0346f198c5eef0c4aac7a5f6 Mon Sep 17 00:00:00 2001
+From dbf8f761e366f4c93e8c2c2a1558561faa762f9f Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 18 Feb 2016 15:28:14 +0000
-Subject: [PATCH 149/381] BCM270X_DT: at86rf233 overlay - drop to 3MHz
+Subject: [PATCH 149/423] BCM270X_DT: at86rf233 overlay - drop to 3MHz
The consensus is that 6MHz is too fast, but that 3MHz is OK.
-From 217ac339f2d1d1d87a706a40746b565b2605c3e9 Mon Sep 17 00:00:00 2001
+From c7dc70d85fa909f1ffb7b490f93b56cabf0b155f Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 19 Feb 2016 12:04:48 +0000
-Subject: [PATCH 150/381] bcm2835-sdhost: Downgrade log message status
+Subject: [PATCH 150/423] bcm2835-sdhost: Downgrade log message status
---
drivers/mmc/host/bcm2835-sdhost.c | 4 ++--
-From 87e7ae7002a6d1c8ca60c6081d4c2763940f6bef Mon Sep 17 00:00:00 2001
+From 6c1cfd3b278d6f0656f33646392c81f41b2dc5ac Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 15 Jan 2016 16:48:27 +0000
-Subject: [PATCH 151/381] config: Enable HCI over UARTs
+Subject: [PATCH 151/423] config: Enable HCI over UARTs
---
arch/arm/configs/bcm2709_defconfig | 3 +++
-From e5be45c39298a4e3a26bafd04f6fb2f88473465c Mon Sep 17 00:00:00 2001
+From f736186a0650f05ba00fa51957b25d6486ea3358 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 17 Dec 2015 13:37:07 +0000
-Subject: [PATCH 152/381] hci_h5: Don't send conf_req when ACTIVE
+Subject: [PATCH 152/423] hci_h5: Don't send conf_req when ACTIVE
Without this patch, a modem and kernel can continuously bombard each
other with conf_req and conf_rsp messages, in a demented game of tag.
-From 7ade9aef124764cdb6b6d6bb2526f2507891bb36 Mon Sep 17 00:00:00 2001
+From 36b4312e6c109ead13feef44315fa73d1e1fa9f0 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 23 Feb 2016 17:26:48 +0000
-Subject: [PATCH 153/381] amba_pl011: Don't use DT aliases for numbering
+Subject: [PATCH 153/423] amba_pl011: Don't use DT aliases for numbering
The pl011 driver looks for DT aliases of the form "serial<n>",
and if found uses <n> as the device ID. This can cause
-From 78261b39857302418614c11e59bdc5626c147dcd Mon Sep 17 00:00:00 2001
+From 36dba68f842fac976afdd4487958d014ffdb130d Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 15 Dec 2015 15:35:57 -0800
-Subject: [PATCH 154/381] clk: bcm2835: Add bindings for the auxiliary
+Subject: [PATCH 154/423] clk: bcm2835: Add bindings for the auxiliary
peripheral clock gates.
These will be used for enabling UART1, SPI1, and SPI2.
-From 9ff5452cee4edcadc86554d29a07e9e2ea8cf36c Mon Sep 17 00:00:00 2001
+From 308d421f734ecdf5664603b87d2b327c2f46f810 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 15 Dec 2015 15:35:58 -0800
-Subject: [PATCH 155/381] clk: bcm2835: Add a driver for the auxiliary
+Subject: [PATCH 155/423] clk: bcm2835: Add a driver for the auxiliary
peripheral clock gates.
There are a pair of SPI masters and a mini UART that were last minute
-From 67fd5e9a91ad7abeb3ebfa30753c375e0953b52e Mon Sep 17 00:00:00 2001
+From 70fb111800b9bb01e4c95ea9e351cb15748f692f Mon Sep 17 00:00:00 2001
From: Fraser <github@frasersdev.net>
Date: Tue, 23 Feb 2016 10:04:37 +1100
-Subject: [PATCH 156/381] Aux SPI 1&2 implementation
+Subject: [PATCH 156/423] Aux SPI 1&2 implementation
Adds aux spi 1 & 2 devices to compatible raspberry PIs.
* Minor config of the driver build environment to ensure they get built
-From 0686b6a8e6a6bd951ef2a11228e976fde45749af Mon Sep 17 00:00:00 2001
+From 5590ca50d54491e5fc3f273f03198a1b08fd88cc Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Tue, 23 Feb 2016 17:28:23 +0100
-Subject: [PATCH 157/381] ASoC: bcm: add missing .owner fields in sound card
+Subject: [PATCH 157/423] ASoC: bcm: add missing .owner fields in sound card
drivers
If snd_soc_card.owner is not set the kernel won't do usage refcounting
-From 43203ed1c397e88a087ef6d4cf79de24a89e1fef Mon Sep 17 00:00:00 2001
+From 10a0c1a532cb7800e2eb56ac6e38dedbaf262ce5 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 20 Jan 2016 17:50:09 +0000
-Subject: [PATCH 158/381] smsx95xx: Add option to disable the crimes against
+Subject: [PATCH 158/423] smsx95xx: Add option to disable the crimes against
truesize fix
It may improve iperf numbers on Pi 1, but may generate dmesg warnings and possibly cause network issues
-From 79ea239874848e67d42b9274d4f7eeb51892ccd8 Mon Sep 17 00:00:00 2001
+From e08489bbbba7a911dc99495e152c4366ed646db8 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 23 Feb 2016 19:56:04 +0000
-Subject: [PATCH 159/381] bcm2835-virtgpio: Virtual GPIO driver
+Subject: [PATCH 159/423] bcm2835-virtgpio: Virtual GPIO driver
Add a virtual GPIO driver that uses the firmware mailbox interface to
request that the VPU toggles LEDs.
-From 195869e0239b2c28fc7f289ea94295ca57fb51a8 Mon Sep 17 00:00:00 2001
+From 5985096850e6608704489e7c7936d885fb3a3507 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 21 Jan 2016 17:57:49 +0000
-Subject: [PATCH 160/381] BCM270X_DT: Add Pi3 support
+Subject: [PATCH 160/423] BCM270X_DT: Add Pi3 support
---
arch/arm/boot/dts/Makefile | 1 +
-From e4fc78fecfc8cf3cf04b252d0822b2ebd149c031 Mon Sep 17 00:00:00 2001
+From f2f877b174c8dc15f77cbaea553edf21c74d525c Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Mon, 8 Feb 2016 23:49:41 +0000
-Subject: [PATCH 161/381] DT: Add overlays to configure I2C pins
+Subject: [PATCH 161/423] DT: Add overlays to configure I2C pins
Lifted from
https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=120938&p=825883
-From bece84be8a851aca4baff1b63a8a2c92866754d5 Mon Sep 17 00:00:00 2001
+From c2132fecb5584da2653ce99ebbfb382673489e94 Mon Sep 17 00:00:00 2001
From: Dhiraj Goel <dhiraj.goel@gmail.com>
Date: Thu, 3 Mar 2016 21:10:50 -0800
-Subject: [PATCH 162/381] bcm2835-camera: fix a bug in computation of frame
+Subject: [PATCH 162/423] bcm2835-camera: fix a bug in computation of frame
timestamp
Fixes #1318
-From 12cde6a9a34f49c31e2f1689b53cd40a165b35d9 Mon Sep 17 00:00:00 2001
+From a8b3a8c0c610b29be2d685548a1b21269b651b33 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 2 Mar 2016 10:59:05 +0000
-Subject: [PATCH 163/381] BCM270X_DT: Add pi3-disable-bt overlay
+Subject: [PATCH 163/423] BCM270X_DT: Add pi3-disable-bt overlay
Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15. To disable
the systemd service that initialises the modem so it doesn't use the UART:
-From e75384cf32c8941478f24ce4e4cdd7baff047c75 Mon Sep 17 00:00:00 2001
+From 8a2725220ebcc2207c979e2c816a911aa20fa3f3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 09:53:03 +0000
-Subject: [PATCH 164/381] BCM270X_DT: Add pi3-miniuart-bt DT overlay
+Subject: [PATCH 164/423] BCM270X_DT: Add pi3-miniuart-bt DT overlay
Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
-From dcaae71fc22f563f5c918cb4b344992107c0c6bd Mon Sep 17 00:00:00 2001
+From bcd71e5dd7b7f9ad1a5b7b77edc3350feede7bfb Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 13:38:39 +0000
-Subject: [PATCH 165/381] Pi3 DT: Add dtparams for the SD interface
+Subject: [PATCH 165/423] Pi3 DT: Add dtparams for the SD interface
Add new base dtparams sd_overclock, sd_force_pio, sd_pio_limit
and sd_debug. These were missed out of the initial Pi3 DTB.
-From 21fd9cca44f4400b7c157e4698adb4134b3b9652 Mon Sep 17 00:00:00 2001
+From 0b72e9bbaf15534b6437d6377a20870125bfcb06 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 15:05:11 +0000
-Subject: [PATCH 166/381] vchiq_arm: Tweak the logging output
+Subject: [PATCH 166/423] vchiq_arm: Tweak the logging output
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From f76d188586952fcd3b55916f30c484c62c8fabab Mon Sep 17 00:00:00 2001
+From 71804345eb4c8408fb50b0f15b750915776a20ad Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 16:46:39 +0000
-Subject: [PATCH 167/381] bcm2835-sdhost: Only claim one DMA channel
+Subject: [PATCH 167/423] bcm2835-sdhost: Only claim one DMA channel
With both MMC controllers enabled there are few DMA channels left. The
bcm2835-sdhost driver only uses DMA in one direction at a time, so it
-From a42056ad2e3f74569611dd4f15ca698ccd9d7bea Mon Sep 17 00:00:00 2001
+From c9c0bca2cf5a88e1bbfe1c0ebfc190e3f9c80bef Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 8 Mar 2016 09:49:16 +0000
-Subject: [PATCH 168/381] bcm2835-mmc: Only claim one DMA channel
+Subject: [PATCH 168/423] bcm2835-mmc: Only claim one DMA channel
With both MMC controllers enabled there are few DMA channels left. The
bcm2835-mmc driver only uses DMA in one direction at a time, so it
-From 6389bb210e68fe23e15260205b35c57f864b7c88 Mon Sep 17 00:00:00 2001
+From 3ca8b2725059ac5f0255f6304777af2b3f6d8d38 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 8 Mar 2016 17:08:39 +0000
-Subject: [PATCH 169/381] config: rebuild with savedefconfig
+Subject: [PATCH 169/423] config: rebuild with savedefconfig
---
arch/arm/configs/bcm2709_defconfig | 3 +--
-From a4acb6ac185494a8fcfb02bd2278a25e89fc797c Mon Sep 17 00:00:00 2001
+From 3ff0e5914f2868ff8fdbb42247e96726296bea5d Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 8 Mar 2016 17:06:33 +0000
-Subject: [PATCH 170/381] config: Add module for mcp3422 ADC
+Subject: [PATCH 170/423] config: Add module for mcp3422 ADC
---
arch/arm/configs/bcm2709_defconfig | 1 +
-From 511df9d018d5e4c253c36381139e94edb786624c Mon Sep 17 00:00:00 2001
+From 89946d941588d63fb3a84c039acb154a4441e3f0 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 8 Mar 2016 16:18:57 +0000
-Subject: [PATCH 171/381] Pi3 DT: Add pull-ups on the UART RX lines
+Subject: [PATCH 171/423] Pi3 DT: Add pull-ups on the UART RX lines
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From ba5bc2239693e23712782093d5b2aa31d9e07dff Mon Sep 17 00:00:00 2001
+From 7a33a72a9f2fd1091cd8b5f38bd9468c3fdbfdb9 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 9 Mar 2016 21:28:52 +0000
-Subject: [PATCH 173/381] BCM270X_DT: rpi-display overlay - add swapxy param
+Subject: [PATCH 173/423] BCM270X_DT: rpi-display overlay - add swapxy param
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From 4ccd91956356493bd7d84c98123d972b827be02d Mon Sep 17 00:00:00 2001
+From aa4e7d0b5d49c77ace418c07ba301fafb53c38ef Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Fri, 11 Mar 2016 11:44:35 +0000
-Subject: [PATCH 174/381] Remove I2S config from bt_pins.
+Subject: [PATCH 174/423] Remove I2S config from bt_pins.
Remove I2S config from bt_pins. Causes issues with clock alignment when I2S is
used by an external DAC via GPIO header.
-From 8534735503255814ae6fffc19e30e03ca4ccbc75 Mon Sep 17 00:00:00 2001
+From 769fa207da8b9cf5e87f67fc7a1d4644257e29da Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 10 Aug 2015 09:44:59 +0100
-Subject: [PATCH 175/381] Revert "scripts/dtc: Add overlay support"
+Subject: [PATCH 175/423] Revert "scripts/dtc: Add overlay support"
This reverts commit fa6d1755c2fdd9451077d8248e3804f0619f19b9.
---
-From 646dd14af89c2379b160d81fc54cca4d97b36416 Mon Sep 17 00:00:00 2001
+From 58d2939986c3db3d57cad899a758cf5e325072c5 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 10 Aug 2015 09:49:15 +0100
-Subject: [PATCH 176/381] scripts/dtc: Update to upstream version 1.4.1
+Subject: [PATCH 176/423] scripts/dtc: Update to upstream version 1.4.1
Includes the new localfixups format.
-From 25daa4b3566d9b695d965c48a8eae312c566c709 Mon Sep 17 00:00:00 2001
+From 4105c60fc35515eb614e54b5ca51e2da2f6e78e7 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Thu, 22 Oct 2015 23:30:04 +0300
-Subject: [PATCH 177/381] configfs: implement binary attributes
+Subject: [PATCH 177/423] configfs: implement binary attributes
ConfigFS lacked binary attributes up until now. This patch
introduces support for binary attributes in a somewhat similar
-From 3aebc18959f03056ba7dae3b0f769aa283ed40c0 Mon Sep 17 00:00:00 2001
+From 4f9177551b224eb3cf97bbe797a2909bb6ab2998 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Wed, 3 Dec 2014 13:23:28 +0200
-Subject: [PATCH 178/381] OF: DT-Overlay configfs interface
+Subject: [PATCH 178/423] OF: DT-Overlay configfs interface
This is a port of Pantelis Antoniou's v3 port that makes use of the
new upstreamed configfs support for binary attributes.
-From e48f4b37e5fbb039bee4fde22469f383cc98a1d8 Mon Sep 17 00:00:00 2001
+From b20701a18267d97ae47407f713bda22e2b647bc1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 13 Mar 2015 12:43:36 +0000
-Subject: [PATCH 179/381] Protect __release_resource against resources without
+Subject: [PATCH 179/423] Protect __release_resource against resources without
parents
Without this patch, removing a device tree overlay can crash here.
-From 4bc79db3fb0734cc6de0ddfc4b95c2db0f3f8607 Mon Sep 17 00:00:00 2001
+From 931d7ab56b2798d9b72ef2308d981d824335b7de Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 13 Mar 2015 20:00:21 +0000
-Subject: [PATCH 180/381] BCM270X_DT: Add a .dtbo target, use for overlays
+Subject: [PATCH 180/423] BCM270X_DT: Add a .dtbo target, use for overlays
Change the filenames and extensions to keep the pre-DDT style of
overlay (<name>-overlay.dtb) distinct from new ones that use a
-From 6d7bc67f5af641afffc88fdc55940ccf53831f00 Mon Sep 17 00:00:00 2001
+From 97ce4cd9a2b9c596c382c4af688518eaf6a5a84b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 29 May 2015 11:18:58 +0100
-Subject: [PATCH 181/381] scripts/knlinfo: Decode DDTK atom
+Subject: [PATCH 181/423] scripts/knlinfo: Decode DDTK atom
Show the DDTK atom as being a boolean.
-From ec7710516621d3131c7e025a73ab8354ec21f7f8 Mon Sep 17 00:00:00 2001
+From b6d96f1dc239d7b7e71aa658156c893e46e6a2bf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 29 May 2015 11:48:59 +0100
-Subject: [PATCH 182/381] Enable Dynamic Device Tree for bcmrpi_defconfig and
+Subject: [PATCH 182/423] Enable Dynamic Device Tree for bcmrpi_defconfig and
bcm2709_defconfig
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
-From 47f46fe81c376e006950445ca739f48aad4432e5 Mon Sep 17 00:00:00 2001
+From dbe624ecbe5f601297665da59ba6cfc11e8150d4 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Sun, 13 Mar 2016 16:14:44 +0000
-Subject: [PATCH 183/381] SQUASH: Add CONFIG_OF_CONFIGFS to bcmrpi_defconfig
+Subject: [PATCH 183/423] SQUASH: Add CONFIG_OF_CONFIGFS to bcmrpi_defconfig
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From b05ecd40ad5513486d9e38752a1f64f48be20839 Mon Sep 17 00:00:00 2001
+From ac5048f5b6df22924f23952107e3810f999387bf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 14 Mar 2016 16:56:54 +0000
-Subject: [PATCH 184/381] dts, kbuild: dtbs_install installs .dtbo files too
+Subject: [PATCH 184/423] dts, kbuild: dtbs_install installs .dtbo files too
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From 34269be91afc30ac33e70f37418969b9694f9fad Mon Sep 17 00:00:00 2001
+From 4f52f1f19ee9c54eb0022eeff03a380fca01384b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 14:10:29 +0000
-Subject: [PATCH 185/381] bcm2835-sdhost: Workaround for "slow" sectors
+Subject: [PATCH 185/423] bcm2835-sdhost: Workaround for "slow" sectors
Some cards have been seen to cause timeouts after certain sectors are
read. This workaround enforces a minimum delay between the stop after
-From a5b8204a864f7f9a5a30c6b673e735138c3bdba3 Mon Sep 17 00:00:00 2001
+From 69b8da40b814a65b49a19058e906b26b44303fba Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 15:49:16 +0000
-Subject: [PATCH 186/381] BCM270X_DT: Add labels to spidev nodes
+Subject: [PATCH 186/423] BCM270X_DT: Add labels to spidev nodes
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From 9bdfa67fd35978aed2d711821302bc30a3aa2667 Mon Sep 17 00:00:00 2001
+From 37d926b159b0cb6ebe80c24b9641e12b6fbd3dd5 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 16:27:26 +0000
-Subject: [PATCH 187/381] BCM270X_DT: Use spidev labels in overlays
+Subject: [PATCH 187/423] BCM270X_DT: Use spidev labels in overlays
---
arch/arm/boot/dts/overlays/ads7846-overlay.dts | 22 ++++++++++-------
-From 32afb8961b9c5f51dc8e88832f47b8ef197acf32 Mon Sep 17 00:00:00 2001
+From 286f21ae694dd4e3798011d771f6833318f8371c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 16:41:37 +0000
-Subject: [PATCH 188/381] BCM270X_DT: Build and document the wittypi overlay
+Subject: [PATCH 188/423] BCM270X_DT: Build and document the wittypi overlay
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From e3a356dd422147d4d96aa0c9378551363b1a5b99 Mon Sep 17 00:00:00 2001
+From 65d8417f8d87161c1bc6b6b0bc43a32a89546ee4 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Tue, 15 Mar 2016 21:13:39 +0100
-Subject: [PATCH 189/381] scripts/dtc: Fix UMR causing corrupt dtbo overlay
+Subject: [PATCH 189/423] scripts/dtc: Fix UMR causing corrupt dtbo overlay
files
struct fixup_entry is allocated from the heap but it's member
-From 1f72100e701440d4c65e4eeaed3fcfdc553d69f5 Mon Sep 17 00:00:00 2001
+From 0913a8d9a13e327cd592970da2555c32963a90e7 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 16 Mar 2016 08:35:06 +0000
-Subject: [PATCH 190/381] BCM270X_DT: Add dtparam for uart1
+Subject: [PATCH 190/423] BCM270X_DT: Add dtparam for uart1
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From 0945d95f5b98b323f6a611e2bb96a3400fd91d41 Mon Sep 17 00:00:00 2001
+From 664a65f96f3a1afdacf3697460fb57e3a34080fb Mon Sep 17 00:00:00 2001
From: Przemek Rudy <prudy1@o2.pl>
Date: Fri, 11 Mar 2016 22:41:26 +0100
-Subject: [PATCH 191/381] dwc-overlay: Use label so overrides can apply.
+Subject: [PATCH 191/423] dwc-overlay: Use label so overrides can apply.
---
arch/arm/boot/dts/overlays/dwc2-overlay.dts | 10 +++++-----
-From fe67c3546abaaab10d826626fdd3dd147f6bd693 Mon Sep 17 00:00:00 2001
+From 52a53c8b62c8e5500ffa6131ed367c0271c05679 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 22 Jan 2016 13:06:39 -0800
-Subject: [PATCH 192/381] drm/vc4: Add a debugfs node for tracking execution
+Subject: [PATCH 192/423] drm/vc4: Add a debugfs node for tracking execution
state.
Signed-off-by: Eric Anholt <eric@anholt.net>
-From 99d93febb6563b3f0f6ad5ec0240fa0c3e19f62f Mon Sep 17 00:00:00 2001
+From aa0275b3a1823ea863d2f9f2635cc6ca446adb92 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 13:03:33 -0800
-Subject: [PATCH 193/381] drm/vc4: Include vc4_drm.h in uapi in downstream
+Subject: [PATCH 193/423] drm/vc4: Include vc4_drm.h in uapi in downstream
build.
Signed-off-by: Eric Anholt <eric@anholt.net>
-From a88f349e6b9544d0e37ece0d1d94a7065151f92c Mon Sep 17 00:00:00 2001
+From 5528526faa0302e28b284590f761d43d66e85632 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 13:05:00 -0800
-Subject: [PATCH 194/381] drm/vc4: Validate that WAIT_BO padding is cleared.
+Subject: [PATCH 194/423] drm/vc4: Validate that WAIT_BO padding is cleared.
This is ABI future-proofing if we ever want to extend the pad to mean
something.
-From ae56f926164bc10a43c6a1b1cb6576d59a96893c Mon Sep 17 00:00:00 2001
+From 68cbe5055b8b2d1b96fd6b5009f16064783e6b00 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 13:52:41 -0800
-Subject: [PATCH 195/381] drm/vc4: Fix the clear color for the first tile
+Subject: [PATCH 195/423] drm/vc4: Fix the clear color for the first tile
rendered.
Apparently in hardware (as opposed to simulation), the clear colors
-From 8db21da6d756efe530df2736c7dc99aeeca209ce Mon Sep 17 00:00:00 2001
+From 8833c229e00291163a2464d82d0d7902e24466ca Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 14:13:12 -0800
-Subject: [PATCH 196/381] drm/vc4: Return an ERR_PTR from BO creation instead
+Subject: [PATCH 196/423] drm/vc4: Return an ERR_PTR from BO creation instead
of NULL.
Fixes igt vc4_create_bo/create-bo-0 by returning -EINVAL from the
-From a0554ab8b841b57b9bba5acb16b24763dfbf02e0 Mon Sep 17 00:00:00 2001
+From a60ba3cce2f5fb3bb34443d4b5ba8cbf135e6163 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 14:32:41 -0800
-Subject: [PATCH 197/381] drm/vc4: Fix -ERESTARTSYS error return from BO waits.
+Subject: [PATCH 197/423] drm/vc4: Fix -ERESTARTSYS error return from BO waits.
This caused the wait ioctls to claim that waiting had completed when
we actually got interrupted by a signal before it was done. Fixes
-From e9096f6a422bb37a87dd41bc2c01163946e1bc10 Mon Sep 17 00:00:00 2001
+From e3ff132f57aa1837e2ec8deff44c263157962bb6 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 14:33:50 -0800
-Subject: [PATCH 198/381] drm/vc4: Drop error message on seqno wait timeouts.
+Subject: [PATCH 198/423] drm/vc4: Drop error message on seqno wait timeouts.
These ioctls end up getting exposed to userspace, and having normal
user requests print DRM errors is obviously wrong. The message was
-From 337a299edf74d3866636363b675f1b48e01cf842 Mon Sep 17 00:00:00 2001
+From e1b1b8a6f9dbdcf019b8975d5ced5a0393b23dd3 Mon Sep 17 00:00:00 2001
From: campag <dave-lowe@ntlworld.com>
Date: Wed, 24 Feb 2016 16:45:42 +0000
-Subject: [PATCH 199/381] BCM270X_DT: Add 1-bit SDIO using minimal pins...
+Subject: [PATCH 199/423] BCM270X_DT: Add 1-bit SDIO using minimal pins...
... for that mode: GPIOs 22-25.
---
-From ff63e16281a582d4ead28c797b10167515fd9898 Mon Sep 17 00:00:00 2001
+From 51405bd458e0e16e1b1a912e6361c83633567de1 Mon Sep 17 00:00:00 2001
From: Michael Heimpold <michael.heimpold@i2se.com>
Date: Fri, 29 Jan 2016 12:00:37 +0100
-Subject: [PATCH 201/381] Add overlay and enable support for QCA7000 board
+Subject: [PATCH 201/423] Add overlay and enable support for QCA7000 board
This adds a device tree overlay for the QCA7000 which can be used
when attaching an I2SE's PLC Stamp micro EVK to the Raspberry Pi.
-From 35370cf396896477ee7e8cb044779a3ee9257a7e Mon Sep 17 00:00:00 2001
+From 91796069d412600985585cbb8d72cb5dbf7d9a2e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 9 Mar 2016 13:28:24 +0000
-Subject: [PATCH 202/381] serial: Take care starting a hung-up tty's port
+Subject: [PATCH 202/423] serial: Take care starting a hung-up tty's port
tty_port_hangup sets a port's tty field to NULL (holding the port lock),
but uart_tx_stopped, called from __uart_start (with the port lock),
-From f0f6dd227bbb171ad6b0dbe1d394de71d78eae21 Mon Sep 17 00:00:00 2001
+From c920022cc697e98b64bc9af5fc64ca0f2c802ccd Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 17 Mar 2016 10:16:16 +0000
-Subject: [PATCH 203/381] pi3-miniuart-bt-overlay: Correct and clarify info
+Subject: [PATCH 203/423] pi3-miniuart-bt-overlay: Correct and clarify info
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From b04fec7048465650101f83c29080de209a1c6446 Mon Sep 17 00:00:00 2001
+From 0ba5b23995c38e7c477647aaf84df0a0dc136b70 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 17 Mar 2016 10:41:56 +0000
-Subject: [PATCH 204/381] pwm overlays: Params must have in-overlay targets
+Subject: [PATCH 204/423] pwm overlays: Params must have in-overlay targets
---
arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts | 9 ++++++++-
-From 4212b2d0cd9638f926162efb7a4b3c477cfb212c Mon Sep 17 00:00:00 2001
+From ffb63fd81160a7ec5876a7e3f29b78b68e481bc7 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 18 Mar 2016 13:06:29 +0000
-Subject: [PATCH 205/381] BCM270X_DT: Switch Compute Module to MMC
+Subject: [PATCH 205/423] BCM270X_DT: Switch Compute Module to MMC
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From d5199adc79072f6cd49f8c79bc02769397a3456c Mon Sep 17 00:00:00 2001
+From d309ffcbd73c0fb942d4f92b1a5089a40fe3855e Mon Sep 17 00:00:00 2001
From: P33M <P33M@github.com>
Date: Fri, 18 Mar 2016 17:38:37 +0000
-Subject: [PATCH 206/381] dwc_otg: Don't free qh align buffers in atomic
+Subject: [PATCH 206/423] dwc_otg: Don't free qh align buffers in atomic
context
---
-From e1e24dfafa725d849724cb9bf24c142a5cc8473a Mon Sep 17 00:00:00 2001
+From 7db6ea3f5e135665bb4275d8b74bbe900d9aad7a Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 21 Mar 2016 15:38:38 +0000
-Subject: [PATCH 207/381] dwc_otg: Enable the hack for Split Interrupt
+Subject: [PATCH 207/423] dwc_otg: Enable the hack for Split Interrupt
transactions by default
dwc_otg.fiq_fsm_mask=0xF has long been a suggestion for users with audio stutters or other USB bandwidth issues.
-From 0fc64288fb36e30e77feeccb3fd68901891939f7 Mon Sep 17 00:00:00 2001
+From 4416c9473baa7439421aba5b58bc55cfc23f0a15 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Sat, 19 Mar 2016 16:51:37 +0000
-Subject: [PATCH 208/381] BCM270X_DT: Remove explicit claiming of UART pins
+Subject: [PATCH 208/423] BCM270X_DT: Remove explicit claiming of UART pins
It is convenient to be able to map a different function to the UART
pins (e.g. DPI for vga666) without having to disable the UART first.
-From 61675cb7f40c9b93537351b9d225cfeb08968875 Mon Sep 17 00:00:00 2001
+From 324d6d326ca794bf6d639b85c9745628b99b47c9 Mon Sep 17 00:00:00 2001
From: Rodrigo Freire <rfreire@rf.usersys.redhat.com>
Date: Tue, 22 Mar 2016 12:40:33 -0300
-Subject: [PATCH 209/381] lirc_rpi: Lower IR reception error to debug
+Subject: [PATCH 209/423] lirc_rpi: Lower IR reception error to debug
Lowers a IR reception error condition message to KERNEL_DEBUG
---
-From 1111ae49a509d672b43194d2e483f297f98d78ad Mon Sep 17 00:00:00 2001
+From 8a4ce18b5f3ca5570666284a3a0208534dd41c26 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Mar 2016 14:16:25 +0000
-Subject: [PATCH 210/381] vchiq_arm: Access the dequeue_pending flag locked
+Subject: [PATCH 210/423] vchiq_arm: Access the dequeue_pending flag locked
Reading through this code looking for another problem (now found in userland)
the use of dequeue_pending outside a lock didn't seem safe.
-From ad4f6a8fc5af2d320ded80d44017bbd2a83425b4 Mon Sep 17 00:00:00 2001
+From 47e82ea7d35926f12bd642e1ad2727b9a128536a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Mar 2016 15:57:14 +0000
-Subject: [PATCH 211/381] BCM270X_DT: Add pi3-act-led overlay
+Subject: [PATCH 211/423] BCM270X_DT: Add pi3-act-led overlay
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From 5e6d6c93611ce75ac6c33515785ff2a37e3845d5 Mon Sep 17 00:00:00 2001
+From 81e1683aced46435585f3a0a81e47f9bc7609abf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Mar 2016 20:53:47 +0000
-Subject: [PATCH 212/381] vchiq_arm: Service callbacks must not fail
+Subject: [PATCH 212/423] vchiq_arm: Service callbacks must not fail
Service callbacks are not allowed to return an error. The internal callback
that delivers events and messages to user tasks does not enqueue them if
-From c00bcce082d0dc0b3b6ccd136b32da3c146784dc Mon Sep 17 00:00:00 2001
+From 9a4c1bb2dd7727a0592ec0456b6763bd9d12bf2b Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Thu, 17 Mar 2016 18:16:16 +0000
-Subject: [PATCH 213/381] Add configs and overlay for PCA9548 I2C mux
+Subject: [PATCH 213/423] Add configs and overlay for PCA9548 I2C mux
Adds kernel configs for I2C muxes and a dt overlay for PCA9548
that adds the 8 muxed I2C buses and mux device.
-From 679482c3c45177399648d096b7336ba3b1894126 Mon Sep 17 00:00:00 2001
+From 1523d333d0f5df470b0c0beedc9aa0b5a26e03aa Mon Sep 17 00:00:00 2001
From: Nicolas Boullis <nboullis@debian.org>
Date: Wed, 23 Mar 2016 23:40:15 +0100
-Subject: [PATCH 214/381] BCM270X_DT: Add DS1339 to i2c-rtc overlay
+Subject: [PATCH 214/423] BCM270X_DT: Add DS1339 to i2c-rtc overlay
---
arch/arm/boot/dts/overlays/README | 4 ++++
-From 226f58c078e55ba665fb49139cdc4990f4bde684 Mon Sep 17 00:00:00 2001
+From b6d043f90d9f788b1aae010f76884c62c646c9bf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 29 Mar 2016 15:32:30 +0100
-Subject: [PATCH 215/381] copy_from_user: CPU_SW_DOMAIN_PAN compatibility
+Subject: [PATCH 215/423] copy_from_user: CPU_SW_DOMAIN_PAN compatibility
The downstream copy_from_user acceleration must also play nice with
CONFIG_CPU_SW_DOMAIN_PAN.
-From 0608f91c0bf114dcd2b603b8e85866fe8d595854 Mon Sep 17 00:00:00 2001
+From 3410a0f56bdd85a526ce87eebb1b14b9f7b28f87 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 16:33:09 +0100
-Subject: [PATCH 216/381] bcm2835-sdhost: Adjust to core clock changes
+Subject: [PATCH 216/423] bcm2835-sdhost: Adjust to core clock changes
The SDHOST block uses the core clock, so previously it has been
necessary to prevent the core clock from changing in order to maintain
-From 8cbaec5167f764d2c7b88c2f465970fd08c55582 Mon Sep 17 00:00:00 2001
+From cef80f622db0010b80505bb5ffe200918e1c5cdb Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 17:07:15 +0100
-Subject: [PATCH 217/381] BCM270X_DT: Document hazards of sdhost overlay
+Subject: [PATCH 217/423] BCM270X_DT: Document hazards of sdhost overlay
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From bf137324a7f873dc90b9965398de259f5d992f9b Mon Sep 17 00:00:00 2001
+From 282da1ae4ebaa2fbc33b6dc96f4d483c43715a51 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 17:23:15 +0100
-Subject: [PATCH 218/381] cpufreq: Temporarily ignore io_is_busy=1
+Subject: [PATCH 218/423] cpufreq: Temporarily ignore io_is_busy=1
To speed testing of the new sdhost driver that adapts to changes in
core_freq, hack the on-demand governor to treat io_is_busy=1 as
-From 7512663c7fc8117e3a57f0feef53de88fb8a2c89 Mon Sep 17 00:00:00 2001
+From 80f0513490df97cbc5cea73c6047fd80388467c3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 20:18:38 +0100
-Subject: [PATCH 219/381] Revert "cpufreq: Temporarily ignore io_is_busy=1"
+Subject: [PATCH 219/423] Revert "cpufreq: Temporarily ignore io_is_busy=1"
This reverts commit 2af1218a8a0220fec526f64d03977b8451afb4c8.
---
-From 20f13356555bf192a95e2ea77a01746d754e37be Mon Sep 17 00:00:00 2001
+From 5383498b7d0c4976b35d0a1dfaa0e71f20541440 Mon Sep 17 00:00:00 2001
From: Daniel Borkmann <daniel@iogearbox.net>
Date: Thu, 7 Jan 2016 15:50:22 +0100
-Subject: [PATCH 220/381] net, sched: add skb_at_tc_ingress helper
+Subject: [PATCH 220/423] net, sched: add skb_at_tc_ingress helper
Add a skb_at_tc_ingress() as this will be needed elsewhere as well and
can hide the ugly ifdef.
--- /dev/null
+From 367956e87b62ae1f015ccbff58c7920a2e7a3511 Mon Sep 17 00:00:00 2001
+From: Daniel Borkmann <daniel@iogearbox.net>
+Date: Thu, 7 Jan 2016 15:50:23 +0100
+Subject: [PATCH 221/423] bpf: add skb_postpush_rcsum and fix dev_forward_skb
+ occasions
+
+Add a small helper skb_postpush_rcsum() and fix up redirect locations
+that need CHECKSUM_COMPLETE fixups on ingress. dev_forward_skb() expects
+a proper csum that covers also Ethernet header, f.e. since 2c26d34bbcc0
+("net/core: Handle csum for CHECKSUM_COMPLETE VXLAN forwarding"), we
+also do skb_postpull_rcsum() after pulling Ethernet header off via
+eth_type_trans().
+
+When using eBPF in a netns setup f.e. with vxlan in collect metadata mode,
+I can trigger the following csum issue with an IPv6 setup:
+
+ [ 505.144065] dummy1: hw csum failure
+ [...]
+ [ 505.144108] Call Trace:
+ [ 505.144112] <IRQ> [<ffffffff81372f08>] dump_stack+0x44/0x5c
+ [ 505.144134] [<ffffffff81607cea>] netdev_rx_csum_fault+0x3a/0x40
+ [ 505.144142] [<ffffffff815fee3f>] __skb_checksum_complete+0xcf/0xe0
+ [ 505.144149] [<ffffffff816f0902>] nf_ip6_checksum+0xb2/0x120
+ [ 505.144161] [<ffffffffa08c0e0e>] icmpv6_error+0x17e/0x328 [nf_conntrack_ipv6]
+ [ 505.144170] [<ffffffffa0898eca>] ? ip6t_do_table+0x2fa/0x645 [ip6_tables]
+ [ 505.144177] [<ffffffffa08c0725>] ? ipv6_get_l4proto+0x65/0xd0 [nf_conntrack_ipv6]
+ [ 505.144189] [<ffffffffa06c9a12>] nf_conntrack_in+0xc2/0x5a0 [nf_conntrack]
+ [ 505.144196] [<ffffffffa08c039c>] ipv6_conntrack_in+0x1c/0x20 [nf_conntrack_ipv6]
+ [ 505.144204] [<ffffffff8164385d>] nf_iterate+0x5d/0x70
+ [ 505.144210] [<ffffffff816438d6>] nf_hook_slow+0x66/0xc0
+ [ 505.144218] [<ffffffff816bd302>] ipv6_rcv+0x3f2/0x4f0
+ [ 505.144225] [<ffffffff816bca40>] ? ip6_make_skb+0x1b0/0x1b0
+ [ 505.144232] [<ffffffff8160b77b>] __netif_receive_skb_core+0x36b/0x9a0
+ [ 505.144239] [<ffffffff8160bdc8>] ? __netif_receive_skb+0x18/0x60
+ [ 505.144245] [<ffffffff8160bdc8>] __netif_receive_skb+0x18/0x60
+ [ 505.144252] [<ffffffff8160ccff>] process_backlog+0x9f/0x140
+ [ 505.144259] [<ffffffff8160c4a5>] net_rx_action+0x145/0x320
+ [...]
+
+What happens is that on ingress, we push Ethernet header back in, either
+from cls_bpf or right before skb_do_redirect(), but without updating csum.
+The "hw csum failure" can be fixed by using the new skb_postpush_rcsum()
+helper for the dev_forward_skb() case to correct the csum diff again.
+
+Thanks to Hannes Frederic Sowa for the csum_partial() idea!
+
+Fixes: 3896d655f4d4 ("bpf: introduce bpf_clone_redirect() helper")
+Fixes: 27b29f63058d ("bpf: add bpf_redirect() helper")
+Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
+Acked-by: Alexei Starovoitov <ast@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ net/core/filter.c | 17 +++++++++++++----
+ 1 file changed, 13 insertions(+), 4 deletions(-)
+
+--- a/net/core/filter.c
++++ b/net/core/filter.c
+@@ -1293,8 +1293,9 @@ static u64 bpf_skb_store_bytes(u64 r1, u
+ /* skb_store_bits cannot return -EFAULT here */
+ skb_store_bits(skb, offset, ptr, len);
+
+- if (BPF_RECOMPUTE_CSUM(flags) && skb->ip_summed == CHECKSUM_COMPLETE)
+- skb->csum = csum_add(skb->csum, csum_partial(ptr, len, 0));
++ if (BPF_RECOMPUTE_CSUM(flags))
++ skb_postpush_rcsum(skb, ptr, len);
++
+ return 0;
+ }
+
+@@ -1420,8 +1421,12 @@ static u64 bpf_clone_redirect(u64 r1, u6
+ if (unlikely(!skb2))
+ return -ENOMEM;
+
+- if (BPF_IS_REDIRECT_INGRESS(flags))
++ if (BPF_IS_REDIRECT_INGRESS(flags)) {
++ if (skb_at_tc_ingress(skb2))
++ skb_postpush_rcsum(skb2, skb_mac_header(skb2),
++ skb2->mac_len);
+ return dev_forward_skb(dev, skb2);
++ }
+
+ skb2->dev = dev;
+ skb_sender_cpu_clear(skb2);
+@@ -1464,8 +1469,12 @@ int skb_do_redirect(struct sk_buff *skb)
+ return -EINVAL;
+ }
+
+- if (BPF_IS_REDIRECT_INGRESS(ri->flags))
++ if (BPF_IS_REDIRECT_INGRESS(ri->flags)) {
++ if (skb_at_tc_ingress(skb))
++ skb_postpush_rcsum(skb, skb_mac_header(skb),
++ skb->mac_len);
+ return dev_forward_skb(dev, skb);
++ }
+
+ skb->dev = dev;
+ skb_sender_cpu_clear(skb);
-From e87ddfc18bbca9beae107b274b317fb86420b0a5 Mon Sep 17 00:00:00 2001
+From 5891d0fea3401ae4248fb98d6e70c9e6ffcf1aab Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 31 Mar 2016 15:44:53 +0100
-Subject: [PATCH 222/381] bcm2835-sdhost: Precalc divisors and overclocks
+Subject: [PATCH 222/423] bcm2835-sdhost: Precalc divisors and overclocks
Recalculating the clock divisors when the core clock changes is wasteful
and makes it harder to manage the overclock settings. Instead,
-From 28d6ecd622da2efdb7a7c6c07ab8a92c82dded6b Mon Sep 17 00:00:00 2001
+From 4d85eac2b4821741269c9e49a0f3d0589291c83a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Apr 2016 12:35:32 +0100
-Subject: [PATCH 223/381] Revert "bcm2835-sdhost: Precalc divisors and
+Subject: [PATCH 223/423] Revert "bcm2835-sdhost: Precalc divisors and
overclocks"
This reverts commit 20260462773366a5734e5268dae0a4c179a21a2d.
-From 14c3f0b3a4fd51c2bb98146b3395ddc69a2b50ab Mon Sep 17 00:00:00 2001
+From 2f5c0928b44b0d34a975b4fb8165c26a134d7097 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Apr 2016 12:35:51 +0100
-Subject: [PATCH 224/381] Revert "bcm2835-sdhost: Adjust to core clock changes"
+Subject: [PATCH 224/423] Revert "bcm2835-sdhost: Adjust to core clock changes"
This reverts commit 4b89d07fd299a0f4e25321920cb74416ba2e638e.
---
-From b14e4255f43ccf38b4f9df8f5793c9c4098e0ab9 Mon Sep 17 00:00:00 2001
+From 0b7ab0214a63a19c8c1a383b3ef89713c91e0251 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Apr 2016 16:03:18 +0100
-Subject: [PATCH 225/381] bcm2835-sdhost: Firmware manages the clock divisor
+Subject: [PATCH 225/423] bcm2835-sdhost: Firmware manages the clock divisor
The bcm2835-sdhost driver hands control of the CDIV clock divisor
register to matching firmware, allowing it to adjust to a changing
-From 846df5e9c9f2510a68c26922eb6a04b76c576357 Mon Sep 17 00:00:00 2001
+From 136379745690939706d830547ff754e770e832eb Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 4 Apr 2016 19:52:27 +0100
-Subject: [PATCH 226/381] Revert "Revert "cpufreq: Temporarily ignore
+Subject: [PATCH 226/423] Revert "Revert "cpufreq: Temporarily ignore
io_is_busy=1""
This reverts commit c353af0f83220068c10f6593b1767576b9b6cc18.
-From 61b0ef34ce5c2b75fdab896e50877be6becd267c Mon Sep 17 00:00:00 2001
+From ad66c705ec0cd980297425e2d0541c68eedf1557 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Thu, 31 Mar 2016 16:49:52 +0100
-Subject: [PATCH 227/381] config: Enabled IPV6_SUBTREES
+Subject: [PATCH 227/423] config: Enabled IPV6_SUBTREES
---
arch/arm/configs/bcm2709_defconfig | 1 +
-From 7cdc4c771efb56086a303784f012100382018da4 Mon Sep 17 00:00:00 2001
+From fefd3cd13f39ac77c50b63abcb41dd01163e127a Mon Sep 17 00:00:00 2001
From: Sam Nazarko <email@samnazarko.co.uk>
Date: Fri, 1 Apr 2016 17:27:21 +0100
-Subject: [PATCH 228/381] add smsc95xx packetsize module_param
+Subject: [PATCH 228/423] add smsc95xx packetsize module_param
Signed-off-by: Sam Nazarko <email@samnazarko.co.uk>
---
-From 1ddd9795a4933619754574c0f9d93542ee72d70d Mon Sep 17 00:00:00 2001
+From c927d6c160408b033223d7cf7795e2ec0faa78fa Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 5 Apr 2016 19:40:12 +0100
-Subject: [PATCH 229/381] reboot: Use power off rather than busy spinning when
+Subject: [PATCH 229/423] reboot: Use power off rather than busy spinning when
halt is requested
---
-From 73667a3e1442c254de183d53492264b19fbe239f Mon Sep 17 00:00:00 2001
+From dc09000595f912aec73956e6db7be266c434fd3e Mon Sep 17 00:00:00 2001
From: HiassofT <github@hias.horus.com>
Date: Wed, 6 Apr 2016 21:45:01 +0200
-Subject: [PATCH 230/381] Revert "bcm2835-dma: Fix dreq not set for slave
+Subject: [PATCH 230/423] Revert "bcm2835-dma: Fix dreq not set for slave
transfers"
This reverts commit 8ad957e866a1fe1450f663f2b00a57d7de44904c.
-From 7e582eea049788f8f4077e439030b03bd30c3a2b Mon Sep 17 00:00:00 2001
+From f736b53bdc910c364e8f2cd0f0c1bf1edf41f048 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Fri, 1 Apr 2016 15:28:46 +0100
-Subject: [PATCH 231/381] RPi config: Add CONFIG_PWM_PCA9685 for NXP PCA9685
+Subject: [PATCH 231/423] RPi config: Add CONFIG_PWM_PCA9685 for NXP PCA9685
driver over I2C
Includes DT overlay to configure it.
-From a7261327b85789623ba20744f44150308d15fb94 Mon Sep 17 00:00:00 2001
+From 3d7cb0d28c79c6418a3666803960881e21e5c974 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 8 Apr 2016 17:43:27 +0100
-Subject: [PATCH 232/381] BCM270X_DT: Don't generate "linux,phandle" props
+Subject: [PATCH 232/423] BCM270X_DT: Don't generate "linux,phandle" props
The EPAPR standard says to use "phandle" properties to store phandles,
rather than the deprecated "linux,phandle" version. By default, dtc
-From 5490e6a851eec9f80f887c43f2e2031197527476 Mon Sep 17 00:00:00 2001
+From 901e004652b14261a036e259adac0a380bbb724b Mon Sep 17 00:00:00 2001
From: 6by9 <6by9@users.noreply.github.com>
Date: Fri, 8 Apr 2016 18:15:43 +0100
-Subject: [PATCH 233/381] V4L2 driver updates (#1393)
+Subject: [PATCH 233/423] V4L2 driver updates (#1393)
* BCM2835-V4L2: Correct ISO control and add V4L2_CID_ISO_SENSITIVITY_AUTO
-From 3ef58b428e66c86b2e36dbb0a17d561088688578 Mon Sep 17 00:00:00 2001
+From f900cc706eca16b68d335810173b253229109ec5 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 11 Apr 2016 12:50:58 +0100
-Subject: [PATCH 234/381] bcm2835-sdhost: Reset the clock in task context
+Subject: [PATCH 234/423] bcm2835-sdhost: Reset the clock in task context
Since reprogramming the clock can now involve a round-trip to the
firmware it must not be done at atomic context, and a tasklet
-From 8e5424e69f62b365bcb158c6d4b28b7e1c100664 Mon Sep 17 00:00:00 2001
+From 9e67abb08bb66fcffa1540bc18b98beeda7d6285 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Thu, 7 Apr 2016 12:44:24 +0100
-Subject: [PATCH 235/381] config: Enable CONFIG_IPV6_ROUTER_PREF for networks
+Subject: [PATCH 235/423] config: Enable CONFIG_IPV6_ROUTER_PREF for networks
with multiple routers
---
-From 046f7b291b867d22eb2ba03b83201363acc89551 Mon Sep 17 00:00:00 2001
+From b7d3c1f41a346bccd4a8ec3f553a6f109677c37b Mon Sep 17 00:00:00 2001
From: jochenberger <fooberger@gmail.com>
Date: Thu, 7 Apr 2016 21:38:46 +0200
-Subject: [PATCH 236/381] Enable hid-betopff module
+Subject: [PATCH 236/423] Enable hid-betopff module
Add force feedback support for Betop based devices
https://github.com/raspberrypi/linux/blob/rpi-4.1.y/drivers/hid/hid-betopff.c
-From a7e05883dcb747994f0d65dcff6cbae905584c7b Mon Sep 17 00:00:00 2001
+From 66e5546f065bd4c854e6ccfe192942a76137e80f Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 12 Apr 2016 12:45:16 +0100
-Subject: [PATCH 237/381] config: Make IPV6 a module and regenerate with
+Subject: [PATCH 237/423] config: Make IPV6 a module and regenerate with
defconfig
---
-From eb5818121aa45fb1f379e4990f8040ef4e979fa0 Mon Sep 17 00:00:00 2001
+From 6db3147b0daf8b893eba23c305ec5e39354587d2 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 5 Apr 2016 13:01:54 +0100
-Subject: [PATCH 238/381] BCM270X_DT: Add dpi24 overlay
+Subject: [PATCH 238/423] BCM270X_DT: Add dpi24 overlay
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From fabd181287bd52afc523f10c27a7fd3a10969aa7 Mon Sep 17 00:00:00 2001
+From e26827db219f8221e20aba5e7f564d61b4fa2be3 Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 14 Apr 2016 00:57:33 +0100
-Subject: [PATCH 239/381] Modify IQAudIO DAC+ ASoC driver to set card/dai
+Subject: [PATCH 239/423] Modify IQAudIO DAC+ ASoC driver to set card/dai
config from dt
Add the ability to set the card name, dai name and dai stream name, from
-From 84e674b139553b74fa118a3e41ba6ca31e2c0750 Mon Sep 17 00:00:00 2001
+From 69211c7619dd7788d92c8e9c8e47de6a2ac66d76 Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 14 Apr 2016 01:00:58 +0100
-Subject: [PATCH 240/381] Add support for the Digital Dreamtime Akkordion music
+Subject: [PATCH 240/423] Add support for the Digital Dreamtime Akkordion music
player.
Support the Digital Dreamtime Akkordion using the OEM IQAudIO DAC+ or
-From d26cb19ea8e7c42a8b53e5a3a377e198c9cce73e Mon Sep 17 00:00:00 2001
+From acfc71e5a52a8c2389341052d9d4d3f2d807f962 Mon Sep 17 00:00:00 2001
From: Aaron Shaw <shawaj@gmail.com>
Date: Thu, 7 Apr 2016 21:26:21 +0100
-Subject: [PATCH 241/381] Add Support for BoomBerry Audio boards
+Subject: [PATCH 241/423] Add Support for BoomBerry Audio boards
---
arch/arm/boot/dts/overlays/Makefile | 2 +
-From 21b5809ad5be5bd18608c9258ff5f571065f8ff9 Mon Sep 17 00:00:00 2001
+From 0046657bca51cfb61edcb38cef3039d304863a25 Mon Sep 17 00:00:00 2001
From: Aaron Shaw <shawaj@gmail.com>
Date: Fri, 8 Apr 2016 00:06:00 +0100
-Subject: [PATCH 242/381] Add support for mcp7940x family of RTC
+Subject: [PATCH 242/423] Add support for mcp7940x family of RTC
---
arch/arm/boot/dts/overlays/README | 2 ++
-From 56fb67d4ce06ff6140da52559e3e256e46e9ce56 Mon Sep 17 00:00:00 2001
+From eecfe86df596a7b589040300fead9621aaaa24de Mon Sep 17 00:00:00 2001
From: Jeremy McDermond <nh6z@nh6z.net>
Date: Thu, 14 Apr 2016 09:39:20 -0700
-Subject: [PATCH 243/381] bcm2709_defconfig: Fix typo on BoomBerry
+Subject: [PATCH 243/423] bcm2709_defconfig: Fix typo on BoomBerry
configuration directive
The BoomBerry configuration directive in bcm2709_defconfig has a typo.
-From 1fc5799ca5f6f2cc31f5b076d780e111de011cc3 Mon Sep 17 00:00:00 2001
+From b2722225844f050026ed43446d67d26032af05ed Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 15 Apr 2016 10:48:39 +0100
-Subject: [PATCH 244/381] boomberry-dac: Adjust for ALSA API change
+Subject: [PATCH 244/423] boomberry-dac: Adjust for ALSA API change
As of 4.4, snd_soc_limit_volume now takes a struct snd_soc_card *
rather than a struct snd_soc_codec *.
-From e66d9d6665362899e85d666a5d7b6279747a7273 Mon Sep 17 00:00:00 2001
+From 9a9153d6a6e2c413ff568a9e26dd4711060c0732 Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Sun, 17 Apr 2016 04:44:47 -0700
-Subject: [PATCH 245/381] vmcs: Remove unused sm_cache_map_vector definition
+Subject: [PATCH 245/423] vmcs: Remove unused sm_cache_map_vector definition
(#1411)
The code using it also ifdef'ed with 0, anyyd gcc 6
-From ced7d5ba55445eb116abd68466d6caa1538ff482 Mon Sep 17 00:00:00 2001
+From de215293c91853f39344b66ea18ca49b975f4783 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 18 Apr 2016 11:56:53 +0100
-Subject: [PATCH 246/381] scripts/mkknlimg: Append a trailer for all input
+Subject: [PATCH 246/423] scripts/mkknlimg: Append a trailer for all input
Now that the firmware assumes an unsigned kernel is DT-capable, it is
helpful to be able to mark a kernel as being non-DT-capable.
-From 6877cb849fe4953be1c9f056a83e218e09948d38 Mon Sep 17 00:00:00 2001
+From 9f8cfdfbb0850aed63d1489469b36f53affa99aa Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 19 Apr 2016 12:57:52 +0100
-Subject: [PATCH 247/381] bcm2835_thermal: Don't report unsupported trip type
+Subject: [PATCH 247/423] bcm2835_thermal: Don't report unsupported trip type
---
drivers/thermal/bcm2835-thermal.c | 34 +---------------------------------
-From 8cb95ac5aa3d9daebb4265bfac06b70bb3d24559 Mon Sep 17 00:00:00 2001
+From fffbc0bb693d462619402b4ca134c3d591e799bf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 19 Apr 2016 13:55:29 +0100
-Subject: [PATCH 248/381] scripts/dtc: Only emit local fixups for overlays
+Subject: [PATCH 248/423] scripts/dtc: Only emit local fixups for overlays
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
-From 367f4ce11d5588d680ae50c405b1a9afa591a550 Mon Sep 17 00:00:00 2001
+From afad9ef007320f0cda5b97004d07a52e8387e912 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Tue, 19 Apr 2016 16:08:35 +0200
-Subject: [PATCH 249/381] bcm2835: do not require substream for accessing chmap
+Subject: [PATCH 249/423] bcm2835: do not require substream for accessing chmap
ctl
Fixes alsasctl store/restore operation.
-From a9d3c50f084d4d6d1063969c04bc8233fe1437c1 Mon Sep 17 00:00:00 2001
+From 7c2791eb1e01c8714d5553bd2bd5e611394a6517 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Tue, 19 Apr 2016 16:29:41 +0200
-Subject: [PATCH 250/381] bcm2835: add fallback channel layouts if channel map
+Subject: [PATCH 250/423] bcm2835: add fallback channel layouts if channel map
API is not used
Should be more useful than just forcing stereo.
-From c1a1f4c6d4e2d1bdba70de54bc204d2b3a80c0ea Mon Sep 17 00:00:00 2001
+From 317cae9751a3e08bbddaeb6099e05c7700884a30 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Tue, 19 Apr 2016 16:38:03 +0200
-Subject: [PATCH 251/381] bcm2835: log which channel map is set
+Subject: [PATCH 251/423] bcm2835: log which channel map is set
---
sound/arm/bcm2835-vchiq.c | 5 +++++
-From e9dccf5bbdb8d40477fe5ebedea548cf24407c1c Mon Sep 17 00:00:00 2001
+From a216a6ac7b7efad9d9d62ffa6be5fd1809953b6d Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:46 +0100
-Subject: [PATCH 252/381] clk: bcm2835: add a round up ability to the clock
+Subject: [PATCH 252/423] clk: bcm2835: add a round up ability to the clock
divisor
Make bcm2835_clock_choose_div to optionally round up the chosen MASH divisor
-From 8578eeecb147439b7286e14cd0ce8a5078851f56 Mon Sep 17 00:00:00 2001
+From 29085f56d20e9c563b183a003f39f7cfc7884b17 Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:47 +0100
-Subject: [PATCH 253/381] clk: bcm2835: Support for clock parent selection
+Subject: [PATCH 253/423] clk: bcm2835: Support for clock parent selection
Some bcm2835 clocks used by hardware (like "PWM" or "H264") can have multiple
parent clocks. These clocks divide the rate of a parent which can be selected by
-From c1f2dd85b1d53093fdf7af80ece7517ffed00f3a Mon Sep 17 00:00:00 2001
+From fc112f40c9d15990686e0481db5bb5ed23567299 Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:48 +0100
-Subject: [PATCH 254/381] clk: bcm2835: Add PWM clock support
+Subject: [PATCH 254/423] clk: bcm2835: Add PWM clock support
Register the pwm clock for bcm2835.
-From 4b1216203d83ff57820312dafb9a0b3500f03f80 Mon Sep 17 00:00:00 2001
+From b1871ea5430a67f6476c666b70985924f27a88a0 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Tue, 22 Dec 2015 20:13:08 +0000
-Subject: [PATCH 255/381] clk: bcm2835: added missing clock register
+Subject: [PATCH 255/423] clk: bcm2835: added missing clock register
definitions
Added missing CTRL and DIV clock register definitions for:
--- /dev/null
+From 7182f4321e85d4911762f7dd2b38e6e1a7919073 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 11:39:21 +0000
+Subject: [PATCH 256/423] clk: bcm2835: correctly enable fractional clock
+ support
+
+The current driver calculates the clock divider with
+fractional support enabled.
+
+But it does not enable fractional support in the
+control register itself resulting in an integer only divider,
+but in clk_set_rate responds back the fractionally divided
+clock frequency.
+
+This patch enables fractional support in the control register
+whenever there is a fractional bit set in the requested clock divider.
+
+Mash clock limits are are also handled for the PWM clock
+applying the correct divider limits (2 and max_int) applicable to
+basic fractional divider support (mash order of 1).
+
+It also adds locking to protect the read/modify/write cycle of
+the register modification.
+
+Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the
+audio domain clocks")
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 959ca92a3235fc4b17c1e18483fc390b3d612254)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 45 +++++++++++++++++++++++++++++++++++++------
+ 1 file changed, 39 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -51,6 +51,7 @@
+ #define CM_GNRICCTL 0x000
+ #define CM_GNRICDIV 0x004
+ # define CM_DIV_FRAC_BITS 12
++# define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0)
+
+ #define CM_VPUCTL 0x008
+ #define CM_VPUDIV 0x00c
+@@ -128,6 +129,7 @@
+ # define CM_GATE BIT(CM_GATE_BIT)
+ # define CM_BUSY BIT(7)
+ # define CM_BUSYD BIT(8)
++# define CM_FRAC BIT(9)
+ # define CM_SRC_SHIFT 0
+ # define CM_SRC_BITS 4
+ # define CM_SRC_MASK 0xf
+@@ -647,6 +649,7 @@ struct bcm2835_clock_data {
+ u32 frac_bits;
+
+ bool is_vpu_clock;
++ bool is_mash_clock;
+ };
+
+ static const char *const bcm2835_clock_per_parents[] = {
+@@ -828,6 +831,7 @@ static const struct bcm2835_clock_data b
+ .div_reg = CM_PWMDIV,
+ .int_bits = 12,
+ .frac_bits = 12,
++ .is_mash_clock = true,
+ };
+
+ struct bcm2835_pll {
+@@ -1196,7 +1200,7 @@ static u32 bcm2835_clock_choose_div(stru
+ GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1;
+ u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS;
+ u64 rem;
+- u32 div;
++ u32 div, mindiv, maxdiv;
+
+ rem = do_div(temp, rate);
+ div = temp;
+@@ -1206,11 +1210,23 @@ static u32 bcm2835_clock_choose_div(stru
+ div += unused_frac_mask + 1;
+ div &= ~unused_frac_mask;
+
+- /* clamp to min divider of 1 */
+- div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS);
+- /* clamp to the highest possible fractional divider */
+- div = min_t(u32, div, GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1,
+- CM_DIV_FRAC_BITS - data->frac_bits));
++ /* different clamping limits apply for a mash clock */
++ if (data->is_mash_clock) {
++ /* clamp to min divider of 2 */
++ mindiv = 2 << CM_DIV_FRAC_BITS;
++ /* clamp to the highest possible integer divider */
++ maxdiv = (BIT(data->int_bits) - 1) << CM_DIV_FRAC_BITS;
++ } else {
++ /* clamp to min divider of 1 */
++ mindiv = 1 << CM_DIV_FRAC_BITS;
++ /* clamp to the highest possible fractional divider */
++ maxdiv = GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1,
++ CM_DIV_FRAC_BITS - data->frac_bits);
++ }
++
++ /* apply the clamping limits */
++ div = max_t(u32, div, mindiv);
++ div = min_t(u32, div, maxdiv);
+
+ return div;
+ }
+@@ -1304,9 +1320,26 @@ static int bcm2835_clock_set_rate(struct
+ struct bcm2835_cprman *cprman = clock->cprman;
+ const struct bcm2835_clock_data *data = clock->data;
+ u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false);
++ u32 ctl;
++
++ spin_lock(&cprman->regs_lock);
++
++ /*
++ * Setting up frac support
++ *
++ * In principle it is recommended to stop/start the clock first,
++ * but as we set CLK_SET_RATE_GATE during registration of the
++ * clock this requirement should be take care of by the
++ * clk-framework.
++ */
++ ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC;
++ ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
++ cprman_write(cprman, data->ctl_reg, ctl);
+
+ cprman_write(cprman, data->div_reg, div);
+
++ spin_unlock(&cprman->regs_lock);
++
+ return 0;
+ }
+
--- /dev/null
+From 9da8191efd09a55914c0078ee23317cd79c48b15 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 11:39:22 +0000
+Subject: [PATCH 257/423] clk: bcm2835: clean up coding style issues
+
+Fix all the checkpatch complaints for clk-bcm2835.c
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 6e1e60dacee7b32aef1468ea461b02e4c7a90a45)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -12,9 +12,6 @@
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+ /**
+@@ -299,7 +296,7 @@
+ struct bcm2835_cprman {
+ struct device *dev;
+ void __iomem *regs;
+- spinlock_t regs_lock;
++ spinlock_t regs_lock; /* spinlock for all clocks */
+ const char *osc_name;
+
+ struct clk_onecell_data onecell;
+@@ -1344,7 +1341,7 @@ static int bcm2835_clock_set_rate(struct
+ }
+
+ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
+- struct clk_rate_request *req)
++ struct clk_rate_request *req)
+ {
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct clk_hw *parent, *best_parent = NULL;
+@@ -1402,7 +1399,6 @@ static u8 bcm2835_clock_get_parent(struc
+ return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
+ }
+
+-
+ static const struct clk_ops bcm2835_clock_clk_ops = {
+ .is_prepared = bcm2835_clock_is_on,
+ .prepare = bcm2835_clock_on,
+++ /dev/null
-From 926cfaabf67bd4a1d2b7e0153e56805066b5c8c5 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 11:39:21 +0000
-Subject: [PATCH 258/381] clk: bcm2835: correctly enable fractional clock
- support
-
-The current driver calculates the clock divider with
-fractional support enabled.
-
-But it does not enable fractional support in the
-control register itself resulting in an integer only divider,
-but in clk_set_rate responds back the fractionally divided
-clock frequency.
-
-This patch enables fractional support in the control register
-whenever there is a fractional bit set in the requested clock divider.
-
-Mash clock limits are are also handled for the PWM clock
-applying the correct divider limits (2 and max_int) applicable to
-basic fractional divider support (mash order of 1).
-
-It also adds locking to protect the read/modify/write cycle of
-the register modification.
-
-Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the
-audio domain clocks")
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 959ca92a3235fc4b17c1e18483fc390b3d612254)
----
- drivers/clk/bcm/clk-bcm2835.c | 45 +++++++++++++++++++++++++++++++++++++------
- 1 file changed, 39 insertions(+), 6 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -51,6 +51,7 @@
- #define CM_GNRICCTL 0x000
- #define CM_GNRICDIV 0x004
- # define CM_DIV_FRAC_BITS 12
-+# define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0)
-
- #define CM_VPUCTL 0x008
- #define CM_VPUDIV 0x00c
-@@ -128,6 +129,7 @@
- # define CM_GATE BIT(CM_GATE_BIT)
- # define CM_BUSY BIT(7)
- # define CM_BUSYD BIT(8)
-+# define CM_FRAC BIT(9)
- # define CM_SRC_SHIFT 0
- # define CM_SRC_BITS 4
- # define CM_SRC_MASK 0xf
-@@ -647,6 +649,7 @@ struct bcm2835_clock_data {
- u32 frac_bits;
-
- bool is_vpu_clock;
-+ bool is_mash_clock;
- };
-
- static const char *const bcm2835_clock_per_parents[] = {
-@@ -828,6 +831,7 @@ static const struct bcm2835_clock_data b
- .div_reg = CM_PWMDIV,
- .int_bits = 12,
- .frac_bits = 12,
-+ .is_mash_clock = true,
- };
-
- struct bcm2835_pll {
-@@ -1196,7 +1200,7 @@ static u32 bcm2835_clock_choose_div(stru
- GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1;
- u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS;
- u64 rem;
-- u32 div;
-+ u32 div, mindiv, maxdiv;
-
- rem = do_div(temp, rate);
- div = temp;
-@@ -1206,11 +1210,23 @@ static u32 bcm2835_clock_choose_div(stru
- div += unused_frac_mask + 1;
- div &= ~unused_frac_mask;
-
-- /* clamp to min divider of 1 */
-- div = max_t(u32, div, 1 << CM_DIV_FRAC_BITS);
-- /* clamp to the highest possible fractional divider */
-- div = min_t(u32, div, GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1,
-- CM_DIV_FRAC_BITS - data->frac_bits));
-+ /* different clamping limits apply for a mash clock */
-+ if (data->is_mash_clock) {
-+ /* clamp to min divider of 2 */
-+ mindiv = 2 << CM_DIV_FRAC_BITS;
-+ /* clamp to the highest possible integer divider */
-+ maxdiv = (BIT(data->int_bits) - 1) << CM_DIV_FRAC_BITS;
-+ } else {
-+ /* clamp to min divider of 1 */
-+ mindiv = 1 << CM_DIV_FRAC_BITS;
-+ /* clamp to the highest possible fractional divider */
-+ maxdiv = GENMASK(data->int_bits + CM_DIV_FRAC_BITS - 1,
-+ CM_DIV_FRAC_BITS - data->frac_bits);
-+ }
-+
-+ /* apply the clamping limits */
-+ div = max_t(u32, div, mindiv);
-+ div = min_t(u32, div, maxdiv);
-
- return div;
- }
-@@ -1304,9 +1320,26 @@ static int bcm2835_clock_set_rate(struct
- struct bcm2835_cprman *cprman = clock->cprman;
- const struct bcm2835_clock_data *data = clock->data;
- u32 div = bcm2835_clock_choose_div(hw, rate, parent_rate, false);
-+ u32 ctl;
-+
-+ spin_lock(&cprman->regs_lock);
-+
-+ /*
-+ * Setting up frac support
-+ *
-+ * In principle it is recommended to stop/start the clock first,
-+ * but as we set CLK_SET_RATE_GATE during registration of the
-+ * clock this requirement should be take care of by the
-+ * clk-framework.
-+ */
-+ ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC;
-+ ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
-+ cprman_write(cprman, data->ctl_reg, ctl);
-
- cprman_write(cprman, data->div_reg, div);
-
-+ spin_unlock(&cprman->regs_lock);
-+
- return 0;
- }
-
--- /dev/null
+From f057d681e2af27bd013072cf8b46df927d4c03d1 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 14:20:15 +0000
+Subject: [PATCH 258/423] clk: bcm2835: expose raw clock-registers via debugfs
+
+For debugging purposes under some circumstance
+it helps to be able to see the actual clock registers.
+
+E.g: when looking at the clock divider it is helpful to
+see what the actual clock divider is.
+
+This patch exposes all the clock registers specific to each
+clock/pll/pll-divider via debugfs.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 96bf9c69d5729781018a00f08e2ae395ec3346b4)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 101 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 101 insertions(+)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -37,6 +37,7 @@
+ #include <linux/clk-provider.h>
+ #include <linux/clkdev.h>
+ #include <linux/clk/bcm2835.h>
++#include <linux/debugfs.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <linux/platform_device.h>
+@@ -313,6 +314,27 @@ static inline u32 cprman_read(struct bcm
+ return readl(cprman->regs + reg);
+ }
+
++static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
++ struct debugfs_reg32 *regs, size_t nregs,
++ struct dentry *dentry)
++{
++ struct dentry *regdump;
++ struct debugfs_regset32 *regset;
++
++ regset = devm_kzalloc(cprman->dev, sizeof(*regset), GFP_KERNEL);
++ if (!regset)
++ return -ENOMEM;
++
++ regset->regs = regs;
++ regset->nregs = nregs;
++ regset->base = cprman->regs + base;
++
++ regdump = debugfs_create_regset32("regdump", S_IRUGO, dentry,
++ regset);
++
++ return regdump ? 0 : -ENOMEM;
++}
++
+ /*
+ * These are fixed clocks. They're probably not all root clocks and it may
+ * be possible to turn them on and off but until this is mapped out better
+@@ -1044,6 +1066,36 @@ static int bcm2835_pll_set_rate(struct c
+ return 0;
+ }
+
++static int bcm2835_pll_debug_init(struct clk_hw *hw,
++ struct dentry *dentry)
++{
++ struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
++ struct bcm2835_cprman *cprman = pll->cprman;
++ const struct bcm2835_pll_data *data = pll->data;
++ struct debugfs_reg32 *regs;
++
++ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
++ if (!regs)
++ return -ENOMEM;
++
++ regs[0].name = "cm_ctrl";
++ regs[0].offset = data->cm_ctrl_reg;
++ regs[1].name = "a2w_ctrl";
++ regs[1].offset = data->a2w_ctrl_reg;
++ regs[2].name = "frac";
++ regs[2].offset = data->frac_reg;
++ regs[3].name = "ana0";
++ regs[3].offset = data->ana_reg_base + 0 * 4;
++ regs[4].name = "ana1";
++ regs[4].offset = data->ana_reg_base + 1 * 4;
++ regs[5].name = "ana2";
++ regs[5].offset = data->ana_reg_base + 2 * 4;
++ regs[6].name = "ana3";
++ regs[6].offset = data->ana_reg_base + 3 * 4;
++
++ return bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
++}
++
+ static const struct clk_ops bcm2835_pll_clk_ops = {
+ .is_prepared = bcm2835_pll_is_on,
+ .prepare = bcm2835_pll_on,
+@@ -1051,6 +1103,7 @@ static const struct clk_ops bcm2835_pll_
+ .recalc_rate = bcm2835_pll_get_rate,
+ .set_rate = bcm2835_pll_set_rate,
+ .round_rate = bcm2835_pll_round_rate,
++ .debug_init = bcm2835_pll_debug_init,
+ };
+
+ struct bcm2835_pll_divider {
+@@ -1151,6 +1204,26 @@ static int bcm2835_pll_divider_set_rate(
+ return 0;
+ }
+
++static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
++ struct dentry *dentry)
++{
++ struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw);
++ struct bcm2835_cprman *cprman = divider->cprman;
++ const struct bcm2835_pll_divider_data *data = divider->data;
++ struct debugfs_reg32 *regs;
++
++ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
++ if (!regs)
++ return -ENOMEM;
++
++ regs[0].name = "cm";
++ regs[0].offset = data->cm_reg;
++ regs[1].name = "a2w";
++ regs[1].offset = data->a2w_reg;
++
++ return bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
++}
++
+ static const struct clk_ops bcm2835_pll_divider_clk_ops = {
+ .is_prepared = bcm2835_pll_divider_is_on,
+ .prepare = bcm2835_pll_divider_on,
+@@ -1158,6 +1231,7 @@ static const struct clk_ops bcm2835_pll_
+ .recalc_rate = bcm2835_pll_divider_get_rate,
+ .set_rate = bcm2835_pll_divider_set_rate,
+ .round_rate = bcm2835_pll_divider_round_rate,
++ .debug_init = bcm2835_pll_divider_debug_init,
+ };
+
+ /*
+@@ -1399,6 +1473,31 @@ static u8 bcm2835_clock_get_parent(struc
+ return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
+ }
+
++static struct debugfs_reg32 bcm2835_debugfs_clock_reg32[] = {
++ {
++ .name = "ctl",
++ .offset = 0,
++ },
++ {
++ .name = "div",
++ .offset = 4,
++ },
++};
++
++static int bcm2835_clock_debug_init(struct clk_hw *hw,
++ struct dentry *dentry)
++{
++ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
++ struct bcm2835_cprman *cprman = clock->cprman;
++ const struct bcm2835_clock_data *data = clock->data;
++
++ return bcm2835_debugfs_regset(
++ cprman, data->ctl_reg,
++ bcm2835_debugfs_clock_reg32,
++ ARRAY_SIZE(bcm2835_debugfs_clock_reg32),
++ dentry);
++}
++
+ static const struct clk_ops bcm2835_clock_clk_ops = {
+ .is_prepared = bcm2835_clock_is_on,
+ .prepare = bcm2835_clock_on,
+@@ -1408,6 +1507,7 @@ static const struct clk_ops bcm2835_cloc
+ .determine_rate = bcm2835_clock_determine_rate,
+ .set_parent = bcm2835_clock_set_parent,
+ .get_parent = bcm2835_clock_get_parent,
++ .debug_init = bcm2835_clock_debug_init,
+ };
+
+ static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
+@@ -1426,6 +1526,7 @@ static const struct clk_ops bcm2835_vpu_
+ .determine_rate = bcm2835_clock_determine_rate,
+ .set_parent = bcm2835_clock_set_parent,
+ .get_parent = bcm2835_clock_get_parent,
++ .debug_init = bcm2835_clock_debug_init,
+ };
+
+ static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
+++ /dev/null
-From 97799edbda33efb8ebb20785bc7ad76c1b8a0aa9 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 11:39:22 +0000
-Subject: [PATCH 259/381] clk: bcm2835: clean up coding style issues
-
-Fix all the checkpatch complaints for clk-bcm2835.c
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 6e1e60dacee7b32aef1468ea461b02e4c7a90a45)
----
- drivers/clk/bcm/clk-bcm2835.c | 8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -12,9 +12,6 @@
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
- /**
-@@ -299,7 +296,7 @@
- struct bcm2835_cprman {
- struct device *dev;
- void __iomem *regs;
-- spinlock_t regs_lock;
-+ spinlock_t regs_lock; /* spinlock for all clocks */
- const char *osc_name;
-
- struct clk_onecell_data onecell;
-@@ -1344,7 +1341,7 @@ static int bcm2835_clock_set_rate(struct
- }
-
- static int bcm2835_clock_determine_rate(struct clk_hw *hw,
-- struct clk_rate_request *req)
-+ struct clk_rate_request *req)
- {
- struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- struct clk_hw *parent, *best_parent = NULL;
-@@ -1402,7 +1399,6 @@ static u8 bcm2835_clock_get_parent(struc
- return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
- }
-
--
- static const struct clk_ops bcm2835_clock_clk_ops = {
- .is_prepared = bcm2835_clock_is_on,
- .prepare = bcm2835_clock_on,
--- /dev/null
+From 6cf07099604e362169932d82444a0f234cc8cbe0 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 12:51:41 +0000
+Subject: [PATCH 259/423] clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in
+ driver
+
+As the use of BCM2835_CLOCK_COUNT in
+include/dt-bindings/clock/bcm2835.h is frowned upon as
+it needs to get modified every time a new clock gets introduced
+this patch changes the clk-bcm2835 driver to use a different
+scheme for registration of clocks and pll, so that there
+is no more need for BCM2835_CLOCK_COUNT to be defined.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 56eb3a2ed9726961e1bcfa69d4a3f86d68f0eb52)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 167 ++++++++++++++++++++----------------
+ include/dt-bindings/clock/bcm2835.h | 2 -
+ 2 files changed, 94 insertions(+), 75 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -301,7 +301,7 @@ struct bcm2835_cprman {
+ const char *osc_name;
+
+ struct clk_onecell_data onecell;
+- struct clk *clks[BCM2835_CLOCK_COUNT];
++ struct clk *clks[];
+ };
+
+ static inline void cprman_write(struct bcm2835_cprman *cprman, u32 reg, u32 val)
+@@ -853,6 +853,25 @@ static const struct bcm2835_clock_data b
+ .is_mash_clock = true,
+ };
+
++struct bcm2835_gate_data {
++ const char *name;
++ const char *parent;
++
++ u32 ctl_reg;
++};
++
++/*
++ * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
++ * you have the debug bit set in the power manager, which we
++ * don't bother exposing) are individual gates off of the
++ * non-stop vpu clock.
++ */
++static const struct bcm2835_gate_data bcm2835_clock_peri_image_data = {
++ .name = "peri_image",
++ .parent = "vpu",
++ .ctl_reg = CM_PERIICTL,
++};
++
+ struct bcm2835_pll {
+ struct clk_hw hw;
+ struct bcm2835_cprman *cprman;
+@@ -1658,14 +1677,81 @@ static struct clk *bcm2835_register_cloc
+ return devm_clk_register(cprman->dev, &clock->hw);
+ }
+
++static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
++ const struct bcm2835_gate_data *data)
++{
++ return clk_register_gate(cprman->dev, data->name, data->parent,
++ CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
++ cprman->regs + data->ctl_reg,
++ CM_GATE_BIT, 0, &cprman->regs_lock);
++}
++
++typedef struct clk *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
++ const void *data);
++struct bcm2835_clk_desc {
++ bcm2835_clk_register clk_register;
++ const void *data;
++};
++
++#define _REGISTER(f, d) { .clk_register = (bcm2835_clk_register)f, \
++ .data = d }
++#define REGISTER_PLL(d) _REGISTER(&bcm2835_register_pll, d)
++#define REGISTER_PLL_DIV(d) _REGISTER(&bcm2835_register_pll_divider, d)
++#define REGISTER_CLK(d) _REGISTER(&bcm2835_register_clock, d)
++#define REGISTER_GATE(d) _REGISTER(&bcm2835_register_gate, d)
++
++static const struct bcm2835_clk_desc clk_desc_array[] = {
++ /* register PLL */
++ [BCM2835_PLLA] = REGISTER_PLL(&bcm2835_plla_data),
++ [BCM2835_PLLB] = REGISTER_PLL(&bcm2835_pllb_data),
++ [BCM2835_PLLC] = REGISTER_PLL(&bcm2835_pllc_data),
++ [BCM2835_PLLD] = REGISTER_PLL(&bcm2835_plld_data),
++ [BCM2835_PLLH] = REGISTER_PLL(&bcm2835_pllh_data),
++ /* the PLL dividers */
++ [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(&bcm2835_plla_core_data),
++ [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(&bcm2835_plla_per_data),
++ [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(&bcm2835_pllc_core0_data),
++ [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(&bcm2835_pllc_core1_data),
++ [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(&bcm2835_pllc_core2_data),
++ [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(&bcm2835_pllc_per_data),
++ [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(&bcm2835_plld_core_data),
++ [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(&bcm2835_plld_per_data),
++ [BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(&bcm2835_pllh_rcal_data),
++ [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(&bcm2835_pllh_aux_data),
++ [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(&bcm2835_pllh_pix_data),
++ /* the clocks */
++ [BCM2835_CLOCK_TIMER] = REGISTER_CLK(&bcm2835_clock_timer_data),
++ [BCM2835_CLOCK_OTP] = REGISTER_CLK(&bcm2835_clock_otp_data),
++ [BCM2835_CLOCK_TSENS] = REGISTER_CLK(&bcm2835_clock_tsens_data),
++ [BCM2835_CLOCK_VPU] = REGISTER_CLK(&bcm2835_clock_vpu_data),
++ [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
++ [BCM2835_CLOCK_ISP] = REGISTER_CLK(&bcm2835_clock_isp_data),
++ [BCM2835_CLOCK_H264] = REGISTER_CLK(&bcm2835_clock_h264_data),
++ [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
++ [BCM2835_CLOCK_SDRAM] = REGISTER_CLK(&bcm2835_clock_sdram_data),
++ [BCM2835_CLOCK_UART] = REGISTER_CLK(&bcm2835_clock_uart_data),
++ [BCM2835_CLOCK_VEC] = REGISTER_CLK(&bcm2835_clock_vec_data),
++ [BCM2835_CLOCK_HSM] = REGISTER_CLK(&bcm2835_clock_hsm_data),
++ [BCM2835_CLOCK_EMMC] = REGISTER_CLK(&bcm2835_clock_emmc_data),
++ [BCM2835_CLOCK_PWM] = REGISTER_CLK(&bcm2835_clock_pwm_data),
++ /* the gates */
++ [BCM2835_CLOCK_PERI_IMAGE] = REGISTER_GATE(
++ &bcm2835_clock_peri_image_data),
++};
++
+ static int bcm2835_clk_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+ struct clk **clks;
+ struct bcm2835_cprman *cprman;
+ struct resource *res;
++ const struct bcm2835_clk_desc *desc;
++ const size_t asize = ARRAY_SIZE(clk_desc_array);
++ size_t i;
+
+- cprman = devm_kzalloc(dev, sizeof(*cprman), GFP_KERNEL);
++ cprman = devm_kzalloc(dev,
++ sizeof(*cprman) + asize * sizeof(*clks),
++ GFP_KERNEL);
+ if (!cprman)
+ return -ENOMEM;
+
+@@ -1682,80 +1768,15 @@ static int bcm2835_clk_probe(struct plat
+
+ platform_set_drvdata(pdev, cprman);
+
+- cprman->onecell.clk_num = BCM2835_CLOCK_COUNT;
++ cprman->onecell.clk_num = asize;
+ cprman->onecell.clks = cprman->clks;
+ clks = cprman->clks;
+
+- clks[BCM2835_PLLA] = bcm2835_register_pll(cprman, &bcm2835_plla_data);
+- clks[BCM2835_PLLB] = bcm2835_register_pll(cprman, &bcm2835_pllb_data);
+- clks[BCM2835_PLLC] = bcm2835_register_pll(cprman, &bcm2835_pllc_data);
+- clks[BCM2835_PLLD] = bcm2835_register_pll(cprman, &bcm2835_plld_data);
+- clks[BCM2835_PLLH] = bcm2835_register_pll(cprman, &bcm2835_pllh_data);
+-
+- clks[BCM2835_PLLA_CORE] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_plla_core_data);
+- clks[BCM2835_PLLA_PER] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_plla_per_data);
+- clks[BCM2835_PLLC_CORE0] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_core0_data);
+- clks[BCM2835_PLLC_CORE1] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_core1_data);
+- clks[BCM2835_PLLC_CORE2] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_core2_data);
+- clks[BCM2835_PLLC_PER] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_per_data);
+- clks[BCM2835_PLLD_CORE] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_plld_core_data);
+- clks[BCM2835_PLLD_PER] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_plld_per_data);
+- clks[BCM2835_PLLH_RCAL] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllh_rcal_data);
+- clks[BCM2835_PLLH_AUX] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllh_aux_data);
+- clks[BCM2835_PLLH_PIX] =
+- bcm2835_register_pll_divider(cprman, &bcm2835_pllh_pix_data);
+-
+- clks[BCM2835_CLOCK_TIMER] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_timer_data);
+- clks[BCM2835_CLOCK_OTP] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_otp_data);
+- clks[BCM2835_CLOCK_TSENS] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_tsens_data);
+- clks[BCM2835_CLOCK_VPU] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_vpu_data);
+- clks[BCM2835_CLOCK_V3D] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_v3d_data);
+- clks[BCM2835_CLOCK_ISP] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_isp_data);
+- clks[BCM2835_CLOCK_H264] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_h264_data);
+- clks[BCM2835_CLOCK_V3D] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_v3d_data);
+- clks[BCM2835_CLOCK_SDRAM] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_sdram_data);
+- clks[BCM2835_CLOCK_UART] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_uart_data);
+- clks[BCM2835_CLOCK_VEC] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_vec_data);
+- clks[BCM2835_CLOCK_HSM] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_hsm_data);
+- clks[BCM2835_CLOCK_EMMC] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_emmc_data);
+-
+- /*
+- * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
+- * you have the debug bit set in the power manager, which we
+- * don't bother exposing) are individual gates off of the
+- * non-stop vpu clock.
+- */
+- clks[BCM2835_CLOCK_PERI_IMAGE] =
+- clk_register_gate(dev, "peri_image", "vpu",
+- CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
+- cprman->regs + CM_PERIICTL, CM_GATE_BIT,
+- 0, &cprman->regs_lock);
+-
+- clks[BCM2835_CLOCK_PWM] =
+- bcm2835_register_clock(cprman, &bcm2835_clock_pwm_data);
++ for (i = 0; i < asize; i++) {
++ desc = &clk_desc_array[i];
++ if (desc->clk_register && desc->data)
++ clks[i] = desc->clk_register(cprman, desc->data);
++ }
+
+ return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
+ &cprman->onecell);
+--- a/include/dt-bindings/clock/bcm2835.h
++++ b/include/dt-bindings/clock/bcm2835.h
+@@ -44,5 +44,3 @@
+ #define BCM2835_CLOCK_EMMC 28
+ #define BCM2835_CLOCK_PERI_IMAGE 29
+ #define BCM2835_CLOCK_PWM 30
+-
+-#define BCM2835_CLOCK_COUNT 31
+++ /dev/null
-From d1f7529b457f1f1ff248e632ee8218b5d442baa0 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 14:20:15 +0000
-Subject: [PATCH 260/381] clk: bcm2835: expose raw clock-registers via debugfs
-
-For debugging purposes under some circumstance
-it helps to be able to see the actual clock registers.
-
-E.g: when looking at the clock divider it is helpful to
-see what the actual clock divider is.
-
-This patch exposes all the clock registers specific to each
-clock/pll/pll-divider via debugfs.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 96bf9c69d5729781018a00f08e2ae395ec3346b4)
----
- drivers/clk/bcm/clk-bcm2835.c | 101 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 101 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -37,6 +37,7 @@
- #include <linux/clk-provider.h>
- #include <linux/clkdev.h>
- #include <linux/clk/bcm2835.h>
-+#include <linux/debugfs.h>
- #include <linux/module.h>
- #include <linux/of.h>
- #include <linux/platform_device.h>
-@@ -313,6 +314,27 @@ static inline u32 cprman_read(struct bcm
- return readl(cprman->regs + reg);
- }
-
-+static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base,
-+ struct debugfs_reg32 *regs, size_t nregs,
-+ struct dentry *dentry)
-+{
-+ struct dentry *regdump;
-+ struct debugfs_regset32 *regset;
-+
-+ regset = devm_kzalloc(cprman->dev, sizeof(*regset), GFP_KERNEL);
-+ if (!regset)
-+ return -ENOMEM;
-+
-+ regset->regs = regs;
-+ regset->nregs = nregs;
-+ regset->base = cprman->regs + base;
-+
-+ regdump = debugfs_create_regset32("regdump", S_IRUGO, dentry,
-+ regset);
-+
-+ return regdump ? 0 : -ENOMEM;
-+}
-+
- /*
- * These are fixed clocks. They're probably not all root clocks and it may
- * be possible to turn them on and off but until this is mapped out better
-@@ -1044,6 +1066,36 @@ static int bcm2835_pll_set_rate(struct c
- return 0;
- }
-
-+static int bcm2835_pll_debug_init(struct clk_hw *hw,
-+ struct dentry *dentry)
-+{
-+ struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
-+ struct bcm2835_cprman *cprman = pll->cprman;
-+ const struct bcm2835_pll_data *data = pll->data;
-+ struct debugfs_reg32 *regs;
-+
-+ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
-+ if (!regs)
-+ return -ENOMEM;
-+
-+ regs[0].name = "cm_ctrl";
-+ regs[0].offset = data->cm_ctrl_reg;
-+ regs[1].name = "a2w_ctrl";
-+ regs[1].offset = data->a2w_ctrl_reg;
-+ regs[2].name = "frac";
-+ regs[2].offset = data->frac_reg;
-+ regs[3].name = "ana0";
-+ regs[3].offset = data->ana_reg_base + 0 * 4;
-+ regs[4].name = "ana1";
-+ regs[4].offset = data->ana_reg_base + 1 * 4;
-+ regs[5].name = "ana2";
-+ regs[5].offset = data->ana_reg_base + 2 * 4;
-+ regs[6].name = "ana3";
-+ regs[6].offset = data->ana_reg_base + 3 * 4;
-+
-+ return bcm2835_debugfs_regset(cprman, 0, regs, 7, dentry);
-+}
-+
- static const struct clk_ops bcm2835_pll_clk_ops = {
- .is_prepared = bcm2835_pll_is_on,
- .prepare = bcm2835_pll_on,
-@@ -1051,6 +1103,7 @@ static const struct clk_ops bcm2835_pll_
- .recalc_rate = bcm2835_pll_get_rate,
- .set_rate = bcm2835_pll_set_rate,
- .round_rate = bcm2835_pll_round_rate,
-+ .debug_init = bcm2835_pll_debug_init,
- };
-
- struct bcm2835_pll_divider {
-@@ -1151,6 +1204,26 @@ static int bcm2835_pll_divider_set_rate(
- return 0;
- }
-
-+static int bcm2835_pll_divider_debug_init(struct clk_hw *hw,
-+ struct dentry *dentry)
-+{
-+ struct bcm2835_pll_divider *divider = bcm2835_pll_divider_from_hw(hw);
-+ struct bcm2835_cprman *cprman = divider->cprman;
-+ const struct bcm2835_pll_divider_data *data = divider->data;
-+ struct debugfs_reg32 *regs;
-+
-+ regs = devm_kzalloc(cprman->dev, 7 * sizeof(*regs), GFP_KERNEL);
-+ if (!regs)
-+ return -ENOMEM;
-+
-+ regs[0].name = "cm";
-+ regs[0].offset = data->cm_reg;
-+ regs[1].name = "a2w";
-+ regs[1].offset = data->a2w_reg;
-+
-+ return bcm2835_debugfs_regset(cprman, 0, regs, 2, dentry);
-+}
-+
- static const struct clk_ops bcm2835_pll_divider_clk_ops = {
- .is_prepared = bcm2835_pll_divider_is_on,
- .prepare = bcm2835_pll_divider_on,
-@@ -1158,6 +1231,7 @@ static const struct clk_ops bcm2835_pll_
- .recalc_rate = bcm2835_pll_divider_get_rate,
- .set_rate = bcm2835_pll_divider_set_rate,
- .round_rate = bcm2835_pll_divider_round_rate,
-+ .debug_init = bcm2835_pll_divider_debug_init,
- };
-
- /*
-@@ -1399,6 +1473,31 @@ static u8 bcm2835_clock_get_parent(struc
- return (src & CM_SRC_MASK) >> CM_SRC_SHIFT;
- }
-
-+static struct debugfs_reg32 bcm2835_debugfs_clock_reg32[] = {
-+ {
-+ .name = "ctl",
-+ .offset = 0,
-+ },
-+ {
-+ .name = "div",
-+ .offset = 4,
-+ },
-+};
-+
-+static int bcm2835_clock_debug_init(struct clk_hw *hw,
-+ struct dentry *dentry)
-+{
-+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
-+ struct bcm2835_cprman *cprman = clock->cprman;
-+ const struct bcm2835_clock_data *data = clock->data;
-+
-+ return bcm2835_debugfs_regset(
-+ cprman, data->ctl_reg,
-+ bcm2835_debugfs_clock_reg32,
-+ ARRAY_SIZE(bcm2835_debugfs_clock_reg32),
-+ dentry);
-+}
-+
- static const struct clk_ops bcm2835_clock_clk_ops = {
- .is_prepared = bcm2835_clock_is_on,
- .prepare = bcm2835_clock_on,
-@@ -1408,6 +1507,7 @@ static const struct clk_ops bcm2835_cloc
- .determine_rate = bcm2835_clock_determine_rate,
- .set_parent = bcm2835_clock_set_parent,
- .get_parent = bcm2835_clock_get_parent,
-+ .debug_init = bcm2835_clock_debug_init,
- };
-
- static int bcm2835_vpu_clock_is_on(struct clk_hw *hw)
-@@ -1426,6 +1526,7 @@ static const struct clk_ops bcm2835_vpu_
- .determine_rate = bcm2835_clock_determine_rate,
- .set_parent = bcm2835_clock_set_parent,
- .get_parent = bcm2835_clock_get_parent,
-+ .debug_init = bcm2835_clock_debug_init,
- };
-
- static struct clk *bcm2835_register_pll(struct bcm2835_cprman *cprman,
--- /dev/null
+From fd09548954d1301cce55d136aaeecd617d36b491 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 12:51:42 +0000
+Subject: [PATCH 260/423] clk: bcm2835: reorganize bcm2835_clock_array
+ assignment
+
+Reorganize bcm2835_clock_array so that there is no more
+need for separate bcm2835_*_data structures to be defined.
+Instead the required structures are generated inline via
+helper macros.
+
+To allow this to also work for pll alone it was required that
+the parent_pll was changed from a pointer to bcm2835_pll_data
+to the name of the pll instead.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 3b15afefbef9b5952e3d68ad73d93f981b9faca8)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 852 +++++++++++++++++++-----------------------
+ 1 file changed, 393 insertions(+), 459 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -418,115 +418,10 @@ static const struct bcm2835_pll_ana_bits
+ .fb_prediv_mask = BIT(11),
+ };
+
+-/*
+- * PLLA is the auxiliary PLL, used to drive the CCP2 (Compact Camera
+- * Port 2) transmitter clock.
+- *
+- * It is in the PX LDO power domain, which is on when the AUDIO domain
+- * is on.
+- */
+-static const struct bcm2835_pll_data bcm2835_plla_data = {
+- .name = "plla",
+- .cm_ctrl_reg = CM_PLLA,
+- .a2w_ctrl_reg = A2W_PLLA_CTRL,
+- .frac_reg = A2W_PLLA_FRAC,
+- .ana_reg_base = A2W_PLLA_ANA0,
+- .reference_enable_mask = A2W_XOSC_CTRL_PLLA_ENABLE,
+- .lock_mask = CM_LOCK_FLOCKA,
+-
+- .ana = &bcm2835_ana_default,
+-
+- .min_rate = 600000000u,
+- .max_rate = 2400000000u,
+- .max_fb_rate = BCM2835_MAX_FB_RATE,
+-};
+-
+-/* PLLB is used for the ARM's clock. */
+-static const struct bcm2835_pll_data bcm2835_pllb_data = {
+- .name = "pllb",
+- .cm_ctrl_reg = CM_PLLB,
+- .a2w_ctrl_reg = A2W_PLLB_CTRL,
+- .frac_reg = A2W_PLLB_FRAC,
+- .ana_reg_base = A2W_PLLB_ANA0,
+- .reference_enable_mask = A2W_XOSC_CTRL_PLLB_ENABLE,
+- .lock_mask = CM_LOCK_FLOCKB,
+-
+- .ana = &bcm2835_ana_default,
+-
+- .min_rate = 600000000u,
+- .max_rate = 3000000000u,
+- .max_fb_rate = BCM2835_MAX_FB_RATE,
+-};
+-
+-/*
+- * PLLC is the core PLL, used to drive the core VPU clock.
+- *
+- * It is in the PX LDO power domain, which is on when the AUDIO domain
+- * is on.
+-*/
+-static const struct bcm2835_pll_data bcm2835_pllc_data = {
+- .name = "pllc",
+- .cm_ctrl_reg = CM_PLLC,
+- .a2w_ctrl_reg = A2W_PLLC_CTRL,
+- .frac_reg = A2W_PLLC_FRAC,
+- .ana_reg_base = A2W_PLLC_ANA0,
+- .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
+- .lock_mask = CM_LOCK_FLOCKC,
+-
+- .ana = &bcm2835_ana_default,
+-
+- .min_rate = 600000000u,
+- .max_rate = 3000000000u,
+- .max_fb_rate = BCM2835_MAX_FB_RATE,
+-};
+-
+-/*
+- * PLLD is the display PLL, used to drive DSI display panels.
+- *
+- * It is in the PX LDO power domain, which is on when the AUDIO domain
+- * is on.
+- */
+-static const struct bcm2835_pll_data bcm2835_plld_data = {
+- .name = "plld",
+- .cm_ctrl_reg = CM_PLLD,
+- .a2w_ctrl_reg = A2W_PLLD_CTRL,
+- .frac_reg = A2W_PLLD_FRAC,
+- .ana_reg_base = A2W_PLLD_ANA0,
+- .reference_enable_mask = A2W_XOSC_CTRL_DDR_ENABLE,
+- .lock_mask = CM_LOCK_FLOCKD,
+-
+- .ana = &bcm2835_ana_default,
+-
+- .min_rate = 600000000u,
+- .max_rate = 2400000000u,
+- .max_fb_rate = BCM2835_MAX_FB_RATE,
+-};
+-
+-/*
+- * PLLH is used to supply the pixel clock or the AUX clock for the TV
+- * encoder.
+- *
+- * It is in the HDMI power domain.
+- */
+-static const struct bcm2835_pll_data bcm2835_pllh_data = {
+- "pllh",
+- .cm_ctrl_reg = CM_PLLH,
+- .a2w_ctrl_reg = A2W_PLLH_CTRL,
+- .frac_reg = A2W_PLLH_FRAC,
+- .ana_reg_base = A2W_PLLH_ANA0,
+- .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
+- .lock_mask = CM_LOCK_FLOCKH,
+-
+- .ana = &bcm2835_ana_pllh,
+-
+- .min_rate = 600000000u,
+- .max_rate = 3000000000u,
+- .max_fb_rate = BCM2835_MAX_FB_RATE,
+-};
+-
+ struct bcm2835_pll_divider_data {
+ const char *name;
+- const struct bcm2835_pll_data *source_pll;
++ const char *source_pll;
++
+ u32 cm_reg;
+ u32 a2w_reg;
+
+@@ -535,124 +430,6 @@ struct bcm2835_pll_divider_data {
+ u32 fixed_divider;
+ };
+
+-static const struct bcm2835_pll_divider_data bcm2835_plla_core_data = {
+- .name = "plla_core",
+- .source_pll = &bcm2835_plla_data,
+- .cm_reg = CM_PLLA,
+- .a2w_reg = A2W_PLLA_CORE,
+- .load_mask = CM_PLLA_LOADCORE,
+- .hold_mask = CM_PLLA_HOLDCORE,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_plla_per_data = {
+- .name = "plla_per",
+- .source_pll = &bcm2835_plla_data,
+- .cm_reg = CM_PLLA,
+- .a2w_reg = A2W_PLLA_PER,
+- .load_mask = CM_PLLA_LOADPER,
+- .hold_mask = CM_PLLA_HOLDPER,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllb_arm_data = {
+- .name = "pllb_arm",
+- .source_pll = &bcm2835_pllb_data,
+- .cm_reg = CM_PLLB,
+- .a2w_reg = A2W_PLLB_ARM,
+- .load_mask = CM_PLLB_LOADARM,
+- .hold_mask = CM_PLLB_HOLDARM,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllc_core0_data = {
+- .name = "pllc_core0",
+- .source_pll = &bcm2835_pllc_data,
+- .cm_reg = CM_PLLC,
+- .a2w_reg = A2W_PLLC_CORE0,
+- .load_mask = CM_PLLC_LOADCORE0,
+- .hold_mask = CM_PLLC_HOLDCORE0,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllc_core1_data = {
+- .name = "pllc_core1", .source_pll = &bcm2835_pllc_data,
+- .cm_reg = CM_PLLC, A2W_PLLC_CORE1,
+- .load_mask = CM_PLLC_LOADCORE1,
+- .hold_mask = CM_PLLC_HOLDCORE1,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllc_core2_data = {
+- .name = "pllc_core2",
+- .source_pll = &bcm2835_pllc_data,
+- .cm_reg = CM_PLLC,
+- .a2w_reg = A2W_PLLC_CORE2,
+- .load_mask = CM_PLLC_LOADCORE2,
+- .hold_mask = CM_PLLC_HOLDCORE2,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllc_per_data = {
+- .name = "pllc_per",
+- .source_pll = &bcm2835_pllc_data,
+- .cm_reg = CM_PLLC,
+- .a2w_reg = A2W_PLLC_PER,
+- .load_mask = CM_PLLC_LOADPER,
+- .hold_mask = CM_PLLC_HOLDPER,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_plld_core_data = {
+- .name = "plld_core",
+- .source_pll = &bcm2835_plld_data,
+- .cm_reg = CM_PLLD,
+- .a2w_reg = A2W_PLLD_CORE,
+- .load_mask = CM_PLLD_LOADCORE,
+- .hold_mask = CM_PLLD_HOLDCORE,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_plld_per_data = {
+- .name = "plld_per",
+- .source_pll = &bcm2835_plld_data,
+- .cm_reg = CM_PLLD,
+- .a2w_reg = A2W_PLLD_PER,
+- .load_mask = CM_PLLD_LOADPER,
+- .hold_mask = CM_PLLD_HOLDPER,
+- .fixed_divider = 1,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllh_rcal_data = {
+- .name = "pllh_rcal",
+- .source_pll = &bcm2835_pllh_data,
+- .cm_reg = CM_PLLH,
+- .a2w_reg = A2W_PLLH_RCAL,
+- .load_mask = CM_PLLH_LOADRCAL,
+- .hold_mask = 0,
+- .fixed_divider = 10,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllh_aux_data = {
+- .name = "pllh_aux",
+- .source_pll = &bcm2835_pllh_data,
+- .cm_reg = CM_PLLH,
+- .a2w_reg = A2W_PLLH_AUX,
+- .load_mask = CM_PLLH_LOADAUX,
+- .hold_mask = 0,
+- .fixed_divider = 10,
+-};
+-
+-static const struct bcm2835_pll_divider_data bcm2835_pllh_pix_data = {
+- .name = "pllh_pix",
+- .source_pll = &bcm2835_pllh_data,
+- .cm_reg = CM_PLLH,
+- .a2w_reg = A2W_PLLH_PIX,
+- .load_mask = CM_PLLH_LOADPIX,
+- .hold_mask = 0,
+- .fixed_divider = 10,
+-};
+-
+ struct bcm2835_clock_data {
+ const char *name;
+
+@@ -671,188 +448,6 @@ struct bcm2835_clock_data {
+ bool is_mash_clock;
+ };
+
+-static const char *const bcm2835_clock_per_parents[] = {
+- "gnd",
+- "xosc",
+- "testdebug0",
+- "testdebug1",
+- "plla_per",
+- "pllc_per",
+- "plld_per",
+- "pllh_aux",
+-};
+-
+-static const char *const bcm2835_clock_vpu_parents[] = {
+- "gnd",
+- "xosc",
+- "testdebug0",
+- "testdebug1",
+- "plla_core",
+- "pllc_core0",
+- "plld_core",
+- "pllh_aux",
+- "pllc_core1",
+- "pllc_core2",
+-};
+-
+-static const char *const bcm2835_clock_osc_parents[] = {
+- "gnd",
+- "xosc",
+- "testdebug0",
+- "testdebug1"
+-};
+-
+-/*
+- * Used for a 1Mhz clock for the system clocksource, and also used by
+- * the watchdog timer and the camera pulse generator.
+- */
+-static const struct bcm2835_clock_data bcm2835_clock_timer_data = {
+- .name = "timer",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents),
+- .parents = bcm2835_clock_osc_parents,
+- .ctl_reg = CM_TIMERCTL,
+- .div_reg = CM_TIMERDIV,
+- .int_bits = 6,
+- .frac_bits = 12,
+-};
+-
+-/* One Time Programmable Memory clock. Maximum 10Mhz. */
+-static const struct bcm2835_clock_data bcm2835_clock_otp_data = {
+- .name = "otp",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents),
+- .parents = bcm2835_clock_osc_parents,
+- .ctl_reg = CM_OTPCTL,
+- .div_reg = CM_OTPDIV,
+- .int_bits = 4,
+- .frac_bits = 0,
+-};
+-
+-/*
+- * VPU clock. This doesn't have an enable bit, since it drives the
+- * bus for everything else, and is special so it doesn't need to be
+- * gated for rate changes. It is also known as "clk_audio" in various
+- * hardware documentation.
+- */
+-static const struct bcm2835_clock_data bcm2835_clock_vpu_data = {
+- .name = "vpu",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
+- .parents = bcm2835_clock_vpu_parents,
+- .ctl_reg = CM_VPUCTL,
+- .div_reg = CM_VPUDIV,
+- .int_bits = 12,
+- .frac_bits = 8,
+- .is_vpu_clock = true,
+-};
+-
+-static const struct bcm2835_clock_data bcm2835_clock_v3d_data = {
+- .name = "v3d",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
+- .parents = bcm2835_clock_vpu_parents,
+- .ctl_reg = CM_V3DCTL,
+- .div_reg = CM_V3DDIV,
+- .int_bits = 4,
+- .frac_bits = 8,
+-};
+-
+-static const struct bcm2835_clock_data bcm2835_clock_isp_data = {
+- .name = "isp",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
+- .parents = bcm2835_clock_vpu_parents,
+- .ctl_reg = CM_ISPCTL,
+- .div_reg = CM_ISPDIV,
+- .int_bits = 4,
+- .frac_bits = 8,
+-};
+-
+-static const struct bcm2835_clock_data bcm2835_clock_h264_data = {
+- .name = "h264",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
+- .parents = bcm2835_clock_vpu_parents,
+- .ctl_reg = CM_H264CTL,
+- .div_reg = CM_H264DIV,
+- .int_bits = 4,
+- .frac_bits = 8,
+-};
+-
+-/* TV encoder clock. Only operating frequency is 108Mhz. */
+-static const struct bcm2835_clock_data bcm2835_clock_vec_data = {
+- .name = "vec",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
+- .parents = bcm2835_clock_per_parents,
+- .ctl_reg = CM_VECCTL,
+- .div_reg = CM_VECDIV,
+- .int_bits = 4,
+- .frac_bits = 0,
+-};
+-
+-static const struct bcm2835_clock_data bcm2835_clock_uart_data = {
+- .name = "uart",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
+- .parents = bcm2835_clock_per_parents,
+- .ctl_reg = CM_UARTCTL,
+- .div_reg = CM_UARTDIV,
+- .int_bits = 10,
+- .frac_bits = 12,
+-};
+-
+-/* HDMI state machine */
+-static const struct bcm2835_clock_data bcm2835_clock_hsm_data = {
+- .name = "hsm",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
+- .parents = bcm2835_clock_per_parents,
+- .ctl_reg = CM_HSMCTL,
+- .div_reg = CM_HSMDIV,
+- .int_bits = 4,
+- .frac_bits = 8,
+-};
+-
+-/*
+- * Secondary SDRAM clock. Used for low-voltage modes when the PLL in
+- * the SDRAM controller can't be used.
+- */
+-static const struct bcm2835_clock_data bcm2835_clock_sdram_data = {
+- .name = "sdram",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
+- .parents = bcm2835_clock_vpu_parents,
+- .ctl_reg = CM_SDCCTL,
+- .div_reg = CM_SDCDIV,
+- .int_bits = 6,
+- .frac_bits = 0,
+-};
+-
+-/* Clock for the temperature sensor. Generally run at 2Mhz, max 5Mhz. */
+-static const struct bcm2835_clock_data bcm2835_clock_tsens_data = {
+- .name = "tsens",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents),
+- .parents = bcm2835_clock_osc_parents,
+- .ctl_reg = CM_TSENSCTL,
+- .div_reg = CM_TSENSDIV,
+- .int_bits = 5,
+- .frac_bits = 0,
+-};
+-
+-/* Arasan EMMC clock */
+-static const struct bcm2835_clock_data bcm2835_clock_emmc_data = {
+- .name = "emmc",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
+- .parents = bcm2835_clock_per_parents,
+- .ctl_reg = CM_EMMCCTL,
+- .div_reg = CM_EMMCDIV,
+- .int_bits = 4,
+- .frac_bits = 8,
+-};
+-
+-static const struct bcm2835_clock_data bcm2835_clock_pwm_data = {
+- .name = "pwm",
+- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
+- .parents = bcm2835_clock_per_parents,
+- .ctl_reg = CM_PWMCTL,
+- .div_reg = CM_PWMDIV,
+- .int_bits = 12,
+- .frac_bits = 12,
+- .is_mash_clock = true,
+-};
+-
+ struct bcm2835_gate_data {
+ const char *name;
+ const char *parent;
+@@ -860,18 +455,6 @@ struct bcm2835_gate_data {
+ u32 ctl_reg;
+ };
+
+-/*
+- * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
+- * you have the debug bit set in the power manager, which we
+- * don't bother exposing) are individual gates off of the
+- * non-stop vpu clock.
+- */
+-static const struct bcm2835_gate_data bcm2835_clock_peri_image_data = {
+- .name = "peri_image",
+- .parent = "vpu",
+- .ctl_reg = CM_PERIICTL,
+-};
+-
+ struct bcm2835_pll {
+ struct clk_hw hw;
+ struct bcm2835_cprman *cprman;
+@@ -1594,7 +1177,7 @@ bcm2835_register_pll_divider(struct bcm2
+
+ memset(&init, 0, sizeof(init));
+
+- init.parent_names = &data->source_pll->name;
++ init.parent_names = &data->source_pll;
+ init.num_parents = 1;
+ init.name = divider_name;
+ init.ops = &bcm2835_pll_divider_clk_ops;
+@@ -1693,50 +1276,401 @@ struct bcm2835_clk_desc {
+ const void *data;
+ };
+
+-#define _REGISTER(f, d) { .clk_register = (bcm2835_clk_register)f, \
+- .data = d }
+-#define REGISTER_PLL(d) _REGISTER(&bcm2835_register_pll, d)
+-#define REGISTER_PLL_DIV(d) _REGISTER(&bcm2835_register_pll_divider, d)
+-#define REGISTER_CLK(d) _REGISTER(&bcm2835_register_clock, d)
+-#define REGISTER_GATE(d) _REGISTER(&bcm2835_register_gate, d)
++/* assignment helper macros for different clock types */
++#define _REGISTER(f, ...) { .clk_register = (bcm2835_clk_register)f, \
++ .data = __VA_ARGS__ }
++#define REGISTER_PLL(...) _REGISTER(&bcm2835_register_pll, \
++ &(struct bcm2835_pll_data) \
++ {__VA_ARGS__})
++#define REGISTER_PLL_DIV(...) _REGISTER(&bcm2835_register_pll_divider, \
++ &(struct bcm2835_pll_divider_data) \
++ {__VA_ARGS__})
++#define REGISTER_CLK(...) _REGISTER(&bcm2835_register_clock, \
++ &(struct bcm2835_clock_data) \
++ {__VA_ARGS__})
++#define REGISTER_GATE(...) _REGISTER(&bcm2835_register_gate, \
++ &(struct bcm2835_gate_data) \
++ {__VA_ARGS__})
++
++/* parent mux arrays plus helper macros */
++
++/* main oscillator parent mux */
++static const char *const bcm2835_clock_osc_parents[] = {
++ "gnd",
++ "xosc",
++ "testdebug0",
++ "testdebug1"
++};
++
++#define REGISTER_OSC_CLK(...) REGISTER_CLK( \
++ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents), \
++ .parents = bcm2835_clock_osc_parents, \
++ __VA_ARGS__)
++
++/* main peripherial parent mux */
++static const char *const bcm2835_clock_per_parents[] = {
++ "gnd",
++ "xosc",
++ "testdebug0",
++ "testdebug1",
++ "plla_per",
++ "pllc_per",
++ "plld_per",
++ "pllh_aux",
++};
++
++#define REGISTER_PER_CLK(...) REGISTER_CLK( \
++ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents), \
++ .parents = bcm2835_clock_per_parents, \
++ __VA_ARGS__)
++
++/* main vpu parent mux */
++static const char *const bcm2835_clock_vpu_parents[] = {
++ "gnd",
++ "xosc",
++ "testdebug0",
++ "testdebug1",
++ "plla_core",
++ "pllc_core0",
++ "plld_core",
++ "pllh_aux",
++ "pllc_core1",
++ "pllc_core2",
++};
++
++#define REGISTER_VPU_CLK(...) REGISTER_CLK( \
++ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents), \
++ .parents = bcm2835_clock_vpu_parents, \
++ __VA_ARGS__)
+
++/*
++ * the real definition of all the pll, pll_dividers and clocks
++ * these make use of the above REGISTER_* macros
++ */
+ static const struct bcm2835_clk_desc clk_desc_array[] = {
+- /* register PLL */
+- [BCM2835_PLLA] = REGISTER_PLL(&bcm2835_plla_data),
+- [BCM2835_PLLB] = REGISTER_PLL(&bcm2835_pllb_data),
+- [BCM2835_PLLC] = REGISTER_PLL(&bcm2835_pllc_data),
+- [BCM2835_PLLD] = REGISTER_PLL(&bcm2835_plld_data),
+- [BCM2835_PLLH] = REGISTER_PLL(&bcm2835_pllh_data),
+- /* the PLL dividers */
+- [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(&bcm2835_plla_core_data),
+- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(&bcm2835_plla_per_data),
+- [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(&bcm2835_pllc_core0_data),
+- [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(&bcm2835_pllc_core1_data),
+- [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(&bcm2835_pllc_core2_data),
+- [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(&bcm2835_pllc_per_data),
+- [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(&bcm2835_plld_core_data),
+- [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(&bcm2835_plld_per_data),
+- [BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(&bcm2835_pllh_rcal_data),
+- [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(&bcm2835_pllh_aux_data),
+- [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(&bcm2835_pllh_pix_data),
++ /* the PLL + PLL dividers */
++
++ /*
++ * PLLA is the auxiliary PLL, used to drive the CCP2
++ * (Compact Camera Port 2) transmitter clock.
++ *
++ * It is in the PX LDO power domain, which is on when the
++ * AUDIO domain is on.
++ */
++ [BCM2835_PLLA] = REGISTER_PLL(
++ .name = "plla",
++ .cm_ctrl_reg = CM_PLLA,
++ .a2w_ctrl_reg = A2W_PLLA_CTRL,
++ .frac_reg = A2W_PLLA_FRAC,
++ .ana_reg_base = A2W_PLLA_ANA0,
++ .reference_enable_mask = A2W_XOSC_CTRL_PLLA_ENABLE,
++ .lock_mask = CM_LOCK_FLOCKA,
++
++ .ana = &bcm2835_ana_default,
++
++ .min_rate = 600000000u,
++ .max_rate = 2400000000u,
++ .max_fb_rate = BCM2835_MAX_FB_RATE),
++ [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(
++ .name = "plla_core",
++ .source_pll = "plla",
++ .cm_reg = CM_PLLA,
++ .a2w_reg = A2W_PLLA_CORE,
++ .load_mask = CM_PLLA_LOADCORE,
++ .hold_mask = CM_PLLA_HOLDCORE,
++ .fixed_divider = 1),
++ [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
++ .name = "plla_per",
++ .source_pll = "plla",
++ .cm_reg = CM_PLLA,
++ .a2w_reg = A2W_PLLA_PER,
++ .load_mask = CM_PLLA_LOADPER,
++ .hold_mask = CM_PLLA_HOLDPER,
++ .fixed_divider = 1),
++
++ /* PLLB is used for the ARM's clock. */
++ [BCM2835_PLLB] = REGISTER_PLL(
++ .name = "pllb",
++ .cm_ctrl_reg = CM_PLLB,
++ .a2w_ctrl_reg = A2W_PLLB_CTRL,
++ .frac_reg = A2W_PLLB_FRAC,
++ .ana_reg_base = A2W_PLLB_ANA0,
++ .reference_enable_mask = A2W_XOSC_CTRL_PLLB_ENABLE,
++ .lock_mask = CM_LOCK_FLOCKB,
++
++ .ana = &bcm2835_ana_default,
++
++ .min_rate = 600000000u,
++ .max_rate = 3000000000u,
++ .max_fb_rate = BCM2835_MAX_FB_RATE),
++ [BCM2835_PLLB_ARM] = REGISTER_PLL_DIV(
++ .name = "pllb_arm",
++ .source_pll = "pllb",
++ .cm_reg = CM_PLLB,
++ .a2w_reg = A2W_PLLB_ARM,
++ .load_mask = CM_PLLB_LOADARM,
++ .hold_mask = CM_PLLB_HOLDARM,
++ .fixed_divider = 1),
++
++ /*
++ * PLLC is the core PLL, used to drive the core VPU clock.
++ *
++ * It is in the PX LDO power domain, which is on when the
++ * AUDIO domain is on.
++ */
++ [BCM2835_PLLC] = REGISTER_PLL(
++ .name = "pllc",
++ .cm_ctrl_reg = CM_PLLC,
++ .a2w_ctrl_reg = A2W_PLLC_CTRL,
++ .frac_reg = A2W_PLLC_FRAC,
++ .ana_reg_base = A2W_PLLC_ANA0,
++ .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
++ .lock_mask = CM_LOCK_FLOCKC,
++
++ .ana = &bcm2835_ana_default,
++
++ .min_rate = 600000000u,
++ .max_rate = 3000000000u,
++ .max_fb_rate = BCM2835_MAX_FB_RATE),
++ [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(
++ .name = "pllc_core0",
++ .source_pll = "pllc",
++ .cm_reg = CM_PLLC,
++ .a2w_reg = A2W_PLLC_CORE0,
++ .load_mask = CM_PLLC_LOADCORE0,
++ .hold_mask = CM_PLLC_HOLDCORE0,
++ .fixed_divider = 1),
++ [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(
++ .name = "pllc_core1",
++ .source_pll = "pllc",
++ .cm_reg = CM_PLLC,
++ .a2w_reg = A2W_PLLC_CORE1,
++ .load_mask = CM_PLLC_LOADCORE1,
++ .hold_mask = CM_PLLC_HOLDCORE1,
++ .fixed_divider = 1),
++ [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(
++ .name = "pllc_core2",
++ .source_pll = "pllc",
++ .cm_reg = CM_PLLC,
++ .a2w_reg = A2W_PLLC_CORE2,
++ .load_mask = CM_PLLC_LOADCORE2,
++ .hold_mask = CM_PLLC_HOLDCORE2,
++ .fixed_divider = 1),
++ [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(
++ .name = "pllc_per",
++ .source_pll = "pllc",
++ .cm_reg = CM_PLLC,
++ .a2w_reg = A2W_PLLC_PER,
++ .load_mask = CM_PLLC_LOADPER,
++ .hold_mask = CM_PLLC_HOLDPER,
++ .fixed_divider = 1),
++
++ /*
++ * PLLD is the display PLL, used to drive DSI display panels.
++ *
++ * It is in the PX LDO power domain, which is on when the
++ * AUDIO domain is on.
++ */
++ [BCM2835_PLLD] = REGISTER_PLL(
++ .name = "plld",
++ .cm_ctrl_reg = CM_PLLD,
++ .a2w_ctrl_reg = A2W_PLLD_CTRL,
++ .frac_reg = A2W_PLLD_FRAC,
++ .ana_reg_base = A2W_PLLD_ANA0,
++ .reference_enable_mask = A2W_XOSC_CTRL_DDR_ENABLE,
++ .lock_mask = CM_LOCK_FLOCKD,
++
++ .ana = &bcm2835_ana_default,
++
++ .min_rate = 600000000u,
++ .max_rate = 2400000000u,
++ .max_fb_rate = BCM2835_MAX_FB_RATE),
++ [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(
++ .name = "plld_core",
++ .source_pll = "plld",
++ .cm_reg = CM_PLLD,
++ .a2w_reg = A2W_PLLD_CORE,
++ .load_mask = CM_PLLD_LOADCORE,
++ .hold_mask = CM_PLLD_HOLDCORE,
++ .fixed_divider = 1),
++ [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(
++ .name = "plld_per",
++ .source_pll = "plld",
++ .cm_reg = CM_PLLD,
++ .a2w_reg = A2W_PLLD_PER,
++ .load_mask = CM_PLLD_LOADPER,
++ .hold_mask = CM_PLLD_HOLDPER,
++ .fixed_divider = 1),
++
++ /*
++ * PLLH is used to supply the pixel clock or the AUX clock for the
++ * TV encoder.
++ *
++ * It is in the HDMI power domain.
++ */
++ [BCM2835_PLLH] = REGISTER_PLL(
++ "pllh",
++ .cm_ctrl_reg = CM_PLLH,
++ .a2w_ctrl_reg = A2W_PLLH_CTRL,
++ .frac_reg = A2W_PLLH_FRAC,
++ .ana_reg_base = A2W_PLLH_ANA0,
++ .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
++ .lock_mask = CM_LOCK_FLOCKH,
++
++ .ana = &bcm2835_ana_pllh,
++
++ .min_rate = 600000000u,
++ .max_rate = 3000000000u,
++ .max_fb_rate = BCM2835_MAX_FB_RATE),
++ [BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(
++ .name = "pllh_rcal",
++ .source_pll = "pllh",
++ .cm_reg = CM_PLLH,
++ .a2w_reg = A2W_PLLH_RCAL,
++ .load_mask = CM_PLLH_LOADRCAL,
++ .hold_mask = 0,
++ .fixed_divider = 10),
++ [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(
++ .name = "pllh_aux",
++ .source_pll = "pllh",
++ .cm_reg = CM_PLLH,
++ .a2w_reg = A2W_PLLH_AUX,
++ .load_mask = CM_PLLH_LOADAUX,
++ .hold_mask = 0,
++ .fixed_divider = 10),
++ [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
++ .name = "pllh_pix",
++ .source_pll = "pllh",
++ .cm_reg = CM_PLLH,
++ .a2w_reg = A2W_PLLH_PIX,
++ .load_mask = CM_PLLH_LOADPIX,
++ .hold_mask = 0,
++ .fixed_divider = 10),
++
+ /* the clocks */
+- [BCM2835_CLOCK_TIMER] = REGISTER_CLK(&bcm2835_clock_timer_data),
+- [BCM2835_CLOCK_OTP] = REGISTER_CLK(&bcm2835_clock_otp_data),
+- [BCM2835_CLOCK_TSENS] = REGISTER_CLK(&bcm2835_clock_tsens_data),
+- [BCM2835_CLOCK_VPU] = REGISTER_CLK(&bcm2835_clock_vpu_data),
+- [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
+- [BCM2835_CLOCK_ISP] = REGISTER_CLK(&bcm2835_clock_isp_data),
+- [BCM2835_CLOCK_H264] = REGISTER_CLK(&bcm2835_clock_h264_data),
+- [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
+- [BCM2835_CLOCK_SDRAM] = REGISTER_CLK(&bcm2835_clock_sdram_data),
+- [BCM2835_CLOCK_UART] = REGISTER_CLK(&bcm2835_clock_uart_data),
+- [BCM2835_CLOCK_VEC] = REGISTER_CLK(&bcm2835_clock_vec_data),
+- [BCM2835_CLOCK_HSM] = REGISTER_CLK(&bcm2835_clock_hsm_data),
+- [BCM2835_CLOCK_EMMC] = REGISTER_CLK(&bcm2835_clock_emmc_data),
+- [BCM2835_CLOCK_PWM] = REGISTER_CLK(&bcm2835_clock_pwm_data),
++
++ /* clocks with oscillator parent mux */
++
++ /* One Time Programmable Memory clock. Maximum 10Mhz. */
++ [BCM2835_CLOCK_OTP] = REGISTER_OSC_CLK(
++ .name = "otp",
++ .ctl_reg = CM_OTPCTL,
++ .div_reg = CM_OTPDIV,
++ .int_bits = 4,
++ .frac_bits = 0),
++ /*
++ * Used for a 1Mhz clock for the system clocksource, and also used
++ * bythe watchdog timer and the camera pulse generator.
++ */
++ [BCM2835_CLOCK_TIMER] = REGISTER_OSC_CLK(
++ .name = "timer",
++ .ctl_reg = CM_TIMERCTL,
++ .div_reg = CM_TIMERDIV,
++ .int_bits = 6,
++ .frac_bits = 12),
++ /*
++ * Clock for the temperature sensor.
++ * Generally run at 2Mhz, max 5Mhz.
++ */
++ [BCM2835_CLOCK_TSENS] = REGISTER_OSC_CLK(
++ .name = "tsens",
++ .ctl_reg = CM_TSENSCTL,
++ .div_reg = CM_TSENSDIV,
++ .int_bits = 5,
++ .frac_bits = 0),
++
++ /* clocks with vpu parent mux */
++ [BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
++ .name = "h264",
++ .ctl_reg = CM_H264CTL,
++ .div_reg = CM_H264DIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ [BCM2835_CLOCK_ISP] = REGISTER_VPU_CLK(
++ .name = "isp",
++ .ctl_reg = CM_ISPCTL,
++ .div_reg = CM_ISPDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ /*
++ * Secondary SDRAM clock. Used for low-voltage modes when the PLL
++ * in the SDRAM controller can't be used.
++ */
++ [BCM2835_CLOCK_SDRAM] = REGISTER_VPU_CLK(
++ .name = "sdram",
++ .ctl_reg = CM_SDCCTL,
++ .div_reg = CM_SDCDIV,
++ .int_bits = 6,
++ .frac_bits = 0),
++ [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK(
++ .name = "v3d",
++ .ctl_reg = CM_V3DCTL,
++ .div_reg = CM_V3DDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ /*
++ * VPU clock. This doesn't have an enable bit, since it drives
++ * the bus for everything else, and is special so it doesn't need
++ * to be gated for rate changes. It is also known as "clk_audio"
++ * in various hardware documentation.
++ */
++ [BCM2835_CLOCK_VPU] = REGISTER_VPU_CLK(
++ .name = "vpu",
++ .ctl_reg = CM_VPUCTL,
++ .div_reg = CM_VPUDIV,
++ .int_bits = 12,
++ .frac_bits = 8,
++ .is_vpu_clock = true),
++
++ /* clocks with per parent mux */
++
++ /* Arasan EMMC clock */
++ [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
++ .name = "emmc",
++ .ctl_reg = CM_EMMCCTL,
++ .div_reg = CM_EMMCDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ /* HDMI state machine */
++ [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
++ .name = "hsm",
++ .ctl_reg = CM_HSMCTL,
++ .div_reg = CM_HSMDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
++ .name = "pwm",
++ .ctl_reg = CM_PWMCTL,
++ .div_reg = CM_PWMDIV,
++ .int_bits = 12,
++ .frac_bits = 12,
++ .is_mash_clock = true),
++ [BCM2835_CLOCK_UART] = REGISTER_PER_CLK(
++ .name = "uart",
++ .ctl_reg = CM_UARTCTL,
++ .div_reg = CM_UARTDIV,
++ .int_bits = 10,
++ .frac_bits = 12),
++ /* TV encoder clock. Only operating frequency is 108Mhz. */
++ [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
++ .name = "vec",
++ .ctl_reg = CM_VECCTL,
++ .div_reg = CM_VECDIV,
++ .int_bits = 4,
++ .frac_bits = 0),
++
+ /* the gates */
++
++ /*
++ * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
++ * you have the debug bit set in the power manager, which we
++ * don't bother exposing) are individual gates off of the
++ * non-stop vpu clock.
++ */
+ [BCM2835_CLOCK_PERI_IMAGE] = REGISTER_GATE(
+- &bcm2835_clock_peri_image_data),
++ .name = "peri_image",
++ .parent = "vpu",
++ .ctl_reg = CM_PERIICTL),
+ };
+
+ static int bcm2835_clk_probe(struct platform_device *pdev)
--- /dev/null
+From be05b91c313b122b4b1cb92bea7582b92eff3950 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 12:51:43 +0000
+Subject: [PATCH 261/423] clk: bcm2835: enable management of PCM clock
+
+Enable the PCM clock in the SOC, which is used by the
+bcm2835-i2s driver.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 33b689600f43094a9316a1b582f2286d17bc737b)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
+ include/dt-bindings/clock/bcm2835.h | 1 +
+ 2 files changed, 8 insertions(+)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1638,6 +1638,13 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_HSMDIV,
+ .int_bits = 4,
+ .frac_bits = 8),
++ [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK(
++ .name = "pcm",
++ .ctl_reg = CM_PCMCTL,
++ .div_reg = CM_PCMDIV,
++ .int_bits = 12,
++ .frac_bits = 12,
++ .is_mash_clock = true),
+ [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
+ .name = "pwm",
+ .ctl_reg = CM_PWMCTL,
+--- a/include/dt-bindings/clock/bcm2835.h
++++ b/include/dt-bindings/clock/bcm2835.h
+@@ -44,3 +44,4 @@
+ #define BCM2835_CLOCK_EMMC 28
+ #define BCM2835_CLOCK_PERI_IMAGE 29
+ #define BCM2835_CLOCK_PWM 30
++#define BCM2835_CLOCK_PCM 31
+++ /dev/null
-From 4af3eff3ca4b361018749b00b71426fa23cc58a4 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 12:51:41 +0000
-Subject: [PATCH 261/381] clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in
- driver
-
-As the use of BCM2835_CLOCK_COUNT in
-include/dt-bindings/clock/bcm2835.h is frowned upon as
-it needs to get modified every time a new clock gets introduced
-this patch changes the clk-bcm2835 driver to use a different
-scheme for registration of clocks and pll, so that there
-is no more need for BCM2835_CLOCK_COUNT to be defined.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 56eb3a2ed9726961e1bcfa69d4a3f86d68f0eb52)
----
- drivers/clk/bcm/clk-bcm2835.c | 167 ++++++++++++++++++++----------------
- include/dt-bindings/clock/bcm2835.h | 2 -
- 2 files changed, 94 insertions(+), 75 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -301,7 +301,7 @@ struct bcm2835_cprman {
- const char *osc_name;
-
- struct clk_onecell_data onecell;
-- struct clk *clks[BCM2835_CLOCK_COUNT];
-+ struct clk *clks[];
- };
-
- static inline void cprman_write(struct bcm2835_cprman *cprman, u32 reg, u32 val)
-@@ -853,6 +853,25 @@ static const struct bcm2835_clock_data b
- .is_mash_clock = true,
- };
-
-+struct bcm2835_gate_data {
-+ const char *name;
-+ const char *parent;
-+
-+ u32 ctl_reg;
-+};
-+
-+/*
-+ * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
-+ * you have the debug bit set in the power manager, which we
-+ * don't bother exposing) are individual gates off of the
-+ * non-stop vpu clock.
-+ */
-+static const struct bcm2835_gate_data bcm2835_clock_peri_image_data = {
-+ .name = "peri_image",
-+ .parent = "vpu",
-+ .ctl_reg = CM_PERIICTL,
-+};
-+
- struct bcm2835_pll {
- struct clk_hw hw;
- struct bcm2835_cprman *cprman;
-@@ -1658,14 +1677,81 @@ static struct clk *bcm2835_register_cloc
- return devm_clk_register(cprman->dev, &clock->hw);
- }
-
-+static struct clk *bcm2835_register_gate(struct bcm2835_cprman *cprman,
-+ const struct bcm2835_gate_data *data)
-+{
-+ return clk_register_gate(cprman->dev, data->name, data->parent,
-+ CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
-+ cprman->regs + data->ctl_reg,
-+ CM_GATE_BIT, 0, &cprman->regs_lock);
-+}
-+
-+typedef struct clk *(*bcm2835_clk_register)(struct bcm2835_cprman *cprman,
-+ const void *data);
-+struct bcm2835_clk_desc {
-+ bcm2835_clk_register clk_register;
-+ const void *data;
-+};
-+
-+#define _REGISTER(f, d) { .clk_register = (bcm2835_clk_register)f, \
-+ .data = d }
-+#define REGISTER_PLL(d) _REGISTER(&bcm2835_register_pll, d)
-+#define REGISTER_PLL_DIV(d) _REGISTER(&bcm2835_register_pll_divider, d)
-+#define REGISTER_CLK(d) _REGISTER(&bcm2835_register_clock, d)
-+#define REGISTER_GATE(d) _REGISTER(&bcm2835_register_gate, d)
-+
-+static const struct bcm2835_clk_desc clk_desc_array[] = {
-+ /* register PLL */
-+ [BCM2835_PLLA] = REGISTER_PLL(&bcm2835_plla_data),
-+ [BCM2835_PLLB] = REGISTER_PLL(&bcm2835_pllb_data),
-+ [BCM2835_PLLC] = REGISTER_PLL(&bcm2835_pllc_data),
-+ [BCM2835_PLLD] = REGISTER_PLL(&bcm2835_plld_data),
-+ [BCM2835_PLLH] = REGISTER_PLL(&bcm2835_pllh_data),
-+ /* the PLL dividers */
-+ [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(&bcm2835_plla_core_data),
-+ [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(&bcm2835_plla_per_data),
-+ [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(&bcm2835_pllc_core0_data),
-+ [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(&bcm2835_pllc_core1_data),
-+ [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(&bcm2835_pllc_core2_data),
-+ [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(&bcm2835_pllc_per_data),
-+ [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(&bcm2835_plld_core_data),
-+ [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(&bcm2835_plld_per_data),
-+ [BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(&bcm2835_pllh_rcal_data),
-+ [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(&bcm2835_pllh_aux_data),
-+ [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(&bcm2835_pllh_pix_data),
-+ /* the clocks */
-+ [BCM2835_CLOCK_TIMER] = REGISTER_CLK(&bcm2835_clock_timer_data),
-+ [BCM2835_CLOCK_OTP] = REGISTER_CLK(&bcm2835_clock_otp_data),
-+ [BCM2835_CLOCK_TSENS] = REGISTER_CLK(&bcm2835_clock_tsens_data),
-+ [BCM2835_CLOCK_VPU] = REGISTER_CLK(&bcm2835_clock_vpu_data),
-+ [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
-+ [BCM2835_CLOCK_ISP] = REGISTER_CLK(&bcm2835_clock_isp_data),
-+ [BCM2835_CLOCK_H264] = REGISTER_CLK(&bcm2835_clock_h264_data),
-+ [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
-+ [BCM2835_CLOCK_SDRAM] = REGISTER_CLK(&bcm2835_clock_sdram_data),
-+ [BCM2835_CLOCK_UART] = REGISTER_CLK(&bcm2835_clock_uart_data),
-+ [BCM2835_CLOCK_VEC] = REGISTER_CLK(&bcm2835_clock_vec_data),
-+ [BCM2835_CLOCK_HSM] = REGISTER_CLK(&bcm2835_clock_hsm_data),
-+ [BCM2835_CLOCK_EMMC] = REGISTER_CLK(&bcm2835_clock_emmc_data),
-+ [BCM2835_CLOCK_PWM] = REGISTER_CLK(&bcm2835_clock_pwm_data),
-+ /* the gates */
-+ [BCM2835_CLOCK_PERI_IMAGE] = REGISTER_GATE(
-+ &bcm2835_clock_peri_image_data),
-+};
-+
- static int bcm2835_clk_probe(struct platform_device *pdev)
- {
- struct device *dev = &pdev->dev;
- struct clk **clks;
- struct bcm2835_cprman *cprman;
- struct resource *res;
-+ const struct bcm2835_clk_desc *desc;
-+ const size_t asize = ARRAY_SIZE(clk_desc_array);
-+ size_t i;
-
-- cprman = devm_kzalloc(dev, sizeof(*cprman), GFP_KERNEL);
-+ cprman = devm_kzalloc(dev,
-+ sizeof(*cprman) + asize * sizeof(*clks),
-+ GFP_KERNEL);
- if (!cprman)
- return -ENOMEM;
-
-@@ -1682,80 +1768,15 @@ static int bcm2835_clk_probe(struct plat
-
- platform_set_drvdata(pdev, cprman);
-
-- cprman->onecell.clk_num = BCM2835_CLOCK_COUNT;
-+ cprman->onecell.clk_num = asize;
- cprman->onecell.clks = cprman->clks;
- clks = cprman->clks;
-
-- clks[BCM2835_PLLA] = bcm2835_register_pll(cprman, &bcm2835_plla_data);
-- clks[BCM2835_PLLB] = bcm2835_register_pll(cprman, &bcm2835_pllb_data);
-- clks[BCM2835_PLLC] = bcm2835_register_pll(cprman, &bcm2835_pllc_data);
-- clks[BCM2835_PLLD] = bcm2835_register_pll(cprman, &bcm2835_plld_data);
-- clks[BCM2835_PLLH] = bcm2835_register_pll(cprman, &bcm2835_pllh_data);
--
-- clks[BCM2835_PLLA_CORE] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_plla_core_data);
-- clks[BCM2835_PLLA_PER] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_plla_per_data);
-- clks[BCM2835_PLLC_CORE0] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_core0_data);
-- clks[BCM2835_PLLC_CORE1] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_core1_data);
-- clks[BCM2835_PLLC_CORE2] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_core2_data);
-- clks[BCM2835_PLLC_PER] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllc_per_data);
-- clks[BCM2835_PLLD_CORE] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_plld_core_data);
-- clks[BCM2835_PLLD_PER] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_plld_per_data);
-- clks[BCM2835_PLLH_RCAL] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllh_rcal_data);
-- clks[BCM2835_PLLH_AUX] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllh_aux_data);
-- clks[BCM2835_PLLH_PIX] =
-- bcm2835_register_pll_divider(cprman, &bcm2835_pllh_pix_data);
--
-- clks[BCM2835_CLOCK_TIMER] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_timer_data);
-- clks[BCM2835_CLOCK_OTP] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_otp_data);
-- clks[BCM2835_CLOCK_TSENS] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_tsens_data);
-- clks[BCM2835_CLOCK_VPU] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_vpu_data);
-- clks[BCM2835_CLOCK_V3D] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_v3d_data);
-- clks[BCM2835_CLOCK_ISP] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_isp_data);
-- clks[BCM2835_CLOCK_H264] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_h264_data);
-- clks[BCM2835_CLOCK_V3D] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_v3d_data);
-- clks[BCM2835_CLOCK_SDRAM] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_sdram_data);
-- clks[BCM2835_CLOCK_UART] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_uart_data);
-- clks[BCM2835_CLOCK_VEC] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_vec_data);
-- clks[BCM2835_CLOCK_HSM] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_hsm_data);
-- clks[BCM2835_CLOCK_EMMC] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_emmc_data);
--
-- /*
-- * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
-- * you have the debug bit set in the power manager, which we
-- * don't bother exposing) are individual gates off of the
-- * non-stop vpu clock.
-- */
-- clks[BCM2835_CLOCK_PERI_IMAGE] =
-- clk_register_gate(dev, "peri_image", "vpu",
-- CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE,
-- cprman->regs + CM_PERIICTL, CM_GATE_BIT,
-- 0, &cprman->regs_lock);
--
-- clks[BCM2835_CLOCK_PWM] =
-- bcm2835_register_clock(cprman, &bcm2835_clock_pwm_data);
-+ for (i = 0; i < asize; i++) {
-+ desc = &clk_desc_array[i];
-+ if (desc->clk_register && desc->data)
-+ clks[i] = desc->clk_register(cprman, desc->data);
-+ }
-
- return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
- &cprman->onecell);
---- a/include/dt-bindings/clock/bcm2835.h
-+++ b/include/dt-bindings/clock/bcm2835.h
-@@ -44,5 +44,3 @@
- #define BCM2835_CLOCK_EMMC 28
- #define BCM2835_CLOCK_PERI_IMAGE 29
- #define BCM2835_CLOCK_PWM 30
--
--#define BCM2835_CLOCK_COUNT 31
--- /dev/null
+From bea282aec8f05b08fd5185f7aeb75050a00c1d49 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 15:43:56 +0000
+Subject: [PATCH 262/423] clk: bcm2835: add missing PLL clock dividers
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 728436956aa172b24a3212295f8b53feb6479f32)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 32 ++++++++++++++++++++++++++++++++
+ include/dt-bindings/clock/bcm2835.h | 5 +++++
+ 2 files changed, 37 insertions(+)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1387,6 +1387,22 @@ static const struct bcm2835_clk_desc clk
+ .load_mask = CM_PLLA_LOADPER,
+ .hold_mask = CM_PLLA_HOLDPER,
+ .fixed_divider = 1),
++ [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
++ .name = "plla_dsi0",
++ .source_pll = "plla",
++ .cm_reg = CM_PLLA,
++ .a2w_reg = A2W_PLLA_DSI0,
++ .load_mask = CM_PLLA_LOADDSI0,
++ .hold_mask = CM_PLLA_HOLDDSI0,
++ .fixed_divider = 1),
++ [BCM2835_PLLA_CCP2] = REGISTER_PLL_DIV(
++ .name = "plla_ccp2",
++ .source_pll = "plla",
++ .cm_reg = CM_PLLA,
++ .a2w_reg = A2W_PLLA_CCP2,
++ .load_mask = CM_PLLA_LOADCCP2,
++ .hold_mask = CM_PLLA_HOLDCCP2,
++ .fixed_divider = 1),
+
+ /* PLLB is used for the ARM's clock. */
+ [BCM2835_PLLB] = REGISTER_PLL(
+@@ -1501,6 +1517,22 @@ static const struct bcm2835_clk_desc clk
+ .load_mask = CM_PLLD_LOADPER,
+ .hold_mask = CM_PLLD_HOLDPER,
+ .fixed_divider = 1),
++ [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
++ .name = "plld_dsi0",
++ .source_pll = "plld",
++ .cm_reg = CM_PLLD,
++ .a2w_reg = A2W_PLLD_DSI0,
++ .load_mask = CM_PLLD_LOADDSI0,
++ .hold_mask = CM_PLLD_HOLDDSI0,
++ .fixed_divider = 1),
++ [BCM2835_PLLD_DSI1] = REGISTER_PLL_DIV(
++ .name = "plld_dsi1",
++ .source_pll = "plld",
++ .cm_reg = CM_PLLD,
++ .a2w_reg = A2W_PLLD_DSI1,
++ .load_mask = CM_PLLD_LOADDSI1,
++ .hold_mask = CM_PLLD_HOLDDSI1,
++ .fixed_divider = 1),
+
+ /*
+ * PLLH is used to supply the pixel clock or the AUX clock for the
+--- a/include/dt-bindings/clock/bcm2835.h
++++ b/include/dt-bindings/clock/bcm2835.h
+@@ -45,3 +45,8 @@
+ #define BCM2835_CLOCK_PERI_IMAGE 29
+ #define BCM2835_CLOCK_PWM 30
+ #define BCM2835_CLOCK_PCM 31
++
++#define BCM2835_PLLA_DSI0 32
++#define BCM2835_PLLA_CCP2 33
++#define BCM2835_PLLD_DSI0 34
++#define BCM2835_PLLD_DSI1 35
+++ /dev/null
-From 34db3e8f383a79ea01a1fee31270e779956ec939 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 12:51:42 +0000
-Subject: [PATCH 262/381] clk: bcm2835: reorganize bcm2835_clock_array
- assignment
-
-Reorganize bcm2835_clock_array so that there is no more
-need for separate bcm2835_*_data structures to be defined.
-Instead the required structures are generated inline via
-helper macros.
-
-To allow this to also work for pll alone it was required that
-the parent_pll was changed from a pointer to bcm2835_pll_data
-to the name of the pll instead.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 3b15afefbef9b5952e3d68ad73d93f981b9faca8)
----
- drivers/clk/bcm/clk-bcm2835.c | 852 +++++++++++++++++++-----------------------
- 1 file changed, 393 insertions(+), 459 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -418,115 +418,10 @@ static const struct bcm2835_pll_ana_bits
- .fb_prediv_mask = BIT(11),
- };
-
--/*
-- * PLLA is the auxiliary PLL, used to drive the CCP2 (Compact Camera
-- * Port 2) transmitter clock.
-- *
-- * It is in the PX LDO power domain, which is on when the AUDIO domain
-- * is on.
-- */
--static const struct bcm2835_pll_data bcm2835_plla_data = {
-- .name = "plla",
-- .cm_ctrl_reg = CM_PLLA,
-- .a2w_ctrl_reg = A2W_PLLA_CTRL,
-- .frac_reg = A2W_PLLA_FRAC,
-- .ana_reg_base = A2W_PLLA_ANA0,
-- .reference_enable_mask = A2W_XOSC_CTRL_PLLA_ENABLE,
-- .lock_mask = CM_LOCK_FLOCKA,
--
-- .ana = &bcm2835_ana_default,
--
-- .min_rate = 600000000u,
-- .max_rate = 2400000000u,
-- .max_fb_rate = BCM2835_MAX_FB_RATE,
--};
--
--/* PLLB is used for the ARM's clock. */
--static const struct bcm2835_pll_data bcm2835_pllb_data = {
-- .name = "pllb",
-- .cm_ctrl_reg = CM_PLLB,
-- .a2w_ctrl_reg = A2W_PLLB_CTRL,
-- .frac_reg = A2W_PLLB_FRAC,
-- .ana_reg_base = A2W_PLLB_ANA0,
-- .reference_enable_mask = A2W_XOSC_CTRL_PLLB_ENABLE,
-- .lock_mask = CM_LOCK_FLOCKB,
--
-- .ana = &bcm2835_ana_default,
--
-- .min_rate = 600000000u,
-- .max_rate = 3000000000u,
-- .max_fb_rate = BCM2835_MAX_FB_RATE,
--};
--
--/*
-- * PLLC is the core PLL, used to drive the core VPU clock.
-- *
-- * It is in the PX LDO power domain, which is on when the AUDIO domain
-- * is on.
--*/
--static const struct bcm2835_pll_data bcm2835_pllc_data = {
-- .name = "pllc",
-- .cm_ctrl_reg = CM_PLLC,
-- .a2w_ctrl_reg = A2W_PLLC_CTRL,
-- .frac_reg = A2W_PLLC_FRAC,
-- .ana_reg_base = A2W_PLLC_ANA0,
-- .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
-- .lock_mask = CM_LOCK_FLOCKC,
--
-- .ana = &bcm2835_ana_default,
--
-- .min_rate = 600000000u,
-- .max_rate = 3000000000u,
-- .max_fb_rate = BCM2835_MAX_FB_RATE,
--};
--
--/*
-- * PLLD is the display PLL, used to drive DSI display panels.
-- *
-- * It is in the PX LDO power domain, which is on when the AUDIO domain
-- * is on.
-- */
--static const struct bcm2835_pll_data bcm2835_plld_data = {
-- .name = "plld",
-- .cm_ctrl_reg = CM_PLLD,
-- .a2w_ctrl_reg = A2W_PLLD_CTRL,
-- .frac_reg = A2W_PLLD_FRAC,
-- .ana_reg_base = A2W_PLLD_ANA0,
-- .reference_enable_mask = A2W_XOSC_CTRL_DDR_ENABLE,
-- .lock_mask = CM_LOCK_FLOCKD,
--
-- .ana = &bcm2835_ana_default,
--
-- .min_rate = 600000000u,
-- .max_rate = 2400000000u,
-- .max_fb_rate = BCM2835_MAX_FB_RATE,
--};
--
--/*
-- * PLLH is used to supply the pixel clock or the AUX clock for the TV
-- * encoder.
-- *
-- * It is in the HDMI power domain.
-- */
--static const struct bcm2835_pll_data bcm2835_pllh_data = {
-- "pllh",
-- .cm_ctrl_reg = CM_PLLH,
-- .a2w_ctrl_reg = A2W_PLLH_CTRL,
-- .frac_reg = A2W_PLLH_FRAC,
-- .ana_reg_base = A2W_PLLH_ANA0,
-- .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
-- .lock_mask = CM_LOCK_FLOCKH,
--
-- .ana = &bcm2835_ana_pllh,
--
-- .min_rate = 600000000u,
-- .max_rate = 3000000000u,
-- .max_fb_rate = BCM2835_MAX_FB_RATE,
--};
--
- struct bcm2835_pll_divider_data {
- const char *name;
-- const struct bcm2835_pll_data *source_pll;
-+ const char *source_pll;
-+
- u32 cm_reg;
- u32 a2w_reg;
-
-@@ -535,124 +430,6 @@ struct bcm2835_pll_divider_data {
- u32 fixed_divider;
- };
-
--static const struct bcm2835_pll_divider_data bcm2835_plla_core_data = {
-- .name = "plla_core",
-- .source_pll = &bcm2835_plla_data,
-- .cm_reg = CM_PLLA,
-- .a2w_reg = A2W_PLLA_CORE,
-- .load_mask = CM_PLLA_LOADCORE,
-- .hold_mask = CM_PLLA_HOLDCORE,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_plla_per_data = {
-- .name = "plla_per",
-- .source_pll = &bcm2835_plla_data,
-- .cm_reg = CM_PLLA,
-- .a2w_reg = A2W_PLLA_PER,
-- .load_mask = CM_PLLA_LOADPER,
-- .hold_mask = CM_PLLA_HOLDPER,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllb_arm_data = {
-- .name = "pllb_arm",
-- .source_pll = &bcm2835_pllb_data,
-- .cm_reg = CM_PLLB,
-- .a2w_reg = A2W_PLLB_ARM,
-- .load_mask = CM_PLLB_LOADARM,
-- .hold_mask = CM_PLLB_HOLDARM,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllc_core0_data = {
-- .name = "pllc_core0",
-- .source_pll = &bcm2835_pllc_data,
-- .cm_reg = CM_PLLC,
-- .a2w_reg = A2W_PLLC_CORE0,
-- .load_mask = CM_PLLC_LOADCORE0,
-- .hold_mask = CM_PLLC_HOLDCORE0,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllc_core1_data = {
-- .name = "pllc_core1", .source_pll = &bcm2835_pllc_data,
-- .cm_reg = CM_PLLC, A2W_PLLC_CORE1,
-- .load_mask = CM_PLLC_LOADCORE1,
-- .hold_mask = CM_PLLC_HOLDCORE1,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllc_core2_data = {
-- .name = "pllc_core2",
-- .source_pll = &bcm2835_pllc_data,
-- .cm_reg = CM_PLLC,
-- .a2w_reg = A2W_PLLC_CORE2,
-- .load_mask = CM_PLLC_LOADCORE2,
-- .hold_mask = CM_PLLC_HOLDCORE2,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllc_per_data = {
-- .name = "pllc_per",
-- .source_pll = &bcm2835_pllc_data,
-- .cm_reg = CM_PLLC,
-- .a2w_reg = A2W_PLLC_PER,
-- .load_mask = CM_PLLC_LOADPER,
-- .hold_mask = CM_PLLC_HOLDPER,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_plld_core_data = {
-- .name = "plld_core",
-- .source_pll = &bcm2835_plld_data,
-- .cm_reg = CM_PLLD,
-- .a2w_reg = A2W_PLLD_CORE,
-- .load_mask = CM_PLLD_LOADCORE,
-- .hold_mask = CM_PLLD_HOLDCORE,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_plld_per_data = {
-- .name = "plld_per",
-- .source_pll = &bcm2835_plld_data,
-- .cm_reg = CM_PLLD,
-- .a2w_reg = A2W_PLLD_PER,
-- .load_mask = CM_PLLD_LOADPER,
-- .hold_mask = CM_PLLD_HOLDPER,
-- .fixed_divider = 1,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllh_rcal_data = {
-- .name = "pllh_rcal",
-- .source_pll = &bcm2835_pllh_data,
-- .cm_reg = CM_PLLH,
-- .a2w_reg = A2W_PLLH_RCAL,
-- .load_mask = CM_PLLH_LOADRCAL,
-- .hold_mask = 0,
-- .fixed_divider = 10,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllh_aux_data = {
-- .name = "pllh_aux",
-- .source_pll = &bcm2835_pllh_data,
-- .cm_reg = CM_PLLH,
-- .a2w_reg = A2W_PLLH_AUX,
-- .load_mask = CM_PLLH_LOADAUX,
-- .hold_mask = 0,
-- .fixed_divider = 10,
--};
--
--static const struct bcm2835_pll_divider_data bcm2835_pllh_pix_data = {
-- .name = "pllh_pix",
-- .source_pll = &bcm2835_pllh_data,
-- .cm_reg = CM_PLLH,
-- .a2w_reg = A2W_PLLH_PIX,
-- .load_mask = CM_PLLH_LOADPIX,
-- .hold_mask = 0,
-- .fixed_divider = 10,
--};
--
- struct bcm2835_clock_data {
- const char *name;
-
-@@ -671,188 +448,6 @@ struct bcm2835_clock_data {
- bool is_mash_clock;
- };
-
--static const char *const bcm2835_clock_per_parents[] = {
-- "gnd",
-- "xosc",
-- "testdebug0",
-- "testdebug1",
-- "plla_per",
-- "pllc_per",
-- "plld_per",
-- "pllh_aux",
--};
--
--static const char *const bcm2835_clock_vpu_parents[] = {
-- "gnd",
-- "xosc",
-- "testdebug0",
-- "testdebug1",
-- "plla_core",
-- "pllc_core0",
-- "plld_core",
-- "pllh_aux",
-- "pllc_core1",
-- "pllc_core2",
--};
--
--static const char *const bcm2835_clock_osc_parents[] = {
-- "gnd",
-- "xosc",
-- "testdebug0",
-- "testdebug1"
--};
--
--/*
-- * Used for a 1Mhz clock for the system clocksource, and also used by
-- * the watchdog timer and the camera pulse generator.
-- */
--static const struct bcm2835_clock_data bcm2835_clock_timer_data = {
-- .name = "timer",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents),
-- .parents = bcm2835_clock_osc_parents,
-- .ctl_reg = CM_TIMERCTL,
-- .div_reg = CM_TIMERDIV,
-- .int_bits = 6,
-- .frac_bits = 12,
--};
--
--/* One Time Programmable Memory clock. Maximum 10Mhz. */
--static const struct bcm2835_clock_data bcm2835_clock_otp_data = {
-- .name = "otp",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents),
-- .parents = bcm2835_clock_osc_parents,
-- .ctl_reg = CM_OTPCTL,
-- .div_reg = CM_OTPDIV,
-- .int_bits = 4,
-- .frac_bits = 0,
--};
--
--/*
-- * VPU clock. This doesn't have an enable bit, since it drives the
-- * bus for everything else, and is special so it doesn't need to be
-- * gated for rate changes. It is also known as "clk_audio" in various
-- * hardware documentation.
-- */
--static const struct bcm2835_clock_data bcm2835_clock_vpu_data = {
-- .name = "vpu",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
-- .parents = bcm2835_clock_vpu_parents,
-- .ctl_reg = CM_VPUCTL,
-- .div_reg = CM_VPUDIV,
-- .int_bits = 12,
-- .frac_bits = 8,
-- .is_vpu_clock = true,
--};
--
--static const struct bcm2835_clock_data bcm2835_clock_v3d_data = {
-- .name = "v3d",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
-- .parents = bcm2835_clock_vpu_parents,
-- .ctl_reg = CM_V3DCTL,
-- .div_reg = CM_V3DDIV,
-- .int_bits = 4,
-- .frac_bits = 8,
--};
--
--static const struct bcm2835_clock_data bcm2835_clock_isp_data = {
-- .name = "isp",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
-- .parents = bcm2835_clock_vpu_parents,
-- .ctl_reg = CM_ISPCTL,
-- .div_reg = CM_ISPDIV,
-- .int_bits = 4,
-- .frac_bits = 8,
--};
--
--static const struct bcm2835_clock_data bcm2835_clock_h264_data = {
-- .name = "h264",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
-- .parents = bcm2835_clock_vpu_parents,
-- .ctl_reg = CM_H264CTL,
-- .div_reg = CM_H264DIV,
-- .int_bits = 4,
-- .frac_bits = 8,
--};
--
--/* TV encoder clock. Only operating frequency is 108Mhz. */
--static const struct bcm2835_clock_data bcm2835_clock_vec_data = {
-- .name = "vec",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
-- .parents = bcm2835_clock_per_parents,
-- .ctl_reg = CM_VECCTL,
-- .div_reg = CM_VECDIV,
-- .int_bits = 4,
-- .frac_bits = 0,
--};
--
--static const struct bcm2835_clock_data bcm2835_clock_uart_data = {
-- .name = "uart",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
-- .parents = bcm2835_clock_per_parents,
-- .ctl_reg = CM_UARTCTL,
-- .div_reg = CM_UARTDIV,
-- .int_bits = 10,
-- .frac_bits = 12,
--};
--
--/* HDMI state machine */
--static const struct bcm2835_clock_data bcm2835_clock_hsm_data = {
-- .name = "hsm",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
-- .parents = bcm2835_clock_per_parents,
-- .ctl_reg = CM_HSMCTL,
-- .div_reg = CM_HSMDIV,
-- .int_bits = 4,
-- .frac_bits = 8,
--};
--
--/*
-- * Secondary SDRAM clock. Used for low-voltage modes when the PLL in
-- * the SDRAM controller can't be used.
-- */
--static const struct bcm2835_clock_data bcm2835_clock_sdram_data = {
-- .name = "sdram",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents),
-- .parents = bcm2835_clock_vpu_parents,
-- .ctl_reg = CM_SDCCTL,
-- .div_reg = CM_SDCDIV,
-- .int_bits = 6,
-- .frac_bits = 0,
--};
--
--/* Clock for the temperature sensor. Generally run at 2Mhz, max 5Mhz. */
--static const struct bcm2835_clock_data bcm2835_clock_tsens_data = {
-- .name = "tsens",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents),
-- .parents = bcm2835_clock_osc_parents,
-- .ctl_reg = CM_TSENSCTL,
-- .div_reg = CM_TSENSDIV,
-- .int_bits = 5,
-- .frac_bits = 0,
--};
--
--/* Arasan EMMC clock */
--static const struct bcm2835_clock_data bcm2835_clock_emmc_data = {
-- .name = "emmc",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
-- .parents = bcm2835_clock_per_parents,
-- .ctl_reg = CM_EMMCCTL,
-- .div_reg = CM_EMMCDIV,
-- .int_bits = 4,
-- .frac_bits = 8,
--};
--
--static const struct bcm2835_clock_data bcm2835_clock_pwm_data = {
-- .name = "pwm",
-- .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents),
-- .parents = bcm2835_clock_per_parents,
-- .ctl_reg = CM_PWMCTL,
-- .div_reg = CM_PWMDIV,
-- .int_bits = 12,
-- .frac_bits = 12,
-- .is_mash_clock = true,
--};
--
- struct bcm2835_gate_data {
- const char *name;
- const char *parent;
-@@ -860,18 +455,6 @@ struct bcm2835_gate_data {
- u32 ctl_reg;
- };
-
--/*
-- * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
-- * you have the debug bit set in the power manager, which we
-- * don't bother exposing) are individual gates off of the
-- * non-stop vpu clock.
-- */
--static const struct bcm2835_gate_data bcm2835_clock_peri_image_data = {
-- .name = "peri_image",
-- .parent = "vpu",
-- .ctl_reg = CM_PERIICTL,
--};
--
- struct bcm2835_pll {
- struct clk_hw hw;
- struct bcm2835_cprman *cprman;
-@@ -1594,7 +1177,7 @@ bcm2835_register_pll_divider(struct bcm2
-
- memset(&init, 0, sizeof(init));
-
-- init.parent_names = &data->source_pll->name;
-+ init.parent_names = &data->source_pll;
- init.num_parents = 1;
- init.name = divider_name;
- init.ops = &bcm2835_pll_divider_clk_ops;
-@@ -1693,50 +1276,401 @@ struct bcm2835_clk_desc {
- const void *data;
- };
-
--#define _REGISTER(f, d) { .clk_register = (bcm2835_clk_register)f, \
-- .data = d }
--#define REGISTER_PLL(d) _REGISTER(&bcm2835_register_pll, d)
--#define REGISTER_PLL_DIV(d) _REGISTER(&bcm2835_register_pll_divider, d)
--#define REGISTER_CLK(d) _REGISTER(&bcm2835_register_clock, d)
--#define REGISTER_GATE(d) _REGISTER(&bcm2835_register_gate, d)
-+/* assignment helper macros for different clock types */
-+#define _REGISTER(f, ...) { .clk_register = (bcm2835_clk_register)f, \
-+ .data = __VA_ARGS__ }
-+#define REGISTER_PLL(...) _REGISTER(&bcm2835_register_pll, \
-+ &(struct bcm2835_pll_data) \
-+ {__VA_ARGS__})
-+#define REGISTER_PLL_DIV(...) _REGISTER(&bcm2835_register_pll_divider, \
-+ &(struct bcm2835_pll_divider_data) \
-+ {__VA_ARGS__})
-+#define REGISTER_CLK(...) _REGISTER(&bcm2835_register_clock, \
-+ &(struct bcm2835_clock_data) \
-+ {__VA_ARGS__})
-+#define REGISTER_GATE(...) _REGISTER(&bcm2835_register_gate, \
-+ &(struct bcm2835_gate_data) \
-+ {__VA_ARGS__})
-+
-+/* parent mux arrays plus helper macros */
-+
-+/* main oscillator parent mux */
-+static const char *const bcm2835_clock_osc_parents[] = {
-+ "gnd",
-+ "xosc",
-+ "testdebug0",
-+ "testdebug1"
-+};
-+
-+#define REGISTER_OSC_CLK(...) REGISTER_CLK( \
-+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_osc_parents), \
-+ .parents = bcm2835_clock_osc_parents, \
-+ __VA_ARGS__)
-+
-+/* main peripherial parent mux */
-+static const char *const bcm2835_clock_per_parents[] = {
-+ "gnd",
-+ "xosc",
-+ "testdebug0",
-+ "testdebug1",
-+ "plla_per",
-+ "pllc_per",
-+ "plld_per",
-+ "pllh_aux",
-+};
-+
-+#define REGISTER_PER_CLK(...) REGISTER_CLK( \
-+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_per_parents), \
-+ .parents = bcm2835_clock_per_parents, \
-+ __VA_ARGS__)
-+
-+/* main vpu parent mux */
-+static const char *const bcm2835_clock_vpu_parents[] = {
-+ "gnd",
-+ "xosc",
-+ "testdebug0",
-+ "testdebug1",
-+ "plla_core",
-+ "pllc_core0",
-+ "plld_core",
-+ "pllh_aux",
-+ "pllc_core1",
-+ "pllc_core2",
-+};
-+
-+#define REGISTER_VPU_CLK(...) REGISTER_CLK( \
-+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_vpu_parents), \
-+ .parents = bcm2835_clock_vpu_parents, \
-+ __VA_ARGS__)
-
-+/*
-+ * the real definition of all the pll, pll_dividers and clocks
-+ * these make use of the above REGISTER_* macros
-+ */
- static const struct bcm2835_clk_desc clk_desc_array[] = {
-- /* register PLL */
-- [BCM2835_PLLA] = REGISTER_PLL(&bcm2835_plla_data),
-- [BCM2835_PLLB] = REGISTER_PLL(&bcm2835_pllb_data),
-- [BCM2835_PLLC] = REGISTER_PLL(&bcm2835_pllc_data),
-- [BCM2835_PLLD] = REGISTER_PLL(&bcm2835_plld_data),
-- [BCM2835_PLLH] = REGISTER_PLL(&bcm2835_pllh_data),
-- /* the PLL dividers */
-- [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(&bcm2835_plla_core_data),
-- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(&bcm2835_plla_per_data),
-- [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(&bcm2835_pllc_core0_data),
-- [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(&bcm2835_pllc_core1_data),
-- [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(&bcm2835_pllc_core2_data),
-- [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(&bcm2835_pllc_per_data),
-- [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(&bcm2835_plld_core_data),
-- [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(&bcm2835_plld_per_data),
-- [BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(&bcm2835_pllh_rcal_data),
-- [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(&bcm2835_pllh_aux_data),
-- [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(&bcm2835_pllh_pix_data),
-+ /* the PLL + PLL dividers */
-+
-+ /*
-+ * PLLA is the auxiliary PLL, used to drive the CCP2
-+ * (Compact Camera Port 2) transmitter clock.
-+ *
-+ * It is in the PX LDO power domain, which is on when the
-+ * AUDIO domain is on.
-+ */
-+ [BCM2835_PLLA] = REGISTER_PLL(
-+ .name = "plla",
-+ .cm_ctrl_reg = CM_PLLA,
-+ .a2w_ctrl_reg = A2W_PLLA_CTRL,
-+ .frac_reg = A2W_PLLA_FRAC,
-+ .ana_reg_base = A2W_PLLA_ANA0,
-+ .reference_enable_mask = A2W_XOSC_CTRL_PLLA_ENABLE,
-+ .lock_mask = CM_LOCK_FLOCKA,
-+
-+ .ana = &bcm2835_ana_default,
-+
-+ .min_rate = 600000000u,
-+ .max_rate = 2400000000u,
-+ .max_fb_rate = BCM2835_MAX_FB_RATE),
-+ [BCM2835_PLLA_CORE] = REGISTER_PLL_DIV(
-+ .name = "plla_core",
-+ .source_pll = "plla",
-+ .cm_reg = CM_PLLA,
-+ .a2w_reg = A2W_PLLA_CORE,
-+ .load_mask = CM_PLLA_LOADCORE,
-+ .hold_mask = CM_PLLA_HOLDCORE,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLA_PER] = REGISTER_PLL_DIV(
-+ .name = "plla_per",
-+ .source_pll = "plla",
-+ .cm_reg = CM_PLLA,
-+ .a2w_reg = A2W_PLLA_PER,
-+ .load_mask = CM_PLLA_LOADPER,
-+ .hold_mask = CM_PLLA_HOLDPER,
-+ .fixed_divider = 1),
-+
-+ /* PLLB is used for the ARM's clock. */
-+ [BCM2835_PLLB] = REGISTER_PLL(
-+ .name = "pllb",
-+ .cm_ctrl_reg = CM_PLLB,
-+ .a2w_ctrl_reg = A2W_PLLB_CTRL,
-+ .frac_reg = A2W_PLLB_FRAC,
-+ .ana_reg_base = A2W_PLLB_ANA0,
-+ .reference_enable_mask = A2W_XOSC_CTRL_PLLB_ENABLE,
-+ .lock_mask = CM_LOCK_FLOCKB,
-+
-+ .ana = &bcm2835_ana_default,
-+
-+ .min_rate = 600000000u,
-+ .max_rate = 3000000000u,
-+ .max_fb_rate = BCM2835_MAX_FB_RATE),
-+ [BCM2835_PLLB_ARM] = REGISTER_PLL_DIV(
-+ .name = "pllb_arm",
-+ .source_pll = "pllb",
-+ .cm_reg = CM_PLLB,
-+ .a2w_reg = A2W_PLLB_ARM,
-+ .load_mask = CM_PLLB_LOADARM,
-+ .hold_mask = CM_PLLB_HOLDARM,
-+ .fixed_divider = 1),
-+
-+ /*
-+ * PLLC is the core PLL, used to drive the core VPU clock.
-+ *
-+ * It is in the PX LDO power domain, which is on when the
-+ * AUDIO domain is on.
-+ */
-+ [BCM2835_PLLC] = REGISTER_PLL(
-+ .name = "pllc",
-+ .cm_ctrl_reg = CM_PLLC,
-+ .a2w_ctrl_reg = A2W_PLLC_CTRL,
-+ .frac_reg = A2W_PLLC_FRAC,
-+ .ana_reg_base = A2W_PLLC_ANA0,
-+ .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
-+ .lock_mask = CM_LOCK_FLOCKC,
-+
-+ .ana = &bcm2835_ana_default,
-+
-+ .min_rate = 600000000u,
-+ .max_rate = 3000000000u,
-+ .max_fb_rate = BCM2835_MAX_FB_RATE),
-+ [BCM2835_PLLC_CORE0] = REGISTER_PLL_DIV(
-+ .name = "pllc_core0",
-+ .source_pll = "pllc",
-+ .cm_reg = CM_PLLC,
-+ .a2w_reg = A2W_PLLC_CORE0,
-+ .load_mask = CM_PLLC_LOADCORE0,
-+ .hold_mask = CM_PLLC_HOLDCORE0,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV(
-+ .name = "pllc_core1",
-+ .source_pll = "pllc",
-+ .cm_reg = CM_PLLC,
-+ .a2w_reg = A2W_PLLC_CORE1,
-+ .load_mask = CM_PLLC_LOADCORE1,
-+ .hold_mask = CM_PLLC_HOLDCORE1,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV(
-+ .name = "pllc_core2",
-+ .source_pll = "pllc",
-+ .cm_reg = CM_PLLC,
-+ .a2w_reg = A2W_PLLC_CORE2,
-+ .load_mask = CM_PLLC_LOADCORE2,
-+ .hold_mask = CM_PLLC_HOLDCORE2,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLC_PER] = REGISTER_PLL_DIV(
-+ .name = "pllc_per",
-+ .source_pll = "pllc",
-+ .cm_reg = CM_PLLC,
-+ .a2w_reg = A2W_PLLC_PER,
-+ .load_mask = CM_PLLC_LOADPER,
-+ .hold_mask = CM_PLLC_HOLDPER,
-+ .fixed_divider = 1),
-+
-+ /*
-+ * PLLD is the display PLL, used to drive DSI display panels.
-+ *
-+ * It is in the PX LDO power domain, which is on when the
-+ * AUDIO domain is on.
-+ */
-+ [BCM2835_PLLD] = REGISTER_PLL(
-+ .name = "plld",
-+ .cm_ctrl_reg = CM_PLLD,
-+ .a2w_ctrl_reg = A2W_PLLD_CTRL,
-+ .frac_reg = A2W_PLLD_FRAC,
-+ .ana_reg_base = A2W_PLLD_ANA0,
-+ .reference_enable_mask = A2W_XOSC_CTRL_DDR_ENABLE,
-+ .lock_mask = CM_LOCK_FLOCKD,
-+
-+ .ana = &bcm2835_ana_default,
-+
-+ .min_rate = 600000000u,
-+ .max_rate = 2400000000u,
-+ .max_fb_rate = BCM2835_MAX_FB_RATE),
-+ [BCM2835_PLLD_CORE] = REGISTER_PLL_DIV(
-+ .name = "plld_core",
-+ .source_pll = "plld",
-+ .cm_reg = CM_PLLD,
-+ .a2w_reg = A2W_PLLD_CORE,
-+ .load_mask = CM_PLLD_LOADCORE,
-+ .hold_mask = CM_PLLD_HOLDCORE,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLD_PER] = REGISTER_PLL_DIV(
-+ .name = "plld_per",
-+ .source_pll = "plld",
-+ .cm_reg = CM_PLLD,
-+ .a2w_reg = A2W_PLLD_PER,
-+ .load_mask = CM_PLLD_LOADPER,
-+ .hold_mask = CM_PLLD_HOLDPER,
-+ .fixed_divider = 1),
-+
-+ /*
-+ * PLLH is used to supply the pixel clock or the AUX clock for the
-+ * TV encoder.
-+ *
-+ * It is in the HDMI power domain.
-+ */
-+ [BCM2835_PLLH] = REGISTER_PLL(
-+ "pllh",
-+ .cm_ctrl_reg = CM_PLLH,
-+ .a2w_ctrl_reg = A2W_PLLH_CTRL,
-+ .frac_reg = A2W_PLLH_FRAC,
-+ .ana_reg_base = A2W_PLLH_ANA0,
-+ .reference_enable_mask = A2W_XOSC_CTRL_PLLC_ENABLE,
-+ .lock_mask = CM_LOCK_FLOCKH,
-+
-+ .ana = &bcm2835_ana_pllh,
-+
-+ .min_rate = 600000000u,
-+ .max_rate = 3000000000u,
-+ .max_fb_rate = BCM2835_MAX_FB_RATE),
-+ [BCM2835_PLLH_RCAL] = REGISTER_PLL_DIV(
-+ .name = "pllh_rcal",
-+ .source_pll = "pllh",
-+ .cm_reg = CM_PLLH,
-+ .a2w_reg = A2W_PLLH_RCAL,
-+ .load_mask = CM_PLLH_LOADRCAL,
-+ .hold_mask = 0,
-+ .fixed_divider = 10),
-+ [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV(
-+ .name = "pllh_aux",
-+ .source_pll = "pllh",
-+ .cm_reg = CM_PLLH,
-+ .a2w_reg = A2W_PLLH_AUX,
-+ .load_mask = CM_PLLH_LOADAUX,
-+ .hold_mask = 0,
-+ .fixed_divider = 10),
-+ [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV(
-+ .name = "pllh_pix",
-+ .source_pll = "pllh",
-+ .cm_reg = CM_PLLH,
-+ .a2w_reg = A2W_PLLH_PIX,
-+ .load_mask = CM_PLLH_LOADPIX,
-+ .hold_mask = 0,
-+ .fixed_divider = 10),
-+
- /* the clocks */
-- [BCM2835_CLOCK_TIMER] = REGISTER_CLK(&bcm2835_clock_timer_data),
-- [BCM2835_CLOCK_OTP] = REGISTER_CLK(&bcm2835_clock_otp_data),
-- [BCM2835_CLOCK_TSENS] = REGISTER_CLK(&bcm2835_clock_tsens_data),
-- [BCM2835_CLOCK_VPU] = REGISTER_CLK(&bcm2835_clock_vpu_data),
-- [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
-- [BCM2835_CLOCK_ISP] = REGISTER_CLK(&bcm2835_clock_isp_data),
-- [BCM2835_CLOCK_H264] = REGISTER_CLK(&bcm2835_clock_h264_data),
-- [BCM2835_CLOCK_V3D] = REGISTER_CLK(&bcm2835_clock_v3d_data),
-- [BCM2835_CLOCK_SDRAM] = REGISTER_CLK(&bcm2835_clock_sdram_data),
-- [BCM2835_CLOCK_UART] = REGISTER_CLK(&bcm2835_clock_uart_data),
-- [BCM2835_CLOCK_VEC] = REGISTER_CLK(&bcm2835_clock_vec_data),
-- [BCM2835_CLOCK_HSM] = REGISTER_CLK(&bcm2835_clock_hsm_data),
-- [BCM2835_CLOCK_EMMC] = REGISTER_CLK(&bcm2835_clock_emmc_data),
-- [BCM2835_CLOCK_PWM] = REGISTER_CLK(&bcm2835_clock_pwm_data),
-+
-+ /* clocks with oscillator parent mux */
-+
-+ /* One Time Programmable Memory clock. Maximum 10Mhz. */
-+ [BCM2835_CLOCK_OTP] = REGISTER_OSC_CLK(
-+ .name = "otp",
-+ .ctl_reg = CM_OTPCTL,
-+ .div_reg = CM_OTPDIV,
-+ .int_bits = 4,
-+ .frac_bits = 0),
-+ /*
-+ * Used for a 1Mhz clock for the system clocksource, and also used
-+ * bythe watchdog timer and the camera pulse generator.
-+ */
-+ [BCM2835_CLOCK_TIMER] = REGISTER_OSC_CLK(
-+ .name = "timer",
-+ .ctl_reg = CM_TIMERCTL,
-+ .div_reg = CM_TIMERDIV,
-+ .int_bits = 6,
-+ .frac_bits = 12),
-+ /*
-+ * Clock for the temperature sensor.
-+ * Generally run at 2Mhz, max 5Mhz.
-+ */
-+ [BCM2835_CLOCK_TSENS] = REGISTER_OSC_CLK(
-+ .name = "tsens",
-+ .ctl_reg = CM_TSENSCTL,
-+ .div_reg = CM_TSENSDIV,
-+ .int_bits = 5,
-+ .frac_bits = 0),
-+
-+ /* clocks with vpu parent mux */
-+ [BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
-+ .name = "h264",
-+ .ctl_reg = CM_H264CTL,
-+ .div_reg = CM_H264DIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ [BCM2835_CLOCK_ISP] = REGISTER_VPU_CLK(
-+ .name = "isp",
-+ .ctl_reg = CM_ISPCTL,
-+ .div_reg = CM_ISPDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ /*
-+ * Secondary SDRAM clock. Used for low-voltage modes when the PLL
-+ * in the SDRAM controller can't be used.
-+ */
-+ [BCM2835_CLOCK_SDRAM] = REGISTER_VPU_CLK(
-+ .name = "sdram",
-+ .ctl_reg = CM_SDCCTL,
-+ .div_reg = CM_SDCDIV,
-+ .int_bits = 6,
-+ .frac_bits = 0),
-+ [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK(
-+ .name = "v3d",
-+ .ctl_reg = CM_V3DCTL,
-+ .div_reg = CM_V3DDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ /*
-+ * VPU clock. This doesn't have an enable bit, since it drives
-+ * the bus for everything else, and is special so it doesn't need
-+ * to be gated for rate changes. It is also known as "clk_audio"
-+ * in various hardware documentation.
-+ */
-+ [BCM2835_CLOCK_VPU] = REGISTER_VPU_CLK(
-+ .name = "vpu",
-+ .ctl_reg = CM_VPUCTL,
-+ .div_reg = CM_VPUDIV,
-+ .int_bits = 12,
-+ .frac_bits = 8,
-+ .is_vpu_clock = true),
-+
-+ /* clocks with per parent mux */
-+
-+ /* Arasan EMMC clock */
-+ [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
-+ .name = "emmc",
-+ .ctl_reg = CM_EMMCCTL,
-+ .div_reg = CM_EMMCDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ /* HDMI state machine */
-+ [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
-+ .name = "hsm",
-+ .ctl_reg = CM_HSMCTL,
-+ .div_reg = CM_HSMDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
-+ .name = "pwm",
-+ .ctl_reg = CM_PWMCTL,
-+ .div_reg = CM_PWMDIV,
-+ .int_bits = 12,
-+ .frac_bits = 12,
-+ .is_mash_clock = true),
-+ [BCM2835_CLOCK_UART] = REGISTER_PER_CLK(
-+ .name = "uart",
-+ .ctl_reg = CM_UARTCTL,
-+ .div_reg = CM_UARTDIV,
-+ .int_bits = 10,
-+ .frac_bits = 12),
-+ /* TV encoder clock. Only operating frequency is 108Mhz. */
-+ [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
-+ .name = "vec",
-+ .ctl_reg = CM_VECCTL,
-+ .div_reg = CM_VECDIV,
-+ .int_bits = 4,
-+ .frac_bits = 0),
-+
- /* the gates */
-+
-+ /*
-+ * CM_PERIICTL (and CM_PERIACTL, CM_SYSCTL and CM_VPUCTL if
-+ * you have the debug bit set in the power manager, which we
-+ * don't bother exposing) are individual gates off of the
-+ * non-stop vpu clock.
-+ */
- [BCM2835_CLOCK_PERI_IMAGE] = REGISTER_GATE(
-- &bcm2835_clock_peri_image_data),
-+ .name = "peri_image",
-+ .parent = "vpu",
-+ .ctl_reg = CM_PERIICTL),
- };
-
- static int bcm2835_clk_probe(struct platform_device *pdev)
--- /dev/null
+From f634bd6444b004d080a6bbcee812f95669d6a91f Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 29 Feb 2016 15:43:57 +0000
+Subject: [PATCH 263/423] clk: bcm2835: add missing osc and per clocks
+
+Add AVE0, DFT, GP0, GP1, GP2, SLIM, SMI, TEC, DPI, CAM0, CAM1, DSI0E,
+and DSI1E. PULSE is not added because it has an extra divider.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit d3d6f15fd376e3dbba851724057b112558c70b79)
+---
+ drivers/clk/bcm/clk-bcm2835.c | 90 +++++++++++++++++++++++++++++++++++++
+ include/dt-bindings/clock/bcm2835.h | 14 ++++++
+ 2 files changed, 104 insertions(+)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -117,6 +117,8 @@
+ #define CM_SDCCTL 0x1a8
+ #define CM_SDCDIV 0x1ac
+ #define CM_ARMCTL 0x1b0
++#define CM_AVEOCTL 0x1b8
++#define CM_AVEODIV 0x1bc
+ #define CM_EMMCCTL 0x1c0
+ #define CM_EMMCDIV 0x1c4
+
+@@ -1610,6 +1612,12 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_TSENSDIV,
+ .int_bits = 5,
+ .frac_bits = 0),
++ [BCM2835_CLOCK_TEC] = REGISTER_OSC_CLK(
++ .name = "tec",
++ .ctl_reg = CM_TECCTL,
++ .div_reg = CM_TECDIV,
++ .int_bits = 6,
++ .frac_bits = 0),
+
+ /* clocks with vpu parent mux */
+ [BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
+@@ -1624,6 +1632,7 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_ISPDIV,
+ .int_bits = 4,
+ .frac_bits = 8),
++
+ /*
+ * Secondary SDRAM clock. Used for low-voltage modes when the PLL
+ * in the SDRAM controller can't be used.
+@@ -1655,6 +1664,36 @@ static const struct bcm2835_clk_desc clk
+ .is_vpu_clock = true),
+
+ /* clocks with per parent mux */
++ [BCM2835_CLOCK_AVEO] = REGISTER_PER_CLK(
++ .name = "aveo",
++ .ctl_reg = CM_AVEOCTL,
++ .div_reg = CM_AVEODIV,
++ .int_bits = 4,
++ .frac_bits = 0),
++ [BCM2835_CLOCK_CAM0] = REGISTER_PER_CLK(
++ .name = "cam0",
++ .ctl_reg = CM_CAM0CTL,
++ .div_reg = CM_CAM0DIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ [BCM2835_CLOCK_CAM1] = REGISTER_PER_CLK(
++ .name = "cam1",
++ .ctl_reg = CM_CAM1CTL,
++ .div_reg = CM_CAM1DIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ [BCM2835_CLOCK_DFT] = REGISTER_PER_CLK(
++ .name = "dft",
++ .ctl_reg = CM_DFTCTL,
++ .div_reg = CM_DFTDIV,
++ .int_bits = 5,
++ .frac_bits = 0),
++ [BCM2835_CLOCK_DPI] = REGISTER_PER_CLK(
++ .name = "dpi",
++ .ctl_reg = CM_DPICTL,
++ .div_reg = CM_DPIDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
+
+ /* Arasan EMMC clock */
+ [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
+@@ -1663,6 +1702,29 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_EMMCDIV,
+ .int_bits = 4,
+ .frac_bits = 8),
++
++ /* General purpose (GPIO) clocks */
++ [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
++ .name = "gp0",
++ .ctl_reg = CM_GP0CTL,
++ .div_reg = CM_GP0DIV,
++ .int_bits = 12,
++ .frac_bits = 12,
++ .is_mash_clock = true),
++ [BCM2835_CLOCK_GP1] = REGISTER_PER_CLK(
++ .name = "gp1",
++ .ctl_reg = CM_GP1CTL,
++ .div_reg = CM_GP1DIV,
++ .int_bits = 12,
++ .frac_bits = 12,
++ .is_mash_clock = true),
++ [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
++ .name = "gp2",
++ .ctl_reg = CM_GP2CTL,
++ .div_reg = CM_GP2DIV,
++ .int_bits = 12,
++ .frac_bits = 12),
++
+ /* HDMI state machine */
+ [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
+ .name = "hsm",
+@@ -1684,12 +1746,26 @@ static const struct bcm2835_clk_desc clk
+ .int_bits = 12,
+ .frac_bits = 12,
+ .is_mash_clock = true),
++ [BCM2835_CLOCK_SLIM] = REGISTER_PER_CLK(
++ .name = "slim",
++ .ctl_reg = CM_SLIMCTL,
++ .div_reg = CM_SLIMDIV,
++ .int_bits = 12,
++ .frac_bits = 12,
++ .is_mash_clock = true),
++ [BCM2835_CLOCK_SMI] = REGISTER_PER_CLK(
++ .name = "smi",
++ .ctl_reg = CM_SMICTL,
++ .div_reg = CM_SMIDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
+ [BCM2835_CLOCK_UART] = REGISTER_PER_CLK(
+ .name = "uart",
+ .ctl_reg = CM_UARTCTL,
+ .div_reg = CM_UARTDIV,
+ .int_bits = 10,
+ .frac_bits = 12),
++
+ /* TV encoder clock. Only operating frequency is 108Mhz. */
+ [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
+ .name = "vec",
+@@ -1698,6 +1774,20 @@ static const struct bcm2835_clk_desc clk
+ .int_bits = 4,
+ .frac_bits = 0),
+
++ /* dsi clocks */
++ [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
++ .name = "dsi0e",
++ .ctl_reg = CM_DSI0ECTL,
++ .div_reg = CM_DSI0EDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++ [BCM2835_CLOCK_DSI1E] = REGISTER_PER_CLK(
++ .name = "dsi1e",
++ .ctl_reg = CM_DSI1ECTL,
++ .div_reg = CM_DSI1EDIV,
++ .int_bits = 4,
++ .frac_bits = 8),
++
+ /* the gates */
+
+ /*
+--- a/include/dt-bindings/clock/bcm2835.h
++++ b/include/dt-bindings/clock/bcm2835.h
+@@ -50,3 +50,17 @@
+ #define BCM2835_PLLA_CCP2 33
+ #define BCM2835_PLLD_DSI0 34
+ #define BCM2835_PLLD_DSI1 35
++
++#define BCM2835_CLOCK_AVEO 36
++#define BCM2835_CLOCK_DFT 37
++#define BCM2835_CLOCK_GP0 38
++#define BCM2835_CLOCK_GP1 39
++#define BCM2835_CLOCK_GP2 40
++#define BCM2835_CLOCK_SLIM 41
++#define BCM2835_CLOCK_SMI 42
++#define BCM2835_CLOCK_TEC 43
++#define BCM2835_CLOCK_DPI 44
++#define BCM2835_CLOCK_CAM0 45
++#define BCM2835_CLOCK_CAM1 46
++#define BCM2835_CLOCK_DSI0E 47
++#define BCM2835_CLOCK_DSI1E 48
+++ /dev/null
-From 54ed8266a3502b38b9c23e4fe08a21f666c9dc52 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 12:51:43 +0000
-Subject: [PATCH 263/381] clk: bcm2835: enable management of PCM clock
-
-Enable the PCM clock in the SOC, which is used by the
-bcm2835-i2s driver.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 33b689600f43094a9316a1b582f2286d17bc737b)
----
- drivers/clk/bcm/clk-bcm2835.c | 7 +++++++
- include/dt-bindings/clock/bcm2835.h | 1 +
- 2 files changed, 8 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1638,6 +1638,13 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_HSMDIV,
- .int_bits = 4,
- .frac_bits = 8),
-+ [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK(
-+ .name = "pcm",
-+ .ctl_reg = CM_PCMCTL,
-+ .div_reg = CM_PCMDIV,
-+ .int_bits = 12,
-+ .frac_bits = 12,
-+ .is_mash_clock = true),
- [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK(
- .name = "pwm",
- .ctl_reg = CM_PWMCTL,
---- a/include/dt-bindings/clock/bcm2835.h
-+++ b/include/dt-bindings/clock/bcm2835.h
-@@ -44,3 +44,4 @@
- #define BCM2835_CLOCK_EMMC 28
- #define BCM2835_CLOCK_PERI_IMAGE 29
- #define BCM2835_CLOCK_PWM 30
-+#define BCM2835_CLOCK_PCM 31
--- /dev/null
+From 2d65549219b48c5da3bcc743477567b41017c96f Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 1 Dec 2015 16:49:12 -0800
+Subject: [PATCH 264/423] ARM: bcm2835: Define two new packets from the latest
+ firmware.
+
+These packets give us direct access to the firmware's power management
+code, as opposed to GET/SET_POWER_STATE packets that only had a couple
+of domains implemented.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Kevin Hilman <khilman@linaro.org>
+(cherry picked from commit 60d56333e869be6ad6926cdba3ba974512b2183b)
+---
+ include/soc/bcm2835/raspberrypi-firmware.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/soc/bcm2835/raspberrypi-firmware.h
++++ b/include/soc/bcm2835/raspberrypi-firmware.h
+@@ -74,11 +74,13 @@ enum rpi_firmware_property_tag {
+ RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014,
+ RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020,
+ RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021,
++ RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030,
+ RPI_FIRMWARE_SET_CLOCK_STATE = 0x00038001,
+ RPI_FIRMWARE_SET_CLOCK_RATE = 0x00038002,
+ RPI_FIRMWARE_SET_VOLTAGE = 0x00038003,
+ RPI_FIRMWARE_SET_TURBO = 0x00038009,
+ RPI_FIRMWARE_SET_CUSTOMER_OTP = 0x00038021,
++ RPI_FIRMWARE_SET_DOMAIN_STATE = 0x00038030,
+ RPI_FIRMWARE_SET_SDHOST_CLOCK = 0x00038042,
+
+ /* Dispmanx TAGS */
+++ /dev/null
-From 108999bf5b0b9dba4094ca0cff0f0f7e193f3297 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 15:43:56 +0000
-Subject: [PATCH 264/381] clk: bcm2835: add missing PLL clock dividers
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 728436956aa172b24a3212295f8b53feb6479f32)
----
- drivers/clk/bcm/clk-bcm2835.c | 32 ++++++++++++++++++++++++++++++++
- include/dt-bindings/clock/bcm2835.h | 5 +++++
- 2 files changed, 37 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1387,6 +1387,22 @@ static const struct bcm2835_clk_desc clk
- .load_mask = CM_PLLA_LOADPER,
- .hold_mask = CM_PLLA_HOLDPER,
- .fixed_divider = 1),
-+ [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV(
-+ .name = "plla_dsi0",
-+ .source_pll = "plla",
-+ .cm_reg = CM_PLLA,
-+ .a2w_reg = A2W_PLLA_DSI0,
-+ .load_mask = CM_PLLA_LOADDSI0,
-+ .hold_mask = CM_PLLA_HOLDDSI0,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLA_CCP2] = REGISTER_PLL_DIV(
-+ .name = "plla_ccp2",
-+ .source_pll = "plla",
-+ .cm_reg = CM_PLLA,
-+ .a2w_reg = A2W_PLLA_CCP2,
-+ .load_mask = CM_PLLA_LOADCCP2,
-+ .hold_mask = CM_PLLA_HOLDCCP2,
-+ .fixed_divider = 1),
-
- /* PLLB is used for the ARM's clock. */
- [BCM2835_PLLB] = REGISTER_PLL(
-@@ -1501,6 +1517,22 @@ static const struct bcm2835_clk_desc clk
- .load_mask = CM_PLLD_LOADPER,
- .hold_mask = CM_PLLD_HOLDPER,
- .fixed_divider = 1),
-+ [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV(
-+ .name = "plld_dsi0",
-+ .source_pll = "plld",
-+ .cm_reg = CM_PLLD,
-+ .a2w_reg = A2W_PLLD_DSI0,
-+ .load_mask = CM_PLLD_LOADDSI0,
-+ .hold_mask = CM_PLLD_HOLDDSI0,
-+ .fixed_divider = 1),
-+ [BCM2835_PLLD_DSI1] = REGISTER_PLL_DIV(
-+ .name = "plld_dsi1",
-+ .source_pll = "plld",
-+ .cm_reg = CM_PLLD,
-+ .a2w_reg = A2W_PLLD_DSI1,
-+ .load_mask = CM_PLLD_LOADDSI1,
-+ .hold_mask = CM_PLLD_HOLDDSI1,
-+ .fixed_divider = 1),
-
- /*
- * PLLH is used to supply the pixel clock or the AUX clock for the
---- a/include/dt-bindings/clock/bcm2835.h
-+++ b/include/dt-bindings/clock/bcm2835.h
-@@ -45,3 +45,8 @@
- #define BCM2835_CLOCK_PERI_IMAGE 29
- #define BCM2835_CLOCK_PWM 30
- #define BCM2835_CLOCK_PCM 31
-+
-+#define BCM2835_PLLA_DSI0 32
-+#define BCM2835_PLLA_CCP2 33
-+#define BCM2835_PLLD_DSI0 34
-+#define BCM2835_PLLD_DSI1 35
--- /dev/null
+From 0e371c743ab0adb7ada29fbe13712d7ab5696382 Mon Sep 17 00:00:00 2001
+From: Alexander Aring <alex.aring@gmail.com>
+Date: Wed, 16 Dec 2015 16:26:47 -0800
+Subject: [PATCH 265/423] ARM: bcm2835: add rpi power domain driver
+
+This patch adds support for several power domains on Raspberry Pi,
+including USB (so it can be enabled even if the bootloader didn't do
+it), and graphics.
+
+This patch is the combined work of Eric Anholt (who wrote USB support
+inside of the Raspberry Pi firmware driver, and wrote the non-USB
+domain support) and Alexander Aring (who separated the original USB
+work out from the firmware driver).
+
+Signed-off-by: Alexander Aring <alex.aring@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
+Reviewed-by: Kevin Hilman <khilman@linaro.org>
+(cherry picked from commit a09cd356586d33f64cbe64ee4f5c1a7c4a6abee5)
+---
+ drivers/soc/Kconfig | 1 +
+ drivers/soc/Makefile | 1 +
+ drivers/soc/bcm/Kconfig | 9 +
+ drivers/soc/bcm/Makefile | 1 +
+ drivers/soc/bcm/raspberrypi-power.c | 247 ++++++++++++++++++++++++++
+ include/dt-bindings/power/raspberrypi-power.h | 41 +++++
+ 6 files changed, 300 insertions(+)
+ create mode 100644 drivers/soc/bcm/Kconfig
+ create mode 100644 drivers/soc/bcm/Makefile
+ create mode 100644 drivers/soc/bcm/raspberrypi-power.c
+ create mode 100644 include/dt-bindings/power/raspberrypi-power.h
+
+--- a/drivers/soc/Kconfig
++++ b/drivers/soc/Kconfig
+@@ -1,5 +1,6 @@
+ menu "SOC (System On Chip) specific Drivers"
+
++source "drivers/soc/bcm/Kconfig"
+ source "drivers/soc/brcmstb/Kconfig"
+ source "drivers/soc/mediatek/Kconfig"
+ source "drivers/soc/qcom/Kconfig"
+--- a/drivers/soc/Makefile
++++ b/drivers/soc/Makefile
+@@ -2,6 +2,7 @@
+ # Makefile for the Linux Kernel SOC specific device drivers.
+ #
+
++obj-y += bcm/
+ obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/
+ obj-$(CONFIG_MACH_DOVE) += dove/
+ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
+--- /dev/null
++++ b/drivers/soc/bcm/Kconfig
+@@ -0,0 +1,9 @@
++config RASPBERRYPI_POWER
++ bool "Raspberry Pi power domain driver"
++ depends on ARCH_BCM2835 || COMPILE_TEST
++ depends on RASPBERRYPI_FIRMWARE
++ select PM_GENERIC_DOMAINS if PM
++ select PM_GENERIC_DOMAINS_OF if PM
++ help
++ This enables support for the RPi power domains which can be enabled
++ or disabled via the RPi firmware.
+--- /dev/null
++++ b/drivers/soc/bcm/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o
+--- /dev/null
++++ b/drivers/soc/bcm/raspberrypi-power.c
+@@ -0,0 +1,247 @@
++/* (C) 2015 Pengutronix, Alexander Aring <aar@pengutronix.de>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Authors:
++ * Alexander Aring <aar@pengutronix.de>
++ * Eric Anholt <eric@anholt.net>
++ */
++
++#include <linux/module.h>
++#include <linux/of_platform.h>
++#include <linux/platform_device.h>
++#include <linux/pm_domain.h>
++#include <dt-bindings/power/raspberrypi-power.h>
++#include <soc/bcm2835/raspberrypi-firmware.h>
++
++/*
++ * Firmware indices for the old power domains interface. Only a few
++ * of them were actually implemented.
++ */
++#define RPI_OLD_POWER_DOMAIN_USB 3
++#define RPI_OLD_POWER_DOMAIN_V3D 10
++
++struct rpi_power_domain {
++ u32 domain;
++ bool enabled;
++ bool old_interface;
++ struct generic_pm_domain base;
++ struct rpi_firmware *fw;
++};
++
++struct rpi_power_domains {
++ bool has_new_interface;
++ struct genpd_onecell_data xlate;
++ struct rpi_firmware *fw;
++ struct rpi_power_domain domains[RPI_POWER_DOMAIN_COUNT];
++};
++
++/*
++ * Packet definition used by RPI_FIRMWARE_SET_POWER_STATE and
++ * RPI_FIRMWARE_SET_DOMAIN_STATE
++ */
++struct rpi_power_domain_packet {
++ u32 domain;
++ u32 on;
++} __packet;
++
++/*
++ * Asks the firmware to enable or disable power on a specific power
++ * domain.
++ */
++static int rpi_firmware_set_power(struct rpi_power_domain *rpi_domain, bool on)
++{
++ struct rpi_power_domain_packet packet;
++
++ packet.domain = rpi_domain->domain;
++ packet.on = on;
++ return rpi_firmware_property(rpi_domain->fw,
++ rpi_domain->old_interface ?
++ RPI_FIRMWARE_SET_POWER_STATE :
++ RPI_FIRMWARE_SET_DOMAIN_STATE,
++ &packet, sizeof(packet));
++}
++
++static int rpi_domain_off(struct generic_pm_domain *domain)
++{
++ struct rpi_power_domain *rpi_domain =
++ container_of(domain, struct rpi_power_domain, base);
++
++ return rpi_firmware_set_power(rpi_domain, false);
++}
++
++static int rpi_domain_on(struct generic_pm_domain *domain)
++{
++ struct rpi_power_domain *rpi_domain =
++ container_of(domain, struct rpi_power_domain, base);
++
++ return rpi_firmware_set_power(rpi_domain, true);
++}
++
++static void rpi_common_init_power_domain(struct rpi_power_domains *rpi_domains,
++ int xlate_index, const char *name)
++{
++ struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index];
++
++ dom->fw = rpi_domains->fw;
++
++ dom->base.name = name;
++ dom->base.power_on = rpi_domain_on;
++ dom->base.power_off = rpi_domain_off;
++
++ /*
++ * Treat all power domains as off at boot.
++ *
++ * The firmware itself may be keeping some domains on, but
++ * from Linux's perspective all we control is the refcounts
++ * that we give to the firmware, and we can't ask the firmware
++ * to turn off something that we haven't ourselves turned on.
++ */
++ pm_genpd_init(&dom->base, NULL, true);
++
++ rpi_domains->xlate.domains[xlate_index] = &dom->base;
++}
++
++static void rpi_init_power_domain(struct rpi_power_domains *rpi_domains,
++ int xlate_index, const char *name)
++{
++ struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index];
++
++ if (!rpi_domains->has_new_interface)
++ return;
++
++ /* The DT binding index is the firmware's domain index minus one. */
++ dom->domain = xlate_index + 1;
++
++ rpi_common_init_power_domain(rpi_domains, xlate_index, name);
++}
++
++static void rpi_init_old_power_domain(struct rpi_power_domains *rpi_domains,
++ int xlate_index, int domain,
++ const char *name)
++{
++ struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index];
++
++ dom->old_interface = true;
++ dom->domain = domain;
++
++ rpi_common_init_power_domain(rpi_domains, xlate_index, name);
++}
++
++/*
++ * Detects whether the firmware supports the new power domains interface.
++ *
++ * The firmware doesn't actually return an error on an unknown tag,
++ * and just skips over it, so we do the detection by putting an
++ * unexpected value in the return field and checking if it was
++ * unchanged.
++ */
++static bool
++rpi_has_new_domain_support(struct rpi_power_domains *rpi_domains)
++{
++ struct rpi_power_domain_packet packet;
++ int ret;
++
++ packet.domain = RPI_POWER_DOMAIN_ARM;
++ packet.on = ~0;
++
++ ret = rpi_firmware_property(rpi_domains->fw,
++ RPI_FIRMWARE_GET_DOMAIN_STATE,
++ &packet, sizeof(packet));
++
++ return ret == 0 && packet.on != ~0;
++}
++
++static int rpi_power_probe(struct platform_device *pdev)
++{
++ struct device_node *fw_np;
++ struct device *dev = &pdev->dev;
++ struct rpi_power_domains *rpi_domains;
++
++ rpi_domains = devm_kzalloc(dev, sizeof(*rpi_domains), GFP_KERNEL);
++ if (!rpi_domains)
++ return -ENOMEM;
++
++ rpi_domains->xlate.domains =
++ devm_kzalloc(dev, sizeof(*rpi_domains->xlate.domains) *
++ RPI_POWER_DOMAIN_COUNT, GFP_KERNEL);
++ if (!rpi_domains->xlate.domains)
++ return -ENOMEM;
++
++ rpi_domains->xlate.num_domains = RPI_POWER_DOMAIN_COUNT;
++
++ fw_np = of_parse_phandle(pdev->dev.of_node, "firmware", 0);
++ if (!fw_np) {
++ dev_err(&pdev->dev, "no firmware node\n");
++ return -ENODEV;
++ }
++
++ rpi_domains->fw = rpi_firmware_get(fw_np);
++ of_node_put(fw_np);
++ if (!rpi_domains->fw)
++ return -EPROBE_DEFER;
++
++ rpi_domains->has_new_interface =
++ rpi_has_new_domain_support(rpi_domains);
++
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_I2C0, "I2C0");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_I2C1, "I2C1");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_I2C2, "I2C2");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_VIDEO_SCALER,
++ "VIDEO_SCALER");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_VPU1, "VPU1");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_HDMI, "HDMI");
++
++ /*
++ * Use the old firmware interface for USB power, so that we
++ * can turn it on even if the firmware hasn't been updated.
++ */
++ rpi_init_old_power_domain(rpi_domains, RPI_POWER_DOMAIN_USB,
++ RPI_OLD_POWER_DOMAIN_USB, "USB");
++
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_VEC, "VEC");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_JPEG, "JPEG");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_H264, "H264");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_V3D, "V3D");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_ISP, "ISP");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_UNICAM0, "UNICAM0");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_UNICAM1, "UNICAM1");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CCP2RX, "CCP2RX");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CSI2, "CSI2");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CPI, "CPI");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_DSI0, "DSI0");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_DSI1, "DSI1");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_TRANSPOSER,
++ "TRANSPOSER");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CCP2TX, "CCP2TX");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CDP, "CDP");
++ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_ARM, "ARM");
++
++ of_genpd_add_provider_onecell(dev->of_node, &rpi_domains->xlate);
++
++ platform_set_drvdata(pdev, rpi_domains);
++
++ return 0;
++}
++
++static const struct of_device_id rpi_power_of_match[] = {
++ { .compatible = "raspberrypi,bcm2835-power", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, rpi_power_of_match);
++
++static struct platform_driver rpi_power_driver = {
++ .driver = {
++ .name = "raspberrypi-power",
++ .of_match_table = rpi_power_of_match,
++ },
++ .probe = rpi_power_probe,
++};
++builtin_platform_driver(rpi_power_driver);
++
++MODULE_AUTHOR("Alexander Aring <aar@pengutronix.de>");
++MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
++MODULE_DESCRIPTION("Raspberry Pi power domain driver");
++MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/include/dt-bindings/power/raspberrypi-power.h
+@@ -0,0 +1,41 @@
++/*
++ * Copyright © 2015 Broadcom
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#ifndef _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H
++#define _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H
++
++/* These power domain indices are the firmware interface's indices
++ * minus one.
++ */
++#define RPI_POWER_DOMAIN_I2C0 0
++#define RPI_POWER_DOMAIN_I2C1 1
++#define RPI_POWER_DOMAIN_I2C2 2
++#define RPI_POWER_DOMAIN_VIDEO_SCALER 3
++#define RPI_POWER_DOMAIN_VPU1 4
++#define RPI_POWER_DOMAIN_HDMI 5
++#define RPI_POWER_DOMAIN_USB 6
++#define RPI_POWER_DOMAIN_VEC 7
++#define RPI_POWER_DOMAIN_JPEG 8
++#define RPI_POWER_DOMAIN_H264 9
++#define RPI_POWER_DOMAIN_V3D 10
++#define RPI_POWER_DOMAIN_ISP 11
++#define RPI_POWER_DOMAIN_UNICAM0 12
++#define RPI_POWER_DOMAIN_UNICAM1 13
++#define RPI_POWER_DOMAIN_CCP2RX 14
++#define RPI_POWER_DOMAIN_CSI2 15
++#define RPI_POWER_DOMAIN_CPI 16
++#define RPI_POWER_DOMAIN_DSI0 17
++#define RPI_POWER_DOMAIN_DSI1 18
++#define RPI_POWER_DOMAIN_TRANSPOSER 19
++#define RPI_POWER_DOMAIN_CCP2TX 20
++#define RPI_POWER_DOMAIN_CDP 21
++#define RPI_POWER_DOMAIN_ARM 22
++
++#define RPI_POWER_DOMAIN_COUNT 23
++
++#endif /* _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H */
+++ /dev/null
-From 787e7372d221fad5da0ee1ee74d3c42d409fb22b Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 29 Feb 2016 15:43:57 +0000
-Subject: [PATCH 265/381] clk: bcm2835: add missing osc and per clocks
-
-Add AVE0, DFT, GP0, GP1, GP2, SLIM, SMI, TEC, DPI, CAM0, CAM1, DSI0E,
-and DSI1E. PULSE is not added because it has an extra divider.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit d3d6f15fd376e3dbba851724057b112558c70b79)
----
- drivers/clk/bcm/clk-bcm2835.c | 90 +++++++++++++++++++++++++++++++++++++
- include/dt-bindings/clock/bcm2835.h | 14 ++++++
- 2 files changed, 104 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -117,6 +117,8 @@
- #define CM_SDCCTL 0x1a8
- #define CM_SDCDIV 0x1ac
- #define CM_ARMCTL 0x1b0
-+#define CM_AVEOCTL 0x1b8
-+#define CM_AVEODIV 0x1bc
- #define CM_EMMCCTL 0x1c0
- #define CM_EMMCDIV 0x1c4
-
-@@ -1610,6 +1612,12 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_TSENSDIV,
- .int_bits = 5,
- .frac_bits = 0),
-+ [BCM2835_CLOCK_TEC] = REGISTER_OSC_CLK(
-+ .name = "tec",
-+ .ctl_reg = CM_TECCTL,
-+ .div_reg = CM_TECDIV,
-+ .int_bits = 6,
-+ .frac_bits = 0),
-
- /* clocks with vpu parent mux */
- [BCM2835_CLOCK_H264] = REGISTER_VPU_CLK(
-@@ -1624,6 +1632,7 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_ISPDIV,
- .int_bits = 4,
- .frac_bits = 8),
-+
- /*
- * Secondary SDRAM clock. Used for low-voltage modes when the PLL
- * in the SDRAM controller can't be used.
-@@ -1655,6 +1664,36 @@ static const struct bcm2835_clk_desc clk
- .is_vpu_clock = true),
-
- /* clocks with per parent mux */
-+ [BCM2835_CLOCK_AVEO] = REGISTER_PER_CLK(
-+ .name = "aveo",
-+ .ctl_reg = CM_AVEOCTL,
-+ .div_reg = CM_AVEODIV,
-+ .int_bits = 4,
-+ .frac_bits = 0),
-+ [BCM2835_CLOCK_CAM0] = REGISTER_PER_CLK(
-+ .name = "cam0",
-+ .ctl_reg = CM_CAM0CTL,
-+ .div_reg = CM_CAM0DIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ [BCM2835_CLOCK_CAM1] = REGISTER_PER_CLK(
-+ .name = "cam1",
-+ .ctl_reg = CM_CAM1CTL,
-+ .div_reg = CM_CAM1DIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ [BCM2835_CLOCK_DFT] = REGISTER_PER_CLK(
-+ .name = "dft",
-+ .ctl_reg = CM_DFTCTL,
-+ .div_reg = CM_DFTDIV,
-+ .int_bits = 5,
-+ .frac_bits = 0),
-+ [BCM2835_CLOCK_DPI] = REGISTER_PER_CLK(
-+ .name = "dpi",
-+ .ctl_reg = CM_DPICTL,
-+ .div_reg = CM_DPIDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-
- /* Arasan EMMC clock */
- [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK(
-@@ -1663,6 +1702,29 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_EMMCDIV,
- .int_bits = 4,
- .frac_bits = 8),
-+
-+ /* General purpose (GPIO) clocks */
-+ [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK(
-+ .name = "gp0",
-+ .ctl_reg = CM_GP0CTL,
-+ .div_reg = CM_GP0DIV,
-+ .int_bits = 12,
-+ .frac_bits = 12,
-+ .is_mash_clock = true),
-+ [BCM2835_CLOCK_GP1] = REGISTER_PER_CLK(
-+ .name = "gp1",
-+ .ctl_reg = CM_GP1CTL,
-+ .div_reg = CM_GP1DIV,
-+ .int_bits = 12,
-+ .frac_bits = 12,
-+ .is_mash_clock = true),
-+ [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
-+ .name = "gp2",
-+ .ctl_reg = CM_GP2CTL,
-+ .div_reg = CM_GP2DIV,
-+ .int_bits = 12,
-+ .frac_bits = 12),
-+
- /* HDMI state machine */
- [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
- .name = "hsm",
-@@ -1684,12 +1746,26 @@ static const struct bcm2835_clk_desc clk
- .int_bits = 12,
- .frac_bits = 12,
- .is_mash_clock = true),
-+ [BCM2835_CLOCK_SLIM] = REGISTER_PER_CLK(
-+ .name = "slim",
-+ .ctl_reg = CM_SLIMCTL,
-+ .div_reg = CM_SLIMDIV,
-+ .int_bits = 12,
-+ .frac_bits = 12,
-+ .is_mash_clock = true),
-+ [BCM2835_CLOCK_SMI] = REGISTER_PER_CLK(
-+ .name = "smi",
-+ .ctl_reg = CM_SMICTL,
-+ .div_reg = CM_SMIDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
- [BCM2835_CLOCK_UART] = REGISTER_PER_CLK(
- .name = "uart",
- .ctl_reg = CM_UARTCTL,
- .div_reg = CM_UARTDIV,
- .int_bits = 10,
- .frac_bits = 12),
-+
- /* TV encoder clock. Only operating frequency is 108Mhz. */
- [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
- .name = "vec",
-@@ -1698,6 +1774,20 @@ static const struct bcm2835_clk_desc clk
- .int_bits = 4,
- .frac_bits = 0),
-
-+ /* dsi clocks */
-+ [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
-+ .name = "dsi0e",
-+ .ctl_reg = CM_DSI0ECTL,
-+ .div_reg = CM_DSI0EDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+ [BCM2835_CLOCK_DSI1E] = REGISTER_PER_CLK(
-+ .name = "dsi1e",
-+ .ctl_reg = CM_DSI1ECTL,
-+ .div_reg = CM_DSI1EDIV,
-+ .int_bits = 4,
-+ .frac_bits = 8),
-+
- /* the gates */
-
- /*
---- a/include/dt-bindings/clock/bcm2835.h
-+++ b/include/dt-bindings/clock/bcm2835.h
-@@ -50,3 +50,17 @@
- #define BCM2835_PLLA_CCP2 33
- #define BCM2835_PLLD_DSI0 34
- #define BCM2835_PLLD_DSI1 35
-+
-+#define BCM2835_CLOCK_AVEO 36
-+#define BCM2835_CLOCK_DFT 37
-+#define BCM2835_CLOCK_GP0 38
-+#define BCM2835_CLOCK_GP1 39
-+#define BCM2835_CLOCK_GP2 40
-+#define BCM2835_CLOCK_SLIM 41
-+#define BCM2835_CLOCK_SMI 42
-+#define BCM2835_CLOCK_TEC 43
-+#define BCM2835_CLOCK_DPI 44
-+#define BCM2835_CLOCK_CAM0 45
-+#define BCM2835_CLOCK_CAM1 46
-+#define BCM2835_CLOCK_DSI0E 47
-+#define BCM2835_CLOCK_DSI1E 48
--- /dev/null
+From b07da9e061614b18af32b80e75843e85a0171e56 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Thu, 31 Dec 2015 23:39:14 +0100
+Subject: [PATCH 266/423] ARM: bcm2835: clarify RASPBERRYPI_FIRMWARE dependency
+
+The firmware driver can be a loadable module, but the power domain
+can only be built-in, so we get a build error in an allmodconfig
+kernel:
+
+:(.text+0x17e59c): undefined reference to `rpi_firmware_property'
+:(.text+0x17e51c): undefined reference to `rpi_firmware_get'
+:(.text+0x17e244): undefined reference to `rpi_firmware_property'
+
+This changes the dependency to only allow the power domain code
+to be enabled when the firmware driver is built-in. Other users
+of the firmware driver may still be loadable modules and not
+everyone needs the power domains, so we don't change the firmware
+code.
+
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+(cherry picked from commit 22a5b1ddd83b991b96cb635898e011cce48bf6f8)
+---
+ drivers/soc/bcm/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/soc/bcm/Kconfig
++++ b/drivers/soc/bcm/Kconfig
+@@ -1,7 +1,7 @@
+ config RASPBERRYPI_POWER
+ bool "Raspberry Pi power domain driver"
+ depends on ARCH_BCM2835 || COMPILE_TEST
+- depends on RASPBERRYPI_FIRMWARE
++ depends on RASPBERRYPI_FIRMWARE=y
+ select PM_GENERIC_DOMAINS if PM
+ select PM_GENERIC_DOMAINS_OF if PM
+ help
+++ /dev/null
-From 2ecc0a11eb0e77a75c2ae468d656c773877f3997 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 13 Apr 2016 13:05:03 -0700
-Subject: [PATCH 266/381] clk: bcm2835: Fix PLL poweron
-
-In poweroff, we set the reset bit and the power down bit, but only
-managed to unset the reset bit for poweron. This meant that if HDMI
-did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
-PLLH (that had been on at boot time) and never recover.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
-Cc: stable@vger.kernel.org
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-(cherry picked from commit d794a7b18350b7538e64248adf639f2cb8da5fb7)
----
- drivers/clk/bcm/clk-bcm2835.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -561,6 +561,10 @@ static int bcm2835_pll_on(struct clk_hw
- cprman_read(cprman, data->a2w_ctrl_reg) &
- ~A2W_PLL_CTRL_PWRDN);
-
-+ cprman_write(cprman, data->a2w_ctrl_reg,
-+ cprman_read(cprman, data->a2w_ctrl_reg) &
-+ ~A2W_PLL_CTRL_PWRDN);
-+
- /* Take the PLL out of reset. */
- cprman_write(cprman, data->cm_ctrl_reg,
- cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST);
--- /dev/null
+From befc30415610ee28c619b14b8cee501184b43bf8 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Apr 2016 15:55:02 -0700
+Subject: [PATCH 267/423] ARM: bcm2708: Enable building power domain driver.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/soc/bcm/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/soc/bcm/Kconfig
++++ b/drivers/soc/bcm/Kconfig
+@@ -1,6 +1,6 @@
+ config RASPBERRYPI_POWER
+ bool "Raspberry Pi power domain driver"
+- depends on ARCH_BCM2835 || COMPILE_TEST
++ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709 || COMPILE_TEST
+ depends on RASPBERRYPI_FIRMWARE=y
+ select PM_GENERIC_DOMAINS if PM
+ select PM_GENERIC_DOMAINS_OF if PM
+++ /dev/null
-From 90ec918fe0427b1b8c9d761a12f8ebcd888ab6e7 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 1 Dec 2015 16:49:12 -0800
-Subject: [PATCH 267/381] ARM: bcm2835: Define two new packets from the latest
- firmware.
-
-These packets give us direct access to the firmware's power management
-code, as opposed to GET/SET_POWER_STATE packets that only had a couple
-of domains implemented.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Kevin Hilman <khilman@linaro.org>
-(cherry picked from commit 60d56333e869be6ad6926cdba3ba974512b2183b)
----
- include/soc/bcm2835/raspberrypi-firmware.h | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/include/soc/bcm2835/raspberrypi-firmware.h
-+++ b/include/soc/bcm2835/raspberrypi-firmware.h
-@@ -74,11 +74,13 @@ enum rpi_firmware_property_tag {
- RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014,
- RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020,
- RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021,
-+ RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030,
- RPI_FIRMWARE_SET_CLOCK_STATE = 0x00038001,
- RPI_FIRMWARE_SET_CLOCK_RATE = 0x00038002,
- RPI_FIRMWARE_SET_VOLTAGE = 0x00038003,
- RPI_FIRMWARE_SET_TURBO = 0x00038009,
- RPI_FIRMWARE_SET_CUSTOMER_OTP = 0x00038021,
-+ RPI_FIRMWARE_SET_DOMAIN_STATE = 0x00038030,
- RPI_FIRMWARE_SET_SDHOST_CLOCK = 0x00038042,
-
- /* Dispmanx TAGS */
+++ /dev/null
-From 9088d7b5c981548b23b8a5c96310bca88ef1503f Mon Sep 17 00:00:00 2001
-From: Alexander Aring <alex.aring@gmail.com>
-Date: Wed, 16 Dec 2015 16:26:47 -0800
-Subject: [PATCH 268/381] ARM: bcm2835: add rpi power domain driver
-
-This patch adds support for several power domains on Raspberry Pi,
-including USB (so it can be enabled even if the bootloader didn't do
-it), and graphics.
-
-This patch is the combined work of Eric Anholt (who wrote USB support
-inside of the Raspberry Pi firmware driver, and wrote the non-USB
-domain support) and Alexander Aring (who separated the original USB
-work out from the firmware driver).
-
-Signed-off-by: Alexander Aring <alex.aring@gmail.com>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
-Reviewed-by: Kevin Hilman <khilman@linaro.org>
-(cherry picked from commit a09cd356586d33f64cbe64ee4f5c1a7c4a6abee5)
----
- drivers/soc/Kconfig | 1 +
- drivers/soc/Makefile | 1 +
- drivers/soc/bcm/Kconfig | 9 +
- drivers/soc/bcm/Makefile | 1 +
- drivers/soc/bcm/raspberrypi-power.c | 247 ++++++++++++++++++++++++++
- include/dt-bindings/power/raspberrypi-power.h | 41 +++++
- 6 files changed, 300 insertions(+)
- create mode 100644 drivers/soc/bcm/Kconfig
- create mode 100644 drivers/soc/bcm/Makefile
- create mode 100644 drivers/soc/bcm/raspberrypi-power.c
- create mode 100644 include/dt-bindings/power/raspberrypi-power.h
-
---- a/drivers/soc/Kconfig
-+++ b/drivers/soc/Kconfig
-@@ -1,5 +1,6 @@
- menu "SOC (System On Chip) specific Drivers"
-
-+source "drivers/soc/bcm/Kconfig"
- source "drivers/soc/brcmstb/Kconfig"
- source "drivers/soc/mediatek/Kconfig"
- source "drivers/soc/qcom/Kconfig"
---- a/drivers/soc/Makefile
-+++ b/drivers/soc/Makefile
-@@ -2,6 +2,7 @@
- # Makefile for the Linux Kernel SOC specific device drivers.
- #
-
-+obj-y += bcm/
- obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/
- obj-$(CONFIG_MACH_DOVE) += dove/
- obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
---- /dev/null
-+++ b/drivers/soc/bcm/Kconfig
-@@ -0,0 +1,9 @@
-+config RASPBERRYPI_POWER
-+ bool "Raspberry Pi power domain driver"
-+ depends on ARCH_BCM2835 || COMPILE_TEST
-+ depends on RASPBERRYPI_FIRMWARE
-+ select PM_GENERIC_DOMAINS if PM
-+ select PM_GENERIC_DOMAINS_OF if PM
-+ help
-+ This enables support for the RPi power domains which can be enabled
-+ or disabled via the RPi firmware.
---- /dev/null
-+++ b/drivers/soc/bcm/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o
---- /dev/null
-+++ b/drivers/soc/bcm/raspberrypi-power.c
-@@ -0,0 +1,247 @@
-+/* (C) 2015 Pengutronix, Alexander Aring <aar@pengutronix.de>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Authors:
-+ * Alexander Aring <aar@pengutronix.de>
-+ * Eric Anholt <eric@anholt.net>
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_domain.h>
-+#include <dt-bindings/power/raspberrypi-power.h>
-+#include <soc/bcm2835/raspberrypi-firmware.h>
-+
-+/*
-+ * Firmware indices for the old power domains interface. Only a few
-+ * of them were actually implemented.
-+ */
-+#define RPI_OLD_POWER_DOMAIN_USB 3
-+#define RPI_OLD_POWER_DOMAIN_V3D 10
-+
-+struct rpi_power_domain {
-+ u32 domain;
-+ bool enabled;
-+ bool old_interface;
-+ struct generic_pm_domain base;
-+ struct rpi_firmware *fw;
-+};
-+
-+struct rpi_power_domains {
-+ bool has_new_interface;
-+ struct genpd_onecell_data xlate;
-+ struct rpi_firmware *fw;
-+ struct rpi_power_domain domains[RPI_POWER_DOMAIN_COUNT];
-+};
-+
-+/*
-+ * Packet definition used by RPI_FIRMWARE_SET_POWER_STATE and
-+ * RPI_FIRMWARE_SET_DOMAIN_STATE
-+ */
-+struct rpi_power_domain_packet {
-+ u32 domain;
-+ u32 on;
-+} __packet;
-+
-+/*
-+ * Asks the firmware to enable or disable power on a specific power
-+ * domain.
-+ */
-+static int rpi_firmware_set_power(struct rpi_power_domain *rpi_domain, bool on)
-+{
-+ struct rpi_power_domain_packet packet;
-+
-+ packet.domain = rpi_domain->domain;
-+ packet.on = on;
-+ return rpi_firmware_property(rpi_domain->fw,
-+ rpi_domain->old_interface ?
-+ RPI_FIRMWARE_SET_POWER_STATE :
-+ RPI_FIRMWARE_SET_DOMAIN_STATE,
-+ &packet, sizeof(packet));
-+}
-+
-+static int rpi_domain_off(struct generic_pm_domain *domain)
-+{
-+ struct rpi_power_domain *rpi_domain =
-+ container_of(domain, struct rpi_power_domain, base);
-+
-+ return rpi_firmware_set_power(rpi_domain, false);
-+}
-+
-+static int rpi_domain_on(struct generic_pm_domain *domain)
-+{
-+ struct rpi_power_domain *rpi_domain =
-+ container_of(domain, struct rpi_power_domain, base);
-+
-+ return rpi_firmware_set_power(rpi_domain, true);
-+}
-+
-+static void rpi_common_init_power_domain(struct rpi_power_domains *rpi_domains,
-+ int xlate_index, const char *name)
-+{
-+ struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index];
-+
-+ dom->fw = rpi_domains->fw;
-+
-+ dom->base.name = name;
-+ dom->base.power_on = rpi_domain_on;
-+ dom->base.power_off = rpi_domain_off;
-+
-+ /*
-+ * Treat all power domains as off at boot.
-+ *
-+ * The firmware itself may be keeping some domains on, but
-+ * from Linux's perspective all we control is the refcounts
-+ * that we give to the firmware, and we can't ask the firmware
-+ * to turn off something that we haven't ourselves turned on.
-+ */
-+ pm_genpd_init(&dom->base, NULL, true);
-+
-+ rpi_domains->xlate.domains[xlate_index] = &dom->base;
-+}
-+
-+static void rpi_init_power_domain(struct rpi_power_domains *rpi_domains,
-+ int xlate_index, const char *name)
-+{
-+ struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index];
-+
-+ if (!rpi_domains->has_new_interface)
-+ return;
-+
-+ /* The DT binding index is the firmware's domain index minus one. */
-+ dom->domain = xlate_index + 1;
-+
-+ rpi_common_init_power_domain(rpi_domains, xlate_index, name);
-+}
-+
-+static void rpi_init_old_power_domain(struct rpi_power_domains *rpi_domains,
-+ int xlate_index, int domain,
-+ const char *name)
-+{
-+ struct rpi_power_domain *dom = &rpi_domains->domains[xlate_index];
-+
-+ dom->old_interface = true;
-+ dom->domain = domain;
-+
-+ rpi_common_init_power_domain(rpi_domains, xlate_index, name);
-+}
-+
-+/*
-+ * Detects whether the firmware supports the new power domains interface.
-+ *
-+ * The firmware doesn't actually return an error on an unknown tag,
-+ * and just skips over it, so we do the detection by putting an
-+ * unexpected value in the return field and checking if it was
-+ * unchanged.
-+ */
-+static bool
-+rpi_has_new_domain_support(struct rpi_power_domains *rpi_domains)
-+{
-+ struct rpi_power_domain_packet packet;
-+ int ret;
-+
-+ packet.domain = RPI_POWER_DOMAIN_ARM;
-+ packet.on = ~0;
-+
-+ ret = rpi_firmware_property(rpi_domains->fw,
-+ RPI_FIRMWARE_GET_DOMAIN_STATE,
-+ &packet, sizeof(packet));
-+
-+ return ret == 0 && packet.on != ~0;
-+}
-+
-+static int rpi_power_probe(struct platform_device *pdev)
-+{
-+ struct device_node *fw_np;
-+ struct device *dev = &pdev->dev;
-+ struct rpi_power_domains *rpi_domains;
-+
-+ rpi_domains = devm_kzalloc(dev, sizeof(*rpi_domains), GFP_KERNEL);
-+ if (!rpi_domains)
-+ return -ENOMEM;
-+
-+ rpi_domains->xlate.domains =
-+ devm_kzalloc(dev, sizeof(*rpi_domains->xlate.domains) *
-+ RPI_POWER_DOMAIN_COUNT, GFP_KERNEL);
-+ if (!rpi_domains->xlate.domains)
-+ return -ENOMEM;
-+
-+ rpi_domains->xlate.num_domains = RPI_POWER_DOMAIN_COUNT;
-+
-+ fw_np = of_parse_phandle(pdev->dev.of_node, "firmware", 0);
-+ if (!fw_np) {
-+ dev_err(&pdev->dev, "no firmware node\n");
-+ return -ENODEV;
-+ }
-+
-+ rpi_domains->fw = rpi_firmware_get(fw_np);
-+ of_node_put(fw_np);
-+ if (!rpi_domains->fw)
-+ return -EPROBE_DEFER;
-+
-+ rpi_domains->has_new_interface =
-+ rpi_has_new_domain_support(rpi_domains);
-+
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_I2C0, "I2C0");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_I2C1, "I2C1");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_I2C2, "I2C2");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_VIDEO_SCALER,
-+ "VIDEO_SCALER");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_VPU1, "VPU1");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_HDMI, "HDMI");
-+
-+ /*
-+ * Use the old firmware interface for USB power, so that we
-+ * can turn it on even if the firmware hasn't been updated.
-+ */
-+ rpi_init_old_power_domain(rpi_domains, RPI_POWER_DOMAIN_USB,
-+ RPI_OLD_POWER_DOMAIN_USB, "USB");
-+
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_VEC, "VEC");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_JPEG, "JPEG");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_H264, "H264");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_V3D, "V3D");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_ISP, "ISP");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_UNICAM0, "UNICAM0");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_UNICAM1, "UNICAM1");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CCP2RX, "CCP2RX");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CSI2, "CSI2");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CPI, "CPI");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_DSI0, "DSI0");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_DSI1, "DSI1");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_TRANSPOSER,
-+ "TRANSPOSER");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CCP2TX, "CCP2TX");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_CDP, "CDP");
-+ rpi_init_power_domain(rpi_domains, RPI_POWER_DOMAIN_ARM, "ARM");
-+
-+ of_genpd_add_provider_onecell(dev->of_node, &rpi_domains->xlate);
-+
-+ platform_set_drvdata(pdev, rpi_domains);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id rpi_power_of_match[] = {
-+ { .compatible = "raspberrypi,bcm2835-power", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, rpi_power_of_match);
-+
-+static struct platform_driver rpi_power_driver = {
-+ .driver = {
-+ .name = "raspberrypi-power",
-+ .of_match_table = rpi_power_of_match,
-+ },
-+ .probe = rpi_power_probe,
-+};
-+builtin_platform_driver(rpi_power_driver);
-+
-+MODULE_AUTHOR("Alexander Aring <aar@pengutronix.de>");
-+MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
-+MODULE_DESCRIPTION("Raspberry Pi power domain driver");
-+MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/include/dt-bindings/power/raspberrypi-power.h
-@@ -0,0 +1,41 @@
-+/*
-+ * Copyright © 2015 Broadcom
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H
-+#define _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H
-+
-+/* These power domain indices are the firmware interface's indices
-+ * minus one.
-+ */
-+#define RPI_POWER_DOMAIN_I2C0 0
-+#define RPI_POWER_DOMAIN_I2C1 1
-+#define RPI_POWER_DOMAIN_I2C2 2
-+#define RPI_POWER_DOMAIN_VIDEO_SCALER 3
-+#define RPI_POWER_DOMAIN_VPU1 4
-+#define RPI_POWER_DOMAIN_HDMI 5
-+#define RPI_POWER_DOMAIN_USB 6
-+#define RPI_POWER_DOMAIN_VEC 7
-+#define RPI_POWER_DOMAIN_JPEG 8
-+#define RPI_POWER_DOMAIN_H264 9
-+#define RPI_POWER_DOMAIN_V3D 10
-+#define RPI_POWER_DOMAIN_ISP 11
-+#define RPI_POWER_DOMAIN_UNICAM0 12
-+#define RPI_POWER_DOMAIN_UNICAM1 13
-+#define RPI_POWER_DOMAIN_CCP2RX 14
-+#define RPI_POWER_DOMAIN_CSI2 15
-+#define RPI_POWER_DOMAIN_CPI 16
-+#define RPI_POWER_DOMAIN_DSI0 17
-+#define RPI_POWER_DOMAIN_DSI1 18
-+#define RPI_POWER_DOMAIN_TRANSPOSER 19
-+#define RPI_POWER_DOMAIN_CCP2TX 20
-+#define RPI_POWER_DOMAIN_CDP 21
-+#define RPI_POWER_DOMAIN_ARM 22
-+
-+#define RPI_POWER_DOMAIN_COUNT 23
-+
-+#endif /* _DT_BINDINGS_ARM_BCM2835_RPI_POWER_H */
--- /dev/null
+From b4ca3f0d1ec696492df39df6878a96d1ec14458a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Apr 2016 14:23:30 -0700
+Subject: [PATCH 268/423] bcm2708: Add RASPBERRYPI_POWER to the defconfigs.
+
+This will be used by the GPU driver for powering on HDMI at boot time
+and for 3D hang reset.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/configs/bcm2709_defconfig | 2 ++
+ arch/arm/configs/bcmrpi_defconfig | 2 ++
+ 2 files changed, 4 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -71,6 +71,7 @@ CONFIG_NEON=y
+ CONFIG_KERNEL_MODE_NEON=y
+ CONFIG_BINFMT_MISC=m
+ # CONFIG_SUSPEND is not set
++CONFIG_PM=y
+ CONFIG_NET=y
+ CONFIG_PACKET=y
+ CONFIG_UNIX=y
+@@ -1116,6 +1117,7 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m
+ CONFIG_MAILBOX=y
+ CONFIG_BCM2835_MBOX=y
+ # CONFIG_IOMMU_SUPPORT is not set
++CONFIG_RASPBERRYPI_POWER=y
+ CONFIG_EXTCON=m
+ CONFIG_EXTCON_ARIZONA=m
+ CONFIG_IIO=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -64,6 +64,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+ CONFIG_VFP=y
+ CONFIG_BINFMT_MISC=m
+ # CONFIG_SUSPEND is not set
++CONFIG_PM=y
+ CONFIG_NET=y
+ CONFIG_PACKET=y
+ CONFIG_UNIX=y
+@@ -1123,6 +1124,7 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m
+ CONFIG_MAILBOX=y
+ CONFIG_BCM2835_MBOX=y
+ # CONFIG_IOMMU_SUPPORT is not set
++CONFIG_RASPBERRYPI_POWER=y
+ CONFIG_EXTCON=m
+ CONFIG_EXTCON_ARIZONA=m
+ CONFIG_IIO=m
+++ /dev/null
-From 9cfa49abaf59e6f41da47f37caae6075741ca876 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Thu, 31 Dec 2015 23:39:14 +0100
-Subject: [PATCH 269/381] ARM: bcm2835: clarify RASPBERRYPI_FIRMWARE dependency
-
-The firmware driver can be a loadable module, but the power domain
-can only be built-in, so we get a build error in an allmodconfig
-kernel:
-
-:(.text+0x17e59c): undefined reference to `rpi_firmware_property'
-:(.text+0x17e51c): undefined reference to `rpi_firmware_get'
-:(.text+0x17e244): undefined reference to `rpi_firmware_property'
-
-This changes the dependency to only allow the power domain code
-to be enabled when the firmware driver is built-in. Other users
-of the firmware driver may still be loadable modules and not
-everyone needs the power domains, so we don't change the firmware
-code.
-
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-(cherry picked from commit 22a5b1ddd83b991b96cb635898e011cce48bf6f8)
----
- drivers/soc/bcm/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/soc/bcm/Kconfig
-+++ b/drivers/soc/bcm/Kconfig
-@@ -1,7 +1,7 @@
- config RASPBERRYPI_POWER
- bool "Raspberry Pi power domain driver"
- depends on ARCH_BCM2835 || COMPILE_TEST
-- depends on RASPBERRYPI_FIRMWARE
-+ depends on RASPBERRYPI_FIRMWARE=y
- select PM_GENERIC_DOMAINS if PM
- select PM_GENERIC_DOMAINS_OF if PM
- help
--- /dev/null
+From 5a8fe845b22e7ecef4b0d0d7fdfaa21794fa48c9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Apr 2016 14:36:31 -0700
+Subject: [PATCH 269/423] bcm2708: Add the power domain driver to the device
+ tree.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -285,6 +285,12 @@
+ mboxes = <&mailbox>;
+ };
+
++ power: power {
++ compatible = "raspberrypi,bcm2835-power";
++ firmware = <&firmware>;
++ #power-domain-cells = <1>;
++ };
++
+ leds: leds {
+ compatible = "gpio-leds";
+ };
+++ /dev/null
-From 61c99da55170241f7d06ba6dc86630ae1890bea9 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Apr 2016 15:55:02 -0700
-Subject: [PATCH 270/381] ARM: bcm2708: Enable building power domain driver.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/soc/bcm/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/soc/bcm/Kconfig
-+++ b/drivers/soc/bcm/Kconfig
-@@ -1,6 +1,6 @@
- config RASPBERRYPI_POWER
- bool "Raspberry Pi power domain driver"
-- depends on ARCH_BCM2835 || COMPILE_TEST
-+ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709 || COMPILE_TEST
- depends on RASPBERRYPI_FIRMWARE=y
- select PM_GENERIC_DOMAINS if PM
- select PM_GENERIC_DOMAINS_OF if PM
--- /dev/null
+From e3f9f86ddec3e4a07333fa7f368440e09a7252ce Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Apr 2016 14:40:08 -0700
+Subject: [PATCH 270/423] bcm2708: Reference the HDMI power domain for the HDMI
+ driver.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -6,6 +6,7 @@
+ /plugin/;
+
+ #include "dt-bindings/clock/bcm2835.h"
++#include "dt-bindings/power/raspberrypi-power.h"
+ #include "dt-bindings/gpio/gpio.h"
+
+ / {
+@@ -72,6 +73,7 @@
+ clocks = <&cprman BCM2835_PLLH_PIX>,
+ <&cprman BCM2835_CLOCK_HSM>;
+ clock-names = "pixel", "hdmi";
++ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ };
+
+ v3d@7ec00000 {
+++ /dev/null
-From 0d2dc82a9fe4a2325df235180812065bcb47c3a6 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Apr 2016 14:23:30 -0700
-Subject: [PATCH 271/381] bcm2708: Add RASPBERRYPI_POWER to the defconfigs.
-
-This will be used by the GPU driver for powering on HDMI at boot time
-and for 3D hang reset.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/configs/bcm2709_defconfig | 2 ++
- arch/arm/configs/bcmrpi_defconfig | 2 ++
- 2 files changed, 4 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -71,6 +71,7 @@ CONFIG_NEON=y
- CONFIG_KERNEL_MODE_NEON=y
- CONFIG_BINFMT_MISC=m
- # CONFIG_SUSPEND is not set
-+CONFIG_PM=y
- CONFIG_NET=y
- CONFIG_PACKET=y
- CONFIG_UNIX=y
-@@ -1116,6 +1117,7 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m
- CONFIG_MAILBOX=y
- CONFIG_BCM2835_MBOX=y
- # CONFIG_IOMMU_SUPPORT is not set
-+CONFIG_RASPBERRYPI_POWER=y
- CONFIG_EXTCON=m
- CONFIG_EXTCON_ARIZONA=m
- CONFIG_IIO=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -64,6 +64,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
- CONFIG_VFP=y
- CONFIG_BINFMT_MISC=m
- # CONFIG_SUSPEND is not set
-+CONFIG_PM=y
- CONFIG_NET=y
- CONFIG_PACKET=y
- CONFIG_UNIX=y
-@@ -1123,6 +1124,7 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m
- CONFIG_MAILBOX=y
- CONFIG_BCM2835_MBOX=y
- # CONFIG_IOMMU_SUPPORT is not set
-+CONFIG_RASPBERRYPI_POWER=y
- CONFIG_EXTCON=m
- CONFIG_EXTCON_ARIZONA=m
- CONFIG_IIO=m
--- /dev/null
+From a11ebfca5c605cdd30599edf201a65ece99b05fe Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 17 Dec 2015 15:36:28 +0300
+Subject: [PATCH 271/423] drm/vc4: copy_to_user() returns the number of bytes
+ remaining
+
+The copy_to/from_user() functions return the number of bytes remaining
+to be copied. We want to return error codes here.
+
+Also it's a bad idea to print an error message if a copy from user fails
+because users can use that to spam /var/log/messages which is annoying
+so I removed those.
+
+Fixes: 214613656b51 ('drm/vc4: Add an interface for capturing the GPU state after a hang.')
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 65c4777de54a39b2722a4b1ff3306d044014d511)
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 37 ++++++++++++++++++-------------------
+ 1 file changed, 18 insertions(+), 19 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -85,7 +85,7 @@ vc4_get_hang_state_ioctl(struct drm_devi
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ unsigned long irqflags;
+ u32 i;
+- int ret;
++ int ret = 0;
+
+ spin_lock_irqsave(&vc4->job_lock, irqflags);
+ kernel_state = vc4->hang_state;
+@@ -133,9 +133,11 @@ vc4_get_hang_state_ioctl(struct drm_devi
+ bo_state[i].size = vc4_bo->base.base.size;
+ }
+
+- ret = copy_to_user((void __user *)(uintptr_t)get_state->bo,
+- bo_state,
+- state->bo_count * sizeof(*bo_state));
++ if (copy_to_user((void __user *)(uintptr_t)get_state->bo,
++ bo_state,
++ state->bo_count * sizeof(*bo_state)))
++ ret = -EFAULT;
++
+ kfree(bo_state);
+
+ err_free:
+@@ -563,27 +565,24 @@ vc4_get_bcl(struct drm_device *dev, stru
+ exec->shader_state = temp + exec_size;
+ exec->shader_state_size = args->shader_rec_count;
+
+- ret = copy_from_user(bin,
+- (void __user *)(uintptr_t)args->bin_cl,
+- args->bin_cl_size);
+- if (ret) {
+- DRM_ERROR("Failed to copy in bin cl\n");
++ if (copy_from_user(bin,
++ (void __user *)(uintptr_t)args->bin_cl,
++ args->bin_cl_size)) {
++ ret = -EFAULT;
+ goto fail;
+ }
+
+- ret = copy_from_user(exec->shader_rec_u,
+- (void __user *)(uintptr_t)args->shader_rec,
+- args->shader_rec_size);
+- if (ret) {
+- DRM_ERROR("Failed to copy in shader recs\n");
++ if (copy_from_user(exec->shader_rec_u,
++ (void __user *)(uintptr_t)args->shader_rec,
++ args->shader_rec_size)) {
++ ret = -EFAULT;
+ goto fail;
+ }
+
+- ret = copy_from_user(exec->uniforms_u,
+- (void __user *)(uintptr_t)args->uniforms,
+- args->uniforms_size);
+- if (ret) {
+- DRM_ERROR("Failed to copy in uniforms cl\n");
++ if (copy_from_user(exec->uniforms_u,
++ (void __user *)(uintptr_t)args->uniforms,
++ args->uniforms_size)) {
++ ret = -EFAULT;
+ goto fail;
+ }
+
+++ /dev/null
-From 4eb2de8729beeae668d522478da951d1da91c42f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Apr 2016 14:36:31 -0700
-Subject: [PATCH 272/381] bcm2708: Add the power domain driver to the device
- tree.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -285,6 +285,12 @@
- mboxes = <&mailbox>;
- };
-
-+ power: power {
-+ compatible = "raspberrypi,bcm2835-power";
-+ firmware = <&firmware>;
-+ #power-domain-cells = <1>;
-+ };
-+
- leds: leds {
- compatible = "gpio-leds";
- };
--- /dev/null
+From 5c182b5f46cb781e945b3e567ac97fbb369d75d4 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 17 Dec 2015 15:39:08 +0300
+Subject: [PATCH 272/423] drm/vc4: allocate enough memory in
+ vc4_save_hang_state()
+
+"state" is smaller than "kernel_state" so we end up corrupting memory.
+
+Fixes: 214613656b51 ('drm/vc4: Add an interface for capturing the GPU state after a hang.')
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 7e5082fbc00cc157e57a70cdb6b9bbb21289afb1)
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -159,7 +159,7 @@ vc4_save_hang_state(struct drm_device *d
+ unsigned long irqflags;
+ unsigned int i, unref_list_count;
+
+- kernel_state = kcalloc(1, sizeof(*state), GFP_KERNEL);
++ kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL);
+ if (!kernel_state)
+ return;
+
+++ /dev/null
-From 9cdbf88aabf547503f85cc5b815b7b0dec444b3f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Apr 2016 14:40:08 -0700
-Subject: [PATCH 273/381] bcm2708: Reference the HDMI power domain for the HDMI
- driver.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-@@ -6,6 +6,7 @@
- /plugin/;
-
- #include "dt-bindings/clock/bcm2835.h"
-+#include "dt-bindings/power/raspberrypi-power.h"
- #include "dt-bindings/gpio/gpio.h"
-
- / {
-@@ -72,6 +73,7 @@
- clocks = <&cprman BCM2835_PLLH_PIX>,
- <&cprman BCM2835_CLOCK_HSM>;
- clock-names = "pixel", "hdmi";
-+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
- };
-
- v3d@7ec00000 {
--- /dev/null
+From eeafab86c1440009e0a09819019f0d6b562650a1 Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Mon, 18 Jan 2016 09:10:42 +1000
+Subject: [PATCH 273/423] drm/vc4: fix warning in validate printf.
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This just fixes a warning on 64-bit builds:
+
+ drivers/gpu/drm/vc4/vc4_validate.c: In function ‘validate_gl_shader_rec’:
+ drivers/gpu/drm/vc4/vc4_validate.c:864:12: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
+
+Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+(cherry picked from commit c671e1e30259da587d7a0162895200601979ee65)
+---
+ drivers/gpu/drm/vc4/vc4_validate.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_validate.c
++++ b/drivers/gpu/drm/vc4/vc4_validate.c
+@@ -861,7 +861,7 @@ validate_gl_shader_rec(struct drm_device
+
+ if (vbo->base.size < offset ||
+ vbo->base.size - offset < attr_size) {
+- DRM_ERROR("BO offset overflow (%d + %d > %d)\n",
++ DRM_ERROR("BO offset overflow (%d + %d > %zu)\n",
+ offset, attr_size, vbo->base.size);
+ return -EINVAL;
+ }
--- /dev/null
+From 91b875c48c7aee103c14418730bc9ceb96aa18ac Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:14:09 -0800
+Subject: [PATCH 274/423] drm/vc4: Improve comments on vc4_plane_state members.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit f427fb16cf756548c39256b569cf083f39bcc4e9)
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 9 ++++++---
+ 1 file changed, 6 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -26,16 +26,19 @@
+
+ struct vc4_plane_state {
+ struct drm_plane_state base;
++ /* System memory copy of the display list for this element, computed
++ * at atomic_check time.
++ */
+ u32 *dlist;
+- u32 dlist_size; /* Number of dwords in allocated for the display list */
++ u32 dlist_size; /* Number of dwords allocated for the display list */
+ u32 dlist_count; /* Number of used dwords in the display list. */
+
+ /* Offset in the dlist to pointer word 0. */
+ u32 pw0_offset;
+
+ /* Offset where the plane's dlist was last stored in the
+- hardware at vc4_crtc_atomic_flush() time.
+- */
++ * hardware at vc4_crtc_atomic_flush() time.
++ */
+ u32 *hw_dlist;
+ };
+
+++ /dev/null
-From 2a995481084f14aa22c1f141d6494d87cb100703 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Thu, 17 Dec 2015 15:36:28 +0300
-Subject: [PATCH 274/381] drm/vc4: copy_to_user() returns the number of bytes
- remaining
-
-The copy_to/from_user() functions return the number of bytes remaining
-to be copied. We want to return error codes here.
-
-Also it's a bad idea to print an error message if a copy from user fails
-because users can use that to spam /var/log/messages which is annoying
-so I removed those.
-
-Fixes: 214613656b51 ('drm/vc4: Add an interface for capturing the GPU state after a hang.')
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 65c4777de54a39b2722a4b1ff3306d044014d511)
----
- drivers/gpu/drm/vc4/vc4_gem.c | 37 ++++++++++++++++++-------------------
- 1 file changed, 18 insertions(+), 19 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -85,7 +85,7 @@ vc4_get_hang_state_ioctl(struct drm_devi
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- unsigned long irqflags;
- u32 i;
-- int ret;
-+ int ret = 0;
-
- spin_lock_irqsave(&vc4->job_lock, irqflags);
- kernel_state = vc4->hang_state;
-@@ -133,9 +133,11 @@ vc4_get_hang_state_ioctl(struct drm_devi
- bo_state[i].size = vc4_bo->base.base.size;
- }
-
-- ret = copy_to_user((void __user *)(uintptr_t)get_state->bo,
-- bo_state,
-- state->bo_count * sizeof(*bo_state));
-+ if (copy_to_user((void __user *)(uintptr_t)get_state->bo,
-+ bo_state,
-+ state->bo_count * sizeof(*bo_state)))
-+ ret = -EFAULT;
-+
- kfree(bo_state);
-
- err_free:
-@@ -563,27 +565,24 @@ vc4_get_bcl(struct drm_device *dev, stru
- exec->shader_state = temp + exec_size;
- exec->shader_state_size = args->shader_rec_count;
-
-- ret = copy_from_user(bin,
-- (void __user *)(uintptr_t)args->bin_cl,
-- args->bin_cl_size);
-- if (ret) {
-- DRM_ERROR("Failed to copy in bin cl\n");
-+ if (copy_from_user(bin,
-+ (void __user *)(uintptr_t)args->bin_cl,
-+ args->bin_cl_size)) {
-+ ret = -EFAULT;
- goto fail;
- }
-
-- ret = copy_from_user(exec->shader_rec_u,
-- (void __user *)(uintptr_t)args->shader_rec,
-- args->shader_rec_size);
-- if (ret) {
-- DRM_ERROR("Failed to copy in shader recs\n");
-+ if (copy_from_user(exec->shader_rec_u,
-+ (void __user *)(uintptr_t)args->shader_rec,
-+ args->shader_rec_size)) {
-+ ret = -EFAULT;
- goto fail;
- }
-
-- ret = copy_from_user(exec->uniforms_u,
-- (void __user *)(uintptr_t)args->uniforms,
-- args->uniforms_size);
-- if (ret) {
-- DRM_ERROR("Failed to copy in uniforms cl\n");
-+ if (copy_from_user(exec->uniforms_u,
-+ (void __user *)(uintptr_t)args->uniforms,
-+ args->uniforms_size)) {
-+ ret = -EFAULT;
- goto fail;
- }
-
--- /dev/null
+From e0ab0c8c87b39aaf254f3b5625509dce3daeb216 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:14:57 -0800
+Subject: [PATCH 275/423] drm/vc4: Add missing __iomem annotation to hw_dlist.
+
+This is the pointer to the HVS device's memory where we stored the
+contents of *dlist.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 17eac75111ebda33e13d8d8d98aaedfc1a9c2abf)
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -39,7 +39,7 @@ struct vc4_plane_state {
+ /* Offset where the plane's dlist was last stored in the
+ * hardware at vc4_crtc_atomic_flush() time.
+ */
+- u32 *hw_dlist;
++ u32 __iomem *hw_dlist;
+ };
+
+ static inline struct vc4_plane_state *
+++ /dev/null
-From c33b2893076c1ff4decffd300f84aaa2cc10d1a4 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Thu, 17 Dec 2015 15:39:08 +0300
-Subject: [PATCH 275/381] drm/vc4: allocate enough memory in
- vc4_save_hang_state()
-
-"state" is smaller than "kernel_state" so we end up corrupting memory.
-
-Fixes: 214613656b51 ('drm/vc4: Add an interface for capturing the GPU state after a hang.')
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 7e5082fbc00cc157e57a70cdb6b9bbb21289afb1)
----
- drivers/gpu/drm/vc4/vc4_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -159,7 +159,7 @@ vc4_save_hang_state(struct drm_device *d
- unsigned long irqflags;
- unsigned int i, unref_list_count;
-
-- kernel_state = kcalloc(1, sizeof(*state), GFP_KERNEL);
-+ kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL);
- if (!kernel_state)
- return;
-
--- /dev/null
+From fd6dfd0af2ab83d8df5d7b17a52fbf0284e42f2b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:34:44 -0800
+Subject: [PATCH 276/423] drm/vc4: Move the plane clipping/scaling setup to a
+ separate function.
+
+As we add actual scaling, this is going to get way more complicated.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 5c6799942003df91801b1d2277bba34d71f99603)
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 78 +++++++++++++++++++++++++++--------------
+ 1 file changed, 52 insertions(+), 26 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -40,6 +40,14 @@ struct vc4_plane_state {
+ * hardware at vc4_crtc_atomic_flush() time.
+ */
+ u32 __iomem *hw_dlist;
++
++ /* Clipped coordinates of the plane on the display. */
++ int crtc_x, crtc_y, crtc_w, crtc_h;
++
++ /* Offset to start scanning out from the start of the plane's
++ * BO.
++ */
++ u32 offset;
+ };
+
+ static inline struct vc4_plane_state *
+@@ -167,22 +175,17 @@ static void vc4_dlist_write(struct vc4_p
+ vc4_state->dlist[vc4_state->dlist_count++] = val;
+ }
+
+-/* Writes out a full display list for an active plane to the plane's
+- * private dlist state.
+- */
+-static int vc4_plane_mode_set(struct drm_plane *plane,
+- struct drm_plane_state *state)
++static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ {
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ struct drm_framebuffer *fb = state->fb;
+- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+- u32 ctl0_offset = vc4_state->dlist_count;
+- const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
+- uint32_t offset = fb->offsets[0];
+- int crtc_x = state->crtc_x;
+- int crtc_y = state->crtc_y;
+- int crtc_w = state->crtc_w;
+- int crtc_h = state->crtc_h;
++
++ vc4_state->offset = fb->offsets[0];
++
++ vc4_state->crtc_x = state->crtc_x;
++ vc4_state->crtc_y = state->crtc_y;
++ vc4_state->crtc_w = state->crtc_w;
++ vc4_state->crtc_h = state->crtc_h;
+
+ if (state->crtc_w << 16 != state->src_w ||
+ state->crtc_h << 16 != state->src_h) {
+@@ -194,18 +197,41 @@ static int vc4_plane_mode_set(struct drm
+ return -EINVAL;
+ }
+
+- if (crtc_x < 0) {
+- offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x;
+- crtc_w += crtc_x;
+- crtc_x = 0;
++ if (vc4_state->crtc_x < 0) {
++ vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
++ 0) *
++ -vc4_state->crtc_x);
++ vc4_state->crtc_w += vc4_state->crtc_x;
++ vc4_state->crtc_x = 0;
+ }
+
+- if (crtc_y < 0) {
+- offset += fb->pitches[0] * -crtc_y;
+- crtc_h += crtc_y;
+- crtc_y = 0;
++ if (vc4_state->crtc_y < 0) {
++ vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
++ vc4_state->crtc_h += vc4_state->crtc_y;
++ vc4_state->crtc_y = 0;
+ }
+
++ return 0;
++}
++
++
++/* Writes out a full display list for an active plane to the plane's
++ * private dlist state.
++ */
++static int vc4_plane_mode_set(struct drm_plane *plane,
++ struct drm_plane_state *state)
++{
++ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++ struct drm_framebuffer *fb = state->fb;
++ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
++ u32 ctl0_offset = vc4_state->dlist_count;
++ const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
++ int ret;
++
++ ret = vc4_plane_setup_clipping_and_scaling(state);
++ if (ret)
++ return ret;
++
+ vc4_dlist_write(vc4_state,
+ SCALER_CTL0_VALID |
+ (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+@@ -215,8 +241,8 @@ static int vc4_plane_mode_set(struct drm
+ /* Position Word 0: Image Positions and Alpha Value */
+ vc4_dlist_write(vc4_state,
+ VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
+- VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) |
+- VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y));
++ VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
++ VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
+
+ /* Position Word 1: Scaled Image Dimensions.
+ * Skipped due to SCALER_CTL0_UNITY scaling.
+@@ -228,8 +254,8 @@ static int vc4_plane_mode_set(struct drm
+ SCALER_POS2_ALPHA_MODE_PIPELINE :
+ SCALER_POS2_ALPHA_MODE_FIXED,
+ SCALER_POS2_ALPHA_MODE) |
+- VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) |
+- VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT));
++ VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
++ VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
+
+ /* Position Word 3: Context. Written by the HVS. */
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+@@ -237,7 +263,7 @@ static int vc4_plane_mode_set(struct drm
+ vc4_state->pw0_offset = vc4_state->dlist_count;
+
+ /* Pointer Word 0: RGB / Y Pointer */
+- vc4_dlist_write(vc4_state, bo->paddr + offset);
++ vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
+
+ /* Pointer Context Word 0: Written by the HVS */
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+++ /dev/null
-From 903b74d1a831985eced17d72de1634143031a077 Mon Sep 17 00:00:00 2001
-From: Dave Airlie <airlied@redhat.com>
-Date: Mon, 18 Jan 2016 09:10:42 +1000
-Subject: [PATCH 276/381] drm/vc4: fix warning in validate printf.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This just fixes a warning on 64-bit builds:
-
- drivers/gpu/drm/vc4/vc4_validate.c: In function ‘validate_gl_shader_rec’:
- drivers/gpu/drm/vc4/vc4_validate.c:864:12: warning: format ‘%d’ expects argument of type ‘int’, but argument 4 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
-
-Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-(cherry picked from commit c671e1e30259da587d7a0162895200601979ee65)
----
- drivers/gpu/drm/vc4/vc4_validate.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_validate.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate.c
-@@ -861,7 +861,7 @@ validate_gl_shader_rec(struct drm_device
-
- if (vbo->base.size < offset ||
- vbo->base.size - offset < attr_size) {
-- DRM_ERROR("BO offset overflow (%d + %d > %d)\n",
-+ DRM_ERROR("BO offset overflow (%d + %d > %zu)\n",
- offset, attr_size, vbo->base.size);
- return -EINVAL;
- }
--- /dev/null
+From 3f24f34e62b4bdcff3a5d46e847b200b5380b5ee Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 30 Dec 2015 11:50:22 -0800
+Subject: [PATCH 277/423] drm/vc4: Add a proper short-circut path for legacy
+ cursor updates.
+
+Previously, on every modeset we would allocate new display list
+memory, recompute changed planes, write all of them to the new memory,
+and pointed scanout at the new list (which will latch approximately at
+the next line of scanout). We let
+drm_atomic_helper_wait_for_vblanks() decide whether we needed to wait
+for a vblank after a modeset before cleaning up the old state and
+letting the next modeset proceed, and on legacy cursor updates we
+wouldn't wait. If you moved the cursor fast enough, we could
+potentially wrap around the display list memory area and overwrite the
+existing display list while it was still being scanned out, resulting
+in the HVS scanning out garbage or just halting.
+
+Instead of making cursor updates wait for scanout to move to the new
+display list area (which introduces significant cursor lag in X), we
+just rewrite our current display list.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 6674a904d68041d982ffb284d2827410765a097a)
+---
+ drivers/gpu/drm/vc4/vc4_kms.c | 9 ++++
+ drivers/gpu/drm/vc4/vc4_plane.c | 94 ++++++++++++++++++++++++++++++++++++++---
+ 2 files changed, 96 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -49,6 +49,15 @@ vc4_atomic_complete_commit(struct vc4_co
+
+ drm_atomic_helper_commit_modeset_enables(dev, state);
+
++ /* Make sure that drm_atomic_helper_wait_for_vblanks()
++ * actually waits for vblank. If we're doing a full atomic
++ * modeset (as opposed to a vc4_update_plane() short circuit),
++ * then we need to wait for scanout to be done with our
++ * display lists before we free it and potentially reallocate
++ * and overwrite the dlist memory with a new modeset.
++ */
++ state->legacy_cursor_update = false;
++
+ drm_atomic_helper_wait_for_vblanks(dev, state);
+
+ drm_atomic_helper_cleanup_planes(dev, state);
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -33,8 +33,12 @@ struct vc4_plane_state {
+ u32 dlist_size; /* Number of dwords allocated for the display list */
+ u32 dlist_count; /* Number of used dwords in the display list. */
+
+- /* Offset in the dlist to pointer word 0. */
+- u32 pw0_offset;
++ /* Offset in the dlist to various words, for pageflip or
++ * cursor updates.
++ */
++ u32 pos0_offset;
++ u32 pos2_offset;
++ u32 ptr0_offset;
+
+ /* Offset where the plane's dlist was last stored in the
+ * hardware at vc4_crtc_atomic_flush() time.
+@@ -239,6 +243,7 @@ static int vc4_plane_mode_set(struct drm
+ SCALER_CTL0_UNITY);
+
+ /* Position Word 0: Image Positions and Alpha Value */
++ vc4_state->pos0_offset = vc4_state->dlist_count;
+ vc4_dlist_write(vc4_state,
+ VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
+ VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
+@@ -249,6 +254,7 @@ static int vc4_plane_mode_set(struct drm
+ */
+
+ /* Position Word 2: Source Image Size, Alpha Mode */
++ vc4_state->pos2_offset = vc4_state->dlist_count;
+ vc4_dlist_write(vc4_state,
+ VC4_SET_FIELD(format->has_alpha ?
+ SCALER_POS2_ALPHA_MODE_PIPELINE :
+@@ -260,9 +266,8 @@ static int vc4_plane_mode_set(struct drm
+ /* Position Word 3: Context. Written by the HVS. */
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+
+- vc4_state->pw0_offset = vc4_state->dlist_count;
+-
+ /* Pointer Word 0: RGB / Y Pointer */
++ vc4_state->ptr0_offset = vc4_state->dlist_count;
+ vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
+
+ /* Pointer Context Word 0: Written by the HVS */
+@@ -348,13 +353,13 @@ void vc4_plane_async_set_fb(struct drm_p
+ * scanout will start from this address as soon as the FIFO
+ * needs to refill with pixels.
+ */
+- writel(addr, &vc4_state->hw_dlist[vc4_state->pw0_offset]);
++ writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
+
+ /* Also update the CPU-side dlist copy, so that any later
+ * atomic updates that don't do a new modeset on our plane
+ * also use our updated address.
+ */
+- vc4_state->dlist[vc4_state->pw0_offset] = addr;
++ vc4_state->dlist[vc4_state->ptr0_offset] = addr;
+ }
+
+ static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
+@@ -370,8 +375,83 @@ static void vc4_plane_destroy(struct drm
+ drm_plane_cleanup(plane);
+ }
+
++/* Implements immediate (non-vblank-synced) updates of the cursor
++ * position, or falls back to the atomic helper otherwise.
++ */
++static int
++vc4_update_plane(struct drm_plane *plane,
++ struct drm_crtc *crtc,
++ struct drm_framebuffer *fb,
++ int crtc_x, int crtc_y,
++ unsigned int crtc_w, unsigned int crtc_h,
++ uint32_t src_x, uint32_t src_y,
++ uint32_t src_w, uint32_t src_h)
++{
++ struct drm_plane_state *plane_state;
++ struct vc4_plane_state *vc4_state;
++
++ if (plane != crtc->cursor)
++ goto out;
++
++ plane_state = plane->state;
++ vc4_state = to_vc4_plane_state(plane_state);
++
++ if (!plane_state)
++ goto out;
++
++ /* If we're changing the cursor contents, do that in the
++ * normal vblank-synced atomic path.
++ */
++ if (fb != plane_state->fb)
++ goto out;
++
++ /* No configuring new scaling in the fast path. */
++ if (crtc_w != plane_state->crtc_w ||
++ crtc_h != plane_state->crtc_h ||
++ src_w != plane_state->src_w ||
++ src_h != plane_state->src_h) {
++ goto out;
++ }
++
++ /* Set the cursor's position on the screen. This is the
++ * expected change from the drm_mode_cursor_universal()
++ * helper.
++ */
++ plane_state->crtc_x = crtc_x;
++ plane_state->crtc_y = crtc_y;
++
++ /* Allow changing the start position within the cursor BO, if
++ * that matters.
++ */
++ plane_state->src_x = src_x;
++ plane_state->src_y = src_y;
++
++ /* Update the display list based on the new crtc_x/y. */
++ vc4_plane_atomic_check(plane, plane_state);
++
++ /* Note that we can't just call vc4_plane_write_dlist()
++ * because that would smash the context data that the HVS is
++ * currently using.
++ */
++ writel(vc4_state->dlist[vc4_state->pos0_offset],
++ &vc4_state->hw_dlist[vc4_state->pos0_offset]);
++ writel(vc4_state->dlist[vc4_state->pos2_offset],
++ &vc4_state->hw_dlist[vc4_state->pos2_offset]);
++ writel(vc4_state->dlist[vc4_state->ptr0_offset],
++ &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
++
++ return 0;
++
++out:
++ return drm_atomic_helper_update_plane(plane, crtc, fb,
++ crtc_x, crtc_y,
++ crtc_w, crtc_h,
++ src_x, src_y,
++ src_w, src_h);
++}
++
+ static const struct drm_plane_funcs vc4_plane_funcs = {
+- .update_plane = drm_atomic_helper_update_plane,
++ .update_plane = vc4_update_plane,
+ .disable_plane = drm_atomic_helper_disable_plane,
+ .destroy = vc4_plane_destroy,
+ .set_property = NULL,
+++ /dev/null
-From 0580ea4ba574d30d1725649a28ab3466904599ea Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 28 Dec 2015 14:14:09 -0800
-Subject: [PATCH 277/381] drm/vc4: Improve comments on vc4_plane_state members.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit f427fb16cf756548c39256b569cf083f39bcc4e9)
----
- drivers/gpu/drm/vc4/vc4_plane.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -26,16 +26,19 @@
-
- struct vc4_plane_state {
- struct drm_plane_state base;
-+ /* System memory copy of the display list for this element, computed
-+ * at atomic_check time.
-+ */
- u32 *dlist;
-- u32 dlist_size; /* Number of dwords in allocated for the display list */
-+ u32 dlist_size; /* Number of dwords allocated for the display list */
- u32 dlist_count; /* Number of used dwords in the display list. */
-
- /* Offset in the dlist to pointer word 0. */
- u32 pw0_offset;
-
- /* Offset where the plane's dlist was last stored in the
-- hardware at vc4_crtc_atomic_flush() time.
-- */
-+ * hardware at vc4_crtc_atomic_flush() time.
-+ */
- u32 *hw_dlist;
- };
-
+++ /dev/null
-From 05edbd5f865d1c6a92bc3dcf59af28bbdb362a9f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 28 Dec 2015 14:14:57 -0800
-Subject: [PATCH 278/381] drm/vc4: Add missing __iomem annotation to hw_dlist.
-
-This is the pointer to the HVS device's memory where we stored the
-contents of *dlist.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 17eac75111ebda33e13d8d8d98aaedfc1a9c2abf)
----
- drivers/gpu/drm/vc4/vc4_plane.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -39,7 +39,7 @@ struct vc4_plane_state {
- /* Offset where the plane's dlist was last stored in the
- * hardware at vc4_crtc_atomic_flush() time.
- */
-- u32 *hw_dlist;
-+ u32 __iomem *hw_dlist;
- };
-
- static inline struct vc4_plane_state *
--- /dev/null
+From 417b8c7dcc6cad23f255a4307dda97d04f9c9b5b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 13:25:41 -0800
+Subject: [PATCH 278/423] drm/vc4: Make the CRTCs cooperate on allocating
+ display lists.
+
+So far, we've only ever lit up one CRTC, so this has been fine. To
+extend to more displays or more planes, we need to make sure we don't
+run our display lists into each other.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit d8dbf44f13b91185c618219d912b246817a8d132)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 115 +++++++++++++++++++++++------------------
+ drivers/gpu/drm/vc4/vc4_drv.h | 8 ++-
+ drivers/gpu/drm/vc4/vc4_hvs.c | 13 +++++
+ 3 files changed, 84 insertions(+), 52 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -49,22 +49,27 @@ struct vc4_crtc {
+ /* Which HVS channel we're using for our CRTC. */
+ int channel;
+
+- /* Pointer to the actual hardware display list memory for the
+- * crtc.
+- */
+- u32 __iomem *dlist;
+-
+- u32 dlist_size; /* in dwords */
+-
+ struct drm_pending_vblank_event *event;
+ };
+
++struct vc4_crtc_state {
++ struct drm_crtc_state base;
++ /* Dlist area for this CRTC configuration. */
++ struct drm_mm_node mm;
++};
++
+ static inline struct vc4_crtc *
+ to_vc4_crtc(struct drm_crtc *crtc)
+ {
+ return (struct vc4_crtc *)crtc;
+ }
+
++static inline struct vc4_crtc_state *
++to_vc4_crtc_state(struct drm_crtc_state *crtc_state)
++{
++ return (struct vc4_crtc_state *)crtc_state;
++}
++
+ struct vc4_crtc_data {
+ /* Which channel of the HVS this pixelvalve sources from. */
+ int hvs_channel;
+@@ -319,11 +324,13 @@ static void vc4_crtc_enable(struct drm_c
+ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
+ {
++ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct drm_plane *plane;
+- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++ unsigned long flags;
+ u32 dlist_count = 0;
++ int ret;
+
+ /* The pixelvalve can only feed one encoder (and encoders are
+ * 1:1 with connectors.)
+@@ -346,18 +353,12 @@ static int vc4_crtc_atomic_check(struct
+
+ dlist_count++; /* Account for SCALER_CTL0_END. */
+
+- if (!vc4_crtc->dlist || dlist_count > vc4_crtc->dlist_size) {
+- vc4_crtc->dlist = ((u32 __iomem *)vc4->hvs->dlist +
+- HVS_BOOTLOADER_DLIST_END);
+- vc4_crtc->dlist_size = ((SCALER_DLIST_SIZE >> 2) -
+- HVS_BOOTLOADER_DLIST_END);
+-
+- if (dlist_count > vc4_crtc->dlist_size) {
+- DRM_DEBUG_KMS("dlist too large for CRTC (%d > %d).\n",
+- dlist_count, vc4_crtc->dlist_size);
+- return -EINVAL;
+- }
+- }
++ spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
++ ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm,
++ dlist_count, 1, 0);
++ spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
++ if (ret)
++ return ret;
+
+ return 0;
+ }
+@@ -368,47 +369,29 @@ static void vc4_crtc_atomic_flush(struct
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+ struct drm_plane *plane;
+ bool debug_dump_regs = false;
+- u32 __iomem *dlist_next = vc4_crtc->dlist;
++ u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start;
++ u32 __iomem *dlist_next = dlist_start;
+
+ if (debug_dump_regs) {
+ DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc));
+ vc4_hvs_dump_state(dev);
+ }
+
+- /* Copy all the active planes' dlist contents to the hardware dlist.
+- *
+- * XXX: If the new display list was large enough that it
+- * overlapped a currently-read display list, we need to do
+- * something like disable scanout before putting in the new
+- * list. For now, we're safe because we only have the two
+- * planes.
+- */
++ /* Copy all the active planes' dlist contents to the hardware dlist. */
+ drm_atomic_crtc_for_each_plane(plane, crtc) {
+ dlist_next += vc4_plane_write_dlist(plane, dlist_next);
+ }
+
+- if (dlist_next == vc4_crtc->dlist) {
+- /* If no planes were enabled, use the SCALER_CTL0_END
+- * at the start of the display list memory (in the
+- * bootloader section). We'll rewrite that
+- * SCALER_CTL0_END, just in case, though.
+- */
+- writel(SCALER_CTL0_END, vc4->hvs->dlist);
+- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), 0);
+- } else {
+- writel(SCALER_CTL0_END, dlist_next);
+- dlist_next++;
+-
+- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+- (u32 __iomem *)vc4_crtc->dlist -
+- (u32 __iomem *)vc4->hvs->dlist);
+-
+- /* Make the next display list start after ours. */
+- vc4_crtc->dlist_size -= (dlist_next - vc4_crtc->dlist);
+- vc4_crtc->dlist = dlist_next;
+- }
++ writel(SCALER_CTL0_END, dlist_next);
++ dlist_next++;
++
++ WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
++
++ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
++ vc4_state->mm.start);
+
+ if (debug_dump_regs) {
+ DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
+@@ -573,6 +556,36 @@ static int vc4_page_flip(struct drm_crtc
+ return drm_atomic_helper_page_flip(crtc, fb, event, flags);
+ }
+
++static struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc)
++{
++ struct vc4_crtc_state *vc4_state;
++
++ vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
++ if (!vc4_state)
++ return NULL;
++
++ __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base);
++ return &vc4_state->base;
++}
++
++static void vc4_crtc_destroy_state(struct drm_crtc *crtc,
++ struct drm_crtc_state *state)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);
++ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
++
++ if (vc4_state->mm.allocated) {
++ unsigned long flags;
++
++ spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
++ drm_mm_remove_node(&vc4_state->mm);
++ spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
++
++ }
++
++ __drm_atomic_helper_crtc_destroy_state(crtc, state);
++}
++
+ static const struct drm_crtc_funcs vc4_crtc_funcs = {
+ .set_config = drm_atomic_helper_set_config,
+ .destroy = vc4_crtc_destroy,
+@@ -581,8 +594,8 @@ static const struct drm_crtc_funcs vc4_c
+ .cursor_set = NULL, /* handled by drm_mode_cursor_universal */
+ .cursor_move = NULL, /* handled by drm_mode_cursor_universal */
+ .reset = drm_atomic_helper_crtc_reset,
+- .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
+- .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
++ .atomic_duplicate_state = vc4_crtc_duplicate_state,
++ .atomic_destroy_state = vc4_crtc_destroy_state,
+ };
+
+ static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -150,7 +150,13 @@ struct vc4_v3d {
+ struct vc4_hvs {
+ struct platform_device *pdev;
+ void __iomem *regs;
+- void __iomem *dlist;
++ u32 __iomem *dlist;
++
++ /* Memory manager for CRTCs to allocate space in the display
++ * list. Units are dwords.
++ */
++ struct drm_mm dlist_mm;
++ spinlock_t mm_lock;
+ };
+
+ struct vc4_plane {
+--- a/drivers/gpu/drm/vc4/vc4_hvs.c
++++ b/drivers/gpu/drm/vc4/vc4_hvs.c
+@@ -119,6 +119,17 @@ static int vc4_hvs_bind(struct device *d
+
+ hvs->dlist = hvs->regs + SCALER_DLIST_START;
+
++ spin_lock_init(&hvs->mm_lock);
++
++ /* Set up the HVS display list memory manager. We never
++ * overwrite the setup from the bootloader (just 128b out of
++ * our 16K), since we don't want to scramble the screen when
++ * transitioning from the firmware's boot setup to runtime.
++ */
++ drm_mm_init(&hvs->dlist_mm,
++ HVS_BOOTLOADER_DLIST_END,
++ (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
++
+ vc4->hvs = hvs;
+ return 0;
+ }
+@@ -129,6 +140,8 @@ static void vc4_hvs_unbind(struct device
+ struct drm_device *drm = dev_get_drvdata(master);
+ struct vc4_dev *vc4 = drm->dev_private;
+
++ drm_mm_takedown(&vc4->hvs->dlist_mm);
++
+ vc4->hvs = NULL;
+ }
+
--- /dev/null
+From a4e111deb5b2aaff6cd633135825c40d03b3ac74 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 20 Oct 2015 14:18:56 +0100
+Subject: [PATCH 279/423] drm/vc4: Add more display planes to each CRTC.
+
+Previously we only did the primary and cursor plane, but overlay
+planes are useful and just require this setup to add, since all planes
+go into the HVS display list in the same way.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit fc2d6f1eabee9d971453da2a27a72471c2a347dd)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 56 ++++++++++++++++++++++++++++++------------
+ 1 file changed, 40 insertions(+), 16 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -677,9 +677,9 @@ static int vc4_crtc_bind(struct device *
+ struct vc4_dev *vc4 = to_vc4_dev(drm);
+ struct vc4_crtc *vc4_crtc;
+ struct drm_crtc *crtc;
+- struct drm_plane *primary_plane, *cursor_plane;
++ struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp;
+ const struct of_device_id *match;
+- int ret;
++ int ret, i;
+
+ vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL);
+ if (!vc4_crtc)
+@@ -708,27 +708,49 @@ static int vc4_crtc_bind(struct device *
+ goto err;
+ }
+
+- cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
+- if (IS_ERR(cursor_plane)) {
+- dev_err(dev, "failed to construct cursor plane\n");
+- ret = PTR_ERR(cursor_plane);
+- goto err_primary;
+- }
+-
+- drm_crtc_init_with_planes(drm, crtc, primary_plane, cursor_plane,
++ drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
+ &vc4_crtc_funcs);
+ drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
+ primary_plane->crtc = crtc;
+- cursor_plane->crtc = crtc;
+ vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc;
+ vc4_crtc->channel = vc4_crtc->data->hvs_channel;
+
++ /* Set up some arbitrary number of planes. We're not limited
++ * by a set number of physical registers, just the space in
++ * the HVS (16k) and how small an plane can be (28 bytes).
++ * However, each plane we set up takes up some memory, and
++ * increases the cost of looping over planes, which atomic
++ * modesetting does quite a bit. As a result, we pick a
++ * modest number of planes to expose, that should hopefully
++ * still cover any sane usecase.
++ */
++ for (i = 0; i < 8; i++) {
++ struct drm_plane *plane =
++ vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
++
++ if (IS_ERR(plane))
++ continue;
++
++ plane->possible_crtcs = 1 << drm_crtc_index(crtc);
++ }
++
++ /* Set up the legacy cursor after overlay initialization,
++ * since we overlay planes on the CRTC in the order they were
++ * initialized.
++ */
++ cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
++ if (!IS_ERR(cursor_plane)) {
++ cursor_plane->possible_crtcs = 1 << drm_crtc_index(crtc);
++ cursor_plane->crtc = crtc;
++ crtc->cursor = cursor_plane;
++ }
++
+ CRTC_WRITE(PV_INTEN, 0);
+ CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
+ vc4_crtc_irq_handler, 0, "vc4 crtc", vc4_crtc);
+ if (ret)
+- goto err_cursor;
++ goto err_destroy_planes;
+
+ vc4_set_crtc_possible_masks(drm, crtc);
+
+@@ -736,10 +758,12 @@ static int vc4_crtc_bind(struct device *
+
+ return 0;
+
+-err_cursor:
+- cursor_plane->funcs->destroy(cursor_plane);
+-err_primary:
+- primary_plane->funcs->destroy(primary_plane);
++err_destroy_planes:
++ list_for_each_entry_safe(destroy_plane, temp,
++ &drm->mode_config.plane_list, head) {
++ if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
++ destroy_plane->funcs->destroy(destroy_plane);
++ }
+ err:
+ return ret;
+ }
+++ /dev/null
-From 647c62f1d368e2418d8abc6ea11c0c1bac7fae11 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 28 Dec 2015 14:34:44 -0800
-Subject: [PATCH 279/381] drm/vc4: Move the plane clipping/scaling setup to a
- separate function.
-
-As we add actual scaling, this is going to get way more complicated.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 5c6799942003df91801b1d2277bba34d71f99603)
----
- drivers/gpu/drm/vc4/vc4_plane.c | 78 +++++++++++++++++++++++++++--------------
- 1 file changed, 52 insertions(+), 26 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -40,6 +40,14 @@ struct vc4_plane_state {
- * hardware at vc4_crtc_atomic_flush() time.
- */
- u32 __iomem *hw_dlist;
-+
-+ /* Clipped coordinates of the plane on the display. */
-+ int crtc_x, crtc_y, crtc_w, crtc_h;
-+
-+ /* Offset to start scanning out from the start of the plane's
-+ * BO.
-+ */
-+ u32 offset;
- };
-
- static inline struct vc4_plane_state *
-@@ -167,22 +175,17 @@ static void vc4_dlist_write(struct vc4_p
- vc4_state->dlist[vc4_state->dlist_count++] = val;
- }
-
--/* Writes out a full display list for an active plane to the plane's
-- * private dlist state.
-- */
--static int vc4_plane_mode_set(struct drm_plane *plane,
-- struct drm_plane_state *state)
-+static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
- {
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
-- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
-- u32 ctl0_offset = vc4_state->dlist_count;
-- const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
-- uint32_t offset = fb->offsets[0];
-- int crtc_x = state->crtc_x;
-- int crtc_y = state->crtc_y;
-- int crtc_w = state->crtc_w;
-- int crtc_h = state->crtc_h;
-+
-+ vc4_state->offset = fb->offsets[0];
-+
-+ vc4_state->crtc_x = state->crtc_x;
-+ vc4_state->crtc_y = state->crtc_y;
-+ vc4_state->crtc_w = state->crtc_w;
-+ vc4_state->crtc_h = state->crtc_h;
-
- if (state->crtc_w << 16 != state->src_w ||
- state->crtc_h << 16 != state->src_h) {
-@@ -194,18 +197,41 @@ static int vc4_plane_mode_set(struct drm
- return -EINVAL;
- }
-
-- if (crtc_x < 0) {
-- offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x;
-- crtc_w += crtc_x;
-- crtc_x = 0;
-+ if (vc4_state->crtc_x < 0) {
-+ vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
-+ 0) *
-+ -vc4_state->crtc_x);
-+ vc4_state->crtc_w += vc4_state->crtc_x;
-+ vc4_state->crtc_x = 0;
- }
-
-- if (crtc_y < 0) {
-- offset += fb->pitches[0] * -crtc_y;
-- crtc_h += crtc_y;
-- crtc_y = 0;
-+ if (vc4_state->crtc_y < 0) {
-+ vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
-+ vc4_state->crtc_h += vc4_state->crtc_y;
-+ vc4_state->crtc_y = 0;
- }
-
-+ return 0;
-+}
-+
-+
-+/* Writes out a full display list for an active plane to the plane's
-+ * private dlist state.
-+ */
-+static int vc4_plane_mode_set(struct drm_plane *plane,
-+ struct drm_plane_state *state)
-+{
-+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-+ struct drm_framebuffer *fb = state->fb;
-+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
-+ u32 ctl0_offset = vc4_state->dlist_count;
-+ const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
-+ int ret;
-+
-+ ret = vc4_plane_setup_clipping_and_scaling(state);
-+ if (ret)
-+ return ret;
-+
- vc4_dlist_write(vc4_state,
- SCALER_CTL0_VALID |
- (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
-@@ -215,8 +241,8 @@ static int vc4_plane_mode_set(struct drm
- /* Position Word 0: Image Positions and Alpha Value */
- vc4_dlist_write(vc4_state,
- VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
-- VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) |
-- VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y));
-+ VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
-+ VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
-
- /* Position Word 1: Scaled Image Dimensions.
- * Skipped due to SCALER_CTL0_UNITY scaling.
-@@ -228,8 +254,8 @@ static int vc4_plane_mode_set(struct drm
- SCALER_POS2_ALPHA_MODE_PIPELINE :
- SCALER_POS2_ALPHA_MODE_FIXED,
- SCALER_POS2_ALPHA_MODE) |
-- VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) |
-- VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT));
-+ VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
-+ VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
-
- /* Position Word 3: Context. Written by the HVS. */
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-@@ -237,7 +263,7 @@ static int vc4_plane_mode_set(struct drm
- vc4_state->pw0_offset = vc4_state->dlist_count;
-
- /* Pointer Word 0: RGB / Y Pointer */
-- vc4_dlist_write(vc4_state, bo->paddr + offset);
-+ vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
-
- /* Pointer Context Word 0: Written by the HVS */
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+++ /dev/null
-From bdd4e13374cb436ccb534f5f58bd840e7d055ec9 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 30 Dec 2015 11:50:22 -0800
-Subject: [PATCH 280/381] drm/vc4: Add a proper short-circut path for legacy
- cursor updates.
-
-Previously, on every modeset we would allocate new display list
-memory, recompute changed planes, write all of them to the new memory,
-and pointed scanout at the new list (which will latch approximately at
-the next line of scanout). We let
-drm_atomic_helper_wait_for_vblanks() decide whether we needed to wait
-for a vblank after a modeset before cleaning up the old state and
-letting the next modeset proceed, and on legacy cursor updates we
-wouldn't wait. If you moved the cursor fast enough, we could
-potentially wrap around the display list memory area and overwrite the
-existing display list while it was still being scanned out, resulting
-in the HVS scanning out garbage or just halting.
-
-Instead of making cursor updates wait for scanout to move to the new
-display list area (which introduces significant cursor lag in X), we
-just rewrite our current display list.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 6674a904d68041d982ffb284d2827410765a097a)
----
- drivers/gpu/drm/vc4/vc4_kms.c | 9 ++++
- drivers/gpu/drm/vc4/vc4_plane.c | 94 ++++++++++++++++++++++++++++++++++++++---
- 2 files changed, 96 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_kms.c
-+++ b/drivers/gpu/drm/vc4/vc4_kms.c
-@@ -49,6 +49,15 @@ vc4_atomic_complete_commit(struct vc4_co
-
- drm_atomic_helper_commit_modeset_enables(dev, state);
-
-+ /* Make sure that drm_atomic_helper_wait_for_vblanks()
-+ * actually waits for vblank. If we're doing a full atomic
-+ * modeset (as opposed to a vc4_update_plane() short circuit),
-+ * then we need to wait for scanout to be done with our
-+ * display lists before we free it and potentially reallocate
-+ * and overwrite the dlist memory with a new modeset.
-+ */
-+ state->legacy_cursor_update = false;
-+
- drm_atomic_helper_wait_for_vblanks(dev, state);
-
- drm_atomic_helper_cleanup_planes(dev, state);
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -33,8 +33,12 @@ struct vc4_plane_state {
- u32 dlist_size; /* Number of dwords allocated for the display list */
- u32 dlist_count; /* Number of used dwords in the display list. */
-
-- /* Offset in the dlist to pointer word 0. */
-- u32 pw0_offset;
-+ /* Offset in the dlist to various words, for pageflip or
-+ * cursor updates.
-+ */
-+ u32 pos0_offset;
-+ u32 pos2_offset;
-+ u32 ptr0_offset;
-
- /* Offset where the plane's dlist was last stored in the
- * hardware at vc4_crtc_atomic_flush() time.
-@@ -239,6 +243,7 @@ static int vc4_plane_mode_set(struct drm
- SCALER_CTL0_UNITY);
-
- /* Position Word 0: Image Positions and Alpha Value */
-+ vc4_state->pos0_offset = vc4_state->dlist_count;
- vc4_dlist_write(vc4_state,
- VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
- VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
-@@ -249,6 +254,7 @@ static int vc4_plane_mode_set(struct drm
- */
-
- /* Position Word 2: Source Image Size, Alpha Mode */
-+ vc4_state->pos2_offset = vc4_state->dlist_count;
- vc4_dlist_write(vc4_state,
- VC4_SET_FIELD(format->has_alpha ?
- SCALER_POS2_ALPHA_MODE_PIPELINE :
-@@ -260,9 +266,8 @@ static int vc4_plane_mode_set(struct drm
- /* Position Word 3: Context. Written by the HVS. */
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-
-- vc4_state->pw0_offset = vc4_state->dlist_count;
--
- /* Pointer Word 0: RGB / Y Pointer */
-+ vc4_state->ptr0_offset = vc4_state->dlist_count;
- vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
-
- /* Pointer Context Word 0: Written by the HVS */
-@@ -348,13 +353,13 @@ void vc4_plane_async_set_fb(struct drm_p
- * scanout will start from this address as soon as the FIFO
- * needs to refill with pixels.
- */
-- writel(addr, &vc4_state->hw_dlist[vc4_state->pw0_offset]);
-+ writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
-
- /* Also update the CPU-side dlist copy, so that any later
- * atomic updates that don't do a new modeset on our plane
- * also use our updated address.
- */
-- vc4_state->dlist[vc4_state->pw0_offset] = addr;
-+ vc4_state->dlist[vc4_state->ptr0_offset] = addr;
- }
-
- static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
-@@ -370,8 +375,83 @@ static void vc4_plane_destroy(struct drm
- drm_plane_cleanup(plane);
- }
-
-+/* Implements immediate (non-vblank-synced) updates of the cursor
-+ * position, or falls back to the atomic helper otherwise.
-+ */
-+static int
-+vc4_update_plane(struct drm_plane *plane,
-+ struct drm_crtc *crtc,
-+ struct drm_framebuffer *fb,
-+ int crtc_x, int crtc_y,
-+ unsigned int crtc_w, unsigned int crtc_h,
-+ uint32_t src_x, uint32_t src_y,
-+ uint32_t src_w, uint32_t src_h)
-+{
-+ struct drm_plane_state *plane_state;
-+ struct vc4_plane_state *vc4_state;
-+
-+ if (plane != crtc->cursor)
-+ goto out;
-+
-+ plane_state = plane->state;
-+ vc4_state = to_vc4_plane_state(plane_state);
-+
-+ if (!plane_state)
-+ goto out;
-+
-+ /* If we're changing the cursor contents, do that in the
-+ * normal vblank-synced atomic path.
-+ */
-+ if (fb != plane_state->fb)
-+ goto out;
-+
-+ /* No configuring new scaling in the fast path. */
-+ if (crtc_w != plane_state->crtc_w ||
-+ crtc_h != plane_state->crtc_h ||
-+ src_w != plane_state->src_w ||
-+ src_h != plane_state->src_h) {
-+ goto out;
-+ }
-+
-+ /* Set the cursor's position on the screen. This is the
-+ * expected change from the drm_mode_cursor_universal()
-+ * helper.
-+ */
-+ plane_state->crtc_x = crtc_x;
-+ plane_state->crtc_y = crtc_y;
-+
-+ /* Allow changing the start position within the cursor BO, if
-+ * that matters.
-+ */
-+ plane_state->src_x = src_x;
-+ plane_state->src_y = src_y;
-+
-+ /* Update the display list based on the new crtc_x/y. */
-+ vc4_plane_atomic_check(plane, plane_state);
-+
-+ /* Note that we can't just call vc4_plane_write_dlist()
-+ * because that would smash the context data that the HVS is
-+ * currently using.
-+ */
-+ writel(vc4_state->dlist[vc4_state->pos0_offset],
-+ &vc4_state->hw_dlist[vc4_state->pos0_offset]);
-+ writel(vc4_state->dlist[vc4_state->pos2_offset],
-+ &vc4_state->hw_dlist[vc4_state->pos2_offset]);
-+ writel(vc4_state->dlist[vc4_state->ptr0_offset],
-+ &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
-+
-+ return 0;
-+
-+out:
-+ return drm_atomic_helper_update_plane(plane, crtc, fb,
-+ crtc_x, crtc_y,
-+ crtc_w, crtc_h,
-+ src_x, src_y,
-+ src_w, src_h);
-+}
-+
- static const struct drm_plane_funcs vc4_plane_funcs = {
-- .update_plane = drm_atomic_helper_update_plane,
-+ .update_plane = vc4_update_plane,
- .disable_plane = drm_atomic_helper_disable_plane,
- .destroy = vc4_plane_destroy,
- .set_property = NULL,
--- /dev/null
+From 265a20f8e1c0e3578aea9dcf9d2ea93ea909b76b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 28 Dec 2015 14:45:25 -0800
+Subject: [PATCH 280/423] drm/vc4: Fix which value is being used for source
+ image size.
+
+This doesn't matter yet since we only allow 1:1 scaling, but the
+comment clearly says we should be using the source size.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit f863e356013d628fa65b1cd89aa298eed26fc936)
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 23 ++++++++++++++---------
+ 1 file changed, 14 insertions(+), 9 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -47,6 +47,8 @@ struct vc4_plane_state {
+
+ /* Clipped coordinates of the plane on the display. */
+ int crtc_x, crtc_y, crtc_w, crtc_h;
++ /* Clipped size of the area scanned from in the FB. */
++ u32 src_w, src_h;
+
+ /* Offset to start scanning out from the start of the plane's
+ * BO.
+@@ -186,11 +188,6 @@ static int vc4_plane_setup_clipping_and_
+
+ vc4_state->offset = fb->offsets[0];
+
+- vc4_state->crtc_x = state->crtc_x;
+- vc4_state->crtc_y = state->crtc_y;
+- vc4_state->crtc_w = state->crtc_w;
+- vc4_state->crtc_h = state->crtc_h;
+-
+ if (state->crtc_w << 16 != state->src_w ||
+ state->crtc_h << 16 != state->src_h) {
+ /* We don't support scaling yet, which involves
+@@ -201,17 +198,25 @@ static int vc4_plane_setup_clipping_and_
+ return -EINVAL;
+ }
+
++ vc4_state->src_w = state->src_w >> 16;
++ vc4_state->src_h = state->src_h >> 16;
++
++ vc4_state->crtc_x = state->crtc_x;
++ vc4_state->crtc_y = state->crtc_y;
++ vc4_state->crtc_w = state->crtc_w;
++ vc4_state->crtc_h = state->crtc_h;
++
+ if (vc4_state->crtc_x < 0) {
+ vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
+ 0) *
+ -vc4_state->crtc_x);
+- vc4_state->crtc_w += vc4_state->crtc_x;
++ vc4_state->src_w += vc4_state->crtc_x;
+ vc4_state->crtc_x = 0;
+ }
+
+ if (vc4_state->crtc_y < 0) {
+ vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
+- vc4_state->crtc_h += vc4_state->crtc_y;
++ vc4_state->src_h += vc4_state->crtc_y;
+ vc4_state->crtc_y = 0;
+ }
+
+@@ -260,8 +265,8 @@ static int vc4_plane_mode_set(struct drm
+ SCALER_POS2_ALPHA_MODE_PIPELINE :
+ SCALER_POS2_ALPHA_MODE_FIXED,
+ SCALER_POS2_ALPHA_MODE) |
+- VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
+- VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
++ VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
++ VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
+
+ /* Position Word 3: Context. Written by the HVS. */
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
--- /dev/null
+From 8d513c7a67cce0bf0ef312323753eccbd0f3f71a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 20 Oct 2015 16:06:57 +0100
+Subject: [PATCH 281/423] drm/vc4: Add support for scaling of display planes.
+
+This implements a simple policy for choosing scaling modes
+(trapezoidal for decimation, PPF for magnification), and a single PPF
+filter (Mitchell/Netravali's recommendation).
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 21af94cf1a4c2d3450ab7fead58e6e2291ab92a9)
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 4 +
+ drivers/gpu/drm/vc4/vc4_hvs.c | 84 +++++++++++++
+ drivers/gpu/drm/vc4/vc4_plane.c | 253 +++++++++++++++++++++++++++++++++++++---
+ drivers/gpu/drm/vc4/vc4_regs.h | 46 ++++++++
+ 4 files changed, 374 insertions(+), 13 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -156,7 +156,11 @@ struct vc4_hvs {
+ * list. Units are dwords.
+ */
+ struct drm_mm dlist_mm;
++ /* Memory manager for the LBM memory used by HVS scaling. */
++ struct drm_mm lbm_mm;
+ spinlock_t mm_lock;
++
++ struct drm_mm_node mitchell_netravali_filter;
+ };
+
+ struct vc4_plane {
+--- a/drivers/gpu/drm/vc4/vc4_hvs.c
++++ b/drivers/gpu/drm/vc4/vc4_hvs.c
+@@ -100,12 +100,76 @@ int vc4_hvs_debugfs_regs(struct seq_file
+ }
+ #endif
+
++/* The filter kernel is composed of dwords each containing 3 9-bit
++ * signed integers packed next to each other.
++ */
++#define VC4_INT_TO_COEFF(coeff) (coeff & 0x1ff)
++#define VC4_PPF_FILTER_WORD(c0, c1, c2) \
++ ((((c0) & 0x1ff) << 0) | \
++ (((c1) & 0x1ff) << 9) | \
++ (((c2) & 0x1ff) << 18))
++
++/* The whole filter kernel is arranged as the coefficients 0-16 going
++ * up, then a pad, then 17-31 going down and reversed within the
++ * dwords. This means that a linear phase kernel (where it's
++ * symmetrical at the boundary between 15 and 16) has the last 5
++ * dwords matching the first 5, but reversed.
++ */
++#define VC4_LINEAR_PHASE_KERNEL(c0, c1, c2, c3, c4, c5, c6, c7, c8, \
++ c9, c10, c11, c12, c13, c14, c15) \
++ {VC4_PPF_FILTER_WORD(c0, c1, c2), \
++ VC4_PPF_FILTER_WORD(c3, c4, c5), \
++ VC4_PPF_FILTER_WORD(c6, c7, c8), \
++ VC4_PPF_FILTER_WORD(c9, c10, c11), \
++ VC4_PPF_FILTER_WORD(c12, c13, c14), \
++ VC4_PPF_FILTER_WORD(c15, c15, 0)}
++
++#define VC4_LINEAR_PHASE_KERNEL_DWORDS 6
++#define VC4_KERNEL_DWORDS (VC4_LINEAR_PHASE_KERNEL_DWORDS * 2 - 1)
++
++/* Recommended B=1/3, C=1/3 filter choice from Mitchell/Netravali.
++ * http://www.cs.utexas.edu/~fussell/courses/cs384g/lectures/mitchell/Mitchell.pdf
++ */
++static const u32 mitchell_netravali_1_3_1_3_kernel[] =
++ VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18,
++ 50, 82, 119, 155, 187, 213, 227);
++
++static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
++ struct drm_mm_node *space,
++ const u32 *kernel)
++{
++ int ret, i;
++ u32 __iomem *dst_kernel;
++
++ ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS, 1,
++ 0);
++ if (ret) {
++ DRM_ERROR("Failed to allocate space for filter kernel: %d\n",
++ ret);
++ return ret;
++ }
++
++ dst_kernel = hvs->dlist + space->start;
++
++ for (i = 0; i < VC4_KERNEL_DWORDS; i++) {
++ if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS)
++ writel(kernel[i], &dst_kernel[i]);
++ else {
++ writel(kernel[VC4_KERNEL_DWORDS - i - 1],
++ &dst_kernel[i]);
++ }
++ }
++
++ return 0;
++}
++
+ static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
+ {
+ struct platform_device *pdev = to_platform_device(dev);
+ struct drm_device *drm = dev_get_drvdata(master);
+ struct vc4_dev *vc4 = drm->dev_private;
+ struct vc4_hvs *hvs = NULL;
++ int ret;
+
+ hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
+ if (!hvs)
+@@ -130,6 +194,22 @@ static int vc4_hvs_bind(struct device *d
+ HVS_BOOTLOADER_DLIST_END,
+ (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
+
++ /* Set up the HVS LBM memory manager. We could have some more
++ * complicated data structure that allowed reuse of LBM areas
++ * between planes when they don't overlap on the screen, but
++ * for now we just allocate globally.
++ */
++ drm_mm_init(&hvs->lbm_mm, 0, 96 * 1024);
++
++ /* Upload filter kernels. We only have the one for now, so we
++ * keep it around for the lifetime of the driver.
++ */
++ ret = vc4_hvs_upload_linear_kernel(hvs,
++ &hvs->mitchell_netravali_filter,
++ mitchell_netravali_1_3_1_3_kernel);
++ if (ret)
++ return ret;
++
+ vc4->hvs = hvs;
+ return 0;
+ }
+@@ -140,7 +220,11 @@ static void vc4_hvs_unbind(struct device
+ struct drm_device *drm = dev_get_drvdata(master);
+ struct vc4_dev *vc4 = drm->dev_private;
+
++ if (vc4->hvs->mitchell_netravali_filter.allocated)
++ drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter);
++
+ drm_mm_takedown(&vc4->hvs->dlist_mm);
++ drm_mm_takedown(&vc4->hvs->lbm_mm);
+
+ vc4->hvs = NULL;
+ }
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -24,6 +24,12 @@
+ #include "drm_fb_cma_helper.h"
+ #include "drm_plane_helper.h"
+
++enum vc4_scaling_mode {
++ VC4_SCALING_NONE,
++ VC4_SCALING_TPZ,
++ VC4_SCALING_PPF,
++};
++
+ struct vc4_plane_state {
+ struct drm_plane_state base;
+ /* System memory copy of the display list for this element, computed
+@@ -47,13 +53,19 @@ struct vc4_plane_state {
+
+ /* Clipped coordinates of the plane on the display. */
+ int crtc_x, crtc_y, crtc_w, crtc_h;
+- /* Clipped size of the area scanned from in the FB. */
+- u32 src_w, src_h;
++ /* Clipped area being scanned from in the FB. */
++ u32 src_x, src_y, src_w, src_h;
++
++ enum vc4_scaling_mode x_scaling, y_scaling;
++ bool is_unity;
+
+ /* Offset to start scanning out from the start of the plane's
+ * BO.
+ */
+ u32 offset;
++
++ /* Our allocation in LBM for temporary storage during scaling. */
++ struct drm_mm_node lbm;
+ };
+
+ static inline struct vc4_plane_state *
+@@ -106,6 +118,16 @@ static const struct hvs_format *vc4_get_
+ return NULL;
+ }
+
++static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst)
++{
++ if (dst > src)
++ return VC4_SCALING_PPF;
++ else if (dst < src)
++ return VC4_SCALING_TPZ;
++ else
++ return VC4_SCALING_NONE;
++}
++
+ static bool plane_enabled(struct drm_plane_state *state)
+ {
+ return state->fb && state->crtc;
+@@ -122,6 +144,8 @@ static struct drm_plane_state *vc4_plane
+ if (!vc4_state)
+ return NULL;
+
++ memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm));
++
+ __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
+
+ if (vc4_state->dlist) {
+@@ -141,8 +165,17 @@ static struct drm_plane_state *vc4_plane
+ static void vc4_plane_destroy_state(struct drm_plane *plane,
+ struct drm_plane_state *state)
+ {
++ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+
++ if (vc4_state->lbm.allocated) {
++ unsigned long irqflags;
++
++ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
++ drm_mm_remove_node(&vc4_state->lbm);
++ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
++ }
++
+ kfree(vc4_state->dlist);
+ __drm_atomic_helper_plane_destroy_state(plane, &vc4_state->base);
+ kfree(state);
+@@ -181,23 +214,60 @@ static void vc4_dlist_write(struct vc4_p
+ vc4_state->dlist[vc4_state->dlist_count++] = val;
+ }
+
++/* Returns the scl0/scl1 field based on whether the dimensions need to
++ * be up/down/non-scaled.
++ *
++ * This is a replication of a table from the spec.
++ */
++static u32 vc4_get_scl_field(struct drm_plane_state *state)
++{
++ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++
++ switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
++ case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
++ return SCALER_CTL0_SCL_H_PPF_V_PPF;
++ case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
++ return SCALER_CTL0_SCL_H_TPZ_V_PPF;
++ case VC4_SCALING_PPF << 2 | VC4_SCALING_TPZ:
++ return SCALER_CTL0_SCL_H_PPF_V_TPZ;
++ case VC4_SCALING_TPZ << 2 | VC4_SCALING_TPZ:
++ return SCALER_CTL0_SCL_H_TPZ_V_TPZ;
++ case VC4_SCALING_PPF << 2 | VC4_SCALING_NONE:
++ return SCALER_CTL0_SCL_H_PPF_V_NONE;
++ case VC4_SCALING_NONE << 2 | VC4_SCALING_PPF:
++ return SCALER_CTL0_SCL_H_NONE_V_PPF;
++ case VC4_SCALING_NONE << 2 | VC4_SCALING_TPZ:
++ return SCALER_CTL0_SCL_H_NONE_V_TPZ;
++ case VC4_SCALING_TPZ << 2 | VC4_SCALING_NONE:
++ return SCALER_CTL0_SCL_H_TPZ_V_NONE;
++ default:
++ case VC4_SCALING_NONE << 2 | VC4_SCALING_NONE:
++ /* The unity case is independently handled by
++ * SCALER_CTL0_UNITY.
++ */
++ return 0;
++ }
++}
++
+ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
+ {
++ struct drm_plane *plane = state->plane;
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ struct drm_framebuffer *fb = state->fb;
++ u32 subpixel_src_mask = (1 << 16) - 1;
+
+ vc4_state->offset = fb->offsets[0];
+
+- if (state->crtc_w << 16 != state->src_w ||
+- state->crtc_h << 16 != state->src_h) {
+- /* We don't support scaling yet, which involves
+- * allocating the LBM memory for scaling temporary
+- * storage, and putting filter kernels in the HVS
+- * context.
+- */
++ /* We don't support subpixel source positioning for scaling. */
++ if ((state->src_x & subpixel_src_mask) ||
++ (state->src_y & subpixel_src_mask) ||
++ (state->src_w & subpixel_src_mask) ||
++ (state->src_h & subpixel_src_mask)) {
+ return -EINVAL;
+ }
+
++ vc4_state->src_x = state->src_x >> 16;
++ vc4_state->src_y = state->src_y >> 16;
+ vc4_state->src_w = state->src_w >> 16;
+ vc4_state->src_h = state->src_h >> 16;
+
+@@ -206,6 +276,23 @@ static int vc4_plane_setup_clipping_and_
+ vc4_state->crtc_w = state->crtc_w;
+ vc4_state->crtc_h = state->crtc_h;
+
++ vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
++ vc4_state->crtc_w);
++ vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
++ vc4_state->crtc_h);
++ vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
++ vc4_state->y_scaling == VC4_SCALING_NONE);
++
++ /* No configuring scaling on the cursor plane, since it gets
++ non-vblank-synced updates, and scaling requires requires
++ LBM changes which have to be vblank-synced.
++ */
++ if (plane->type == DRM_PLANE_TYPE_CURSOR && !vc4_state->is_unity)
++ return -EINVAL;
++
++ /* Clamp the on-screen start x/y to 0. The hardware doesn't
++ * support negative y, and negative x wastes bandwidth.
++ */
+ if (vc4_state->crtc_x < 0) {
+ vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
+ 0) *
+@@ -223,6 +310,87 @@ static int vc4_plane_setup_clipping_and_
+ return 0;
+ }
+
++static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
++{
++ u32 scale, recip;
++
++ scale = (1 << 16) * src / dst;
++
++ /* The specs note that while the reciprocal would be defined
++ * as (1<<32)/scale, ~0 is close enough.
++ */
++ recip = ~0 / scale;
++
++ vc4_dlist_write(vc4_state,
++ VC4_SET_FIELD(scale, SCALER_TPZ0_SCALE) |
++ VC4_SET_FIELD(0, SCALER_TPZ0_IPHASE));
++ vc4_dlist_write(vc4_state,
++ VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP));
++}
++
++static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
++{
++ u32 scale = (1 << 16) * src / dst;
++
++ vc4_dlist_write(vc4_state,
++ SCALER_PPF_AGC |
++ VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
++ VC4_SET_FIELD(0, SCALER_PPF_IPHASE));
++}
++
++static u32 vc4_lbm_size(struct drm_plane_state *state)
++{
++ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++ /* This is the worst case number. One of the two sizes will
++ * be used depending on the scaling configuration.
++ */
++ u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
++ u32 lbm;
++
++ if (vc4_state->is_unity)
++ return 0;
++ else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
++ lbm = pix_per_line * 8;
++ else {
++ /* In special cases, this multiplier might be 12. */
++ lbm = pix_per_line * 16;
++ }
++
++ lbm = roundup(lbm, 32);
++
++ return lbm;
++}
++
++static void vc4_write_scaling_parameters(struct drm_plane_state *state)
++{
++ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
++
++ /* Ch0 H-PPF Word 0: Scaling Parameters */
++ if (vc4_state->x_scaling == VC4_SCALING_PPF) {
++ vc4_write_ppf(vc4_state,
++ vc4_state->src_w, vc4_state->crtc_w);
++ }
++
++ /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
++ if (vc4_state->y_scaling == VC4_SCALING_PPF) {
++ vc4_write_ppf(vc4_state,
++ vc4_state->src_h, vc4_state->crtc_h);
++ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
++ }
++
++ /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
++ if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
++ vc4_write_tpz(vc4_state,
++ vc4_state->src_w, vc4_state->crtc_w);
++ }
++
++ /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
++ if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
++ vc4_write_tpz(vc4_state,
++ vc4_state->src_h, vc4_state->crtc_h);
++ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
++ }
++}
+
+ /* Writes out a full display list for an active plane to the plane's
+ * private dlist state.
+@@ -230,22 +398,50 @@ static int vc4_plane_setup_clipping_and_
+ static int vc4_plane_mode_set(struct drm_plane *plane,
+ struct drm_plane_state *state)
+ {
++ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ struct drm_framebuffer *fb = state->fb;
+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+ u32 ctl0_offset = vc4_state->dlist_count;
+ const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
++ u32 scl;
++ u32 lbm_size;
++ unsigned long irqflags;
+ int ret;
+
+ ret = vc4_plane_setup_clipping_and_scaling(state);
+ if (ret)
+ return ret;
+
++ /* Allocate the LBM memory that the HVS will use for temporary
++ * storage due to our scaling/format conversion.
++ */
++ lbm_size = vc4_lbm_size(state);
++ if (lbm_size) {
++ if (!vc4_state->lbm.allocated) {
++ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
++ ret = drm_mm_insert_node(&vc4->hvs->lbm_mm,
++ &vc4_state->lbm,
++ lbm_size, 32, 0);
++ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
++ } else {
++ WARN_ON_ONCE(lbm_size != vc4_state->lbm.size);
++ }
++ }
++
++ if (ret)
++ return ret;
++
++ scl = vc4_get_scl_field(state);
++
++ /* Control word */
+ vc4_dlist_write(vc4_state,
+ SCALER_CTL0_VALID |
+ (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+ (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
+- SCALER_CTL0_UNITY);
++ (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
++ VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
++ VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
+
+ /* Position Word 0: Image Positions and Alpha Value */
+ vc4_state->pos0_offset = vc4_state->dlist_count;
+@@ -254,9 +450,14 @@ static int vc4_plane_mode_set(struct drm
+ VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
+ VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
+
+- /* Position Word 1: Scaled Image Dimensions.
+- * Skipped due to SCALER_CTL0_UNITY scaling.
+- */
++ /* Position Word 1: Scaled Image Dimensions. */
++ if (!vc4_state->is_unity) {
++ vc4_dlist_write(vc4_state,
++ VC4_SET_FIELD(vc4_state->crtc_w,
++ SCALER_POS1_SCL_WIDTH) |
++ VC4_SET_FIELD(vc4_state->crtc_h,
++ SCALER_POS1_SCL_HEIGHT));
++ }
+
+ /* Position Word 2: Source Image Size, Alpha Mode */
+ vc4_state->pos2_offset = vc4_state->dlist_count;
+@@ -282,6 +483,32 @@ static int vc4_plane_mode_set(struct drm
+ vc4_dlist_write(vc4_state,
+ VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
+
++ if (!vc4_state->is_unity) {
++ /* LBM Base Address. */
++ if (vc4_state->y_scaling != VC4_SCALING_NONE)
++ vc4_dlist_write(vc4_state, vc4_state->lbm.start);
++
++ vc4_write_scaling_parameters(state);
++
++ /* If any PPF setup was done, then all the kernel
++ * pointers get uploaded.
++ */
++ if (vc4_state->x_scaling == VC4_SCALING_PPF ||
++ vc4_state->y_scaling == VC4_SCALING_PPF) {
++ u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
++ SCALER_PPF_KERNEL_OFFSET);
++
++ /* HPPF plane 0 */
++ vc4_dlist_write(vc4_state, kernel);
++ /* VPPF plane 0 */
++ vc4_dlist_write(vc4_state, kernel);
++ /* HPPF plane 1 */
++ vc4_dlist_write(vc4_state, kernel);
++ /* VPPF plane 1 */
++ vc4_dlist_write(vc4_state, kernel);
++ }
++ }
++
+ vc4_state->dlist[ctl0_offset] |=
+ VC4_SET_FIELD(vc4_state->dlist_count, SCALER_CTL0_SIZE);
+
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -536,6 +536,21 @@ enum hvs_pixel_format {
+ #define SCALER_CTL0_ORDER_MASK VC4_MASK(14, 13)
+ #define SCALER_CTL0_ORDER_SHIFT 13
+
++#define SCALER_CTL0_SCL1_MASK VC4_MASK(10, 8)
++#define SCALER_CTL0_SCL1_SHIFT 8
++
++#define SCALER_CTL0_SCL0_MASK VC4_MASK(7, 5)
++#define SCALER_CTL0_SCL0_SHIFT 5
++
++#define SCALER_CTL0_SCL_H_PPF_V_PPF 0
++#define SCALER_CTL0_SCL_H_TPZ_V_PPF 1
++#define SCALER_CTL0_SCL_H_PPF_V_TPZ 2
++#define SCALER_CTL0_SCL_H_TPZ_V_TPZ 3
++#define SCALER_CTL0_SCL_H_PPF_V_NONE 4
++#define SCALER_CTL0_SCL_H_NONE_V_PPF 5
++#define SCALER_CTL0_SCL_H_NONE_V_TPZ 6
++#define SCALER_CTL0_SCL_H_TPZ_V_NONE 7
++
+ /* Set to indicate no scaling. */
+ #define SCALER_CTL0_UNITY BIT(4)
+
+@@ -551,6 +566,12 @@ enum hvs_pixel_format {
+ #define SCALER_POS0_START_X_MASK VC4_MASK(11, 0)
+ #define SCALER_POS0_START_X_SHIFT 0
+
++#define SCALER_POS1_SCL_HEIGHT_MASK VC4_MASK(27, 16)
++#define SCALER_POS1_SCL_HEIGHT_SHIFT 16
++
++#define SCALER_POS1_SCL_WIDTH_MASK VC4_MASK(11, 0)
++#define SCALER_POS1_SCL_WIDTH_SHIFT 0
++
+ #define SCALER_POS2_ALPHA_MODE_MASK VC4_MASK(31, 30)
+ #define SCALER_POS2_ALPHA_MODE_SHIFT 30
+ #define SCALER_POS2_ALPHA_MODE_PIPELINE 0
+@@ -564,6 +585,31 @@ enum hvs_pixel_format {
+ #define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0)
+ #define SCALER_POS2_WIDTH_SHIFT 0
+
++#define SCALER_TPZ0_VERT_RECALC BIT(31)
++#define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8)
++#define SCALER_TPZ0_SCALE_SHIFT 8
++#define SCALER_TPZ0_IPHASE_MASK VC4_MASK(7, 0)
++#define SCALER_TPZ0_IPHASE_SHIFT 0
++#define SCALER_TPZ1_RECIP_MASK VC4_MASK(15, 0)
++#define SCALER_TPZ1_RECIP_SHIFT 0
++
++/* Skips interpolating coefficients to 64 phases, so just 8 are used.
++ * Required for nearest neighbor.
++ */
++#define SCALER_PPF_NOINTERP BIT(31)
++/* Replaes the highest valued coefficient with one that makes all 4
++ * sum to unity.
++ */
++#define SCALER_PPF_AGC BIT(30)
++#define SCALER_PPF_SCALE_MASK VC4_MASK(24, 8)
++#define SCALER_PPF_SCALE_SHIFT 8
++#define SCALER_PPF_IPHASE_MASK VC4_MASK(6, 0)
++#define SCALER_PPF_IPHASE_SHIFT 0
++
++#define SCALER_PPF_KERNEL_OFFSET_MASK VC4_MASK(13, 0)
++#define SCALER_PPF_KERNEL_OFFSET_SHIFT 0
++#define SCALER_PPF_KERNEL_UNCACHED BIT(31)
++
+ #define SCALER_SRC_PITCH_MASK VC4_MASK(15, 0)
+ #define SCALER_SRC_PITCH_SHIFT 0
+
+++ /dev/null
-From 645f9aea7c4c7880059f87a715a8bdd004ef9604 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 28 Dec 2015 13:25:41 -0800
-Subject: [PATCH 281/381] drm/vc4: Make the CRTCs cooperate on allocating
- display lists.
-
-So far, we've only ever lit up one CRTC, so this has been fine. To
-extend to more displays or more planes, we need to make sure we don't
-run our display lists into each other.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit d8dbf44f13b91185c618219d912b246817a8d132)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 115 +++++++++++++++++++++++------------------
- drivers/gpu/drm/vc4/vc4_drv.h | 8 ++-
- drivers/gpu/drm/vc4/vc4_hvs.c | 13 +++++
- 3 files changed, 84 insertions(+), 52 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -49,22 +49,27 @@ struct vc4_crtc {
- /* Which HVS channel we're using for our CRTC. */
- int channel;
-
-- /* Pointer to the actual hardware display list memory for the
-- * crtc.
-- */
-- u32 __iomem *dlist;
--
-- u32 dlist_size; /* in dwords */
--
- struct drm_pending_vblank_event *event;
- };
-
-+struct vc4_crtc_state {
-+ struct drm_crtc_state base;
-+ /* Dlist area for this CRTC configuration. */
-+ struct drm_mm_node mm;
-+};
-+
- static inline struct vc4_crtc *
- to_vc4_crtc(struct drm_crtc *crtc)
- {
- return (struct vc4_crtc *)crtc;
- }
-
-+static inline struct vc4_crtc_state *
-+to_vc4_crtc_state(struct drm_crtc_state *crtc_state)
-+{
-+ return (struct vc4_crtc_state *)crtc_state;
-+}
-+
- struct vc4_crtc_data {
- /* Which channel of the HVS this pixelvalve sources from. */
- int hvs_channel;
-@@ -319,11 +324,13 @@ static void vc4_crtc_enable(struct drm_c
- static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
- struct drm_crtc_state *state)
- {
-+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
- struct drm_device *dev = crtc->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct drm_plane *plane;
-- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
-+ unsigned long flags;
- u32 dlist_count = 0;
-+ int ret;
-
- /* The pixelvalve can only feed one encoder (and encoders are
- * 1:1 with connectors.)
-@@ -346,18 +353,12 @@ static int vc4_crtc_atomic_check(struct
-
- dlist_count++; /* Account for SCALER_CTL0_END. */
-
-- if (!vc4_crtc->dlist || dlist_count > vc4_crtc->dlist_size) {
-- vc4_crtc->dlist = ((u32 __iomem *)vc4->hvs->dlist +
-- HVS_BOOTLOADER_DLIST_END);
-- vc4_crtc->dlist_size = ((SCALER_DLIST_SIZE >> 2) -
-- HVS_BOOTLOADER_DLIST_END);
--
-- if (dlist_count > vc4_crtc->dlist_size) {
-- DRM_DEBUG_KMS("dlist too large for CRTC (%d > %d).\n",
-- dlist_count, vc4_crtc->dlist_size);
-- return -EINVAL;
-- }
-- }
-+ spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
-+ ret = drm_mm_insert_node(&vc4->hvs->dlist_mm, &vc4_state->mm,
-+ dlist_count, 1, 0);
-+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
-+ if (ret)
-+ return ret;
-
- return 0;
- }
-@@ -368,47 +369,29 @@ static void vc4_crtc_atomic_flush(struct
- struct drm_device *dev = crtc->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
-+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
- struct drm_plane *plane;
- bool debug_dump_regs = false;
-- u32 __iomem *dlist_next = vc4_crtc->dlist;
-+ u32 __iomem *dlist_start = vc4->hvs->dlist + vc4_state->mm.start;
-+ u32 __iomem *dlist_next = dlist_start;
-
- if (debug_dump_regs) {
- DRM_INFO("CRTC %d HVS before:\n", drm_crtc_index(crtc));
- vc4_hvs_dump_state(dev);
- }
-
-- /* Copy all the active planes' dlist contents to the hardware dlist.
-- *
-- * XXX: If the new display list was large enough that it
-- * overlapped a currently-read display list, we need to do
-- * something like disable scanout before putting in the new
-- * list. For now, we're safe because we only have the two
-- * planes.
-- */
-+ /* Copy all the active planes' dlist contents to the hardware dlist. */
- drm_atomic_crtc_for_each_plane(plane, crtc) {
- dlist_next += vc4_plane_write_dlist(plane, dlist_next);
- }
-
-- if (dlist_next == vc4_crtc->dlist) {
-- /* If no planes were enabled, use the SCALER_CTL0_END
-- * at the start of the display list memory (in the
-- * bootloader section). We'll rewrite that
-- * SCALER_CTL0_END, just in case, though.
-- */
-- writel(SCALER_CTL0_END, vc4->hvs->dlist);
-- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), 0);
-- } else {
-- writel(SCALER_CTL0_END, dlist_next);
-- dlist_next++;
--
-- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-- (u32 __iomem *)vc4_crtc->dlist -
-- (u32 __iomem *)vc4->hvs->dlist);
--
-- /* Make the next display list start after ours. */
-- vc4_crtc->dlist_size -= (dlist_next - vc4_crtc->dlist);
-- vc4_crtc->dlist = dlist_next;
-- }
-+ writel(SCALER_CTL0_END, dlist_next);
-+ dlist_next++;
-+
-+ WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
-+
-+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-+ vc4_state->mm.start);
-
- if (debug_dump_regs) {
- DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
-@@ -573,6 +556,36 @@ static int vc4_page_flip(struct drm_crtc
- return drm_atomic_helper_page_flip(crtc, fb, event, flags);
- }
-
-+static struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc)
-+{
-+ struct vc4_crtc_state *vc4_state;
-+
-+ vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
-+ if (!vc4_state)
-+ return NULL;
-+
-+ __drm_atomic_helper_crtc_duplicate_state(crtc, &vc4_state->base);
-+ return &vc4_state->base;
-+}
-+
-+static void vc4_crtc_destroy_state(struct drm_crtc *crtc,
-+ struct drm_crtc_state *state)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(crtc->dev);
-+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
-+
-+ if (vc4_state->mm.allocated) {
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&vc4->hvs->mm_lock, flags);
-+ drm_mm_remove_node(&vc4_state->mm);
-+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, flags);
-+
-+ }
-+
-+ __drm_atomic_helper_crtc_destroy_state(crtc, state);
-+}
-+
- static const struct drm_crtc_funcs vc4_crtc_funcs = {
- .set_config = drm_atomic_helper_set_config,
- .destroy = vc4_crtc_destroy,
-@@ -581,8 +594,8 @@ static const struct drm_crtc_funcs vc4_c
- .cursor_set = NULL, /* handled by drm_mode_cursor_universal */
- .cursor_move = NULL, /* handled by drm_mode_cursor_universal */
- .reset = drm_atomic_helper_crtc_reset,
-- .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
-- .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
-+ .atomic_duplicate_state = vc4_crtc_duplicate_state,
-+ .atomic_destroy_state = vc4_crtc_destroy_state,
- };
-
- static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -150,7 +150,13 @@ struct vc4_v3d {
- struct vc4_hvs {
- struct platform_device *pdev;
- void __iomem *regs;
-- void __iomem *dlist;
-+ u32 __iomem *dlist;
-+
-+ /* Memory manager for CRTCs to allocate space in the display
-+ * list. Units are dwords.
-+ */
-+ struct drm_mm dlist_mm;
-+ spinlock_t mm_lock;
- };
-
- struct vc4_plane {
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -119,6 +119,17 @@ static int vc4_hvs_bind(struct device *d
-
- hvs->dlist = hvs->regs + SCALER_DLIST_START;
-
-+ spin_lock_init(&hvs->mm_lock);
-+
-+ /* Set up the HVS display list memory manager. We never
-+ * overwrite the setup from the bootloader (just 128b out of
-+ * our 16K), since we don't want to scramble the screen when
-+ * transitioning from the firmware's boot setup to runtime.
-+ */
-+ drm_mm_init(&hvs->dlist_mm,
-+ HVS_BOOTLOADER_DLIST_END,
-+ (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
-+
- vc4->hvs = hvs;
- return 0;
- }
-@@ -129,6 +140,8 @@ static void vc4_hvs_unbind(struct device
- struct drm_device *drm = dev_get_drvdata(master);
- struct vc4_dev *vc4 = drm->dev_private;
-
-+ drm_mm_takedown(&vc4->hvs->dlist_mm);
-+
- vc4->hvs = NULL;
- }
-
+++ /dev/null
-From 5735ac96c821e3caf84de2d2358d0993130bc999 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 20 Oct 2015 14:18:56 +0100
-Subject: [PATCH 282/381] drm/vc4: Add more display planes to each CRTC.
-
-Previously we only did the primary and cursor plane, but overlay
-planes are useful and just require this setup to add, since all planes
-go into the HVS display list in the same way.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit fc2d6f1eabee9d971453da2a27a72471c2a347dd)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 56 ++++++++++++++++++++++++++++++------------
- 1 file changed, 40 insertions(+), 16 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -677,9 +677,9 @@ static int vc4_crtc_bind(struct device *
- struct vc4_dev *vc4 = to_vc4_dev(drm);
- struct vc4_crtc *vc4_crtc;
- struct drm_crtc *crtc;
-- struct drm_plane *primary_plane, *cursor_plane;
-+ struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp;
- const struct of_device_id *match;
-- int ret;
-+ int ret, i;
-
- vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL);
- if (!vc4_crtc)
-@@ -708,27 +708,49 @@ static int vc4_crtc_bind(struct device *
- goto err;
- }
-
-- cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
-- if (IS_ERR(cursor_plane)) {
-- dev_err(dev, "failed to construct cursor plane\n");
-- ret = PTR_ERR(cursor_plane);
-- goto err_primary;
-- }
--
-- drm_crtc_init_with_planes(drm, crtc, primary_plane, cursor_plane,
-+ drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
- &vc4_crtc_funcs);
- drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
- primary_plane->crtc = crtc;
-- cursor_plane->crtc = crtc;
- vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc;
- vc4_crtc->channel = vc4_crtc->data->hvs_channel;
-
-+ /* Set up some arbitrary number of planes. We're not limited
-+ * by a set number of physical registers, just the space in
-+ * the HVS (16k) and how small an plane can be (28 bytes).
-+ * However, each plane we set up takes up some memory, and
-+ * increases the cost of looping over planes, which atomic
-+ * modesetting does quite a bit. As a result, we pick a
-+ * modest number of planes to expose, that should hopefully
-+ * still cover any sane usecase.
-+ */
-+ for (i = 0; i < 8; i++) {
-+ struct drm_plane *plane =
-+ vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
-+
-+ if (IS_ERR(plane))
-+ continue;
-+
-+ plane->possible_crtcs = 1 << drm_crtc_index(crtc);
-+ }
-+
-+ /* Set up the legacy cursor after overlay initialization,
-+ * since we overlay planes on the CRTC in the order they were
-+ * initialized.
-+ */
-+ cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
-+ if (!IS_ERR(cursor_plane)) {
-+ cursor_plane->possible_crtcs = 1 << drm_crtc_index(crtc);
-+ cursor_plane->crtc = crtc;
-+ crtc->cursor = cursor_plane;
-+ }
-+
- CRTC_WRITE(PV_INTEN, 0);
- CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
- ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
- vc4_crtc_irq_handler, 0, "vc4 crtc", vc4_crtc);
- if (ret)
-- goto err_cursor;
-+ goto err_destroy_planes;
-
- vc4_set_crtc_possible_masks(drm, crtc);
-
-@@ -736,10 +758,12 @@ static int vc4_crtc_bind(struct device *
-
- return 0;
-
--err_cursor:
-- cursor_plane->funcs->destroy(cursor_plane);
--err_primary:
-- primary_plane->funcs->destroy(primary_plane);
-+err_destroy_planes:
-+ list_for_each_entry_safe(destroy_plane, temp,
-+ &drm->mode_config.plane_list, head) {
-+ if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
-+ destroy_plane->funcs->destroy(destroy_plane);
-+ }
- err:
- return ret;
- }
--- /dev/null
+From 40707ee2d92a2d229aa6b328c93aec0e3026c2a7 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 30 Dec 2015 12:25:44 -0800
+Subject: [PATCH 282/423] drm/vc4: Add support for YUV planes.
+
+This supports 420 and 422 subsampling with 2 or 3 planes, tested with
+modetest. It doesn't set up chroma subsampling position (which it
+appears KMS doesn't deal with yet).
+
+The LBM memory is overallocated in many cases, but apparently the docs
+aren't quite correct and I'll probably need to look at the hardware
+source to really figure it out.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit fc04023fafecf19ebd09278d8d67dc5ed1f68b46)
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 256 +++++++++++++++++++++++++++++++---------
+ drivers/gpu/drm/vc4/vc4_regs.h | 56 ++++++++-
+ 2 files changed, 253 insertions(+), 59 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -54,15 +54,19 @@ struct vc4_plane_state {
+ /* Clipped coordinates of the plane on the display. */
+ int crtc_x, crtc_y, crtc_w, crtc_h;
+ /* Clipped area being scanned from in the FB. */
+- u32 src_x, src_y, src_w, src_h;
++ u32 src_x, src_y;
+
+- enum vc4_scaling_mode x_scaling, y_scaling;
++ u32 src_w[2], src_h[2];
++
++ /* Scaling selection for the RGB/Y plane and the Cb/Cr planes. */
++ enum vc4_scaling_mode x_scaling[2], y_scaling[2];
+ bool is_unity;
++ bool is_yuv;
+
+ /* Offset to start scanning out from the start of the plane's
+ * BO.
+ */
+- u32 offset;
++ u32 offsets[3];
+
+ /* Our allocation in LBM for temporary storage during scaling. */
+ struct drm_mm_node lbm;
+@@ -79,6 +83,7 @@ static const struct hvs_format {
+ u32 hvs; /* HVS_FORMAT_* */
+ u32 pixel_order;
+ bool has_alpha;
++ bool flip_cbcr;
+ } hvs_formats[] = {
+ {
+ .drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
+@@ -104,6 +109,32 @@ static const struct hvs_format {
+ .drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
+ .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
+ },
++ {
++ .drm = DRM_FORMAT_YUV422,
++ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
++ },
++ {
++ .drm = DRM_FORMAT_YVU422,
++ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
++ .flip_cbcr = true,
++ },
++ {
++ .drm = DRM_FORMAT_YUV420,
++ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
++ },
++ {
++ .drm = DRM_FORMAT_YVU420,
++ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
++ .flip_cbcr = true,
++ },
++ {
++ .drm = DRM_FORMAT_NV12,
++ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
++ },
++ {
++ .drm = DRM_FORMAT_NV16,
++ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
++ },
+ };
+
+ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
+@@ -219,11 +250,11 @@ static void vc4_dlist_write(struct vc4_p
+ *
+ * This is a replication of a table from the spec.
+ */
+-static u32 vc4_get_scl_field(struct drm_plane_state *state)
++static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane)
+ {
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+
+- switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
++ switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) {
+ case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
+ return SCALER_CTL0_SCL_H_PPF_V_PPF;
+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
+@@ -254,9 +285,16 @@ static int vc4_plane_setup_clipping_and_
+ struct drm_plane *plane = state->plane;
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ struct drm_framebuffer *fb = state->fb;
++ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+ u32 subpixel_src_mask = (1 << 16) - 1;
++ u32 format = fb->pixel_format;
++ int num_planes = drm_format_num_planes(format);
++ u32 h_subsample = 1;
++ u32 v_subsample = 1;
++ int i;
+
+- vc4_state->offset = fb->offsets[0];
++ for (i = 0; i < num_planes; i++)
++ vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
+
+ /* We don't support subpixel source positioning for scaling. */
+ if ((state->src_x & subpixel_src_mask) ||
+@@ -268,20 +306,48 @@ static int vc4_plane_setup_clipping_and_
+
+ vc4_state->src_x = state->src_x >> 16;
+ vc4_state->src_y = state->src_y >> 16;
+- vc4_state->src_w = state->src_w >> 16;
+- vc4_state->src_h = state->src_h >> 16;
++ vc4_state->src_w[0] = state->src_w >> 16;
++ vc4_state->src_h[0] = state->src_h >> 16;
+
+ vc4_state->crtc_x = state->crtc_x;
+ vc4_state->crtc_y = state->crtc_y;
+ vc4_state->crtc_w = state->crtc_w;
+ vc4_state->crtc_h = state->crtc_h;
+
+- vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
+- vc4_state->crtc_w);
+- vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
+- vc4_state->crtc_h);
+- vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
+- vc4_state->y_scaling == VC4_SCALING_NONE);
++ vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0],
++ vc4_state->crtc_w);
++ vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
++ vc4_state->crtc_h);
++
++ if (num_planes > 1) {
++ vc4_state->is_yuv = true;
++
++ h_subsample = drm_format_horz_chroma_subsampling(format);
++ v_subsample = drm_format_vert_chroma_subsampling(format);
++ vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample;
++ vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample;
++
++ vc4_state->x_scaling[1] =
++ vc4_get_scaling_mode(vc4_state->src_w[1],
++ vc4_state->crtc_w);
++ vc4_state->y_scaling[1] =
++ vc4_get_scaling_mode(vc4_state->src_h[1],
++ vc4_state->crtc_h);
++
++ /* YUV conversion requires that scaling be enabled,
++ * even on a plane that's otherwise 1:1. Choose TPZ
++ * for simplicity.
++ */
++ if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
++ vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
++ if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
++ vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
++ }
++
++ vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
++ vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
++ vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
++ vc4_state->y_scaling[1] == VC4_SCALING_NONE);
+
+ /* No configuring scaling on the cursor plane, since it gets
+ non-vblank-synced updates, and scaling requires requires
+@@ -294,16 +360,27 @@ static int vc4_plane_setup_clipping_and_
+ * support negative y, and negative x wastes bandwidth.
+ */
+ if (vc4_state->crtc_x < 0) {
+- vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
+- 0) *
+- -vc4_state->crtc_x);
+- vc4_state->src_w += vc4_state->crtc_x;
++ for (i = 0; i < num_planes; i++) {
++ u32 cpp = drm_format_plane_cpp(fb->pixel_format, i);
++ u32 subs = ((i == 0) ? 1 : h_subsample);
++
++ vc4_state->offsets[i] += (cpp *
++ (-vc4_state->crtc_x) / subs);
++ }
++ vc4_state->src_w[0] += vc4_state->crtc_x;
++ vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample;
+ vc4_state->crtc_x = 0;
+ }
+
+ if (vc4_state->crtc_y < 0) {
+- vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
+- vc4_state->src_h += vc4_state->crtc_y;
++ for (i = 0; i < num_planes; i++) {
++ u32 subs = ((i == 0) ? 1 : v_subsample);
++
++ vc4_state->offsets[i] += (fb->pitches[i] *
++ (-vc4_state->crtc_y) / subs);
++ }
++ vc4_state->src_h[0] += vc4_state->crtc_y;
++ vc4_state->src_h[1] += vc4_state->crtc_y / v_subsample;
+ vc4_state->crtc_y = 0;
+ }
+
+@@ -344,15 +421,23 @@ static u32 vc4_lbm_size(struct drm_plane
+ /* This is the worst case number. One of the two sizes will
+ * be used depending on the scaling configuration.
+ */
+- u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
++ u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w);
+ u32 lbm;
+
+- if (vc4_state->is_unity)
+- return 0;
+- else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
+- lbm = pix_per_line * 8;
+- else {
+- /* In special cases, this multiplier might be 12. */
++ if (!vc4_state->is_yuv) {
++ if (vc4_state->is_unity)
++ return 0;
++ else if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
++ lbm = pix_per_line * 8;
++ else {
++ /* In special cases, this multiplier might be 12. */
++ lbm = pix_per_line * 16;
++ }
++ } else {
++ /* There are cases for this going down to a multiplier
++ * of 2, but according to the firmware source, the
++ * table in the docs is somewhat wrong.
++ */
+ lbm = pix_per_line * 16;
+ }
+
+@@ -361,33 +446,34 @@ static u32 vc4_lbm_size(struct drm_plane
+ return lbm;
+ }
+
+-static void vc4_write_scaling_parameters(struct drm_plane_state *state)
++static void vc4_write_scaling_parameters(struct drm_plane_state *state,
++ int channel)
+ {
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+
+ /* Ch0 H-PPF Word 0: Scaling Parameters */
+- if (vc4_state->x_scaling == VC4_SCALING_PPF) {
++ if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
+ vc4_write_ppf(vc4_state,
+- vc4_state->src_w, vc4_state->crtc_w);
++ vc4_state->src_w[channel], vc4_state->crtc_w);
+ }
+
+ /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
+- if (vc4_state->y_scaling == VC4_SCALING_PPF) {
++ if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
+ vc4_write_ppf(vc4_state,
+- vc4_state->src_h, vc4_state->crtc_h);
++ vc4_state->src_h[channel], vc4_state->crtc_h);
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ }
+
+ /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
+- if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
++ if (vc4_state->x_scaling[channel] == VC4_SCALING_TPZ) {
+ vc4_write_tpz(vc4_state,
+- vc4_state->src_w, vc4_state->crtc_w);
++ vc4_state->src_w[channel], vc4_state->crtc_w);
+ }
+
+ /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
+- if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
++ if (vc4_state->y_scaling[channel] == VC4_SCALING_TPZ) {
+ vc4_write_tpz(vc4_state,
+- vc4_state->src_h, vc4_state->crtc_h);
++ vc4_state->src_h[channel], vc4_state->crtc_h);
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+ }
+ }
+@@ -401,13 +487,13 @@ static int vc4_plane_mode_set(struct drm
+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+ struct drm_framebuffer *fb = state->fb;
+- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
+ u32 ctl0_offset = vc4_state->dlist_count;
+ const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
+- u32 scl;
++ int num_planes = drm_format_num_planes(format->drm);
++ u32 scl0, scl1;
+ u32 lbm_size;
+ unsigned long irqflags;
+- int ret;
++ int ret, i;
+
+ ret = vc4_plane_setup_clipping_and_scaling(state);
+ if (ret)
+@@ -432,7 +518,19 @@ static int vc4_plane_mode_set(struct drm
+ if (ret)
+ return ret;
+
+- scl = vc4_get_scl_field(state);
++ /* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
++ * and 4:4:4, scl1 should be set to scl0 so both channels of
++ * the scaler do the same thing. For YUV, the Y plane needs
++ * to be put in channel 1 and Cb/Cr in channel 0, so we swap
++ * the scl fields here.
++ */
++ if (num_planes == 1) {
++ scl0 = vc4_get_scl_field(state, 1);
++ scl1 = scl0;
++ } else {
++ scl0 = vc4_get_scl_field(state, 1);
++ scl1 = vc4_get_scl_field(state, 0);
++ }
+
+ /* Control word */
+ vc4_dlist_write(vc4_state,
+@@ -440,8 +538,8 @@ static int vc4_plane_mode_set(struct drm
+ (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
+ (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
+ (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
+- VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
+- VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
++ VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) |
++ VC4_SET_FIELD(scl1, SCALER_CTL0_SCL1));
+
+ /* Position Word 0: Image Positions and Alpha Value */
+ vc4_state->pos0_offset = vc4_state->dlist_count;
+@@ -466,35 +564,68 @@ static int vc4_plane_mode_set(struct drm
+ SCALER_POS2_ALPHA_MODE_PIPELINE :
+ SCALER_POS2_ALPHA_MODE_FIXED,
+ SCALER_POS2_ALPHA_MODE) |
+- VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
+- VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
++ VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) |
++ VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT));
+
+ /* Position Word 3: Context. Written by the HVS. */
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+
+- /* Pointer Word 0: RGB / Y Pointer */
++
++ /* Pointer Word 0/1/2: RGB / Y / Cb / Cr Pointers
++ *
++ * The pointers may be any byte address.
++ */
+ vc4_state->ptr0_offset = vc4_state->dlist_count;
+- vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
++ if (!format->flip_cbcr) {
++ for (i = 0; i < num_planes; i++)
++ vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
++ } else {
++ WARN_ON_ONCE(num_planes != 3);
++ vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
++ vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
++ vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
++ }
+
+- /* Pointer Context Word 0: Written by the HVS */
+- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
++ /* Pointer Context Word 0/1/2: Written by the HVS */
++ for (i = 0; i < num_planes; i++)
++ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+
+- /* Pitch word 0: Pointer 0 Pitch */
+- vc4_dlist_write(vc4_state,
+- VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
++ /* Pitch word 0/1/2 */
++ for (i = 0; i < num_planes; i++) {
++ vc4_dlist_write(vc4_state,
++ VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH));
++ }
++
++ /* Colorspace conversion words */
++ if (vc4_state->is_yuv) {
++ vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
++ vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
++ vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
++ }
+
+ if (!vc4_state->is_unity) {
+ /* LBM Base Address. */
+- if (vc4_state->y_scaling != VC4_SCALING_NONE)
++ if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
++ vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
+ vc4_dlist_write(vc4_state, vc4_state->lbm.start);
++ }
+
+- vc4_write_scaling_parameters(state);
++ if (num_planes > 1) {
++ /* Emit Cb/Cr as channel 0 and Y as channel
++ * 1. This matches how we set up scl0/scl1
++ * above.
++ */
++ vc4_write_scaling_parameters(state, 1);
++ }
++ vc4_write_scaling_parameters(state, 0);
+
+ /* If any PPF setup was done, then all the kernel
+ * pointers get uploaded.
+ */
+- if (vc4_state->x_scaling == VC4_SCALING_PPF ||
+- vc4_state->y_scaling == VC4_SCALING_PPF) {
++ if (vc4_state->x_scaling[0] == VC4_SCALING_PPF ||
++ vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
++ vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
++ vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
+ u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
+ SCALER_PPF_KERNEL_OFFSET);
+
+@@ -698,6 +829,7 @@ struct drm_plane *vc4_plane_init(struct
+ struct drm_plane *plane = NULL;
+ struct vc4_plane *vc4_plane;
+ u32 formats[ARRAY_SIZE(hvs_formats)];
++ u32 num_formats = 0;
+ int ret = 0;
+ unsigned i;
+
+@@ -708,12 +840,20 @@ struct drm_plane *vc4_plane_init(struct
+ goto fail;
+ }
+
+- for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
+- formats[i] = hvs_formats[i].drm;
++ for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
++ /* Don't allow YUV in cursor planes, since that means
++ * tuning on the scaler, which we don't allow for the
++ * cursor.
++ */
++ if (type != DRM_PLANE_TYPE_CURSOR ||
++ hvs_formats[i].hvs < HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE) {
++ formats[num_formats++] = hvs_formats[i].drm;
++ }
++ }
+ plane = &vc4_plane->base;
+ ret = drm_universal_plane_init(dev, plane, 0xff,
+ &vc4_plane_funcs,
+- formats, ARRAY_SIZE(formats),
++ formats, num_formats,
+ type);
+
+ drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -503,7 +503,12 @@ enum hvs_pixel_format {
+ HVS_PIXEL_FORMAT_RGB888 = 5,
+ HVS_PIXEL_FORMAT_RGBA6666 = 6,
+ /* 32bpp */
+- HVS_PIXEL_FORMAT_RGBA8888 = 7
++ HVS_PIXEL_FORMAT_RGBA8888 = 7,
++
++ HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE = 8,
++ HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE = 9,
++ HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE = 10,
++ HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE = 11,
+ };
+
+ /* Note: the LSB is the rightmost character shown. Only valid for
+@@ -585,6 +590,55 @@ enum hvs_pixel_format {
+ #define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0)
+ #define SCALER_POS2_WIDTH_SHIFT 0
+
++/* Color Space Conversion words. Some values are S2.8 signed
++ * integers, except that the 2 integer bits map as {0x0: 0, 0x1: 1,
++ * 0x2: 2, 0x3: -1}
++ */
++/* bottom 8 bits of S2.8 contribution of Cr to Blue */
++#define SCALER_CSC0_COEF_CR_BLU_MASK VC4_MASK(31, 24)
++#define SCALER_CSC0_COEF_CR_BLU_SHIFT 24
++/* Signed offset to apply to Y before CSC. (Y' = Y + YY_OFS) */
++#define SCALER_CSC0_COEF_YY_OFS_MASK VC4_MASK(23, 16)
++#define SCALER_CSC0_COEF_YY_OFS_SHIFT 16
++/* Signed offset to apply to CB before CSC (Cb' = Cb - 128 + CB_OFS). */
++#define SCALER_CSC0_COEF_CB_OFS_MASK VC4_MASK(15, 8)
++#define SCALER_CSC0_COEF_CB_OFS_SHIFT 8
++/* Signed offset to apply to CB before CSC (Cr' = Cr - 128 + CR_OFS). */
++#define SCALER_CSC0_COEF_CR_OFS_MASK VC4_MASK(7, 0)
++#define SCALER_CSC0_COEF_CR_OFS_SHIFT 0
++#define SCALER_CSC0_ITR_R_601_5 0x00f00000
++#define SCALER_CSC0_ITR_R_709_3 0x00f00000
++#define SCALER_CSC0_JPEG_JFIF 0x00000000
++
++/* S2.8 contribution of Cb to Green */
++#define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22)
++#define SCALER_CSC1_COEF_CB_GRN_SHIFT 22
++/* S2.8 contribution of Cr to Green */
++#define SCALER_CSC1_COEF_CR_GRN_MASK VC4_MASK(21, 12)
++#define SCALER_CSC1_COEF_CR_GRN_SHIFT 12
++/* S2.8 contribution of Y to all of RGB */
++#define SCALER_CSC1_COEF_YY_ALL_MASK VC4_MASK(11, 2)
++#define SCALER_CSC1_COEF_YY_ALL_SHIFT 2
++/* top 2 bits of S2.8 contribution of Cr to Blue */
++#define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0)
++#define SCALER_CSC1_COEF_CR_BLU_SHIFT 0
++#define SCALER_CSC1_ITR_R_601_5 0xe73304a8
++#define SCALER_CSC1_ITR_R_709_3 0xf2b784a8
++#define SCALER_CSC1_JPEG_JFIF 0xea34a400
++
++/* S2.8 contribution of Cb to Red */
++#define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20)
++#define SCALER_CSC2_COEF_CB_RED_SHIFT 20
++/* S2.8 contribution of Cr to Red */
++#define SCALER_CSC2_COEF_CR_RED_MASK VC4_MASK(19, 10)
++#define SCALER_CSC2_COEF_CR_RED_SHIFT 10
++/* S2.8 contribution of Cb to Blue */
++#define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10)
++#define SCALER_CSC2_COEF_CB_BLU_SHIFT 10
++#define SCALER_CSC2_ITR_R_601_5 0x00066204
++#define SCALER_CSC2_ITR_R_709_3 0x00072a1c
++#define SCALER_CSC2_JPEG_JFIF 0x000599c5
++
+ #define SCALER_TPZ0_VERT_RECALC BIT(31)
+ #define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8)
+ #define SCALER_TPZ0_SCALE_SHIFT 8
--- /dev/null
+From afe4e8694c719164db2918fe267658e4971bafaa Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 8 Feb 2016 11:19:14 -0800
+Subject: [PATCH 283/423] drm/vc4: Fix spurious GPU resets due to BO reuse.
+
+We were tracking the "where are the head pointers pointing" globally,
+so if another job reused the same BOs and execution was at the same
+point as last time we checked, we'd stop and trigger a reset even
+though the GPU had made progress.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit c4ce60dc30912df09b2438f1e5594eae1ef64d1e)
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 6 +++++-
+ drivers/gpu/drm/vc4/vc4_gem.c | 19 ++++++++++++++-----
+ 2 files changed, 19 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -93,7 +93,6 @@ struct vc4_dev {
+ struct work_struct overflow_mem_work;
+
+ struct {
+- uint32_t last_ct0ca, last_ct1ca;
+ struct timer_list timer;
+ struct work_struct reset_work;
+ } hangcheck;
+@@ -203,6 +202,11 @@ struct vc4_exec_info {
+ /* Sequence number for this bin/render job. */
+ uint64_t seqno;
+
++ /* Last current addresses the hardware was processing when the
++ * hangcheck timer checked on us.
++ */
++ uint32_t last_ct0ca, last_ct1ca;
++
+ /* Kernel-space copy of the ioctl arguments */
+ struct drm_vc4_submit_cl *args;
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -271,10 +271,17 @@ vc4_hangcheck_elapsed(unsigned long data
+ struct drm_device *dev = (struct drm_device *)data;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ uint32_t ct0ca, ct1ca;
++ unsigned long irqflags;
++ struct vc4_exec_info *exec;
++
++ spin_lock_irqsave(&vc4->job_lock, irqflags);
++ exec = vc4_first_job(vc4);
+
+ /* If idle, we can stop watching for hangs. */
+- if (list_empty(&vc4->job_list))
++ if (!exec) {
++ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ return;
++ }
+
+ ct0ca = V3D_READ(V3D_CTNCA(0));
+ ct1ca = V3D_READ(V3D_CTNCA(1));
+@@ -282,14 +289,16 @@ vc4_hangcheck_elapsed(unsigned long data
+ /* If we've made any progress in execution, rearm the timer
+ * and wait.
+ */
+- if (ct0ca != vc4->hangcheck.last_ct0ca ||
+- ct1ca != vc4->hangcheck.last_ct1ca) {
+- vc4->hangcheck.last_ct0ca = ct0ca;
+- vc4->hangcheck.last_ct1ca = ct1ca;
++ if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {
++ exec->last_ct0ca = ct0ca;
++ exec->last_ct1ca = ct1ca;
++ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ vc4_queue_hangcheck(dev);
+ return;
+ }
+
++ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
++
+ /* We've gone too long with no progress, reset. This has to
+ * be done from a work struct, since resetting can sleep and
+ * this timer hook isn't allowed to.
+++ /dev/null
-From b5b8069d79586dd9ff61b7e71fa0754a211dd0a8 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 28 Dec 2015 14:45:25 -0800
-Subject: [PATCH 283/381] drm/vc4: Fix which value is being used for source
- image size.
-
-This doesn't matter yet since we only allow 1:1 scaling, but the
-comment clearly says we should be using the source size.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit f863e356013d628fa65b1cd89aa298eed26fc936)
----
- drivers/gpu/drm/vc4/vc4_plane.c | 23 ++++++++++++++---------
- 1 file changed, 14 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -47,6 +47,8 @@ struct vc4_plane_state {
-
- /* Clipped coordinates of the plane on the display. */
- int crtc_x, crtc_y, crtc_w, crtc_h;
-+ /* Clipped size of the area scanned from in the FB. */
-+ u32 src_w, src_h;
-
- /* Offset to start scanning out from the start of the plane's
- * BO.
-@@ -186,11 +188,6 @@ static int vc4_plane_setup_clipping_and_
-
- vc4_state->offset = fb->offsets[0];
-
-- vc4_state->crtc_x = state->crtc_x;
-- vc4_state->crtc_y = state->crtc_y;
-- vc4_state->crtc_w = state->crtc_w;
-- vc4_state->crtc_h = state->crtc_h;
--
- if (state->crtc_w << 16 != state->src_w ||
- state->crtc_h << 16 != state->src_h) {
- /* We don't support scaling yet, which involves
-@@ -201,17 +198,25 @@ static int vc4_plane_setup_clipping_and_
- return -EINVAL;
- }
-
-+ vc4_state->src_w = state->src_w >> 16;
-+ vc4_state->src_h = state->src_h >> 16;
-+
-+ vc4_state->crtc_x = state->crtc_x;
-+ vc4_state->crtc_y = state->crtc_y;
-+ vc4_state->crtc_w = state->crtc_w;
-+ vc4_state->crtc_h = state->crtc_h;
-+
- if (vc4_state->crtc_x < 0) {
- vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
- 0) *
- -vc4_state->crtc_x);
-- vc4_state->crtc_w += vc4_state->crtc_x;
-+ vc4_state->src_w += vc4_state->crtc_x;
- vc4_state->crtc_x = 0;
- }
-
- if (vc4_state->crtc_y < 0) {
- vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
-- vc4_state->crtc_h += vc4_state->crtc_y;
-+ vc4_state->src_h += vc4_state->crtc_y;
- vc4_state->crtc_y = 0;
- }
-
-@@ -260,8 +265,8 @@ static int vc4_plane_mode_set(struct drm
- SCALER_POS2_ALPHA_MODE_PIPELINE :
- SCALER_POS2_ALPHA_MODE_FIXED,
- SCALER_POS2_ALPHA_MODE) |
-- VC4_SET_FIELD(vc4_state->crtc_w, SCALER_POS2_WIDTH) |
-- VC4_SET_FIELD(vc4_state->crtc_h, SCALER_POS2_HEIGHT));
-+ VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
-+ VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
-
- /* Position Word 3: Context. Written by the HVS. */
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
+++ /dev/null
-From 52e3b2b7276aebafa566574945c9d5854215add3 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 20 Oct 2015 16:06:57 +0100
-Subject: [PATCH 284/381] drm/vc4: Add support for scaling of display planes.
-
-This implements a simple policy for choosing scaling modes
-(trapezoidal for decimation, PPF for magnification), and a single PPF
-filter (Mitchell/Netravali's recommendation).
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 21af94cf1a4c2d3450ab7fead58e6e2291ab92a9)
----
- drivers/gpu/drm/vc4/vc4_drv.h | 4 +
- drivers/gpu/drm/vc4/vc4_hvs.c | 84 +++++++++++++
- drivers/gpu/drm/vc4/vc4_plane.c | 253 +++++++++++++++++++++++++++++++++++++---
- drivers/gpu/drm/vc4/vc4_regs.h | 46 ++++++++
- 4 files changed, 374 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -156,7 +156,11 @@ struct vc4_hvs {
- * list. Units are dwords.
- */
- struct drm_mm dlist_mm;
-+ /* Memory manager for the LBM memory used by HVS scaling. */
-+ struct drm_mm lbm_mm;
- spinlock_t mm_lock;
-+
-+ struct drm_mm_node mitchell_netravali_filter;
- };
-
- struct vc4_plane {
---- a/drivers/gpu/drm/vc4/vc4_hvs.c
-+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
-@@ -100,12 +100,76 @@ int vc4_hvs_debugfs_regs(struct seq_file
- }
- #endif
-
-+/* The filter kernel is composed of dwords each containing 3 9-bit
-+ * signed integers packed next to each other.
-+ */
-+#define VC4_INT_TO_COEFF(coeff) (coeff & 0x1ff)
-+#define VC4_PPF_FILTER_WORD(c0, c1, c2) \
-+ ((((c0) & 0x1ff) << 0) | \
-+ (((c1) & 0x1ff) << 9) | \
-+ (((c2) & 0x1ff) << 18))
-+
-+/* The whole filter kernel is arranged as the coefficients 0-16 going
-+ * up, then a pad, then 17-31 going down and reversed within the
-+ * dwords. This means that a linear phase kernel (where it's
-+ * symmetrical at the boundary between 15 and 16) has the last 5
-+ * dwords matching the first 5, but reversed.
-+ */
-+#define VC4_LINEAR_PHASE_KERNEL(c0, c1, c2, c3, c4, c5, c6, c7, c8, \
-+ c9, c10, c11, c12, c13, c14, c15) \
-+ {VC4_PPF_FILTER_WORD(c0, c1, c2), \
-+ VC4_PPF_FILTER_WORD(c3, c4, c5), \
-+ VC4_PPF_FILTER_WORD(c6, c7, c8), \
-+ VC4_PPF_FILTER_WORD(c9, c10, c11), \
-+ VC4_PPF_FILTER_WORD(c12, c13, c14), \
-+ VC4_PPF_FILTER_WORD(c15, c15, 0)}
-+
-+#define VC4_LINEAR_PHASE_KERNEL_DWORDS 6
-+#define VC4_KERNEL_DWORDS (VC4_LINEAR_PHASE_KERNEL_DWORDS * 2 - 1)
-+
-+/* Recommended B=1/3, C=1/3 filter choice from Mitchell/Netravali.
-+ * http://www.cs.utexas.edu/~fussell/courses/cs384g/lectures/mitchell/Mitchell.pdf
-+ */
-+static const u32 mitchell_netravali_1_3_1_3_kernel[] =
-+ VC4_LINEAR_PHASE_KERNEL(0, -2, -6, -8, -10, -8, -3, 2, 18,
-+ 50, 82, 119, 155, 187, 213, 227);
-+
-+static int vc4_hvs_upload_linear_kernel(struct vc4_hvs *hvs,
-+ struct drm_mm_node *space,
-+ const u32 *kernel)
-+{
-+ int ret, i;
-+ u32 __iomem *dst_kernel;
-+
-+ ret = drm_mm_insert_node(&hvs->dlist_mm, space, VC4_KERNEL_DWORDS, 1,
-+ 0);
-+ if (ret) {
-+ DRM_ERROR("Failed to allocate space for filter kernel: %d\n",
-+ ret);
-+ return ret;
-+ }
-+
-+ dst_kernel = hvs->dlist + space->start;
-+
-+ for (i = 0; i < VC4_KERNEL_DWORDS; i++) {
-+ if (i < VC4_LINEAR_PHASE_KERNEL_DWORDS)
-+ writel(kernel[i], &dst_kernel[i]);
-+ else {
-+ writel(kernel[VC4_KERNEL_DWORDS - i - 1],
-+ &dst_kernel[i]);
-+ }
-+ }
-+
-+ return 0;
-+}
-+
- static int vc4_hvs_bind(struct device *dev, struct device *master, void *data)
- {
- struct platform_device *pdev = to_platform_device(dev);
- struct drm_device *drm = dev_get_drvdata(master);
- struct vc4_dev *vc4 = drm->dev_private;
- struct vc4_hvs *hvs = NULL;
-+ int ret;
-
- hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL);
- if (!hvs)
-@@ -130,6 +194,22 @@ static int vc4_hvs_bind(struct device *d
- HVS_BOOTLOADER_DLIST_END,
- (SCALER_DLIST_SIZE >> 2) - HVS_BOOTLOADER_DLIST_END);
-
-+ /* Set up the HVS LBM memory manager. We could have some more
-+ * complicated data structure that allowed reuse of LBM areas
-+ * between planes when they don't overlap on the screen, but
-+ * for now we just allocate globally.
-+ */
-+ drm_mm_init(&hvs->lbm_mm, 0, 96 * 1024);
-+
-+ /* Upload filter kernels. We only have the one for now, so we
-+ * keep it around for the lifetime of the driver.
-+ */
-+ ret = vc4_hvs_upload_linear_kernel(hvs,
-+ &hvs->mitchell_netravali_filter,
-+ mitchell_netravali_1_3_1_3_kernel);
-+ if (ret)
-+ return ret;
-+
- vc4->hvs = hvs;
- return 0;
- }
-@@ -140,7 +220,11 @@ static void vc4_hvs_unbind(struct device
- struct drm_device *drm = dev_get_drvdata(master);
- struct vc4_dev *vc4 = drm->dev_private;
-
-+ if (vc4->hvs->mitchell_netravali_filter.allocated)
-+ drm_mm_remove_node(&vc4->hvs->mitchell_netravali_filter);
-+
- drm_mm_takedown(&vc4->hvs->dlist_mm);
-+ drm_mm_takedown(&vc4->hvs->lbm_mm);
-
- vc4->hvs = NULL;
- }
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -24,6 +24,12 @@
- #include "drm_fb_cma_helper.h"
- #include "drm_plane_helper.h"
-
-+enum vc4_scaling_mode {
-+ VC4_SCALING_NONE,
-+ VC4_SCALING_TPZ,
-+ VC4_SCALING_PPF,
-+};
-+
- struct vc4_plane_state {
- struct drm_plane_state base;
- /* System memory copy of the display list for this element, computed
-@@ -47,13 +53,19 @@ struct vc4_plane_state {
-
- /* Clipped coordinates of the plane on the display. */
- int crtc_x, crtc_y, crtc_w, crtc_h;
-- /* Clipped size of the area scanned from in the FB. */
-- u32 src_w, src_h;
-+ /* Clipped area being scanned from in the FB. */
-+ u32 src_x, src_y, src_w, src_h;
-+
-+ enum vc4_scaling_mode x_scaling, y_scaling;
-+ bool is_unity;
-
- /* Offset to start scanning out from the start of the plane's
- * BO.
- */
- u32 offset;
-+
-+ /* Our allocation in LBM for temporary storage during scaling. */
-+ struct drm_mm_node lbm;
- };
-
- static inline struct vc4_plane_state *
-@@ -106,6 +118,16 @@ static const struct hvs_format *vc4_get_
- return NULL;
- }
-
-+static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst)
-+{
-+ if (dst > src)
-+ return VC4_SCALING_PPF;
-+ else if (dst < src)
-+ return VC4_SCALING_TPZ;
-+ else
-+ return VC4_SCALING_NONE;
-+}
-+
- static bool plane_enabled(struct drm_plane_state *state)
- {
- return state->fb && state->crtc;
-@@ -122,6 +144,8 @@ static struct drm_plane_state *vc4_plane
- if (!vc4_state)
- return NULL;
-
-+ memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm));
-+
- __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
-
- if (vc4_state->dlist) {
-@@ -141,8 +165,17 @@ static struct drm_plane_state *vc4_plane
- static void vc4_plane_destroy_state(struct drm_plane *plane,
- struct drm_plane_state *state)
- {
-+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-
-+ if (vc4_state->lbm.allocated) {
-+ unsigned long irqflags;
-+
-+ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
-+ drm_mm_remove_node(&vc4_state->lbm);
-+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
-+ }
-+
- kfree(vc4_state->dlist);
- __drm_atomic_helper_plane_destroy_state(plane, &vc4_state->base);
- kfree(state);
-@@ -181,23 +214,60 @@ static void vc4_dlist_write(struct vc4_p
- vc4_state->dlist[vc4_state->dlist_count++] = val;
- }
-
-+/* Returns the scl0/scl1 field based on whether the dimensions need to
-+ * be up/down/non-scaled.
-+ *
-+ * This is a replication of a table from the spec.
-+ */
-+static u32 vc4_get_scl_field(struct drm_plane_state *state)
-+{
-+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-+
-+ switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
-+ case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
-+ return SCALER_CTL0_SCL_H_PPF_V_PPF;
-+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
-+ return SCALER_CTL0_SCL_H_TPZ_V_PPF;
-+ case VC4_SCALING_PPF << 2 | VC4_SCALING_TPZ:
-+ return SCALER_CTL0_SCL_H_PPF_V_TPZ;
-+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_TPZ:
-+ return SCALER_CTL0_SCL_H_TPZ_V_TPZ;
-+ case VC4_SCALING_PPF << 2 | VC4_SCALING_NONE:
-+ return SCALER_CTL0_SCL_H_PPF_V_NONE;
-+ case VC4_SCALING_NONE << 2 | VC4_SCALING_PPF:
-+ return SCALER_CTL0_SCL_H_NONE_V_PPF;
-+ case VC4_SCALING_NONE << 2 | VC4_SCALING_TPZ:
-+ return SCALER_CTL0_SCL_H_NONE_V_TPZ;
-+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_NONE:
-+ return SCALER_CTL0_SCL_H_TPZ_V_NONE;
-+ default:
-+ case VC4_SCALING_NONE << 2 | VC4_SCALING_NONE:
-+ /* The unity case is independently handled by
-+ * SCALER_CTL0_UNITY.
-+ */
-+ return 0;
-+ }
-+}
-+
- static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
- {
-+ struct drm_plane *plane = state->plane;
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
-+ u32 subpixel_src_mask = (1 << 16) - 1;
-
- vc4_state->offset = fb->offsets[0];
-
-- if (state->crtc_w << 16 != state->src_w ||
-- state->crtc_h << 16 != state->src_h) {
-- /* We don't support scaling yet, which involves
-- * allocating the LBM memory for scaling temporary
-- * storage, and putting filter kernels in the HVS
-- * context.
-- */
-+ /* We don't support subpixel source positioning for scaling. */
-+ if ((state->src_x & subpixel_src_mask) ||
-+ (state->src_y & subpixel_src_mask) ||
-+ (state->src_w & subpixel_src_mask) ||
-+ (state->src_h & subpixel_src_mask)) {
- return -EINVAL;
- }
-
-+ vc4_state->src_x = state->src_x >> 16;
-+ vc4_state->src_y = state->src_y >> 16;
- vc4_state->src_w = state->src_w >> 16;
- vc4_state->src_h = state->src_h >> 16;
-
-@@ -206,6 +276,23 @@ static int vc4_plane_setup_clipping_and_
- vc4_state->crtc_w = state->crtc_w;
- vc4_state->crtc_h = state->crtc_h;
-
-+ vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
-+ vc4_state->crtc_w);
-+ vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
-+ vc4_state->crtc_h);
-+ vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
-+ vc4_state->y_scaling == VC4_SCALING_NONE);
-+
-+ /* No configuring scaling on the cursor plane, since it gets
-+ non-vblank-synced updates, and scaling requires requires
-+ LBM changes which have to be vblank-synced.
-+ */
-+ if (plane->type == DRM_PLANE_TYPE_CURSOR && !vc4_state->is_unity)
-+ return -EINVAL;
-+
-+ /* Clamp the on-screen start x/y to 0. The hardware doesn't
-+ * support negative y, and negative x wastes bandwidth.
-+ */
- if (vc4_state->crtc_x < 0) {
- vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
- 0) *
-@@ -223,6 +310,87 @@ static int vc4_plane_setup_clipping_and_
- return 0;
- }
-
-+static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
-+{
-+ u32 scale, recip;
-+
-+ scale = (1 << 16) * src / dst;
-+
-+ /* The specs note that while the reciprocal would be defined
-+ * as (1<<32)/scale, ~0 is close enough.
-+ */
-+ recip = ~0 / scale;
-+
-+ vc4_dlist_write(vc4_state,
-+ VC4_SET_FIELD(scale, SCALER_TPZ0_SCALE) |
-+ VC4_SET_FIELD(0, SCALER_TPZ0_IPHASE));
-+ vc4_dlist_write(vc4_state,
-+ VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP));
-+}
-+
-+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
-+{
-+ u32 scale = (1 << 16) * src / dst;
-+
-+ vc4_dlist_write(vc4_state,
-+ SCALER_PPF_AGC |
-+ VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
-+ VC4_SET_FIELD(0, SCALER_PPF_IPHASE));
-+}
-+
-+static u32 vc4_lbm_size(struct drm_plane_state *state)
-+{
-+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-+ /* This is the worst case number. One of the two sizes will
-+ * be used depending on the scaling configuration.
-+ */
-+ u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
-+ u32 lbm;
-+
-+ if (vc4_state->is_unity)
-+ return 0;
-+ else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
-+ lbm = pix_per_line * 8;
-+ else {
-+ /* In special cases, this multiplier might be 12. */
-+ lbm = pix_per_line * 16;
-+ }
-+
-+ lbm = roundup(lbm, 32);
-+
-+ return lbm;
-+}
-+
-+static void vc4_write_scaling_parameters(struct drm_plane_state *state)
-+{
-+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-+
-+ /* Ch0 H-PPF Word 0: Scaling Parameters */
-+ if (vc4_state->x_scaling == VC4_SCALING_PPF) {
-+ vc4_write_ppf(vc4_state,
-+ vc4_state->src_w, vc4_state->crtc_w);
-+ }
-+
-+ /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
-+ if (vc4_state->y_scaling == VC4_SCALING_PPF) {
-+ vc4_write_ppf(vc4_state,
-+ vc4_state->src_h, vc4_state->crtc_h);
-+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-+ }
-+
-+ /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
-+ if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
-+ vc4_write_tpz(vc4_state,
-+ vc4_state->src_w, vc4_state->crtc_w);
-+ }
-+
-+ /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
-+ if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
-+ vc4_write_tpz(vc4_state,
-+ vc4_state->src_h, vc4_state->crtc_h);
-+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-+ }
-+}
-
- /* Writes out a full display list for an active plane to the plane's
- * private dlist state.
-@@ -230,22 +398,50 @@ static int vc4_plane_setup_clipping_and_
- static int vc4_plane_mode_set(struct drm_plane *plane,
- struct drm_plane_state *state)
- {
-+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
- u32 ctl0_offset = vc4_state->dlist_count;
- const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
-+ u32 scl;
-+ u32 lbm_size;
-+ unsigned long irqflags;
- int ret;
-
- ret = vc4_plane_setup_clipping_and_scaling(state);
- if (ret)
- return ret;
-
-+ /* Allocate the LBM memory that the HVS will use for temporary
-+ * storage due to our scaling/format conversion.
-+ */
-+ lbm_size = vc4_lbm_size(state);
-+ if (lbm_size) {
-+ if (!vc4_state->lbm.allocated) {
-+ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
-+ ret = drm_mm_insert_node(&vc4->hvs->lbm_mm,
-+ &vc4_state->lbm,
-+ lbm_size, 32, 0);
-+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
-+ } else {
-+ WARN_ON_ONCE(lbm_size != vc4_state->lbm.size);
-+ }
-+ }
-+
-+ if (ret)
-+ return ret;
-+
-+ scl = vc4_get_scl_field(state);
-+
-+ /* Control word */
- vc4_dlist_write(vc4_state,
- SCALER_CTL0_VALID |
- (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
- (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
-- SCALER_CTL0_UNITY);
-+ (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
-+ VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
-+ VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
-
- /* Position Word 0: Image Positions and Alpha Value */
- vc4_state->pos0_offset = vc4_state->dlist_count;
-@@ -254,9 +450,14 @@ static int vc4_plane_mode_set(struct drm
- VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
- VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
-
-- /* Position Word 1: Scaled Image Dimensions.
-- * Skipped due to SCALER_CTL0_UNITY scaling.
-- */
-+ /* Position Word 1: Scaled Image Dimensions. */
-+ if (!vc4_state->is_unity) {
-+ vc4_dlist_write(vc4_state,
-+ VC4_SET_FIELD(vc4_state->crtc_w,
-+ SCALER_POS1_SCL_WIDTH) |
-+ VC4_SET_FIELD(vc4_state->crtc_h,
-+ SCALER_POS1_SCL_HEIGHT));
-+ }
-
- /* Position Word 2: Source Image Size, Alpha Mode */
- vc4_state->pos2_offset = vc4_state->dlist_count;
-@@ -282,6 +483,32 @@ static int vc4_plane_mode_set(struct drm
- vc4_dlist_write(vc4_state,
- VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
-
-+ if (!vc4_state->is_unity) {
-+ /* LBM Base Address. */
-+ if (vc4_state->y_scaling != VC4_SCALING_NONE)
-+ vc4_dlist_write(vc4_state, vc4_state->lbm.start);
-+
-+ vc4_write_scaling_parameters(state);
-+
-+ /* If any PPF setup was done, then all the kernel
-+ * pointers get uploaded.
-+ */
-+ if (vc4_state->x_scaling == VC4_SCALING_PPF ||
-+ vc4_state->y_scaling == VC4_SCALING_PPF) {
-+ u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
-+ SCALER_PPF_KERNEL_OFFSET);
-+
-+ /* HPPF plane 0 */
-+ vc4_dlist_write(vc4_state, kernel);
-+ /* VPPF plane 0 */
-+ vc4_dlist_write(vc4_state, kernel);
-+ /* HPPF plane 1 */
-+ vc4_dlist_write(vc4_state, kernel);
-+ /* VPPF plane 1 */
-+ vc4_dlist_write(vc4_state, kernel);
-+ }
-+ }
-+
- vc4_state->dlist[ctl0_offset] |=
- VC4_SET_FIELD(vc4_state->dlist_count, SCALER_CTL0_SIZE);
-
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -536,6 +536,21 @@ enum hvs_pixel_format {
- #define SCALER_CTL0_ORDER_MASK VC4_MASK(14, 13)
- #define SCALER_CTL0_ORDER_SHIFT 13
-
-+#define SCALER_CTL0_SCL1_MASK VC4_MASK(10, 8)
-+#define SCALER_CTL0_SCL1_SHIFT 8
-+
-+#define SCALER_CTL0_SCL0_MASK VC4_MASK(7, 5)
-+#define SCALER_CTL0_SCL0_SHIFT 5
-+
-+#define SCALER_CTL0_SCL_H_PPF_V_PPF 0
-+#define SCALER_CTL0_SCL_H_TPZ_V_PPF 1
-+#define SCALER_CTL0_SCL_H_PPF_V_TPZ 2
-+#define SCALER_CTL0_SCL_H_TPZ_V_TPZ 3
-+#define SCALER_CTL0_SCL_H_PPF_V_NONE 4
-+#define SCALER_CTL0_SCL_H_NONE_V_PPF 5
-+#define SCALER_CTL0_SCL_H_NONE_V_TPZ 6
-+#define SCALER_CTL0_SCL_H_TPZ_V_NONE 7
-+
- /* Set to indicate no scaling. */
- #define SCALER_CTL0_UNITY BIT(4)
-
-@@ -551,6 +566,12 @@ enum hvs_pixel_format {
- #define SCALER_POS0_START_X_MASK VC4_MASK(11, 0)
- #define SCALER_POS0_START_X_SHIFT 0
-
-+#define SCALER_POS1_SCL_HEIGHT_MASK VC4_MASK(27, 16)
-+#define SCALER_POS1_SCL_HEIGHT_SHIFT 16
-+
-+#define SCALER_POS1_SCL_WIDTH_MASK VC4_MASK(11, 0)
-+#define SCALER_POS1_SCL_WIDTH_SHIFT 0
-+
- #define SCALER_POS2_ALPHA_MODE_MASK VC4_MASK(31, 30)
- #define SCALER_POS2_ALPHA_MODE_SHIFT 30
- #define SCALER_POS2_ALPHA_MODE_PIPELINE 0
-@@ -564,6 +585,31 @@ enum hvs_pixel_format {
- #define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0)
- #define SCALER_POS2_WIDTH_SHIFT 0
-
-+#define SCALER_TPZ0_VERT_RECALC BIT(31)
-+#define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8)
-+#define SCALER_TPZ0_SCALE_SHIFT 8
-+#define SCALER_TPZ0_IPHASE_MASK VC4_MASK(7, 0)
-+#define SCALER_TPZ0_IPHASE_SHIFT 0
-+#define SCALER_TPZ1_RECIP_MASK VC4_MASK(15, 0)
-+#define SCALER_TPZ1_RECIP_SHIFT 0
-+
-+/* Skips interpolating coefficients to 64 phases, so just 8 are used.
-+ * Required for nearest neighbor.
-+ */
-+#define SCALER_PPF_NOINTERP BIT(31)
-+/* Replaes the highest valued coefficient with one that makes all 4
-+ * sum to unity.
-+ */
-+#define SCALER_PPF_AGC BIT(30)
-+#define SCALER_PPF_SCALE_MASK VC4_MASK(24, 8)
-+#define SCALER_PPF_SCALE_SHIFT 8
-+#define SCALER_PPF_IPHASE_MASK VC4_MASK(6, 0)
-+#define SCALER_PPF_IPHASE_SHIFT 0
-+
-+#define SCALER_PPF_KERNEL_OFFSET_MASK VC4_MASK(13, 0)
-+#define SCALER_PPF_KERNEL_OFFSET_SHIFT 0
-+#define SCALER_PPF_KERNEL_UNCACHED BIT(31)
-+
- #define SCALER_SRC_PITCH_MASK VC4_MASK(15, 0)
- #define SCALER_SRC_PITCH_SHIFT 0
-
--- /dev/null
+From 0a26ed79b85b1fd55b88a1c3b5d1b4c3382b03f9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 5 Feb 2016 15:06:15 -0800
+Subject: [PATCH 284/423] drm/vc4: Fix a framebuffer reference leak on async
+ flip interrupt.
+
+We'd need X to queue up an async pageflip while another is
+outstanding, and then take a SIGIO. I think X actually avoids sending
+out the next pageflip while one's already queued, but I'm not sure.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 48627eb8dc55c60d35794105f6f79fb627347dbd)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -527,6 +527,7 @@ static int vc4_async_page_flip(struct dr
+ /* Make sure all other async modesetes have landed. */
+ ret = down_interruptible(&vc4->async_modeset);
+ if (ret) {
++ drm_framebuffer_unreference(fb);
+ kfree(flip_state);
+ return ret;
+ }
+++ /dev/null
-From 4760d384fa61412cfff7ac9e4166610cff125f53 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 30 Dec 2015 12:25:44 -0800
-Subject: [PATCH 285/381] drm/vc4: Add support for YUV planes.
-
-This supports 420 and 422 subsampling with 2 or 3 planes, tested with
-modetest. It doesn't set up chroma subsampling position (which it
-appears KMS doesn't deal with yet).
-
-The LBM memory is overallocated in many cases, but apparently the docs
-aren't quite correct and I'll probably need to look at the hardware
-source to really figure it out.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit fc04023fafecf19ebd09278d8d67dc5ed1f68b46)
----
- drivers/gpu/drm/vc4/vc4_plane.c | 256 +++++++++++++++++++++++++++++++---------
- drivers/gpu/drm/vc4/vc4_regs.h | 56 ++++++++-
- 2 files changed, 253 insertions(+), 59 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -54,15 +54,19 @@ struct vc4_plane_state {
- /* Clipped coordinates of the plane on the display. */
- int crtc_x, crtc_y, crtc_w, crtc_h;
- /* Clipped area being scanned from in the FB. */
-- u32 src_x, src_y, src_w, src_h;
-+ u32 src_x, src_y;
-
-- enum vc4_scaling_mode x_scaling, y_scaling;
-+ u32 src_w[2], src_h[2];
-+
-+ /* Scaling selection for the RGB/Y plane and the Cb/Cr planes. */
-+ enum vc4_scaling_mode x_scaling[2], y_scaling[2];
- bool is_unity;
-+ bool is_yuv;
-
- /* Offset to start scanning out from the start of the plane's
- * BO.
- */
-- u32 offset;
-+ u32 offsets[3];
-
- /* Our allocation in LBM for temporary storage during scaling. */
- struct drm_mm_node lbm;
-@@ -79,6 +83,7 @@ static const struct hvs_format {
- u32 hvs; /* HVS_FORMAT_* */
- u32 pixel_order;
- bool has_alpha;
-+ bool flip_cbcr;
- } hvs_formats[] = {
- {
- .drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
-@@ -104,6 +109,32 @@ static const struct hvs_format {
- .drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
- .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
- },
-+ {
-+ .drm = DRM_FORMAT_YUV422,
-+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
-+ },
-+ {
-+ .drm = DRM_FORMAT_YVU422,
-+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
-+ .flip_cbcr = true,
-+ },
-+ {
-+ .drm = DRM_FORMAT_YUV420,
-+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
-+ },
-+ {
-+ .drm = DRM_FORMAT_YVU420,
-+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
-+ .flip_cbcr = true,
-+ },
-+ {
-+ .drm = DRM_FORMAT_NV12,
-+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
-+ },
-+ {
-+ .drm = DRM_FORMAT_NV16,
-+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
-+ },
- };
-
- static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
-@@ -219,11 +250,11 @@ static void vc4_dlist_write(struct vc4_p
- *
- * This is a replication of a table from the spec.
- */
--static u32 vc4_get_scl_field(struct drm_plane_state *state)
-+static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane)
- {
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-
-- switch (vc4_state->x_scaling << 2 | vc4_state->y_scaling) {
-+ switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) {
- case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
- return SCALER_CTL0_SCL_H_PPF_V_PPF;
- case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
-@@ -254,9 +285,16 @@ static int vc4_plane_setup_clipping_and_
- struct drm_plane *plane = state->plane;
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
-+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
- u32 subpixel_src_mask = (1 << 16) - 1;
-+ u32 format = fb->pixel_format;
-+ int num_planes = drm_format_num_planes(format);
-+ u32 h_subsample = 1;
-+ u32 v_subsample = 1;
-+ int i;
-
-- vc4_state->offset = fb->offsets[0];
-+ for (i = 0; i < num_planes; i++)
-+ vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
-
- /* We don't support subpixel source positioning for scaling. */
- if ((state->src_x & subpixel_src_mask) ||
-@@ -268,20 +306,48 @@ static int vc4_plane_setup_clipping_and_
-
- vc4_state->src_x = state->src_x >> 16;
- vc4_state->src_y = state->src_y >> 16;
-- vc4_state->src_w = state->src_w >> 16;
-- vc4_state->src_h = state->src_h >> 16;
-+ vc4_state->src_w[0] = state->src_w >> 16;
-+ vc4_state->src_h[0] = state->src_h >> 16;
-
- vc4_state->crtc_x = state->crtc_x;
- vc4_state->crtc_y = state->crtc_y;
- vc4_state->crtc_w = state->crtc_w;
- vc4_state->crtc_h = state->crtc_h;
-
-- vc4_state->x_scaling = vc4_get_scaling_mode(vc4_state->src_w,
-- vc4_state->crtc_w);
-- vc4_state->y_scaling = vc4_get_scaling_mode(vc4_state->src_h,
-- vc4_state->crtc_h);
-- vc4_state->is_unity = (vc4_state->x_scaling == VC4_SCALING_NONE &&
-- vc4_state->y_scaling == VC4_SCALING_NONE);
-+ vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0],
-+ vc4_state->crtc_w);
-+ vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
-+ vc4_state->crtc_h);
-+
-+ if (num_planes > 1) {
-+ vc4_state->is_yuv = true;
-+
-+ h_subsample = drm_format_horz_chroma_subsampling(format);
-+ v_subsample = drm_format_vert_chroma_subsampling(format);
-+ vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample;
-+ vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample;
-+
-+ vc4_state->x_scaling[1] =
-+ vc4_get_scaling_mode(vc4_state->src_w[1],
-+ vc4_state->crtc_w);
-+ vc4_state->y_scaling[1] =
-+ vc4_get_scaling_mode(vc4_state->src_h[1],
-+ vc4_state->crtc_h);
-+
-+ /* YUV conversion requires that scaling be enabled,
-+ * even on a plane that's otherwise 1:1. Choose TPZ
-+ * for simplicity.
-+ */
-+ if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
-+ vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
-+ if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
-+ vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
-+ }
-+
-+ vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
-+ vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
-+ vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
-+ vc4_state->y_scaling[1] == VC4_SCALING_NONE);
-
- /* No configuring scaling on the cursor plane, since it gets
- non-vblank-synced updates, and scaling requires requires
-@@ -294,16 +360,27 @@ static int vc4_plane_setup_clipping_and_
- * support negative y, and negative x wastes bandwidth.
- */
- if (vc4_state->crtc_x < 0) {
-- vc4_state->offset += (drm_format_plane_cpp(fb->pixel_format,
-- 0) *
-- -vc4_state->crtc_x);
-- vc4_state->src_w += vc4_state->crtc_x;
-+ for (i = 0; i < num_planes; i++) {
-+ u32 cpp = drm_format_plane_cpp(fb->pixel_format, i);
-+ u32 subs = ((i == 0) ? 1 : h_subsample);
-+
-+ vc4_state->offsets[i] += (cpp *
-+ (-vc4_state->crtc_x) / subs);
-+ }
-+ vc4_state->src_w[0] += vc4_state->crtc_x;
-+ vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample;
- vc4_state->crtc_x = 0;
- }
-
- if (vc4_state->crtc_y < 0) {
-- vc4_state->offset += fb->pitches[0] * -vc4_state->crtc_y;
-- vc4_state->src_h += vc4_state->crtc_y;
-+ for (i = 0; i < num_planes; i++) {
-+ u32 subs = ((i == 0) ? 1 : v_subsample);
-+
-+ vc4_state->offsets[i] += (fb->pitches[i] *
-+ (-vc4_state->crtc_y) / subs);
-+ }
-+ vc4_state->src_h[0] += vc4_state->crtc_y;
-+ vc4_state->src_h[1] += vc4_state->crtc_y / v_subsample;
- vc4_state->crtc_y = 0;
- }
-
-@@ -344,15 +421,23 @@ static u32 vc4_lbm_size(struct drm_plane
- /* This is the worst case number. One of the two sizes will
- * be used depending on the scaling configuration.
- */
-- u32 pix_per_line = max(vc4_state->src_w, (u32)vc4_state->crtc_w);
-+ u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w);
- u32 lbm;
-
-- if (vc4_state->is_unity)
-- return 0;
-- else if (vc4_state->y_scaling == VC4_SCALING_TPZ)
-- lbm = pix_per_line * 8;
-- else {
-- /* In special cases, this multiplier might be 12. */
-+ if (!vc4_state->is_yuv) {
-+ if (vc4_state->is_unity)
-+ return 0;
-+ else if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
-+ lbm = pix_per_line * 8;
-+ else {
-+ /* In special cases, this multiplier might be 12. */
-+ lbm = pix_per_line * 16;
-+ }
-+ } else {
-+ /* There are cases for this going down to a multiplier
-+ * of 2, but according to the firmware source, the
-+ * table in the docs is somewhat wrong.
-+ */
- lbm = pix_per_line * 16;
- }
-
-@@ -361,33 +446,34 @@ static u32 vc4_lbm_size(struct drm_plane
- return lbm;
- }
-
--static void vc4_write_scaling_parameters(struct drm_plane_state *state)
-+static void vc4_write_scaling_parameters(struct drm_plane_state *state,
-+ int channel)
- {
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
-
- /* Ch0 H-PPF Word 0: Scaling Parameters */
-- if (vc4_state->x_scaling == VC4_SCALING_PPF) {
-+ if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
- vc4_write_ppf(vc4_state,
-- vc4_state->src_w, vc4_state->crtc_w);
-+ vc4_state->src_w[channel], vc4_state->crtc_w);
- }
-
- /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
-- if (vc4_state->y_scaling == VC4_SCALING_PPF) {
-+ if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
- vc4_write_ppf(vc4_state,
-- vc4_state->src_h, vc4_state->crtc_h);
-+ vc4_state->src_h[channel], vc4_state->crtc_h);
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
- }
-
- /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
-- if (vc4_state->x_scaling == VC4_SCALING_TPZ) {
-+ if (vc4_state->x_scaling[channel] == VC4_SCALING_TPZ) {
- vc4_write_tpz(vc4_state,
-- vc4_state->src_w, vc4_state->crtc_w);
-+ vc4_state->src_w[channel], vc4_state->crtc_w);
- }
-
- /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
-- if (vc4_state->y_scaling == VC4_SCALING_TPZ) {
-+ if (vc4_state->y_scaling[channel] == VC4_SCALING_TPZ) {
- vc4_write_tpz(vc4_state,
-- vc4_state->src_h, vc4_state->crtc_h);
-+ vc4_state->src_h[channel], vc4_state->crtc_h);
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
- }
- }
-@@ -401,13 +487,13 @@ static int vc4_plane_mode_set(struct drm
- struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
- struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
- struct drm_framebuffer *fb = state->fb;
-- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
- u32 ctl0_offset = vc4_state->dlist_count;
- const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
-- u32 scl;
-+ int num_planes = drm_format_num_planes(format->drm);
-+ u32 scl0, scl1;
- u32 lbm_size;
- unsigned long irqflags;
-- int ret;
-+ int ret, i;
-
- ret = vc4_plane_setup_clipping_and_scaling(state);
- if (ret)
-@@ -432,7 +518,19 @@ static int vc4_plane_mode_set(struct drm
- if (ret)
- return ret;
-
-- scl = vc4_get_scl_field(state);
-+ /* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
-+ * and 4:4:4, scl1 should be set to scl0 so both channels of
-+ * the scaler do the same thing. For YUV, the Y plane needs
-+ * to be put in channel 1 and Cb/Cr in channel 0, so we swap
-+ * the scl fields here.
-+ */
-+ if (num_planes == 1) {
-+ scl0 = vc4_get_scl_field(state, 1);
-+ scl1 = scl0;
-+ } else {
-+ scl0 = vc4_get_scl_field(state, 1);
-+ scl1 = vc4_get_scl_field(state, 0);
-+ }
-
- /* Control word */
- vc4_dlist_write(vc4_state,
-@@ -440,8 +538,8 @@ static int vc4_plane_mode_set(struct drm
- (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
- (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
- (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
-- VC4_SET_FIELD(scl, SCALER_CTL0_SCL0) |
-- VC4_SET_FIELD(scl, SCALER_CTL0_SCL1));
-+ VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) |
-+ VC4_SET_FIELD(scl1, SCALER_CTL0_SCL1));
-
- /* Position Word 0: Image Positions and Alpha Value */
- vc4_state->pos0_offset = vc4_state->dlist_count;
-@@ -466,35 +564,68 @@ static int vc4_plane_mode_set(struct drm
- SCALER_POS2_ALPHA_MODE_PIPELINE :
- SCALER_POS2_ALPHA_MODE_FIXED,
- SCALER_POS2_ALPHA_MODE) |
-- VC4_SET_FIELD(vc4_state->src_w, SCALER_POS2_WIDTH) |
-- VC4_SET_FIELD(vc4_state->src_h, SCALER_POS2_HEIGHT));
-+ VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) |
-+ VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT));
-
- /* Position Word 3: Context. Written by the HVS. */
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-
-- /* Pointer Word 0: RGB / Y Pointer */
-+
-+ /* Pointer Word 0/1/2: RGB / Y / Cb / Cr Pointers
-+ *
-+ * The pointers may be any byte address.
-+ */
- vc4_state->ptr0_offset = vc4_state->dlist_count;
-- vc4_dlist_write(vc4_state, bo->paddr + vc4_state->offset);
-+ if (!format->flip_cbcr) {
-+ for (i = 0; i < num_planes; i++)
-+ vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
-+ } else {
-+ WARN_ON_ONCE(num_planes != 3);
-+ vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
-+ vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
-+ vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
-+ }
-
-- /* Pointer Context Word 0: Written by the HVS */
-- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-+ /* Pointer Context Word 0/1/2: Written by the HVS */
-+ for (i = 0; i < num_planes; i++)
-+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
-
-- /* Pitch word 0: Pointer 0 Pitch */
-- vc4_dlist_write(vc4_state,
-- VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
-+ /* Pitch word 0/1/2 */
-+ for (i = 0; i < num_planes; i++) {
-+ vc4_dlist_write(vc4_state,
-+ VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH));
-+ }
-+
-+ /* Colorspace conversion words */
-+ if (vc4_state->is_yuv) {
-+ vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
-+ vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
-+ vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
-+ }
-
- if (!vc4_state->is_unity) {
- /* LBM Base Address. */
-- if (vc4_state->y_scaling != VC4_SCALING_NONE)
-+ if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
-+ vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
- vc4_dlist_write(vc4_state, vc4_state->lbm.start);
-+ }
-
-- vc4_write_scaling_parameters(state);
-+ if (num_planes > 1) {
-+ /* Emit Cb/Cr as channel 0 and Y as channel
-+ * 1. This matches how we set up scl0/scl1
-+ * above.
-+ */
-+ vc4_write_scaling_parameters(state, 1);
-+ }
-+ vc4_write_scaling_parameters(state, 0);
-
- /* If any PPF setup was done, then all the kernel
- * pointers get uploaded.
- */
-- if (vc4_state->x_scaling == VC4_SCALING_PPF ||
-- vc4_state->y_scaling == VC4_SCALING_PPF) {
-+ if (vc4_state->x_scaling[0] == VC4_SCALING_PPF ||
-+ vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
-+ vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
-+ vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
- u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
- SCALER_PPF_KERNEL_OFFSET);
-
-@@ -698,6 +829,7 @@ struct drm_plane *vc4_plane_init(struct
- struct drm_plane *plane = NULL;
- struct vc4_plane *vc4_plane;
- u32 formats[ARRAY_SIZE(hvs_formats)];
-+ u32 num_formats = 0;
- int ret = 0;
- unsigned i;
-
-@@ -708,12 +840,20 @@ struct drm_plane *vc4_plane_init(struct
- goto fail;
- }
-
-- for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
-- formats[i] = hvs_formats[i].drm;
-+ for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
-+ /* Don't allow YUV in cursor planes, since that means
-+ * tuning on the scaler, which we don't allow for the
-+ * cursor.
-+ */
-+ if (type != DRM_PLANE_TYPE_CURSOR ||
-+ hvs_formats[i].hvs < HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE) {
-+ formats[num_formats++] = hvs_formats[i].drm;
-+ }
-+ }
- plane = &vc4_plane->base;
- ret = drm_universal_plane_init(dev, plane, 0xff,
- &vc4_plane_funcs,
-- formats, ARRAY_SIZE(formats),
-+ formats, num_formats,
- type);
-
- drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -503,7 +503,12 @@ enum hvs_pixel_format {
- HVS_PIXEL_FORMAT_RGB888 = 5,
- HVS_PIXEL_FORMAT_RGBA6666 = 6,
- /* 32bpp */
-- HVS_PIXEL_FORMAT_RGBA8888 = 7
-+ HVS_PIXEL_FORMAT_RGBA8888 = 7,
-+
-+ HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE = 8,
-+ HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE = 9,
-+ HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE = 10,
-+ HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE = 11,
- };
-
- /* Note: the LSB is the rightmost character shown. Only valid for
-@@ -585,6 +590,55 @@ enum hvs_pixel_format {
- #define SCALER_POS2_WIDTH_MASK VC4_MASK(11, 0)
- #define SCALER_POS2_WIDTH_SHIFT 0
-
-+/* Color Space Conversion words. Some values are S2.8 signed
-+ * integers, except that the 2 integer bits map as {0x0: 0, 0x1: 1,
-+ * 0x2: 2, 0x3: -1}
-+ */
-+/* bottom 8 bits of S2.8 contribution of Cr to Blue */
-+#define SCALER_CSC0_COEF_CR_BLU_MASK VC4_MASK(31, 24)
-+#define SCALER_CSC0_COEF_CR_BLU_SHIFT 24
-+/* Signed offset to apply to Y before CSC. (Y' = Y + YY_OFS) */
-+#define SCALER_CSC0_COEF_YY_OFS_MASK VC4_MASK(23, 16)
-+#define SCALER_CSC0_COEF_YY_OFS_SHIFT 16
-+/* Signed offset to apply to CB before CSC (Cb' = Cb - 128 + CB_OFS). */
-+#define SCALER_CSC0_COEF_CB_OFS_MASK VC4_MASK(15, 8)
-+#define SCALER_CSC0_COEF_CB_OFS_SHIFT 8
-+/* Signed offset to apply to CB before CSC (Cr' = Cr - 128 + CR_OFS). */
-+#define SCALER_CSC0_COEF_CR_OFS_MASK VC4_MASK(7, 0)
-+#define SCALER_CSC0_COEF_CR_OFS_SHIFT 0
-+#define SCALER_CSC0_ITR_R_601_5 0x00f00000
-+#define SCALER_CSC0_ITR_R_709_3 0x00f00000
-+#define SCALER_CSC0_JPEG_JFIF 0x00000000
-+
-+/* S2.8 contribution of Cb to Green */
-+#define SCALER_CSC1_COEF_CB_GRN_MASK VC4_MASK(31, 22)
-+#define SCALER_CSC1_COEF_CB_GRN_SHIFT 22
-+/* S2.8 contribution of Cr to Green */
-+#define SCALER_CSC1_COEF_CR_GRN_MASK VC4_MASK(21, 12)
-+#define SCALER_CSC1_COEF_CR_GRN_SHIFT 12
-+/* S2.8 contribution of Y to all of RGB */
-+#define SCALER_CSC1_COEF_YY_ALL_MASK VC4_MASK(11, 2)
-+#define SCALER_CSC1_COEF_YY_ALL_SHIFT 2
-+/* top 2 bits of S2.8 contribution of Cr to Blue */
-+#define SCALER_CSC1_COEF_CR_BLU_MASK VC4_MASK(1, 0)
-+#define SCALER_CSC1_COEF_CR_BLU_SHIFT 0
-+#define SCALER_CSC1_ITR_R_601_5 0xe73304a8
-+#define SCALER_CSC1_ITR_R_709_3 0xf2b784a8
-+#define SCALER_CSC1_JPEG_JFIF 0xea34a400
-+
-+/* S2.8 contribution of Cb to Red */
-+#define SCALER_CSC2_COEF_CB_RED_MASK VC4_MASK(29, 20)
-+#define SCALER_CSC2_COEF_CB_RED_SHIFT 20
-+/* S2.8 contribution of Cr to Red */
-+#define SCALER_CSC2_COEF_CR_RED_MASK VC4_MASK(19, 10)
-+#define SCALER_CSC2_COEF_CR_RED_SHIFT 10
-+/* S2.8 contribution of Cb to Blue */
-+#define SCALER_CSC2_COEF_CB_BLU_MASK VC4_MASK(19, 10)
-+#define SCALER_CSC2_COEF_CB_BLU_SHIFT 10
-+#define SCALER_CSC2_ITR_R_601_5 0x00066204
-+#define SCALER_CSC2_ITR_R_709_3 0x00072a1c
-+#define SCALER_CSC2_JPEG_JFIF 0x000599c5
-+
- #define SCALER_TPZ0_VERT_RECALC BIT(31)
- #define SCALER_TPZ0_SCALE_MASK VC4_MASK(28, 8)
- #define SCALER_TPZ0_SCALE_SHIFT 8
--- /dev/null
+From aae3a606556af7e815414df480aa49e1e56d1bc1 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Feb 2016 14:15:14 -0800
+Subject: [PATCH 285/423] drm/vc4: Bring HDMI up from power off if necessary.
+
+If the firmware hadn't brought up HDMI for us, we need to do its
+power-on reset sequence (reset HD and and clear its STANDBY bits,
+reset HDMI, and leave the PHY disabled).
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 851479ad5927b7b1aa141ca9dedb897a7bce2b1d)
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 29 ++++++++++++++++++++++++++++-
+ drivers/gpu/drm/vc4/vc4_regs.h | 2 ++
+ 2 files changed, 30 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -497,6 +497,16 @@ static int vc4_hdmi_bind(struct device *
+ goto err_put_i2c;
+ }
+
++ /* This is the rate that is set by the firmware. The number
++ * needs to be a bit higher than the pixel clock rate
++ * (generally 148.5Mhz).
++ */
++ ret = clk_set_rate(hdmi->hsm_clock, 163682864);
++ if (ret) {
++ DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
++ goto err_unprepare_pix;
++ }
++
+ ret = clk_prepare_enable(hdmi->hsm_clock);
+ if (ret) {
+ DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n",
+@@ -518,7 +528,24 @@ static int vc4_hdmi_bind(struct device *
+ vc4->hdmi = hdmi;
+
+ /* HDMI core must be enabled. */
+- WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0);
++ if (!(HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE)) {
++ HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);
++ udelay(1);
++ HD_WRITE(VC4_HD_M_CTL, 0);
++
++ HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE);
++
++ HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL,
++ VC4_HDMI_SW_RESET_HDMI |
++ VC4_HDMI_SW_RESET_FORMAT_DETECT);
++
++ HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, 0);
++
++ /* PHY should be in reset, like
++ * vc4_hdmi_encoder_disable() does.
++ */
++ HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16);
++ }
+
+ drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs,
+ DRM_MODE_ENCODER_TMDS);
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -456,6 +456,8 @@
+ #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0
+
+ #define VC4_HD_M_CTL 0x00c
++# define VC4_HD_M_REGISTER_FILE_STANDBY (3 << 6)
++# define VC4_HD_M_RAM_STANDBY (3 << 4)
+ # define VC4_HD_M_SW_RST BIT(2)
+ # define VC4_HD_M_ENABLE BIT(0)
+
--- /dev/null
+From 6b4cbec225aa2ab85069aecfae8c328892cc7a3d Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Feb 2016 15:16:56 -0800
+Subject: [PATCH 286/423] drm/vc4: Add another reg to HDMI debug dumping.
+
+This is also involved in the HDMI setup sequence so it's nice to see
+it.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 936f1a53f32148cc6164fad7c9a26ebf144e5ffb)
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -95,6 +95,7 @@ static const struct {
+ HDMI_REG(VC4_HDMI_SW_RESET_CONTROL),
+ HDMI_REG(VC4_HDMI_HOTPLUG_INT),
+ HDMI_REG(VC4_HDMI_HOTPLUG),
++ HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG),
+ HDMI_REG(VC4_HDMI_HORZA),
+ HDMI_REG(VC4_HDMI_HORZB),
+ HDMI_REG(VC4_HDMI_FIFO_CTL),
+++ /dev/null
-From cc502edf8c0515a8b3c410d4bfda002a4db88e4f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 8 Feb 2016 11:19:14 -0800
-Subject: [PATCH 286/381] drm/vc4: Fix spurious GPU resets due to BO reuse.
-
-We were tracking the "where are the head pointers pointing" globally,
-so if another job reused the same BOs and execution was at the same
-point as last time we checked, we'd stop and trigger a reset even
-though the GPU had made progress.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit c4ce60dc30912df09b2438f1e5594eae1ef64d1e)
----
- drivers/gpu/drm/vc4/vc4_drv.h | 6 +++++-
- drivers/gpu/drm/vc4/vc4_gem.c | 19 ++++++++++++++-----
- 2 files changed, 19 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -93,7 +93,6 @@ struct vc4_dev {
- struct work_struct overflow_mem_work;
-
- struct {
-- uint32_t last_ct0ca, last_ct1ca;
- struct timer_list timer;
- struct work_struct reset_work;
- } hangcheck;
-@@ -203,6 +202,11 @@ struct vc4_exec_info {
- /* Sequence number for this bin/render job. */
- uint64_t seqno;
-
-+ /* Last current addresses the hardware was processing when the
-+ * hangcheck timer checked on us.
-+ */
-+ uint32_t last_ct0ca, last_ct1ca;
-+
- /* Kernel-space copy of the ioctl arguments */
- struct drm_vc4_submit_cl *args;
-
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -271,10 +271,17 @@ vc4_hangcheck_elapsed(unsigned long data
- struct drm_device *dev = (struct drm_device *)data;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- uint32_t ct0ca, ct1ca;
-+ unsigned long irqflags;
-+ struct vc4_exec_info *exec;
-+
-+ spin_lock_irqsave(&vc4->job_lock, irqflags);
-+ exec = vc4_first_job(vc4);
-
- /* If idle, we can stop watching for hangs. */
-- if (list_empty(&vc4->job_list))
-+ if (!exec) {
-+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- return;
-+ }
-
- ct0ca = V3D_READ(V3D_CTNCA(0));
- ct1ca = V3D_READ(V3D_CTNCA(1));
-@@ -282,14 +289,16 @@ vc4_hangcheck_elapsed(unsigned long data
- /* If we've made any progress in execution, rearm the timer
- * and wait.
- */
-- if (ct0ca != vc4->hangcheck.last_ct0ca ||
-- ct1ca != vc4->hangcheck.last_ct1ca) {
-- vc4->hangcheck.last_ct0ca = ct0ca;
-- vc4->hangcheck.last_ct1ca = ct1ca;
-+ if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {
-+ exec->last_ct0ca = ct0ca;
-+ exec->last_ct1ca = ct1ca;
-+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- vc4_queue_hangcheck(dev);
- return;
- }
-
-+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
-+
- /* We've gone too long with no progress, reset. This has to
- * be done from a work struct, since resetting can sleep and
- * this timer hook isn't allowed to.
+++ /dev/null
-From 73902ea67be85e6a5d440fed2c53e5364125c4e1 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 5 Feb 2016 15:06:15 -0800
-Subject: [PATCH 287/381] drm/vc4: Fix a framebuffer reference leak on async
- flip interrupt.
-
-We'd need X to queue up an async pageflip while another is
-outstanding, and then take a SIGIO. I think X actually avoids sending
-out the next pageflip while one's already queued, but I'm not sure.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 48627eb8dc55c60d35794105f6f79fb627347dbd)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -527,6 +527,7 @@ static int vc4_async_page_flip(struct dr
- /* Make sure all other async modesetes have landed. */
- ret = down_interruptible(&vc4->async_modeset);
- if (ret) {
-+ drm_framebuffer_unreference(fb);
- kfree(flip_state);
- return ret;
- }
--- /dev/null
+From 3793554fcc4a8aa0545f109b5e8413c3ba42b823 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 15 Feb 2016 17:06:02 -0800
+Subject: [PATCH 287/423] drm/vc4: Fix the name of the VSYNCD_EVEN register.
+
+It's used for delaying vsync in interlaced mode.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit c31806fbdda910d337b60896040afa708bdfa2bd)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
+ drivers/gpu/drm/vc4/vc4_regs.h | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -88,7 +88,7 @@ static const struct {
+ } crtc_regs[] = {
+ CRTC_REG(PV_CONTROL),
+ CRTC_REG(PV_V_CONTROL),
+- CRTC_REG(PV_VSYNCD),
++ CRTC_REG(PV_VSYNCD_EVEN),
+ CRTC_REG(PV_HORZA),
+ CRTC_REG(PV_HORZB),
+ CRTC_REG(PV_VERTA),
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -187,7 +187,7 @@
+ # define PV_VCONTROL_CONTINUOUS BIT(1)
+ # define PV_VCONTROL_VIDEN BIT(0)
+
+-#define PV_VSYNCD 0x08
++#define PV_VSYNCD_EVEN 0x08
+
+ #define PV_HORZA 0x0c
+ # define PV_HORZA_HBP_MASK VC4_MASK(31, 16)
+++ /dev/null
-From b90794bb85c90b4276fea302cf75251021134e7a Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Feb 2016 14:15:14 -0800
-Subject: [PATCH 288/381] drm/vc4: Bring HDMI up from power off if necessary.
-
-If the firmware hadn't brought up HDMI for us, we need to do its
-power-on reset sequence (reset HD and and clear its STANDBY bits,
-reset HDMI, and leave the PHY disabled).
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 851479ad5927b7b1aa141ca9dedb897a7bce2b1d)
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 29 ++++++++++++++++++++++++++++-
- drivers/gpu/drm/vc4/vc4_regs.h | 2 ++
- 2 files changed, 30 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -497,6 +497,16 @@ static int vc4_hdmi_bind(struct device *
- goto err_put_i2c;
- }
-
-+ /* This is the rate that is set by the firmware. The number
-+ * needs to be a bit higher than the pixel clock rate
-+ * (generally 148.5Mhz).
-+ */
-+ ret = clk_set_rate(hdmi->hsm_clock, 163682864);
-+ if (ret) {
-+ DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
-+ goto err_unprepare_pix;
-+ }
-+
- ret = clk_prepare_enable(hdmi->hsm_clock);
- if (ret) {
- DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n",
-@@ -518,7 +528,24 @@ static int vc4_hdmi_bind(struct device *
- vc4->hdmi = hdmi;
-
- /* HDMI core must be enabled. */
-- WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0);
-+ if (!(HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE)) {
-+ HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST);
-+ udelay(1);
-+ HD_WRITE(VC4_HD_M_CTL, 0);
-+
-+ HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE);
-+
-+ HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL,
-+ VC4_HDMI_SW_RESET_HDMI |
-+ VC4_HDMI_SW_RESET_FORMAT_DETECT);
-+
-+ HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, 0);
-+
-+ /* PHY should be in reset, like
-+ * vc4_hdmi_encoder_disable() does.
-+ */
-+ HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16);
-+ }
-
- drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs,
- DRM_MODE_ENCODER_TMDS);
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -456,6 +456,8 @@
- #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0
-
- #define VC4_HD_M_CTL 0x00c
-+# define VC4_HD_M_REGISTER_FILE_STANDBY (3 << 6)
-+# define VC4_HD_M_RAM_STANDBY (3 << 4)
- # define VC4_HD_M_SW_RST BIT(2)
- # define VC4_HD_M_ENABLE BIT(0)
-
--- /dev/null
+From aaf3c3ab336f0ff54be5b7eb4de5adca3cd2c05a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 15 Feb 2016 17:31:41 -0800
+Subject: [PATCH 288/423] drm/vc4: Fix setting of vertical timings in the CRTC.
+
+It looks like when I went to add the interlaced bits, I just took the
+existing PV_VERT* block and indented it, instead of copy and pasting
+it first. Without this, changing resolution never worked.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit a7c5047d1ce178dd2b1fa577fc8909ad663d56d5)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -217,6 +217,16 @@ static void vc4_crtc_mode_set_nofb(struc
+ PV_HORZB_HFP) |
+ VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE));
+
++ CRTC_WRITE(PV_VERTA,
++ VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
++ PV_VERTA_VBP) |
++ VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
++ PV_VERTA_VSYNC));
++ CRTC_WRITE(PV_VERTB,
++ VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
++ PV_VERTB_VFP) |
++ VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE));
++
+ if (interlace) {
+ CRTC_WRITE(PV_VERTA_EVEN,
+ VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1,
+++ /dev/null
-From 2f684276a677eb2133a9ec0c9fdc294a62a5d6dd Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Feb 2016 15:16:56 -0800
-Subject: [PATCH 289/381] drm/vc4: Add another reg to HDMI debug dumping.
-
-This is also involved in the HDMI setup sequence so it's nice to see
-it.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 936f1a53f32148cc6164fad7c9a26ebf144e5ffb)
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -95,6 +95,7 @@ static const struct {
- HDMI_REG(VC4_HDMI_SW_RESET_CONTROL),
- HDMI_REG(VC4_HDMI_HOTPLUG_INT),
- HDMI_REG(VC4_HDMI_HOTPLUG),
-+ HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG),
- HDMI_REG(VC4_HDMI_HORZA),
- HDMI_REG(VC4_HDMI_HORZB),
- HDMI_REG(VC4_HDMI_FIFO_CTL),
--- /dev/null
+From bf75b498fa8699b0b3230c33cc16a0633ff0e65c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 16 Feb 2016 10:24:08 -0800
+Subject: [PATCH 289/423] drm/vc4: Initialize scaler DISPBKGND on modeset.
+
+We weren't updating the interlaced bit, so we'd scan out incorrectly
+if the firmware had brought up the TV encoder and we were switching to
+HDMI.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 6a609209865247cc748e90158c99f374f79b494c)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 6 ++++++
+ drivers/gpu/drm/vc4/vc4_regs.h | 14 ++++++++++++++
+ 2 files changed, 20 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -188,6 +188,8 @@ static int vc4_get_clock_select(struct d
+
+ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
+ {
++ struct drm_device *dev = crtc->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+ struct drm_crtc_state *state = crtc->state;
+ struct drm_display_mode *mode = &state->adjusted_mode;
+@@ -256,6 +258,10 @@ static void vc4_crtc_mode_set_nofb(struc
+ PV_CONTROL_FIFO_CLR |
+ PV_CONTROL_EN);
+
++ HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
++ SCALER_DISPBKGND_AUTOHS |
++ (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
++
+ if (debug_dump_regs) {
+ DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc));
+ vc4_crtc_dump_regs(vc4_crtc);
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -350,6 +350,17 @@
+ # define SCALER_DISPCTRLX_HEIGHT_SHIFT 0
+
+ #define SCALER_DISPBKGND0 0x00000044
++# define SCALER_DISPBKGND_AUTOHS BIT(31)
++# define SCALER_DISPBKGND_INTERLACE BIT(30)
++# define SCALER_DISPBKGND_GAMMA BIT(29)
++# define SCALER_DISPBKGND_TESTMODE_MASK VC4_MASK(28, 25)
++# define SCALER_DISPBKGND_TESTMODE_SHIFT 25
++/* Enables filling the scaler line with the RGB value in the low 24
++ * bits before compositing. Costs cycles, so should be skipped if
++ * opaque display planes will cover everything.
++ */
++# define SCALER_DISPBKGND_FILL BIT(24)
++
+ #define SCALER_DISPSTAT0 0x00000048
+ #define SCALER_DISPBASE0 0x0000004c
+ # define SCALER_DISPSTATX_MODE_MASK VC4_MASK(31, 30)
+@@ -362,6 +373,9 @@
+ # define SCALER_DISPSTATX_EMPTY BIT(28)
+ #define SCALER_DISPCTRL1 0x00000050
+ #define SCALER_DISPBKGND1 0x00000054
++#define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \
++ (x) * (SCALER_DISPBKGND1 - \
++ SCALER_DISPBKGND0))
+ #define SCALER_DISPSTAT1 0x00000058
+ #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \
+ (x) * (SCALER_DISPSTAT1 - \
+++ /dev/null
-From 659c32d3344952ef9c49a18d512318e5dca9eff3 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 15 Feb 2016 17:06:02 -0800
-Subject: [PATCH 290/381] drm/vc4: Fix the name of the VSYNCD_EVEN register.
-
-It's used for delaying vsync in interlaced mode.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit c31806fbdda910d337b60896040afa708bdfa2bd)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
- drivers/gpu/drm/vc4/vc4_regs.h | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -88,7 +88,7 @@ static const struct {
- } crtc_regs[] = {
- CRTC_REG(PV_CONTROL),
- CRTC_REG(PV_V_CONTROL),
-- CRTC_REG(PV_VSYNCD),
-+ CRTC_REG(PV_VSYNCD_EVEN),
- CRTC_REG(PV_HORZA),
- CRTC_REG(PV_HORZB),
- CRTC_REG(PV_VERTA),
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -187,7 +187,7 @@
- # define PV_VCONTROL_CONTINUOUS BIT(1)
- # define PV_VCONTROL_VIDEN BIT(0)
-
--#define PV_VSYNCD 0x08
-+#define PV_VSYNCD_EVEN 0x08
-
- #define PV_HORZA 0x0c
- # define PV_HORZA_HBP_MASK VC4_MASK(31, 16)
--- /dev/null
+From 346367864363fa323ee502d9e8fb36b964cbbdb0 Mon Sep 17 00:00:00 2001
+From: Varad Gautam <varadgautam@gmail.com>
+Date: Wed, 17 Feb 2016 19:08:21 +0530
+Subject: [PATCH 290/423] drm/vc4: improve throughput by pipelining binning and
+ rendering jobs
+
+The hardware provides us with separate threads for binning and
+rendering, and the existing model waits for them both to complete
+before submitting the next job.
+
+Splitting the binning and rendering submissions reduces idle time and
+gives us approx 20-30% speedup with some x11perf tests such as -line10
+and -tilerect1. Improves openarena performance by 1.01897% +/-
+0.247857% (n=16).
+
+Thanks to anholt for suggesting this.
+
+v2: Rebase on the spurious resets fix (change by anholt).
+
+Signed-off-by: Varad Gautam <varadgautam@gmail.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit ca26d28bbaa39f31d5e7e4812603b015c8d54207)
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 37 +++++++++----
+ drivers/gpu/drm/vc4/vc4_gem.c | 123 ++++++++++++++++++++++++++++++------------
+ drivers/gpu/drm/vc4/vc4_irq.c | 58 ++++++++++++++++----
+ 3 files changed, 166 insertions(+), 52 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -53,7 +53,7 @@ struct vc4_dev {
+ /* Protects bo_cache and the BO stats. */
+ struct mutex bo_lock;
+
+- /* Sequence number for the last job queued in job_list.
++ /* Sequence number for the last job queued in bin_job_list.
+ * Starts at 0 (no jobs emitted).
+ */
+ uint64_t emit_seqno;
+@@ -63,11 +63,19 @@ struct vc4_dev {
+ */
+ uint64_t finished_seqno;
+
+- /* List of all struct vc4_exec_info for jobs to be executed.
+- * The first job in the list is the one currently programmed
+- * into ct0ca/ct1ca for execution.
++ /* List of all struct vc4_exec_info for jobs to be executed in
++ * the binner. The first job in the list is the one currently
++ * programmed into ct0ca for execution.
++ */
++ struct list_head bin_job_list;
++
++ /* List of all struct vc4_exec_info for jobs that have
++ * completed binning and are ready for rendering. The first
++ * job in the list is the one currently programmed into ct1ca
++ * for execution.
+ */
+- struct list_head job_list;
++ struct list_head render_job_list;
++
+ /* List of the finished vc4_exec_infos waiting to be freed by
+ * job_done_work.
+ */
+@@ -291,11 +299,20 @@ struct vc4_exec_info {
+ };
+
+ static inline struct vc4_exec_info *
+-vc4_first_job(struct vc4_dev *vc4)
++vc4_first_bin_job(struct vc4_dev *vc4)
++{
++ if (list_empty(&vc4->bin_job_list))
++ return NULL;
++ return list_first_entry(&vc4->bin_job_list, struct vc4_exec_info, head);
++}
++
++static inline struct vc4_exec_info *
++vc4_first_render_job(struct vc4_dev *vc4)
+ {
+- if (list_empty(&vc4->job_list))
++ if (list_empty(&vc4->render_job_list))
+ return NULL;
+- return list_first_entry(&vc4->job_list, struct vc4_exec_info, head);
++ return list_first_entry(&vc4->render_job_list,
++ struct vc4_exec_info, head);
+ }
+
+ /**
+@@ -410,7 +427,9 @@ int vc4_wait_seqno_ioctl(struct drm_devi
+ struct drm_file *file_priv);
+ int vc4_wait_bo_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
+-void vc4_submit_next_job(struct drm_device *dev);
++void vc4_submit_next_bin_job(struct drm_device *dev);
++void vc4_submit_next_render_job(struct drm_device *dev);
++void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec);
+ int vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno,
+ uint64_t timeout_ns, bool interruptible);
+ void vc4_job_handle_completed(struct vc4_dev *vc4);
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -154,10 +154,10 @@ vc4_save_hang_state(struct drm_device *d
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct drm_vc4_get_hang_state *state;
+ struct vc4_hang_state *kernel_state;
+- struct vc4_exec_info *exec;
++ struct vc4_exec_info *exec[2];
+ struct vc4_bo *bo;
+ unsigned long irqflags;
+- unsigned int i, unref_list_count;
++ unsigned int i, j, unref_list_count, prev_idx;
+
+ kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL);
+ if (!kernel_state)
+@@ -166,37 +166,55 @@ vc4_save_hang_state(struct drm_device *d
+ state = &kernel_state->user_state;
+
+ spin_lock_irqsave(&vc4->job_lock, irqflags);
+- exec = vc4_first_job(vc4);
+- if (!exec) {
++ exec[0] = vc4_first_bin_job(vc4);
++ exec[1] = vc4_first_render_job(vc4);
++ if (!exec[0] && !exec[1]) {
+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ return;
+ }
+
+- unref_list_count = 0;
+- list_for_each_entry(bo, &exec->unref_list, unref_head)
+- unref_list_count++;
+-
+- state->bo_count = exec->bo_count + unref_list_count;
+- kernel_state->bo = kcalloc(state->bo_count, sizeof(*kernel_state->bo),
+- GFP_ATOMIC);
++ /* Get the bos from both binner and renderer into hang state. */
++ state->bo_count = 0;
++ for (i = 0; i < 2; i++) {
++ if (!exec[i])
++ continue;
++
++ unref_list_count = 0;
++ list_for_each_entry(bo, &exec[i]->unref_list, unref_head)
++ unref_list_count++;
++ state->bo_count += exec[i]->bo_count + unref_list_count;
++ }
++
++ kernel_state->bo = kcalloc(state->bo_count,
++ sizeof(*kernel_state->bo), GFP_ATOMIC);
++
+ if (!kernel_state->bo) {
+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ return;
+ }
+
+- for (i = 0; i < exec->bo_count; i++) {
+- drm_gem_object_reference(&exec->bo[i]->base);
+- kernel_state->bo[i] = &exec->bo[i]->base;
+- }
++ prev_idx = 0;
++ for (i = 0; i < 2; i++) {
++ if (!exec[i])
++ continue;
++
++ for (j = 0; j < exec[i]->bo_count; j++) {
++ drm_gem_object_reference(&exec[i]->bo[j]->base);
++ kernel_state->bo[j + prev_idx] = &exec[i]->bo[j]->base;
++ }
+
+- list_for_each_entry(bo, &exec->unref_list, unref_head) {
+- drm_gem_object_reference(&bo->base.base);
+- kernel_state->bo[i] = &bo->base.base;
+- i++;
++ list_for_each_entry(bo, &exec[i]->unref_list, unref_head) {
++ drm_gem_object_reference(&bo->base.base);
++ kernel_state->bo[j + prev_idx] = &bo->base.base;
++ j++;
++ }
++ prev_idx = j + 1;
+ }
+
+- state->start_bin = exec->ct0ca;
+- state->start_render = exec->ct1ca;
++ if (exec[0])
++ state->start_bin = exec[0]->ct0ca;
++ if (exec[1])
++ state->start_render = exec[1]->ct1ca;
+
+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+
+@@ -272,13 +290,15 @@ vc4_hangcheck_elapsed(unsigned long data
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ uint32_t ct0ca, ct1ca;
+ unsigned long irqflags;
+- struct vc4_exec_info *exec;
++ struct vc4_exec_info *bin_exec, *render_exec;
+
+ spin_lock_irqsave(&vc4->job_lock, irqflags);
+- exec = vc4_first_job(vc4);
++
++ bin_exec = vc4_first_bin_job(vc4);
++ render_exec = vc4_first_render_job(vc4);
+
+ /* If idle, we can stop watching for hangs. */
+- if (!exec) {
++ if (!bin_exec && !render_exec) {
+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ return;
+ }
+@@ -289,9 +309,12 @@ vc4_hangcheck_elapsed(unsigned long data
+ /* If we've made any progress in execution, rearm the timer
+ * and wait.
+ */
+- if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {
+- exec->last_ct0ca = ct0ca;
+- exec->last_ct1ca = ct1ca;
++ if ((bin_exec && ct0ca != bin_exec->last_ct0ca) ||
++ (render_exec && ct1ca != render_exec->last_ct1ca)) {
++ if (bin_exec)
++ bin_exec->last_ct0ca = ct0ca;
++ if (render_exec)
++ render_exec->last_ct1ca = ct1ca;
+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ vc4_queue_hangcheck(dev);
+ return;
+@@ -391,11 +414,13 @@ vc4_flush_caches(struct drm_device *dev)
+ * The job_lock should be held during this.
+ */
+ void
+-vc4_submit_next_job(struct drm_device *dev)
++vc4_submit_next_bin_job(struct drm_device *dev)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+- struct vc4_exec_info *exec = vc4_first_job(vc4);
++ struct vc4_exec_info *exec;
+
++again:
++ exec = vc4_first_bin_job(vc4);
+ if (!exec)
+ return;
+
+@@ -405,11 +430,40 @@ vc4_submit_next_job(struct drm_device *d
+ V3D_WRITE(V3D_BPOA, 0);
+ V3D_WRITE(V3D_BPOS, 0);
+
+- if (exec->ct0ca != exec->ct0ea)
++ /* Either put the job in the binner if it uses the binner, or
++ * immediately move it to the to-be-rendered queue.
++ */
++ if (exec->ct0ca != exec->ct0ea) {
+ submit_cl(dev, 0, exec->ct0ca, exec->ct0ea);
++ } else {
++ vc4_move_job_to_render(dev, exec);
++ goto again;
++ }
++}
++
++void
++vc4_submit_next_render_job(struct drm_device *dev)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_exec_info *exec = vc4_first_render_job(vc4);
++
++ if (!exec)
++ return;
++
+ submit_cl(dev, 1, exec->ct1ca, exec->ct1ea);
+ }
+
++void
++vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ bool was_empty = list_empty(&vc4->render_job_list);
++
++ list_move_tail(&exec->head, &vc4->render_job_list);
++ if (was_empty)
++ vc4_submit_next_render_job(dev);
++}
++
+ static void
+ vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t seqno)
+ {
+@@ -448,14 +502,14 @@ vc4_queue_submit(struct drm_device *dev,
+ exec->seqno = seqno;
+ vc4_update_bo_seqnos(exec, seqno);
+
+- list_add_tail(&exec->head, &vc4->job_list);
++ list_add_tail(&exec->head, &vc4->bin_job_list);
+
+ /* If no job was executing, kick ours off. Otherwise, it'll
+- * get started when the previous job's frame done interrupt
++ * get started when the previous job's flush done interrupt
+ * occurs.
+ */
+- if (vc4_first_job(vc4) == exec) {
+- vc4_submit_next_job(dev);
++ if (vc4_first_bin_job(vc4) == exec) {
++ vc4_submit_next_bin_job(dev);
+ vc4_queue_hangcheck(dev);
+ }
+
+@@ -849,7 +903,8 @@ vc4_gem_init(struct drm_device *dev)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
+- INIT_LIST_HEAD(&vc4->job_list);
++ INIT_LIST_HEAD(&vc4->bin_job_list);
++ INIT_LIST_HEAD(&vc4->render_job_list);
+ INIT_LIST_HEAD(&vc4->job_done_list);
+ INIT_LIST_HEAD(&vc4->seqno_cb_list);
+ spin_lock_init(&vc4->job_lock);
+--- a/drivers/gpu/drm/vc4/vc4_irq.c
++++ b/drivers/gpu/drm/vc4/vc4_irq.c
+@@ -30,6 +30,10 @@
+ * disables that specific interrupt, and 0s written are ignored
+ * (reading either one returns the set of enabled interrupts).
+ *
++ * When we take a binning flush done interrupt, we need to submit the
++ * next frame for binning and move the finished frame to the render
++ * thread.
++ *
+ * When we take a render frame interrupt, we need to wake the
+ * processes waiting for some frame to be done, and get the next frame
+ * submitted ASAP (so the hardware doesn't sit idle when there's work
+@@ -44,6 +48,7 @@
+ #include "vc4_regs.h"
+
+ #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \
++ V3D_INT_FLDONE | \
+ V3D_INT_FRDONE)
+
+ DECLARE_WAIT_QUEUE_HEAD(render_wait);
+@@ -77,7 +82,7 @@ vc4_overflow_mem_work(struct work_struct
+ unsigned long irqflags;
+
+ spin_lock_irqsave(&vc4->job_lock, irqflags);
+- current_exec = vc4_first_job(vc4);
++ current_exec = vc4_first_bin_job(vc4);
+ if (current_exec) {
+ vc4->overflow_mem->seqno = vc4->finished_seqno + 1;
+ list_add_tail(&vc4->overflow_mem->unref_head,
+@@ -98,17 +103,43 @@ vc4_overflow_mem_work(struct work_struct
+ }
+
+ static void
+-vc4_irq_finish_job(struct drm_device *dev)
++vc4_irq_finish_bin_job(struct drm_device *dev)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
++
++ if (!exec)
++ return;
++
++ vc4_move_job_to_render(dev, exec);
++ vc4_submit_next_bin_job(dev);
++}
++
++static void
++vc4_cancel_bin_job(struct drm_device *dev)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
++
++ if (!exec)
++ return;
++
++ list_move_tail(&exec->head, &vc4->bin_job_list);
++ vc4_submit_next_bin_job(dev);
++}
++
++static void
++vc4_irq_finish_render_job(struct drm_device *dev)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+- struct vc4_exec_info *exec = vc4_first_job(vc4);
++ struct vc4_exec_info *exec = vc4_first_render_job(vc4);
+
+ if (!exec)
+ return;
+
+ vc4->finished_seqno++;
+ list_move_tail(&exec->head, &vc4->job_done_list);
+- vc4_submit_next_job(dev);
++ vc4_submit_next_render_job(dev);
+
+ wake_up_all(&vc4->job_wait_queue);
+ schedule_work(&vc4->job_done_work);
+@@ -125,9 +156,10 @@ vc4_irq(int irq, void *arg)
+ barrier();
+ intctl = V3D_READ(V3D_INTCTL);
+
+- /* Acknowledge the interrupts we're handling here. The render
+- * frame done interrupt will be cleared, while OUTOMEM will
+- * stay high until the underlying cause is cleared.
++ /* Acknowledge the interrupts we're handling here. The binner
++ * last flush / render frame done interrupt will be cleared,
++ * while OUTOMEM will stay high until the underlying cause is
++ * cleared.
+ */
+ V3D_WRITE(V3D_INTCTL, intctl);
+
+@@ -138,9 +170,16 @@ vc4_irq(int irq, void *arg)
+ status = IRQ_HANDLED;
+ }
+
++ if (intctl & V3D_INT_FLDONE) {
++ spin_lock(&vc4->job_lock);
++ vc4_irq_finish_bin_job(dev);
++ spin_unlock(&vc4->job_lock);
++ status = IRQ_HANDLED;
++ }
++
+ if (intctl & V3D_INT_FRDONE) {
+ spin_lock(&vc4->job_lock);
+- vc4_irq_finish_job(dev);
++ vc4_irq_finish_render_job(dev);
+ spin_unlock(&vc4->job_lock);
+ status = IRQ_HANDLED;
+ }
+@@ -205,6 +244,7 @@ void vc4_irq_reset(struct drm_device *de
+ V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS);
+
+ spin_lock_irqsave(&vc4->job_lock, irqflags);
+- vc4_irq_finish_job(dev);
++ vc4_cancel_bin_job(dev);
++ vc4_irq_finish_render_job(dev);
+ spin_unlock_irqrestore(&vc4->job_lock, irqflags);
+ }
+++ /dev/null
-From c6f8dd873098c2c41e97606d55b806a8c5965b3e Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 15 Feb 2016 17:31:41 -0800
-Subject: [PATCH 291/381] drm/vc4: Fix setting of vertical timings in the CRTC.
-
-It looks like when I went to add the interlaced bits, I just took the
-existing PV_VERT* block and indented it, instead of copy and pasting
-it first. Without this, changing resolution never worked.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit a7c5047d1ce178dd2b1fa577fc8909ad663d56d5)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -217,6 +217,16 @@ static void vc4_crtc_mode_set_nofb(struc
- PV_HORZB_HFP) |
- VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE));
-
-+ CRTC_WRITE(PV_VERTA,
-+ VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
-+ PV_VERTA_VBP) |
-+ VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
-+ PV_VERTA_VSYNC));
-+ CRTC_WRITE(PV_VERTB,
-+ VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
-+ PV_VERTB_VFP) |
-+ VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE));
-+
- if (interlace) {
- CRTC_WRITE(PV_VERTA_EVEN,
- VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1,
--- /dev/null
+From 52a8cd7d35e6c8860c2449e04ae305a3cdc671f1 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 29 Feb 2016 17:53:00 -0800
+Subject: [PATCH 291/423] drm/vc4: Let gpiolib know that we're OK with sleeping
+ for HPD.
+
+Fixes an error thrown every few seconds when we poll HPD when it's on
+a I2C to GPIO expander.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Tested-by: Daniel Stone <daniels@collabora.com>
+(cherry picked from commit 0e60eab57557bc06bb3a5ef8d5d6dcd9ddd47aff)
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -168,7 +168,7 @@ vc4_hdmi_connector_detect(struct drm_con
+ return connector_status_connected;
+
+ if (vc4->hdmi->hpd_gpio) {
+- if (gpio_get_value(vc4->hdmi->hpd_gpio))
++ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio))
+ return connector_status_connected;
+ else
+ return connector_status_disconnected;
+++ /dev/null
-From b7c76f75bc8e373d185a222bf7fa0ceb5f9d6d0a Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 16 Feb 2016 10:24:08 -0800
-Subject: [PATCH 292/381] drm/vc4: Initialize scaler DISPBKGND on modeset.
-
-We weren't updating the interlaced bit, so we'd scan out incorrectly
-if the firmware had brought up the TV encoder and we were switching to
-HDMI.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 6a609209865247cc748e90158c99f374f79b494c)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 6 ++++++
- drivers/gpu/drm/vc4/vc4_regs.h | 14 ++++++++++++++
- 2 files changed, 20 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -188,6 +188,8 @@ static int vc4_get_clock_select(struct d
-
- static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
- {
-+ struct drm_device *dev = crtc->dev;
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
- struct drm_crtc_state *state = crtc->state;
- struct drm_display_mode *mode = &state->adjusted_mode;
-@@ -256,6 +258,10 @@ static void vc4_crtc_mode_set_nofb(struc
- PV_CONTROL_FIFO_CLR |
- PV_CONTROL_EN);
-
-+ HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
-+ SCALER_DISPBKGND_AUTOHS |
-+ (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
-+
- if (debug_dump_regs) {
- DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc));
- vc4_crtc_dump_regs(vc4_crtc);
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -350,6 +350,17 @@
- # define SCALER_DISPCTRLX_HEIGHT_SHIFT 0
-
- #define SCALER_DISPBKGND0 0x00000044
-+# define SCALER_DISPBKGND_AUTOHS BIT(31)
-+# define SCALER_DISPBKGND_INTERLACE BIT(30)
-+# define SCALER_DISPBKGND_GAMMA BIT(29)
-+# define SCALER_DISPBKGND_TESTMODE_MASK VC4_MASK(28, 25)
-+# define SCALER_DISPBKGND_TESTMODE_SHIFT 25
-+/* Enables filling the scaler line with the RGB value in the low 24
-+ * bits before compositing. Costs cycles, so should be skipped if
-+ * opaque display planes will cover everything.
-+ */
-+# define SCALER_DISPBKGND_FILL BIT(24)
-+
- #define SCALER_DISPSTAT0 0x00000048
- #define SCALER_DISPBASE0 0x0000004c
- # define SCALER_DISPSTATX_MODE_MASK VC4_MASK(31, 30)
-@@ -362,6 +373,9 @@
- # define SCALER_DISPSTATX_EMPTY BIT(28)
- #define SCALER_DISPCTRL1 0x00000050
- #define SCALER_DISPBKGND1 0x00000054
-+#define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \
-+ (x) * (SCALER_DISPBKGND1 - \
-+ SCALER_DISPBKGND0))
- #define SCALER_DISPSTAT1 0x00000058
- #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \
- (x) * (SCALER_DISPSTAT1 - \
--- /dev/null
+From dd556129599f962e6da90bcd1150d8604979ceee Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 29 Feb 2016 17:53:01 -0800
+Subject: [PATCH 292/423] drm/vc4: Respect GPIO_ACTIVE_LOW on HDMI HPD if set
+ in the devicetree.
+
+The original Raspberry Pi had the GPIO active high, but the later
+models are active low. The DT GPIO bindings allow specifying the
+active flag, except that it doesn't get propagated to the gpiodesc, so
+you have to handle it yourself.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Tested-by: Daniel Stone <daniels@collabora.com>
+(cherry picked from commit 0b06e0a7945130e6a187f7959529cba7725f573a)
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++++++--
+ 1 file changed, 10 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -47,6 +47,7 @@ struct vc4_hdmi {
+ void __iomem *hdmicore_regs;
+ void __iomem *hd_regs;
+ int hpd_gpio;
++ bool hpd_active_low;
+
+ struct clk *pixel_clock;
+ struct clk *hsm_clock;
+@@ -168,7 +169,8 @@ vc4_hdmi_connector_detect(struct drm_con
+ return connector_status_connected;
+
+ if (vc4->hdmi->hpd_gpio) {
+- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio))
++ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
++ vc4->hdmi->hpd_active_low)
+ return connector_status_connected;
+ else
+ return connector_status_disconnected;
+@@ -519,11 +521,17 @@ static int vc4_hdmi_bind(struct device *
+ * we'll use the HDMI core's register.
+ */
+ if (of_find_property(dev->of_node, "hpd-gpios", &value)) {
+- hdmi->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0);
++ enum of_gpio_flags hpd_gpio_flags;
++
++ hdmi->hpd_gpio = of_get_named_gpio_flags(dev->of_node,
++ "hpd-gpios", 0,
++ &hpd_gpio_flags);
+ if (hdmi->hpd_gpio < 0) {
+ ret = hdmi->hpd_gpio;
+ goto err_unprepare_hsm;
+ }
++
++ hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;
+ }
+
+ vc4->hdmi = hdmi;
--- /dev/null
+From deb04405c9c7362840387414fcf33f01d056c697 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Tue, 8 Mar 2016 15:09:41 +0300
+Subject: [PATCH 293/423] drm/vc4: Return -EFAULT on copy_from_user() failure
+
+The copy_from_user() function returns the number of bytes not copied but
+we want to return a negative error code.
+
+Fixes: 463873d57014 ('drm/vc4: Add an API for creating GPU shaders in GEM BOs.')
+Cc: stable@vger.kernel.org
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 585cb132a48190b554aecda2ebc3e2911fcbb665)
+---
+ drivers/gpu/drm/vc4/vc4_bo.c | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_bo.c
++++ b/drivers/gpu/drm/vc4/vc4_bo.c
+@@ -519,11 +519,12 @@ vc4_create_shader_bo_ioctl(struct drm_de
+ if (IS_ERR(bo))
+ return PTR_ERR(bo);
+
+- ret = copy_from_user(bo->base.vaddr,
++ if (copy_from_user(bo->base.vaddr,
+ (void __user *)(uintptr_t)args->data,
+- args->size);
+- if (ret != 0)
++ args->size)) {
++ ret = -EFAULT;
+ goto fail;
++ }
+ /* Clear the rest of the memory from allocating from the BO
+ * cache.
+ */
+++ /dev/null
-From 9e72968ae5f2e27c4f1d2b90337aa2d27c06cae4 Mon Sep 17 00:00:00 2001
-From: Varad Gautam <varadgautam@gmail.com>
-Date: Wed, 17 Feb 2016 19:08:21 +0530
-Subject: [PATCH 293/381] drm/vc4: improve throughput by pipelining binning and
- rendering jobs
-
-The hardware provides us with separate threads for binning and
-rendering, and the existing model waits for them both to complete
-before submitting the next job.
-
-Splitting the binning and rendering submissions reduces idle time and
-gives us approx 20-30% speedup with some x11perf tests such as -line10
-and -tilerect1. Improves openarena performance by 1.01897% +/-
-0.247857% (n=16).
-
-Thanks to anholt for suggesting this.
-
-v2: Rebase on the spurious resets fix (change by anholt).
-
-Signed-off-by: Varad Gautam <varadgautam@gmail.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit ca26d28bbaa39f31d5e7e4812603b015c8d54207)
----
- drivers/gpu/drm/vc4/vc4_drv.h | 37 +++++++++----
- drivers/gpu/drm/vc4/vc4_gem.c | 123 ++++++++++++++++++++++++++++++------------
- drivers/gpu/drm/vc4/vc4_irq.c | 58 ++++++++++++++++----
- 3 files changed, 166 insertions(+), 52 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -53,7 +53,7 @@ struct vc4_dev {
- /* Protects bo_cache and the BO stats. */
- struct mutex bo_lock;
-
-- /* Sequence number for the last job queued in job_list.
-+ /* Sequence number for the last job queued in bin_job_list.
- * Starts at 0 (no jobs emitted).
- */
- uint64_t emit_seqno;
-@@ -63,11 +63,19 @@ struct vc4_dev {
- */
- uint64_t finished_seqno;
-
-- /* List of all struct vc4_exec_info for jobs to be executed.
-- * The first job in the list is the one currently programmed
-- * into ct0ca/ct1ca for execution.
-+ /* List of all struct vc4_exec_info for jobs to be executed in
-+ * the binner. The first job in the list is the one currently
-+ * programmed into ct0ca for execution.
-+ */
-+ struct list_head bin_job_list;
-+
-+ /* List of all struct vc4_exec_info for jobs that have
-+ * completed binning and are ready for rendering. The first
-+ * job in the list is the one currently programmed into ct1ca
-+ * for execution.
- */
-- struct list_head job_list;
-+ struct list_head render_job_list;
-+
- /* List of the finished vc4_exec_infos waiting to be freed by
- * job_done_work.
- */
-@@ -291,11 +299,20 @@ struct vc4_exec_info {
- };
-
- static inline struct vc4_exec_info *
--vc4_first_job(struct vc4_dev *vc4)
-+vc4_first_bin_job(struct vc4_dev *vc4)
-+{
-+ if (list_empty(&vc4->bin_job_list))
-+ return NULL;
-+ return list_first_entry(&vc4->bin_job_list, struct vc4_exec_info, head);
-+}
-+
-+static inline struct vc4_exec_info *
-+vc4_first_render_job(struct vc4_dev *vc4)
- {
-- if (list_empty(&vc4->job_list))
-+ if (list_empty(&vc4->render_job_list))
- return NULL;
-- return list_first_entry(&vc4->job_list, struct vc4_exec_info, head);
-+ return list_first_entry(&vc4->render_job_list,
-+ struct vc4_exec_info, head);
- }
-
- /**
-@@ -410,7 +427,9 @@ int vc4_wait_seqno_ioctl(struct drm_devi
- struct drm_file *file_priv);
- int vc4_wait_bo_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
--void vc4_submit_next_job(struct drm_device *dev);
-+void vc4_submit_next_bin_job(struct drm_device *dev);
-+void vc4_submit_next_render_job(struct drm_device *dev);
-+void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec);
- int vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno,
- uint64_t timeout_ns, bool interruptible);
- void vc4_job_handle_completed(struct vc4_dev *vc4);
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -154,10 +154,10 @@ vc4_save_hang_state(struct drm_device *d
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct drm_vc4_get_hang_state *state;
- struct vc4_hang_state *kernel_state;
-- struct vc4_exec_info *exec;
-+ struct vc4_exec_info *exec[2];
- struct vc4_bo *bo;
- unsigned long irqflags;
-- unsigned int i, unref_list_count;
-+ unsigned int i, j, unref_list_count, prev_idx;
-
- kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL);
- if (!kernel_state)
-@@ -166,37 +166,55 @@ vc4_save_hang_state(struct drm_device *d
- state = &kernel_state->user_state;
-
- spin_lock_irqsave(&vc4->job_lock, irqflags);
-- exec = vc4_first_job(vc4);
-- if (!exec) {
-+ exec[0] = vc4_first_bin_job(vc4);
-+ exec[1] = vc4_first_render_job(vc4);
-+ if (!exec[0] && !exec[1]) {
- spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- return;
- }
-
-- unref_list_count = 0;
-- list_for_each_entry(bo, &exec->unref_list, unref_head)
-- unref_list_count++;
--
-- state->bo_count = exec->bo_count + unref_list_count;
-- kernel_state->bo = kcalloc(state->bo_count, sizeof(*kernel_state->bo),
-- GFP_ATOMIC);
-+ /* Get the bos from both binner and renderer into hang state. */
-+ state->bo_count = 0;
-+ for (i = 0; i < 2; i++) {
-+ if (!exec[i])
-+ continue;
-+
-+ unref_list_count = 0;
-+ list_for_each_entry(bo, &exec[i]->unref_list, unref_head)
-+ unref_list_count++;
-+ state->bo_count += exec[i]->bo_count + unref_list_count;
-+ }
-+
-+ kernel_state->bo = kcalloc(state->bo_count,
-+ sizeof(*kernel_state->bo), GFP_ATOMIC);
-+
- if (!kernel_state->bo) {
- spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- return;
- }
-
-- for (i = 0; i < exec->bo_count; i++) {
-- drm_gem_object_reference(&exec->bo[i]->base);
-- kernel_state->bo[i] = &exec->bo[i]->base;
-- }
-+ prev_idx = 0;
-+ for (i = 0; i < 2; i++) {
-+ if (!exec[i])
-+ continue;
-+
-+ for (j = 0; j < exec[i]->bo_count; j++) {
-+ drm_gem_object_reference(&exec[i]->bo[j]->base);
-+ kernel_state->bo[j + prev_idx] = &exec[i]->bo[j]->base;
-+ }
-
-- list_for_each_entry(bo, &exec->unref_list, unref_head) {
-- drm_gem_object_reference(&bo->base.base);
-- kernel_state->bo[i] = &bo->base.base;
-- i++;
-+ list_for_each_entry(bo, &exec[i]->unref_list, unref_head) {
-+ drm_gem_object_reference(&bo->base.base);
-+ kernel_state->bo[j + prev_idx] = &bo->base.base;
-+ j++;
-+ }
-+ prev_idx = j + 1;
- }
-
-- state->start_bin = exec->ct0ca;
-- state->start_render = exec->ct1ca;
-+ if (exec[0])
-+ state->start_bin = exec[0]->ct0ca;
-+ if (exec[1])
-+ state->start_render = exec[1]->ct1ca;
-
- spin_unlock_irqrestore(&vc4->job_lock, irqflags);
-
-@@ -272,13 +290,15 @@ vc4_hangcheck_elapsed(unsigned long data
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- uint32_t ct0ca, ct1ca;
- unsigned long irqflags;
-- struct vc4_exec_info *exec;
-+ struct vc4_exec_info *bin_exec, *render_exec;
-
- spin_lock_irqsave(&vc4->job_lock, irqflags);
-- exec = vc4_first_job(vc4);
-+
-+ bin_exec = vc4_first_bin_job(vc4);
-+ render_exec = vc4_first_render_job(vc4);
-
- /* If idle, we can stop watching for hangs. */
-- if (!exec) {
-+ if (!bin_exec && !render_exec) {
- spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- return;
- }
-@@ -289,9 +309,12 @@ vc4_hangcheck_elapsed(unsigned long data
- /* If we've made any progress in execution, rearm the timer
- * and wait.
- */
-- if (ct0ca != exec->last_ct0ca || ct1ca != exec->last_ct1ca) {
-- exec->last_ct0ca = ct0ca;
-- exec->last_ct1ca = ct1ca;
-+ if ((bin_exec && ct0ca != bin_exec->last_ct0ca) ||
-+ (render_exec && ct1ca != render_exec->last_ct1ca)) {
-+ if (bin_exec)
-+ bin_exec->last_ct0ca = ct0ca;
-+ if (render_exec)
-+ render_exec->last_ct1ca = ct1ca;
- spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- vc4_queue_hangcheck(dev);
- return;
-@@ -391,11 +414,13 @@ vc4_flush_caches(struct drm_device *dev)
- * The job_lock should be held during this.
- */
- void
--vc4_submit_next_job(struct drm_device *dev)
-+vc4_submit_next_bin_job(struct drm_device *dev)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-- struct vc4_exec_info *exec = vc4_first_job(vc4);
-+ struct vc4_exec_info *exec;
-
-+again:
-+ exec = vc4_first_bin_job(vc4);
- if (!exec)
- return;
-
-@@ -405,11 +430,40 @@ vc4_submit_next_job(struct drm_device *d
- V3D_WRITE(V3D_BPOA, 0);
- V3D_WRITE(V3D_BPOS, 0);
-
-- if (exec->ct0ca != exec->ct0ea)
-+ /* Either put the job in the binner if it uses the binner, or
-+ * immediately move it to the to-be-rendered queue.
-+ */
-+ if (exec->ct0ca != exec->ct0ea) {
- submit_cl(dev, 0, exec->ct0ca, exec->ct0ea);
-+ } else {
-+ vc4_move_job_to_render(dev, exec);
-+ goto again;
-+ }
-+}
-+
-+void
-+vc4_submit_next_render_job(struct drm_device *dev)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_exec_info *exec = vc4_first_render_job(vc4);
-+
-+ if (!exec)
-+ return;
-+
- submit_cl(dev, 1, exec->ct1ca, exec->ct1ea);
- }
-
-+void
-+vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ bool was_empty = list_empty(&vc4->render_job_list);
-+
-+ list_move_tail(&exec->head, &vc4->render_job_list);
-+ if (was_empty)
-+ vc4_submit_next_render_job(dev);
-+}
-+
- static void
- vc4_update_bo_seqnos(struct vc4_exec_info *exec, uint64_t seqno)
- {
-@@ -448,14 +502,14 @@ vc4_queue_submit(struct drm_device *dev,
- exec->seqno = seqno;
- vc4_update_bo_seqnos(exec, seqno);
-
-- list_add_tail(&exec->head, &vc4->job_list);
-+ list_add_tail(&exec->head, &vc4->bin_job_list);
-
- /* If no job was executing, kick ours off. Otherwise, it'll
-- * get started when the previous job's frame done interrupt
-+ * get started when the previous job's flush done interrupt
- * occurs.
- */
-- if (vc4_first_job(vc4) == exec) {
-- vc4_submit_next_job(dev);
-+ if (vc4_first_bin_job(vc4) == exec) {
-+ vc4_submit_next_bin_job(dev);
- vc4_queue_hangcheck(dev);
- }
-
-@@ -849,7 +903,8 @@ vc4_gem_init(struct drm_device *dev)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-
-- INIT_LIST_HEAD(&vc4->job_list);
-+ INIT_LIST_HEAD(&vc4->bin_job_list);
-+ INIT_LIST_HEAD(&vc4->render_job_list);
- INIT_LIST_HEAD(&vc4->job_done_list);
- INIT_LIST_HEAD(&vc4->seqno_cb_list);
- spin_lock_init(&vc4->job_lock);
---- a/drivers/gpu/drm/vc4/vc4_irq.c
-+++ b/drivers/gpu/drm/vc4/vc4_irq.c
-@@ -30,6 +30,10 @@
- * disables that specific interrupt, and 0s written are ignored
- * (reading either one returns the set of enabled interrupts).
- *
-+ * When we take a binning flush done interrupt, we need to submit the
-+ * next frame for binning and move the finished frame to the render
-+ * thread.
-+ *
- * When we take a render frame interrupt, we need to wake the
- * processes waiting for some frame to be done, and get the next frame
- * submitted ASAP (so the hardware doesn't sit idle when there's work
-@@ -44,6 +48,7 @@
- #include "vc4_regs.h"
-
- #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \
-+ V3D_INT_FLDONE | \
- V3D_INT_FRDONE)
-
- DECLARE_WAIT_QUEUE_HEAD(render_wait);
-@@ -77,7 +82,7 @@ vc4_overflow_mem_work(struct work_struct
- unsigned long irqflags;
-
- spin_lock_irqsave(&vc4->job_lock, irqflags);
-- current_exec = vc4_first_job(vc4);
-+ current_exec = vc4_first_bin_job(vc4);
- if (current_exec) {
- vc4->overflow_mem->seqno = vc4->finished_seqno + 1;
- list_add_tail(&vc4->overflow_mem->unref_head,
-@@ -98,17 +103,43 @@ vc4_overflow_mem_work(struct work_struct
- }
-
- static void
--vc4_irq_finish_job(struct drm_device *dev)
-+vc4_irq_finish_bin_job(struct drm_device *dev)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
-+
-+ if (!exec)
-+ return;
-+
-+ vc4_move_job_to_render(dev, exec);
-+ vc4_submit_next_bin_job(dev);
-+}
-+
-+static void
-+vc4_cancel_bin_job(struct drm_device *dev)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
-+
-+ if (!exec)
-+ return;
-+
-+ list_move_tail(&exec->head, &vc4->bin_job_list);
-+ vc4_submit_next_bin_job(dev);
-+}
-+
-+static void
-+vc4_irq_finish_render_job(struct drm_device *dev)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-- struct vc4_exec_info *exec = vc4_first_job(vc4);
-+ struct vc4_exec_info *exec = vc4_first_render_job(vc4);
-
- if (!exec)
- return;
-
- vc4->finished_seqno++;
- list_move_tail(&exec->head, &vc4->job_done_list);
-- vc4_submit_next_job(dev);
-+ vc4_submit_next_render_job(dev);
-
- wake_up_all(&vc4->job_wait_queue);
- schedule_work(&vc4->job_done_work);
-@@ -125,9 +156,10 @@ vc4_irq(int irq, void *arg)
- barrier();
- intctl = V3D_READ(V3D_INTCTL);
-
-- /* Acknowledge the interrupts we're handling here. The render
-- * frame done interrupt will be cleared, while OUTOMEM will
-- * stay high until the underlying cause is cleared.
-+ /* Acknowledge the interrupts we're handling here. The binner
-+ * last flush / render frame done interrupt will be cleared,
-+ * while OUTOMEM will stay high until the underlying cause is
-+ * cleared.
- */
- V3D_WRITE(V3D_INTCTL, intctl);
-
-@@ -138,9 +170,16 @@ vc4_irq(int irq, void *arg)
- status = IRQ_HANDLED;
- }
-
-+ if (intctl & V3D_INT_FLDONE) {
-+ spin_lock(&vc4->job_lock);
-+ vc4_irq_finish_bin_job(dev);
-+ spin_unlock(&vc4->job_lock);
-+ status = IRQ_HANDLED;
-+ }
-+
- if (intctl & V3D_INT_FRDONE) {
- spin_lock(&vc4->job_lock);
-- vc4_irq_finish_job(dev);
-+ vc4_irq_finish_render_job(dev);
- spin_unlock(&vc4->job_lock);
- status = IRQ_HANDLED;
- }
-@@ -205,6 +244,7 @@ void vc4_irq_reset(struct drm_device *de
- V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS);
-
- spin_lock_irqsave(&vc4->job_lock, irqflags);
-- vc4_irq_finish_job(dev);
-+ vc4_cancel_bin_job(dev);
-+ vc4_irq_finish_render_job(dev);
- spin_unlock_irqrestore(&vc4->job_lock, irqflags);
- }
+++ /dev/null
-From 5967aea469c030c3bc258b52b9f3704fd9873e63 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 29 Feb 2016 17:53:00 -0800
-Subject: [PATCH 294/381] drm/vc4: Let gpiolib know that we're OK with sleeping
- for HPD.
-
-Fixes an error thrown every few seconds when we poll HPD when it's on
-a I2C to GPIO expander.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Tested-by: Daniel Stone <daniels@collabora.com>
-(cherry picked from commit 0e60eab57557bc06bb3a5ef8d5d6dcd9ddd47aff)
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -168,7 +168,7 @@ vc4_hdmi_connector_detect(struct drm_con
- return connector_status_connected;
-
- if (vc4->hdmi->hpd_gpio) {
-- if (gpio_get_value(vc4->hdmi->hpd_gpio))
-+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio))
- return connector_status_connected;
- else
- return connector_status_disconnected;
--- /dev/null
+From 16410f120e31739e61b0a89f91539cd551e088cc Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 4 Mar 2016 12:32:07 -0800
+Subject: [PATCH 294/423] drm/vc4: Recognize a more specific compatible string
+ for V3D.
+
+The Raspberry Pi Foundation's firmware updates are shipping device
+trees using the old string, so we'll keep recognizing that as this rev
+of V3D. Still, we should use a more specific name in the upstream DT
+to clarify which board is being supported, in case we do other revs of
+V3D in the future.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+(cherry picked from commit 90d7116061f86c1f8ea460806a0414addea7b58b)
+---
+ drivers/gpu/drm/vc4/vc4_v3d.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_v3d.c
++++ b/drivers/gpu/drm/vc4/vc4_v3d.c
+@@ -256,6 +256,7 @@ static int vc4_v3d_dev_remove(struct pla
+ }
+
+ static const struct of_device_id vc4_v3d_dt_match[] = {
++ { .compatible = "brcm,bcm2835-v3d" },
+ { .compatible = "brcm,vc4-v3d" },
+ {}
+ };
--- /dev/null
+From 08b78882a19227210b133f5fd66c923c4dec2d5d Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Apr 2016 17:21:06 -0700
+Subject: [PATCH 295/423] ARM: bcm2708: Move the CMA range down for kernel 4.4.
+
+The previous area no longer works, for reasons I haven't investigated.
+Just move it somewhere that works.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -91,7 +91,7 @@
+ fragment@4 {
+ target-path = "/chosen";
+ __overlay__ {
+- bootargs = "cma=256M@512M";
++ bootargs = "cma=256M@256M";
+ };
+ };
+ };
+++ /dev/null
-From 2e6c1ee022829aa063838c244dbb94e2a8df04d2 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 29 Feb 2016 17:53:01 -0800
-Subject: [PATCH 295/381] drm/vc4: Respect GPIO_ACTIVE_LOW on HDMI HPD if set
- in the devicetree.
-
-The original Raspberry Pi had the GPIO active high, but the later
-models are active low. The DT GPIO bindings allow specifying the
-active flag, except that it doesn't get propagated to the gpiodesc, so
-you have to handle it yourself.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Tested-by: Daniel Stone <daniels@collabora.com>
-(cherry picked from commit 0b06e0a7945130e6a187f7959529cba7725f573a)
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -47,6 +47,7 @@ struct vc4_hdmi {
- void __iomem *hdmicore_regs;
- void __iomem *hd_regs;
- int hpd_gpio;
-+ bool hpd_active_low;
-
- struct clk *pixel_clock;
- struct clk *hsm_clock;
-@@ -168,7 +169,8 @@ vc4_hdmi_connector_detect(struct drm_con
- return connector_status_connected;
-
- if (vc4->hdmi->hpd_gpio) {
-- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio))
-+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
-+ vc4->hdmi->hpd_active_low)
- return connector_status_connected;
- else
- return connector_status_disconnected;
-@@ -519,11 +521,17 @@ static int vc4_hdmi_bind(struct device *
- * we'll use the HDMI core's register.
- */
- if (of_find_property(dev->of_node, "hpd-gpios", &value)) {
-- hdmi->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0);
-+ enum of_gpio_flags hpd_gpio_flags;
-+
-+ hdmi->hpd_gpio = of_get_named_gpio_flags(dev->of_node,
-+ "hpd-gpios", 0,
-+ &hpd_gpio_flags);
- if (hdmi->hpd_gpio < 0) {
- ret = hdmi->hpd_gpio;
- goto err_unprepare_hsm;
- }
-+
-+ hdmi->hpd_active_low = hpd_gpio_flags & OF_GPIO_ACTIVE_LOW;
- }
-
- vc4->hdmi = hdmi;
--- /dev/null
+From 962b219e1cbec5b7fc6a3b5c9e03077ca759695d Mon Sep 17 00:00:00 2001
+From: Vladimir Zapolskiy <vz@mleia.com>
+Date: Sun, 6 Mar 2016 03:21:35 +0200
+Subject: [PATCH 296/423] clk: bcm2835: fix check of error code returned by
+ devm_ioremap_resource()
+
+The change fixes potential oops while accessing iomem on invalid
+address, if devm_ioremap_resource() fails due to some reason.
+
+The devm_ioremap_resource() function returns ERR_PTR() and never
+returns NULL, which makes useless a following check for NULL.
+
+Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
+Fixes: 5e63dcc74b30 ("clk: bcm2835: Add a driver for the auxiliary peripheral clock gates")
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
+---
+ drivers/clk/bcm/clk-bcm2835-aux.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835-aux.c
++++ b/drivers/clk/bcm/clk-bcm2835-aux.c
+@@ -38,8 +38,8 @@ static int bcm2835_aux_clk_probe(struct
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ reg = devm_ioremap_resource(dev, res);
+- if (!reg)
+- return -ENODEV;
++ if (IS_ERR(reg))
++ return PTR_ERR(reg);
+
+ onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL);
+ if (!onecell)
+++ /dev/null
-From ca25ba22f36a3e55b94f650e402564d830843edb Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Tue, 8 Mar 2016 15:09:41 +0300
-Subject: [PATCH 296/381] drm/vc4: Return -EFAULT on copy_from_user() failure
-
-The copy_from_user() function returns the number of bytes not copied but
-we want to return a negative error code.
-
-Fixes: 463873d57014 ('drm/vc4: Add an API for creating GPU shaders in GEM BOs.')
-Cc: stable@vger.kernel.org
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 585cb132a48190b554aecda2ebc3e2911fcbb665)
----
- drivers/gpu/drm/vc4/vc4_bo.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_bo.c
-+++ b/drivers/gpu/drm/vc4/vc4_bo.c
-@@ -519,11 +519,12 @@ vc4_create_shader_bo_ioctl(struct drm_de
- if (IS_ERR(bo))
- return PTR_ERR(bo);
-
-- ret = copy_from_user(bo->base.vaddr,
-+ if (copy_from_user(bo->base.vaddr,
- (void __user *)(uintptr_t)args->data,
-- args->size);
-- if (ret != 0)
-+ args->size)) {
-+ ret = -EFAULT;
- goto fail;
-+ }
- /* Clear the rest of the memory from allocating from the BO
- * cache.
- */
+++ /dev/null
-From 73ecaa8211e2751d37bffc316cea700927b228b7 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 4 Mar 2016 12:32:07 -0800
-Subject: [PATCH 297/381] drm/vc4: Recognize a more specific compatible string
- for V3D.
-
-The Raspberry Pi Foundation's firmware updates are shipping device
-trees using the old string, so we'll keep recognizing that as this rev
-of V3D. Still, we should use a more specific name in the upstream DT
-to clarify which board is being supported, in case we do other revs of
-V3D in the future.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Stephen Warren <swarren@wwwdotorg.org>
-(cherry picked from commit 90d7116061f86c1f8ea460806a0414addea7b58b)
----
- drivers/gpu/drm/vc4/vc4_v3d.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/vc4/vc4_v3d.c
-+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
-@@ -256,6 +256,7 @@ static int vc4_v3d_dev_remove(struct pla
- }
-
- static const struct of_device_id vc4_v3d_dt_match[] = {
-+ { .compatible = "brcm,bcm2835-v3d" },
- { .compatible = "brcm,vc4-v3d" },
- {}
- };
--- /dev/null
+From 3ea5efb1f91da877b375eccb94e1cd4517fd8638 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 21 Apr 2016 13:49:32 +0100
+Subject: [PATCH 297/423] vchiq_arm: Add completion records under the mutex
+
+An issue was observed when flushing openmax components
+which generate a large number of messages returning
+buffers to host.
+
+We occasionally found a duplicate message from 16
+messages prior, resulting in a buffer returned twice.
+
+While only one thread adds completions, without the
+mutex you don't get the protection of the automatic
+memory barrier you get with synchronisation objects.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
++++ b/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
+@@ -210,6 +210,8 @@ add_completion(VCHIQ_INSTANCE_T instance
+ VCHIQ_COMPLETION_DATA_T *completion;
+ DEBUG_INITIALISE(g_state.local)
+
++ mutex_lock(&instance->completion_mutex);
++
+ while (instance->completion_insert ==
+ (instance->completion_remove + MAX_COMPLETIONS)) {
+ /* Out of space - wait for the client */
+@@ -217,11 +219,17 @@ add_completion(VCHIQ_INSTANCE_T instance
+ vchiq_log_trace(vchiq_arm_log_level,
+ "add_completion - completion queue full");
+ DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT);
++
++ mutex_unlock(&instance->completion_mutex);
+ if (down_interruptible(&instance->remove_event) != 0) {
+ vchiq_log_info(vchiq_arm_log_level,
+ "service_callback interrupted");
+ return VCHIQ_RETRY;
+- } else if (instance->closing) {
++ }
++
++ mutex_lock(&instance->completion_mutex);
++ if (instance->closing) {
++ mutex_unlock(&instance->completion_mutex);
+ vchiq_log_info(vchiq_arm_log_level,
+ "service_callback closing");
+ return VCHIQ_SUCCESS;
+@@ -254,8 +262,11 @@ add_completion(VCHIQ_INSTANCE_T instance
+ if (reason == VCHIQ_MESSAGE_AVAILABLE)
+ user_service->message_available_pos =
+ instance->completion_insert;
++
+ instance->completion_insert++;
+
++ mutex_unlock(&instance->completion_mutex);
++
+ up(&instance->insert_event);
+
+ return VCHIQ_SUCCESS;
+++ /dev/null
-From 94f13d08b80c3470b57b7997766049f2860f22ba Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Apr 2016 17:21:06 -0700
-Subject: [PATCH 298/381] ARM: bcm2708: Move the CMA range down for kernel 4.4.
-
-The previous area no longer works, for reasons I haven't investigated.
-Just move it somewhere that works.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-@@ -91,7 +91,7 @@
- fragment@4 {
- target-path = "/chosen";
- __overlay__ {
-- bootargs = "cma=256M@512M";
-+ bootargs = "cma=256M@256M";
- };
- };
- };
--- /dev/null
+From 51453a026306a2b1c7ccad6bcc9ab95a24d49bc3 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 21 Apr 2016 16:07:15 +0100
+Subject: [PATCH 298/423] config: Add DRM_UDL module
+
+See: https://github.com/raspberrypi/linux/issues/1422
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/configs/bcm2709_defconfig | 5 +++--
+ arch/arm/configs/bcmrpi_defconfig | 5 +++--
+ 2 files changed, 6 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -815,6 +815,7 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
++CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+ CONFIG_FB_BCM2708=y
+@@ -854,10 +855,10 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RPI_DAC=m
+ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
++CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
++CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_SOC_ADAU1701=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -807,6 +807,7 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
++CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+ CONFIG_FB_BCM2708=y
+@@ -846,10 +847,10 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RPI_DAC=m
+ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
++CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
++CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_SOC_ADAU1701=m
--- /dev/null
+From c2dd47a309d6eee486191ef7805ba3f544ff3dae Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 21 Apr 2016 15:44:14 +0100
+Subject: [PATCH 299/423] bcm2835-i2s: Reduce the TX DREQ threshold
+
+TX FIFO overrun is thought to be the cause of channel swapping, so
+reducing the DREQ threshold seems reasonable and appears to be
+effective.
+
+See: https://github.com/raspberrypi/linux/issues/1417
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ sound/soc/bcm/bcm2835-i2s.c | 21 ++++++++++++++-------
+ 1 file changed, 14 insertions(+), 7 deletions(-)
+
+--- a/sound/soc/bcm/bcm2835-i2s.c
++++ b/sound/soc/bcm/bcm2835-i2s.c
+@@ -555,15 +555,22 @@ static int bcm2835_i2s_hw_params(struct
+
+ /* Setup the DMA parameters */
+ regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG,
+- BCM2835_I2S_RXTHR(1)
+- | BCM2835_I2S_TXTHR(1)
+- | BCM2835_I2S_DMAEN, 0xffffffff);
++ BCM2835_I2S_RXTHR(3)
++ | BCM2835_I2S_TXTHR(3)
++ | BCM2835_I2S_DMAEN,
++ BCM2835_I2S_RXTHR(1)
++ | BCM2835_I2S_TXTHR(1)
++ | BCM2835_I2S_DMAEN);
+
+ regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG,
+- BCM2835_I2S_TX_PANIC(0x10)
+- | BCM2835_I2S_RX_PANIC(0x30)
+- | BCM2835_I2S_TX(0x30)
+- | BCM2835_I2S_RX(0x20), 0xffffffff);
++ BCM2835_I2S_TX_PANIC(0x7f)
++ | BCM2835_I2S_RX_PANIC(0x7f)
++ | BCM2835_I2S_TX(0x7f)
++ | BCM2835_I2S_RX(0x7f),
++ BCM2835_I2S_TX_PANIC(0x10)
++ | BCM2835_I2S_RX_PANIC(0x30)
++ | BCM2835_I2S_TX(0x20)
++ | BCM2835_I2S_RX(0x20));
+
+ /* Clear FIFOs */
+ bcm2835_i2s_clear_fifos(dev, true, true);
+++ /dev/null
-From f083d686ec57e2b856f12a52978b594d719cddfc Mon Sep 17 00:00:00 2001
-From: Vladimir Zapolskiy <vz@mleia.com>
-Date: Sun, 6 Mar 2016 03:21:35 +0200
-Subject: [PATCH 299/381] clk: bcm2835: fix check of error code returned by
- devm_ioremap_resource()
-
-The change fixes potential oops while accessing iomem on invalid
-address, if devm_ioremap_resource() fails due to some reason.
-
-The devm_ioremap_resource() function returns ERR_PTR() and never
-returns NULL, which makes useless a following check for NULL.
-
-Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
-Fixes: 5e63dcc74b30 ("clk: bcm2835: Add a driver for the auxiliary peripheral clock gates")
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
----
- drivers/clk/bcm/clk-bcm2835-aux.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835-aux.c
-+++ b/drivers/clk/bcm/clk-bcm2835-aux.c
-@@ -38,8 +38,8 @@ static int bcm2835_aux_clk_probe(struct
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- reg = devm_ioremap_resource(dev, res);
-- if (!reg)
-- return -ENODEV;
-+ if (IS_ERR(reg))
-+ return PTR_ERR(reg);
-
- onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL);
- if (!onecell)
--- /dev/null
+From 99f198703d9ba6c286ca936850a12e6ca3f6b78b Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <6by9@users.noreply.github.com>
+Date: Sat, 16 Apr 2016 23:09:54 +0100
+Subject: [PATCH 300/423] V4L2: Request maximum resolution from GPU
+
+Get resolution information about the sensors from the GPU
+and advertise it correctly.
+
+Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 59 +++++++++++++++++--------
+ drivers/media/platform/bcm2835/bcm2835-camera.h | 3 +-
+ 2 files changed, 43 insertions(+), 19 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -38,8 +38,6 @@
+ #define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2"
+ #define MIN_WIDTH 16
+ #define MIN_HEIGHT 16
+-#define MAX_WIDTH 2592
+-#define MAX_HEIGHT 1944
+ #define MIN_BUFFER_SIZE (80*1024)
+
+ #define MAX_VIDEO_MODE_WIDTH 1280
+@@ -729,11 +727,11 @@ static int vidioc_try_fmt_vid_overlay(st
+ f->fmt.win.clipcount = 0;
+ f->fmt.win.bitmap = NULL;
+
+- v4l_bound_align_image(&f->fmt.win.w.width, MIN_WIDTH, MAX_WIDTH, 1,
+- &f->fmt.win.w.height, MIN_HEIGHT, MAX_HEIGHT,
++ v4l_bound_align_image(&f->fmt.win.w.width, MIN_WIDTH, dev->max_width, 1,
++ &f->fmt.win.w.height, MIN_HEIGHT, dev->max_height,
+ 1, 0);
+- v4l_bound_align_image(&f->fmt.win.w.left, MIN_WIDTH, MAX_WIDTH, 1,
+- &f->fmt.win.w.top, MIN_HEIGHT, MAX_HEIGHT,
++ v4l_bound_align_image(&f->fmt.win.w.left, MIN_WIDTH, dev->max_width, 1,
++ &f->fmt.win.w.top, MIN_HEIGHT, dev->max_height,
+ 1, 0);
+
+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev,
+@@ -961,8 +959,9 @@ static int vidioc_try_fmt_vid_cap(struct
+ "Clipping/aligning %dx%d format %08X\n",
+ f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.pixelformat);
+
+- v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, MAX_WIDTH, 1,
+- &f->fmt.pix.height, MIN_HEIGHT, MAX_HEIGHT, 1, 0);
++ v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, dev->max_width, 1,
++ &f->fmt.pix.height, MIN_HEIGHT, dev->max_height,
++ 1, 0);
+ f->fmt.pix.bytesperline = f->fmt.pix.width * mfmt->ybbp;
+
+ /* Image buffer has to be padded to allow for alignment, even though
+@@ -1301,9 +1300,10 @@ static int vidioc_s_fmt_vid_cap(struct f
+ int vidioc_enum_framesizes(struct file *file, void *fh,
+ struct v4l2_frmsizeenum *fsize)
+ {
++ struct bm2835_mmal_dev *dev = video_drvdata(file);
+ static const struct v4l2_frmsize_stepwise sizes = {
+- MIN_WIDTH, MAX_WIDTH, 2,
+- MIN_HEIGHT, MAX_HEIGHT, 2
++ MIN_WIDTH, 0, 2,
++ MIN_HEIGHT, 0, 2
+ };
+ int i;
+
+@@ -1316,6 +1316,8 @@ int vidioc_enum_framesizes(struct file *
+ return -EINVAL;
+ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
+ fsize->stepwise = sizes;
++ fsize->stepwise.max_width = dev->max_width;
++ fsize->stepwise.max_height = dev->max_height;
+ return 0;
+ }
+
+@@ -1323,6 +1325,7 @@ int vidioc_enum_framesizes(struct file *
+ static int vidioc_enum_frameintervals(struct file *file, void *priv,
+ struct v4l2_frmivalenum *fival)
+ {
++ struct bm2835_mmal_dev *dev = video_drvdata(file);
+ int i;
+
+ if (fival->index)
+@@ -1335,8 +1338,8 @@ static int vidioc_enum_frameintervals(st
+ return -EINVAL;
+
+ /* regarding width & height - we support any within range */
+- if (fival->width < MIN_WIDTH || fival->width > MAX_WIDTH ||
+- fival->height < MIN_HEIGHT || fival->height > MAX_HEIGHT)
++ if (fival->width < MIN_WIDTH || fival->width > dev->max_width ||
++ fival->height < MIN_HEIGHT || fival->height > dev->max_height)
+ return -EINVAL;
+
+ fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
+@@ -1499,12 +1502,17 @@ static struct video_device vdev_template
+ .release = video_device_release_empty,
+ };
+
+-static int get_num_cameras(struct vchiq_mmal_instance *instance)
++/* Returns the number of cameras, and also the max resolution supported
++ * by those cameras.
++ */
++static int get_num_cameras(struct vchiq_mmal_instance *instance,
++ unsigned int resolutions[][2], int num_resolutions)
+ {
+ int ret;
+ struct vchiq_mmal_component *cam_info_component;
+ struct mmal_parameter_camera_info_t cam_info = {0};
+ int param_size = sizeof(cam_info);
++ int i;
+
+ /* create a camera_info component */
+ ret = vchiq_mmal_component_init(instance, "camera_info",
+@@ -1520,6 +1528,14 @@ static int get_num_cameras(struct vchiq_
+ ¶m_size)) {
+ pr_info("Failed to get camera info\n");
+ }
++ for (i = 0;
++ i < (cam_info.num_cameras > num_resolutions ?
++ cam_info.num_cameras :
++ num_resolutions);
++ i++) {
++ resolutions[i][0] = cam_info.cameras[i].max_width;
++ resolutions[i][1] = cam_info.cameras[i].max_height;
++ }
+
+ vchiq_mmal_component_finalise(instance,
+ cam_info_component);
+@@ -1528,12 +1544,13 @@ static int get_num_cameras(struct vchiq_
+ }
+
+ static int set_camera_parameters(struct vchiq_mmal_instance *instance,
+- struct vchiq_mmal_component *camera)
++ struct vchiq_mmal_component *camera,
++ struct bm2835_mmal_dev *dev)
+ {
+ int ret;
+ struct mmal_parameter_camera_config cam_config = {
+- .max_stills_w = MAX_WIDTH,
+- .max_stills_h = MAX_HEIGHT,
++ .max_stills_w = dev->max_width,
++ .max_stills_h = dev->max_height,
+ .stills_yuv422 = 1,
+ .one_shot_stills = 1,
+ .max_preview_video_w = (max_video_width > 1920) ?
+@@ -1576,7 +1593,8 @@ static int __init mmal_init(struct bm283
+ }
+
+ ret = set_camera_parameters(dev->instance,
+- dev->component[MMAL_COMPONENT_CAMERA]);
++ dev->component[MMAL_COMPONENT_CAMERA],
++ dev);
+ if (ret < 0)
+ goto unreg_camera;
+
+@@ -1838,12 +1856,15 @@ static int __init bm2835_mmal_init(void)
+ int camera;
+ unsigned int num_cameras;
+ struct vchiq_mmal_instance *instance;
++ unsigned int resolutions[MAX_BCM2835_CAMERAS][2];
+
+ ret = vchiq_mmal_init(&instance);
+ if (ret < 0)
+ return ret;
+
+- num_cameras = get_num_cameras(instance);
++ num_cameras = get_num_cameras(instance,
++ resolutions,
++ MAX_BCM2835_CAMERAS);
+ if (num_cameras > MAX_BCM2835_CAMERAS)
+ num_cameras = MAX_BCM2835_CAMERAS;
+
+@@ -1853,6 +1874,8 @@ static int __init bm2835_mmal_init(void)
+ return -ENOMEM;
+
+ dev->camera_num = camera;
++ dev->max_width = resolutions[camera][0];
++ dev->max_height = resolutions[camera][1];
+
+ /* setup device defaults */
+ dev->overlay.w.left = 150;
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.h
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.h
+@@ -107,7 +107,8 @@ struct bm2835_mmal_dev {
+ } capture;
+
+ unsigned int camera_num;
+-
++ unsigned int max_width;
++ unsigned int max_height;
+ };
+
+ int bm2835_mmal_init_controls(
+++ /dev/null
-From 9b9ba43bf2cfd1bde5651f69a4f141a66dd7a012 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 21 Apr 2016 13:49:32 +0100
-Subject: [PATCH 300/381] vchiq_arm: Add completion records under the mutex
-
-An issue was observed when flushing openmax components
-which generate a large number of messages returning
-buffers to host.
-
-We occasionally found a duplicate message from 16
-messages prior, resulting in a buffer returned twice.
-
-While only one thread adds completions, without the
-mutex you don't get the protection of the automatic
-memory barrier you get with synchronisation objects.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
-+++ b/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
-@@ -210,6 +210,8 @@ add_completion(VCHIQ_INSTANCE_T instance
- VCHIQ_COMPLETION_DATA_T *completion;
- DEBUG_INITIALISE(g_state.local)
-
-+ mutex_lock(&instance->completion_mutex);
-+
- while (instance->completion_insert ==
- (instance->completion_remove + MAX_COMPLETIONS)) {
- /* Out of space - wait for the client */
-@@ -217,11 +219,17 @@ add_completion(VCHIQ_INSTANCE_T instance
- vchiq_log_trace(vchiq_arm_log_level,
- "add_completion - completion queue full");
- DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT);
-+
-+ mutex_unlock(&instance->completion_mutex);
- if (down_interruptible(&instance->remove_event) != 0) {
- vchiq_log_info(vchiq_arm_log_level,
- "service_callback interrupted");
- return VCHIQ_RETRY;
-- } else if (instance->closing) {
-+ }
-+
-+ mutex_lock(&instance->completion_mutex);
-+ if (instance->closing) {
-+ mutex_unlock(&instance->completion_mutex);
- vchiq_log_info(vchiq_arm_log_level,
- "service_callback closing");
- return VCHIQ_SUCCESS;
-@@ -254,8 +262,11 @@ add_completion(VCHIQ_INSTANCE_T instance
- if (reason == VCHIQ_MESSAGE_AVAILABLE)
- user_service->message_available_pos =
- instance->completion_insert;
-+
- instance->completion_insert++;
-
-+ mutex_unlock(&instance->completion_mutex);
-+
- up(&instance->insert_event);
-
- return VCHIQ_SUCCESS;
--- /dev/null
+From 19244064105686007a875c423970e3113da4e73c Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sat, 23 Apr 2016 15:21:41 +0000
+Subject: [PATCH 301/423] ARM: bcm2835: add i2s-gpio28-31 for cm
+
+Add i2s-gpio28-31 overlay for compute module
+so that i2s is using gpio28-31
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 ++++++
+ arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts | 18 ++++++++++++++++++
+ 3 files changed, 25 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -37,6 +37,7 @@ dtbo-$(RPI_DT_OVERLAYS) += i2c-mux-pca95
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -464,6 +464,12 @@ Params: sda1_pin GPIO pin
+ default 4)
+
+
++Name: i2s-gpio28-31
++Info: move I2S function block to GPIO 28 to 31
++Load: dtoverlay=i2s-gpio28-31
++Params: <None>
++
++
+ Name: i2s-mmap
+ Info: Enables mmap support in the bcm2708-i2s driver
+ Load: dtoverlay=i2s-mmap
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
+@@ -0,0 +1,18 @@
++/*
++ * Device tree overlay to move i2s to gpio 28 to 31 on CM
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&i2s_pins>;
++ __overlay__ {
++ brcm,pins = <28 29 30 31>;
++ brcm,function = <6>; /* alt2 */
++ };
++ };
++};
+++ /dev/null
-From dd6c8868f14136f8095b8cb1a35254b18cadc434 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 21 Apr 2016 16:07:15 +0100
-Subject: [PATCH 301/381] config: Add DRM_UDL module
-
-See: https://github.com/raspberrypi/linux/issues/1422
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/configs/bcm2709_defconfig | 5 +++--
- arch/arm/configs/bcmrpi_defconfig | 5 +++--
- 2 files changed, 6 insertions(+), 4 deletions(-)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -815,6 +815,7 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
-+CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
- CONFIG_FB_BCM2708=y
-@@ -854,10 +855,10 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_RPI_DAC=m
- CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
-+CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
-+CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_SOC_ADAU1701=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -807,6 +807,7 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
-+CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
- CONFIG_FB_BCM2708=y
-@@ -846,10 +847,10 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_RPI_DAC=m
- CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
-+CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
-+CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_SOC_ADAU1701=m
+++ /dev/null
-From 0d3f33f6f76201d8468a4da376b1b0e84740cecb Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 21 Apr 2016 15:44:14 +0100
-Subject: [PATCH 302/381] bcm2835-i2s: Reduce the TX DREQ threshold
-
-TX FIFO overrun is thought to be the cause of channel swapping, so
-reducing the DREQ threshold seems reasonable and appears to be
-effective.
-
-See: https://github.com/raspberrypi/linux/issues/1417
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- sound/soc/bcm/bcm2835-i2s.c | 21 ++++++++++++++-------
- 1 file changed, 14 insertions(+), 7 deletions(-)
-
---- a/sound/soc/bcm/bcm2835-i2s.c
-+++ b/sound/soc/bcm/bcm2835-i2s.c
-@@ -555,15 +555,22 @@ static int bcm2835_i2s_hw_params(struct
-
- /* Setup the DMA parameters */
- regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG,
-- BCM2835_I2S_RXTHR(1)
-- | BCM2835_I2S_TXTHR(1)
-- | BCM2835_I2S_DMAEN, 0xffffffff);
-+ BCM2835_I2S_RXTHR(3)
-+ | BCM2835_I2S_TXTHR(3)
-+ | BCM2835_I2S_DMAEN,
-+ BCM2835_I2S_RXTHR(1)
-+ | BCM2835_I2S_TXTHR(1)
-+ | BCM2835_I2S_DMAEN);
-
- regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_DREQ_A_REG,
-- BCM2835_I2S_TX_PANIC(0x10)
-- | BCM2835_I2S_RX_PANIC(0x30)
-- | BCM2835_I2S_TX(0x30)
-- | BCM2835_I2S_RX(0x20), 0xffffffff);
-+ BCM2835_I2S_TX_PANIC(0x7f)
-+ | BCM2835_I2S_RX_PANIC(0x7f)
-+ | BCM2835_I2S_TX(0x7f)
-+ | BCM2835_I2S_RX(0x7f),
-+ BCM2835_I2S_TX_PANIC(0x10)
-+ | BCM2835_I2S_RX_PANIC(0x30)
-+ | BCM2835_I2S_TX(0x20)
-+ | BCM2835_I2S_RX(0x20));
-
- /* Clear FIFOs */
- bcm2835_i2s_clear_fifos(dev, true, true);
--- /dev/null
+From 5f632f8aba2da50bba83537926a1d3a466ca2a51 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Sun, 24 Apr 2016 17:28:15 +0100
+Subject: [PATCH 302/423] drm/vc4: Add DT parameters to control CMA usage
+
+Example: dtoverlay=vc4-kms-v3d,cma-128
+
+See: https://github.com/raspberrypi/linux/pull/1431
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/README | 8 +++--
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 36 ++++++++++++++++++++++
+ 2 files changed, 42 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1023,8 +1023,12 @@ Name: vc4-kms-v3d
+ Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
+ booting to GUI while this overlay is in use will cause interesting
+ lockups.
+-Load: dtoverlay=vc4-kms-v3d
+-Params: <None>
++Load: dtoverlay=vc4-kms-v3d,<param>
++Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
++ cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
++ cma-128 CMA is 128MB, 128MB-aligned
++ cma-96 CMA is 96MB, 128MB-aligned
++ cma-64 CMA is 64MB, 64MB-aligned
+
+
+ Name: vga666
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -94,4 +94,40 @@
+ bootargs = "cma=256M@256M";
+ };
+ };
++
++ fragment@5 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=192M@256M";
++ };
++ };
++
++ fragment@6 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=128M@128M";
++ };
++ };
++
++ fragment@7 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=96M@128M";
++ };
++ };
++
++ fragment@8 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=64M@64M";
++ };
++ };
++
++ __overrides__ {
++ cma-256 = <0>,"+4-5-6-7-8";
++ cma-192 = <0>,"-4+5-6-7-8";
++ cma-128 = <0>,"-4-5+6-7-8";
++ cma-96 = <0>,"-4-5-6+7-8";
++ cma-64 = <0>,"-4-5-6-7+8";
++ };
+ };
--- /dev/null
+From 2745d40fb64e1663fba690f69ea0a87a171a43f6 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 25 Apr 2016 10:43:36 +0100
+Subject: [PATCH 303/423] SQUASH: BCM270X_DT: Add make rule for sdio-1bit
+
+See: https://github.com/raspberrypi/linux/pull/1301
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -66,6 +66,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtb
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdtweak.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+++ /dev/null
-From 5646e586e0494722d5d0783b573819b6d238c71b Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <6by9@users.noreply.github.com>
-Date: Sat, 16 Apr 2016 23:09:54 +0100
-Subject: [PATCH 303/381] V4L2: Request maximum resolution from GPU
-
-Get resolution information about the sensors from the GPU
-and advertise it correctly.
-
-Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 59 +++++++++++++++++--------
- drivers/media/platform/bcm2835/bcm2835-camera.h | 3 +-
- 2 files changed, 43 insertions(+), 19 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -38,8 +38,6 @@
- #define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2"
- #define MIN_WIDTH 16
- #define MIN_HEIGHT 16
--#define MAX_WIDTH 2592
--#define MAX_HEIGHT 1944
- #define MIN_BUFFER_SIZE (80*1024)
-
- #define MAX_VIDEO_MODE_WIDTH 1280
-@@ -729,11 +727,11 @@ static int vidioc_try_fmt_vid_overlay(st
- f->fmt.win.clipcount = 0;
- f->fmt.win.bitmap = NULL;
-
-- v4l_bound_align_image(&f->fmt.win.w.width, MIN_WIDTH, MAX_WIDTH, 1,
-- &f->fmt.win.w.height, MIN_HEIGHT, MAX_HEIGHT,
-+ v4l_bound_align_image(&f->fmt.win.w.width, MIN_WIDTH, dev->max_width, 1,
-+ &f->fmt.win.w.height, MIN_HEIGHT, dev->max_height,
- 1, 0);
-- v4l_bound_align_image(&f->fmt.win.w.left, MIN_WIDTH, MAX_WIDTH, 1,
-- &f->fmt.win.w.top, MIN_HEIGHT, MAX_HEIGHT,
-+ v4l_bound_align_image(&f->fmt.win.w.left, MIN_WIDTH, dev->max_width, 1,
-+ &f->fmt.win.w.top, MIN_HEIGHT, dev->max_height,
- 1, 0);
-
- v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev,
-@@ -961,8 +959,9 @@ static int vidioc_try_fmt_vid_cap(struct
- "Clipping/aligning %dx%d format %08X\n",
- f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.pixelformat);
-
-- v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, MAX_WIDTH, 1,
-- &f->fmt.pix.height, MIN_HEIGHT, MAX_HEIGHT, 1, 0);
-+ v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, dev->max_width, 1,
-+ &f->fmt.pix.height, MIN_HEIGHT, dev->max_height,
-+ 1, 0);
- f->fmt.pix.bytesperline = f->fmt.pix.width * mfmt->ybbp;
-
- /* Image buffer has to be padded to allow for alignment, even though
-@@ -1301,9 +1300,10 @@ static int vidioc_s_fmt_vid_cap(struct f
- int vidioc_enum_framesizes(struct file *file, void *fh,
- struct v4l2_frmsizeenum *fsize)
- {
-+ struct bm2835_mmal_dev *dev = video_drvdata(file);
- static const struct v4l2_frmsize_stepwise sizes = {
-- MIN_WIDTH, MAX_WIDTH, 2,
-- MIN_HEIGHT, MAX_HEIGHT, 2
-+ MIN_WIDTH, 0, 2,
-+ MIN_HEIGHT, 0, 2
- };
- int i;
-
-@@ -1316,6 +1316,8 @@ int vidioc_enum_framesizes(struct file *
- return -EINVAL;
- fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE;
- fsize->stepwise = sizes;
-+ fsize->stepwise.max_width = dev->max_width;
-+ fsize->stepwise.max_height = dev->max_height;
- return 0;
- }
-
-@@ -1323,6 +1325,7 @@ int vidioc_enum_framesizes(struct file *
- static int vidioc_enum_frameintervals(struct file *file, void *priv,
- struct v4l2_frmivalenum *fival)
- {
-+ struct bm2835_mmal_dev *dev = video_drvdata(file);
- int i;
-
- if (fival->index)
-@@ -1335,8 +1338,8 @@ static int vidioc_enum_frameintervals(st
- return -EINVAL;
-
- /* regarding width & height - we support any within range */
-- if (fival->width < MIN_WIDTH || fival->width > MAX_WIDTH ||
-- fival->height < MIN_HEIGHT || fival->height > MAX_HEIGHT)
-+ if (fival->width < MIN_WIDTH || fival->width > dev->max_width ||
-+ fival->height < MIN_HEIGHT || fival->height > dev->max_height)
- return -EINVAL;
-
- fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS;
-@@ -1499,12 +1502,17 @@ static struct video_device vdev_template
- .release = video_device_release_empty,
- };
-
--static int get_num_cameras(struct vchiq_mmal_instance *instance)
-+/* Returns the number of cameras, and also the max resolution supported
-+ * by those cameras.
-+ */
-+static int get_num_cameras(struct vchiq_mmal_instance *instance,
-+ unsigned int resolutions[][2], int num_resolutions)
- {
- int ret;
- struct vchiq_mmal_component *cam_info_component;
- struct mmal_parameter_camera_info_t cam_info = {0};
- int param_size = sizeof(cam_info);
-+ int i;
-
- /* create a camera_info component */
- ret = vchiq_mmal_component_init(instance, "camera_info",
-@@ -1520,6 +1528,14 @@ static int get_num_cameras(struct vchiq_
- ¶m_size)) {
- pr_info("Failed to get camera info\n");
- }
-+ for (i = 0;
-+ i < (cam_info.num_cameras > num_resolutions ?
-+ cam_info.num_cameras :
-+ num_resolutions);
-+ i++) {
-+ resolutions[i][0] = cam_info.cameras[i].max_width;
-+ resolutions[i][1] = cam_info.cameras[i].max_height;
-+ }
-
- vchiq_mmal_component_finalise(instance,
- cam_info_component);
-@@ -1528,12 +1544,13 @@ static int get_num_cameras(struct vchiq_
- }
-
- static int set_camera_parameters(struct vchiq_mmal_instance *instance,
-- struct vchiq_mmal_component *camera)
-+ struct vchiq_mmal_component *camera,
-+ struct bm2835_mmal_dev *dev)
- {
- int ret;
- struct mmal_parameter_camera_config cam_config = {
-- .max_stills_w = MAX_WIDTH,
-- .max_stills_h = MAX_HEIGHT,
-+ .max_stills_w = dev->max_width,
-+ .max_stills_h = dev->max_height,
- .stills_yuv422 = 1,
- .one_shot_stills = 1,
- .max_preview_video_w = (max_video_width > 1920) ?
-@@ -1576,7 +1593,8 @@ static int __init mmal_init(struct bm283
- }
-
- ret = set_camera_parameters(dev->instance,
-- dev->component[MMAL_COMPONENT_CAMERA]);
-+ dev->component[MMAL_COMPONENT_CAMERA],
-+ dev);
- if (ret < 0)
- goto unreg_camera;
-
-@@ -1838,12 +1856,15 @@ static int __init bm2835_mmal_init(void)
- int camera;
- unsigned int num_cameras;
- struct vchiq_mmal_instance *instance;
-+ unsigned int resolutions[MAX_BCM2835_CAMERAS][2];
-
- ret = vchiq_mmal_init(&instance);
- if (ret < 0)
- return ret;
-
-- num_cameras = get_num_cameras(instance);
-+ num_cameras = get_num_cameras(instance,
-+ resolutions,
-+ MAX_BCM2835_CAMERAS);
- if (num_cameras > MAX_BCM2835_CAMERAS)
- num_cameras = MAX_BCM2835_CAMERAS;
-
-@@ -1853,6 +1874,8 @@ static int __init bm2835_mmal_init(void)
- return -ENOMEM;
-
- dev->camera_num = camera;
-+ dev->max_width = resolutions[camera][0];
-+ dev->max_height = resolutions[camera][1];
-
- /* setup device defaults */
- dev->overlay.w.left = 150;
---- a/drivers/media/platform/bcm2835/bcm2835-camera.h
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.h
-@@ -107,7 +107,8 @@ struct bm2835_mmal_dev {
- } capture;
-
- unsigned int camera_num;
--
-+ unsigned int max_width;
-+ unsigned int max_height;
- };
-
- int bm2835_mmal_init_controls(
+++ /dev/null
-From 791046d531f798944715a214748387449ae9c4b8 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Sat, 23 Apr 2016 15:21:41 +0000
-Subject: [PATCH 304/381] ARM: bcm2835: add i2s-gpio28-31 for cm
-
-Add i2s-gpio28-31 overlay for compute module
-so that i2s is using gpio28-31
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 ++++++
- arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts | 18 ++++++++++++++++++
- 3 files changed, 25 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -37,6 +37,7 @@ dtbo-$(RPI_DT_OVERLAYS) += i2c-mux-pca95
- dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -464,6 +464,12 @@ Params: sda1_pin GPIO pin
- default 4)
-
-
-+Name: i2s-gpio28-31
-+Info: move I2S function block to GPIO 28 to 31
-+Load: dtoverlay=i2s-gpio28-31
-+Params: <None>
-+
-+
- Name: i2s-mmap
- Info: Enables mmap support in the bcm2708-i2s driver
- Load: dtoverlay=i2s-mmap
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
-@@ -0,0 +1,18 @@
-+/*
-+ * Device tree overlay to move i2s to gpio 28 to 31 on CM
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&i2s_pins>;
-+ __overlay__ {
-+ brcm,pins = <28 29 30 31>;
-+ brcm,function = <6>; /* alt2 */
-+ };
-+ };
-+};
--- /dev/null
+From 2e099f313b5fa1f2eb508da3b7322dea3c27053d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Petter=20Mab=C3=A4cker?= <petter@technux.se>
+Date: Fri, 8 Jan 2016 09:02:44 +0100
+Subject: [PATCH 304/423] dts: add overlay for pitft22
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add the pitft22 overlay from adafruit Adafruit-Pi-Kernel-o-Matic repo:
+https://github.com/adafruit/Adafruit-Pi-Kernel-o-Matic
+
+Signed-off-by: Petter Mabäcker <petter@technux.se>
+Signed-off-by: Andrei Gherzan <andrei@resin.io>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 12 +++++
+ arch/arm/boot/dts/overlays/pitft22-overlay.dts | 69 ++++++++++++++++++++++++++
+ 3 files changed, 82 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -51,6 +51,7 @@ dtbo-$(RPI_DT_OVERLAYS) += pi3-disable-b
+ dtbo-$(RPI_DT_OVERLAYS) += pi3-miniuart-bt.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += piscreen.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += piscreen2r.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += pitft22.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft28-capacitive.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft28-resistive.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pps-gpio.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -644,6 +644,18 @@ Params: speed Display
+ xohms Touchpanel sensitivity (X-plate resistance)
+
+
++Name: pitft22
++Info: Adafruit PiTFT 2.2" screen
++Load: dtoverlay=pitft22,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++
+ Name: pitft28-capacitive
+ Info: Adafruit PiTFT 2.8" capacitive touch screen
+ Load: dtoverlay=pitft28-capacitive,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
+@@ -0,0 +1,69 @@
++/*
++ * Device Tree overlay for pitft by Adafruit
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++
++ spidev@0{
++ status = "disabled";
++ };
++
++ spidev@1{
++ status = "disabled";
++ };
++ };
++ };
++
++ fragment@1 {
++ target = <&gpio>;
++ __overlay__ {
++ pitft_pins: pitft_pins {
++ brcm,pins = <25>;
++ brcm,function = <1>; /* out */
++ brcm,pull = <0>; /* none */
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pitft: pitft@0{
++ compatible = "ilitek,ili9340";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pitft_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ fps = <25>;
++ bgr;
++ buswidth = <8>;
++ dc-gpios = <&gpio 25 0>;
++ debug = <0>;
++ };
++
++ };
++ };
++
++ __overrides__ {
++ speed = <&pitft>,"spi-max-frequency:0";
++ rotate = <&pitft>,"rotate:0";
++ fps = <&pitft>,"fps:0";
++ debug = <&pitft>,"debug:0";
++ };
++};
--- /dev/null
+From ef21e99d52371ca26385dce327687880143316a1 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Tue, 26 Apr 2016 10:44:59 +0100
+Subject: [PATCH 305/423] BCM270X_DT: Sound DT adjustments for Dynamic DT
+
+There are a number of issues when loading and unloading overlays for
+sound cards:
+1) The "sound" and "audio" nodes must be children of a bus node, such
+ as "/soc", otherwise the DT changes don't result in platform devices
+ being created and deleted.
+2) The "/sound" node must have a "disabled" status property, otherwise
+ setting the status to "okay" won't be detected.
+3) ALSA doesn't like having components unloaded under its feet, and it
+ is easy to deadlock or crash. Ordering the overlay fragments so that
+ the sound card appears last avoids this problem.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 23 +++++++++---------
+ .../dts/overlays/akkordion-iqdacplus-overlay.dts | 28 +++++++++++-----------
+ .../boot/dts/overlays/boomberry-dac-overlay.dts | 22 ++++++++---------
+ .../boot/dts/overlays/boomberry-digi-overlay.dts | 20 ++++++++--------
+ .../boot/dts/overlays/hifiberry-amp-overlay.dts | 20 ++++++++--------
+ .../boot/dts/overlays/hifiberry-dac-overlay.dts | 22 ++++++++---------
+ .../dts/overlays/hifiberry-dacplus-overlay.dts | 22 ++++++++---------
+ .../boot/dts/overlays/hifiberry-digi-overlay.dts | 20 ++++++++--------
+ arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 20 ++++++++--------
+ .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 22 ++++++++---------
+ arch/arm/boot/dts/overlays/raspidac3-overlay.dts | 20 ++++++++--------
+ arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 22 ++++++++---------
+ arch/arm/boot/dts/overlays/rpi-proto-overlay.dts | 20 ++++++++--------
+ 13 files changed, 141 insertions(+), 140 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -34,17 +34,6 @@
+ clocks = &clocks;
+ };
+
+- /* Onboard audio */
+- audio: audio {
+- compatible = "brcm,bcm2835-audio";
+- brcm,pwm-channels = <8>;
+- status = "disabled";
+- };
+-
+- /* External sound card */
+- sound: sound {
+- };
+-
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+@@ -313,6 +302,18 @@
+ compatible = "brcm,bcm2835-thermal";
+ firmware = <&firmware>;
+ };
++
++ /* Onboard audio */
++ audio: audio {
++ compatible = "brcm,bcm2835-audio";
++ brcm,pwm-channels = <8>;
++ status = "disabled";
++ };
++
++ /* External sound card */
++ sound: sound {
++ status = "disabled";
++ };
+ };
+
+ clocks: clocks {
+--- a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
+@@ -6,25 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- frag0: __overlay__ {
+- compatible = "iqaudio,iqaudio-dac";
+- card_name = "Akkordion";
+- dai_name = "IQaudIO DAC";
+- dai_stream_name = "IQaudIO DAC HiFi";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -40,7 +28,19 @@
+ };
+ };
+
++ fragment@2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "iqaudio,iqaudio-dac";
++ card_name = "Akkordion";
++ dai_name = "IQaudIO DAC";
++ dai_stream_name = "IQaudIO DAC HiFi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
+ __overrides__ {
+- 24db_digital_gain = <&frag0>,"iqaudio,24db_digital_gain?";
++ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
+ };
+ };
+--- a/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- frag0: __overlay__ {
+- compatible = "boomberry,boomberry-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -37,7 +28,16 @@
+ };
+ };
+
++ fragment@2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "boomberry,boomberry-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
+ __overrides__ {
+- 24db_digital_gain = <&frag0>,"boomberry,24db_digital_gain?";
++ 24db_digital_gain = <&frag2>,"boomberry,24db_digital_gain?";
+ };
+ };
+--- a/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
++++ b/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "boomberry,boomberry-digi";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -36,4 +27,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "boomberry,boomberry-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "hifiberry,hifiberry-amp";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -36,4 +27,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-amp";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
+@@ -6,23 +6,14 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "hifiberry,hifiberry-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
+- target-path = "/";
++ fragment@1 {
++ target = <&soc>;
+ __overlay__ {
+ pcm5102a-codec {
+ #sound-dai-cells = <0>;
+@@ -31,4 +22,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
+@@ -16,22 +16,13 @@
+ };
+
+ fragment@1 {
+- target = <&sound>;
+- frag1: __overlay__ {
+- compatible = "hifiberry,hifiberry-dacplus";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@2 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@3 {
++ fragment@2 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -48,7 +39,16 @@
+ };
+ };
+
++ fragment@3 {
++ target = <&sound>;
++ frag3: __overlay__ {
++ compatible = "hifiberry,hifiberry-dacplus";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
+ __overrides__ {
+- 24db_digital_gain = <&frag1>,"hifiberry,24db_digital_gain?";
++ 24db_digital_gain = <&frag3>,"hifiberry,24db_digital_gain?";
+ };
+ };
+--- a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "hifiberry,hifiberry-digi";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -36,4 +27,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "iqaudio,iqaudio-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -36,4 +27,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "iqaudio,iqaudio-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- frag0: __overlay__ {
+- compatible = "iqaudio,iqaudio-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -37,7 +28,16 @@
+ };
+ };
+
++ fragment@2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "iqaudio,iqaudio-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
+ __overrides__ {
+- 24db_digital_gain = <&frag0>,"iqaudio,24db_digital_gain?";
++ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
+ };
+ };
+--- a/arch/arm/boot/dts/overlays/raspidac3-overlay.dts
++++ b/arch/arm/boot/dts/overlays/raspidac3-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "jg,raspidacv3";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -42,4 +33,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "jg,raspidacv3";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
+@@ -6,23 +6,14 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "rpi,rpi-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
+- target-path = "/";
++ fragment@1 {
++ target = <&soc>;
+ __overlay__ {
+ pcm1794a-codec {
+ #sound-dai-cells = <0>;
+@@ -31,4 +22,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rpi,rpi-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+--- a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
++++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
+@@ -6,22 +6,13 @@
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "rpi,rpi-proto";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+ target = <&i2s>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@1 {
+ target = <&i2c1>;
+ __overlay__ {
+ #address-cells = <1>;
+@@ -36,4 +27,13 @@
+ };
+ };
+ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rpi,rpi-proto";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
+ };
+++ /dev/null
-From 937dd48dd631d45dbee39853dcb1cd98220bb1e5 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Sun, 24 Apr 2016 17:28:15 +0100
-Subject: [PATCH 305/381] drm/vc4: Add DT parameters to control CMA usage
-
-Example: dtoverlay=vc4-kms-v3d,cma-128
-
-See: https://github.com/raspberrypi/linux/pull/1431
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/README | 8 +++--
- arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 36 ++++++++++++++++++++++
- 2 files changed, 42 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -1023,8 +1023,12 @@ Name: vc4-kms-v3d
- Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
- booting to GUI while this overlay is in use will cause interesting
- lockups.
--Load: dtoverlay=vc4-kms-v3d
--Params: <None>
-+Load: dtoverlay=vc4-kms-v3d,<param>
-+Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
-+ cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
-+ cma-128 CMA is 128MB, 128MB-aligned
-+ cma-96 CMA is 96MB, 128MB-aligned
-+ cma-64 CMA is 64MB, 64MB-aligned
-
-
- Name: vga666
---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-@@ -94,4 +94,40 @@
- bootargs = "cma=256M@256M";
- };
- };
-+
-+ fragment@5 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=192M@256M";
-+ };
-+ };
-+
-+ fragment@6 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=128M@128M";
-+ };
-+ };
-+
-+ fragment@7 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=96M@128M";
-+ };
-+ };
-+
-+ fragment@8 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=64M@64M";
-+ };
-+ };
-+
-+ __overrides__ {
-+ cma-256 = <0>,"+4-5-6-7-8";
-+ cma-192 = <0>,"-4+5-6-7-8";
-+ cma-128 = <0>,"-4-5+6-7-8";
-+ cma-96 = <0>,"-4-5-6+7-8";
-+ cma-64 = <0>,"-4-5-6-7+8";
-+ };
- };
--- /dev/null
+From 27105cf8f4de0124cfdeb3413d5475aff3c8f00f Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 27 Apr 2016 12:01:41 +0100
+Subject: [PATCH 306/423] BCM270X_DT: Fix codec use in hifiberry-dac overlay
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
+@@ -13,7 +13,7 @@
+ };
+
+ fragment@1 {
+- target = <&soc>;
++ target-path = "/";
+ __overlay__ {
+ pcm5102a-codec {
+ #sound-dai-cells = <0>;
+++ /dev/null
-From 3fc5b9e6d4ec9ed6dc6e6165099e3e5e552eb446 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Mon, 25 Apr 2016 10:43:36 +0100
-Subject: [PATCH 306/381] SQUASH: BCM270X_DT: Add make rule for sdio-1bit
-
-See: https://github.com/raspberrypi/linux/pull/1301
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -66,6 +66,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtb
- dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdtweak.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+++ /dev/null
-From 56fa6791fbd2021cec1eeb45462b2ad3d1631a05 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Petter=20Mab=C3=A4cker?= <petter@technux.se>
-Date: Fri, 8 Jan 2016 09:02:44 +0100
-Subject: [PATCH 307/381] dts: add overlay for pitft22
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add the pitft22 overlay from adafruit Adafruit-Pi-Kernel-o-Matic repo:
-https://github.com/adafruit/Adafruit-Pi-Kernel-o-Matic
-
-Signed-off-by: Petter Mabäcker <petter@technux.se>
-Signed-off-by: Andrei Gherzan <andrei@resin.io>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 12 +++++
- arch/arm/boot/dts/overlays/pitft22-overlay.dts | 69 ++++++++++++++++++++++++++
- 3 files changed, 82 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -51,6 +51,7 @@ dtbo-$(RPI_DT_OVERLAYS) += pi3-disable-b
- dtbo-$(RPI_DT_OVERLAYS) += pi3-miniuart-bt.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += piscreen.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += piscreen2r.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += pitft22.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += pitft28-capacitive.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += pitft28-resistive.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += pps-gpio.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -644,6 +644,18 @@ Params: speed Display
- xohms Touchpanel sensitivity (X-plate resistance)
-
-
-+Name: pitft22
-+Info: Adafruit PiTFT 2.2" screen
-+Load: dtoverlay=pitft22,<param>=<val>
-+Params: speed Display SPI bus speed
-+
-+ rotate Display rotation {0,90,180,270}
-+
-+ fps Delay between frame updates
-+
-+ debug Debug output level {0-7}
-+
-+
- Name: pitft28-capacitive
- Info: Adafruit PiTFT 2.8" capacitive touch screen
- Load: dtoverlay=pitft28-capacitive,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
-@@ -0,0 +1,69 @@
-+/*
-+ * Device Tree overlay for pitft by Adafruit
-+ *
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&spi0>;
-+ __overlay__ {
-+ status = "okay";
-+
-+ spidev@0{
-+ status = "disabled";
-+ };
-+
-+ spidev@1{
-+ status = "disabled";
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&gpio>;
-+ __overlay__ {
-+ pitft_pins: pitft_pins {
-+ brcm,pins = <25>;
-+ brcm,function = <1>; /* out */
-+ brcm,pull = <0>; /* none */
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&spi0>;
-+ __overlay__ {
-+ /* needed to avoid dtc warning */
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ pitft: pitft@0{
-+ compatible = "ilitek,ili9340";
-+ reg = <0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pitft_pins>;
-+
-+ spi-max-frequency = <32000000>;
-+ rotate = <90>;
-+ fps = <25>;
-+ bgr;
-+ buswidth = <8>;
-+ dc-gpios = <&gpio 25 0>;
-+ debug = <0>;
-+ };
-+
-+ };
-+ };
-+
-+ __overrides__ {
-+ speed = <&pitft>,"spi-max-frequency:0";
-+ rotate = <&pitft>,"rotate:0";
-+ fps = <&pitft>,"fps:0";
-+ debug = <&pitft>,"debug:0";
-+ };
-+};
+++ /dev/null
-From 7ad6d43eb9631ca8f4bb51f920b6fd2664d1b214 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Tue, 26 Apr 2016 10:44:59 +0100
-Subject: [PATCH 308/381] BCM270X_DT: Sound DT adjustments for Dynamic DT
-
-There are a number of issues when loading and unloading overlays for
-sound cards:
-1) The "sound" and "audio" nodes must be children of a bus node, such
- as "/soc", otherwise the DT changes don't result in platform devices
- being created and deleted.
-2) The "/sound" node must have a "disabled" status property, otherwise
- setting the status to "okay" won't be detected.
-3) ALSA doesn't like having components unloaded under its feet, and it
- is easy to deadlock or crash. Ordering the overlay fragments so that
- the sound card appears last avoids this problem.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 23 +++++++++---------
- .../dts/overlays/akkordion-iqdacplus-overlay.dts | 28 +++++++++++-----------
- .../boot/dts/overlays/boomberry-dac-overlay.dts | 22 ++++++++---------
- .../boot/dts/overlays/boomberry-digi-overlay.dts | 20 ++++++++--------
- .../boot/dts/overlays/hifiberry-amp-overlay.dts | 20 ++++++++--------
- .../boot/dts/overlays/hifiberry-dac-overlay.dts | 22 ++++++++---------
- .../dts/overlays/hifiberry-dacplus-overlay.dts | 22 ++++++++---------
- .../boot/dts/overlays/hifiberry-digi-overlay.dts | 20 ++++++++--------
- arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 20 ++++++++--------
- .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 22 ++++++++---------
- arch/arm/boot/dts/overlays/raspidac3-overlay.dts | 20 ++++++++--------
- arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 22 ++++++++---------
- arch/arm/boot/dts/overlays/rpi-proto-overlay.dts | 20 ++++++++--------
- 13 files changed, 141 insertions(+), 140 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -34,17 +34,6 @@
- clocks = &clocks;
- };
-
-- /* Onboard audio */
-- audio: audio {
-- compatible = "brcm,bcm2835-audio";
-- brcm,pwm-channels = <8>;
-- status = "disabled";
-- };
--
-- /* External sound card */
-- sound: sound {
-- };
--
- soc: soc {
- compatible = "simple-bus";
- #address-cells = <1>;
-@@ -313,6 +302,18 @@
- compatible = "brcm,bcm2835-thermal";
- firmware = <&firmware>;
- };
-+
-+ /* Onboard audio */
-+ audio: audio {
-+ compatible = "brcm,bcm2835-audio";
-+ brcm,pwm-channels = <8>;
-+ status = "disabled";
-+ };
-+
-+ /* External sound card */
-+ sound: sound {
-+ status = "disabled";
-+ };
- };
-
- clocks: clocks {
---- a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
-@@ -6,25 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- frag0: __overlay__ {
-- compatible = "iqaudio,iqaudio-dac";
-- card_name = "Akkordion";
-- dai_name = "IQaudIO DAC";
-- dai_stream_name = "IQaudIO DAC HiFi";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -40,7 +28,19 @@
- };
- };
-
-+ fragment@2 {
-+ target = <&sound>;
-+ frag2: __overlay__ {
-+ compatible = "iqaudio,iqaudio-dac";
-+ card_name = "Akkordion";
-+ dai_name = "IQaudIO DAC";
-+ dai_stream_name = "IQaudIO DAC HiFi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
- __overrides__ {
-- 24db_digital_gain = <&frag0>,"iqaudio,24db_digital_gain?";
-+ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
- };
- };
---- a/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- frag0: __overlay__ {
-- compatible = "boomberry,boomberry-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -37,7 +28,16 @@
- };
- };
-
-+ fragment@2 {
-+ target = <&sound>;
-+ frag2: __overlay__ {
-+ compatible = "boomberry,boomberry-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
- __overrides__ {
-- 24db_digital_gain = <&frag0>,"boomberry,24db_digital_gain?";
-+ 24db_digital_gain = <&frag2>,"boomberry,24db_digital_gain?";
- };
- };
---- a/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "boomberry,boomberry-digi";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -36,4 +27,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "boomberry,boomberry-digi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "hifiberry,hifiberry-amp";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -36,4 +27,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "hifiberry,hifiberry-amp";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
-@@ -6,23 +6,14 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "hifiberry,hifiberry-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-- target-path = "/";
-+ fragment@1 {
-+ target = <&soc>;
- __overlay__ {
- pcm5102a-codec {
- #sound-dai-cells = <0>;
-@@ -31,4 +22,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "hifiberry,hifiberry-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
-@@ -16,22 +16,13 @@
- };
-
- fragment@1 {
-- target = <&sound>;
-- frag1: __overlay__ {
-- compatible = "hifiberry,hifiberry-dacplus";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@2 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@3 {
-+ fragment@2 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -48,7 +39,16 @@
- };
- };
-
-+ fragment@3 {
-+ target = <&sound>;
-+ frag3: __overlay__ {
-+ compatible = "hifiberry,hifiberry-dacplus";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
- __overrides__ {
-- 24db_digital_gain = <&frag1>,"hifiberry,24db_digital_gain?";
-+ 24db_digital_gain = <&frag3>,"hifiberry,24db_digital_gain?";
- };
- };
---- a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "hifiberry,hifiberry-digi";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -36,4 +27,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "hifiberry,hifiberry-digi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "iqaudio,iqaudio-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -36,4 +27,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "iqaudio,iqaudio-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- frag0: __overlay__ {
-- compatible = "iqaudio,iqaudio-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -37,7 +28,16 @@
- };
- };
-
-+ fragment@2 {
-+ target = <&sound>;
-+ frag2: __overlay__ {
-+ compatible = "iqaudio,iqaudio-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
- __overrides__ {
-- 24db_digital_gain = <&frag0>,"iqaudio,24db_digital_gain?";
-+ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
- };
- };
---- a/arch/arm/boot/dts/overlays/raspidac3-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/raspidac3-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "jg,raspidacv3";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -42,4 +33,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "jg,raspidacv3";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
-@@ -6,23 +6,14 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "rpi,rpi-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-- target-path = "/";
-+ fragment@1 {
-+ target = <&soc>;
- __overlay__ {
- pcm1794a-codec {
- #sound-dai-cells = <0>;
-@@ -31,4 +22,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "rpi,rpi-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
---- a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
-@@ -6,22 +6,13 @@
- compatible = "brcm,bcm2708";
-
- fragment@0 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "rpi,rpi-proto";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
- target = <&i2s>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@1 {
- target = <&i2c1>;
- __overlay__ {
- #address-cells = <1>;
-@@ -36,4 +27,13 @@
- };
- };
- };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "rpi,rpi-proto";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
- };
+++ /dev/null
-From b2be61827d995cd83f5453f3be0967e954095906 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 27 Apr 2016 12:01:41 +0100
-Subject: [PATCH 309/381] BCM270X_DT: Fix codec use in hifiberry-dac overlay
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
-@@ -13,7 +13,7 @@
- };
-
- fragment@1 {
-- target = <&soc>;
-+ target-path = "/";
- __overlay__ {
- pcm5102a-codec {
- #sound-dai-cells = <0>;
--- /dev/null
+From ad45da06f725ba7f1280c69e0476919d87f8030c Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:27:33 +0100
+Subject: [PATCH 309/423] Revert "bcm2835: log which channel map is set"
+
+This reverts commit cd560b8658868d9652ab31754e02f86daf6831ba.
+---
+ sound/arm/bcm2835-vchiq.c | 5 -----
+ 1 file changed, 5 deletions(-)
+
+--- a/sound/arm/bcm2835-vchiq.c
++++ b/sound/arm/bcm2835-vchiq.c
+@@ -596,11 +596,8 @@ int bcm2835_audio_set_params(bcm2835_als
+ instance->result = -1;
+
+ if (alsa_stream->chip->cea_chmap >= 0) {
+- LOG_INFO("Using application requested channel map: %d\n",
+- alsa_stream->chip->cea_chmap);
+ chmap_value = (unsigned)alsa_stream->chip->cea_chmap << 24;
+ } else {
+- LOG_INFO("Using fallback channel map.\n");
+ /* fallback layouts for applications which do not use chmap API */
+ chmap_value = 0x00;
+ switch (channels) {
+@@ -617,8 +614,6 @@ int bcm2835_audio_set_params(bcm2835_als
+ for (i = 0; i < 8; i++)
+ chmap_value |= alsa_stream->chip->map_channels[i] << (i * 3);
+
+- LOG_INFO("Requesting AUDS channel map: 0x%lx\n", (long)chmap_value);
+-
+ m.type = VC_AUDIO_MSG_TYPE_CONFIG;
+ m.u.config.channels = channels;
+ m.u.config.samplerate = samplerate;
--- /dev/null
+From f8473a921ad7208ca5b4218571f3ffd267b18cff Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:27:35 +0100
+Subject: [PATCH 310/423] Revert "bcm2835: add fallback channel layouts if
+ channel map API is not used"
+
+This reverts commit ceacfff9f86f89826dbc8a6df667f485894327d1.
+---
+ sound/arm/bcm2835-vchiq.c | 11 +----------
+ 1 file changed, 1 insertion(+), 10 deletions(-)
+
+--- a/sound/arm/bcm2835-vchiq.c
++++ b/sound/arm/bcm2835-vchiq.c
+@@ -598,16 +598,7 @@ int bcm2835_audio_set_params(bcm2835_als
+ if (alsa_stream->chip->cea_chmap >= 0) {
+ chmap_value = (unsigned)alsa_stream->chip->cea_chmap << 24;
+ } else {
+- /* fallback layouts for applications which do not use chmap API */
+- chmap_value = 0x00;
+- switch (channels) {
+- case 3: chmap_value = 0x01; break;
+- case 4: chmap_value = 0x03; break;
+- case 5: chmap_value = 0x07; break;
+- case 6: chmap_value = 0x0b; break;
+- case 7: chmap_value = 0x0f; break;
+- case 8: chmap_value = 0x13; break;
+- }
++ chmap_value = 0; /* force stereo */
+ for (i = 0; i < 8; i++)
+ alsa_stream->chip->map_channels[i] = i;
+ }
--- /dev/null
+From 75045e771ab867b6cd397b1d1280e81584ddc401 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:27:36 +0100
+Subject: [PATCH 311/423] Revert "bcm2835: do not require substream for
+ accessing chmap ctl"
+
+This reverts commit a05b4815196018c329ea98c24205bc6fa9c097e0.
+---
+ sound/arm/bcm2835-ctl.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/sound/arm/bcm2835-ctl.c
++++ b/sound/arm/bcm2835-ctl.c
+@@ -489,6 +489,8 @@ static int snd_bcm2835_chmap_ctl_get(str
+ {
+ struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
+ bcm2835_chip_t *chip = info->private_data;
++ unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
++ struct snd_pcm_substream *substream = snd_pcm_chmap_substream(info, idx);
+ struct cea_channel_speaker_allocation *ch = NULL;
+ int res = 0;
+ int cur = 0;
+@@ -497,6 +499,11 @@ static int snd_bcm2835_chmap_ctl_get(str
+ if (mutex_lock_interruptible(&chip->audio_mutex))
+ return -EINTR;
+
++ if (!substream || !substream->runtime) {
++ res = -ENODEV;
++ goto unlock;
++ }
++
+ for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
+ if (channel_allocations[i].ca_index == chip->cea_chmap)
+ ch = &channel_allocations[i];
+@@ -514,6 +521,7 @@ static int snd_bcm2835_chmap_ctl_get(str
+ while (cur < 8)
+ ucontrol->value.integer.value[cur++] = SNDRV_CHMAP_NA;
+
++unlock:
+ mutex_unlock(&chip->audio_mutex);
+ return res;
+ }
+@@ -533,7 +541,7 @@ static int snd_bcm2835_chmap_ctl_put(str
+ return -EINTR;
+
+ if (!substream || !substream->runtime) {
+- /* ignore and return success for the sake of alsactl */
++ res = -ENODEV;
+ goto unlock;
+ }
+
--- /dev/null
+From 65978c7586dc8fe403a3a3bebf40de881b8d2741 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:27:37 +0100
+Subject: [PATCH 312/423] Revert "bcm2835: interpolate audio delay"
+
+This reverts commit 83eca613d0eddd2c8299f114b8fe573ccaffdefc.
+---
+ sound/arm/bcm2835-pcm.c | 12 +-----------
+ sound/arm/bcm2835.h | 1 -
+ 2 files changed, 1 insertion(+), 12 deletions(-)
+
+--- a/sound/arm/bcm2835-pcm.c
++++ b/sound/arm/bcm2835-pcm.c
+@@ -25,7 +25,7 @@
+ /* hardware definition */
+ static struct snd_pcm_hardware snd_bcm2835_playback_hw = {
+ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
+- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH),
++ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID),
+ .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 8000,
+@@ -99,8 +99,6 @@ static irqreturn_t bcm2835_playback_fifo
+ alsa_stream->pos %= alsa_stream->buffer_size;
+ }
+
+- alsa_stream->interpolate_start = ktime_get_ns();
+-
+ if (alsa_stream->substream) {
+ if (new_period)
+ snd_pcm_period_elapsed(alsa_stream->substream);
+@@ -401,7 +399,6 @@ static int snd_bcm2835_pcm_prepare(struc
+ alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream);
+ alsa_stream->period_size = snd_pcm_lib_period_bytes(substream);
+ alsa_stream->pos = 0;
+- alsa_stream->interpolate_start = ktime_get_ns();
+
+ audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n",
+ alsa_stream->buffer_size, alsa_stream->period_size,
+@@ -498,7 +495,6 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s
+ {
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data;
+- u64 now = ktime_get_ns();
+
+ audio_info(" .. IN\n");
+
+@@ -507,12 +503,6 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s
+ frames_to_bytes(runtime, runtime->control->appl_ptr),
+ alsa_stream->pos);
+
+- /* Give userspace better delay reporting by interpolating between GPU
+- * notifications, assuming audio speed is close enough to the clock
+- * used for ktime */
+- if (alsa_stream->interpolate_start && alsa_stream->interpolate_start < now)
+- runtime->delay = -(int)div_u64((now - alsa_stream->interpolate_start) * runtime->rate, 1000000000);
+-
+ audio_info(" .. OUT\n");
+ return snd_pcm_indirect_playback_pointer(substream,
+ &alsa_stream->pcm_indirect,
+--- a/sound/arm/bcm2835.h
++++ b/sound/arm/bcm2835.h
+@@ -137,7 +137,6 @@ typedef struct bcm2835_alsa_stream {
+ unsigned int pos;
+ unsigned int buffer_size;
+ unsigned int period_size;
+- u64 interpolate_start;
+
+ uint32_t enable_fifo_irq;
+ irq_handler_t fifo_irq_handler;
+++ /dev/null
-From 6b600a159a7204835e8f86d1fe7554c4fd2e088f Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:27:33 +0100
-Subject: [PATCH 312/381] Revert "bcm2835: log which channel map is set"
-
-This reverts commit cd560b8658868d9652ab31754e02f86daf6831ba.
----
- sound/arm/bcm2835-vchiq.c | 5 -----
- 1 file changed, 5 deletions(-)
-
---- a/sound/arm/bcm2835-vchiq.c
-+++ b/sound/arm/bcm2835-vchiq.c
-@@ -596,11 +596,8 @@ int bcm2835_audio_set_params(bcm2835_als
- instance->result = -1;
-
- if (alsa_stream->chip->cea_chmap >= 0) {
-- LOG_INFO("Using application requested channel map: %d\n",
-- alsa_stream->chip->cea_chmap);
- chmap_value = (unsigned)alsa_stream->chip->cea_chmap << 24;
- } else {
-- LOG_INFO("Using fallback channel map.\n");
- /* fallback layouts for applications which do not use chmap API */
- chmap_value = 0x00;
- switch (channels) {
-@@ -617,8 +614,6 @@ int bcm2835_audio_set_params(bcm2835_als
- for (i = 0; i < 8; i++)
- chmap_value |= alsa_stream->chip->map_channels[i] << (i * 3);
-
-- LOG_INFO("Requesting AUDS channel map: 0x%lx\n", (long)chmap_value);
--
- m.type = VC_AUDIO_MSG_TYPE_CONFIG;
- m.u.config.channels = channels;
- m.u.config.samplerate = samplerate;
+++ /dev/null
-From 24d1da89c980e9561a823c065ef37ca25e13a48c Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:27:35 +0100
-Subject: [PATCH 313/381] Revert "bcm2835: add fallback channel layouts if
- channel map API is not used"
-
-This reverts commit ceacfff9f86f89826dbc8a6df667f485894327d1.
----
- sound/arm/bcm2835-vchiq.c | 11 +----------
- 1 file changed, 1 insertion(+), 10 deletions(-)
-
---- a/sound/arm/bcm2835-vchiq.c
-+++ b/sound/arm/bcm2835-vchiq.c
-@@ -598,16 +598,7 @@ int bcm2835_audio_set_params(bcm2835_als
- if (alsa_stream->chip->cea_chmap >= 0) {
- chmap_value = (unsigned)alsa_stream->chip->cea_chmap << 24;
- } else {
-- /* fallback layouts for applications which do not use chmap API */
-- chmap_value = 0x00;
-- switch (channels) {
-- case 3: chmap_value = 0x01; break;
-- case 4: chmap_value = 0x03; break;
-- case 5: chmap_value = 0x07; break;
-- case 6: chmap_value = 0x0b; break;
-- case 7: chmap_value = 0x0f; break;
-- case 8: chmap_value = 0x13; break;
-- }
-+ chmap_value = 0; /* force stereo */
- for (i = 0; i < 8; i++)
- alsa_stream->chip->map_channels[i] = i;
- }
--- /dev/null
+From 71c5f4311cf466ec59d058102c21b12c93d46a64 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:28:06 +0100
+Subject: [PATCH 313/423] Revert "bcm2835: only allow stereo if analogue jack
+ is selected"
+
+This reverts commit 5f7049894f47b3836838cd68e29ee883179c80b3.
+---
+ sound/arm/bcm2835-ctl.c | 12 ------------
+ 1 file changed, 12 deletions(-)
+
+--- a/sound/arm/bcm2835-ctl.c
++++ b/sound/arm/bcm2835-ctl.c
+@@ -423,16 +423,9 @@ static struct cea_channel_speaker_alloca
+ { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
+ };
+
+-static int uses_analogue(bcm2835_chip_t *chip)
+-{
+- return chip->dest == 1;
+-}
+-
+ static int snd_bcm2835_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
+ unsigned int size, unsigned int __user *tlv)
+ {
+- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
+- bcm2835_chip_t *chip = info->private_data;
+ unsigned int __user *dst;
+ int count = 0;
+ int i;
+@@ -449,9 +442,6 @@ static int snd_bcm2835_chmap_ctl_tlv(str
+ int chs_bytes;
+ int c;
+
+- if (i > 0 && uses_analogue(chip))
+- break;
+-
+ for (c = 0; c < 8; c++) {
+ if (ch->speakers[c])
+ num_chs++;
+@@ -562,8 +552,6 @@ static int snd_bcm2835_chmap_ctl_put(str
+ int matches = 1;
+ int cur = 0;
+ int x;
+- if (i > 0 && uses_analogue(chip))
+- break;
+ memset(remap, 0, sizeof(remap));
+ for (x = 0; x < substream->runtime->channels; x++) {
+ int sp = ucontrol->value.integer.value[x];
--- /dev/null
+From 36b6b25b8fe95dc3d4c9b0ded58827b5660e1a87 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:28:08 +0100
+Subject: [PATCH 314/423] Revert "bcm2835: always use 2/4/8 channels for
+ multichannel layouts"
+
+This reverts commit 06931f74092d86087144f070b06a4444df8b444b.
+---
+ sound/arm/bcm2835-ctl.c | 89 ++++++++++++++++++++++++-------------------------
+ 1 file changed, 44 insertions(+), 45 deletions(-)
+
+--- a/sound/arm/bcm2835-ctl.c
++++ b/sound/arm/bcm2835-ctl.c
+@@ -349,7 +349,6 @@ struct cea_channel_speaker_allocation {
+ #define FRW SNDRV_CHMAP_FRW
+ #define TC SNDRV_CHMAP_TC
+ #define FCH SNDRV_CHMAP_TFC
+-#define NA SNDRV_CHMAP_NA
+
+ /*
+ * CEA-861 channel maps
+@@ -357,69 +356,69 @@ struct cea_channel_speaker_allocation {
+ * Stolen from sound/pci/hda/patch_hdmi.c
+ * (unlike the source, this uses SNDRV_* constants directly, as by the
+ * map_tables array in patch_hdmi.c)
+- * Entries which do not have a physical output channel use 0. Entries which
+- * require userspace to output silence use NA (SNDRV_CHMAP_NA).
++ * Unknown entries use 0, which unfortunately is SNDRV_CHMAP_UNKNOWN instead
++ * of SNDRV_CHMAP_NA.
+ */
+ static struct cea_channel_speaker_allocation channel_allocations[] = {
+ /* channel: 7 6 5 4 3 2 1 0 */
+ { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
+ /* 2.1 */
+-{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, NA, LFE, FR, FL } },
++{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
+ /* Dolby Surround */
+-{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, NA, FR, FL } },
++{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
+ /* surround40 */
+-{ .ca_index = 0x08, .speakers = { NA, NA, RR, RL, NA, NA, FR, FL } },
++{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
+ /* surround41 */
+-{ .ca_index = 0x09, .speakers = { NA, NA, RR, RL, NA, LFE, FR, FL } },
++{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
+ /* surround50 */
+-{ .ca_index = 0x0a, .speakers = { NA, NA, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
+ /* surround51 */
+-{ .ca_index = 0x0b, .speakers = { NA, NA, RR, RL, FC, LFE, FR, FL } },
++{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
+ /* 6.1 */
+-{ .ca_index = 0x0f, .speakers = { NA, RC, RR, RL, FC, LFE, FR, FL } },
++{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
+ /* surround71 */
+ { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
+
+-{ .ca_index = 0x03, .speakers = { NA, NA, NA, NA, FC, LFE, FR, FL } },
+-{ .ca_index = 0x04, .speakers = { NA, NA, NA, RC, NA, NA, FR, FL } },
+-{ .ca_index = 0x05, .speakers = { NA, NA, NA, RC, NA, LFE, FR, FL } },
+-{ .ca_index = 0x06, .speakers = { NA, NA, NA, RC, FC, NA, FR, FL } },
+-{ .ca_index = 0x07, .speakers = { NA, NA, NA, RC, FC, LFE, FR, FL } },
+-{ .ca_index = 0x0c, .speakers = { NA, RC, RR, RL, NA, NA, FR, FL } },
+-{ .ca_index = 0x0d, .speakers = { NA, RC, RR, RL, NA, LFE, FR, FL } },
+-{ .ca_index = 0x0e, .speakers = { NA, RC, RR, RL, FC, NA, FR, FL } },
+-{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, NA, NA, FR, FL } },
+-{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, NA, LFE, FR, FL } },
+-{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, NA, FR, FL } },
+-{ .ca_index = 0x14, .speakers = { FRC, FLC, NA, NA, NA, NA, FR, FL } },
+-{ .ca_index = 0x15, .speakers = { FRC, FLC, NA, NA, NA, LFE, FR, FL } },
+-{ .ca_index = 0x16, .speakers = { FRC, FLC, NA, NA, FC, NA, FR, FL } },
+-{ .ca_index = 0x17, .speakers = { FRC, FLC, NA, NA, FC, LFE, FR, FL } },
+-{ .ca_index = 0x18, .speakers = { FRC, FLC, NA, RC, NA, NA, FR, FL } },
+-{ .ca_index = 0x19, .speakers = { FRC, FLC, NA, RC, NA, LFE, FR, FL } },
+-{ .ca_index = 0x1a, .speakers = { FRC, FLC, NA, RC, FC, NA, FR, FL } },
+-{ .ca_index = 0x1b, .speakers = { FRC, FLC, NA, RC, FC, LFE, FR, FL } },
+-{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, NA, NA, FR, FL } },
+-{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, NA, LFE, FR, FL } },
+-{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
++{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
++{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
++{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
++{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
++{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
++{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
++{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
++{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
++{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
++{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
++{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
++{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
++{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
++{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
++{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
++{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
++{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
++{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
++{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
++{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
++{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
+ { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x20, .speakers = { NA, FCH, RR, RL, FC, NA, FR, FL } },
+-{ .ca_index = 0x21, .speakers = { NA, FCH, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x22, .speakers = { TC, NA, RR, RL, FC, NA, FR, FL } },
+-{ .ca_index = 0x23, .speakers = { TC, NA, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, NA, NA, FR, FL } },
+-{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, NA, LFE, FR, FL } },
+-{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, NA, NA, FR, FL } },
+-{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, NA, LFE, FR, FL } },
+-{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
++{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
++{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
++{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
++{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
++{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
++{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
++{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
++{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
+ { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
+ { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
+ { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
+ { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, NA, FR, FL } },
++{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
+ { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
+ };
+
+++ /dev/null
-From a557a6f30f553f24626a409333cb281405ef4086 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:27:36 +0100
-Subject: [PATCH 314/381] Revert "bcm2835: do not require substream for
- accessing chmap ctl"
-
-This reverts commit a05b4815196018c329ea98c24205bc6fa9c097e0.
----
- sound/arm/bcm2835-ctl.c | 10 +++++++++-
- 1 file changed, 9 insertions(+), 1 deletion(-)
-
---- a/sound/arm/bcm2835-ctl.c
-+++ b/sound/arm/bcm2835-ctl.c
-@@ -489,6 +489,8 @@ static int snd_bcm2835_chmap_ctl_get(str
- {
- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
- bcm2835_chip_t *chip = info->private_data;
-+ unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
-+ struct snd_pcm_substream *substream = snd_pcm_chmap_substream(info, idx);
- struct cea_channel_speaker_allocation *ch = NULL;
- int res = 0;
- int cur = 0;
-@@ -497,6 +499,11 @@ static int snd_bcm2835_chmap_ctl_get(str
- if (mutex_lock_interruptible(&chip->audio_mutex))
- return -EINTR;
-
-+ if (!substream || !substream->runtime) {
-+ res = -ENODEV;
-+ goto unlock;
-+ }
-+
- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
- if (channel_allocations[i].ca_index == chip->cea_chmap)
- ch = &channel_allocations[i];
-@@ -514,6 +521,7 @@ static int snd_bcm2835_chmap_ctl_get(str
- while (cur < 8)
- ucontrol->value.integer.value[cur++] = SNDRV_CHMAP_NA;
-
-+unlock:
- mutex_unlock(&chip->audio_mutex);
- return res;
- }
-@@ -533,7 +541,7 @@ static int snd_bcm2835_chmap_ctl_put(str
- return -EINTR;
-
- if (!substream || !substream->runtime) {
-- /* ignore and return success for the sake of alsactl */
-+ res = -ENODEV;
- goto unlock;
- }
-
--- /dev/null
+From f830d4081e228776a7236be435921016b3ae1347 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:29:03 +0100
+Subject: [PATCH 315/423] Revert "bcm2835: implement channel map API"
+
+This reverts commit 5efba3f8c180c39609a8d40033ef92046ef0de75.
+---
+ sound/arm/bcm2835-ctl.c | 299 ----------------------------------------------
+ sound/arm/bcm2835-pcm.c | 69 ++---------
+ sound/arm/bcm2835-vchiq.c | 13 --
+ sound/arm/bcm2835.h | 4 -
+ 4 files changed, 7 insertions(+), 378 deletions(-)
+
+--- a/sound/arm/bcm2835-ctl.c
++++ b/sound/arm/bcm2835-ctl.c
+@@ -327,304 +327,6 @@ static struct snd_kcontrol_new snd_bcm28
+ },
+ };
+
+-struct cea_channel_speaker_allocation {
+- int ca_index;
+- int speakers[8];
+-};
+-
+-#define FL SNDRV_CHMAP_FL
+-#define FR SNDRV_CHMAP_FR
+-#define RL SNDRV_CHMAP_RL
+-#define RR SNDRV_CHMAP_RR
+-#define LFE SNDRV_CHMAP_LFE
+-#define FC SNDRV_CHMAP_FC
+-#define RLC SNDRV_CHMAP_RLC
+-#define RRC SNDRV_CHMAP_RRC
+-#define RC SNDRV_CHMAP_RC
+-#define FLC SNDRV_CHMAP_FLC
+-#define FRC SNDRV_CHMAP_FRC
+-#define FLH SNDRV_CHMAP_TFL
+-#define FRH SNDRV_CHMAP_TFR
+-#define FLW SNDRV_CHMAP_FLW
+-#define FRW SNDRV_CHMAP_FRW
+-#define TC SNDRV_CHMAP_TC
+-#define FCH SNDRV_CHMAP_TFC
+-
+-/*
+- * CEA-861 channel maps
+- *
+- * Stolen from sound/pci/hda/patch_hdmi.c
+- * (unlike the source, this uses SNDRV_* constants directly, as by the
+- * map_tables array in patch_hdmi.c)
+- * Unknown entries use 0, which unfortunately is SNDRV_CHMAP_UNKNOWN instead
+- * of SNDRV_CHMAP_NA.
+- */
+-static struct cea_channel_speaker_allocation channel_allocations[] = {
+-/* channel: 7 6 5 4 3 2 1 0 */
+-{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
+- /* 2.1 */
+-{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
+- /* Dolby Surround */
+-{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
+- /* surround40 */
+-{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
+- /* surround41 */
+-{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
+- /* surround50 */
+-{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
+- /* surround51 */
+-{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
+- /* 6.1 */
+-{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
+- /* surround71 */
+-{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
+-
+-{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
+-{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
+-{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
+-{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
+-{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
+-{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
+-{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
+-{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
+-{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
+-{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
+-{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
+-{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
+-{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
+-{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
+-{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
+-{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
+-{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
+-{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
+-{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
+-{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
+-{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
+-{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
+-{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
+-{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
+-{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
+-{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
+-};
+-
+-static int snd_bcm2835_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
+- unsigned int size, unsigned int __user *tlv)
+-{
+- unsigned int __user *dst;
+- int count = 0;
+- int i;
+-
+- if (size < 8)
+- return -ENOMEM;
+- if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
+- return -EFAULT;
+- size -= 8;
+- dst = tlv + 2;
+- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
+- struct cea_channel_speaker_allocation *ch = &channel_allocations[i];
+- int num_chs = 0;
+- int chs_bytes;
+- int c;
+-
+- for (c = 0; c < 8; c++) {
+- if (ch->speakers[c])
+- num_chs++;
+- }
+-
+- chs_bytes = num_chs * 4;
+- if (size < 8)
+- return -ENOMEM;
+- if (put_user(SNDRV_CTL_TLVT_CHMAP_FIXED, dst) ||
+- put_user(chs_bytes, dst + 1))
+- return -EFAULT;
+- dst += 2;
+- size -= 8;
+- count += 8;
+- if (size < chs_bytes)
+- return -ENOMEM;
+- size -= chs_bytes;
+- count += chs_bytes;
+- for (c = 0; c < 8; c++) {
+- int sp = ch->speakers[7 - c];
+- if (sp) {
+- if (put_user(sp, dst))
+- return -EFAULT;
+- dst++;
+- }
+- }
+- }
+- if (put_user(count, tlv + 1))
+- return -EFAULT;
+- return 0;
+-}
+-
+-static int snd_bcm2835_chmap_ctl_get(struct snd_kcontrol *kcontrol,
+- struct snd_ctl_elem_value *ucontrol)
+-{
+- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
+- bcm2835_chip_t *chip = info->private_data;
+- unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
+- struct snd_pcm_substream *substream = snd_pcm_chmap_substream(info, idx);
+- struct cea_channel_speaker_allocation *ch = NULL;
+- int res = 0;
+- int cur = 0;
+- int i;
+-
+- if (mutex_lock_interruptible(&chip->audio_mutex))
+- return -EINTR;
+-
+- if (!substream || !substream->runtime) {
+- res = -ENODEV;
+- goto unlock;
+- }
+-
+- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
+- if (channel_allocations[i].ca_index == chip->cea_chmap)
+- ch = &channel_allocations[i];
+- }
+-
+- /* If no layout was set yet, return a dummy. Apparently the userspace
+- * API will be confused if we don't. */
+- if (!ch)
+- ch = &channel_allocations[0];
+-
+- for (i = 0; i < 8; i++) {
+- if (ch->speakers[7 - i])
+- ucontrol->value.integer.value[cur++] = ch->speakers[7 - i];
+- }
+- while (cur < 8)
+- ucontrol->value.integer.value[cur++] = SNDRV_CHMAP_NA;
+-
+-unlock:
+- mutex_unlock(&chip->audio_mutex);
+- return res;
+-}
+-
+-static int snd_bcm2835_chmap_ctl_put(struct snd_kcontrol *kcontrol,
+- struct snd_ctl_elem_value *ucontrol)
+-{
+- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
+- bcm2835_chip_t *chip = info->private_data;
+- unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
+- struct snd_pcm_substream *substream = snd_pcm_chmap_substream(info, idx);
+- int i, prepared = 0, cea_chmap = -1;
+- int res = 0;
+- int remap[8];
+-
+- if (mutex_lock_interruptible(&chip->audio_mutex))
+- return -EINTR;
+-
+- if (!substream || !substream->runtime) {
+- res = -ENODEV;
+- goto unlock;
+- }
+-
+- switch (substream->runtime->status->state) {
+- case SNDRV_PCM_STATE_OPEN:
+- case SNDRV_PCM_STATE_SETUP:
+- break;
+- case SNDRV_PCM_STATE_PREPARED:
+- prepared = 1;
+- break;
+- default:
+- res = -EBUSY;
+- goto unlock;
+- }
+-
+- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
+- struct cea_channel_speaker_allocation *ch = &channel_allocations[i];
+- int matches = 1;
+- int cur = 0;
+- int x;
+- memset(remap, 0, sizeof(remap));
+- for (x = 0; x < substream->runtime->channels; x++) {
+- int sp = ucontrol->value.integer.value[x];
+- while (cur < 8 && !ch->speakers[7 - cur])
+- cur++;
+- if (cur >= 8) {
+- /* user has more channels than ch */
+- matches = 0;
+- break;
+- }
+- if (ch->speakers[7 - cur] != sp) {
+- matches = 0;
+- break;
+- }
+- remap[x] = cur;
+- cur++;
+- }
+- for (x = cur; x < 8; x++) {
+- if (ch->speakers[7 - x]) {
+- /* ch has more channels than user */
+- matches = 0;
+- break;
+- }
+- }
+- if (matches) {
+- cea_chmap = ch->ca_index;
+- break;
+- }
+- }
+-
+- if (cea_chmap < 0) {
+- res = -EINVAL;
+- goto unlock;
+- }
+-
+- /* don't change the layout if another substream is active */
+- if (chip->opened != (1 << substream->number) && chip->cea_chmap != cea_chmap) {
+- res = -EBUSY; /* unsure whether this is a good error code */
+- goto unlock;
+- }
+-
+- chip->cea_chmap = cea_chmap;
+- for (i = 0; i < 8; i++)
+- chip->map_channels[i] = remap[i];
+- if (prepared)
+- snd_bcm2835_pcm_prepare_again(substream);
+-
+-unlock:
+- mutex_unlock(&chip->audio_mutex);
+- return res;
+-}
+-
+-static int snd_bcm2835_add_chmap_ctl(bcm2835_chip_t * chip)
+-{
+- struct snd_pcm_chmap *chmap;
+- struct snd_kcontrol *kctl;
+- int err, i;
+-
+- err = snd_pcm_add_chmap_ctls(chip->pcm,
+- SNDRV_PCM_STREAM_PLAYBACK,
+- NULL, 8, 0, &chmap);
+- if (err < 0)
+- return err;
+- /* override handlers */
+- chmap->private_data = chip;
+- kctl = chmap->kctl;
+- for (i = 0; i < kctl->count; i++)
+- kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
+- kctl->get = snd_bcm2835_chmap_ctl_get;
+- kctl->put = snd_bcm2835_chmap_ctl_put;
+- kctl->tlv.c = snd_bcm2835_chmap_ctl_tlv;
+- return 0;
+-}
+-
+ int snd_bcm2835_new_ctl(bcm2835_chip_t * chip)
+ {
+ int err;
+@@ -638,7 +340,6 @@ int snd_bcm2835_new_ctl(bcm2835_chip_t *
+ if (err < 0)
+ return err;
+ }
+- snd_bcm2835_add_chmap_ctl(chip);
+ for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_spdif); idx++) {
+ err = snd_ctl_add(chip->card,
+ snd_ctl_new1(&snd_bcm2835_spdif[idx], chip));
+--- a/sound/arm/bcm2835-pcm.c
++++ b/sound/arm/bcm2835-pcm.c
+@@ -19,9 +19,6 @@
+
+ #include "bcm2835.h"
+
+-/* The hardware can not do much more num_channels*samplerate then this value */
+-#define MAX_COMBINED_RATE 768000
+-
+ /* hardware definition */
+ static struct snd_pcm_hardware snd_bcm2835_playback_hw = {
+ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
+@@ -110,31 +107,6 @@ static irqreturn_t bcm2835_playback_fifo
+ return IRQ_HANDLED;
+ }
+
+-
+-static int rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
+- struct snd_pcm_hw_rule *rule)
+-{
+- struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+- struct snd_interval rates = {
+- .min = 8000,
+- .max = min(192000u, MAX_COMBINED_RATE / max(channels->min, 1u)),
+- };
+- struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
+- return snd_interval_refine(rate, &rates);
+-}
+-
+-static int rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
+- struct snd_pcm_hw_rule *rule)
+-{
+- struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
+- struct snd_interval channels_interval = {
+- .min = 1,
+- .max = min(8u, MAX_COMBINED_RATE / max(rate->min, 1u)),
+- };
+- struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+- return snd_interval_refine(channels, &channels_interval);
+-}
+-
+ /* open callback */
+ static int snd_bcm2835_playback_open_generic(
+ struct snd_pcm_substream *substream, int spdif)
+@@ -216,24 +188,8 @@ static int snd_bcm2835_playback_open_gen
+ snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+ 16);
+
+- /* When playing PCM, pretend that we support the full range of channels
+- * and sample rates. The GPU can't output it, but is able to resample
+- * the data to a rate the hardware can handle it. This won't work with
+- * compressed data; the resampler would just destroy it. */
+- if (spdif) {
+- err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
+- rate_hw_constraint_rate, NULL,
+- SNDRV_PCM_HW_PARAM_CHANNELS, -1);
+- err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
+- rate_hw_constraint_channels, NULL,
+- SNDRV_PCM_HW_PARAM_RATE, -1);
+- }
+-
+ chip->alsa_stream[idx] = alsa_stream;
+
+- if (!chip->opened)
+- chip->cea_chmap = -1;
+-
+ chip->opened |= (1 << idx);
+ alsa_stream->open = 1;
+ alsa_stream->draining = 1;
+@@ -344,7 +300,8 @@ static int snd_bcm2835_pcm_hw_free(struc
+ return snd_pcm_lib_free_pages(substream);
+ }
+
+-int snd_bcm2835_pcm_prepare_again(struct snd_pcm_substream *substream)
++/* prepare callback */
++static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream)
+ {
+ bcm2835_chip_t *chip = snd_pcm_substream_chip(substream);
+ struct snd_pcm_runtime *runtime = substream->runtime;
+@@ -352,6 +309,11 @@ int snd_bcm2835_pcm_prepare_again(struct
+ int channels;
+ int err;
+
++ audio_info(" .. IN\n");
++
++ if (mutex_lock_interruptible(&chip->audio_mutex))
++ return -EINTR;
++
+ /* notify the vchiq that it should enter spdif passthrough mode by
+ * setting channels=0 (see
+ * https://github.com/raspberrypi/linux/issues/528) */
+@@ -367,23 +329,6 @@ int snd_bcm2835_pcm_prepare_again(struct
+ audio_error(" error setting hw params\n");
+ }
+
+- return err;
+-}
+-
+-/* prepare callback */
+-static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream)
+-{
+- bcm2835_chip_t *chip = snd_pcm_substream_chip(substream);
+- struct snd_pcm_runtime *runtime = substream->runtime;
+- bcm2835_alsa_stream_t *alsa_stream = runtime->private_data;
+-
+- audio_info(" .. IN\n");
+-
+- if (mutex_lock_interruptible(&chip->audio_mutex))
+- return -EINTR;
+-
+- snd_bcm2835_pcm_prepare_again(substream);
+-
+ bcm2835_audio_setup(alsa_stream);
+
+ /* in preparation of the stream, set the controls (volume level) of the stream */
+--- a/sound/arm/bcm2835-vchiq.c
++++ b/sound/arm/bcm2835-vchiq.c
+@@ -570,8 +570,6 @@ int bcm2835_audio_set_params(bcm2835_als
+ VC_AUDIO_MSG_T m;
+ AUDIO_INSTANCE_T *instance = alsa_stream->instance;
+ int32_t success;
+- uint32_t chmap_value;
+- int i;
+ int ret;
+ LOG_DBG(" .. IN\n");
+
+@@ -595,21 +593,10 @@ int bcm2835_audio_set_params(bcm2835_als
+
+ instance->result = -1;
+
+- if (alsa_stream->chip->cea_chmap >= 0) {
+- chmap_value = (unsigned)alsa_stream->chip->cea_chmap << 24;
+- } else {
+- chmap_value = 0; /* force stereo */
+- for (i = 0; i < 8; i++)
+- alsa_stream->chip->map_channels[i] = i;
+- }
+- for (i = 0; i < 8; i++)
+- chmap_value |= alsa_stream->chip->map_channels[i] << (i * 3);
+-
+ m.type = VC_AUDIO_MSG_TYPE_CONFIG;
+ m.u.config.channels = channels;
+ m.u.config.samplerate = samplerate;
+ m.u.config.bps = bps;
+- m.u.config.channelmap = chmap_value;
+
+ /* Create the message available completion */
+ init_completion(&instance->msg_avail_comp);
+--- a/sound/arm/bcm2835.h
++++ b/sound/arm/bcm2835.h
+@@ -107,8 +107,6 @@ typedef struct bcm2835_chip {
+ int old_volume; /* stores the volume value whist muted */
+ int dest;
+ int mute;
+- int cea_chmap; /* currently requested Audio InfoFrame Data Byte 4 */
+- int map_channels[8];
+
+ unsigned int opened;
+ unsigned int spdif_status;
+@@ -151,8 +149,6 @@ int snd_bcm2835_new_ctl(bcm2835_chip_t *
+ int snd_bcm2835_new_pcm(bcm2835_chip_t * chip);
+ int snd_bcm2835_new_spdif_pcm(bcm2835_chip_t * chip);
+
+-int snd_bcm2835_pcm_prepare_again(struct snd_pcm_substream *substream);
+-
+ int bcm2835_audio_open(bcm2835_alsa_stream_t * alsa_stream);
+ int bcm2835_audio_close(bcm2835_alsa_stream_t * alsa_stream);
+ int bcm2835_audio_set_params(bcm2835_alsa_stream_t * alsa_stream,
+++ /dev/null
-From 336129ed3ae12518df30c332a500ffe1739af4df Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:27:37 +0100
-Subject: [PATCH 315/381] Revert "bcm2835: interpolate audio delay"
-
-This reverts commit 83eca613d0eddd2c8299f114b8fe573ccaffdefc.
----
- sound/arm/bcm2835-pcm.c | 12 +-----------
- sound/arm/bcm2835.h | 1 -
- 2 files changed, 1 insertion(+), 12 deletions(-)
-
---- a/sound/arm/bcm2835-pcm.c
-+++ b/sound/arm/bcm2835-pcm.c
-@@ -25,7 +25,7 @@
- /* hardware definition */
- static struct snd_pcm_hardware snd_bcm2835_playback_hw = {
- .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
-- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH),
-+ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID),
- .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
- .rate_min = 8000,
-@@ -99,8 +99,6 @@ static irqreturn_t bcm2835_playback_fifo
- alsa_stream->pos %= alsa_stream->buffer_size;
- }
-
-- alsa_stream->interpolate_start = ktime_get_ns();
--
- if (alsa_stream->substream) {
- if (new_period)
- snd_pcm_period_elapsed(alsa_stream->substream);
-@@ -401,7 +399,6 @@ static int snd_bcm2835_pcm_prepare(struc
- alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream);
- alsa_stream->period_size = snd_pcm_lib_period_bytes(substream);
- alsa_stream->pos = 0;
-- alsa_stream->interpolate_start = ktime_get_ns();
-
- audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n",
- alsa_stream->buffer_size, alsa_stream->period_size,
-@@ -498,7 +495,6 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s
- {
- struct snd_pcm_runtime *runtime = substream->runtime;
- bcm2835_alsa_stream_t *alsa_stream = runtime->private_data;
-- u64 now = ktime_get_ns();
-
- audio_info(" .. IN\n");
-
-@@ -507,12 +503,6 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s
- frames_to_bytes(runtime, runtime->control->appl_ptr),
- alsa_stream->pos);
-
-- /* Give userspace better delay reporting by interpolating between GPU
-- * notifications, assuming audio speed is close enough to the clock
-- * used for ktime */
-- if (alsa_stream->interpolate_start && alsa_stream->interpolate_start < now)
-- runtime->delay = -(int)div_u64((now - alsa_stream->interpolate_start) * runtime->rate, 1000000000);
--
- audio_info(" .. OUT\n");
- return snd_pcm_indirect_playback_pointer(substream,
- &alsa_stream->pcm_indirect,
---- a/sound/arm/bcm2835.h
-+++ b/sound/arm/bcm2835.h
-@@ -137,7 +137,6 @@ typedef struct bcm2835_alsa_stream {
- unsigned int pos;
- unsigned int buffer_size;
- unsigned int period_size;
-- u64 interpolate_start;
-
- uint32_t enable_fifo_irq;
- irq_handler_t fifo_irq_handler;
--- /dev/null
+From c46ed63ab5c1c24f3732aa410e9b9661d4c18ce7 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 29 Apr 2016 17:30:00 +0100
+Subject: [PATCH 316/423] Revert "bcm2835: extend allowed range of channels and
+ samplerates"
+
+This reverts commit 688a5f0daa45e0a51b324707768d472e1d715c13.
+---
+ sound/arm/bcm2835-pcm.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/sound/arm/bcm2835-pcm.c
++++ b/sound/arm/bcm2835-pcm.c
+@@ -26,9 +26,9 @@ static struct snd_pcm_hardware snd_bcm28
+ .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 8000,
+- .rate_max = 192000,
++ .rate_max = 48000,
+ .channels_min = 1,
+- .channels_max = 8,
++ .channels_max = 2,
+ .buffer_bytes_max = 128 * 1024,
+ .period_bytes_min = 1 * 1024,
+ .period_bytes_max = 128 * 1024,
+@@ -43,9 +43,9 @@ static struct snd_pcm_hardware snd_bcm28
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 |
+ SNDRV_PCM_RATE_48000,
+ .rate_min = 44100,
+- .rate_max = 192000,
++ .rate_max = 48000,
+ .channels_min = 2,
+- .channels_max = 8,
++ .channels_max = 2,
+ .buffer_bytes_max = 128 * 1024,
+ .period_bytes_min = 1 * 1024,
+ .period_bytes_max = 128 * 1024,
+++ /dev/null
-From 9d56f11061a9d2598dd0c7a20886e3d5f76fa7a0 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:28:06 +0100
-Subject: [PATCH 316/381] Revert "bcm2835: only allow stereo if analogue jack
- is selected"
-
-This reverts commit 5f7049894f47b3836838cd68e29ee883179c80b3.
----
- sound/arm/bcm2835-ctl.c | 12 ------------
- 1 file changed, 12 deletions(-)
-
---- a/sound/arm/bcm2835-ctl.c
-+++ b/sound/arm/bcm2835-ctl.c
-@@ -423,16 +423,9 @@ static struct cea_channel_speaker_alloca
- { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
- };
-
--static int uses_analogue(bcm2835_chip_t *chip)
--{
-- return chip->dest == 1;
--}
--
- static int snd_bcm2835_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
- unsigned int size, unsigned int __user *tlv)
- {
-- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
-- bcm2835_chip_t *chip = info->private_data;
- unsigned int __user *dst;
- int count = 0;
- int i;
-@@ -449,9 +442,6 @@ static int snd_bcm2835_chmap_ctl_tlv(str
- int chs_bytes;
- int c;
-
-- if (i > 0 && uses_analogue(chip))
-- break;
--
- for (c = 0; c < 8; c++) {
- if (ch->speakers[c])
- num_chs++;
-@@ -562,8 +552,6 @@ static int snd_bcm2835_chmap_ctl_put(str
- int matches = 1;
- int cur = 0;
- int x;
-- if (i > 0 && uses_analogue(chip))
-- break;
- memset(remap, 0, sizeof(remap));
- for (x = 0; x < substream->runtime->channels; x++) {
- int sp = ucontrol->value.integer.value[x];
+++ /dev/null
-From 6a35e00dde80fc9c6007d8cec6a1113aafdabd1c Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:28:08 +0100
-Subject: [PATCH 317/381] Revert "bcm2835: always use 2/4/8 channels for
- multichannel layouts"
-
-This reverts commit 06931f74092d86087144f070b06a4444df8b444b.
----
- sound/arm/bcm2835-ctl.c | 89 ++++++++++++++++++++++++-------------------------
- 1 file changed, 44 insertions(+), 45 deletions(-)
-
---- a/sound/arm/bcm2835-ctl.c
-+++ b/sound/arm/bcm2835-ctl.c
-@@ -349,7 +349,6 @@ struct cea_channel_speaker_allocation {
- #define FRW SNDRV_CHMAP_FRW
- #define TC SNDRV_CHMAP_TC
- #define FCH SNDRV_CHMAP_TFC
--#define NA SNDRV_CHMAP_NA
-
- /*
- * CEA-861 channel maps
-@@ -357,69 +356,69 @@ struct cea_channel_speaker_allocation {
- * Stolen from sound/pci/hda/patch_hdmi.c
- * (unlike the source, this uses SNDRV_* constants directly, as by the
- * map_tables array in patch_hdmi.c)
-- * Entries which do not have a physical output channel use 0. Entries which
-- * require userspace to output silence use NA (SNDRV_CHMAP_NA).
-+ * Unknown entries use 0, which unfortunately is SNDRV_CHMAP_UNKNOWN instead
-+ * of SNDRV_CHMAP_NA.
- */
- static struct cea_channel_speaker_allocation channel_allocations[] = {
- /* channel: 7 6 5 4 3 2 1 0 */
- { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
- /* 2.1 */
--{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, NA, LFE, FR, FL } },
-+{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
- /* Dolby Surround */
--{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, NA, FR, FL } },
-+{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
- /* surround40 */
--{ .ca_index = 0x08, .speakers = { NA, NA, RR, RL, NA, NA, FR, FL } },
-+{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
- /* surround41 */
--{ .ca_index = 0x09, .speakers = { NA, NA, RR, RL, NA, LFE, FR, FL } },
-+{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
- /* surround50 */
--{ .ca_index = 0x0a, .speakers = { NA, NA, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
- /* surround51 */
--{ .ca_index = 0x0b, .speakers = { NA, NA, RR, RL, FC, LFE, FR, FL } },
-+{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
- /* 6.1 */
--{ .ca_index = 0x0f, .speakers = { NA, RC, RR, RL, FC, LFE, FR, FL } },
-+{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
- /* surround71 */
- { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
-
--{ .ca_index = 0x03, .speakers = { NA, NA, NA, NA, FC, LFE, FR, FL } },
--{ .ca_index = 0x04, .speakers = { NA, NA, NA, RC, NA, NA, FR, FL } },
--{ .ca_index = 0x05, .speakers = { NA, NA, NA, RC, NA, LFE, FR, FL } },
--{ .ca_index = 0x06, .speakers = { NA, NA, NA, RC, FC, NA, FR, FL } },
--{ .ca_index = 0x07, .speakers = { NA, NA, NA, RC, FC, LFE, FR, FL } },
--{ .ca_index = 0x0c, .speakers = { NA, RC, RR, RL, NA, NA, FR, FL } },
--{ .ca_index = 0x0d, .speakers = { NA, RC, RR, RL, NA, LFE, FR, FL } },
--{ .ca_index = 0x0e, .speakers = { NA, RC, RR, RL, FC, NA, FR, FL } },
--{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, NA, NA, FR, FL } },
--{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, NA, LFE, FR, FL } },
--{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, NA, FR, FL } },
--{ .ca_index = 0x14, .speakers = { FRC, FLC, NA, NA, NA, NA, FR, FL } },
--{ .ca_index = 0x15, .speakers = { FRC, FLC, NA, NA, NA, LFE, FR, FL } },
--{ .ca_index = 0x16, .speakers = { FRC, FLC, NA, NA, FC, NA, FR, FL } },
--{ .ca_index = 0x17, .speakers = { FRC, FLC, NA, NA, FC, LFE, FR, FL } },
--{ .ca_index = 0x18, .speakers = { FRC, FLC, NA, RC, NA, NA, FR, FL } },
--{ .ca_index = 0x19, .speakers = { FRC, FLC, NA, RC, NA, LFE, FR, FL } },
--{ .ca_index = 0x1a, .speakers = { FRC, FLC, NA, RC, FC, NA, FR, FL } },
--{ .ca_index = 0x1b, .speakers = { FRC, FLC, NA, RC, FC, LFE, FR, FL } },
--{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, NA, NA, FR, FL } },
--{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, NA, LFE, FR, FL } },
--{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
-+{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
-+{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
-+{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
-+{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
-+{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
-+{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
-+{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
-+{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
-+{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
-+{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
-+{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
-+{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
-+{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
-+{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
-+{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
-+{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
-+{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
-+{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
-+{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
-+{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
-+{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
- { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x20, .speakers = { NA, FCH, RR, RL, FC, NA, FR, FL } },
--{ .ca_index = 0x21, .speakers = { NA, FCH, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x22, .speakers = { TC, NA, RR, RL, FC, NA, FR, FL } },
--{ .ca_index = 0x23, .speakers = { TC, NA, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, NA, NA, FR, FL } },
--{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, NA, LFE, FR, FL } },
--{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, NA, NA, FR, FL } },
--{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, NA, LFE, FR, FL } },
--{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
-+{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
-+{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
-+{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
-+{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
-+{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
-+{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
-+{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
-+{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
- { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
- { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
- { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
- { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, NA, FR, FL } },
-+{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
- { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
- };
-
--- /dev/null
+From b9e91e565c8c05abec932a3d1bcb9bab81570ad6 Mon Sep 17 00:00:00 2001
+From: Sakari Ailus <sakari.ailus@linux.intel.com>
+Date: Sun, 3 Apr 2016 16:31:03 -0300
+Subject: [PATCH 317/423] videobuf2-v4l2: Verify planes array in buffer
+ dequeueing
+
+commit 2c1f6951a8a82e6de0d82b1158b5e493fc6c54ab upstream.
+
+When a buffer is being dequeued using VIDIOC_DQBUF IOCTL, the exact buffer
+which will be dequeued is not known until the buffer has been removed from
+the queue. The number of planes is specific to a buffer, not to the queue.
+
+This does lead to the situation where multi-plane buffers may be requested
+and queued with n planes, but VIDIOC_DQBUF IOCTL may be passed an argument
+struct with fewer planes.
+
+__fill_v4l2_buffer() however uses the number of planes from the dequeued
+videobuf2 buffer, overwriting kernel memory (the m.planes array allocated
+in video_usercopy() in v4l2-ioctl.c) if the user provided fewer
+planes than the dequeued buffer had. Oops!
+
+Fixes: b0e0e1f83de3 ("[media] media: videobuf2: Prepare to divide videobuf2")
+
+Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
+Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/media/v4l2-core/videobuf2-v4l2.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/media/v4l2-core/videobuf2-v4l2.c
++++ b/drivers/media/v4l2-core/videobuf2-v4l2.c
+@@ -67,6 +67,11 @@ static int __verify_planes_array(struct
+ return 0;
+ }
+
++static int __verify_planes_array_core(struct vb2_buffer *vb, const void *pb)
++{
++ return __verify_planes_array(vb, pb);
++}
++
+ /**
+ * __verify_length() - Verify that the bytesused value for each plane fits in
+ * the plane length and that the data offset doesn't exceed the bytesused value.
+@@ -432,6 +437,7 @@ static int __fill_vb2_buffer(struct vb2_
+ }
+
+ static const struct vb2_buf_ops v4l2_buf_ops = {
++ .verify_planes_array = __verify_planes_array_core,
+ .fill_user_buffer = __fill_v4l2_buffer,
+ .fill_vb2_buffer = __fill_vb2_buffer,
+ .set_timestamp = __set_timestamp,
+++ /dev/null
-From 54dc243ad6ea802967fd4efdb4f75facc19fa950 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:29:03 +0100
-Subject: [PATCH 318/381] Revert "bcm2835: implement channel map API"
-
-This reverts commit 5efba3f8c180c39609a8d40033ef92046ef0de75.
----
- sound/arm/bcm2835-ctl.c | 299 ----------------------------------------------
- sound/arm/bcm2835-pcm.c | 69 ++---------
- sound/arm/bcm2835-vchiq.c | 13 --
- sound/arm/bcm2835.h | 4 -
- 4 files changed, 7 insertions(+), 378 deletions(-)
-
---- a/sound/arm/bcm2835-ctl.c
-+++ b/sound/arm/bcm2835-ctl.c
-@@ -327,304 +327,6 @@ static struct snd_kcontrol_new snd_bcm28
- },
- };
-
--struct cea_channel_speaker_allocation {
-- int ca_index;
-- int speakers[8];
--};
--
--#define FL SNDRV_CHMAP_FL
--#define FR SNDRV_CHMAP_FR
--#define RL SNDRV_CHMAP_RL
--#define RR SNDRV_CHMAP_RR
--#define LFE SNDRV_CHMAP_LFE
--#define FC SNDRV_CHMAP_FC
--#define RLC SNDRV_CHMAP_RLC
--#define RRC SNDRV_CHMAP_RRC
--#define RC SNDRV_CHMAP_RC
--#define FLC SNDRV_CHMAP_FLC
--#define FRC SNDRV_CHMAP_FRC
--#define FLH SNDRV_CHMAP_TFL
--#define FRH SNDRV_CHMAP_TFR
--#define FLW SNDRV_CHMAP_FLW
--#define FRW SNDRV_CHMAP_FRW
--#define TC SNDRV_CHMAP_TC
--#define FCH SNDRV_CHMAP_TFC
--
--/*
-- * CEA-861 channel maps
-- *
-- * Stolen from sound/pci/hda/patch_hdmi.c
-- * (unlike the source, this uses SNDRV_* constants directly, as by the
-- * map_tables array in patch_hdmi.c)
-- * Unknown entries use 0, which unfortunately is SNDRV_CHMAP_UNKNOWN instead
-- * of SNDRV_CHMAP_NA.
-- */
--static struct cea_channel_speaker_allocation channel_allocations[] = {
--/* channel: 7 6 5 4 3 2 1 0 */
--{ .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
-- /* 2.1 */
--{ .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
-- /* Dolby Surround */
--{ .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
-- /* surround40 */
--{ .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
-- /* surround41 */
--{ .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
-- /* surround50 */
--{ .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
-- /* surround51 */
--{ .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
-- /* 6.1 */
--{ .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
-- /* surround71 */
--{ .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
--
--{ .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
--{ .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
--{ .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
--{ .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
--{ .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
--{ .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
--{ .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
--{ .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
--{ .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
--{ .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
--{ .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
--{ .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
--{ .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
--{ .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
--{ .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
--{ .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
--{ .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
--{ .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
--{ .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
--{ .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
--{ .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
--{ .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
--{ .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
--{ .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
--{ .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
--{ .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
--};
--
--static int snd_bcm2835_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
-- unsigned int size, unsigned int __user *tlv)
--{
-- unsigned int __user *dst;
-- int count = 0;
-- int i;
--
-- if (size < 8)
-- return -ENOMEM;
-- if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
-- return -EFAULT;
-- size -= 8;
-- dst = tlv + 2;
-- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
-- struct cea_channel_speaker_allocation *ch = &channel_allocations[i];
-- int num_chs = 0;
-- int chs_bytes;
-- int c;
--
-- for (c = 0; c < 8; c++) {
-- if (ch->speakers[c])
-- num_chs++;
-- }
--
-- chs_bytes = num_chs * 4;
-- if (size < 8)
-- return -ENOMEM;
-- if (put_user(SNDRV_CTL_TLVT_CHMAP_FIXED, dst) ||
-- put_user(chs_bytes, dst + 1))
-- return -EFAULT;
-- dst += 2;
-- size -= 8;
-- count += 8;
-- if (size < chs_bytes)
-- return -ENOMEM;
-- size -= chs_bytes;
-- count += chs_bytes;
-- for (c = 0; c < 8; c++) {
-- int sp = ch->speakers[7 - c];
-- if (sp) {
-- if (put_user(sp, dst))
-- return -EFAULT;
-- dst++;
-- }
-- }
-- }
-- if (put_user(count, tlv + 1))
-- return -EFAULT;
-- return 0;
--}
--
--static int snd_bcm2835_chmap_ctl_get(struct snd_kcontrol *kcontrol,
-- struct snd_ctl_elem_value *ucontrol)
--{
-- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
-- bcm2835_chip_t *chip = info->private_data;
-- unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
-- struct snd_pcm_substream *substream = snd_pcm_chmap_substream(info, idx);
-- struct cea_channel_speaker_allocation *ch = NULL;
-- int res = 0;
-- int cur = 0;
-- int i;
--
-- if (mutex_lock_interruptible(&chip->audio_mutex))
-- return -EINTR;
--
-- if (!substream || !substream->runtime) {
-- res = -ENODEV;
-- goto unlock;
-- }
--
-- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
-- if (channel_allocations[i].ca_index == chip->cea_chmap)
-- ch = &channel_allocations[i];
-- }
--
-- /* If no layout was set yet, return a dummy. Apparently the userspace
-- * API will be confused if we don't. */
-- if (!ch)
-- ch = &channel_allocations[0];
--
-- for (i = 0; i < 8; i++) {
-- if (ch->speakers[7 - i])
-- ucontrol->value.integer.value[cur++] = ch->speakers[7 - i];
-- }
-- while (cur < 8)
-- ucontrol->value.integer.value[cur++] = SNDRV_CHMAP_NA;
--
--unlock:
-- mutex_unlock(&chip->audio_mutex);
-- return res;
--}
--
--static int snd_bcm2835_chmap_ctl_put(struct snd_kcontrol *kcontrol,
-- struct snd_ctl_elem_value *ucontrol)
--{
-- struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
-- bcm2835_chip_t *chip = info->private_data;
-- unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
-- struct snd_pcm_substream *substream = snd_pcm_chmap_substream(info, idx);
-- int i, prepared = 0, cea_chmap = -1;
-- int res = 0;
-- int remap[8];
--
-- if (mutex_lock_interruptible(&chip->audio_mutex))
-- return -EINTR;
--
-- if (!substream || !substream->runtime) {
-- res = -ENODEV;
-- goto unlock;
-- }
--
-- switch (substream->runtime->status->state) {
-- case SNDRV_PCM_STATE_OPEN:
-- case SNDRV_PCM_STATE_SETUP:
-- break;
-- case SNDRV_PCM_STATE_PREPARED:
-- prepared = 1;
-- break;
-- default:
-- res = -EBUSY;
-- goto unlock;
-- }
--
-- for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
-- struct cea_channel_speaker_allocation *ch = &channel_allocations[i];
-- int matches = 1;
-- int cur = 0;
-- int x;
-- memset(remap, 0, sizeof(remap));
-- for (x = 0; x < substream->runtime->channels; x++) {
-- int sp = ucontrol->value.integer.value[x];
-- while (cur < 8 && !ch->speakers[7 - cur])
-- cur++;
-- if (cur >= 8) {
-- /* user has more channels than ch */
-- matches = 0;
-- break;
-- }
-- if (ch->speakers[7 - cur] != sp) {
-- matches = 0;
-- break;
-- }
-- remap[x] = cur;
-- cur++;
-- }
-- for (x = cur; x < 8; x++) {
-- if (ch->speakers[7 - x]) {
-- /* ch has more channels than user */
-- matches = 0;
-- break;
-- }
-- }
-- if (matches) {
-- cea_chmap = ch->ca_index;
-- break;
-- }
-- }
--
-- if (cea_chmap < 0) {
-- res = -EINVAL;
-- goto unlock;
-- }
--
-- /* don't change the layout if another substream is active */
-- if (chip->opened != (1 << substream->number) && chip->cea_chmap != cea_chmap) {
-- res = -EBUSY; /* unsure whether this is a good error code */
-- goto unlock;
-- }
--
-- chip->cea_chmap = cea_chmap;
-- for (i = 0; i < 8; i++)
-- chip->map_channels[i] = remap[i];
-- if (prepared)
-- snd_bcm2835_pcm_prepare_again(substream);
--
--unlock:
-- mutex_unlock(&chip->audio_mutex);
-- return res;
--}
--
--static int snd_bcm2835_add_chmap_ctl(bcm2835_chip_t * chip)
--{
-- struct snd_pcm_chmap *chmap;
-- struct snd_kcontrol *kctl;
-- int err, i;
--
-- err = snd_pcm_add_chmap_ctls(chip->pcm,
-- SNDRV_PCM_STREAM_PLAYBACK,
-- NULL, 8, 0, &chmap);
-- if (err < 0)
-- return err;
-- /* override handlers */
-- chmap->private_data = chip;
-- kctl = chmap->kctl;
-- for (i = 0; i < kctl->count; i++)
-- kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
-- kctl->get = snd_bcm2835_chmap_ctl_get;
-- kctl->put = snd_bcm2835_chmap_ctl_put;
-- kctl->tlv.c = snd_bcm2835_chmap_ctl_tlv;
-- return 0;
--}
--
- int snd_bcm2835_new_ctl(bcm2835_chip_t * chip)
- {
- int err;
-@@ -638,7 +340,6 @@ int snd_bcm2835_new_ctl(bcm2835_chip_t *
- if (err < 0)
- return err;
- }
-- snd_bcm2835_add_chmap_ctl(chip);
- for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_spdif); idx++) {
- err = snd_ctl_add(chip->card,
- snd_ctl_new1(&snd_bcm2835_spdif[idx], chip));
---- a/sound/arm/bcm2835-pcm.c
-+++ b/sound/arm/bcm2835-pcm.c
-@@ -19,9 +19,6 @@
-
- #include "bcm2835.h"
-
--/* The hardware can not do much more num_channels*samplerate then this value */
--#define MAX_COMBINED_RATE 768000
--
- /* hardware definition */
- static struct snd_pcm_hardware snd_bcm2835_playback_hw = {
- .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
-@@ -110,31 +107,6 @@ static irqreturn_t bcm2835_playback_fifo
- return IRQ_HANDLED;
- }
-
--
--static int rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
-- struct snd_pcm_hw_rule *rule)
--{
-- struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
-- struct snd_interval rates = {
-- .min = 8000,
-- .max = min(192000u, MAX_COMBINED_RATE / max(channels->min, 1u)),
-- };
-- struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
-- return snd_interval_refine(rate, &rates);
--}
--
--static int rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
-- struct snd_pcm_hw_rule *rule)
--{
-- struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
-- struct snd_interval channels_interval = {
-- .min = 1,
-- .max = min(8u, MAX_COMBINED_RATE / max(rate->min, 1u)),
-- };
-- struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
-- return snd_interval_refine(channels, &channels_interval);
--}
--
- /* open callback */
- static int snd_bcm2835_playback_open_generic(
- struct snd_pcm_substream *substream, int spdif)
-@@ -216,24 +188,8 @@ static int snd_bcm2835_playback_open_gen
- snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
- 16);
-
-- /* When playing PCM, pretend that we support the full range of channels
-- * and sample rates. The GPU can't output it, but is able to resample
-- * the data to a rate the hardware can handle it. This won't work with
-- * compressed data; the resampler would just destroy it. */
-- if (spdif) {
-- err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
-- rate_hw_constraint_rate, NULL,
-- SNDRV_PCM_HW_PARAM_CHANNELS, -1);
-- err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
-- rate_hw_constraint_channels, NULL,
-- SNDRV_PCM_HW_PARAM_RATE, -1);
-- }
--
- chip->alsa_stream[idx] = alsa_stream;
-
-- if (!chip->opened)
-- chip->cea_chmap = -1;
--
- chip->opened |= (1 << idx);
- alsa_stream->open = 1;
- alsa_stream->draining = 1;
-@@ -344,7 +300,8 @@ static int snd_bcm2835_pcm_hw_free(struc
- return snd_pcm_lib_free_pages(substream);
- }
-
--int snd_bcm2835_pcm_prepare_again(struct snd_pcm_substream *substream)
-+/* prepare callback */
-+static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream)
- {
- bcm2835_chip_t *chip = snd_pcm_substream_chip(substream);
- struct snd_pcm_runtime *runtime = substream->runtime;
-@@ -352,6 +309,11 @@ int snd_bcm2835_pcm_prepare_again(struct
- int channels;
- int err;
-
-+ audio_info(" .. IN\n");
-+
-+ if (mutex_lock_interruptible(&chip->audio_mutex))
-+ return -EINTR;
-+
- /* notify the vchiq that it should enter spdif passthrough mode by
- * setting channels=0 (see
- * https://github.com/raspberrypi/linux/issues/528) */
-@@ -367,23 +329,6 @@ int snd_bcm2835_pcm_prepare_again(struct
- audio_error(" error setting hw params\n");
- }
-
-- return err;
--}
--
--/* prepare callback */
--static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream)
--{
-- bcm2835_chip_t *chip = snd_pcm_substream_chip(substream);
-- struct snd_pcm_runtime *runtime = substream->runtime;
-- bcm2835_alsa_stream_t *alsa_stream = runtime->private_data;
--
-- audio_info(" .. IN\n");
--
-- if (mutex_lock_interruptible(&chip->audio_mutex))
-- return -EINTR;
--
-- snd_bcm2835_pcm_prepare_again(substream);
--
- bcm2835_audio_setup(alsa_stream);
-
- /* in preparation of the stream, set the controls (volume level) of the stream */
---- a/sound/arm/bcm2835-vchiq.c
-+++ b/sound/arm/bcm2835-vchiq.c
-@@ -570,8 +570,6 @@ int bcm2835_audio_set_params(bcm2835_als
- VC_AUDIO_MSG_T m;
- AUDIO_INSTANCE_T *instance = alsa_stream->instance;
- int32_t success;
-- uint32_t chmap_value;
-- int i;
- int ret;
- LOG_DBG(" .. IN\n");
-
-@@ -595,21 +593,10 @@ int bcm2835_audio_set_params(bcm2835_als
-
- instance->result = -1;
-
-- if (alsa_stream->chip->cea_chmap >= 0) {
-- chmap_value = (unsigned)alsa_stream->chip->cea_chmap << 24;
-- } else {
-- chmap_value = 0; /* force stereo */
-- for (i = 0; i < 8; i++)
-- alsa_stream->chip->map_channels[i] = i;
-- }
-- for (i = 0; i < 8; i++)
-- chmap_value |= alsa_stream->chip->map_channels[i] << (i * 3);
--
- m.type = VC_AUDIO_MSG_TYPE_CONFIG;
- m.u.config.channels = channels;
- m.u.config.samplerate = samplerate;
- m.u.config.bps = bps;
-- m.u.config.channelmap = chmap_value;
-
- /* Create the message available completion */
- init_completion(&instance->msg_avail_comp);
---- a/sound/arm/bcm2835.h
-+++ b/sound/arm/bcm2835.h
-@@ -107,8 +107,6 @@ typedef struct bcm2835_chip {
- int old_volume; /* stores the volume value whist muted */
- int dest;
- int mute;
-- int cea_chmap; /* currently requested Audio InfoFrame Data Byte 4 */
-- int map_channels[8];
-
- unsigned int opened;
- unsigned int spdif_status;
-@@ -151,8 +149,6 @@ int snd_bcm2835_new_ctl(bcm2835_chip_t *
- int snd_bcm2835_new_pcm(bcm2835_chip_t * chip);
- int snd_bcm2835_new_spdif_pcm(bcm2835_chip_t * chip);
-
--int snd_bcm2835_pcm_prepare_again(struct snd_pcm_substream *substream);
--
- int bcm2835_audio_open(bcm2835_alsa_stream_t * alsa_stream);
- int bcm2835_audio_close(bcm2835_alsa_stream_t * alsa_stream);
- int bcm2835_audio_set_params(bcm2835_alsa_stream_t * alsa_stream,
--- /dev/null
+From a336b35810263be890a30356837c75dc54b2e3be Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 6 May 2016 12:32:47 +0100
+Subject: [PATCH 318/423] pinctrl-bcm2835: Return pins to inputs when freed
+
+When dynamically unloading overlays, it is important that freed pins are
+restored to being inputs to prevent functions from being enabled in
+multiple places at once.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -831,6 +831,15 @@ static const struct pinctrl_ops bcm2835_
+ .dt_free_map = bcm2835_pctl_dt_free_map,
+ };
+
++static void bcm2835_pmx_free(struct pinctrl_dev *pctldev,
++ unsigned offset)
++{
++ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable by setting to GPIO_IN */
++ bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
++}
++
+ static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
+ {
+ return BCM2835_FSEL_COUNT;
+@@ -890,6 +899,7 @@ static int bcm2835_pmx_gpio_set_directio
+ }
+
+ static const struct pinmux_ops bcm2835_pmx_ops = {
++ .free = bcm2835_pmx_free,
+ .get_functions_count = bcm2835_pmx_get_functions_count,
+ .get_function_name = bcm2835_pmx_get_function_name,
+ .get_function_groups = bcm2835_pmx_get_function_groups,
--- /dev/null
+From e239ab77f367aff3bcb1d2ed807c438cf0f2ffe8 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 6 May 2016 12:53:16 +0100
+Subject: [PATCH 319/423] BCM270X_DT: i2c0-bcm2708 - pin group params
+
+Add parameters to set pin groups as a unit, setting the pin function
+appropriately. The parameters are:
+ pins_0_1
+ pins_28_29
+ pins_44_45
+ pins_46_47
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/README | 11 ++++--
+ .../arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts | 43 +++++++++++++++++-----
+ 2 files changed, 42 insertions(+), 12 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -449,10 +449,15 @@ Params: ds1307 Select t
+
+
+ Name: i2c0-bcm2708
+-Info: Enable the i2c_bcm2708 driver for the i2c0 bus
++Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations
++ are usable on all platforms.
+ Load: dtoverlay=i2c0-bcm2708,<param>=<val>
+-Params: sda0_pin GPIO pin for SDA0 (0, 28 [or 44] - default 0)
+- scl0_pin GPIO pin for SCL0 (1, 29 [or 45] - default 1)
++Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
++ scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
++ pins_0_1 Use pins 0 and 1 (default)
++ pins_28_29 Use pins 28 and 29
++ pins_44_45 Use pins 44 and 45
++ pins_46_47 Use pins 46 and 47
+
+
+ Name: i2c1-bcm2708
+--- a/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
+@@ -14,23 +14,48 @@
+ fragment@0 {
+ target = <&i2c0>;
+ __overlay__ {
+- pinctrl-0 = <&i2c0_pins>;
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+- target = <&gpio>;
+- __overlay__ {
+- i2c0_pins: i2c0 {
+- brcm,pins = <0 1>;
+- brcm,function = <4>; /* alt0 */
+- };
++ target = <&i2c0_pins>;
++ frag1: __overlay__ {
++ brcm,pins = <0 1>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++
++ fragment@2 {
++ target = <&i2c0_pins>;
++ __dormant__ {
++ brcm,pins = <28 29>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++
++ fragment@3 {
++ target = <&i2c0_pins>;
++ __dormant__ {
++ brcm,pins = <44 45>;
++ brcm,function = <5>; /* alt1 */
++ };
++ };
++
++ fragment@4 {
++ target = <&i2c0_pins>;
++ __dormant__ {
++ brcm,pins = <46 47>;
++ brcm,function = <4>; /* alt0 */
+ };
+ };
+
+ __overrides__ {
+- sda0_pin = <&i2c0_pins>,"brcm,pins:0";
+- scl0_pin = <&i2c0_pins>,"brcm,pins:4";
++ sda0_pin = <&frag1>,"brcm,pins:0";
++ scl0_pin = <&frag1>,"brcm,pins:4";
++ pins_0_1 = <0>,"+1-2-3-4";
++ pins_28_29 = <0>,"-1+2-3-4";
++ pins_44_45 = <0>,"-1-2+3-4";
++ pins_46_47 = <0>,"-1-2-3+4";
+ };
+ };
+++ /dev/null
-From cc475d93be9bf38826d0e091172816c29996fa4c Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 29 Apr 2016 17:30:00 +0100
-Subject: [PATCH 319/381] Revert "bcm2835: extend allowed range of channels and
- samplerates"
-
-This reverts commit 688a5f0daa45e0a51b324707768d472e1d715c13.
----
- sound/arm/bcm2835-pcm.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/sound/arm/bcm2835-pcm.c
-+++ b/sound/arm/bcm2835-pcm.c
-@@ -26,9 +26,9 @@ static struct snd_pcm_hardware snd_bcm28
- .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
- .rate_min = 8000,
-- .rate_max = 192000,
-+ .rate_max = 48000,
- .channels_min = 1,
-- .channels_max = 8,
-+ .channels_max = 2,
- .buffer_bytes_max = 128 * 1024,
- .period_bytes_min = 1 * 1024,
- .period_bytes_max = 128 * 1024,
-@@ -43,9 +43,9 @@ static struct snd_pcm_hardware snd_bcm28
- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 |
- SNDRV_PCM_RATE_48000,
- .rate_min = 44100,
-- .rate_max = 192000,
-+ .rate_max = 48000,
- .channels_min = 2,
-- .channels_max = 8,
-+ .channels_max = 2,
- .buffer_bytes_max = 128 * 1024,
- .period_bytes_min = 1 * 1024,
- .period_bytes_max = 128 * 1024,
--- /dev/null
+From e43e0bc1fe4a0a1c9e02b7a66dc9481e54c6f8cd Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 6 May 2016 12:40:37 +0100
+Subject: [PATCH 320/423] config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -815,6 +815,7 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -807,6 +807,7 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+++ /dev/null
-From 2d8ae9f2f45a2f5b777088cbab6e5ea15744d1d5 Mon Sep 17 00:00:00 2001
-From: Sakari Ailus <sakari.ailus@linux.intel.com>
-Date: Sun, 3 Apr 2016 16:31:03 -0300
-Subject: [PATCH 320/381] videobuf2-v4l2: Verify planes array in buffer
- dequeueing
-
-commit 2c1f6951a8a82e6de0d82b1158b5e493fc6c54ab upstream.
-
-When a buffer is being dequeued using VIDIOC_DQBUF IOCTL, the exact buffer
-which will be dequeued is not known until the buffer has been removed from
-the queue. The number of planes is specific to a buffer, not to the queue.
-
-This does lead to the situation where multi-plane buffers may be requested
-and queued with n planes, but VIDIOC_DQBUF IOCTL may be passed an argument
-struct with fewer planes.
-
-__fill_v4l2_buffer() however uses the number of planes from the dequeued
-videobuf2 buffer, overwriting kernel memory (the m.planes array allocated
-in video_usercopy() in v4l2-ioctl.c) if the user provided fewer
-planes than the dequeued buffer had. Oops!
-
-Fixes: b0e0e1f83de3 ("[media] media: videobuf2: Prepare to divide videobuf2")
-
-Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- drivers/media/v4l2-core/videobuf2-v4l2.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/media/v4l2-core/videobuf2-v4l2.c
-+++ b/drivers/media/v4l2-core/videobuf2-v4l2.c
-@@ -67,6 +67,11 @@ static int __verify_planes_array(struct
- return 0;
- }
-
-+static int __verify_planes_array_core(struct vb2_buffer *vb, const void *pb)
-+{
-+ return __verify_planes_array(vb, pb);
-+}
-+
- /**
- * __verify_length() - Verify that the bytesused value for each plane fits in
- * the plane length and that the data offset doesn't exceed the bytesused value.
-@@ -432,6 +437,7 @@ static int __fill_vb2_buffer(struct vb2_
- }
-
- static const struct vb2_buf_ops v4l2_buf_ops = {
-+ .verify_planes_array = __verify_planes_array_core,
- .fill_user_buffer = __fill_v4l2_buffer,
- .fill_vb2_buffer = __fill_vb2_buffer,
- .set_timestamp = __set_timestamp,
--- /dev/null
+From 07abcf3c2c3ae76a2be75e4fcc85ecd49d727a8a Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 6 May 2016 17:18:57 +0100
+Subject: [PATCH 321/423] Revert "rpi: update vc_vchi_audioserv_defs.h"
+
+This reverts commit 64fa9f963dffab0145f7960a593422064bb0aa8d.
+---
+ sound/arm/vc_vchi_audioserv_defs.h | 13 ++-----------
+ 1 file changed, 2 insertions(+), 11 deletions(-)
+
+--- a/sound/arm/vc_vchi_audioserv_defs.h
++++ b/sound/arm/vc_vchi_audioserv_defs.h
+@@ -16,7 +16,7 @@
+ #define _VC_AUDIO_DEFS_H_
+
+ #define VC_AUDIOSERV_MIN_VER 1
+-#define VC_AUDIOSERV_VER 3
++#define VC_AUDIOSERV_VER 2
+
+ // FourCC code used for VCHI connection
+ #define VC_AUDIO_SERVER_NAME MAKE_FOURCC("AUDS")
+@@ -36,7 +36,6 @@ typedef enum {
+ VC_AUDIO_MSG_TYPE_START, // Configure audio
+ VC_AUDIO_MSG_TYPE_STOP, // Configure audio
+ VC_AUDIO_MSG_TYPE_WRITE, // Configure audio
+- VC_AUDIO_MSG_TYPE_LATENCY, // request latency in cycles
+ VC_AUDIO_MSG_TYPE_MAX
+ } VC_AUDIO_MSG_TYPE;
+
+@@ -45,7 +44,6 @@ typedef struct {
+ uint32_t channels;
+ uint32_t samplerate;
+ uint32_t bps;
+- uint32_t channelmap;
+
+ } VC_AUDIO_CONFIG_T;
+
+@@ -86,12 +84,6 @@ typedef struct {
+ uint16_t max_packet;
+ } VC_AUDIO_WRITE_T;
+
+-// query latency in samples of sink
+-typedef struct
+-{
+- uint32_t dummy;
+-} VC_AUDIO_LATENCY_T;
+-
+ // Generic result for a request (VC->HOST)
+ typedef struct {
+ int32_t success; // Success value
+@@ -116,10 +108,9 @@ typedef struct {
+ VC_AUDIO_START_T start;
+ VC_AUDIO_STOP_T stop;
+ VC_AUDIO_WRITE_T write;
+- VC_AUDIO_LATENCY_T latency;
+ VC_AUDIO_RESULT_T result;
+ VC_AUDIO_COMPLETE_T complete;
+ } u;
+ } VC_AUDIO_MSG_T;
+
+-#endif // _VC_AUDIO_DEFS_H_
+\ No newline at end of file
++#endif // _VC_AUDIO_DEFS_H_
+++ /dev/null
-From 2e4f06a9b7276db1e2dafe33564ad5115f63a210 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 6 May 2016 12:32:47 +0100
-Subject: [PATCH 321/381] pinctrl-bcm2835: Return pins to inputs when freed
-
-When dynamically unloading overlays, it is important that freed pins are
-restored to being inputs to prevent functions from being enabled in
-multiple places at once.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -831,6 +831,15 @@ static const struct pinctrl_ops bcm2835_
- .dt_free_map = bcm2835_pctl_dt_free_map,
- };
-
-+static void bcm2835_pmx_free(struct pinctrl_dev *pctldev,
-+ unsigned offset)
-+{
-+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable by setting to GPIO_IN */
-+ bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
-+}
-+
- static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
- {
- return BCM2835_FSEL_COUNT;
-@@ -890,6 +899,7 @@ static int bcm2835_pmx_gpio_set_directio
- }
-
- static const struct pinmux_ops bcm2835_pmx_ops = {
-+ .free = bcm2835_pmx_free,
- .get_functions_count = bcm2835_pmx_get_functions_count,
- .get_function_name = bcm2835_pmx_get_function_name,
- .get_function_groups = bcm2835_pmx_get_function_groups,
+++ /dev/null
-From c451203424a277e522ea5227cefa84658615f442 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 6 May 2016 12:53:16 +0100
-Subject: [PATCH 322/381] BCM270X_DT: i2c0-bcm2708 - pin group params
-
-Add parameters to set pin groups as a unit, setting the pin function
-appropriately. The parameters are:
- pins_0_1
- pins_28_29
- pins_44_45
- pins_46_47
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/README | 11 ++++--
- .../arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts | 43 +++++++++++++++++-----
- 2 files changed, 42 insertions(+), 12 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -449,10 +449,15 @@ Params: ds1307 Select t
-
-
- Name: i2c0-bcm2708
--Info: Enable the i2c_bcm2708 driver for the i2c0 bus
-+Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations
-+ are usable on all platforms.
- Load: dtoverlay=i2c0-bcm2708,<param>=<val>
--Params: sda0_pin GPIO pin for SDA0 (0, 28 [or 44] - default 0)
-- scl0_pin GPIO pin for SCL0 (1, 29 [or 45] - default 1)
-+Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*)
-+ scl0_pin GPIO pin for SCL0 (deprecated - use pins_*)
-+ pins_0_1 Use pins 0 and 1 (default)
-+ pins_28_29 Use pins 28 and 29
-+ pins_44_45 Use pins 44 and 45
-+ pins_46_47 Use pins 46 and 47
-
-
- Name: i2c1-bcm2708
---- a/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts
-@@ -14,23 +14,48 @@
- fragment@0 {
- target = <&i2c0>;
- __overlay__ {
-- pinctrl-0 = <&i2c0_pins>;
- status = "okay";
- };
- };
-
- fragment@1 {
-- target = <&gpio>;
-- __overlay__ {
-- i2c0_pins: i2c0 {
-- brcm,pins = <0 1>;
-- brcm,function = <4>; /* alt0 */
-- };
-+ target = <&i2c0_pins>;
-+ frag1: __overlay__ {
-+ brcm,pins = <0 1>;
-+ brcm,function = <4>; /* alt0 */
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2c0_pins>;
-+ __dormant__ {
-+ brcm,pins = <28 29>;
-+ brcm,function = <4>; /* alt0 */
-+ };
-+ };
-+
-+ fragment@3 {
-+ target = <&i2c0_pins>;
-+ __dormant__ {
-+ brcm,pins = <44 45>;
-+ brcm,function = <5>; /* alt1 */
-+ };
-+ };
-+
-+ fragment@4 {
-+ target = <&i2c0_pins>;
-+ __dormant__ {
-+ brcm,pins = <46 47>;
-+ brcm,function = <4>; /* alt0 */
- };
- };
-
- __overrides__ {
-- sda0_pin = <&i2c0_pins>,"brcm,pins:0";
-- scl0_pin = <&i2c0_pins>,"brcm,pins:4";
-+ sda0_pin = <&frag1>,"brcm,pins:0";
-+ scl0_pin = <&frag1>,"brcm,pins:4";
-+ pins_0_1 = <0>,"+1-2-3-4";
-+ pins_28_29 = <0>,"-1+2-3-4";
-+ pins_44_45 = <0>,"-1-2+3-4";
-+ pins_46_47 = <0>,"-1-2-3+4";
- };
- };
--- /dev/null
+From 19526f5f7bdd0ffe5f079197598f1276fed9bcff Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 6 May 2016 17:21:58 +0100
+Subject: [PATCH 322/423] Revert "config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE"
+
+This reverts commit 417aed4cb35a479e001c8389fd8d97c3ea612999.
+---
+ arch/arm/configs/bcm2709_defconfig | 1 -
+ arch/arm/configs/bcmrpi_defconfig | 1 -
+ 2 files changed, 2 deletions(-)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -815,7 +815,6 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
+-CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -807,7 +807,6 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
+-CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
--- /dev/null
+From 8c2a8f26d78f29aa349b184a9e87586df735b51e Mon Sep 17 00:00:00 2001
+From: Andrey Grodzovsky <andrey2805@gmail.com>
+Date: Tue, 3 May 2016 22:10:59 -0400
+Subject: [PATCH 323/423] ARM: adau1977-adc: Add basic machine driver for
+ adau1977 codec driver.
+
+This commit adds basic support for the codec usage including: Device tree overlay,
+binding I2S bus and setting I2S mode, clock source and frequency setting according
+to spec.
+
+Signed-off-by: Andrey Grodzovsky <andrey2805@gmail.com>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 7 ++
+ .../arm/boot/dts/overlays/adau1977-adc-overlay.dts | 53 +++++++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 ++
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/adau1977-adc.c | 125 +++++++++++++++++++++
+ 8 files changed, 197 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
+ create mode 100644 sound/soc/bcm/adau1977-adc.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -12,6 +12,7 @@ ifeq ($(CONFIG_ARCH_BCM2835),y)
+ RPI_DT_OVERLAYS=y
+ endif
+
++dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -161,6 +161,13 @@ Params:
+ and the other i2c baudrate parameters.
+
+
++Name: adau1977-adc
++Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
++ and I2S for data.
++Load: dtoverlay=adau1977-adc
++Params: <None>
++
++
+ Name: ads7846
+ Info: ADS7846 Touch controller
+ Load: dtoverlay=ads7846,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
+@@ -0,0 +1,53 @@
++// Definitions for ADAU1977 ADC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&soc>;
++
++ __overlay__ {
++ codec_supply: fixedregulator@0 {
++ compatible = "regulator-fixed";
++ regulator-name = "AVDD";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c>;
++
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ adau1977: codec@11 {
++ compatible = "adi,adau1977";
++ reg = <0x11>;
++ reset-gpios = <&gpio 5 0>;
++ AVDD-supply = <&codec_supply>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@3 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "adi,adau1977-adc";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -861,6 +861,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -853,6 +853,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -78,3 +78,10 @@ config SND_BCM2708_SOC_RASPIDAC3
+ select SND_SOC_TPA6130A2
+ help
+ Say Y or M if you want to add support for RaspiDAC Rev.3x.
++
++config SND_BCM2708_SOC_ADAU1977_ADC
++ tristate "Support for ADAU1977 ADC"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_ADAU1977_I2C
++ help
++ Say Y or M if you want to add support for ADAU1977 ADC.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -4,6 +4,7 @@ snd-soc-bcm2835-i2s-objs := bcm2835-i2s.
+ obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o
+
+ # BCM2708 Machine Support
++snd-soc-adau1977-adc-objs := adau1977-adc.o
+ snd-soc-hifiberry-dac-objs := hifiberry_dac.o
+ snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
+ snd-soc-hifiberry-digi-objs := hifiberry_digi.o
+@@ -15,6 +16,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
+ snd-soc-raspidac3-objs := raspidac3.o
+
++obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o
+--- /dev/null
++++ b/sound/soc/bcm/adau1977-adc.c
+@@ -0,0 +1,125 @@
++/*
++ * ASoC Driver for ADAU1977 ADC
++ *
++ * Author: Andrey Grodzovsky <andrey2805@gmail.com>
++ * Copyright 2016
++ *
++ * This file is based on hifibery_dac driver by Florian Meier.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++enum adau1977_clk_id {
++ ADAU1977_SYSCLK,
++};
++
++enum adau1977_sysclk_src {
++ ADAU1977_SYSCLK_SRC_MCLK,
++ ADAU1977_SYSCLK_SRC_LRCLK,
++};
++
++static int eval_adau1977_init(struct snd_soc_pcm_runtime *rtd)
++{
++ int ret;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++
++ ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 0, 0);
++ if (ret < 0)
++ return ret;
++
++ return snd_soc_codec_set_sysclk(rtd->codec, ADAU1977_SYSCLK,
++ ADAU1977_SYSCLK_SRC_MCLK, 11289600, SND_SOC_CLOCK_IN);
++}
++
++static struct snd_soc_dai_link snd_rpi_adau1977_dai[] = {
++ {
++ .name = "adau1977",
++ .stream_name = "ADAU1977",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "adau1977-hifi",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "adau1977.1-0011",
++ .init = eval_adau1977_init,
++ .dai_fmt = SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ },
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_adau1977_adc = {
++ .name = "snd_rpi_adau1977_adc",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_adau1977_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_adau1977_dai),
++};
++
++static int snd_adau1977_adc_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ snd_adau1977_adc.dev = &pdev->dev;
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &snd_rpi_adau1977_dai[0];
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++ }
++
++ ret = snd_soc_register_card(&snd_adau1977_adc);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret);
++
++ return ret;
++}
++
++static int snd_adau1977_adc_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_adau1977_adc);
++}
++
++static const struct of_device_id snd_adau1977_adc_of_match[] = {
++ { .compatible = "adi,adau1977-adc", },
++ {},
++};
++
++MODULE_DEVICE_TABLE(of, snd_adau1977_adc_of_match);
++
++static struct platform_driver snd_adau1977_adc_driver = {
++ .driver = {
++ .name = "snd-adau1977-adc",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_adau1977_adc_of_match,
++ },
++ .probe = snd_adau1977_adc_probe,
++ .remove = snd_adau1977_adc_remove,
++};
++
++module_platform_driver(snd_adau1977_adc_driver);
++
++MODULE_AUTHOR("Andrey Grodzovsky <andrey2805@gmail.com>");
++MODULE_DESCRIPTION("ASoC Driver for ADAU1977 ADC");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 616ba69b10a0c52f241575727c1f0d04ea9e9113 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 6 May 2016 12:40:37 +0100
-Subject: [PATCH 323/381] config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -815,6 +815,7 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
-+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -807,6 +807,7 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
-+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
--- /dev/null
+From d81de2a4a1223296b17dac8e652b0b31911f6dd1 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Fri, 6 May 2016 09:42:55 +0100
+Subject: [PATCH 324/423] Allow up to 24dB digital gain to be applied when
+ using IQAudIO DAC
+
+24db_digital_gain DT param can be used to specify that PCM512x
+codec "Digital" volume control should not be limited to 0dB gain,
+and if specified will allow the full 24dB gain.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/README | 17 +++++++++++++++--
+ arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 6 +++++-
+ 2 files changed, 20 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -490,8 +490,21 @@ Params: <None>
+
+ Name: iqaudio-dac
+ Info: Configures the IQaudio DAC audio card
+-Load: dtoverlay=iqaudio-dac
+-Params: <None>
++Load: dtoverlay=iqaudio-dac,<param>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=iqaudio-dac,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
+
+
+ Name: iqaudio-dacplus
+--- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
+@@ -30,10 +30,14 @@
+
+ fragment@2 {
+ target = <&sound>;
+- __overlay__ {
++ frag2: __overlay__ {
+ compatible = "iqaudio,iqaudio-dac";
+ i2s-controller = <&i2s>;
+ status = "okay";
+ };
+ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
++ };
+ };
+++ /dev/null
-From f4187433a0b4592ae6df10d9080aec70270ad147 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 6 May 2016 17:18:57 +0100
-Subject: [PATCH 324/381] Revert "rpi: update vc_vchi_audioserv_defs.h"
-
-This reverts commit 64fa9f963dffab0145f7960a593422064bb0aa8d.
----
- sound/arm/vc_vchi_audioserv_defs.h | 13 ++-----------
- 1 file changed, 2 insertions(+), 11 deletions(-)
-
---- a/sound/arm/vc_vchi_audioserv_defs.h
-+++ b/sound/arm/vc_vchi_audioserv_defs.h
-@@ -16,7 +16,7 @@
- #define _VC_AUDIO_DEFS_H_
-
- #define VC_AUDIOSERV_MIN_VER 1
--#define VC_AUDIOSERV_VER 3
-+#define VC_AUDIOSERV_VER 2
-
- // FourCC code used for VCHI connection
- #define VC_AUDIO_SERVER_NAME MAKE_FOURCC("AUDS")
-@@ -36,7 +36,6 @@ typedef enum {
- VC_AUDIO_MSG_TYPE_START, // Configure audio
- VC_AUDIO_MSG_TYPE_STOP, // Configure audio
- VC_AUDIO_MSG_TYPE_WRITE, // Configure audio
-- VC_AUDIO_MSG_TYPE_LATENCY, // request latency in cycles
- VC_AUDIO_MSG_TYPE_MAX
- } VC_AUDIO_MSG_TYPE;
-
-@@ -45,7 +44,6 @@ typedef struct {
- uint32_t channels;
- uint32_t samplerate;
- uint32_t bps;
-- uint32_t channelmap;
-
- } VC_AUDIO_CONFIG_T;
-
-@@ -86,12 +84,6 @@ typedef struct {
- uint16_t max_packet;
- } VC_AUDIO_WRITE_T;
-
--// query latency in samples of sink
--typedef struct
--{
-- uint32_t dummy;
--} VC_AUDIO_LATENCY_T;
--
- // Generic result for a request (VC->HOST)
- typedef struct {
- int32_t success; // Success value
-@@ -116,10 +108,9 @@ typedef struct {
- VC_AUDIO_START_T start;
- VC_AUDIO_STOP_T stop;
- VC_AUDIO_WRITE_T write;
-- VC_AUDIO_LATENCY_T latency;
- VC_AUDIO_RESULT_T result;
- VC_AUDIO_COMPLETE_T complete;
- } u;
- } VC_AUDIO_MSG_T;
-
--#endif // _VC_AUDIO_DEFS_H_
-\ No newline at end of file
-+#endif // _VC_AUDIO_DEFS_H_
+++ /dev/null
-From 2faa3a4eb01cdd6c372c235900139a96ed5e81f7 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 6 May 2016 17:21:58 +0100
-Subject: [PATCH 325/381] Revert "config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE"
-
-This reverts commit 417aed4cb35a479e001c8389fd8d97c3ea612999.
----
- arch/arm/configs/bcm2709_defconfig | 1 -
- arch/arm/configs/bcmrpi_defconfig | 1 -
- 2 files changed, 2 deletions(-)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -815,7 +815,6 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
--CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -807,7 +807,6 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
--CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
--- /dev/null
+From 65042bea86d4204f83acd09cb665a2d91b365105 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 6 May 2016 12:40:37 +0100
+Subject: [PATCH 325/423] config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -815,6 +815,7 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -807,6 +807,7 @@ CONFIG_VIDEO_TW9906=m
+ CONFIG_VIDEO_OV7640=m
+ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
++CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+++ /dev/null
-From 347d4cf757e6f093860048fe69737c29f5adcd0f Mon Sep 17 00:00:00 2001
-From: Andrey Grodzovsky <andrey2805@gmail.com>
-Date: Tue, 3 May 2016 22:10:59 -0400
-Subject: [PATCH 326/381] ARM: adau1977-adc: Add basic machine driver for
- adau1977 codec driver.
-
-This commit adds basic support for the codec usage including: Device tree overlay,
-binding I2S bus and setting I2S mode, clock source and frequency setting according
-to spec.
-
-Signed-off-by: Andrey Grodzovsky <andrey2805@gmail.com>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 7 ++
- .../arm/boot/dts/overlays/adau1977-adc-overlay.dts | 53 +++++++++
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- sound/soc/bcm/Kconfig | 7 ++
- sound/soc/bcm/Makefile | 2 +
- sound/soc/bcm/adau1977-adc.c | 125 +++++++++++++++++++++
- 8 files changed, 197 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
- create mode 100644 sound/soc/bcm/adau1977-adc.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -12,6 +12,7 @@ ifeq ($(CONFIG_ARCH_BCM2835),y)
- RPI_DT_OVERLAYS=y
- endif
-
-+dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -161,6 +161,13 @@ Params:
- and the other i2c baudrate parameters.
-
-
-+Name: adau1977-adc
-+Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
-+ and I2S for data.
-+Load: dtoverlay=adau1977-adc
-+Params: <None>
-+
-+
- Name: ads7846
- Info: ADS7846 Touch controller
- Load: dtoverlay=ads7846,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
-@@ -0,0 +1,53 @@
-+// Definitions for ADAU1977 ADC
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&soc>;
-+
-+ __overlay__ {
-+ codec_supply: fixedregulator@0 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "AVDD";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c>;
-+
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ adau1977: codec@11 {
-+ compatible = "adi,adau1977";
-+ reg = <0x11>;
-+ reset-gpios = <&gpio 5 0>;
-+ AVDD-supply = <&codec_supply>;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@3 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "adi,adau1977-adc";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -861,6 +861,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
- CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
-+CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
- CONFIG_SND_SIMPLE_CARD=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -853,6 +853,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
- CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
-+CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
- CONFIG_SND_SIMPLE_CARD=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -78,3 +78,10 @@ config SND_BCM2708_SOC_RASPIDAC3
- select SND_SOC_TPA6130A2
- help
- Say Y or M if you want to add support for RaspiDAC Rev.3x.
-+
-+config SND_BCM2708_SOC_ADAU1977_ADC
-+ tristate "Support for ADAU1977 ADC"
-+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
-+ select SND_SOC_ADAU1977_I2C
-+ help
-+ Say Y or M if you want to add support for ADAU1977 ADC.
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -4,6 +4,7 @@ snd-soc-bcm2835-i2s-objs := bcm2835-i2s.
- obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o
-
- # BCM2708 Machine Support
-+snd-soc-adau1977-adc-objs := adau1977-adc.o
- snd-soc-hifiberry-dac-objs := hifiberry_dac.o
- snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
- snd-soc-hifiberry-digi-objs := hifiberry_digi.o
-@@ -15,6 +16,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
- snd-soc-raspidac3-objs := raspidac3.o
-
-+obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o
---- /dev/null
-+++ b/sound/soc/bcm/adau1977-adc.c
-@@ -0,0 +1,125 @@
-+/*
-+ * ASoC Driver for ADAU1977 ADC
-+ *
-+ * Author: Andrey Grodzovsky <andrey2805@gmail.com>
-+ * Copyright 2016
-+ *
-+ * This file is based on hifibery_dac driver by Florian Meier.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+enum adau1977_clk_id {
-+ ADAU1977_SYSCLK,
-+};
-+
-+enum adau1977_sysclk_src {
-+ ADAU1977_SYSCLK_SRC_MCLK,
-+ ADAU1977_SYSCLK_SRC_LRCLK,
-+};
-+
-+static int eval_adau1977_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ int ret;
-+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
-+
-+ ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 0, 0);
-+ if (ret < 0)
-+ return ret;
-+
-+ return snd_soc_codec_set_sysclk(rtd->codec, ADAU1977_SYSCLK,
-+ ADAU1977_SYSCLK_SRC_MCLK, 11289600, SND_SOC_CLOCK_IN);
-+}
-+
-+static struct snd_soc_dai_link snd_rpi_adau1977_dai[] = {
-+ {
-+ .name = "adau1977",
-+ .stream_name = "ADAU1977",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "adau1977-hifi",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "adau1977.1-0011",
-+ .init = eval_adau1977_init,
-+ .dai_fmt = SND_SOC_DAIFMT_I2S |
-+ SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBM_CFM,
-+ },
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_adau1977_adc = {
-+ .name = "snd_rpi_adau1977_adc",
-+ .owner = THIS_MODULE,
-+ .dai_link = snd_rpi_adau1977_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_adau1977_dai),
-+};
-+
-+static int snd_adau1977_adc_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ snd_adau1977_adc.dev = &pdev->dev;
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &snd_rpi_adau1977_dai[0];
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+ }
-+
-+ ret = snd_soc_register_card(&snd_adau1977_adc);
-+ if (ret)
-+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret);
-+
-+ return ret;
-+}
-+
-+static int snd_adau1977_adc_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_adau1977_adc);
-+}
-+
-+static const struct of_device_id snd_adau1977_adc_of_match[] = {
-+ { .compatible = "adi,adau1977-adc", },
-+ {},
-+};
-+
-+MODULE_DEVICE_TABLE(of, snd_adau1977_adc_of_match);
-+
-+static struct platform_driver snd_adau1977_adc_driver = {
-+ .driver = {
-+ .name = "snd-adau1977-adc",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_adau1977_adc_of_match,
-+ },
-+ .probe = snd_adau1977_adc_probe,
-+ .remove = snd_adau1977_adc_remove,
-+};
-+
-+module_platform_driver(snd_adau1977_adc_driver);
-+
-+MODULE_AUTHOR("Andrey Grodzovsky <andrey2805@gmail.com>");
-+MODULE_DESCRIPTION("ASoC Driver for ADAU1977 ADC");
-+MODULE_LICENSE("GPL v2");
--- /dev/null
+From c571a3b93af54fb31cf6125d7a3dfba634b4f099 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 6 May 2016 11:48:35 -0700
+Subject: [PATCH 326/423] BCM270X_DT: Move vc4 node contents to
+ bcm2708_common.dtsi.
+
+This should clarify what's going on with the overlay: The hardware is
+always present, we're just enabling the DT node so that the vc4 driver
+probes.
+
+The interrupts are left in the overlay, because the firmware doesn't
+check node status before masking out the vc4 interrupts.
+
+By having the nodes in the common file, we'll be able to correctly
+connect the HDMI HPD GPIO so that we can detect whether an HDMI
+monitor is connected.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 51 +++++++
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 160 ++++++++++-----------
+ 2 files changed, 129 insertions(+), 82 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -1,4 +1,7 @@
++#include "dt-bindings/clock/bcm2835.h"
+ #include <dt-bindings/clock/bcm2835-aux.h>
++#include "dt-bindings/power/raspberrypi-power.h"
++#include "dt-bindings/gpio/gpio.h"
+ #include "skeleton.dtsi"
+
+ / {
+@@ -170,6 +173,18 @@
+ status = "disabled";
+ };
+
++ pixelvalve0: pixelvalve@7e206000 {
++ compatible = "brcm,bcm2835-pixelvalve0";
++ reg = <0x7e206000 0x100>;
++ status = "disabled";
++ };
++
++ pixelvalve1: pixelvalve@7e207000 {
++ compatible = "brcm,bcm2835-pixelvalve1";
++ reg = <0x7e207000 0x100>;
++ status = "disabled";
++ };
++
+ pwm: pwm@7e20c000 {
+ compatible = "brcm,bcm2835-pwm";
+ reg = <0x7e20c000 0x28>;
+@@ -227,6 +242,12 @@
+ status = "disabled";
+ };
+
++ hvs: hvs@7e400000 {
++ compatible = "brcm,bcm2835-hvs";
++ reg = <0x7e400000 0x6000>;
++ status = "disabled";
++ };
++
+ i2c1: i2c@7e804000 {
+ compatible = "brcm,bcm2708-i2c";
+ reg = <0x7e804000 0x1000>;
+@@ -261,6 +282,25 @@
+ status = "disabled";
+ };
+
++ pixelvalve2: pixelvalve@7e807000 {
++ compatible = "brcm,bcm2835-pixelvalve2";
++ reg = <0x7e807000 0x100>;
++ status = "disabled";
++ };
++
++ hdmi: hdmi@7e902000 {
++ compatible = "brcm,bcm2835-hdmi";
++ reg = <0x7e902000 0x600>,
++ <0x7e808000 0x100>;
++ ddc = <&i2c2>;
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
++ clocks = <&cprman BCM2835_PLLH_PIX>,
++ <&cprman BCM2835_CLOCK_HSM>;
++ clock-names = "pixel", "hdmi";
++ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
++ status = "disabled";
++ };
++
+ usb: usb@7e980000 {
+ compatible = "brcm,bcm2708-usb";
+ reg = <0x7e980000 0x10000>,
+@@ -269,6 +309,12 @@
+ <1 9>;
+ };
+
++ v3d: v3d@7ec00000 {
++ compatible = "brcm,vc4-v3d";
++ reg = <0x7ec00000 0x1000>;
++ status = "disabled";
++ };
++
+ firmware: firmware {
+ compatible = "raspberrypi,bcm2835-firmware";
+ mboxes = <&mailbox>;
+@@ -303,6 +349,11 @@
+ firmware = <&firmware>;
+ };
+
++ gpu: gpu {
++ compatible = "brcm,bcm2835-vc4";
++ status = "disabled";
++ };
++
+ /* Onboard audio */
+ audio: audio {
+ compatible = "brcm,bcm2835-audio";
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -5,129 +5,125 @@
+ /dts-v1/;
+ /plugin/;
+
+-#include "dt-bindings/clock/bcm2835.h"
+-#include "dt-bindings/power/raspberrypi-power.h"
+-#include "dt-bindings/gpio/gpio.h"
+-
+ / {
+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
+
+ fragment@0 {
++ target-path = "/chosen";
++ __overlay__ {
++ bootargs = "cma=256M@256M";
++ };
++ };
++
++ fragment@1 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=192M@256M";
++ };
++ };
++
++ fragment@2 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=128M@128M";
++ };
++ };
++
++ fragment@3 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=96M@128M";
++ };
++ };
++
++ fragment@4 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=64M@64M";
++ };
++ };
++
++ fragment@5 {
+ target = <&i2c2>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@1 {
++ fragment@6 {
+ target = <&cprman>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+- fragment@2 {
++ fragment@7 {
+ target = <&fb>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+- fragment@3 {
+- target = <&soc>;
++ fragment@8 {
++ target = <&pixelvalve0>;
+ __overlay__ {
+- #address-cells = <1>;
+- #size-cells = <1>;
++ interrupts = <2 13>; /* pwa0 */
++ status = "okay";
++ };
++ };
+
+- pixelvalve@7e206000 {
+- compatible = "brcm,bcm2835-pixelvalve0";
+- reg = <0x7e206000 0x100>;
+- interrupts = <2 13>; /* pwa0 */
+- };
+-
+- pixelvalve@7e207000 {
+- compatible = "brcm,bcm2835-pixelvalve1";
+- reg = <0x7e207000 0x100>;
+- interrupts = <2 14>; /* pwa1 */
+- };
+-
+- hvs@7e400000 {
+- compatible = "brcm,bcm2835-hvs";
+- reg = <0x7e400000 0x6000>;
+- interrupts = <2 1>;
+- };
+-
+- pixelvalve@7e807000 {
+- compatible = "brcm,bcm2835-pixelvalve2";
+- reg = <0x7e807000 0x100>;
+- interrupts = <2 10>; /* pixelvalve */
+- };
+-
+- hdmi@7e902000 {
+- compatible = "brcm,bcm2835-hdmi";
+- reg = <0x7e902000 0x600>,
+- <0x7e808000 0x100>;
+- interrupts = <2 8>, <2 9>;
+- ddc = <&i2c2>;
+- hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+- clocks = <&cprman BCM2835_PLLH_PIX>,
+- <&cprman BCM2835_CLOCK_HSM>;
+- clock-names = "pixel", "hdmi";
+- power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+- };
+-
+- v3d@7ec00000 {
+- compatible = "brcm,vc4-v3d";
+- reg = <0x7ec00000 0x1000>;
+- interrupts = <1 10>;
+- };
+-
+- gpu@7e4c0000 {
+- compatible = "brcm,bcm2835-vc4";
+- };
++ fragment@9 {
++ target = <&pixelvalve1>;
++ __overlay__ {
++ interrupts = <2 14>; /* pwa1 */
++ status = "okay";
+ };
+ };
+
+- fragment@4 {
+- target-path = "/chosen";
+- __overlay__ {
+- bootargs = "cma=256M@256M";
++ fragment@10 {
++ target = <&pixelvalve2>;
++ __overlay__ {
++ interrupts = <2 10>; /* pixelvalve */
++ status = "okay";
+ };
+ };
+
+- fragment@5 {
+- target-path = "/chosen";
+- __dormant__ {
+- bootargs = "cma=192M@256M";
++ fragment@11 {
++ target = <&hvs>;
++ __overlay__ {
++ interrupts = <2 1>;
++ status = "okay";
+ };
+ };
+
+- fragment@6 {
+- target-path = "/chosen";
+- __dormant__ {
+- bootargs = "cma=128M@128M";
++ fragment@12 {
++ target = <&hdmi>;
++ __overlay__ {
++ interrupts = <2 8>, <2 9>;
++ status = "okay";
+ };
+ };
+
+- fragment@7 {
+- target-path = "/chosen";
+- __dormant__ {
+- bootargs = "cma=96M@128M";
++ fragment@13 {
++ target = <&v3d>;
++ __overlay__ {
++ interrupts = <1 10>;
++ status = "okay";
+ };
+ };
+
+- fragment@8 {
+- target-path = "/chosen";
+- __dormant__ {
+- bootargs = "cma=64M@64M";
++ fragment@14 {
++ target = <&gpu>;
++ __overlay__ {
++ status = "okay";
+ };
+ };
+
+ __overrides__ {
+- cma-256 = <0>,"+4-5-6-7-8";
+- cma-192 = <0>,"-4+5-6-7-8";
+- cma-128 = <0>,"-4-5+6-7-8";
+- cma-96 = <0>,"-4-5-6+7-8";
+- cma-64 = <0>,"-4-5-6-7+8";
++ cma-256 = <0>,"+0-1-2-3-4";
++ cma-192 = <0>,"-0+1-2-3-4";
++ cma-128 = <0>,"-0-1+2-3-4";
++ cma-96 = <0>,"-0-1-2+3-4";
++ cma-64 = <0>,"-0-1-2-3+4";
+ };
+ };
+++ /dev/null
-From ba4e2749004660d573c0d62f6fec876cd152bd3e Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Fri, 6 May 2016 09:42:55 +0100
-Subject: [PATCH 327/381] Allow up to 24dB digital gain to be applied when
- using IQAudIO DAC
-
-24db_digital_gain DT param can be used to specify that PCM512x
-codec "Digital" volume control should not be limited to 0dB gain,
-and if specified will allow the full 24dB gain.
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/overlays/README | 17 +++++++++++++++--
- arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 6 +++++-
- 2 files changed, 20 insertions(+), 3 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -490,8 +490,21 @@ Params: <None>
-
- Name: iqaudio-dac
- Info: Configures the IQaudio DAC audio card
--Load: dtoverlay=iqaudio-dac
--Params: <None>
-+Load: dtoverlay=iqaudio-dac,<param>
-+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
-+ Digital volume control. Enable with
-+ "dtoverlay=iqaudio-dac,24db_digital_gain"
-+ (The default behaviour is that the Digital
-+ volume control is limited to a maximum of
-+ 0dB. ie. it can attenuate but not provide
-+ gain. For most users, this will be desired
-+ as it will prevent clipping. By appending
-+ the 24db_digital_gain parameter, the Digital
-+ volume control will allow up to 24dB of
-+ gain. If this parameter is enabled, it is the
-+ responsibility of the user to ensure that
-+ the Digital volume control is set to a value
-+ that does not result in clipping/distortion!)
-
-
- Name: iqaudio-dacplus
---- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
-@@ -30,10 +30,14 @@
-
- fragment@2 {
- target = <&sound>;
-- __overlay__ {
-+ frag2: __overlay__ {
- compatible = "iqaudio,iqaudio-dac";
- i2s-controller = <&i2s>;
- status = "okay";
- };
- };
-+
-+ __overrides__ {
-+ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
-+ };
- };
--- /dev/null
+From da8c5943777182ae813ae0e1332e45ffaec0b7fa Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 6 May 2016 12:42:26 -0700
+Subject: [PATCH 327/423] BCM270X_DT: Set correct HDMI HPD GPIO levels for
+ various boards.
+
+The CM is left out, because I haven't found a source for how the CM's
+HPD is connected.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 4 ++++
+ arch/arm/boot/dts/bcm2708-rpi-b.dts | 4 ++++
+ arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 4 ++++
+ arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 4 ++++
+ 4 files changed, 16 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
+@@ -116,6 +116,10 @@
+ };
+ };
+
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
+ / {
+ __overrides__ {
+ uart0 = <&uart0>,"status";
+--- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
+@@ -110,6 +110,10 @@
+ };
+ };
+
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
++};
++
+ / {
+ __overrides__ {
+ uart0 = <&uart0>,"status";
+--- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
++++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
+@@ -116,6 +116,10 @@
+ };
+ };
+
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
+ / {
+ __overrides__ {
+ uart0 = <&uart0>,"status";
+--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
+@@ -161,6 +161,10 @@
+ };
+ };
+
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
+ / {
+ chosen {
+ bootargs = "8250.nr_uarts=1";
--- /dev/null
+From 51ee0bd70a886329018e8d22fda1fe4f360a9ff3 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 6 May 2016 12:43:25 -0700
+Subject: [PATCH 328/423] Revert "drm/vc4: Force HDMI to connected."
+
+Now that we have the HDMI HPD GPIOs correctly identified in the DT, we
+should be able to successfully detect HDMI.
+
+This reverts commit fbec01e2d17b924d91850e17eeecf975e74c9ebf.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -166,8 +166,6 @@ vc4_hdmi_connector_detect(struct drm_con
+ struct drm_device *dev = connector->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
+- return connector_status_connected;
+-
+ if (vc4->hdmi->hpd_gpio) {
+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
+ vc4->hdmi->hpd_active_low)
+++ /dev/null
-From dd29bbd2aae28fb176221d740cca0aacabae3842 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 6 May 2016 12:40:37 +0100
-Subject: [PATCH 328/381] config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -815,6 +815,7 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
-+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -807,6 +807,7 @@ CONFIG_VIDEO_TW9906=m
- CONFIG_VIDEO_OV7640=m
- CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
-+CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
--- /dev/null
+From 9768eff7323ea9e3b663be5e2850fdf87ddfe13f Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 6 May 2016 12:59:27 -0700
+Subject: [PATCH 329/423] BCM270X: Include DRM_PANEL_SIMPLE in the defconfigs.
+
+This is going to be required for the Adafruit DPI panel support.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -817,6 +817,7 @@ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
+ CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
++CONFIG_DRM_PANEL_SIMPLE=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+ CONFIG_FB_BCM2708=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -809,6 +809,7 @@ CONFIG_VIDEO_MT9V011=m
+ CONFIG_DRM=m
+ CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
++CONFIG_DRM_PANEL_SIMPLE=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+ CONFIG_FB_BCM2708=y
+++ /dev/null
-From 4cb8cf8c6ce47b652c93bae2b4b480bd7ea7f940 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 6 May 2016 11:48:35 -0700
-Subject: [PATCH 329/381] BCM270X_DT: Move vc4 node contents to
- bcm2708_common.dtsi.
-
-This should clarify what's going on with the overlay: The hardware is
-always present, we're just enabling the DT node so that the vc4 driver
-probes.
-
-The interrupts are left in the overlay, because the firmware doesn't
-check node status before masking out the vc4 interrupts.
-
-By having the nodes in the common file, we'll be able to correctly
-connect the HDMI HPD GPIO so that we can detect whether an HDMI
-monitor is connected.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 51 +++++++
- arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 160 ++++++++++-----------
- 2 files changed, 129 insertions(+), 82 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -1,4 +1,7 @@
-+#include "dt-bindings/clock/bcm2835.h"
- #include <dt-bindings/clock/bcm2835-aux.h>
-+#include "dt-bindings/power/raspberrypi-power.h"
-+#include "dt-bindings/gpio/gpio.h"
- #include "skeleton.dtsi"
-
- / {
-@@ -170,6 +173,18 @@
- status = "disabled";
- };
-
-+ pixelvalve0: pixelvalve@7e206000 {
-+ compatible = "brcm,bcm2835-pixelvalve0";
-+ reg = <0x7e206000 0x100>;
-+ status = "disabled";
-+ };
-+
-+ pixelvalve1: pixelvalve@7e207000 {
-+ compatible = "brcm,bcm2835-pixelvalve1";
-+ reg = <0x7e207000 0x100>;
-+ status = "disabled";
-+ };
-+
- pwm: pwm@7e20c000 {
- compatible = "brcm,bcm2835-pwm";
- reg = <0x7e20c000 0x28>;
-@@ -227,6 +242,12 @@
- status = "disabled";
- };
-
-+ hvs: hvs@7e400000 {
-+ compatible = "brcm,bcm2835-hvs";
-+ reg = <0x7e400000 0x6000>;
-+ status = "disabled";
-+ };
-+
- i2c1: i2c@7e804000 {
- compatible = "brcm,bcm2708-i2c";
- reg = <0x7e804000 0x1000>;
-@@ -261,6 +282,25 @@
- status = "disabled";
- };
-
-+ pixelvalve2: pixelvalve@7e807000 {
-+ compatible = "brcm,bcm2835-pixelvalve2";
-+ reg = <0x7e807000 0x100>;
-+ status = "disabled";
-+ };
-+
-+ hdmi: hdmi@7e902000 {
-+ compatible = "brcm,bcm2835-hdmi";
-+ reg = <0x7e902000 0x600>,
-+ <0x7e808000 0x100>;
-+ ddc = <&i2c2>;
-+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
-+ clocks = <&cprman BCM2835_PLLH_PIX>,
-+ <&cprman BCM2835_CLOCK_HSM>;
-+ clock-names = "pixel", "hdmi";
-+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
-+ status = "disabled";
-+ };
-+
- usb: usb@7e980000 {
- compatible = "brcm,bcm2708-usb";
- reg = <0x7e980000 0x10000>,
-@@ -269,6 +309,12 @@
- <1 9>;
- };
-
-+ v3d: v3d@7ec00000 {
-+ compatible = "brcm,vc4-v3d";
-+ reg = <0x7ec00000 0x1000>;
-+ status = "disabled";
-+ };
-+
- firmware: firmware {
- compatible = "raspberrypi,bcm2835-firmware";
- mboxes = <&mailbox>;
-@@ -303,6 +349,11 @@
- firmware = <&firmware>;
- };
-
-+ gpu: gpu {
-+ compatible = "brcm,bcm2835-vc4";
-+ status = "disabled";
-+ };
-+
- /* Onboard audio */
- audio: audio {
- compatible = "brcm,bcm2835-audio";
---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-@@ -5,129 +5,125 @@
- /dts-v1/;
- /plugin/;
-
--#include "dt-bindings/clock/bcm2835.h"
--#include "dt-bindings/power/raspberrypi-power.h"
--#include "dt-bindings/gpio/gpio.h"
--
- / {
- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-
- fragment@0 {
-+ target-path = "/chosen";
-+ __overlay__ {
-+ bootargs = "cma=256M@256M";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=192M@256M";
-+ };
-+ };
-+
-+ fragment@2 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=128M@128M";
-+ };
-+ };
-+
-+ fragment@3 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=96M@128M";
-+ };
-+ };
-+
-+ fragment@4 {
-+ target-path = "/chosen";
-+ __dormant__ {
-+ bootargs = "cma=64M@64M";
-+ };
-+ };
-+
-+ fragment@5 {
- target = <&i2c2>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@1 {
-+ fragment@6 {
- target = <&cprman>;
- __overlay__ {
- status = "okay";
- };
- };
-
-- fragment@2 {
-+ fragment@7 {
- target = <&fb>;
- __overlay__ {
- status = "disabled";
- };
- };
-
-- fragment@3 {
-- target = <&soc>;
-+ fragment@8 {
-+ target = <&pixelvalve0>;
- __overlay__ {
-- #address-cells = <1>;
-- #size-cells = <1>;
-+ interrupts = <2 13>; /* pwa0 */
-+ status = "okay";
-+ };
-+ };
-
-- pixelvalve@7e206000 {
-- compatible = "brcm,bcm2835-pixelvalve0";
-- reg = <0x7e206000 0x100>;
-- interrupts = <2 13>; /* pwa0 */
-- };
--
-- pixelvalve@7e207000 {
-- compatible = "brcm,bcm2835-pixelvalve1";
-- reg = <0x7e207000 0x100>;
-- interrupts = <2 14>; /* pwa1 */
-- };
--
-- hvs@7e400000 {
-- compatible = "brcm,bcm2835-hvs";
-- reg = <0x7e400000 0x6000>;
-- interrupts = <2 1>;
-- };
--
-- pixelvalve@7e807000 {
-- compatible = "brcm,bcm2835-pixelvalve2";
-- reg = <0x7e807000 0x100>;
-- interrupts = <2 10>; /* pixelvalve */
-- };
--
-- hdmi@7e902000 {
-- compatible = "brcm,bcm2835-hdmi";
-- reg = <0x7e902000 0x600>,
-- <0x7e808000 0x100>;
-- interrupts = <2 8>, <2 9>;
-- ddc = <&i2c2>;
-- hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
-- clocks = <&cprman BCM2835_PLLH_PIX>,
-- <&cprman BCM2835_CLOCK_HSM>;
-- clock-names = "pixel", "hdmi";
-- power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
-- };
--
-- v3d@7ec00000 {
-- compatible = "brcm,vc4-v3d";
-- reg = <0x7ec00000 0x1000>;
-- interrupts = <1 10>;
-- };
--
-- gpu@7e4c0000 {
-- compatible = "brcm,bcm2835-vc4";
-- };
-+ fragment@9 {
-+ target = <&pixelvalve1>;
-+ __overlay__ {
-+ interrupts = <2 14>; /* pwa1 */
-+ status = "okay";
- };
- };
-
-- fragment@4 {
-- target-path = "/chosen";
-- __overlay__ {
-- bootargs = "cma=256M@256M";
-+ fragment@10 {
-+ target = <&pixelvalve2>;
-+ __overlay__ {
-+ interrupts = <2 10>; /* pixelvalve */
-+ status = "okay";
- };
- };
-
-- fragment@5 {
-- target-path = "/chosen";
-- __dormant__ {
-- bootargs = "cma=192M@256M";
-+ fragment@11 {
-+ target = <&hvs>;
-+ __overlay__ {
-+ interrupts = <2 1>;
-+ status = "okay";
- };
- };
-
-- fragment@6 {
-- target-path = "/chosen";
-- __dormant__ {
-- bootargs = "cma=128M@128M";
-+ fragment@12 {
-+ target = <&hdmi>;
-+ __overlay__ {
-+ interrupts = <2 8>, <2 9>;
-+ status = "okay";
- };
- };
-
-- fragment@7 {
-- target-path = "/chosen";
-- __dormant__ {
-- bootargs = "cma=96M@128M";
-+ fragment@13 {
-+ target = <&v3d>;
-+ __overlay__ {
-+ interrupts = <1 10>;
-+ status = "okay";
- };
- };
-
-- fragment@8 {
-- target-path = "/chosen";
-- __dormant__ {
-- bootargs = "cma=64M@64M";
-+ fragment@14 {
-+ target = <&gpu>;
-+ __overlay__ {
-+ status = "okay";
- };
- };
-
- __overrides__ {
-- cma-256 = <0>,"+4-5-6-7-8";
-- cma-192 = <0>,"-4+5-6-7-8";
-- cma-128 = <0>,"-4-5+6-7-8";
-- cma-96 = <0>,"-4-5-6+7-8";
-- cma-64 = <0>,"-4-5-6-7+8";
-+ cma-256 = <0>,"+0-1-2-3-4";
-+ cma-192 = <0>,"-0+1-2-3-4";
-+ cma-128 = <0>,"-0-1+2-3-4";
-+ cma-96 = <0>,"-0-1-2+3-4";
-+ cma-64 = <0>,"-0-1-2-3+4";
- };
- };
+++ /dev/null
-From 018d3d118011d7022f336f3b0d0db5aef5cbb31d Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 6 May 2016 12:42:26 -0700
-Subject: [PATCH 330/381] BCM270X_DT: Set correct HDMI HPD GPIO levels for
- various boards.
-
-The CM is left out, because I haven't found a source for how the CM's
-HPD is connected.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 4 ++++
- arch/arm/boot/dts/bcm2708-rpi-b.dts | 4 ++++
- arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 4 ++++
- arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 4 ++++
- 4 files changed, 16 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
-+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
-@@ -116,6 +116,10 @@
- };
- };
-
-+&hdmi {
-+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
-+};
-+
- / {
- __overrides__ {
- uart0 = <&uart0>,"status";
---- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
-+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
-@@ -110,6 +110,10 @@
- };
- };
-
-+&hdmi {
-+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
-+};
-+
- / {
- __overrides__ {
- uart0 = <&uart0>,"status";
---- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
-+++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
-@@ -116,6 +116,10 @@
- };
- };
-
-+&hdmi {
-+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
-+};
-+
- / {
- __overrides__ {
- uart0 = <&uart0>,"status";
---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
-+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
-@@ -161,6 +161,10 @@
- };
- };
-
-+&hdmi {
-+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
-+};
-+
- / {
- chosen {
- bootargs = "8250.nr_uarts=1";
--- /dev/null
+From 72a4218cce198ffd0a920c98856f1dfecdfac9c9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 18 Mar 2016 12:34:59 -0700
+Subject: [PATCH 330/423] drm: Add an encoder and connector type enum for DPI.
+
+Right now exynos is exposing DPI as a TMDS encoder and VGA connector,
+which seems rather misleading. This isn't just an internal detail,
+since xrandr actually exposes "VGA" as the output name. Define some
+new enums so that vc4's DPI can have a more informative name.
+
+I considered other names for the connector as well. For VC4, the
+Adafruit DPI kippah takes the 28 GPIO pins and routes them to a
+standard-ish 40-pin FPC connector, but "40-pin FPC" doesn't uniquely
+identify an ordering of pins (apparently some other orderings exist),
+doesn't explain things as well for the user (who, if anything, knows
+their product is a DPI kippah/panel combo), and actually doesn't have
+to exist (one could connect the 28 GPIOs directly to something else).
+Simply "DPI" seems like a good compromise name to distinguish from the
+HDMI, DSI, and TV connectors .
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+(cherry picked from commit 0b27c02a7f1c697694f2ad6d6517e7dbf9ecfa39)
+---
+ drivers/gpu/drm/drm_crtc.c | 2 ++
+ include/uapi/drm/drm_mode.h | 2 ++
+ 2 files changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/drm_crtc.c
++++ b/drivers/gpu/drm/drm_crtc.c
+@@ -168,6 +168,7 @@ static struct drm_conn_prop_enum_list dr
+ { DRM_MODE_CONNECTOR_eDP, "eDP" },
+ { DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },
+ { DRM_MODE_CONNECTOR_DSI, "DSI" },
++ { DRM_MODE_CONNECTOR_DPI, "DPI" },
+ };
+
+ static const struct drm_prop_enum_list drm_encoder_enum_list[] = {
+@@ -179,6 +180,7 @@ static const struct drm_prop_enum_list d
+ { DRM_MODE_ENCODER_VIRTUAL, "Virtual" },
+ { DRM_MODE_ENCODER_DSI, "DSI" },
+ { DRM_MODE_ENCODER_DPMST, "DP MST" },
++ { DRM_MODE_ENCODER_DPI, "DPI" },
+ };
+
+ static const struct drm_prop_enum_list drm_subpixel_enum_list[] = {
+--- a/include/uapi/drm/drm_mode.h
++++ b/include/uapi/drm/drm_mode.h
+@@ -202,6 +202,7 @@ struct drm_mode_get_plane_res {
+ #define DRM_MODE_ENCODER_VIRTUAL 5
+ #define DRM_MODE_ENCODER_DSI 6
+ #define DRM_MODE_ENCODER_DPMST 7
++#define DRM_MODE_ENCODER_DPI 8
+
+ struct drm_mode_get_encoder {
+ __u32 encoder_id;
+@@ -241,6 +242,7 @@ struct drm_mode_get_encoder {
+ #define DRM_MODE_CONNECTOR_eDP 14
+ #define DRM_MODE_CONNECTOR_VIRTUAL 15
+ #define DRM_MODE_CONNECTOR_DSI 16
++#define DRM_MODE_CONNECTOR_DPI 17
+
+ struct drm_mode_get_connector {
+
+++ /dev/null
-From 98d4a368d5cfb455ed91cf4dbdef16be4fc25349 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 6 May 2016 12:43:25 -0700
-Subject: [PATCH 331/381] Revert "drm/vc4: Force HDMI to connected."
-
-Now that we have the HDMI HPD GPIOs correctly identified in the DT, we
-should be able to successfully detect HDMI.
-
-This reverts commit fbec01e2d17b924d91850e17eeecf975e74c9ebf.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -166,8 +166,6 @@ vc4_hdmi_connector_detect(struct drm_con
- struct drm_device *dev = connector->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-
-- return connector_status_connected;
--
- if (vc4->hdmi->hpd_gpio) {
- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
- vc4->hdmi->hpd_active_low)
--- /dev/null
+From f0be0cb1bc970ddc67e9194d4d6ca5a3a18cd903 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 4 Mar 2016 12:32:06 -0800
+Subject: [PATCH 331/423] dt-bindings: Add binding docs for V3D.
+
+This was missed in the upstreaming process.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stephen Warren <swarren@wwwdotorg.org>
+(cherry picked from commit 4653f22e9ab08b2b7178b7262a9326eb777e0266)
+---
+ Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
++++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
+@@ -35,6 +35,12 @@ Optional properties for HDMI:
+ as an interrupt/status bit in the HDMI controller
+ itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt
+
++Required properties for V3D:
++- compatible: Should be "brcm,bcm2835-v3d"
++- reg: Physical base address and length of the V3D's registers
++- interrupts: The interrupt number
++ See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
++
+ Example:
+ pixelvalve@7e807000 {
+ compatible = "brcm,bcm2835-pixelvalve2";
+@@ -60,6 +66,12 @@ hdmi: hdmi@7e902000 {
+ clock-names = "pixel", "hdmi";
+ };
+
++v3d: v3d@7ec00000 {
++ compatible = "brcm,bcm2835-v3d";
++ reg = <0x7ec00000 0x1000>;
++ interrupts = <1 10>;
++};
++
+ vc4: gpu {
+ compatible = "brcm,bcm2835-vc4";
+ };
+++ /dev/null
-From 57a400e810c8486b4e80392fffb1faedf0cdb447 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 6 May 2016 12:59:27 -0700
-Subject: [PATCH 332/381] BCM270X: Include DRM_PANEL_SIMPLE in the defconfigs.
-
-This is going to be required for the Adafruit DPI panel support.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -817,6 +817,7 @@ CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
- CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
-+CONFIG_DRM_PANEL_SIMPLE=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
- CONFIG_FB_BCM2708=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -809,6 +809,7 @@ CONFIG_VIDEO_MT9V011=m
- CONFIG_DRM=m
- CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
-+CONFIG_DRM_PANEL_SIMPLE=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
- CONFIG_FB_BCM2708=y
--- /dev/null
+From dca9cac2b454a88889adc7befac74090612576ef Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 10 Feb 2016 11:42:32 -0800
+Subject: [PATCH 332/423] drm/vc4: Add DPI driver
+
+The DPI interface involves taking a ton of our GPIOs to be used as
+outputs, and routing display signals over them in parallel.
+
+v2: Use display_info.bus_formats[] to replace our custom DT
+ properties.
+v3: Rebase on V3D documentation changes.
+v4: Fix rebase detritus from V3D documentation changes.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Rob Herring <robh@kernel.org>
+(cherry picked from commit 08302c35b59d306ff37b996e56fb2a488c1d2c2e)
+---
+ .../devicetree/bindings/display/brcm,bcm-vc4.txt | 36 ++
+ drivers/gpu/drm/vc4/Kconfig | 1 +
+ drivers/gpu/drm/vc4/Makefile | 1 +
+ drivers/gpu/drm/vc4/vc4_debugfs.c | 1 +
+ drivers/gpu/drm/vc4/vc4_dpi.c | 520 +++++++++++++++++++++
+ drivers/gpu/drm/vc4/vc4_drv.c | 1 +
+ drivers/gpu/drm/vc4/vc4_drv.h | 5 +
+ 7 files changed, 565 insertions(+)
+ create mode 100644 drivers/gpu/drm/vc4/vc4_dpi.c
+
+--- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
++++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
+@@ -35,12 +35,22 @@ Optional properties for HDMI:
+ as an interrupt/status bit in the HDMI controller
+ itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt
+
++Required properties for DPI:
++- compatible: Should be "brcm,bcm2835-dpi"
++- reg: Physical base address and length of the registers
++- clocks: a) core: The core clock the unit runs on
++ b) pixel: The pixel clock that feeds the pixelvalve
++- port: Port node with a single endpoint connecting to the panel
++ device, as defined in [1]
++
+ Required properties for V3D:
+ - compatible: Should be "brcm,bcm2835-v3d"
+ - reg: Physical base address and length of the V3D's registers
+ - interrupts: The interrupt number
+ See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
+
++[1] Documentation/devicetree/bindings/media/video-interfaces.txt
++
+ Example:
+ pixelvalve@7e807000 {
+ compatible = "brcm,bcm2835-pixelvalve2";
+@@ -66,6 +76,22 @@ hdmi: hdmi@7e902000 {
+ clock-names = "pixel", "hdmi";
+ };
+
++dpi: dpi@7e208000 {
++ compatible = "brcm,bcm2835-dpi";
++ reg = <0x7e208000 0x8c>;
++ clocks = <&clocks BCM2835_CLOCK_VPU>,
++ <&clocks BCM2835_CLOCK_DPI>;
++ clock-names = "core", "pixel";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ port {
++ dpi_out: endpoint@0 {
++ remote-endpoint = <&panel_in>;
++ };
++ };
++};
++
+ v3d: v3d@7ec00000 {
+ compatible = "brcm,bcm2835-v3d";
+ reg = <0x7ec00000 0x1000>;
+@@ -75,3 +101,13 @@ v3d: v3d@7ec00000 {
+ vc4: gpu {
+ compatible = "brcm,bcm2835-vc4";
+ };
++
++panel: panel {
++ compatible = "ontat,yx700wv03", "simple-panel";
++
++ port {
++ panel_in: endpoint {
++ remote-endpoint = <&dpi_out>;
++ };
++ };
++};
+--- a/drivers/gpu/drm/vc4/Kconfig
++++ b/drivers/gpu/drm/vc4/Kconfig
+@@ -5,6 +5,7 @@ config DRM_VC4
+ select DRM_KMS_HELPER
+ select DRM_KMS_CMA_HELPER
+ select DRM_GEM_CMA_HELPER
++ select DRM_PANEL
+ help
+ Choose this option if you have a system that has a Broadcom
+ VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835.
+--- a/drivers/gpu/drm/vc4/Makefile
++++ b/drivers/gpu/drm/vc4/Makefile
+@@ -7,6 +7,7 @@ vc4-y := \
+ vc4_bo.o \
+ vc4_crtc.o \
+ vc4_drv.o \
++ vc4_dpi.o \
+ vc4_kms.o \
+ vc4_gem.o \
+ vc4_hdmi.o \
+--- a/drivers/gpu/drm/vc4/vc4_debugfs.c
++++ b/drivers/gpu/drm/vc4/vc4_debugfs.c
+@@ -17,6 +17,7 @@
+
+ static const struct drm_info_list vc4_debugfs_list[] = {
+ {"bo_stats", vc4_bo_stats_debugfs, 0},
++ {"dpi_regs", vc4_dpi_debugfs_regs, 0},
+ {"gem_exec", vc4_gem_exec_debugfs, 0},
+ {"hdmi_regs", vc4_hdmi_debugfs_regs, 0},
+ {"hvs_regs", vc4_hvs_debugfs_regs, 0},
+--- /dev/null
++++ b/drivers/gpu/drm/vc4/vc4_dpi.c
+@@ -0,0 +1,520 @@
++/*
++ * Copyright (C) 2016 Broadcom Limited
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program. If not, see <http://www.gnu.org/licenses/>.
++ */
++
++/**
++ * DOC: VC4 DPI module
++ *
++ * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
++ * signals, which are routed out to GPIO0-27 with the ALT2 function.
++ */
++
++#include "drm_atomic_helper.h"
++#include "drm_crtc_helper.h"
++#include "drm_edid.h"
++#include "drm_panel.h"
++#include "linux/clk.h"
++#include "linux/component.h"
++#include "linux/of_graph.h"
++#include "linux/of_platform.h"
++#include "vc4_drv.h"
++#include "vc4_regs.h"
++
++#define DPI_C 0x00
++# define DPI_OUTPUT_ENABLE_MODE BIT(16)
++
++/* The order field takes the incoming 24 bit RGB from the pixel valve
++ * and shuffles the 3 channels.
++ */
++# define DPI_ORDER_MASK VC4_MASK(15, 14)
++# define DPI_ORDER_SHIFT 14
++# define DPI_ORDER_RGB 0
++# define DPI_ORDER_BGR 1
++# define DPI_ORDER_GRB 2
++# define DPI_ORDER_BRG 3
++
++/* The format field takes the ORDER-shuffled pixel valve data and
++ * formats it onto the output lines.
++ */
++# define DPI_FORMAT_MASK VC4_MASK(13, 11)
++# define DPI_FORMAT_SHIFT 11
++/* This define is named in the hardware, but actually just outputs 0. */
++# define DPI_FORMAT_9BIT_666_RGB 0
++/* Outputs 00000000rrrrrggggggbbbbb */
++# define DPI_FORMAT_16BIT_565_RGB_1 1
++/* Outputs 000rrrrr00gggggg000bbbbb */
++# define DPI_FORMAT_16BIT_565_RGB_2 2
++/* Outputs 00rrrrr000gggggg00bbbbb0 */
++# define DPI_FORMAT_16BIT_565_RGB_3 3
++/* Outputs 000000rrrrrrggggggbbbbbb */
++# define DPI_FORMAT_18BIT_666_RGB_1 4
++/* Outputs 00rrrrrr00gggggg00bbbbbb */
++# define DPI_FORMAT_18BIT_666_RGB_2 5
++/* Outputs rrrrrrrrggggggggbbbbbbbb */
++# define DPI_FORMAT_24BIT_888_RGB 6
++
++/* Reverses the polarity of the corresponding signal */
++# define DPI_PIXEL_CLK_INVERT BIT(10)
++# define DPI_HSYNC_INVERT BIT(9)
++# define DPI_VSYNC_INVERT BIT(8)
++# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
++
++/* Outputs the signal the falling clock edge instead of rising. */
++# define DPI_HSYNC_NEGATE BIT(6)
++# define DPI_VSYNC_NEGATE BIT(5)
++# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
++
++/* Disables the signal */
++# define DPI_HSYNC_DISABLE BIT(3)
++# define DPI_VSYNC_DISABLE BIT(2)
++# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
++
++/* Power gate to the device, full reset at 0 -> 1 transition */
++# define DPI_ENABLE BIT(0)
++
++/* All other registers besides DPI_C return the ID */
++#define DPI_ID 0x04
++# define DPI_ID_VALUE 0x00647069
++
++/* General DPI hardware state. */
++struct vc4_dpi {
++ struct platform_device *pdev;
++
++ struct drm_encoder *encoder;
++ struct drm_connector *connector;
++ struct drm_panel *panel;
++
++ void __iomem *regs;
++
++ struct clk *pixel_clock;
++ struct clk *core_clock;
++};
++
++#define DPI_READ(offset) readl(dpi->regs + (offset))
++#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
++
++/* VC4 DPI encoder KMS struct */
++struct vc4_dpi_encoder {
++ struct vc4_encoder base;
++ struct vc4_dpi *dpi;
++};
++
++static inline struct vc4_dpi_encoder *
++to_vc4_dpi_encoder(struct drm_encoder *encoder)
++{
++ return container_of(encoder, struct vc4_dpi_encoder, base.base);
++}
++
++/* VC4 DPI connector KMS struct */
++struct vc4_dpi_connector {
++ struct drm_connector base;
++ struct vc4_dpi *dpi;
++
++ /* Since the connector is attached to just the one encoder,
++ * this is the reference to it so we can do the best_encoder()
++ * hook.
++ */
++ struct drm_encoder *encoder;
++};
++
++static inline struct vc4_dpi_connector *
++to_vc4_dpi_connector(struct drm_connector *connector)
++{
++ return container_of(connector, struct vc4_dpi_connector, base);
++}
++
++#define DPI_REG(reg) { reg, #reg }
++static const struct {
++ u32 reg;
++ const char *name;
++} dpi_regs[] = {
++ DPI_REG(DPI_C),
++ DPI_REG(DPI_ID),
++};
++
++static void vc4_dpi_dump_regs(struct vc4_dpi *dpi)
++{
++ int i;
++
++ for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
++ DRM_INFO("0x%04x (%s): 0x%08x\n",
++ dpi_regs[i].reg, dpi_regs[i].name,
++ DPI_READ(dpi_regs[i].reg));
++ }
++}
++
++#ifdef CONFIG_DEBUG_FS
++int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
++{
++ struct drm_info_node *node = (struct drm_info_node *)m->private;
++ struct drm_device *dev = node->minor->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_dpi *dpi = vc4->dpi;
++ int i;
++
++ if (!dpi)
++ return 0;
++
++ for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
++ seq_printf(m, "%s (0x%04x): 0x%08x\n",
++ dpi_regs[i].name, dpi_regs[i].reg,
++ DPI_READ(dpi_regs[i].reg));
++ }
++
++ return 0;
++}
++#endif
++
++static enum drm_connector_status
++vc4_dpi_connector_detect(struct drm_connector *connector, bool force)
++{
++ struct vc4_dpi_connector *vc4_connector =
++ to_vc4_dpi_connector(connector);
++ struct vc4_dpi *dpi = vc4_connector->dpi;
++
++ if (dpi->panel)
++ return connector_status_connected;
++ else
++ return connector_status_disconnected;
++}
++
++static void vc4_dpi_connector_destroy(struct drm_connector *connector)
++{
++ drm_connector_unregister(connector);
++ drm_connector_cleanup(connector);
++}
++
++static int vc4_dpi_connector_get_modes(struct drm_connector *connector)
++{
++ struct vc4_dpi_connector *vc4_connector =
++ to_vc4_dpi_connector(connector);
++ struct vc4_dpi *dpi = vc4_connector->dpi;
++
++ if (dpi->panel)
++ return drm_panel_get_modes(dpi->panel);
++
++ return 0;
++}
++
++static struct drm_encoder *
++vc4_dpi_connector_best_encoder(struct drm_connector *connector)
++{
++ struct vc4_dpi_connector *dpi_connector =
++ to_vc4_dpi_connector(connector);
++ return dpi_connector->encoder;
++}
++
++static const struct drm_connector_funcs vc4_dpi_connector_funcs = {
++ .dpms = drm_atomic_helper_connector_dpms,
++ .detect = vc4_dpi_connector_detect,
++ .fill_modes = drm_helper_probe_single_connector_modes,
++ .destroy = vc4_dpi_connector_destroy,
++ .reset = drm_atomic_helper_connector_reset,
++ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
++ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
++};
++
++static const struct drm_connector_helper_funcs vc4_dpi_connector_helper_funcs = {
++ .get_modes = vc4_dpi_connector_get_modes,
++ .best_encoder = vc4_dpi_connector_best_encoder,
++};
++
++static struct drm_connector *vc4_dpi_connector_init(struct drm_device *dev,
++ struct vc4_dpi *dpi)
++{
++ struct drm_connector *connector = NULL;
++ struct vc4_dpi_connector *dpi_connector;
++ int ret = 0;
++
++ dpi_connector = devm_kzalloc(dev->dev, sizeof(*dpi_connector),
++ GFP_KERNEL);
++ if (!dpi_connector) {
++ ret = -ENOMEM;
++ goto fail;
++ }
++ connector = &dpi_connector->base;
++
++ dpi_connector->encoder = dpi->encoder;
++ dpi_connector->dpi = dpi;
++
++ drm_connector_init(dev, connector, &vc4_dpi_connector_funcs,
++ DRM_MODE_CONNECTOR_DPI);
++ drm_connector_helper_add(connector, &vc4_dpi_connector_helper_funcs);
++
++ connector->polled = 0;
++ connector->interlace_allowed = 0;
++ connector->doublescan_allowed = 0;
++
++ drm_mode_connector_attach_encoder(connector, dpi->encoder);
++
++ return connector;
++
++ fail:
++ if (connector)
++ vc4_dpi_connector_destroy(connector);
++
++ return ERR_PTR(ret);
++}
++
++static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
++ .destroy = drm_encoder_cleanup,
++};
++
++static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
++{
++ struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
++ struct vc4_dpi *dpi = vc4_encoder->dpi;
++
++ drm_panel_disable(dpi->panel);
++
++ clk_disable_unprepare(dpi->pixel_clock);
++
++ drm_panel_unprepare(dpi->panel);
++}
++
++static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
++{
++ struct drm_display_mode *mode = &encoder->crtc->mode;
++ struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
++ struct vc4_dpi *dpi = vc4_encoder->dpi;
++ u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
++ int ret;
++
++ ret = drm_panel_prepare(dpi->panel);
++ if (ret) {
++ DRM_ERROR("Panel failed to prepare\n");
++ return;
++ }
++
++ if (dpi->connector->display_info.num_bus_formats) {
++ u32 bus_format = dpi->connector->display_info.bus_formats[0];
++
++ switch (bus_format) {
++ case MEDIA_BUS_FMT_RGB888_1X24:
++ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
++ DPI_FORMAT);
++ break;
++ case MEDIA_BUS_FMT_BGR888_1X24:
++ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
++ DPI_FORMAT);
++ dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
++ break;
++ case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
++ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
++ DPI_FORMAT);
++ break;
++ case MEDIA_BUS_FMT_RGB666_1X18:
++ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
++ DPI_FORMAT);
++ break;
++ case MEDIA_BUS_FMT_RGB565_1X16:
++ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
++ DPI_FORMAT);
++ break;
++ default:
++ DRM_ERROR("Unknown media bus format %d\n", bus_format);
++ break;
++ }
++ }
++
++ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
++ dpi_c |= DPI_HSYNC_INVERT;
++ else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
++ dpi_c |= DPI_HSYNC_DISABLE;
++
++ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
++ dpi_c |= DPI_VSYNC_INVERT;
++ else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
++ dpi_c |= DPI_VSYNC_DISABLE;
++
++ DPI_WRITE(DPI_C, dpi_c);
++
++ ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
++ if (ret)
++ DRM_ERROR("Failed to set clock rate: %d\n", ret);
++
++ ret = clk_prepare_enable(dpi->pixel_clock);
++ if (ret)
++ DRM_ERROR("Failed to set clock rate: %d\n", ret);
++
++ ret = drm_panel_enable(dpi->panel);
++ if (ret) {
++ DRM_ERROR("Panel failed to enable\n");
++ drm_panel_unprepare(dpi->panel);
++ return;
++ }
++}
++
++static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
++ .disable = vc4_dpi_encoder_disable,
++ .enable = vc4_dpi_encoder_enable,
++};
++
++static const struct of_device_id vc4_dpi_dt_match[] = {
++ { .compatible = "brcm,bcm2835-dpi", .data = NULL },
++ {}
++};
++
++/* Walks the OF graph to find the panel node and then asks DRM to look
++ * up the panel.
++ */
++static struct drm_panel *vc4_dpi_get_panel(struct device *dev)
++{
++ struct device_node *endpoint, *panel_node;
++ struct device_node *np = dev->of_node;
++ struct drm_panel *panel;
++
++ endpoint = of_graph_get_next_endpoint(np, NULL);
++ if (!endpoint) {
++ dev_err(dev, "no endpoint to fetch DPI panel\n");
++ return NULL;
++ }
++
++ /* don't proceed if we have an endpoint but no panel_node tied to it */
++ panel_node = of_graph_get_remote_port_parent(endpoint);
++ of_node_put(endpoint);
++ if (!panel_node) {
++ dev_err(dev, "no valid panel node\n");
++ return NULL;
++ }
++
++ panel = of_drm_find_panel(panel_node);
++ of_node_put(panel_node);
++
++ return panel;
++}
++
++static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct drm_device *drm = dev_get_drvdata(master);
++ struct vc4_dev *vc4 = to_vc4_dev(drm);
++ struct vc4_dpi *dpi;
++ struct vc4_dpi_encoder *vc4_dpi_encoder;
++ int ret;
++
++ dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
++ if (!dpi)
++ return -ENOMEM;
++
++ vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
++ GFP_KERNEL);
++ if (!vc4_dpi_encoder)
++ return -ENOMEM;
++ vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
++ vc4_dpi_encoder->dpi = dpi;
++ dpi->encoder = &vc4_dpi_encoder->base.base;
++
++ dpi->pdev = pdev;
++ dpi->regs = vc4_ioremap_regs(pdev, 0);
++ if (IS_ERR(dpi->regs))
++ return PTR_ERR(dpi->regs);
++
++ vc4_dpi_dump_regs(dpi);
++
++ if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
++ dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
++ DPI_READ(DPI_ID), DPI_ID_VALUE);
++ return -ENODEV;
++ }
++
++ dpi->core_clock = devm_clk_get(dev, "core");
++ if (IS_ERR(dpi->core_clock)) {
++ ret = PTR_ERR(dpi->core_clock);
++ if (ret != -EPROBE_DEFER)
++ DRM_ERROR("Failed to get core clock: %d\n", ret);
++ return ret;
++ }
++ dpi->pixel_clock = devm_clk_get(dev, "pixel");
++ if (IS_ERR(dpi->pixel_clock)) {
++ ret = PTR_ERR(dpi->pixel_clock);
++ if (ret != -EPROBE_DEFER)
++ DRM_ERROR("Failed to get pixel clock: %d\n", ret);
++ return ret;
++ }
++
++ ret = clk_prepare_enable(dpi->core_clock);
++ if (ret)
++ DRM_ERROR("Failed to turn on core clock: %d\n", ret);
++
++ dpi->panel = vc4_dpi_get_panel(dev);
++
++ drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
++ DRM_MODE_ENCODER_DPI);
++ drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
++
++ dpi->connector = vc4_dpi_connector_init(drm, dpi);
++ if (IS_ERR(dpi->connector)) {
++ ret = PTR_ERR(dpi->connector);
++ goto err_destroy_encoder;
++ }
++
++ if (dpi->panel)
++ drm_panel_attach(dpi->panel, dpi->connector);
++
++ dev_set_drvdata(dev, dpi);
++
++ vc4->dpi = dpi;
++
++ return 0;
++
++err_destroy_encoder:
++ drm_encoder_cleanup(dpi->encoder);
++ clk_disable_unprepare(dpi->core_clock);
++ return ret;
++}
++
++static void vc4_dpi_unbind(struct device *dev, struct device *master,
++ void *data)
++{
++ struct drm_device *drm = dev_get_drvdata(master);
++ struct vc4_dev *vc4 = to_vc4_dev(drm);
++ struct vc4_dpi *dpi = dev_get_drvdata(dev);
++
++ if (dpi->panel)
++ drm_panel_detach(dpi->panel);
++
++ vc4_dpi_connector_destroy(dpi->connector);
++ drm_encoder_cleanup(dpi->encoder);
++
++ clk_disable_unprepare(dpi->core_clock);
++
++ vc4->dpi = NULL;
++}
++
++static const struct component_ops vc4_dpi_ops = {
++ .bind = vc4_dpi_bind,
++ .unbind = vc4_dpi_unbind,
++};
++
++static int vc4_dpi_dev_probe(struct platform_device *pdev)
++{
++ return component_add(&pdev->dev, &vc4_dpi_ops);
++}
++
++static int vc4_dpi_dev_remove(struct platform_device *pdev)
++{
++ component_del(&pdev->dev, &vc4_dpi_ops);
++ return 0;
++}
++
++struct platform_driver vc4_dpi_driver = {
++ .probe = vc4_dpi_dev_probe,
++ .remove = vc4_dpi_dev_remove,
++ .driver = {
++ .name = "vc4_dpi",
++ .of_match_table = vc4_dpi_dt_match,
++ },
++};
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -259,6 +259,7 @@ static const struct component_master_ops
+
+ static struct platform_driver *const component_drivers[] = {
+ &vc4_hdmi_driver,
++ &vc4_dpi_driver,
+ &vc4_crtc_driver,
+ &vc4_hvs_driver,
+ &vc4_v3d_driver,
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -16,6 +16,7 @@ struct vc4_dev {
+ struct vc4_hvs *hvs;
+ struct vc4_crtc *crtc[3];
+ struct vc4_v3d *v3d;
++ struct vc4_dpi *dpi;
+
+ struct drm_fbdev_cma *fbdev;
+ struct rpi_firmware *firmware;
+@@ -418,6 +419,10 @@ void vc4_debugfs_cleanup(struct drm_mino
+ /* vc4_drv.c */
+ void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index);
+
++/* vc4_dpi.c */
++extern struct platform_driver vc4_dpi_driver;
++int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused);
++
+ /* vc4_gem.c */
+ void vc4_gem_init(struct drm_device *dev);
+ void vc4_gem_destroy(struct drm_device *dev);
+++ /dev/null
-From 5022d46f5e7a63c305c1259e806f0ebf2ba5527e Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 18 Mar 2016 12:34:59 -0700
-Subject: [PATCH 333/381] drm: Add an encoder and connector type enum for DPI.
-
-Right now exynos is exposing DPI as a TMDS encoder and VGA connector,
-which seems rather misleading. This isn't just an internal detail,
-since xrandr actually exposes "VGA" as the output name. Define some
-new enums so that vc4's DPI can have a more informative name.
-
-I considered other names for the connector as well. For VC4, the
-Adafruit DPI kippah takes the 28 GPIO pins and routes them to a
-standard-ish 40-pin FPC connector, but "40-pin FPC" doesn't uniquely
-identify an ordering of pins (apparently some other orderings exist),
-doesn't explain things as well for the user (who, if anything, knows
-their product is a DPI kippah/panel combo), and actually doesn't have
-to exist (one could connect the 28 GPIOs directly to something else).
-Simply "DPI" seems like a good compromise name to distinguish from the
-HDMI, DSI, and TV connectors .
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0b27c02a7f1c697694f2ad6d6517e7dbf9ecfa39)
----
- drivers/gpu/drm/drm_crtc.c | 2 ++
- include/uapi/drm/drm_mode.h | 2 ++
- 2 files changed, 4 insertions(+)
-
---- a/drivers/gpu/drm/drm_crtc.c
-+++ b/drivers/gpu/drm/drm_crtc.c
-@@ -168,6 +168,7 @@ static struct drm_conn_prop_enum_list dr
- { DRM_MODE_CONNECTOR_eDP, "eDP" },
- { DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },
- { DRM_MODE_CONNECTOR_DSI, "DSI" },
-+ { DRM_MODE_CONNECTOR_DPI, "DPI" },
- };
-
- static const struct drm_prop_enum_list drm_encoder_enum_list[] = {
-@@ -179,6 +180,7 @@ static const struct drm_prop_enum_list d
- { DRM_MODE_ENCODER_VIRTUAL, "Virtual" },
- { DRM_MODE_ENCODER_DSI, "DSI" },
- { DRM_MODE_ENCODER_DPMST, "DP MST" },
-+ { DRM_MODE_ENCODER_DPI, "DPI" },
- };
-
- static const struct drm_prop_enum_list drm_subpixel_enum_list[] = {
---- a/include/uapi/drm/drm_mode.h
-+++ b/include/uapi/drm/drm_mode.h
-@@ -202,6 +202,7 @@ struct drm_mode_get_plane_res {
- #define DRM_MODE_ENCODER_VIRTUAL 5
- #define DRM_MODE_ENCODER_DSI 6
- #define DRM_MODE_ENCODER_DPMST 7
-+#define DRM_MODE_ENCODER_DPI 8
-
- struct drm_mode_get_encoder {
- __u32 encoder_id;
-@@ -241,6 +242,7 @@ struct drm_mode_get_encoder {
- #define DRM_MODE_CONNECTOR_eDP 14
- #define DRM_MODE_CONNECTOR_VIRTUAL 15
- #define DRM_MODE_CONNECTOR_DSI 16
-+#define DRM_MODE_CONNECTOR_DPI 17
-
- struct drm_mode_get_connector {
-
--- /dev/null
+From 1d72ad4fa3c57879ab677f66ce957a093eeb577c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 4 Apr 2016 14:25:59 -0700
+Subject: [PATCH 333/423] drm/vc4: Fix NULL deref in HDMI init error path
+
+If you make it here other than through err_destroy_encoder, vc4->hdmi
+is still NULL.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 5883980313af70aec0ceebaef6ef0709726e5e63)
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -573,7 +573,7 @@ err_unprepare_hsm:
+ err_unprepare_pix:
+ clk_disable_unprepare(hdmi->pixel_clock);
+ err_put_i2c:
+- put_device(&vc4->hdmi->ddc->dev);
++ put_device(&hdmi->ddc->dev);
+
+ return ret;
+ }
--- /dev/null
+From d8bb97aba2a3d6c946b7c176370a71d117dee52c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Apr 2016 13:24:14 -0700
+Subject: [PATCH 334/423] drm/vc4: Kick out the simplefb framebuffer before we
+ set up KMS.
+
+If we don't, then simplefb stays loaded on /dev/fb0 even though
+scanout isn't happening from simplefb's memory area any more, and you
+end up with no console.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Dave Airlie <airlied@redhat.com>
+(cherry picked from commit b3a15f6d55fb584dd4d8baac5d1b6a398720620c)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -164,6 +164,24 @@ static void vc4_match_add_drivers(struct
+ }
+ }
+
++static void vc4_kick_out_firmware_fb(void)
++{
++ struct apertures_struct *ap;
++
++ ap = alloc_apertures(1);
++ if (!ap)
++ return;
++
++ /* Since VC4 is a UMA device, the simplefb node may have been
++ * located anywhere in memory.
++ */
++ ap->ranges[0].base = 0;
++ ap->ranges[0].size = ~0;
++
++ remove_conflicting_framebuffers(ap, "vc4drmfb", false);
++ kfree(ap);
++}
++
+ static int vc4_drm_bind(struct device *dev)
+ {
+ struct platform_device *pdev = to_platform_device(dev);
+@@ -208,6 +226,8 @@ static int vc4_drm_bind(struct device *d
+ if (ret)
+ goto gem_destroy;
+
++ vc4_kick_out_firmware_fb();
++
+ ret = drm_dev_register(drm, 0);
+ if (ret < 0)
+ goto unbind_all;
+++ /dev/null
-From 7f900beff9a3733ab171272212cb9e28e6b0629b Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 4 Mar 2016 12:32:06 -0800
-Subject: [PATCH 334/381] dt-bindings: Add binding docs for V3D.
-
-This was missed in the upstreaming process.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Stephen Warren <swarren@wwwdotorg.org>
-(cherry picked from commit 4653f22e9ab08b2b7178b7262a9326eb777e0266)
----
- Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
-+++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
-@@ -35,6 +35,12 @@ Optional properties for HDMI:
- as an interrupt/status bit in the HDMI controller
- itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt
-
-+Required properties for V3D:
-+- compatible: Should be "brcm,bcm2835-v3d"
-+- reg: Physical base address and length of the V3D's registers
-+- interrupts: The interrupt number
-+ See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
-+
- Example:
- pixelvalve@7e807000 {
- compatible = "brcm,bcm2835-pixelvalve2";
-@@ -60,6 +66,12 @@ hdmi: hdmi@7e902000 {
- clock-names = "pixel", "hdmi";
- };
-
-+v3d: v3d@7ec00000 {
-+ compatible = "brcm,bcm2835-v3d";
-+ reg = <0x7ec00000 0x1000>;
-+ interrupts = <1 10>;
-+};
-+
- vc4: gpu {
- compatible = "brcm,bcm2835-vc4";
- };
+++ /dev/null
-From f12e336d29983c2f56da38810600b6f57cc62371 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 10 Feb 2016 11:42:32 -0800
-Subject: [PATCH 335/381] drm/vc4: Add DPI driver
-
-The DPI interface involves taking a ton of our GPIOs to be used as
-outputs, and routing display signals over them in parallel.
-
-v2: Use display_info.bus_formats[] to replace our custom DT
- properties.
-v3: Rebase on V3D documentation changes.
-v4: Fix rebase detritus from V3D documentation changes.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Rob Herring <robh@kernel.org>
-(cherry picked from commit 08302c35b59d306ff37b996e56fb2a488c1d2c2e)
----
- .../devicetree/bindings/display/brcm,bcm-vc4.txt | 36 ++
- drivers/gpu/drm/vc4/Kconfig | 1 +
- drivers/gpu/drm/vc4/Makefile | 1 +
- drivers/gpu/drm/vc4/vc4_debugfs.c | 1 +
- drivers/gpu/drm/vc4/vc4_dpi.c | 520 +++++++++++++++++++++
- drivers/gpu/drm/vc4/vc4_drv.c | 1 +
- drivers/gpu/drm/vc4/vc4_drv.h | 5 +
- 7 files changed, 565 insertions(+)
- create mode 100644 drivers/gpu/drm/vc4/vc4_dpi.c
-
---- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
-+++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
-@@ -35,12 +35,22 @@ Optional properties for HDMI:
- as an interrupt/status bit in the HDMI controller
- itself). See bindings/pinctrl/brcm,bcm2835-gpio.txt
-
-+Required properties for DPI:
-+- compatible: Should be "brcm,bcm2835-dpi"
-+- reg: Physical base address and length of the registers
-+- clocks: a) core: The core clock the unit runs on
-+ b) pixel: The pixel clock that feeds the pixelvalve
-+- port: Port node with a single endpoint connecting to the panel
-+ device, as defined in [1]
-+
- Required properties for V3D:
- - compatible: Should be "brcm,bcm2835-v3d"
- - reg: Physical base address and length of the V3D's registers
- - interrupts: The interrupt number
- See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
-
-+[1] Documentation/devicetree/bindings/media/video-interfaces.txt
-+
- Example:
- pixelvalve@7e807000 {
- compatible = "brcm,bcm2835-pixelvalve2";
-@@ -66,6 +76,22 @@ hdmi: hdmi@7e902000 {
- clock-names = "pixel", "hdmi";
- };
-
-+dpi: dpi@7e208000 {
-+ compatible = "brcm,bcm2835-dpi";
-+ reg = <0x7e208000 0x8c>;
-+ clocks = <&clocks BCM2835_CLOCK_VPU>,
-+ <&clocks BCM2835_CLOCK_DPI>;
-+ clock-names = "core", "pixel";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ port {
-+ dpi_out: endpoint@0 {
-+ remote-endpoint = <&panel_in>;
-+ };
-+ };
-+};
-+
- v3d: v3d@7ec00000 {
- compatible = "brcm,bcm2835-v3d";
- reg = <0x7ec00000 0x1000>;
-@@ -75,3 +101,13 @@ v3d: v3d@7ec00000 {
- vc4: gpu {
- compatible = "brcm,bcm2835-vc4";
- };
-+
-+panel: panel {
-+ compatible = "ontat,yx700wv03", "simple-panel";
-+
-+ port {
-+ panel_in: endpoint {
-+ remote-endpoint = <&dpi_out>;
-+ };
-+ };
-+};
---- a/drivers/gpu/drm/vc4/Kconfig
-+++ b/drivers/gpu/drm/vc4/Kconfig
-@@ -5,6 +5,7 @@ config DRM_VC4
- select DRM_KMS_HELPER
- select DRM_KMS_CMA_HELPER
- select DRM_GEM_CMA_HELPER
-+ select DRM_PANEL
- help
- Choose this option if you have a system that has a Broadcom
- VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835.
---- a/drivers/gpu/drm/vc4/Makefile
-+++ b/drivers/gpu/drm/vc4/Makefile
-@@ -7,6 +7,7 @@ vc4-y := \
- vc4_bo.o \
- vc4_crtc.o \
- vc4_drv.o \
-+ vc4_dpi.o \
- vc4_kms.o \
- vc4_gem.o \
- vc4_hdmi.o \
---- a/drivers/gpu/drm/vc4/vc4_debugfs.c
-+++ b/drivers/gpu/drm/vc4/vc4_debugfs.c
-@@ -17,6 +17,7 @@
-
- static const struct drm_info_list vc4_debugfs_list[] = {
- {"bo_stats", vc4_bo_stats_debugfs, 0},
-+ {"dpi_regs", vc4_dpi_debugfs_regs, 0},
- {"gem_exec", vc4_gem_exec_debugfs, 0},
- {"hdmi_regs", vc4_hdmi_debugfs_regs, 0},
- {"hvs_regs", vc4_hvs_debugfs_regs, 0},
---- /dev/null
-+++ b/drivers/gpu/drm/vc4/vc4_dpi.c
-@@ -0,0 +1,520 @@
-+/*
-+ * Copyright (C) 2016 Broadcom Limited
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+/**
-+ * DOC: VC4 DPI module
-+ *
-+ * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
-+ * signals, which are routed out to GPIO0-27 with the ALT2 function.
-+ */
-+
-+#include "drm_atomic_helper.h"
-+#include "drm_crtc_helper.h"
-+#include "drm_edid.h"
-+#include "drm_panel.h"
-+#include "linux/clk.h"
-+#include "linux/component.h"
-+#include "linux/of_graph.h"
-+#include "linux/of_platform.h"
-+#include "vc4_drv.h"
-+#include "vc4_regs.h"
-+
-+#define DPI_C 0x00
-+# define DPI_OUTPUT_ENABLE_MODE BIT(16)
-+
-+/* The order field takes the incoming 24 bit RGB from the pixel valve
-+ * and shuffles the 3 channels.
-+ */
-+# define DPI_ORDER_MASK VC4_MASK(15, 14)
-+# define DPI_ORDER_SHIFT 14
-+# define DPI_ORDER_RGB 0
-+# define DPI_ORDER_BGR 1
-+# define DPI_ORDER_GRB 2
-+# define DPI_ORDER_BRG 3
-+
-+/* The format field takes the ORDER-shuffled pixel valve data and
-+ * formats it onto the output lines.
-+ */
-+# define DPI_FORMAT_MASK VC4_MASK(13, 11)
-+# define DPI_FORMAT_SHIFT 11
-+/* This define is named in the hardware, but actually just outputs 0. */
-+# define DPI_FORMAT_9BIT_666_RGB 0
-+/* Outputs 00000000rrrrrggggggbbbbb */
-+# define DPI_FORMAT_16BIT_565_RGB_1 1
-+/* Outputs 000rrrrr00gggggg000bbbbb */
-+# define DPI_FORMAT_16BIT_565_RGB_2 2
-+/* Outputs 00rrrrr000gggggg00bbbbb0 */
-+# define DPI_FORMAT_16BIT_565_RGB_3 3
-+/* Outputs 000000rrrrrrggggggbbbbbb */
-+# define DPI_FORMAT_18BIT_666_RGB_1 4
-+/* Outputs 00rrrrrr00gggggg00bbbbbb */
-+# define DPI_FORMAT_18BIT_666_RGB_2 5
-+/* Outputs rrrrrrrrggggggggbbbbbbbb */
-+# define DPI_FORMAT_24BIT_888_RGB 6
-+
-+/* Reverses the polarity of the corresponding signal */
-+# define DPI_PIXEL_CLK_INVERT BIT(10)
-+# define DPI_HSYNC_INVERT BIT(9)
-+# define DPI_VSYNC_INVERT BIT(8)
-+# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
-+
-+/* Outputs the signal the falling clock edge instead of rising. */
-+# define DPI_HSYNC_NEGATE BIT(6)
-+# define DPI_VSYNC_NEGATE BIT(5)
-+# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
-+
-+/* Disables the signal */
-+# define DPI_HSYNC_DISABLE BIT(3)
-+# define DPI_VSYNC_DISABLE BIT(2)
-+# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
-+
-+/* Power gate to the device, full reset at 0 -> 1 transition */
-+# define DPI_ENABLE BIT(0)
-+
-+/* All other registers besides DPI_C return the ID */
-+#define DPI_ID 0x04
-+# define DPI_ID_VALUE 0x00647069
-+
-+/* General DPI hardware state. */
-+struct vc4_dpi {
-+ struct platform_device *pdev;
-+
-+ struct drm_encoder *encoder;
-+ struct drm_connector *connector;
-+ struct drm_panel *panel;
-+
-+ void __iomem *regs;
-+
-+ struct clk *pixel_clock;
-+ struct clk *core_clock;
-+};
-+
-+#define DPI_READ(offset) readl(dpi->regs + (offset))
-+#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
-+
-+/* VC4 DPI encoder KMS struct */
-+struct vc4_dpi_encoder {
-+ struct vc4_encoder base;
-+ struct vc4_dpi *dpi;
-+};
-+
-+static inline struct vc4_dpi_encoder *
-+to_vc4_dpi_encoder(struct drm_encoder *encoder)
-+{
-+ return container_of(encoder, struct vc4_dpi_encoder, base.base);
-+}
-+
-+/* VC4 DPI connector KMS struct */
-+struct vc4_dpi_connector {
-+ struct drm_connector base;
-+ struct vc4_dpi *dpi;
-+
-+ /* Since the connector is attached to just the one encoder,
-+ * this is the reference to it so we can do the best_encoder()
-+ * hook.
-+ */
-+ struct drm_encoder *encoder;
-+};
-+
-+static inline struct vc4_dpi_connector *
-+to_vc4_dpi_connector(struct drm_connector *connector)
-+{
-+ return container_of(connector, struct vc4_dpi_connector, base);
-+}
-+
-+#define DPI_REG(reg) { reg, #reg }
-+static const struct {
-+ u32 reg;
-+ const char *name;
-+} dpi_regs[] = {
-+ DPI_REG(DPI_C),
-+ DPI_REG(DPI_ID),
-+};
-+
-+static void vc4_dpi_dump_regs(struct vc4_dpi *dpi)
-+{
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
-+ DRM_INFO("0x%04x (%s): 0x%08x\n",
-+ dpi_regs[i].reg, dpi_regs[i].name,
-+ DPI_READ(dpi_regs[i].reg));
-+ }
-+}
-+
-+#ifdef CONFIG_DEBUG_FS
-+int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
-+{
-+ struct drm_info_node *node = (struct drm_info_node *)m->private;
-+ struct drm_device *dev = node->minor->dev;
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_dpi *dpi = vc4->dpi;
-+ int i;
-+
-+ if (!dpi)
-+ return 0;
-+
-+ for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
-+ seq_printf(m, "%s (0x%04x): 0x%08x\n",
-+ dpi_regs[i].name, dpi_regs[i].reg,
-+ DPI_READ(dpi_regs[i].reg));
-+ }
-+
-+ return 0;
-+}
-+#endif
-+
-+static enum drm_connector_status
-+vc4_dpi_connector_detect(struct drm_connector *connector, bool force)
-+{
-+ struct vc4_dpi_connector *vc4_connector =
-+ to_vc4_dpi_connector(connector);
-+ struct vc4_dpi *dpi = vc4_connector->dpi;
-+
-+ if (dpi->panel)
-+ return connector_status_connected;
-+ else
-+ return connector_status_disconnected;
-+}
-+
-+static void vc4_dpi_connector_destroy(struct drm_connector *connector)
-+{
-+ drm_connector_unregister(connector);
-+ drm_connector_cleanup(connector);
-+}
-+
-+static int vc4_dpi_connector_get_modes(struct drm_connector *connector)
-+{
-+ struct vc4_dpi_connector *vc4_connector =
-+ to_vc4_dpi_connector(connector);
-+ struct vc4_dpi *dpi = vc4_connector->dpi;
-+
-+ if (dpi->panel)
-+ return drm_panel_get_modes(dpi->panel);
-+
-+ return 0;
-+}
-+
-+static struct drm_encoder *
-+vc4_dpi_connector_best_encoder(struct drm_connector *connector)
-+{
-+ struct vc4_dpi_connector *dpi_connector =
-+ to_vc4_dpi_connector(connector);
-+ return dpi_connector->encoder;
-+}
-+
-+static const struct drm_connector_funcs vc4_dpi_connector_funcs = {
-+ .dpms = drm_atomic_helper_connector_dpms,
-+ .detect = vc4_dpi_connector_detect,
-+ .fill_modes = drm_helper_probe_single_connector_modes,
-+ .destroy = vc4_dpi_connector_destroy,
-+ .reset = drm_atomic_helper_connector_reset,
-+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
-+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-+};
-+
-+static const struct drm_connector_helper_funcs vc4_dpi_connector_helper_funcs = {
-+ .get_modes = vc4_dpi_connector_get_modes,
-+ .best_encoder = vc4_dpi_connector_best_encoder,
-+};
-+
-+static struct drm_connector *vc4_dpi_connector_init(struct drm_device *dev,
-+ struct vc4_dpi *dpi)
-+{
-+ struct drm_connector *connector = NULL;
-+ struct vc4_dpi_connector *dpi_connector;
-+ int ret = 0;
-+
-+ dpi_connector = devm_kzalloc(dev->dev, sizeof(*dpi_connector),
-+ GFP_KERNEL);
-+ if (!dpi_connector) {
-+ ret = -ENOMEM;
-+ goto fail;
-+ }
-+ connector = &dpi_connector->base;
-+
-+ dpi_connector->encoder = dpi->encoder;
-+ dpi_connector->dpi = dpi;
-+
-+ drm_connector_init(dev, connector, &vc4_dpi_connector_funcs,
-+ DRM_MODE_CONNECTOR_DPI);
-+ drm_connector_helper_add(connector, &vc4_dpi_connector_helper_funcs);
-+
-+ connector->polled = 0;
-+ connector->interlace_allowed = 0;
-+ connector->doublescan_allowed = 0;
-+
-+ drm_mode_connector_attach_encoder(connector, dpi->encoder);
-+
-+ return connector;
-+
-+ fail:
-+ if (connector)
-+ vc4_dpi_connector_destroy(connector);
-+
-+ return ERR_PTR(ret);
-+}
-+
-+static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
-+ .destroy = drm_encoder_cleanup,
-+};
-+
-+static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
-+{
-+ struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
-+ struct vc4_dpi *dpi = vc4_encoder->dpi;
-+
-+ drm_panel_disable(dpi->panel);
-+
-+ clk_disable_unprepare(dpi->pixel_clock);
-+
-+ drm_panel_unprepare(dpi->panel);
-+}
-+
-+static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
-+{
-+ struct drm_display_mode *mode = &encoder->crtc->mode;
-+ struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
-+ struct vc4_dpi *dpi = vc4_encoder->dpi;
-+ u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
-+ int ret;
-+
-+ ret = drm_panel_prepare(dpi->panel);
-+ if (ret) {
-+ DRM_ERROR("Panel failed to prepare\n");
-+ return;
-+ }
-+
-+ if (dpi->connector->display_info.num_bus_formats) {
-+ u32 bus_format = dpi->connector->display_info.bus_formats[0];
-+
-+ switch (bus_format) {
-+ case MEDIA_BUS_FMT_RGB888_1X24:
-+ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
-+ DPI_FORMAT);
-+ break;
-+ case MEDIA_BUS_FMT_BGR888_1X24:
-+ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
-+ DPI_FORMAT);
-+ dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
-+ break;
-+ case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
-+ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
-+ DPI_FORMAT);
-+ break;
-+ case MEDIA_BUS_FMT_RGB666_1X18:
-+ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
-+ DPI_FORMAT);
-+ break;
-+ case MEDIA_BUS_FMT_RGB565_1X16:
-+ dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
-+ DPI_FORMAT);
-+ break;
-+ default:
-+ DRM_ERROR("Unknown media bus format %d\n", bus_format);
-+ break;
-+ }
-+ }
-+
-+ if (mode->flags & DRM_MODE_FLAG_NHSYNC)
-+ dpi_c |= DPI_HSYNC_INVERT;
-+ else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
-+ dpi_c |= DPI_HSYNC_DISABLE;
-+
-+ if (mode->flags & DRM_MODE_FLAG_NVSYNC)
-+ dpi_c |= DPI_VSYNC_INVERT;
-+ else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
-+ dpi_c |= DPI_VSYNC_DISABLE;
-+
-+ DPI_WRITE(DPI_C, dpi_c);
-+
-+ ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
-+ if (ret)
-+ DRM_ERROR("Failed to set clock rate: %d\n", ret);
-+
-+ ret = clk_prepare_enable(dpi->pixel_clock);
-+ if (ret)
-+ DRM_ERROR("Failed to set clock rate: %d\n", ret);
-+
-+ ret = drm_panel_enable(dpi->panel);
-+ if (ret) {
-+ DRM_ERROR("Panel failed to enable\n");
-+ drm_panel_unprepare(dpi->panel);
-+ return;
-+ }
-+}
-+
-+static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
-+ .disable = vc4_dpi_encoder_disable,
-+ .enable = vc4_dpi_encoder_enable,
-+};
-+
-+static const struct of_device_id vc4_dpi_dt_match[] = {
-+ { .compatible = "brcm,bcm2835-dpi", .data = NULL },
-+ {}
-+};
-+
-+/* Walks the OF graph to find the panel node and then asks DRM to look
-+ * up the panel.
-+ */
-+static struct drm_panel *vc4_dpi_get_panel(struct device *dev)
-+{
-+ struct device_node *endpoint, *panel_node;
-+ struct device_node *np = dev->of_node;
-+ struct drm_panel *panel;
-+
-+ endpoint = of_graph_get_next_endpoint(np, NULL);
-+ if (!endpoint) {
-+ dev_err(dev, "no endpoint to fetch DPI panel\n");
-+ return NULL;
-+ }
-+
-+ /* don't proceed if we have an endpoint but no panel_node tied to it */
-+ panel_node = of_graph_get_remote_port_parent(endpoint);
-+ of_node_put(endpoint);
-+ if (!panel_node) {
-+ dev_err(dev, "no valid panel node\n");
-+ return NULL;
-+ }
-+
-+ panel = of_drm_find_panel(panel_node);
-+ of_node_put(panel_node);
-+
-+ return panel;
-+}
-+
-+static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
-+{
-+ struct platform_device *pdev = to_platform_device(dev);
-+ struct drm_device *drm = dev_get_drvdata(master);
-+ struct vc4_dev *vc4 = to_vc4_dev(drm);
-+ struct vc4_dpi *dpi;
-+ struct vc4_dpi_encoder *vc4_dpi_encoder;
-+ int ret;
-+
-+ dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
-+ if (!dpi)
-+ return -ENOMEM;
-+
-+ vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
-+ GFP_KERNEL);
-+ if (!vc4_dpi_encoder)
-+ return -ENOMEM;
-+ vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
-+ vc4_dpi_encoder->dpi = dpi;
-+ dpi->encoder = &vc4_dpi_encoder->base.base;
-+
-+ dpi->pdev = pdev;
-+ dpi->regs = vc4_ioremap_regs(pdev, 0);
-+ if (IS_ERR(dpi->regs))
-+ return PTR_ERR(dpi->regs);
-+
-+ vc4_dpi_dump_regs(dpi);
-+
-+ if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
-+ dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
-+ DPI_READ(DPI_ID), DPI_ID_VALUE);
-+ return -ENODEV;
-+ }
-+
-+ dpi->core_clock = devm_clk_get(dev, "core");
-+ if (IS_ERR(dpi->core_clock)) {
-+ ret = PTR_ERR(dpi->core_clock);
-+ if (ret != -EPROBE_DEFER)
-+ DRM_ERROR("Failed to get core clock: %d\n", ret);
-+ return ret;
-+ }
-+ dpi->pixel_clock = devm_clk_get(dev, "pixel");
-+ if (IS_ERR(dpi->pixel_clock)) {
-+ ret = PTR_ERR(dpi->pixel_clock);
-+ if (ret != -EPROBE_DEFER)
-+ DRM_ERROR("Failed to get pixel clock: %d\n", ret);
-+ return ret;
-+ }
-+
-+ ret = clk_prepare_enable(dpi->core_clock);
-+ if (ret)
-+ DRM_ERROR("Failed to turn on core clock: %d\n", ret);
-+
-+ dpi->panel = vc4_dpi_get_panel(dev);
-+
-+ drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
-+ DRM_MODE_ENCODER_DPI);
-+ drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
-+
-+ dpi->connector = vc4_dpi_connector_init(drm, dpi);
-+ if (IS_ERR(dpi->connector)) {
-+ ret = PTR_ERR(dpi->connector);
-+ goto err_destroy_encoder;
-+ }
-+
-+ if (dpi->panel)
-+ drm_panel_attach(dpi->panel, dpi->connector);
-+
-+ dev_set_drvdata(dev, dpi);
-+
-+ vc4->dpi = dpi;
-+
-+ return 0;
-+
-+err_destroy_encoder:
-+ drm_encoder_cleanup(dpi->encoder);
-+ clk_disable_unprepare(dpi->core_clock);
-+ return ret;
-+}
-+
-+static void vc4_dpi_unbind(struct device *dev, struct device *master,
-+ void *data)
-+{
-+ struct drm_device *drm = dev_get_drvdata(master);
-+ struct vc4_dev *vc4 = to_vc4_dev(drm);
-+ struct vc4_dpi *dpi = dev_get_drvdata(dev);
-+
-+ if (dpi->panel)
-+ drm_panel_detach(dpi->panel);
-+
-+ vc4_dpi_connector_destroy(dpi->connector);
-+ drm_encoder_cleanup(dpi->encoder);
-+
-+ clk_disable_unprepare(dpi->core_clock);
-+
-+ vc4->dpi = NULL;
-+}
-+
-+static const struct component_ops vc4_dpi_ops = {
-+ .bind = vc4_dpi_bind,
-+ .unbind = vc4_dpi_unbind,
-+};
-+
-+static int vc4_dpi_dev_probe(struct platform_device *pdev)
-+{
-+ return component_add(&pdev->dev, &vc4_dpi_ops);
-+}
-+
-+static int vc4_dpi_dev_remove(struct platform_device *pdev)
-+{
-+ component_del(&pdev->dev, &vc4_dpi_ops);
-+ return 0;
-+}
-+
-+struct platform_driver vc4_dpi_driver = {
-+ .probe = vc4_dpi_dev_probe,
-+ .remove = vc4_dpi_dev_remove,
-+ .driver = {
-+ .name = "vc4_dpi",
-+ .of_match_table = vc4_dpi_dt_match,
-+ },
-+};
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -259,6 +259,7 @@ static const struct component_master_ops
-
- static struct platform_driver *const component_drivers[] = {
- &vc4_hdmi_driver,
-+ &vc4_dpi_driver,
- &vc4_crtc_driver,
- &vc4_hvs_driver,
- &vc4_v3d_driver,
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -16,6 +16,7 @@ struct vc4_dev {
- struct vc4_hvs *hvs;
- struct vc4_crtc *crtc[3];
- struct vc4_v3d *v3d;
-+ struct vc4_dpi *dpi;
-
- struct drm_fbdev_cma *fbdev;
- struct rpi_firmware *firmware;
-@@ -418,6 +419,10 @@ void vc4_debugfs_cleanup(struct drm_mino
- /* vc4_drv.c */
- void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index);
-
-+/* vc4_dpi.c */
-+extern struct platform_driver vc4_dpi_driver;
-+int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused);
-+
- /* vc4_gem.c */
- void vc4_gem_init(struct drm_device *dev);
- void vc4_gem_destroy(struct drm_device *dev);
--- /dev/null
+From fadf429b758f5a3b6122d73fd1f8551a5f21cf3c Mon Sep 17 00:00:00 2001
+From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Date: Tue, 26 Apr 2016 16:11:44 +0200
+Subject: [PATCH 335/423] drm/vc4: Rename async to nonblock.
+
+The async name is deprecated and should be changed to nonblocking.
+
+Cc: Eric Anholt <eric@anholt.net>
+Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Link: http://patchwork.freedesktop.org/patch/msgid/1461679905-30177-12-git-send-email-maarten.lankhorst@linux.intel.com
+(cherry picked from commit eb63961ba52ba545f5b7ebeeeefe1c98704e1a79)
+---
+ drivers/gpu/drm/vc4/vc4_kms.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -93,7 +93,7 @@ static struct vc4_commit *commit_init(st
+ * vc4_atomic_commit - commit validated state object
+ * @dev: DRM device
+ * @state: the driver state object
+- * @async: asynchronous commit
++ * @nonblock: nonblocking commit
+ *
+ * This function commits a with drm_atomic_helper_check() pre-validated state
+ * object. This can still fail when e.g. the framebuffer reservation fails. For
+@@ -104,7 +104,7 @@ static struct vc4_commit *commit_init(st
+ */
+ static int vc4_atomic_commit(struct drm_device *dev,
+ struct drm_atomic_state *state,
+- bool async)
++ bool nonblock)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ int ret;
+@@ -170,7 +170,7 @@ static int vc4_atomic_commit(struct drm_
+ * current layout.
+ */
+
+- if (async) {
++ if (nonblock) {
+ vc4_queue_seqno_cb(dev, &c->cb, wait_seqno,
+ vc4_atomic_complete_commit_seqno_cb);
+ } else {
--- /dev/null
+From ad9de9ffedcbcc35c4fe13cddabda66abc98e3ef Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 31 Mar 2016 18:38:20 -0700
+Subject: [PATCH 336/423] drm/vc4: Add support for gamma ramps.
+
+We could possibly save a bit of power by not requesting gamma
+conversion when the ramp happens to be 1:1, but at least if all the
+CRTCs are off the SRAM will be disabled.
+
+This should fix brightness sliders in a lot of fullscreen games.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit e582b6c7e7f9d0b1e30e8017e4082d3a9ede3310)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 58 ++++++++++++++++++++++++++++++++++++++++++
+ drivers/gpu/drm/vc4/vc4_regs.h | 6 +++++
+ 2 files changed, 64 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -49,6 +49,10 @@ struct vc4_crtc {
+ /* Which HVS channel we're using for our CRTC. */
+ int channel;
+
++ u8 lut_r[256];
++ u8 lut_g[256];
++ u8 lut_b[256];
++
+ struct drm_pending_vblank_event *event;
+ };
+
+@@ -147,6 +151,46 @@ static void vc4_crtc_destroy(struct drm_
+ drm_crtc_cleanup(crtc);
+ }
+
++static void
++vc4_crtc_lut_load(struct drm_crtc *crtc)
++{
++ struct drm_device *dev = crtc->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++ u32 i;
++
++ /* The LUT memory is laid out with each HVS channel in order,
++ * each of which takes 256 writes for R, 256 for G, then 256
++ * for B.
++ */
++ HVS_WRITE(SCALER_GAMADDR,
++ SCALER_GAMADDR_AUTOINC |
++ (vc4_crtc->channel * 3 * crtc->gamma_size));
++
++ for (i = 0; i < crtc->gamma_size; i++)
++ HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_r[i]);
++ for (i = 0; i < crtc->gamma_size; i++)
++ HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_g[i]);
++ for (i = 0; i < crtc->gamma_size; i++)
++ HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_b[i]);
++}
++
++static void
++vc4_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
++ uint32_t start, uint32_t size)
++{
++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++ u32 i;
++
++ for (i = start; i < start + size; i++) {
++ vc4_crtc->lut_r[i] = r[i] >> 8;
++ vc4_crtc->lut_g[i] = g[i] >> 8;
++ vc4_crtc->lut_b[i] = b[i] >> 8;
++ }
++
++ vc4_crtc_lut_load(crtc);
++}
++
+ static u32 vc4_get_fifo_full_level(u32 format)
+ {
+ static const u32 fifo_len_bytes = 64;
+@@ -260,8 +304,14 @@ static void vc4_crtc_mode_set_nofb(struc
+
+ HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
+ SCALER_DISPBKGND_AUTOHS |
++ SCALER_DISPBKGND_GAMMA |
+ (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
+
++ /* Reload the LUT, since the SRAMs would have been disabled if
++ * all CRTCs had SCALER_DISPBKGND_GAMMA unset at once.
++ */
++ vc4_crtc_lut_load(crtc);
++
+ if (debug_dump_regs) {
+ DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc));
+ vc4_crtc_dump_regs(vc4_crtc);
+@@ -613,6 +663,7 @@ static const struct drm_crtc_funcs vc4_c
+ .reset = drm_atomic_helper_crtc_reset,
+ .atomic_duplicate_state = vc4_crtc_duplicate_state,
+ .atomic_destroy_state = vc4_crtc_destroy_state,
++ .gamma_set = vc4_crtc_gamma_set,
+ };
+
+ static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
+@@ -731,6 +782,7 @@ static int vc4_crtc_bind(struct device *
+ primary_plane->crtc = crtc;
+ vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc;
+ vc4_crtc->channel = vc4_crtc->data->hvs_channel;
++ drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
+
+ /* Set up some arbitrary number of planes. We're not limited
+ * by a set number of physical registers, just the space in
+@@ -771,6 +823,12 @@ static int vc4_crtc_bind(struct device *
+
+ vc4_set_crtc_possible_masks(drm, crtc);
+
++ for (i = 0; i < crtc->gamma_size; i++) {
++ vc4_crtc->lut_r[i] = i;
++ vc4_crtc->lut_g[i] = i;
++ vc4_crtc->lut_b[i] = i;
++ }
++
+ platform_set_drvdata(pdev, vc4_crtc);
+
+ return 0;
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -390,6 +390,12 @@
+ #define SCALER_DISPBASE2 0x0000006c
+ #define SCALER_DISPALPHA2 0x00000070
+ #define SCALER_GAMADDR 0x00000078
++# define SCALER_GAMADDR_AUTOINC BIT(31)
++/* Enables all gamma ramp SRAMs, not just those of CRTCs with gamma
++ * enabled.
++ */
++# define SCALER_GAMADDR_SRAMENB BIT(30)
++
+ #define SCALER_GAMDATA 0x000000e0
+ #define SCALER_DLIST_START 0x00002000
+ #define SCALER_DLIST_SIZE 0x00004000
+++ /dev/null
-From 00dc0773c1af03a24f76c53223ab0c3d1fc7debb Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 4 Apr 2016 14:25:59 -0700
-Subject: [PATCH 336/381] drm/vc4: Fix NULL deref in HDMI init error path
-
-If you make it here other than through err_destroy_encoder, vc4->hdmi
-is still NULL.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 5883980313af70aec0ceebaef6ef0709726e5e63)
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -573,7 +573,7 @@ err_unprepare_hsm:
- err_unprepare_pix:
- clk_disable_unprepare(hdmi->pixel_clock);
- err_put_i2c:
-- put_device(&vc4->hdmi->ddc->dev);
-+ put_device(&hdmi->ddc->dev);
-
- return ret;
- }
--- /dev/null
+From 889865acbf4ea68d241448cf413d8667b8abf312 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 14 Apr 2016 23:16:05 -0700
+Subject: [PATCH 337/423] drm/vc4: Add missing render node support
+
+There shouldn't be any other driver support necessary, since none of
+the driver-specific ioctls ever required auth, and none of them deal
+with modesetting.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+(cherry picked from commit 0cd3e27476620176c19e346f82576c6e139b85a9)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -90,6 +90,7 @@ static struct drm_driver vc4_drm_driver
+ DRIVER_ATOMIC |
+ DRIVER_GEM |
+ DRIVER_HAVE_IRQ |
++ DRIVER_RENDER |
+ DRIVER_PRIME),
+ .lastclose = vc4_lastclose,
+ .preclose = vc4_drm_preclose,
+++ /dev/null
-From b7f009c01e2e55df7286a7de67f41846dc2536a6 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Apr 2016 13:24:14 -0700
-Subject: [PATCH 337/381] drm/vc4: Kick out the simplefb framebuffer before we
- set up KMS.
-
-If we don't, then simplefb stays loaded on /dev/fb0 even though
-scanout isn't happening from simplefb's memory area any more, and you
-end up with no console.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit b3a15f6d55fb584dd4d8baac5d1b6a398720620c)
----
- drivers/gpu/drm/vc4/vc4_drv.c | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -164,6 +164,24 @@ static void vc4_match_add_drivers(struct
- }
- }
-
-+static void vc4_kick_out_firmware_fb(void)
-+{
-+ struct apertures_struct *ap;
-+
-+ ap = alloc_apertures(1);
-+ if (!ap)
-+ return;
-+
-+ /* Since VC4 is a UMA device, the simplefb node may have been
-+ * located anywhere in memory.
-+ */
-+ ap->ranges[0].base = 0;
-+ ap->ranges[0].size = ~0;
-+
-+ remove_conflicting_framebuffers(ap, "vc4drmfb", false);
-+ kfree(ap);
-+}
-+
- static int vc4_drm_bind(struct device *dev)
- {
- struct platform_device *pdev = to_platform_device(dev);
-@@ -208,6 +226,8 @@ static int vc4_drm_bind(struct device *d
- if (ret)
- goto gem_destroy;
-
-+ vc4_kick_out_firmware_fb();
-+
- ret = drm_dev_register(drm, 0);
- if (ret < 0)
- goto unbind_all;
--- /dev/null
+From 0445e26913d81b7e6cde6202d969e59f25d08fd2 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 24 Mar 2016 17:23:48 -0700
+Subject: [PATCH 338/423] drm/panel: simple: Add the 7" DPI panel from Adafruit
+
+This is a basic TFT panel with a 40-pin FPC connector on it. The
+specification doesn't define timings, but the Adafruit instructions
+were setting up 800x480 CVT.
+
+v2: Add .bus_format and vsync/hsync flags.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Rob Herring <robh@kernel.org>
+[treding@nvidia.com: keep entries properly sorted]
+Signed-off-by: Thierry Reding <treding@nvidia.com>
+
+(cherry picked from commit 8070fdbd024727c752f815b18e5339c681a01bbe)
+---
+ .../bindings/display/panel/ontat,yx700wv03.txt | 7 ++++
+ drivers/gpu/drm/panel/panel-simple.c | 37 ++++++++++++++++++++++
+ 2 files changed, 44 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/display/panel/ontat,yx700wv03.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/display/panel/ontat,yx700wv03.txt
+@@ -0,0 +1,7 @@
++On Tat Industrial Company 7" DPI TFT panel.
++
++Required properties:
++- compatible: should be "ontat,yx700wv03"
++
++This binding is compatible with the simple-panel binding, which is specified
++in simple-panel.txt in this directory.
+--- a/drivers/gpu/drm/panel/panel-simple.c
++++ b/drivers/gpu/drm/panel/panel-simple.c
+@@ -1003,6 +1003,40 @@ static const struct panel_desc okaya_rs8
+ .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+ };
+
++/*
++ * 800x480 CVT. The panel appears to be quite accepting, at least as far as
++ * pixel clocks, but this is the timing that was being used in the Adafruit
++ * installation instructions.
++ */
++static const struct drm_display_mode ontat_yx700wv03_mode = {
++ .clock = 29500,
++ .hdisplay = 800,
++ .hsync_start = 824,
++ .hsync_end = 896,
++ .htotal = 992,
++ .vdisplay = 480,
++ .vsync_start = 483,
++ .vsync_end = 493,
++ .vtotal = 500,
++ .vrefresh = 60,
++ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
++};
++
++/*
++ * Specification at:
++ * https://www.adafruit.com/images/product-files/2406/c3163.pdf
++ */
++static const struct panel_desc ontat_yx700wv03 = {
++ .modes = &ontat_yx700wv03_mode,
++ .num_modes = 1,
++ .bpc = 8,
++ .size = {
++ .width = 154,
++ .height = 83,
++ },
++ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
++};
++
+ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
+ .clock = 25000,
+ .hdisplay = 480,
+@@ -1179,6 +1213,9 @@ static const struct of_device_id platfor
+ .compatible = "okaya,rs800480t-7x0gp",
+ .data = &okaya_rs800480t_7x0gp,
+ }, {
++ .compatible = "ontat,yx700wv03",
++ .data = &ontat_yx700wv03,
++ }, {
+ .compatible = "ortustech,com43h4m85ulc",
+ .data = &ortustech_com43h4m85ulc,
+ }, {
+++ /dev/null
-From cc94958e3c07a50d65b45ea654fa498ef4d4b493 Mon Sep 17 00:00:00 2001
-From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Date: Tue, 26 Apr 2016 16:11:44 +0200
-Subject: [PATCH 338/381] drm/vc4: Rename async to nonblock.
-
-The async name is deprecated and should be changed to nonblocking.
-
-Cc: Eric Anholt <eric@anholt.net>
-Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Link: http://patchwork.freedesktop.org/patch/msgid/1461679905-30177-12-git-send-email-maarten.lankhorst@linux.intel.com
-(cherry picked from commit eb63961ba52ba545f5b7ebeeeefe1c98704e1a79)
----
- drivers/gpu/drm/vc4/vc4_kms.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_kms.c
-+++ b/drivers/gpu/drm/vc4/vc4_kms.c
-@@ -93,7 +93,7 @@ static struct vc4_commit *commit_init(st
- * vc4_atomic_commit - commit validated state object
- * @dev: DRM device
- * @state: the driver state object
-- * @async: asynchronous commit
-+ * @nonblock: nonblocking commit
- *
- * This function commits a with drm_atomic_helper_check() pre-validated state
- * object. This can still fail when e.g. the framebuffer reservation fails. For
-@@ -104,7 +104,7 @@ static struct vc4_commit *commit_init(st
- */
- static int vc4_atomic_commit(struct drm_device *dev,
- struct drm_atomic_state *state,
-- bool async)
-+ bool nonblock)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- int ret;
-@@ -170,7 +170,7 @@ static int vc4_atomic_commit(struct drm_
- * current layout.
- */
-
-- if (async) {
-+ if (nonblock) {
- vc4_queue_seqno_cb(dev, &c->cb, wait_seqno,
- vc4_atomic_complete_commit_seqno_cb);
- } else {
--- /dev/null
+From 2f2c9d21a772c179638bdcf660ca4559d189c3f4 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 6 May 2016 13:18:09 -0700
+Subject: [PATCH 339/423] BCM270X_DT: Add the disabled-by-default DPI device
+ node.
+
+This will be enabled and connected to a particular panel by DT
+overlays.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -179,6 +179,17 @@
+ status = "disabled";
+ };
+
++ dpi: dpi@7e208000 {
++ compatible = "brcm,bcm2835-dpi";
++ reg = <0x7e208000 0x8c>;
++ clocks = <&cprman BCM2835_CLOCK_VPU>,
++ <&cprman BCM2835_CLOCK_DPI>;
++ clock-names = "core", "pixel";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
+ pixelvalve1: pixelvalve@7e207000 {
+ compatible = "brcm,bcm2835-pixelvalve1";
+ reg = <0x7e207000 0x100>;
+++ /dev/null
-From 6d1609ef815189095a8e44feb38e2c128c3736a5 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 31 Mar 2016 18:38:20 -0700
-Subject: [PATCH 339/381] drm/vc4: Add support for gamma ramps.
-
-We could possibly save a bit of power by not requesting gamma
-conversion when the ramp happens to be 1:1, but at least if all the
-CRTCs are off the SRAM will be disabled.
-
-This should fix brightness sliders in a lot of fullscreen games.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit e582b6c7e7f9d0b1e30e8017e4082d3a9ede3310)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 58 ++++++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/vc4/vc4_regs.h | 6 +++++
- 2 files changed, 64 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -49,6 +49,10 @@ struct vc4_crtc {
- /* Which HVS channel we're using for our CRTC. */
- int channel;
-
-+ u8 lut_r[256];
-+ u8 lut_g[256];
-+ u8 lut_b[256];
-+
- struct drm_pending_vblank_event *event;
- };
-
-@@ -147,6 +151,46 @@ static void vc4_crtc_destroy(struct drm_
- drm_crtc_cleanup(crtc);
- }
-
-+static void
-+vc4_crtc_lut_load(struct drm_crtc *crtc)
-+{
-+ struct drm_device *dev = crtc->dev;
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
-+ u32 i;
-+
-+ /* The LUT memory is laid out with each HVS channel in order,
-+ * each of which takes 256 writes for R, 256 for G, then 256
-+ * for B.
-+ */
-+ HVS_WRITE(SCALER_GAMADDR,
-+ SCALER_GAMADDR_AUTOINC |
-+ (vc4_crtc->channel * 3 * crtc->gamma_size));
-+
-+ for (i = 0; i < crtc->gamma_size; i++)
-+ HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_r[i]);
-+ for (i = 0; i < crtc->gamma_size; i++)
-+ HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_g[i]);
-+ for (i = 0; i < crtc->gamma_size; i++)
-+ HVS_WRITE(SCALER_GAMDATA, vc4_crtc->lut_b[i]);
-+}
-+
-+static void
-+vc4_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
-+ uint32_t start, uint32_t size)
-+{
-+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
-+ u32 i;
-+
-+ for (i = start; i < start + size; i++) {
-+ vc4_crtc->lut_r[i] = r[i] >> 8;
-+ vc4_crtc->lut_g[i] = g[i] >> 8;
-+ vc4_crtc->lut_b[i] = b[i] >> 8;
-+ }
-+
-+ vc4_crtc_lut_load(crtc);
-+}
-+
- static u32 vc4_get_fifo_full_level(u32 format)
- {
- static const u32 fifo_len_bytes = 64;
-@@ -260,8 +304,14 @@ static void vc4_crtc_mode_set_nofb(struc
-
- HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
- SCALER_DISPBKGND_AUTOHS |
-+ SCALER_DISPBKGND_GAMMA |
- (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
-
-+ /* Reload the LUT, since the SRAMs would have been disabled if
-+ * all CRTCs had SCALER_DISPBKGND_GAMMA unset at once.
-+ */
-+ vc4_crtc_lut_load(crtc);
-+
- if (debug_dump_regs) {
- DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc));
- vc4_crtc_dump_regs(vc4_crtc);
-@@ -613,6 +663,7 @@ static const struct drm_crtc_funcs vc4_c
- .reset = drm_atomic_helper_crtc_reset,
- .atomic_duplicate_state = vc4_crtc_duplicate_state,
- .atomic_destroy_state = vc4_crtc_destroy_state,
-+ .gamma_set = vc4_crtc_gamma_set,
- };
-
- static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
-@@ -731,6 +782,7 @@ static int vc4_crtc_bind(struct device *
- primary_plane->crtc = crtc;
- vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc;
- vc4_crtc->channel = vc4_crtc->data->hvs_channel;
-+ drm_mode_crtc_set_gamma_size(crtc, ARRAY_SIZE(vc4_crtc->lut_r));
-
- /* Set up some arbitrary number of planes. We're not limited
- * by a set number of physical registers, just the space in
-@@ -771,6 +823,12 @@ static int vc4_crtc_bind(struct device *
-
- vc4_set_crtc_possible_masks(drm, crtc);
-
-+ for (i = 0; i < crtc->gamma_size; i++) {
-+ vc4_crtc->lut_r[i] = i;
-+ vc4_crtc->lut_g[i] = i;
-+ vc4_crtc->lut_b[i] = i;
-+ }
-+
- platform_set_drvdata(pdev, vc4_crtc);
-
- return 0;
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -390,6 +390,12 @@
- #define SCALER_DISPBASE2 0x0000006c
- #define SCALER_DISPALPHA2 0x00000070
- #define SCALER_GAMADDR 0x00000078
-+# define SCALER_GAMADDR_AUTOINC BIT(31)
-+/* Enables all gamma ramp SRAMs, not just those of CRTCs with gamma
-+ * enabled.
-+ */
-+# define SCALER_GAMADDR_SRAMENB BIT(30)
-+
- #define SCALER_GAMDATA 0x000000e0
- #define SCALER_DLIST_START 0x00002000
- #define SCALER_DLIST_SIZE 0x00004000
+++ /dev/null
-From af5a17532c46fe8035fea72ba7d9409b7c9795f9 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 14 Apr 2016 23:16:05 -0700
-Subject: [PATCH 340/381] drm/vc4: Add missing render node support
-
-There shouldn't be any other driver support necessary, since none of
-the driver-specific ioctls ever required auth, and none of them deal
-with modesetting.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0cd3e27476620176c19e346f82576c6e139b85a9)
----
- drivers/gpu/drm/vc4/vc4_drv.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -90,6 +90,7 @@ static struct drm_driver vc4_drm_driver
- DRIVER_ATOMIC |
- DRIVER_GEM |
- DRIVER_HAVE_IRQ |
-+ DRIVER_RENDER |
- DRIVER_PRIME),
- .lastclose = vc4_lastclose,
- .preclose = vc4_drm_preclose,
--- /dev/null
+From 41a242de6e06a106399d2c713dc4114da3532d22 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Fri, 6 May 2016 19:26:05 +0200
+Subject: [PATCH 340/423] drm/vc4: Fix get_vblank_counter with proper no-op for
+ Linux 4.4+
+
+get_vblank_counter hooked up to drm_vblank_count() which alway was
+non-sensical but didn't hurt in the past. Since Linux 4.4 it
+triggers a WARN_ON_ONCE in drm_update_vblank_count on first vblank
+irq disable, so fix it by hooking to drm_vblank_no_hw_counter().
+
+Tested against Raspian kernel 4.4.8 tree on RPi 2B.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Cc: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -102,7 +102,7 @@ static struct drm_driver vc4_drm_driver
+
+ .enable_vblank = vc4_enable_vblank,
+ .disable_vblank = vc4_disable_vblank,
+- .get_vblank_counter = drm_vblank_count,
++ .get_vblank_counter = drm_vblank_no_hw_counter,
+
+ #if defined(CONFIG_DEBUG_FS)
+ .debugfs_init = vc4_debugfs_init,
+++ /dev/null
-From 33b3868f0ec0b813153b977b08087fa4e4d5a5d3 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 24 Mar 2016 17:23:48 -0700
-Subject: [PATCH 341/381] drm/panel: simple: Add the 7" DPI panel from Adafruit
-
-This is a basic TFT panel with a 40-pin FPC connector on it. The
-specification doesn't define timings, but the Adafruit instructions
-were setting up 800x480 CVT.
-
-v2: Add .bus_format and vsync/hsync flags.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Rob Herring <robh@kernel.org>
-[treding@nvidia.com: keep entries properly sorted]
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-
-(cherry picked from commit 8070fdbd024727c752f815b18e5339c681a01bbe)
----
- .../bindings/display/panel/ontat,yx700wv03.txt | 7 ++++
- drivers/gpu/drm/panel/panel-simple.c | 37 ++++++++++++++++++++++
- 2 files changed, 44 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/display/panel/ontat,yx700wv03.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/display/panel/ontat,yx700wv03.txt
-@@ -0,0 +1,7 @@
-+On Tat Industrial Company 7" DPI TFT panel.
-+
-+Required properties:
-+- compatible: should be "ontat,yx700wv03"
-+
-+This binding is compatible with the simple-panel binding, which is specified
-+in simple-panel.txt in this directory.
---- a/drivers/gpu/drm/panel/panel-simple.c
-+++ b/drivers/gpu/drm/panel/panel-simple.c
-@@ -1003,6 +1003,40 @@ static const struct panel_desc okaya_rs8
- .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
- };
-
-+/*
-+ * 800x480 CVT. The panel appears to be quite accepting, at least as far as
-+ * pixel clocks, but this is the timing that was being used in the Adafruit
-+ * installation instructions.
-+ */
-+static const struct drm_display_mode ontat_yx700wv03_mode = {
-+ .clock = 29500,
-+ .hdisplay = 800,
-+ .hsync_start = 824,
-+ .hsync_end = 896,
-+ .htotal = 992,
-+ .vdisplay = 480,
-+ .vsync_start = 483,
-+ .vsync_end = 493,
-+ .vtotal = 500,
-+ .vrefresh = 60,
-+ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
-+};
-+
-+/*
-+ * Specification at:
-+ * https://www.adafruit.com/images/product-files/2406/c3163.pdf
-+ */
-+static const struct panel_desc ontat_yx700wv03 = {
-+ .modes = &ontat_yx700wv03_mode,
-+ .num_modes = 1,
-+ .bpc = 8,
-+ .size = {
-+ .width = 154,
-+ .height = 83,
-+ },
-+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-+};
-+
- static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
- .clock = 25000,
- .hdisplay = 480,
-@@ -1179,6 +1213,9 @@ static const struct of_device_id platfor
- .compatible = "okaya,rs800480t-7x0gp",
- .data = &okaya_rs800480t_7x0gp,
- }, {
-+ .compatible = "ontat,yx700wv03",
-+ .data = &ontat_yx700wv03,
-+ }, {
- .compatible = "ortustech,com43h4m85ulc",
- .data = &ortustech_com43h4m85ulc,
- }, {
--- /dev/null
+From 4f9f74feec3951986a22aff184d0fa6fb7a47b93 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Fri, 6 May 2016 19:26:06 +0200
+Subject: [PATCH 341/423] drm/vc4: Fix drm_vblank_put/get imbalance in page
+ flip path.
+
+The async page flip path was missing drm_crtc_vblank_get/put
+completely. The sync flip path was missing a vblank put, so async
+flips only reported proper pageflip completion events by chance,
+and vblank irq's never turned off after a first vsync'ed page flip
+until system reboot.
+
+Tested against Raspian kernel 4.4.8 tree on RPi 2B.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Cc: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -506,6 +506,7 @@ static void vc4_crtc_handle_page_flip(st
+ if (vc4_crtc->event) {
+ drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
+ vc4_crtc->event = NULL;
++ drm_crtc_vblank_put(crtc);
+ }
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+ }
+@@ -556,6 +557,7 @@ vc4_async_page_flip_complete(struct vc4_
+ spin_unlock_irqrestore(&dev->event_lock, flags);
+ }
+
++ drm_crtc_vblank_put(crtc);
+ drm_framebuffer_unreference(flip_state->fb);
+ kfree(flip_state);
+
+@@ -598,6 +600,8 @@ static int vc4_async_page_flip(struct dr
+ return ret;
+ }
+
++ WARN_ON(drm_crtc_vblank_get(crtc) != 0);
++
+ /* Immediately update the plane's legacy fb pointer, so that later
+ * modeset prep sees the state that will be present when the semaphore
+ * is released.
+++ /dev/null
-From 48c22040d540d47c1dd4496a9587b0f3139fc8f0 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 6 May 2016 13:18:09 -0700
-Subject: [PATCH 342/381] BCM270X_DT: Add the disabled-by-default DPI device
- node.
-
-This will be enabled and connected to a particular panel by DT
-overlays.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -179,6 +179,17 @@
- status = "disabled";
- };
-
-+ dpi: dpi@7e208000 {
-+ compatible = "brcm,bcm2835-dpi";
-+ reg = <0x7e208000 0x8c>;
-+ clocks = <&cprman BCM2835_CLOCK_VPU>,
-+ <&cprman BCM2835_CLOCK_DPI>;
-+ clock-names = "core", "pixel";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "disabled";
-+ };
-+
- pixelvalve1: pixelvalve@7e207000 {
- compatible = "brcm,bcm2835-pixelvalve1";
- reg = <0x7e207000 0x100>;
--- /dev/null
+From 347b13e71792301011d09442c6150d6aec8d89e0 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 11 May 2016 15:38:04 +0100
+Subject: [PATCH 342/423] BCM270X_DT: Add umbrella I2C Mux overlay i2c-mux
+
+This overlay supports a range of I2C multiplexers - PCA9542 (2 ports),
+PCA9545 (4 ports) and PCA9548 (8 ports).
+
+Also remove the dedicated i2c-mux-9548a overlays since it is no longer
+needed.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 2 +-
+ arch/arm/boot/dts/overlays/README | 17 ++-
+ arch/arm/boot/dts/overlays/i2c-mux-overlay.dts | 138 +++++++++++++++++++++
+ .../boot/dts/overlays/i2c-mux-pca9548a-overlay.dts | 67 ----------
+ 4 files changed, 152 insertions(+), 72 deletions(-)
+ create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
+ delete mode 100644 arch/arm/boot/dts/overlays/i2c-mux-pca9548a-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -34,7 +34,7 @@ dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += i2c-mux-pca9548a.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += i2c-mux.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -421,10 +421,19 @@ Params: i2c_gpio_sda GPIO use
+ (default "2" = ~100kHz)
+
+
+-Name: i2c-mux-pca9548a
+-Info: Adds support for an NXP PCA9548A I2C multiplexer on i2c_arm
+-Load: dtoverlay=i2c-mux-pca9548a,<param>=<val>
+-Params: addr I2C address of PCA9548A (default 0x70)
++Name: i2c-mux
++Info: Adds support for a number of I2C bus multiplexers on i2c_arm
++Load: dtoverlay=i2c-mux,<param>=<val>
++Params: pca9542 Select the NXP PCA9542 device
++
++ pca9545 Select the NXP PCA9545 device
++
++ pca9548 Select the NXP PCA9548 device
++
++ addr Change I2C address of the device (default 0x70)
++
++
++[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
+
+
+ Name: i2c-pwm-pca9685a
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
+@@ -0,0 +1,138 @@
++// Umbrella I2C Mux overlay
++
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca9542: mux@70 {
++ compatible = "nxp,pca9542";
++ reg = <0x70>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ };
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ };
++ };
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca9545: mux@70 {
++ compatible = "nxp,pca9545";
++ reg = <0x70>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ };
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ };
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ };
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ };
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2c_arm>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pca9548: mux@70 {
++ compatible = "nxp,pca9548";
++ reg = <0x70>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ i2c@0 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0>;
++ };
++ i2c@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <1>;
++ };
++ i2c@2 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <2>;
++ };
++ i2c@3 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <3>;
++ };
++ i2c@4 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <4>;
++ };
++ i2c@5 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <5>;
++ };
++ i2c@6 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <6>;
++ };
++ i2c@7 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <7>;
++ };
++ };
++ };
++ };
++
++ __overrides__ {
++ pca9542 = <0>, "+0";
++ pca9545 = <0>, "+1";
++ pca9548 = <0>, "+2";
++
++ addr = <&pca9545>,"reg:0",
++ <&pca9548>,"reg:0";
++ };
++};
+--- a/arch/arm/boot/dts/overlays/i2c-mux-pca9548a-overlay.dts
++++ /dev/null
+@@ -1,67 +0,0 @@
+-// Definitions for NXP PCA9548A I2C mux on ARM I2C bus.
+-/dts-v1/;
+-/plugin/;
+-
+-/{
+- compatible = "brcm,bcm2708";
+-
+- fragment@0 {
+- target = <&i2c_arm>;
+- __overlay__ {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "okay";
+-
+- i2cmux: mux@70 {
+- compatible = "nxp,pca9548";
+- reg = <0x70>;
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- i2c@0 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <0>;
+- };
+- i2c@1 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <1>;
+- };
+- i2c@2 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <2>;
+- };
+- i2c@3 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <3>;
+- };
+- i2c@4 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <4>;
+- };
+- i2c@5 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <5>;
+- };
+- i2c@6 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <6>;
+- };
+- i2c@7 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg = <7>;
+- };
+- };
+- };
+- };
+- __overrides__ {
+- addr = <&i2cmux>,"reg:0";
+- };
+-};
--- /dev/null
+From d800efe9cfbd2da1f1ee88196a34447ff7fa7461 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 12 May 2016 08:52:06 +0100
+Subject: [PATCH 343/423] BCM270X_DT: Include address override for pca9542
+
+Omitted from "BCM270X_DT: Add umbrella I2C Mux overlay i2c-mux".
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/i2c-mux-overlay.dts | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
+@@ -132,7 +132,8 @@
+ pca9545 = <0>, "+1";
+ pca9548 = <0>, "+2";
+
+- addr = <&pca9545>,"reg:0",
++ addr = <&pca9542>,"reg:0",
++ <&pca9545>,"reg:0",
+ <&pca9548>,"reg:0";
+ };
+ };
+++ /dev/null
-From cc64a36830bcae96e5df48d69f69057a8df539f2 Mon Sep 17 00:00:00 2001
-From: Mario Kleiner <mario.kleiner.de@gmail.com>
-Date: Fri, 6 May 2016 19:26:05 +0200
-Subject: [PATCH 343/381] drm/vc4: Fix get_vblank_counter with proper no-op for
- Linux 4.4+
-
-get_vblank_counter hooked up to drm_vblank_count() which alway was
-non-sensical but didn't hurt in the past. Since Linux 4.4 it
-triggers a WARN_ON_ONCE in drm_update_vblank_count on first vblank
-irq disable, so fix it by hooking to drm_vblank_no_hw_counter().
-
-Tested against Raspian kernel 4.4.8 tree on RPi 2B.
-
-Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
-Cc: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_drv.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -102,7 +102,7 @@ static struct drm_driver vc4_drm_driver
-
- .enable_vblank = vc4_enable_vblank,
- .disable_vblank = vc4_disable_vblank,
-- .get_vblank_counter = drm_vblank_count,
-+ .get_vblank_counter = drm_vblank_no_hw_counter,
-
- #if defined(CONFIG_DEBUG_FS)
- .debugfs_init = vc4_debugfs_init,
--- /dev/null
+From 9812988c5073448717f74b5bf9aae9da029fb530 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 12 May 2016 09:04:20 +0100
+Subject: [PATCH 344/423] BCM270X_DT: Fix the tinylcd35 overlay RTC support
+
+Now that overlay parameters are applied before the merge (a requirement
+for kernel runtime overlays) it is illegal for parameters/overrides to
+target nodes in the base DTB. Solve the problem of only enabling I2C
+when an RTC option is used by making the RTC fragments conditional,
+and including the required status="okay" within the fragments.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/tinylcd35-overlay.dts | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
++++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
+@@ -132,28 +132,32 @@
+
+ fragment@5 {
+ target = <&i2c1>;
+- __overlay__ {
++ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
++ status = "okay";
++
+ pcf8563: pcf8563@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+- status = "disabled";
++ status = "okay";
+ };
+ };
+ };
+
+ fragment@6 {
+ target = <&i2c1>;
+- __overlay__ {
++ __dormant__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
++ status = "okay";
++
+ ds1307: ds1307@68 {
+ compatible = "maxim,ds1307";
+ reg = <0x68>;
+- status = "disabled";
++ status = "okay";
+ };
+ };
+ };
+@@ -213,10 +217,8 @@
+ <&tinylcd35_ts>,"interrupts:0",
+ <&tinylcd35_ts>,"pendown-gpio:4";
+ xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
+- rtc-pcf = <&i2c1>,"status",
+- <&pcf8563>,"status";
+- rtc-ds = <&i2c1>,"status",
+- <&ds1307>,"status";
++ rtc-pcf = <0>,"=5";
++ rtc-ds = <0>,"=6";
+ keypad = <&keypad>,"status";
+ };
+ };
+++ /dev/null
-From c4f773a1aa2d372d152138952cf7058ce93f8952 Mon Sep 17 00:00:00 2001
-From: Mario Kleiner <mario.kleiner.de@gmail.com>
-Date: Fri, 6 May 2016 19:26:06 +0200
-Subject: [PATCH 344/381] drm/vc4: Fix drm_vblank_put/get imbalance in page
- flip path.
-
-The async page flip path was missing drm_crtc_vblank_get/put
-completely. The sync flip path was missing a vblank put, so async
-flips only reported proper pageflip completion events by chance,
-and vblank irq's never turned off after a first vsync'ed page flip
-until system reboot.
-
-Tested against Raspian kernel 4.4.8 tree on RPi 2B.
-
-Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
-Cc: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -506,6 +506,7 @@ static void vc4_crtc_handle_page_flip(st
- if (vc4_crtc->event) {
- drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
- vc4_crtc->event = NULL;
-+ drm_crtc_vblank_put(crtc);
- }
- spin_unlock_irqrestore(&dev->event_lock, flags);
- }
-@@ -556,6 +557,7 @@ vc4_async_page_flip_complete(struct vc4_
- spin_unlock_irqrestore(&dev->event_lock, flags);
- }
-
-+ drm_crtc_vblank_put(crtc);
- drm_framebuffer_unreference(flip_state->fb);
- kfree(flip_state);
-
-@@ -598,6 +600,8 @@ static int vc4_async_page_flip(struct dr
- return ret;
- }
-
-+ WARN_ON(drm_crtc_vblank_get(crtc) != 0);
-+
- /* Immediately update the plane's legacy fb pointer, so that later
- * modeset prep sees the state that will be present when the semaphore
- * is released.
+++ /dev/null
-From eaa6e5f8a581aa8c71c245ecfc882819c7090a06 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 11 May 2016 15:38:04 +0100
-Subject: [PATCH 345/381] BCM270X_DT: Add umbrella I2C Mux overlay i2c-mux
-
-This overlay supports a range of I2C multiplexers - PCA9542 (2 ports),
-PCA9545 (4 ports) and PCA9548 (8 ports).
-
-Also remove the dedicated i2c-mux-9548a overlays since it is no longer
-needed.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 2 +-
- arch/arm/boot/dts/overlays/README | 17 ++-
- arch/arm/boot/dts/overlays/i2c-mux-overlay.dts | 138 +++++++++++++++++++++
- .../boot/dts/overlays/i2c-mux-pca9548a-overlay.dts | 67 ----------
- 4 files changed, 152 insertions(+), 72 deletions(-)
- create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
- delete mode 100644 arch/arm/boot/dts/overlays/i2c-mux-pca9548a-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -34,7 +34,7 @@ dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += i2c-mux-pca9548a.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += i2c-mux.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -421,10 +421,19 @@ Params: i2c_gpio_sda GPIO use
- (default "2" = ~100kHz)
-
-
--Name: i2c-mux-pca9548a
--Info: Adds support for an NXP PCA9548A I2C multiplexer on i2c_arm
--Load: dtoverlay=i2c-mux-pca9548a,<param>=<val>
--Params: addr I2C address of PCA9548A (default 0x70)
-+Name: i2c-mux
-+Info: Adds support for a number of I2C bus multiplexers on i2c_arm
-+Load: dtoverlay=i2c-mux,<param>=<val>
-+Params: pca9542 Select the NXP PCA9542 device
-+
-+ pca9545 Select the NXP PCA9545 device
-+
-+ pca9548 Select the NXP PCA9548 device
-+
-+ addr Change I2C address of the device (default 0x70)
-+
-+
-+[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
-
-
- Name: i2c-pwm-pca9685a
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
-@@ -0,0 +1,138 @@
-+// Umbrella I2C Mux overlay
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/{
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2c_arm>;
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ pca9542: mux@70 {
-+ compatible = "nxp,pca9542";
-+ reg = <0x70>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ };
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ };
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c_arm>;
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ pca9545: mux@70 {
-+ compatible = "nxp,pca9545";
-+ reg = <0x70>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ };
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ };
-+ i2c@2 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <2>;
-+ };
-+ i2c@3 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <3>;
-+ };
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2c_arm>;
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ pca9548: mux@70 {
-+ compatible = "nxp,pca9548";
-+ reg = <0x70>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ i2c@0 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0>;
-+ };
-+ i2c@1 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <1>;
-+ };
-+ i2c@2 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <2>;
-+ };
-+ i2c@3 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <3>;
-+ };
-+ i2c@4 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <4>;
-+ };
-+ i2c@5 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <5>;
-+ };
-+ i2c@6 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <6>;
-+ };
-+ i2c@7 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <7>;
-+ };
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ pca9542 = <0>, "+0";
-+ pca9545 = <0>, "+1";
-+ pca9548 = <0>, "+2";
-+
-+ addr = <&pca9545>,"reg:0",
-+ <&pca9548>,"reg:0";
-+ };
-+};
---- a/arch/arm/boot/dts/overlays/i2c-mux-pca9548a-overlay.dts
-+++ /dev/null
-@@ -1,67 +0,0 @@
--// Definitions for NXP PCA9548A I2C mux on ARM I2C bus.
--/dts-v1/;
--/plugin/;
--
--/{
-- compatible = "brcm,bcm2708";
--
-- fragment@0 {
-- target = <&i2c_arm>;
-- __overlay__ {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- status = "okay";
--
-- i2cmux: mux@70 {
-- compatible = "nxp,pca9548";
-- reg = <0x70>;
-- #address-cells = <1>;
-- #size-cells = <0>;
--
-- i2c@0 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <0>;
-- };
-- i2c@1 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <1>;
-- };
-- i2c@2 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <2>;
-- };
-- i2c@3 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <3>;
-- };
-- i2c@4 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <4>;
-- };
-- i2c@5 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <5>;
-- };
-- i2c@6 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <6>;
-- };
-- i2c@7 {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- reg = <7>;
-- };
-- };
-- };
-- };
-- __overrides__ {
-- addr = <&i2cmux>,"reg:0";
-- };
--};
--- /dev/null
+From 3832bdcd51bcc95305c6ee0b381ae664d0516ce5 Mon Sep 17 00:00:00 2001
+From: Lee Jones <lee.jones@linaro.org>
+Date: Thu, 11 Feb 2016 13:19:09 -0800
+Subject: [PATCH 345/423] clk: Allow clocks to be marked as CRITICAL
+
+Critical clocks are those which must not be gated, else undefined
+or catastrophic failure would occur. Here we have chosen to
+ensure the prepare/enable counts are correctly incremented, so as
+not to confuse users with enabled clocks with no visible users.
+
+Signed-off-by: Lee Jones <lee.jones@linaro.org>
+Signed-off-by: Michael Turquette <mturquette@baylibre.com>
+Link: lkml.kernel.org/r/1455225554-13267-2-git-send-email-mturquette@baylibre.com
+(cherry picked from commit 32b9b10961860860268961d9aad0c56a73018c37)
+---
+ drivers/clk/clk.c | 5 +++++
+ include/linux/clk-provider.h | 1 +
+ 2 files changed, 6 insertions(+)
+
+--- a/drivers/clk/clk.c
++++ b/drivers/clk/clk.c
+@@ -2466,6 +2466,11 @@ static int __clk_init(struct device *dev
+ if (core->ops->init)
+ core->ops->init(core->hw);
+
++ if (core->flags & CLK_IS_CRITICAL) {
++ clk_core_prepare(core);
++ clk_core_enable(core);
++ }
++
+ kref_init(&core->ref);
+ out:
+ clk_prepare_unlock();
+--- a/include/linux/clk-provider.h
++++ b/include/linux/clk-provider.h
+@@ -31,6 +31,7 @@
+ #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
+ #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
+ #define CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after notifications */
++#define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */
+
+ struct clk;
+ struct clk_hw;
+++ /dev/null
-From 8753ff77e0c42682d80135d8c3519b7a5772bd9e Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 12 May 2016 08:52:06 +0100
-Subject: [PATCH 346/381] BCM270X_DT: Include address override for pca9542
-
-Omitted from "BCM270X_DT: Add umbrella I2C Mux overlay i2c-mux".
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/i2c-mux-overlay.dts | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
-@@ -132,7 +132,8 @@
- pca9545 = <0>, "+1";
- pca9548 = <0>, "+2";
-
-- addr = <&pca9545>,"reg:0",
-+ addr = <&pca9542>,"reg:0",
-+ <&pca9545>,"reg:0",
- <&pca9548>,"reg:0";
- };
- };
--- /dev/null
+From 644a5704bc14bbdea57fabeed0a5f2eb4e8f7251 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 26 Apr 2016 11:44:59 -0700
+Subject: [PATCH 346/423] clk: bcm2835: Mark the VPU clock as critical
+
+The VPU clock is also the clock for our AXI bus, so we really can't
+disable it. This might have happened during boot if, for example,
+uart1 (aux_uart clock) probed and was then disabled before the other
+consumers of the VPU clock had probed.
+
+v2: Rewrite to use a .flags in bcm2835_clock_data, since other clocks
+ will need this too.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/clk/bcm/clk-bcm2835.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -446,6 +446,8 @@ struct bcm2835_clock_data {
+ /* Number of fractional bits in the divider */
+ u32 frac_bits;
+
++ u32 flags;
++
+ bool is_vpu_clock;
+ bool is_mash_clock;
+ };
+@@ -1242,7 +1244,7 @@ static struct clk *bcm2835_register_cloc
+ init.parent_names = parents;
+ init.num_parents = data->num_mux_parents;
+ init.name = data->name;
+- init.flags = CLK_IGNORE_UNUSED;
++ init.flags = data->flags | CLK_IGNORE_UNUSED;
+
+ if (data->is_vpu_clock) {
+ init.ops = &bcm2835_vpu_clock_clk_ops;
+@@ -1661,6 +1663,7 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_VPUDIV,
+ .int_bits = 12,
+ .frac_bits = 8,
++ .flags = CLK_IS_CRITICAL,
+ .is_vpu_clock = true),
+
+ /* clocks with per parent mux */
+++ /dev/null
-From 3f11e310d0e877d26958afe83975a5157e500ebe Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 12 May 2016 09:04:20 +0100
-Subject: [PATCH 347/381] BCM270X_DT: Fix the tinylcd35 overlay RTC support
-
-Now that overlay parameters are applied before the merge (a requirement
-for kernel runtime overlays) it is illegal for parameters/overrides to
-target nodes in the base DTB. Solve the problem of only enabling I2C
-when an RTC option is used by making the RTC fragments conditional,
-and including the required status="okay" within the fragments.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/tinylcd35-overlay.dts | 18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
-@@ -132,28 +132,32 @@
-
- fragment@5 {
- target = <&i2c1>;
-- __overlay__ {
-+ __dormant__ {
- #address-cells = <1>;
- #size-cells = <0>;
-
-+ status = "okay";
-+
- pcf8563: pcf8563@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
-- status = "disabled";
-+ status = "okay";
- };
- };
- };
-
- fragment@6 {
- target = <&i2c1>;
-- __overlay__ {
-+ __dormant__ {
- #address-cells = <1>;
- #size-cells = <0>;
-
-+ status = "okay";
-+
- ds1307: ds1307@68 {
- compatible = "maxim,ds1307";
- reg = <0x68>;
-- status = "disabled";
-+ status = "okay";
- };
- };
- };
-@@ -213,10 +217,8 @@
- <&tinylcd35_ts>,"interrupts:0",
- <&tinylcd35_ts>,"pendown-gpio:4";
- xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
-- rtc-pcf = <&i2c1>,"status",
-- <&pcf8563>,"status";
-- rtc-ds = <&i2c1>,"status",
-- <&ds1307>,"status";
-+ rtc-pcf = <0>,"=5";
-+ rtc-ds = <0>,"=6";
- keypad = <&keypad>,"status";
- };
- };
--- /dev/null
+From 9a5319c6915364018e9422b6cef7e63a011b8b57 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 9 May 2016 17:28:18 -0700
+Subject: [PATCH 347/423] clk: bcm2835: Mark GPIO clocks enabled at boot as
+ critical.
+
+These divide off of PLLD_PER and are used for the ethernet and wifi
+PHYs source PLLs. Neither of them is currently represented by a phy
+device that would grab the clock for us.
+
+This keeps other drivers from killing the networking PHYs when they
+disable their own clocks and trigger PLLD_PER's refcount going to 0.
+
+v2: Skip marking as critical if they aren't on at boot.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/clk/bcm/clk-bcm2835.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1246,6 +1246,15 @@ static struct clk *bcm2835_register_cloc
+ init.name = data->name;
+ init.flags = data->flags | CLK_IGNORE_UNUSED;
+
++ /*
++ * Some GPIO clocks for ethernet/wifi PLLs are marked as
++ * critical (since some platforms use them), but if the
++ * firmware didn't have them turned on then they clearly
++ * aren't actually critical.
++ */
++ if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
++ init.flags &= ~CLK_IS_CRITICAL;
++
+ if (data->is_vpu_clock) {
+ init.ops = &bcm2835_vpu_clock_clk_ops;
+ } else {
+@@ -1720,13 +1729,15 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_GP1DIV,
+ .int_bits = 12,
+ .frac_bits = 12,
++ .flags = CLK_IS_CRITICAL,
+ .is_mash_clock = true),
+ [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
+ .name = "gp2",
+ .ctl_reg = CM_GP2CTL,
+ .div_reg = CM_GP2DIV,
+ .int_bits = 12,
+- .frac_bits = 12),
++ .frac_bits = 12,
++ .flags = CLK_IS_CRITICAL),
+
+ /* HDMI state machine */
+ [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
+++ /dev/null
-From ac9a9b1fcf3b0255aebc8e7f4b809f15556d9640 Mon Sep 17 00:00:00 2001
-From: Lee Jones <lee.jones@linaro.org>
-Date: Thu, 11 Feb 2016 13:19:09 -0800
-Subject: [PATCH 348/381] clk: Allow clocks to be marked as CRITICAL
-
-Critical clocks are those which must not be gated, else undefined
-or catastrophic failure would occur. Here we have chosen to
-ensure the prepare/enable counts are correctly incremented, so as
-not to confuse users with enabled clocks with no visible users.
-
-Signed-off-by: Lee Jones <lee.jones@linaro.org>
-Signed-off-by: Michael Turquette <mturquette@baylibre.com>
-Link: lkml.kernel.org/r/1455225554-13267-2-git-send-email-mturquette@baylibre.com
-(cherry picked from commit 32b9b10961860860268961d9aad0c56a73018c37)
----
- drivers/clk/clk.c | 5 +++++
- include/linux/clk-provider.h | 1 +
- 2 files changed, 6 insertions(+)
-
---- a/drivers/clk/clk.c
-+++ b/drivers/clk/clk.c
-@@ -2466,6 +2466,11 @@ static int __clk_init(struct device *dev
- if (core->ops->init)
- core->ops->init(core->hw);
-
-+ if (core->flags & CLK_IS_CRITICAL) {
-+ clk_core_prepare(core);
-+ clk_core_enable(core);
-+ }
-+
- kref_init(&core->ref);
- out:
- clk_prepare_unlock();
---- a/include/linux/clk-provider.h
-+++ b/include/linux/clk-provider.h
-@@ -31,6 +31,7 @@
- #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
- #define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
- #define CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after notifications */
-+#define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */
-
- struct clk;
- struct clk_hw;
--- /dev/null
+From 58d35c928d3fad63627f4bd84126746a08e6ff6c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 26 Apr 2016 12:39:45 -0700
+Subject: [PATCH 348/423] clk: bcm2835: Skip PLLC clocks when deciding on a new
+ clock parent
+
+If the firmware had set up a clock to source from PLLC, go along with
+it. But if we're looking for a new parent, we don't want to switch it
+to PLLC because the firmware will force PLLC (and thus the AXI bus
+clock) to different frequencies during over-temp/under-voltage,
+without notification to Linux.
+
+On my system, this moves the Linux-enabled HDMI state machine and DSI1
+escape clock over to plld_per from pllc_per. EMMC still ends up on
+pllc_per, because the firmware had set it up to use that.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
+---
+ drivers/clk/bcm/clk-bcm2835.c | 23 +++++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1020,16 +1020,28 @@ static int bcm2835_clock_set_rate(struct
+ return 0;
+ }
+
++static bool
++bcm2835_clk_is_pllc(struct clk_hw *hw)
++{
++ if (!hw)
++ return false;
++
++ return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0;
++}
++
+ static int bcm2835_clock_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *req)
+ {
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct clk_hw *parent, *best_parent = NULL;
++ bool current_parent_is_pllc;
+ unsigned long rate, best_rate = 0;
+ unsigned long prate, best_prate = 0;
+ size_t i;
+ u32 div;
+
++ current_parent_is_pllc = bcm2835_clk_is_pllc(clk_hw_get_parent(hw));
++
+ /*
+ * Select parent clock that results in the closest but lower rate
+ */
+@@ -1037,6 +1049,17 @@ static int bcm2835_clock_determine_rate(
+ parent = clk_hw_get_parent_by_index(hw, i);
+ if (!parent)
+ continue;
++
++ /*
++ * Don't choose a PLLC-derived clock as our parent
++ * unless it had been manually set that way. PLLC's
++ * frequency gets adjusted by the firmware due to
++ * over-temp or under-voltage conditions, without
++ * prior notification to our clock consumer.
++ */
++ if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc)
++ continue;
++
+ prate = clk_hw_get_rate(parent);
+ div = bcm2835_clock_choose_div(hw, req->rate, prate, true);
+ rate = bcm2835_clock_rate_from_divisor(clock, prate, div);
+++ /dev/null
-From 0488240a92abe6fc9fa6f3a3058849b17af2d3e5 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 26 Apr 2016 11:44:59 -0700
-Subject: [PATCH 349/381] clk: bcm2835: Mark the VPU clock as critical
-
-The VPU clock is also the clock for our AXI bus, so we really can't
-disable it. This might have happened during boot if, for example,
-uart1 (aux_uart clock) probed and was then disabled before the other
-consumers of the VPU clock had probed.
-
-v2: Rewrite to use a .flags in bcm2835_clock_data, since other clocks
- will need this too.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -446,6 +446,8 @@ struct bcm2835_clock_data {
- /* Number of fractional bits in the divider */
- u32 frac_bits;
-
-+ u32 flags;
-+
- bool is_vpu_clock;
- bool is_mash_clock;
- };
-@@ -1246,7 +1248,7 @@ static struct clk *bcm2835_register_cloc
- init.parent_names = parents;
- init.num_parents = data->num_mux_parents;
- init.name = data->name;
-- init.flags = CLK_IGNORE_UNUSED;
-+ init.flags = data->flags | CLK_IGNORE_UNUSED;
-
- if (data->is_vpu_clock) {
- init.ops = &bcm2835_vpu_clock_clk_ops;
-@@ -1665,6 +1667,7 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_VPUDIV,
- .int_bits = 12,
- .frac_bits = 8,
-+ .flags = CLK_IS_CRITICAL,
- .is_vpu_clock = true),
-
- /* clocks with per parent mux */
--- /dev/null
+From efba060602bfb54eb1106972360df001bb88ae3b Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 11 May 2016 12:50:33 +0100
+Subject: [PATCH 349/423] mmc: Add MMC_QUIRK_ERASE_BROKEN for some cards
+
+Some SD cards have been found that corrupt data when small blocks
+are erased. Add a quirk to indicate that ERASE should not be used,
+and set it for cards of that type.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/card/block.c | 7 +++++++
+ drivers/mmc/core/core.c | 3 ++-
+ include/linux/mmc/card.h | 3 +++
+ 3 files changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -2552,6 +2552,13 @@ static const struct mmc_fixup blk_fixups
+ MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc,
+ MMC_QUIRK_TRIM_BROKEN),
+
++ /*
++ * On some Kingston SD cards, multiple erases of less than 64
++ * sectors can cause corruption.
++ */
++ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
++ MMC_QUIRK_ERASE_BROKEN),
++
+ END_FIXUP
+ };
+
+--- a/drivers/mmc/core/core.c
++++ b/drivers/mmc/core/core.c
+@@ -2253,7 +2253,8 @@ EXPORT_SYMBOL(mmc_erase);
+ int mmc_can_erase(struct mmc_card *card)
+ {
+ if ((card->host->caps & MMC_CAP_ERASE) &&
+- (card->csd.cmdclass & CCC_ERASE) && card->erase_size)
++ (card->csd.cmdclass & CCC_ERASE) && card->erase_size &&
++ !(card->quirks & MMC_QUIRK_ERASE_BROKEN))
+ return 1;
+ return 0;
+ }
+--- a/include/linux/mmc/card.h
++++ b/include/linux/mmc/card.h
+@@ -281,6 +281,9 @@ struct mmc_card {
+ #define MMC_QUIRK_TRIM_BROKEN (1<<12) /* Skip trim */
+
+
++#define MMC_QUIRK_ERASE_BROKEN (1<<31) /* Skip erase */
++
++
+ unsigned int erase_size; /* erase size in sectors */
+ unsigned int erase_shift; /* if erase unit is power 2 */
+ unsigned int pref_erase; /* in sectors */
--- /dev/null
+From ea3e9f892437a7afc78ac04e899fa35c155f198e Mon Sep 17 00:00:00 2001
+From: Matt Flax <flatmax@flatmax.org>
+Date: Mon, 16 May 2016 21:36:31 +1000
+Subject: [PATCH 350/423] New AudioInjector.net Pi soundcard with low jitter
+ audio in and out.
+
+Contains the sound/soc/bcm ALSA machine driver and necessary alterations to the Kconfig and Makefile.
+Adds the dts overlay and updates the Makefile and README.
+Updates the relevant defconfig files to enable building for the Raspberry Pi.
+Thanks to Phil Elwell (pelwell) for the review, simple-card concepts and discussion. Thanks to Clive Messer for overlay naming suggestions.
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +
+ .../audioinjector-wm8731-audio-overlay.dts | 39 ++++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 +
+ sound/soc/bcm/Makefile | 3 +
+ sound/soc/bcm/audioinjector-pi-soundcard.c | 142 +++++++++++++++++++++
+ 8 files changed, 200 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
+ create mode 100644 sound/soc/bcm/audioinjector-pi-soundcard.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -16,6 +16,7 @@ dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.
+ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += boomberry-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += boomberry-digi.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -225,6 +225,12 @@ Params: interrupt GPIO use
+ arrays (0=+0pF, 15=+4.5pF, default 15)
+
+
++Name: audioinjector-wm8731-audio
++Info: Configures the audioinjector.net audio add on soundcard
++Load: dtoverlay=audioinjector-wm8731-audio
++Params: <None>
++
++
+ Name: bmp085_i2c-sensor
+ Info: Configures the BMP085/BMP180 digital barometric pressure and temperature
+ sensors from Bosch Sensortec
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for audioinjector.net audio add on soundcard
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8731@1a {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8731";
++ reg = <0x1a>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "ai,audioinjector-pi-soundcard";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -863,6 +863,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -855,6 +855,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -85,3 +85,10 @@ config SND_BCM2708_SOC_ADAU1977_ADC
+ select SND_SOC_ADAU1977_I2C
+ help
+ Say Y or M if you want to add support for ADAU1977 ADC.
++
++config SND_AUDIOINJECTOR_PI_SOUNDCARD
++ tristate "Support for audioinjector.net Pi add on soundcard"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_WM8731
++ help
++ Say Y or M if you want to add support for audioinjector.net Pi Hat
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -15,6 +15,7 @@ snd-soc-rpi-dac-objs := rpi-dac.o
+ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
+ snd-soc-raspidac3-objs := raspidac3.o
++snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -27,3 +28,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) +=
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
++obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
++
+--- /dev/null
++++ b/sound/soc/bcm/audioinjector-pi-soundcard.c
+@@ -0,0 +1,142 @@
++/*
++ * ASoC Driver for AudioInjector Pi add on soundcard
++ *
++ * Created on: 13-May-2016
++ * Author: flatmax@flatmax.org
++ * based on code by Cliff Cai <Cliff.Cai@analog.com> for the ssm2602 machine blackfin.
++ * with help from Lars-Peter Clausen for simplifying the original code to use the dai_fmt field.
++ * i2s_node code taken from the other sound/soc/bcm machine drivers.
++ *
++ * Copyright (C) 2016 Flatmax Pty. Ltd.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/types.h>
++
++#include <sound/core.h>
++#include <sound/soc.h>
++#include <sound/pcm_params.h>
++#include <sound/control.h>
++
++#include "../codecs/wm8731.h"
++
++static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_dapm_context *dapm = &rtd->card->dapm;
++
++ // not connected
++ snd_soc_dapm_nc_pin(dapm, "Mic Bias");
++ snd_soc_dapm_nc_pin(dapm, "MICIN");
++ snd_soc_dapm_nc_pin(dapm, "RHPOUT");
++ snd_soc_dapm_nc_pin(dapm, "LHPOUT");
++
++ return snd_soc_dai_set_sysclk(rtd->codec_dai, WM8731_SYSCLK_XTAL, 12000000, SND_SOC_CLOCK_IN);
++}
++
++static struct snd_soc_dai_link audioinjector_pi_soundcard_dai[] = {
++ {
++ .name = "AudioInjector audio",
++ .stream_name = "AudioInjector audio",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8731-hifi",
++ .platform_name = "bcm2835-i2s.0",
++ .codec_name = "wm8731.1-001a",
++ .init = audioinjector_pi_soundcard_dai_init,
++ .dai_fmt = SND_SOC_DAIFMT_CBM_CFM|SND_SOC_DAIFMT_I2S|SND_SOC_DAIFMT_NB_NF,
++ },
++};
++
++static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
++ SND_SOC_DAPM_SPK("Ext Spk", NULL),
++ SND_SOC_DAPM_LINE("Line In Jacks", NULL),
++};
++
++/* Corgi machine connections to the codec pins */
++static const struct snd_soc_dapm_route audioinjector_audio_map[] = {
++ /* speaker connected to LOUT, ROUT */
++ {"Ext Spk", NULL, "ROUT"},
++ {"Ext Spk", NULL, "LOUT"},
++
++ /* line inputs */
++ {"Line In Jacks", NULL, "Line Input"},
++};
++
++static struct snd_soc_card snd_soc_audioinjector = {
++ .name = "audioinjector-pi-soundcard",
++ .dai_link = audioinjector_pi_soundcard_dai,
++ .num_links = 1,
++
++ .dapm_widgets = wm8731_dapm_widgets,
++ .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
++ .dapm_routes = audioinjector_audio_map,
++ .num_dapm_routes = ARRAY_SIZE(audioinjector_audio_map),
++};
++
++static int audioinjector_pi_soundcard_probe(struct platform_device *pdev)
++{
++ struct snd_soc_card *card = &snd_soc_audioinjector;
++ int ret;
++
++ card->dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct snd_soc_dai_link *dai = &audioinjector_pi_soundcard_dai[0];
++ struct device_node *i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ } else
++ if (!dai->cpu_of_node) {
++ dev_err(&pdev->dev, "Property 'i2s-controller' missing or invalid\n");
++ return -EINVAL;
++ }
++ }
++
++ if ((ret = snd_soc_register_card(card))) {
++ dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
++ }
++ return ret;
++}
++
++static int audioinjector_pi_soundcard_remove(struct platform_device *pdev)
++{
++ struct snd_soc_card *card = platform_get_drvdata(pdev);
++ return snd_soc_unregister_card(card);
++
++}
++
++static const struct of_device_id audioinjector_pi_soundcard_of_match[] = {
++ { .compatible = "ai,audioinjector-pi-soundcard", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, audioinjector_pi_soundcard_of_match);
++
++static struct platform_driver audioinjector_pi_soundcard_driver = {
++ .driver = {
++ .name = "audioinjector-audio",
++ .owner = THIS_MODULE,
++ .of_match_table = audioinjector_pi_soundcard_of_match,
++ },
++ .probe = audioinjector_pi_soundcard_probe,
++ .remove = audioinjector_pi_soundcard_remove,
++};
++
++module_platform_driver(audioinjector_pi_soundcard_driver);
++MODULE_AUTHOR("Matt Flax <flatmax@flatmax.org>");
++MODULE_DESCRIPTION("AudioInjector.net Pi Soundcard");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:audioinjector-pi-soundcard");
++
+++ /dev/null
-From edb0177945936b14fe58662743f9e9d4eeba4b73 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 9 May 2016 17:28:18 -0700
-Subject: [PATCH 350/381] clk: bcm2835: Mark GPIO clocks enabled at boot as
- critical.
-
-These divide off of PLLD_PER and are used for the ethernet and wifi
-PHYs source PLLs. Neither of them is currently represented by a phy
-device that would grab the clock for us.
-
-This keeps other drivers from killing the networking PHYs when they
-disable their own clocks and trigger PLLD_PER's refcount going to 0.
-
-v2: Skip marking as critical if they aren't on at boot.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1250,6 +1250,15 @@ static struct clk *bcm2835_register_cloc
- init.name = data->name;
- init.flags = data->flags | CLK_IGNORE_UNUSED;
-
-+ /*
-+ * Some GPIO clocks for ethernet/wifi PLLs are marked as
-+ * critical (since some platforms use them), but if the
-+ * firmware didn't have them turned on then they clearly
-+ * aren't actually critical.
-+ */
-+ if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0)
-+ init.flags &= ~CLK_IS_CRITICAL;
-+
- if (data->is_vpu_clock) {
- init.ops = &bcm2835_vpu_clock_clk_ops;
- } else {
-@@ -1724,13 +1733,15 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_GP1DIV,
- .int_bits = 12,
- .frac_bits = 12,
-+ .flags = CLK_IS_CRITICAL,
- .is_mash_clock = true),
- [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
- .name = "gp2",
- .ctl_reg = CM_GP2CTL,
- .div_reg = CM_GP2DIV,
- .int_bits = 12,
-- .frac_bits = 12),
-+ .frac_bits = 12,
-+ .flags = CLK_IS_CRITICAL),
-
- /* HDMI state machine */
- [BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
+++ /dev/null
-From 4ef6b916c3004783aeeabfcd9889bca046d944bf Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 26 Apr 2016 12:39:45 -0700
-Subject: [PATCH 351/381] clk: bcm2835: Skip PLLC clocks when deciding on a new
- clock parent
-
-If the firmware had set up a clock to source from PLLC, go along with
-it. But if we're looking for a new parent, we don't want to switch it
-to PLLC because the firmware will force PLLC (and thus the AXI bus
-clock) to different frequencies during over-temp/under-voltage,
-without notification to Linux.
-
-On my system, this moves the Linux-enabled HDMI state machine and DSI1
-escape clock over to plld_per from pllc_per. EMMC still ends up on
-pllc_per, because the firmware had set it up to use that.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
----
- drivers/clk/bcm/clk-bcm2835.c | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1024,16 +1024,28 @@ static int bcm2835_clock_set_rate(struct
- return 0;
- }
-
-+static bool
-+bcm2835_clk_is_pllc(struct clk_hw *hw)
-+{
-+ if (!hw)
-+ return false;
-+
-+ return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0;
-+}
-+
- static int bcm2835_clock_determine_rate(struct clk_hw *hw,
- struct clk_rate_request *req)
- {
- struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- struct clk_hw *parent, *best_parent = NULL;
-+ bool current_parent_is_pllc;
- unsigned long rate, best_rate = 0;
- unsigned long prate, best_prate = 0;
- size_t i;
- u32 div;
-
-+ current_parent_is_pllc = bcm2835_clk_is_pllc(clk_hw_get_parent(hw));
-+
- /*
- * Select parent clock that results in the closest but lower rate
- */
-@@ -1041,6 +1053,17 @@ static int bcm2835_clock_determine_rate(
- parent = clk_hw_get_parent_by_index(hw, i);
- if (!parent)
- continue;
-+
-+ /*
-+ * Don't choose a PLLC-derived clock as our parent
-+ * unless it had been manually set that way. PLLC's
-+ * frequency gets adjusted by the firmware due to
-+ * over-temp or under-voltage conditions, without
-+ * prior notification to our clock consumer.
-+ */
-+ if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc)
-+ continue;
-+
- prate = clk_hw_get_rate(parent);
- div = bcm2835_clock_choose_div(hw, req->rate, prate, true);
- rate = bcm2835_clock_rate_from_divisor(clock, prate, div);
--- /dev/null
+From 4742aa31f93ae7d222d2564b2258a16fd297659e Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 19 May 2016 14:40:28 +0100
+Subject: [PATCH 351/423] mmc: Apply QUIRK_BROKEN_ERASE to other capacities
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/card/block.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -2558,6 +2558,10 @@ static const struct mmc_fixup blk_fixups
+ */
+ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
+ MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk_mmc,
++ MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk_mmc,
++ MMC_QUIRK_ERASE_BROKEN),
+
+ END_FIXUP
+ };
+++ /dev/null
-From 8479891a91161b13f8d63b7d8aa6614cb03e3442 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 11 May 2016 12:50:33 +0100
-Subject: [PATCH 352/381] mmc: Add MMC_QUIRK_ERASE_BROKEN for some cards
-
-Some SD cards have been found that corrupt data when small blocks
-are erased. Add a quirk to indicate that ERASE should not be used,
-and set it for cards of that type.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/card/block.c | 7 +++++++
- drivers/mmc/core/core.c | 3 ++-
- include/linux/mmc/card.h | 3 +++
- 3 files changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/mmc/card/block.c
-+++ b/drivers/mmc/card/block.c
-@@ -2552,6 +2552,13 @@ static const struct mmc_fixup blk_fixups
- MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc,
- MMC_QUIRK_TRIM_BROKEN),
-
-+ /*
-+ * On some Kingston SD cards, multiple erases of less than 64
-+ * sectors can cause corruption.
-+ */
-+ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
-+ MMC_QUIRK_ERASE_BROKEN),
-+
- END_FIXUP
- };
-
---- a/drivers/mmc/core/core.c
-+++ b/drivers/mmc/core/core.c
-@@ -2253,7 +2253,8 @@ EXPORT_SYMBOL(mmc_erase);
- int mmc_can_erase(struct mmc_card *card)
- {
- if ((card->host->caps & MMC_CAP_ERASE) &&
-- (card->csd.cmdclass & CCC_ERASE) && card->erase_size)
-+ (card->csd.cmdclass & CCC_ERASE) && card->erase_size &&
-+ !(card->quirks & MMC_QUIRK_ERASE_BROKEN))
- return 1;
- return 0;
- }
---- a/include/linux/mmc/card.h
-+++ b/include/linux/mmc/card.h
-@@ -281,6 +281,9 @@ struct mmc_card {
- #define MMC_QUIRK_TRIM_BROKEN (1<<12) /* Skip trim */
-
-
-+#define MMC_QUIRK_ERASE_BROKEN (1<<31) /* Skip erase */
-+
-+
- unsigned int erase_size; /* erase size in sectors */
- unsigned int erase_shift; /* if erase unit is power 2 */
- unsigned int pref_erase; /* in sectors */
+++ /dev/null
-From 5b48080842ef9333050cf1743e89f8f780cd95d4 Mon Sep 17 00:00:00 2001
-From: Matt Flax <flatmax@flatmax.org>
-Date: Mon, 16 May 2016 21:36:31 +1000
-Subject: [PATCH 353/381] New AudioInjector.net Pi soundcard with low jitter
- audio in and out.
-
-Contains the sound/soc/bcm ALSA machine driver and necessary alterations to the Kconfig and Makefile.
-Adds the dts overlay and updates the Makefile and README.
-Updates the relevant defconfig files to enable building for the Raspberry Pi.
-Thanks to Phil Elwell (pelwell) for the review, simple-card concepts and discussion. Thanks to Clive Messer for overlay naming suggestions.
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 +
- .../audioinjector-wm8731-audio-overlay.dts | 39 ++++++
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- sound/soc/bcm/Kconfig | 7 +
- sound/soc/bcm/Makefile | 3 +
- sound/soc/bcm/audioinjector-pi-soundcard.c | 142 +++++++++++++++++++++
- 8 files changed, 200 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
- create mode 100644 sound/soc/bcm/audioinjector-pi-soundcard.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -16,6 +16,7 @@ dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.
- dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += boomberry-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += boomberry-digi.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -225,6 +225,12 @@ Params: interrupt GPIO use
- arrays (0=+0pF, 15=+4.5pF, default 15)
-
-
-+Name: audioinjector-wm8731-audio
-+Info: Configures the audioinjector.net audio add on soundcard
-+Load: dtoverlay=audioinjector-wm8731-audio
-+Params: <None>
-+
-+
- Name: bmp085_i2c-sensor
- Info: Configures the BMP085/BMP180 digital barometric pressure and temperature
- sensors from Bosch Sensortec
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
-@@ -0,0 +1,39 @@
-+// Definitions for audioinjector.net audio add on soundcard
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8731@1a {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8731";
-+ reg = <0x1a>;
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "ai,audioinjector-pi-soundcard";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -863,6 +863,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
- CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
-+CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -855,6 +855,7 @@ CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
- CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
-+CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -85,3 +85,10 @@ config SND_BCM2708_SOC_ADAU1977_ADC
- select SND_SOC_ADAU1977_I2C
- help
- Say Y or M if you want to add support for ADAU1977 ADC.
-+
-+config SND_AUDIOINJECTOR_PI_SOUNDCARD
-+ tristate "Support for audioinjector.net Pi add on soundcard"
-+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
-+ select SND_SOC_WM8731
-+ help
-+ Say Y or M if you want to add support for audioinjector.net Pi Hat
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -15,6 +15,7 @@ snd-soc-rpi-dac-objs := rpi-dac.o
- snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
- snd-soc-raspidac3-objs := raspidac3.o
-+snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
-
- obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
-@@ -27,3 +28,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) +=
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
- obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
-+obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
-+
---- /dev/null
-+++ b/sound/soc/bcm/audioinjector-pi-soundcard.c
-@@ -0,0 +1,142 @@
-+/*
-+ * ASoC Driver for AudioInjector Pi add on soundcard
-+ *
-+ * Created on: 13-May-2016
-+ * Author: flatmax@flatmax.org
-+ * based on code by Cliff Cai <Cliff.Cai@analog.com> for the ssm2602 machine blackfin.
-+ * with help from Lars-Peter Clausen for simplifying the original code to use the dai_fmt field.
-+ * i2s_node code taken from the other sound/soc/bcm machine drivers.
-+ *
-+ * Copyright (C) 2016 Flatmax Pty. Ltd.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/types.h>
-+
-+#include <sound/core.h>
-+#include <sound/soc.h>
-+#include <sound/pcm_params.h>
-+#include <sound/control.h>
-+
-+#include "../codecs/wm8731.h"
-+
-+static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_dapm_context *dapm = &rtd->card->dapm;
-+
-+ // not connected
-+ snd_soc_dapm_nc_pin(dapm, "Mic Bias");
-+ snd_soc_dapm_nc_pin(dapm, "MICIN");
-+ snd_soc_dapm_nc_pin(dapm, "RHPOUT");
-+ snd_soc_dapm_nc_pin(dapm, "LHPOUT");
-+
-+ return snd_soc_dai_set_sysclk(rtd->codec_dai, WM8731_SYSCLK_XTAL, 12000000, SND_SOC_CLOCK_IN);
-+}
-+
-+static struct snd_soc_dai_link audioinjector_pi_soundcard_dai[] = {
-+ {
-+ .name = "AudioInjector audio",
-+ .stream_name = "AudioInjector audio",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "wm8731-hifi",
-+ .platform_name = "bcm2835-i2s.0",
-+ .codec_name = "wm8731.1-001a",
-+ .init = audioinjector_pi_soundcard_dai_init,
-+ .dai_fmt = SND_SOC_DAIFMT_CBM_CFM|SND_SOC_DAIFMT_I2S|SND_SOC_DAIFMT_NB_NF,
-+ },
-+};
-+
-+static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
-+ SND_SOC_DAPM_SPK("Ext Spk", NULL),
-+ SND_SOC_DAPM_LINE("Line In Jacks", NULL),
-+};
-+
-+/* Corgi machine connections to the codec pins */
-+static const struct snd_soc_dapm_route audioinjector_audio_map[] = {
-+ /* speaker connected to LOUT, ROUT */
-+ {"Ext Spk", NULL, "ROUT"},
-+ {"Ext Spk", NULL, "LOUT"},
-+
-+ /* line inputs */
-+ {"Line In Jacks", NULL, "Line Input"},
-+};
-+
-+static struct snd_soc_card snd_soc_audioinjector = {
-+ .name = "audioinjector-pi-soundcard",
-+ .dai_link = audioinjector_pi_soundcard_dai,
-+ .num_links = 1,
-+
-+ .dapm_widgets = wm8731_dapm_widgets,
-+ .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
-+ .dapm_routes = audioinjector_audio_map,
-+ .num_dapm_routes = ARRAY_SIZE(audioinjector_audio_map),
-+};
-+
-+static int audioinjector_pi_soundcard_probe(struct platform_device *pdev)
-+{
-+ struct snd_soc_card *card = &snd_soc_audioinjector;
-+ int ret;
-+
-+ card->dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct snd_soc_dai_link *dai = &audioinjector_pi_soundcard_dai[0];
-+ struct device_node *i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ } else
-+ if (!dai->cpu_of_node) {
-+ dev_err(&pdev->dev, "Property 'i2s-controller' missing or invalid\n");
-+ return -EINVAL;
-+ }
-+ }
-+
-+ if ((ret = snd_soc_register_card(card))) {
-+ dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
-+ }
-+ return ret;
-+}
-+
-+static int audioinjector_pi_soundcard_remove(struct platform_device *pdev)
-+{
-+ struct snd_soc_card *card = platform_get_drvdata(pdev);
-+ return snd_soc_unregister_card(card);
-+
-+}
-+
-+static const struct of_device_id audioinjector_pi_soundcard_of_match[] = {
-+ { .compatible = "ai,audioinjector-pi-soundcard", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, audioinjector_pi_soundcard_of_match);
-+
-+static struct platform_driver audioinjector_pi_soundcard_driver = {
-+ .driver = {
-+ .name = "audioinjector-audio",
-+ .owner = THIS_MODULE,
-+ .of_match_table = audioinjector_pi_soundcard_of_match,
-+ },
-+ .probe = audioinjector_pi_soundcard_probe,
-+ .remove = audioinjector_pi_soundcard_remove,
-+};
-+
-+module_platform_driver(audioinjector_pi_soundcard_driver);
-+MODULE_AUTHOR("Matt Flax <flatmax@flatmax.org>");
-+MODULE_DESCRIPTION("AudioInjector.net Pi Soundcard");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:audioinjector-pi-soundcard");
-+
--- /dev/null
+From 2c0da5702844c4ec246243634778bd3448100570 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 20 May 2016 10:11:43 +0100
+Subject: [PATCH 353/423] mmc: Add card_quirks module parameter, log quirks
+
+Use mmc_block.card_quirks to override the quirks for all SD or MMC
+cards. The value is a bitfield using the bit positions defined in
+include/linux/mmc/card.h. If the module parameter is placed in the
+kernel command line (or bootargs) stored on the card then, assuming the
+device only has one SD card interface, the override effectively becomes
+card-specific.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/card/block.c | 28 +++++++++++++++++++++++++---
+ 1 file changed, 25 insertions(+), 3 deletions(-)
+
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -137,6 +137,13 @@ enum {
+ module_param(perdev_minors, int, 0444);
+ MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
+
++/*
++ * Allow quirks to be overridden for the current card
++ */
++static char *card_quirks;
++module_param(card_quirks, charp, 0644);
++MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
++
+ static inline int mmc_blk_part_switch(struct mmc_card *card,
+ struct mmc_blk_data *md);
+ static int get_card_status(struct mmc_card *card, u32 *status, int retries);
+@@ -2570,6 +2577,7 @@ static int mmc_blk_probe(struct mmc_card
+ {
+ struct mmc_blk_data *md, *part_md;
+ char cap_str[10];
++ char quirk_str[24];
+
+ /*
+ * Check that the card supports the command class(es) we need.
+@@ -2577,7 +2585,16 @@ static int mmc_blk_probe(struct mmc_card
+ if (!(card->csd.cmdclass & CCC_BLOCK_READ))
+ return -ENODEV;
+
+- mmc_fixup_device(card, blk_fixups);
++ if (card_quirks) {
++ unsigned long quirks;
++ if (kstrtoul(card_quirks, 0, &quirks) == 0)
++ card->quirks = (unsigned int)quirks;
++ else
++ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
++ card_quirks);
++ }
++ else
++ mmc_fixup_device(card, blk_fixups);
+
+ md = mmc_blk_alloc(card);
+ if (IS_ERR(md))
+@@ -2585,9 +2602,14 @@ static int mmc_blk_probe(struct mmc_card
+
+ string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
+ cap_str, sizeof(cap_str));
+- pr_info("%s: %s %s %s %s\n",
++ if (card->quirks)
++ snprintf(quirk_str, sizeof(quirk_str),
++ " (quirks 0x%08x)", card->quirks);
++ else
++ quirk_str[0] = '\0';
++ pr_info("%s: %s %s %s%s%s\n",
+ md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
+- cap_str, md->read_only ? "(ro)" : "");
++ cap_str, md->read_only ? " (ro)" : "", quirk_str);
+
+ if (mmc_blk_alloc_parts(card, md))
+ goto out;
+++ /dev/null
-From 369e26e925e1075fb57c0b04dde7a77fa7cdeb86 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 19 May 2016 14:40:28 +0100
-Subject: [PATCH 354/381] mmc: Apply QUIRK_BROKEN_ERASE to other capacities
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/card/block.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/mmc/card/block.c
-+++ b/drivers/mmc/card/block.c
-@@ -2558,6 +2558,10 @@ static const struct mmc_fixup blk_fixups
- */
- MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
- MMC_QUIRK_ERASE_BROKEN),
-+ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk_mmc,
-+ MMC_QUIRK_ERASE_BROKEN),
-+ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk_mmc,
-+ MMC_QUIRK_ERASE_BROKEN),
-
- END_FIXUP
- };
--- /dev/null
+From 82be650e97522260a9694ae56dc3475f40c4240e Mon Sep 17 00:00:00 2001
+From: Nicolas Boullis <nboullis@debian.org>
+Date: Sun, 10 Apr 2016 13:23:05 +0200
+Subject: [PATCH 354/423] rtc: ds1307: ensure that any pending alarm is cleared
+ before a new alarm is enabled
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+If a previously-set alarm was disabled and then triggered, it may still
+be pending when a new alarm is configured.
+
+Then, if the alarm is enabled before the pending alarm is cleared, then
+an interrupt is immediately raised.
+
+Unfortunately, when the alarm is cleared and enabled during the same I²C
+block write, the chip (at least the DS1339 I have) considers that the
+alarm is enabled before it is cleared, and raises an interrupt.
+
+This patch ensures that the pending alarm is cleared before the alarm is
+enabled.
+
+Signed-off-by: Nicolas Boullis <nboullis@debian.org>
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+---
+ drivers/rtc/rtc-ds1307.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+--- a/drivers/rtc/rtc-ds1307.c
++++ b/drivers/rtc/rtc-ds1307.c
+@@ -540,12 +540,8 @@ static int ds1337_set_alarm(struct devic
+ buf[5] = 0;
+ buf[6] = 0;
+
+- /* optionally enable ALARM1 */
++ /* disable alarms */
+ buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
+- if (t->enabled) {
+- dev_dbg(dev, "alarm IRQ armed\n");
+- buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
+- }
+ buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
+
+ ret = ds1307->write_block_data(client,
+@@ -555,6 +551,13 @@ static int ds1337_set_alarm(struct devic
+ return ret;
+ }
+
++ /* optionally enable ALARM1 */
++ if (t->enabled) {
++ dev_dbg(dev, "alarm IRQ armed\n");
++ buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
++ i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
++ }
++
+ return 0;
+ }
+
--- /dev/null
+From e1240073ba4bb5f845edc69437d2b638678332f9 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 23 May 2016 17:06:08 +0100
+Subject: [PATCH 355/423] Revert "Revert "drm/vc4: Force HDMI to connected.""
+
+This reverts commit 7da44d06540b4a191ecc74e943f3203577fce0df.
+
+This breaks the driver on Pi3 as hotplug is implemented through a
+gpio expander owned by the GPU.
+
+We need to extend the virtual gpio driver to support this, but for
+now assume hotplug is always enabled.
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -166,6 +166,8 @@ vc4_hdmi_connector_detect(struct drm_con
+ struct drm_device *dev = connector->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
++ return connector_status_connected;
++
+ if (vc4->hdmi->hpd_gpio) {
+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
+ vc4->hdmi->hpd_active_low)
--- /dev/null
+From 7c64de28d0552c8240cf79b934b069dd9af24b14 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 23 May 2016 18:22:52 +0100
+Subject: [PATCH 356/423] config: Add NF_MATCH_RPFILTER
+
+---
+ arch/arm/configs/bcm2709_defconfig | 2 ++
+ arch/arm/configs/bcmrpi_defconfig | 2 ++
+ 2 files changed, 4 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -223,6 +223,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
+ CONFIG_IP_NF_IPTABLES=m
+ CONFIG_IP_NF_MATCH_AH=m
+ CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
+ CONFIG_IP_NF_MATCH_TTL=m
+ CONFIG_IP_NF_FILTER=m
+ CONFIG_IP_NF_TARGET_REJECT=m
+@@ -247,6 +248,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
+ CONFIG_IP6_NF_MATCH_HL=m
+ CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+ CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
+ CONFIG_IP6_NF_MATCH_RT=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_FILTER=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -216,6 +216,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
+ CONFIG_IP_NF_IPTABLES=m
+ CONFIG_IP_NF_MATCH_AH=m
+ CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
+ CONFIG_IP_NF_MATCH_TTL=m
+ CONFIG_IP_NF_FILTER=m
+ CONFIG_IP_NF_TARGET_REJECT=m
+@@ -240,6 +241,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
+ CONFIG_IP6_NF_MATCH_HL=m
+ CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+ CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
+ CONFIG_IP6_NF_MATCH_RT=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_FILTER=m
+++ /dev/null
-From 07d3cfeff2b06f834132d3593740485c673fbe7d Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 20 May 2016 10:11:43 +0100
-Subject: [PATCH 356/381] mmc: Add card_quirks module parameter, log quirks
-
-Use mmc_block.card_quirks to override the quirks for all SD or MMC
-cards. The value is a bitfield using the bit positions defined in
-include/linux/mmc/card.h. If the module parameter is placed in the
-kernel command line (or bootargs) stored on the card then, assuming the
-device only has one SD card interface, the override effectively becomes
-card-specific.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/card/block.c | 28 +++++++++++++++++++++++++---
- 1 file changed, 25 insertions(+), 3 deletions(-)
-
---- a/drivers/mmc/card/block.c
-+++ b/drivers/mmc/card/block.c
-@@ -137,6 +137,13 @@ enum {
- module_param(perdev_minors, int, 0444);
- MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
-
-+/*
-+ * Allow quirks to be overridden for the current card
-+ */
-+static char *card_quirks;
-+module_param(card_quirks, charp, 0644);
-+MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
-+
- static inline int mmc_blk_part_switch(struct mmc_card *card,
- struct mmc_blk_data *md);
- static int get_card_status(struct mmc_card *card, u32 *status, int retries);
-@@ -2570,6 +2577,7 @@ static int mmc_blk_probe(struct mmc_card
- {
- struct mmc_blk_data *md, *part_md;
- char cap_str[10];
-+ char quirk_str[24];
-
- /*
- * Check that the card supports the command class(es) we need.
-@@ -2577,7 +2585,16 @@ static int mmc_blk_probe(struct mmc_card
- if (!(card->csd.cmdclass & CCC_BLOCK_READ))
- return -ENODEV;
-
-- mmc_fixup_device(card, blk_fixups);
-+ if (card_quirks) {
-+ unsigned long quirks;
-+ if (kstrtoul(card_quirks, 0, &quirks) == 0)
-+ card->quirks = (unsigned int)quirks;
-+ else
-+ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
-+ card_quirks);
-+ }
-+ else
-+ mmc_fixup_device(card, blk_fixups);
-
- md = mmc_blk_alloc(card);
- if (IS_ERR(md))
-@@ -2585,9 +2602,14 @@ static int mmc_blk_probe(struct mmc_card
-
- string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
- cap_str, sizeof(cap_str));
-- pr_info("%s: %s %s %s %s\n",
-+ if (card->quirks)
-+ snprintf(quirk_str, sizeof(quirk_str),
-+ " (quirks 0x%08x)", card->quirks);
-+ else
-+ quirk_str[0] = '\0';
-+ pr_info("%s: %s %s %s%s%s\n",
- md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
-- cap_str, md->read_only ? "(ro)" : "");
-+ cap_str, md->read_only ? " (ro)" : "", quirk_str);
-
- if (mmc_blk_alloc_parts(card, md))
- goto out;
--- /dev/null
+From d4011a19f3e6a9c6696f0d5498df9c17a1ba2fb3 Mon Sep 17 00:00:00 2001
+From: Michael Kaplan <m.kaplan@evva.com>
+Date: Tue, 24 May 2016 10:19:08 +0200
+Subject: [PATCH 357/423] Added Overlay for Microchip MCP23017 I2C gpio
+ expander
+
+---
+ arch/arm/boot/dts/overlays/README | 9 +++++
+ arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 54 +++++++++++++++++++++++++
+ 2 files changed, 63 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -567,6 +567,15 @@ Params: gpio_out_pin GPIO for
+ (default "off")
+
+
++Name: mcp23017
++Info: Configures the MCP23017 I2C port expander
++Load: dtoverlay=mcp23017,<param>=<val>
++Params: gpiopin Gpio pin connected to the INTA output of the
++ MCP23017 (default: 4)
++
++ addr I2C address of the MCP23017 (default: 0x20)
++
++
+ Name: mcp2515-can0
+ Info: Configures the MCP2515 CAN controller on spi0.0
+ Load: dtoverlay=mcp2515-can0,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
+@@ -0,0 +1,54 @@
++// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&i2c1>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&gpio>;
++ __overlay__ {
++ mcp23017_pins: mcp23017_pins {
++ brcm,pins = <4>;
++ brcm,function = <0>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp23017: mcp@20 {
++ compatible = "microchip,mcp23017";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells=<2>;
++ interrupt-parent = <&gpio>;
++ interrupts = <4 2>;
++ interrupt-controller;
++ microchip,irq-mirror;
++
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&mcp23017_pins>,"brcm,pins:0",
++ <&mcp23017>,"interrupts:0";
++ addr = <&mcp23017>,"reg:0";
++ };
++};
++
+++ /dev/null
-From 0d311e4c6e701192c62668665ae1ba25d2219f28 Mon Sep 17 00:00:00 2001
-From: Nicolas Boullis <nboullis@debian.org>
-Date: Sun, 10 Apr 2016 13:23:05 +0200
-Subject: [PATCH 357/381] rtc: ds1307: ensure that any pending alarm is cleared
- before a new alarm is enabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If a previously-set alarm was disabled and then triggered, it may still
-be pending when a new alarm is configured.
-
-Then, if the alarm is enabled before the pending alarm is cleared, then
-an interrupt is immediately raised.
-
-Unfortunately, when the alarm is cleared and enabled during the same I²C
-block write, the chip (at least the DS1339 I have) considers that the
-alarm is enabled before it is cleared, and raises an interrupt.
-
-This patch ensures that the pending alarm is cleared before the alarm is
-enabled.
-
-Signed-off-by: Nicolas Boullis <nboullis@debian.org>
-Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
----
- drivers/rtc/rtc-ds1307.c | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
---- a/drivers/rtc/rtc-ds1307.c
-+++ b/drivers/rtc/rtc-ds1307.c
-@@ -540,12 +540,8 @@ static int ds1337_set_alarm(struct devic
- buf[5] = 0;
- buf[6] = 0;
-
-- /* optionally enable ALARM1 */
-+ /* disable alarms */
- buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
-- if (t->enabled) {
-- dev_dbg(dev, "alarm IRQ armed\n");
-- buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
-- }
- buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
-
- ret = ds1307->write_block_data(client,
-@@ -555,6 +551,13 @@ static int ds1337_set_alarm(struct devic
- return ret;
- }
-
-+ /* optionally enable ALARM1 */
-+ if (t->enabled) {
-+ dev_dbg(dev, "alarm IRQ armed\n");
-+ buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
-+ i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
-+ }
-+
- return 0;
- }
-
+++ /dev/null
-From 303764f1b3db23d37614ab2f8d7ede9b7aa3b5e3 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Mon, 23 May 2016 17:06:08 +0100
-Subject: [PATCH 358/381] Revert "Revert "drm/vc4: Force HDMI to connected.""
-
-This reverts commit 7da44d06540b4a191ecc74e943f3203577fce0df.
-
-This breaks the driver on Pi3 as hotplug is implemented through a
-gpio expander owned by the GPU.
-
-We need to extend the virtual gpio driver to support this, but for
-now assume hotplug is always enabled.
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -166,6 +166,8 @@ vc4_hdmi_connector_detect(struct drm_con
- struct drm_device *dev = connector->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-
-+ return connector_status_connected;
-+
- if (vc4->hdmi->hpd_gpio) {
- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
- vc4->hdmi->hpd_active_low)
+++ /dev/null
-From 8fe9292801e175098e94b3d7d05077a8d0101aa1 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Mon, 23 May 2016 18:22:52 +0100
-Subject: [PATCH 359/381] config: Add NF_MATCH_RPFILTER
-
----
- arch/arm/configs/bcm2709_defconfig | 2 ++
- arch/arm/configs/bcmrpi_defconfig | 2 ++
- 2 files changed, 4 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -223,6 +223,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
- CONFIG_IP_NF_IPTABLES=m
- CONFIG_IP_NF_MATCH_AH=m
- CONFIG_IP_NF_MATCH_ECN=m
-+CONFIG_IP_NF_MATCH_RPFILTER=m
- CONFIG_IP_NF_MATCH_TTL=m
- CONFIG_IP_NF_FILTER=m
- CONFIG_IP_NF_TARGET_REJECT=m
-@@ -247,6 +248,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
- CONFIG_IP6_NF_MATCH_HL=m
- CONFIG_IP6_NF_MATCH_IPV6HEADER=m
- CONFIG_IP6_NF_MATCH_MH=m
-+CONFIG_IP6_NF_MATCH_RPFILTER=m
- CONFIG_IP6_NF_MATCH_RT=m
- CONFIG_IP6_NF_TARGET_HL=m
- CONFIG_IP6_NF_FILTER=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -216,6 +216,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
- CONFIG_IP_NF_IPTABLES=m
- CONFIG_IP_NF_MATCH_AH=m
- CONFIG_IP_NF_MATCH_ECN=m
-+CONFIG_IP_NF_MATCH_RPFILTER=m
- CONFIG_IP_NF_MATCH_TTL=m
- CONFIG_IP_NF_FILTER=m
- CONFIG_IP_NF_TARGET_REJECT=m
-@@ -240,6 +241,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
- CONFIG_IP6_NF_MATCH_HL=m
- CONFIG_IP6_NF_MATCH_IPV6HEADER=m
- CONFIG_IP6_NF_MATCH_MH=m
-+CONFIG_IP6_NF_MATCH_RPFILTER=m
- CONFIG_IP6_NF_MATCH_RT=m
- CONFIG_IP6_NF_TARGET_HL=m
- CONFIG_IP6_NF_FILTER=m
+++ /dev/null
-From 55e8faa999c9bf3ae4a3fb75faf5e991167c42ba Mon Sep 17 00:00:00 2001
-From: Michael Kaplan <m.kaplan@evva.com>
-Date: Tue, 24 May 2016 10:19:08 +0200
-Subject: [PATCH 360/381] Added Overlay for Microchip MCP23017 I2C gpio
- expander
-
----
- arch/arm/boot/dts/overlays/README | 9 +++++
- arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 54 +++++++++++++++++++++++++
- 2 files changed, 63 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -567,6 +567,15 @@ Params: gpio_out_pin GPIO for
- (default "off")
-
-
-+Name: mcp23017
-+Info: Configures the MCP23017 I2C port expander
-+Load: dtoverlay=mcp23017,<param>=<val>
-+Params: gpiopin Gpio pin connected to the INTA output of the
-+ MCP23017 (default: 4)
-+
-+ addr I2C address of the MCP23017 (default: 0x20)
-+
-+
- Name: mcp2515-can0
- Info: Configures the MCP2515 CAN controller on spi0.0
- Load: dtoverlay=mcp2515-can0,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
-@@ -0,0 +1,54 @@
-+// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&gpio>;
-+ __overlay__ {
-+ mcp23017_pins: mcp23017_pins {
-+ brcm,pins = <4>;
-+ brcm,function = <0>;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ mcp23017: mcp@20 {
-+ compatible = "microchip,mcp23017";
-+ reg = <0x20>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ #interrupt-cells=<2>;
-+ interrupt-parent = <&gpio>;
-+ interrupts = <4 2>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ gpiopin = <&mcp23017_pins>,"brcm,pins:0",
-+ <&mcp23017>,"interrupts:0";
-+ addr = <&mcp23017>,"reg:0";
-+ };
-+};
-+
+++ /dev/null
-From 1b3640fb2ba49dcf0ece68e61e97be6bde0c2e5a Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Tue, 24 May 2016 16:20:09 +0100
-Subject: [PATCH 361/381] bcm2835-camera: Fix max/min error when looping over
- cameras/resolutions
-
-See: https://github.com/raspberrypi/linux/issues/1447#issuecomment-221303506
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -1530,8 +1530,8 @@ static int get_num_cameras(struct vchiq_
- }
- for (i = 0;
- i < (cam_info.num_cameras > num_resolutions ?
-- cam_info.num_cameras :
-- num_resolutions);
-+ num_resolutions :
-+ cam_info.num_cameras);
- i++) {
- resolutions[i][0] = cam_info.cameras[i].max_width;
- resolutions[i][1] = cam_info.cameras[i].max_height;
+++ /dev/null
-From 472fd91e090c8417770687a393f252f834d26ac5 Mon Sep 17 00:00:00 2001
-From: Aaron Shaw <shawaj@gmail.com>
-Date: Thu, 26 May 2016 23:37:11 +0100
-Subject: [PATCH 362/381] Change BoomBerry name to JustBoom in all locations
- due to legal challenge
-
----
- arch/arm/boot/dts/overlays/Makefile | 4 +-
- arch/arm/boot/dts/overlays/README | 52 ++---
- .../boot/dts/overlays/boomberry-dac-overlay.dts | 43 -----
- .../boot/dts/overlays/boomberry-digi-overlay.dts | 39 ----
- .../arm/boot/dts/overlays/justboom-dac-overlay.dts | 43 +++++
- .../boot/dts/overlays/justboom-digi-overlay.dts | 39 ++++
- arch/arm/configs/bcm2709_defconfig | 4 +-
- arch/arm/configs/bcmrpi_defconfig | 4 +-
- sound/soc/bcm/Kconfig | 12 +-
- sound/soc/bcm/Makefile | 8 +-
- sound/soc/bcm/boomberry-dac.c | 162 ----------------
- sound/soc/bcm/boomberry-digi.c | 215 ---------------------
- sound/soc/bcm/justboom-dac.c | 162 ++++++++++++++++
- sound/soc/bcm/justboom-digi.c | 215 +++++++++++++++++++++
- 14 files changed, 501 insertions(+), 501 deletions(-)
- delete mode 100644 arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
- delete mode 100644 arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
- create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
- create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
- delete mode 100644 sound/soc/bcm/boomberry-dac.c
- delete mode 100644 sound/soc/bcm/boomberry-digi.c
- create mode 100644 sound/soc/bcm/justboom-dac.c
- create mode 100644 sound/soc/bcm/justboom-digi.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -18,8 +18,6 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += boomberry-dac.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += boomberry-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
-@@ -43,6 +41,8 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
- dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -238,32 +238,6 @@ Load: dtoverlay=bmp085_i2c-sensor
- Params: <None>
-
-
--Name: boomberry-dac
--Info: Configures the BoomBerry DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
-- cards
--Load: dtoverlay=boomberry-dac,<param>=<val>
--Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
-- Digital volume control. Enable with
-- "dtoverlay=boomberry-dac,24db_digital_gain"
-- (The default behaviour is that the Digital
-- volume control is limited to a maximum of
-- 0dB. ie. it can attenuate but not provide
-- gain. For most users, this will be desired
-- as it will prevent clipping. By appending
-- the 24dB_digital_gain parameter, the Digital
-- volume control will allow up to 24dB of
-- gain. If this parameter is enabled, it is the
-- responsibility of the user to ensure that
-- the Digital volume control is set to a value
-- that does not result in clipping/distortion!)
--
--
--Name: boomberry-digi
--Info: Configures the BoomBerry Digi HAT and Digi Zero audio cards
--Load: dtoverlay=boomberry-digi
--Params: <None>
--
--
- Name: dht11
- Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
- Also sometimes found with the part number(s) AM230x.
-@@ -541,6 +515,32 @@ Params: 24db_digital_gain Allow ga
- that does not result in clipping/distortion!)
-
-
-+Name: justboom-dac
-+Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
-+ cards
-+Load: dtoverlay=justboom-dac,<param>=<val>
-+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
-+ Digital volume control. Enable with
-+ "dtoverlay=justboom-dac,24db_digital_gain"
-+ (The default behaviour is that the Digital
-+ volume control is limited to a maximum of
-+ 0dB. ie. it can attenuate but not provide
-+ gain. For most users, this will be desired
-+ as it will prevent clipping. By appending
-+ the 24dB_digital_gain parameter, the Digital
-+ volume control will allow up to 24dB of
-+ gain. If this parameter is enabled, it is the
-+ responsibility of the user to ensure that
-+ the Digital volume control is set to a value
-+ that does not result in clipping/distortion!)
-+
-+
-+Name: justboom-digi
-+Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
-+Load: dtoverlay=justboom-digi
-+Params: <None>
-+
-+
- Name: lirc-rpi
- Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
- Consult the module documentation for more details.
---- a/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
-+++ /dev/null
-@@ -1,43 +0,0 @@
--// Definitions for BoomBerry DAC
--/dts-v1/;
--/plugin/;
--
--/ {
-- compatible = "brcm,bcm2708";
--
-- fragment@0 {
-- target = <&i2s>;
-- __overlay__ {
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
-- target = <&i2c1>;
-- __overlay__ {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- status = "okay";
--
-- pcm5122@4d {
-- #sound-dai-cells = <0>;
-- compatible = "ti,pcm5122";
-- reg = <0x4d>;
-- status = "okay";
-- };
-- };
-- };
--
-- fragment@2 {
-- target = <&sound>;
-- frag2: __overlay__ {
-- compatible = "boomberry,boomberry-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- __overrides__ {
-- 24db_digital_gain = <&frag2>,"boomberry,24db_digital_gain?";
-- };
--};
---- a/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
-+++ /dev/null
-@@ -1,39 +0,0 @@
--// Definitions for BoomBerry Digi
--/dts-v1/;
--/plugin/;
--
--/ {
-- compatible = "brcm,bcm2708";
--
-- fragment@0 {
-- target = <&i2s>;
-- __overlay__ {
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
-- target = <&i2c1>;
-- __overlay__ {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- status = "okay";
--
-- wm8804@3b {
-- #sound-dai-cells = <0>;
-- compatible = "wlf,wm8804";
-- reg = <0x3b>;
-- status = "okay";
-- };
-- };
-- };
--
-- fragment@2 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "boomberry,boomberry-digi";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--};
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
-@@ -0,0 +1,43 @@
-+// Definitions for JustBoom DAC
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ pcm5122@4d {
-+ #sound-dai-cells = <0>;
-+ compatible = "ti,pcm5122";
-+ reg = <0x4d>;
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ frag2: __overlay__ {
-+ compatible = "justboom,justboom-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
-+ __overrides__ {
-+ 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
-+ };
-+};
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
-@@ -0,0 +1,39 @@
-+// Definitions for JustBoom Digi
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8804@3b {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8804";
-+ reg = <0x3b>;
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "justboom,justboom-digi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -861,8 +861,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
- CONFIG_SND_BCM2708_SOC_RPI_DAC=m
- CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -853,8 +853,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
- CONFIG_SND_BCM2708_SOC_RPI_DAC=m
- CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -50,19 +50,19 @@ config SND_BCM2708_SOC_RPI_PROTO
- help
- Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731).
-
--config SND_BCM2708_SOC_BOOMBERRY_DAC
-- tristate "Support for BoomBerry DAC"
-+config SND_BCM2708_SOC_JUSTBOOM_DAC
-+ tristate "Support for JustBoom DAC"
- depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
- select SND_SOC_PCM512x
- help
-- Say Y or M if you want to add support for BoomBerry DAC.
-+ Say Y or M if you want to add support for JustBoom DAC.
-
--config SND_BCM2708_SOC_BOOMBERRY_DIGI
-- tristate "Support for BoomBerry Digi"
-+config SND_BCM2708_SOC_JUSTBOOM_DIGI
-+ tristate "Support for JustBoom Digi"
- depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
- select SND_SOC_WM8804
- help
-- Say Y or M if you want to add support for BoomBerry Digi.
-+ Say Y or M if you want to add support for JustBoom Digi.
-
- config SND_BCM2708_SOC_IQAUDIO_DAC
- tristate "Support for IQaudIO-DAC"
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -9,8 +9,8 @@ snd-soc-hifiberry-dac-objs := hifiberry_
- snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
- snd-soc-hifiberry-digi-objs := hifiberry_digi.o
- snd-soc-hifiberry-amp-objs := hifiberry_amp.o
--snd-soc-boomberry-dac-objs := boomberry-dac.o
--snd-soc-boomberry-digi-objs := boomberry-digi.o
-+snd-soc-justboom-dac-objs := justboom-dac.o
-+snd-soc-justboom-digi-objs := justboom-digi.o
- snd-soc-rpi-dac-objs := rpi-dac.o
- snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
-@@ -22,8 +22,8 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o
--obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC) += snd-soc-boomberry-dac.o
--obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI) += snd-soc-boomberry-digi.o
-+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o
-+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI) += snd-soc-justboom-digi.o
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
- obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
---- a/sound/soc/bcm/boomberry-dac.c
-+++ /dev/null
-@@ -1,162 +0,0 @@
--/*
-- * ASoC Driver for BoomBerry DAC Raspberry Pi HAT Sound Card
-- *
-- * Author: Milan Neskovic
-- * Copyright 2016
-- * based on code by Daniel Matuschek <info@crazy-audio.com>
-- * based on code by Florian Meier <florian.meier@koalo.de>
-- *
-- * This program is free software; you can redistribute it and/or
-- * modify it under the terms of the GNU General Public License
-- * version 2 as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope that it will be useful, but
-- * WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- * General Public License for more details.
-- */
--
--#include <linux/module.h>
--#include <linux/platform_device.h>
--
--#include <sound/core.h>
--#include <sound/pcm.h>
--#include <sound/pcm_params.h>
--#include <sound/soc.h>
--#include <sound/jack.h>
--
--#include "../codecs/pcm512x.h"
--
--static bool digital_gain_0db_limit = true;
--
--static int snd_rpi_boomberry_dac_init(struct snd_soc_pcm_runtime *rtd)
--{
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
-- snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
-- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
--
-- if (digital_gain_0db_limit)
-- {
-- int ret;
-- struct snd_soc_card *card = rtd->card;
--
-- ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
-- if (ret < 0)
-- dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
-- }
--
-- return 0;
--}
--
--static int snd_rpi_boomberry_dac_hw_params(struct snd_pcm_substream *substream,
-- struct snd_pcm_hw_params *params)
--{
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-- /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
-- unsigned int sample_bits =
-- snd_pcm_format_physical_width(params_format(params));
-- return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
--}
--
--static int snd_rpi_boomberry_dac_startup(struct snd_pcm_substream *substream) {
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
-- return 0;
--}
--
--static void snd_rpi_boomberry_dac_shutdown(struct snd_pcm_substream *substream) {
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
--}
--
--/* machine stream operations */
--static struct snd_soc_ops snd_rpi_boomberry_dac_ops = {
-- .hw_params = snd_rpi_boomberry_dac_hw_params,
-- .startup = snd_rpi_boomberry_dac_startup,
-- .shutdown = snd_rpi_boomberry_dac_shutdown,
--};
--
--static struct snd_soc_dai_link snd_rpi_boomberry_dac_dai[] = {
--{
-- .name = "BoomBerry DAC",
-- .stream_name = "BoomBerry DAC HiFi",
-- .cpu_dai_name = "bcm2708-i2s.0",
-- .codec_dai_name = "pcm512x-hifi",
-- .platform_name = "bcm2708-i2s.0",
-- .codec_name = "pcm512x.1-004d",
-- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-- SND_SOC_DAIFMT_CBS_CFS,
-- .ops = &snd_rpi_boomberry_dac_ops,
-- .init = snd_rpi_boomberry_dac_init,
--},
--};
--
--/* audio machine driver */
--static struct snd_soc_card snd_rpi_boomberry_dac = {
-- .name = "snd_rpi_boomberry_dac",
-- .owner = THIS_MODULE,
-- .dai_link = snd_rpi_boomberry_dac_dai,
-- .num_links = ARRAY_SIZE(snd_rpi_boomberry_dac_dai),
--};
--
--static int snd_rpi_boomberry_dac_probe(struct platform_device *pdev)
--{
-- int ret = 0;
--
-- snd_rpi_boomberry_dac.dev = &pdev->dev;
--
-- if (pdev->dev.of_node) {
-- struct device_node *i2s_node;
-- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_dac_dai[0];
-- i2s_node = of_parse_phandle(pdev->dev.of_node,
-- "i2s-controller", 0);
--
-- if (i2s_node) {
-- dai->cpu_dai_name = NULL;
-- dai->cpu_of_node = i2s_node;
-- dai->platform_name = NULL;
-- dai->platform_of_node = i2s_node;
-- }
--
-- digital_gain_0db_limit = !of_property_read_bool(
-- pdev->dev.of_node, "boomberry,24db_digital_gain");
-- }
--
-- ret = snd_soc_register_card(&snd_rpi_boomberry_dac);
-- if (ret)
-- dev_err(&pdev->dev,
-- "snd_soc_register_card() failed: %d\n", ret);
--
-- return ret;
--}
--
--static int snd_rpi_boomberry_dac_remove(struct platform_device *pdev)
--{
-- return snd_soc_unregister_card(&snd_rpi_boomberry_dac);
--}
--
--static const struct of_device_id snd_rpi_boomberry_dac_of_match[] = {
-- { .compatible = "boomberry,boomberry-dac", },
-- {},
--};
--MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_dac_of_match);
--
--static struct platform_driver snd_rpi_boomberry_dac_driver = {
-- .driver = {
-- .name = "snd-rpi-boomberry-dac",
-- .owner = THIS_MODULE,
-- .of_match_table = snd_rpi_boomberry_dac_of_match,
-- },
-- .probe = snd_rpi_boomberry_dac_probe,
-- .remove = snd_rpi_boomberry_dac_remove,
--};
--
--module_platform_driver(snd_rpi_boomberry_dac_driver);
--
--MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
--MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI DAC HAT Sound Card");
--MODULE_LICENSE("GPL v2");
---- a/sound/soc/bcm/boomberry-digi.c
-+++ /dev/null
-@@ -1,215 +0,0 @@
--/*
-- * ASoC Driver for BoomBerry Raspberry Pi Digi HAT Sound Card
-- *
-- * Author: Milan Neskovic
-- * Copyright 2016
-- * based on code by Daniel Matuschek <info@crazy-audio.com>
-- * based on code by Florian Meier <florian.meier@koalo.de>
-- *
-- * This program is free software; you can redistribute it and/or
-- * modify it under the terms of the GNU General Public License
-- * version 2 as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope that it will be useful, but
-- * WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- * General Public License for more details.
-- */
--
--#include <linux/module.h>
--#include <linux/platform_device.h>
--
--#include <sound/core.h>
--#include <sound/pcm.h>
--#include <sound/pcm_params.h>
--#include <sound/soc.h>
--#include <sound/jack.h>
--
--#include "../codecs/wm8804.h"
--
--static int snd_rpi_boomberry_digi_init(struct snd_soc_pcm_runtime *rtd)
--{
-- struct snd_soc_codec *codec = rtd->codec;
--
-- /* enable TX output */
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
--
-- return 0;
--}
--
--static int snd_rpi_boomberry_digi_startup(struct snd_pcm_substream *substream) {
-- /* turn on digital output */
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-- return 0;
--}
--
--static void snd_rpi_boomberry_digi_shutdown(struct snd_pcm_substream *substream) {
-- /* turn off output */
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
--}
--
--static int snd_rpi_boomberry_digi_hw_params(struct snd_pcm_substream *substream,
-- struct snd_pcm_hw_params *params)
--{
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_dai *codec_dai = rtd->codec_dai;
-- struct snd_soc_codec *codec = rtd->codec;
-- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
--
-- int sysclk = 27000000; /* This is fixed on this board */
--
-- long mclk_freq=0;
-- int mclk_div=1;
-- int sampling_freq=1;
--
-- int ret;
--
-- int samplerate = params_rate(params);
--
-- if (samplerate<=96000) {
-- mclk_freq=samplerate*256;
-- mclk_div=WM8804_MCLKDIV_256FS;
-- } else {
-- mclk_freq=samplerate*128;
-- mclk_div=WM8804_MCLKDIV_128FS;
-- }
--
-- switch (samplerate) {
-- case 32000:
-- sampling_freq=0x03;
-- break;
-- case 44100:
-- sampling_freq=0x00;
-- break;
-- case 48000:
-- sampling_freq=0x02;
-- break;
-- case 88200:
-- sampling_freq=0x08;
-- break;
-- case 96000:
-- sampling_freq=0x0a;
-- break;
-- case 176400:
-- sampling_freq=0x0c;
-- break;
-- case 192000:
-- sampling_freq=0x0e;
-- break;
-- default:
-- dev_err(codec->dev,
-- "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-- samplerate);
-- }
--
-- snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-- snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
--
-- ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-- sysclk, SND_SOC_CLOCK_OUT);
-- if (ret < 0) {
-- dev_err(codec->dev,
-- "Failed to set WM8804 SYSCLK: %d\n", ret);
-- return ret;
-- }
--
-- /* Enable TX output */
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
--
-- /* Power on */
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
--
-- /* set sampling frequency status bits */
-- snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
--
-- return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
--}
--
--/* machine stream operations */
--static struct snd_soc_ops snd_rpi_boomberry_digi_ops = {
-- .hw_params = snd_rpi_boomberry_digi_hw_params,
-- .startup = snd_rpi_boomberry_digi_startup,
-- .shutdown = snd_rpi_boomberry_digi_shutdown,
--};
--
--static struct snd_soc_dai_link snd_rpi_boomberry_digi_dai[] = {
--{
-- .name = "BoomBerry Digi",
-- .stream_name = "BoomBerry Digi HiFi",
-- .cpu_dai_name = "bcm2708-i2s.0",
-- .codec_dai_name = "wm8804-spdif",
-- .platform_name = "bcm2708-i2s.0",
-- .codec_name = "wm8804.1-003b",
-- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-- SND_SOC_DAIFMT_CBM_CFM,
-- .ops = &snd_rpi_boomberry_digi_ops,
-- .init = snd_rpi_boomberry_digi_init,
--},
--};
--
--/* audio machine driver */
--static struct snd_soc_card snd_rpi_boomberry_digi = {
-- .name = "snd_rpi_boomberry_digi",
-- .owner = THIS_MODULE,
-- .dai_link = snd_rpi_boomberry_digi_dai,
-- .num_links = ARRAY_SIZE(snd_rpi_boomberry_digi_dai),
--};
--
--static int snd_rpi_boomberry_digi_probe(struct platform_device *pdev)
--{
-- int ret = 0;
--
-- snd_rpi_boomberry_digi.dev = &pdev->dev;
--
-- if (pdev->dev.of_node) {
-- struct device_node *i2s_node;
-- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_digi_dai[0];
-- i2s_node = of_parse_phandle(pdev->dev.of_node,
-- "i2s-controller", 0);
--
-- if (i2s_node) {
-- dai->cpu_dai_name = NULL;
-- dai->cpu_of_node = i2s_node;
-- dai->platform_name = NULL;
-- dai->platform_of_node = i2s_node;
-- }
-- }
--
-- ret = snd_soc_register_card(&snd_rpi_boomberry_digi);
-- if (ret)
-- dev_err(&pdev->dev,
-- "snd_soc_register_card() failed: %d\n", ret);
--
-- return ret;
--}
--
--static int snd_rpi_boomberry_digi_remove(struct platform_device *pdev)
--{
-- return snd_soc_unregister_card(&snd_rpi_boomberry_digi);
--}
--
--static const struct of_device_id snd_rpi_boomberry_digi_of_match[] = {
-- { .compatible = "boomberry,boomberry-digi", },
-- {},
--};
--MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_digi_of_match);
--
--static struct platform_driver snd_rpi_boomberry_digi_driver = {
-- .driver = {
-- .name = "snd-rpi-boomberry-digi",
-- .owner = THIS_MODULE,
-- .of_match_table = snd_rpi_boomberry_digi_of_match,
-- },
-- .probe = snd_rpi_boomberry_digi_probe,
-- .remove = snd_rpi_boomberry_digi_remove,
--};
--
--module_platform_driver(snd_rpi_boomberry_digi_driver);
--
--MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
--MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI Digi HAT Sound Card");
--MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/sound/soc/bcm/justboom-dac.c
-@@ -0,0 +1,162 @@
-+/*
-+ * ASoC Driver for JustBoom DAC Raspberry Pi HAT Sound Card
-+ *
-+ * Author: Milan Neskovic
-+ * Copyright 2016
-+ * based on code by Daniel Matuschek <info@crazy-audio.com>
-+ * based on code by Florian Meier <florian.meier@koalo.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+#include "../codecs/pcm512x.h"
-+
-+static bool digital_gain_0db_limit = true;
-+
-+static int snd_rpi_justboom_dac_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
-+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
-+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
-+
-+ if (digital_gain_0db_limit)
-+ {
-+ int ret;
-+ struct snd_soc_card *card = rtd->card;
-+
-+ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
-+ if (ret < 0)
-+ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
-+ }
-+
-+ return 0;
-+}
-+
-+static int snd_rpi_justboom_dac_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+ /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
-+ unsigned int sample_bits =
-+ snd_pcm_format_physical_width(params_format(params));
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
-+}
-+
-+static int snd_rpi_justboom_dac_startup(struct snd_pcm_substream *substream) {
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
-+ return 0;
-+}
-+
-+static void snd_rpi_justboom_dac_shutdown(struct snd_pcm_substream *substream) {
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_rpi_justboom_dac_ops = {
-+ .hw_params = snd_rpi_justboom_dac_hw_params,
-+ .startup = snd_rpi_justboom_dac_startup,
-+ .shutdown = snd_rpi_justboom_dac_shutdown,
-+};
-+
-+static struct snd_soc_dai_link snd_rpi_justboom_dac_dai[] = {
-+{
-+ .name = "JustBoom DAC",
-+ .stream_name = "JustBoom DAC HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "pcm512x-hifi",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "pcm512x.1-004d",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBS_CFS,
-+ .ops = &snd_rpi_justboom_dac_ops,
-+ .init = snd_rpi_justboom_dac_init,
-+},
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_rpi_justboom_dac = {
-+ .name = "snd_rpi_justboom_dac",
-+ .owner = THIS_MODULE,
-+ .dai_link = snd_rpi_justboom_dac_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai),
-+};
-+
-+static int snd_rpi_justboom_dac_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ snd_rpi_justboom_dac.dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_dac_dai[0];
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+
-+ digital_gain_0db_limit = !of_property_read_bool(
-+ pdev->dev.of_node, "justboom,24db_digital_gain");
-+ }
-+
-+ ret = snd_soc_register_card(&snd_rpi_justboom_dac);
-+ if (ret)
-+ dev_err(&pdev->dev,
-+ "snd_soc_register_card() failed: %d\n", ret);
-+
-+ return ret;
-+}
-+
-+static int snd_rpi_justboom_dac_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_rpi_justboom_dac);
-+}
-+
-+static const struct of_device_id snd_rpi_justboom_dac_of_match[] = {
-+ { .compatible = "justboom,justboom-dac", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_dac_of_match);
-+
-+static struct platform_driver snd_rpi_justboom_dac_driver = {
-+ .driver = {
-+ .name = "snd-rpi-justboom-dac",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_rpi_justboom_dac_of_match,
-+ },
-+ .probe = snd_rpi_justboom_dac_probe,
-+ .remove = snd_rpi_justboom_dac_remove,
-+};
-+
-+module_platform_driver(snd_rpi_justboom_dac_driver);
-+
-+MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
-+MODULE_DESCRIPTION("ASoC Driver for JustBoom PI DAC HAT Sound Card");
-+MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/sound/soc/bcm/justboom-digi.c
-@@ -0,0 +1,215 @@
-+/*
-+ * ASoC Driver for JustBoom Raspberry Pi Digi HAT Sound Card
-+ *
-+ * Author: Milan Neskovic
-+ * Copyright 2016
-+ * based on code by Daniel Matuschek <info@crazy-audio.com>
-+ * based on code by Florian Meier <florian.meier@koalo.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+#include "../codecs/wm8804.h"
-+
-+static int snd_rpi_justboom_digi_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ /* enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ return 0;
-+}
-+
-+static int snd_rpi_justboom_digi_startup(struct snd_pcm_substream *substream) {
-+ /* turn on digital output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-+ return 0;
-+}
-+
-+static void snd_rpi_justboom_digi_shutdown(struct snd_pcm_substream *substream) {
-+ /* turn off output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
-+}
-+
-+static int snd_rpi_justboom_digi_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+
-+ int sysclk = 27000000; /* This is fixed on this board */
-+
-+ long mclk_freq=0;
-+ int mclk_div=1;
-+ int sampling_freq=1;
-+
-+ int ret;
-+
-+ int samplerate = params_rate(params);
-+
-+ if (samplerate<=96000) {
-+ mclk_freq=samplerate*256;
-+ mclk_div=WM8804_MCLKDIV_256FS;
-+ } else {
-+ mclk_freq=samplerate*128;
-+ mclk_div=WM8804_MCLKDIV_128FS;
-+ }
-+
-+ switch (samplerate) {
-+ case 32000:
-+ sampling_freq=0x03;
-+ break;
-+ case 44100:
-+ sampling_freq=0x00;
-+ break;
-+ case 48000:
-+ sampling_freq=0x02;
-+ break;
-+ case 88200:
-+ sampling_freq=0x08;
-+ break;
-+ case 96000:
-+ sampling_freq=0x0a;
-+ break;
-+ case 176400:
-+ sampling_freq=0x0c;
-+ break;
-+ case 192000:
-+ sampling_freq=0x0e;
-+ break;
-+ default:
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-+ samplerate);
-+ }
-+
-+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
-+
-+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-+ sysclk, SND_SOC_CLOCK_OUT);
-+ if (ret < 0) {
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK: %d\n", ret);
-+ return ret;
-+ }
-+
-+ /* Enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ /* Power on */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
-+
-+ /* set sampling frequency status bits */
-+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
-+
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_rpi_justboom_digi_ops = {
-+ .hw_params = snd_rpi_justboom_digi_hw_params,
-+ .startup = snd_rpi_justboom_digi_startup,
-+ .shutdown = snd_rpi_justboom_digi_shutdown,
-+};
-+
-+static struct snd_soc_dai_link snd_rpi_justboom_digi_dai[] = {
-+{
-+ .name = "JustBoom Digi",
-+ .stream_name = "JustBoom Digi HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "wm8804-spdif",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "wm8804.1-003b",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBM_CFM,
-+ .ops = &snd_rpi_justboom_digi_ops,
-+ .init = snd_rpi_justboom_digi_init,
-+},
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_rpi_justboom_digi = {
-+ .name = "snd_rpi_justboom_digi",
-+ .owner = THIS_MODULE,
-+ .dai_link = snd_rpi_justboom_digi_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_justboom_digi_dai),
-+};
-+
-+static int snd_rpi_justboom_digi_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ snd_rpi_justboom_digi.dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_digi_dai[0];
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+ }
-+
-+ ret = snd_soc_register_card(&snd_rpi_justboom_digi);
-+ if (ret)
-+ dev_err(&pdev->dev,
-+ "snd_soc_register_card() failed: %d\n", ret);
-+
-+ return ret;
-+}
-+
-+static int snd_rpi_justboom_digi_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_rpi_justboom_digi);
-+}
-+
-+static const struct of_device_id snd_rpi_justboom_digi_of_match[] = {
-+ { .compatible = "justboom,justboom-digi", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_digi_of_match);
-+
-+static struct platform_driver snd_rpi_justboom_digi_driver = {
-+ .driver = {
-+ .name = "snd-rpi-justboom-digi",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_rpi_justboom_digi_of_match,
-+ },
-+ .probe = snd_rpi_justboom_digi_probe,
-+ .remove = snd_rpi_justboom_digi_remove,
-+};
-+
-+module_platform_driver(snd_rpi_justboom_digi_driver);
-+
-+MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
-+MODULE_DESCRIPTION("ASoC Driver for JustBoom PI Digi HAT Sound Card");
-+MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 0975e732daee077f1b50d3869a37fb07b255f78a Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Sun, 29 May 2016 05:22:29 +0100
-Subject: [PATCH 363/381] Add dt param to force HiFiBerry DAC+ Pro into slave
- mode
-
-"dtoverlay=hifiberry-dacplus,slave"
-
-Add 'slave' param to use HiFiBerry DAC+ Pro in slave mode,
-with Pi as master for bit and frame clock.
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/overlays/README | 2 ++
- arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 6 ++++--
- sound/soc/bcm/hifiberry_dacplus.c | 10 ++++++++--
- 3 files changed, 14 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -344,6 +344,8 @@ Params: 24db_digital_gain Allow ga
- responsibility of the user to ensure that
- the Digital volume control is set to a value
- that does not result in clipping/distortion!)
-+ slave Force DAC+ Pro into slave mode, using Pi as
-+ master for bit clock and frame clock.
-
-
- Name: hifiberry-digi
---- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
-@@ -41,7 +41,7 @@
-
- fragment@3 {
- target = <&sound>;
-- frag3: __overlay__ {
-+ hifiberry_dacplus: __overlay__ {
- compatible = "hifiberry,hifiberry-dacplus";
- i2s-controller = <&i2s>;
- status = "okay";
-@@ -49,6 +49,8 @@
- };
-
- __overrides__ {
-- 24db_digital_gain = <&frag3>,"hifiberry,24db_digital_gain?";
-+ 24db_digital_gain =
-+ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
-+ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
- };
- };
---- a/sound/soc/bcm/hifiberry_dacplus.c
-+++ b/sound/soc/bcm/hifiberry_dacplus.c
-@@ -47,6 +47,7 @@ struct pcm512x_priv {
- /* Clock rate of CLK48EN attached to GPIO3 pin */
- #define CLK_48EN_RATE 24576000UL
-
-+static bool slave;
- static bool snd_rpi_hifiberry_is_dacpro;
- static bool digital_gain_0db_limit = true;
-
-@@ -145,8 +146,11 @@ static int snd_rpi_hifiberry_dacplus_ini
- struct snd_soc_codec *codec = rtd->codec;
- struct pcm512x_priv *priv;
-
-- snd_rpi_hifiberry_is_dacpro
-- = snd_rpi_hifiberry_dacplus_is_pro_card(codec);
-+ if (slave)
-+ snd_rpi_hifiberry_is_dacpro = false;
-+ else
-+ snd_rpi_hifiberry_is_dacpro =
-+ snd_rpi_hifiberry_dacplus_is_pro_card(codec);
-
- if (snd_rpi_hifiberry_is_dacpro) {
- struct snd_soc_dai_link *dai = rtd->dai_link;
-@@ -314,6 +318,8 @@ static int snd_rpi_hifiberry_dacplus_pro
-
- digital_gain_0db_limit = !of_property_read_bool(
- pdev->dev.of_node, "hifiberry,24db_digital_gain");
-+ slave = of_property_read_bool(pdev->dev.of_node,
-+ "hifiberry-dacplus,slave");
- }
-
- ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplus);
--- /dev/null
+From d832db5de5893d3d6020a9d3e32aa4cd80490cc9 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 24 May 2016 16:20:09 +0100
+Subject: [PATCH 364/423] bcm2835-camera: Fix max/min error when looping over
+ cameras/resolutions
+
+See: https://github.com/raspberrypi/linux/issues/1447#issuecomment-221303506
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -1530,8 +1530,8 @@ static int get_num_cameras(struct vchiq_
+ }
+ for (i = 0;
+ i < (cam_info.num_cameras > num_resolutions ?
+- cam_info.num_cameras :
+- num_resolutions);
++ num_resolutions :
++ cam_info.num_cameras);
+ i++) {
+ resolutions[i][0] = cam_info.cameras[i].max_width;
+ resolutions[i][1] = cam_info.cameras[i].max_height;
+++ /dev/null
-From 14c2692d882e4438940a4fcf6f3c70e17e97633e Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Thu, 19 May 2016 00:00:00 +0100
-Subject: [PATCH 364/381] simple: add sound-dai-cells to I2S def
-
-Add '#sound-dai-cells = <0>;' to the I2S definition in
-bcm2708_common.dtsi
-
-Not having it specified, whilst not causing an issue right now with
-rpi-4.4.y, is going to cause an issue going forward with the use of
-simple-card driver. So it doesn't fall through the cracks, patch it
-in now.
-
-Hopefully Martin has taken care of getting a patch submitted for the
-upstream Pi dts, as it was he who first run into the issue with the
-current upstream kernel....
-https://github.com/msperl/linux-rpi/issues/3#issue-154916615
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -137,6 +137,7 @@
-
- i2s: i2s@7e203000 {
- compatible = "brcm,bcm2835-i2s";
-+ #sound-dai-cells = <0>;
- reg = <0x7e203000 0x24>,
- <0x7e101098 0x08>;
-
+++ /dev/null
-From 5369ea497f871c261a8ceb49508999160fdd3fc7 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <6by9@users.noreply.github.com>
-Date: Tue, 31 May 2016 10:38:31 +0100
-Subject: [PATCH 365/381] BCM2835-V4L2: Increase minimum resolution to 32x32
-
-https://github.com/raspberrypi/linux/issues/1498 showed
-up that 16x16 is failing to work on the GPU for some reason.
-
-GPU bug being tracked on
-https://github.com/raspberrypi/firmware/issues/607
-Workaround here by increasing minimum resolution via V4L2
-to 32x32.
-
-Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -36,8 +36,8 @@
-
- #define BM2835_MMAL_VERSION "0.0.2"
- #define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2"
--#define MIN_WIDTH 16
--#define MIN_HEIGHT 16
-+#define MIN_WIDTH 32
-+#define MIN_HEIGHT 32
- #define MIN_BUFFER_SIZE (80*1024)
-
- #define MAX_VIDEO_MODE_WIDTH 1280
--- /dev/null
+From 648226e081795be9ebaad2dc14bf768ba785f277 Mon Sep 17 00:00:00 2001
+From: Aaron Shaw <shawaj@gmail.com>
+Date: Thu, 26 May 2016 23:37:11 +0100
+Subject: [PATCH 365/423] Change BoomBerry name to JustBoom in all locations
+ due to legal challenge
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 4 +-
+ arch/arm/boot/dts/overlays/README | 52 ++---
+ .../boot/dts/overlays/boomberry-dac-overlay.dts | 43 -----
+ .../boot/dts/overlays/boomberry-digi-overlay.dts | 39 ----
+ .../arm/boot/dts/overlays/justboom-dac-overlay.dts | 43 +++++
+ .../boot/dts/overlays/justboom-digi-overlay.dts | 39 ++++
+ arch/arm/configs/bcm2709_defconfig | 4 +-
+ arch/arm/configs/bcmrpi_defconfig | 4 +-
+ sound/soc/bcm/Kconfig | 12 +-
+ sound/soc/bcm/Makefile | 8 +-
+ sound/soc/bcm/boomberry-dac.c | 162 ----------------
+ sound/soc/bcm/boomberry-digi.c | 215 ---------------------
+ sound/soc/bcm/justboom-dac.c | 162 ++++++++++++++++
+ sound/soc/bcm/justboom-digi.c | 215 +++++++++++++++++++++
+ 14 files changed, 501 insertions(+), 501 deletions(-)
+ delete mode 100644 arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
+ delete mode 100644 arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
+ create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
+ create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
+ delete mode 100644 sound/soc/bcm/boomberry-dac.c
+ delete mode 100644 sound/soc/bcm/boomberry-digi.c
+ create mode 100644 sound/soc/bcm/justboom-dac.c
+ create mode 100644 sound/soc/bcm/justboom-digi.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -18,8 +18,6 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += boomberry-dac.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += boomberry-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+@@ -43,6 +41,8 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -238,32 +238,6 @@ Load: dtoverlay=bmp085_i2c-sensor
+ Params: <None>
+
+
+-Name: boomberry-dac
+-Info: Configures the BoomBerry DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
+- cards
+-Load: dtoverlay=boomberry-dac,<param>=<val>
+-Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
+- Digital volume control. Enable with
+- "dtoverlay=boomberry-dac,24db_digital_gain"
+- (The default behaviour is that the Digital
+- volume control is limited to a maximum of
+- 0dB. ie. it can attenuate but not provide
+- gain. For most users, this will be desired
+- as it will prevent clipping. By appending
+- the 24dB_digital_gain parameter, the Digital
+- volume control will allow up to 24dB of
+- gain. If this parameter is enabled, it is the
+- responsibility of the user to ensure that
+- the Digital volume control is set to a value
+- that does not result in clipping/distortion!)
+-
+-
+-Name: boomberry-digi
+-Info: Configures the BoomBerry Digi HAT and Digi Zero audio cards
+-Load: dtoverlay=boomberry-digi
+-Params: <None>
+-
+-
+ Name: dht11
+ Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
+ Also sometimes found with the part number(s) AM230x.
+@@ -541,6 +515,32 @@ Params: 24db_digital_gain Allow ga
+ that does not result in clipping/distortion!)
+
+
++Name: justboom-dac
++Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
++ cards
++Load: dtoverlay=justboom-dac,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=justboom-dac,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24dB_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: justboom-digi
++Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
++Load: dtoverlay=justboom-digi
++Params: <None>
++
++
+ Name: lirc-rpi
+ Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
+ Consult the module documentation for more details.
+--- a/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
++++ /dev/null
+@@ -1,43 +0,0 @@
+-// Definitions for BoomBerry DAC
+-/dts-v1/;
+-/plugin/;
+-
+-/ {
+- compatible = "brcm,bcm2708";
+-
+- fragment@0 {
+- target = <&i2s>;
+- __overlay__ {
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+- target = <&i2c1>;
+- __overlay__ {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "okay";
+-
+- pcm5122@4d {
+- #sound-dai-cells = <0>;
+- compatible = "ti,pcm5122";
+- reg = <0x4d>;
+- status = "okay";
+- };
+- };
+- };
+-
+- fragment@2 {
+- target = <&sound>;
+- frag2: __overlay__ {
+- compatible = "boomberry,boomberry-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- __overrides__ {
+- 24db_digital_gain = <&frag2>,"boomberry,24db_digital_gain?";
+- };
+-};
+--- a/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
++++ /dev/null
+@@ -1,39 +0,0 @@
+-// Definitions for BoomBerry Digi
+-/dts-v1/;
+-/plugin/;
+-
+-/ {
+- compatible = "brcm,bcm2708";
+-
+- fragment@0 {
+- target = <&i2s>;
+- __overlay__ {
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+- target = <&i2c1>;
+- __overlay__ {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "okay";
+-
+- wm8804@3b {
+- #sound-dai-cells = <0>;
+- compatible = "wlf,wm8804";
+- reg = <0x3b>;
+- status = "okay";
+- };
+- };
+- };
+-
+- fragment@2 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "boomberry,boomberry-digi";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
+@@ -0,0 +1,43 @@
++// Definitions for JustBoom DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122@4d {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4d>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "justboom,justboom-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for JustBoom Digi
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "justboom,justboom-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -861,8 +861,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
+ CONFIG_SND_BCM2708_SOC_RPI_DAC=m
+ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -853,8 +853,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
+ CONFIG_SND_BCM2708_SOC_RPI_DAC=m
+ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -50,19 +50,19 @@ config SND_BCM2708_SOC_RPI_PROTO
+ help
+ Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731).
+
+-config SND_BCM2708_SOC_BOOMBERRY_DAC
+- tristate "Support for BoomBerry DAC"
++config SND_BCM2708_SOC_JUSTBOOM_DAC
++ tristate "Support for JustBoom DAC"
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
+ select SND_SOC_PCM512x
+ help
+- Say Y or M if you want to add support for BoomBerry DAC.
++ Say Y or M if you want to add support for JustBoom DAC.
+
+-config SND_BCM2708_SOC_BOOMBERRY_DIGI
+- tristate "Support for BoomBerry Digi"
++config SND_BCM2708_SOC_JUSTBOOM_DIGI
++ tristate "Support for JustBoom Digi"
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
+ select SND_SOC_WM8804
+ help
+- Say Y or M if you want to add support for BoomBerry Digi.
++ Say Y or M if you want to add support for JustBoom Digi.
+
+ config SND_BCM2708_SOC_IQAUDIO_DAC
+ tristate "Support for IQaudIO-DAC"
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -9,8 +9,8 @@ snd-soc-hifiberry-dac-objs := hifiberry_
+ snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
+ snd-soc-hifiberry-digi-objs := hifiberry_digi.o
+ snd-soc-hifiberry-amp-objs := hifiberry_amp.o
+-snd-soc-boomberry-dac-objs := boomberry-dac.o
+-snd-soc-boomberry-digi-objs := boomberry-digi.o
++snd-soc-justboom-dac-objs := justboom-dac.o
++snd-soc-justboom-digi-objs := justboom-digi.o
+ snd-soc-rpi-dac-objs := rpi-dac.o
+ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
+@@ -22,8 +22,8 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o
+-obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC) += snd-soc-boomberry-dac.o
+-obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI) += snd-soc-boomberry-digi.o
++obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o
++obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI) += snd-soc-justboom-digi.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
+--- a/sound/soc/bcm/boomberry-dac.c
++++ /dev/null
+@@ -1,162 +0,0 @@
+-/*
+- * ASoC Driver for BoomBerry DAC Raspberry Pi HAT Sound Card
+- *
+- * Author: Milan Neskovic
+- * Copyright 2016
+- * based on code by Daniel Matuschek <info@crazy-audio.com>
+- * based on code by Florian Meier <florian.meier@koalo.de>
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- * General Public License for more details.
+- */
+-
+-#include <linux/module.h>
+-#include <linux/platform_device.h>
+-
+-#include <sound/core.h>
+-#include <sound/pcm.h>
+-#include <sound/pcm_params.h>
+-#include <sound/soc.h>
+-#include <sound/jack.h>
+-
+-#include "../codecs/pcm512x.h"
+-
+-static bool digital_gain_0db_limit = true;
+-
+-static int snd_rpi_boomberry_dac_init(struct snd_soc_pcm_runtime *rtd)
+-{
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
+- snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
+- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
+-
+- if (digital_gain_0db_limit)
+- {
+- int ret;
+- struct snd_soc_card *card = rtd->card;
+-
+- ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
+- if (ret < 0)
+- dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
+- }
+-
+- return 0;
+-}
+-
+-static int snd_rpi_boomberry_dac_hw_params(struct snd_pcm_substream *substream,
+- struct snd_pcm_hw_params *params)
+-{
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+- /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
+- unsigned int sample_bits =
+- snd_pcm_format_physical_width(params_format(params));
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
+-}
+-
+-static int snd_rpi_boomberry_dac_startup(struct snd_pcm_substream *substream) {
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
+- return 0;
+-}
+-
+-static void snd_rpi_boomberry_dac_shutdown(struct snd_pcm_substream *substream) {
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
+-}
+-
+-/* machine stream operations */
+-static struct snd_soc_ops snd_rpi_boomberry_dac_ops = {
+- .hw_params = snd_rpi_boomberry_dac_hw_params,
+- .startup = snd_rpi_boomberry_dac_startup,
+- .shutdown = snd_rpi_boomberry_dac_shutdown,
+-};
+-
+-static struct snd_soc_dai_link snd_rpi_boomberry_dac_dai[] = {
+-{
+- .name = "BoomBerry DAC",
+- .stream_name = "BoomBerry DAC HiFi",
+- .cpu_dai_name = "bcm2708-i2s.0",
+- .codec_dai_name = "pcm512x-hifi",
+- .platform_name = "bcm2708-i2s.0",
+- .codec_name = "pcm512x.1-004d",
+- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
+- SND_SOC_DAIFMT_CBS_CFS,
+- .ops = &snd_rpi_boomberry_dac_ops,
+- .init = snd_rpi_boomberry_dac_init,
+-},
+-};
+-
+-/* audio machine driver */
+-static struct snd_soc_card snd_rpi_boomberry_dac = {
+- .name = "snd_rpi_boomberry_dac",
+- .owner = THIS_MODULE,
+- .dai_link = snd_rpi_boomberry_dac_dai,
+- .num_links = ARRAY_SIZE(snd_rpi_boomberry_dac_dai),
+-};
+-
+-static int snd_rpi_boomberry_dac_probe(struct platform_device *pdev)
+-{
+- int ret = 0;
+-
+- snd_rpi_boomberry_dac.dev = &pdev->dev;
+-
+- if (pdev->dev.of_node) {
+- struct device_node *i2s_node;
+- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_dac_dai[0];
+- i2s_node = of_parse_phandle(pdev->dev.of_node,
+- "i2s-controller", 0);
+-
+- if (i2s_node) {
+- dai->cpu_dai_name = NULL;
+- dai->cpu_of_node = i2s_node;
+- dai->platform_name = NULL;
+- dai->platform_of_node = i2s_node;
+- }
+-
+- digital_gain_0db_limit = !of_property_read_bool(
+- pdev->dev.of_node, "boomberry,24db_digital_gain");
+- }
+-
+- ret = snd_soc_register_card(&snd_rpi_boomberry_dac);
+- if (ret)
+- dev_err(&pdev->dev,
+- "snd_soc_register_card() failed: %d\n", ret);
+-
+- return ret;
+-}
+-
+-static int snd_rpi_boomberry_dac_remove(struct platform_device *pdev)
+-{
+- return snd_soc_unregister_card(&snd_rpi_boomberry_dac);
+-}
+-
+-static const struct of_device_id snd_rpi_boomberry_dac_of_match[] = {
+- { .compatible = "boomberry,boomberry-dac", },
+- {},
+-};
+-MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_dac_of_match);
+-
+-static struct platform_driver snd_rpi_boomberry_dac_driver = {
+- .driver = {
+- .name = "snd-rpi-boomberry-dac",
+- .owner = THIS_MODULE,
+- .of_match_table = snd_rpi_boomberry_dac_of_match,
+- },
+- .probe = snd_rpi_boomberry_dac_probe,
+- .remove = snd_rpi_boomberry_dac_remove,
+-};
+-
+-module_platform_driver(snd_rpi_boomberry_dac_driver);
+-
+-MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
+-MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI DAC HAT Sound Card");
+-MODULE_LICENSE("GPL v2");
+--- a/sound/soc/bcm/boomberry-digi.c
++++ /dev/null
+@@ -1,215 +0,0 @@
+-/*
+- * ASoC Driver for BoomBerry Raspberry Pi Digi HAT Sound Card
+- *
+- * Author: Milan Neskovic
+- * Copyright 2016
+- * based on code by Daniel Matuschek <info@crazy-audio.com>
+- * based on code by Florian Meier <florian.meier@koalo.de>
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- * General Public License for more details.
+- */
+-
+-#include <linux/module.h>
+-#include <linux/platform_device.h>
+-
+-#include <sound/core.h>
+-#include <sound/pcm.h>
+-#include <sound/pcm_params.h>
+-#include <sound/soc.h>
+-#include <sound/jack.h>
+-
+-#include "../codecs/wm8804.h"
+-
+-static int snd_rpi_boomberry_digi_init(struct snd_soc_pcm_runtime *rtd)
+-{
+- struct snd_soc_codec *codec = rtd->codec;
+-
+- /* enable TX output */
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
+-
+- return 0;
+-}
+-
+-static int snd_rpi_boomberry_digi_startup(struct snd_pcm_substream *substream) {
+- /* turn on digital output */
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
+- return 0;
+-}
+-
+-static void snd_rpi_boomberry_digi_shutdown(struct snd_pcm_substream *substream) {
+- /* turn off output */
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
+-}
+-
+-static int snd_rpi_boomberry_digi_hw_params(struct snd_pcm_substream *substream,
+- struct snd_pcm_hw_params *params)
+-{
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_dai *codec_dai = rtd->codec_dai;
+- struct snd_soc_codec *codec = rtd->codec;
+- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+-
+- int sysclk = 27000000; /* This is fixed on this board */
+-
+- long mclk_freq=0;
+- int mclk_div=1;
+- int sampling_freq=1;
+-
+- int ret;
+-
+- int samplerate = params_rate(params);
+-
+- if (samplerate<=96000) {
+- mclk_freq=samplerate*256;
+- mclk_div=WM8804_MCLKDIV_256FS;
+- } else {
+- mclk_freq=samplerate*128;
+- mclk_div=WM8804_MCLKDIV_128FS;
+- }
+-
+- switch (samplerate) {
+- case 32000:
+- sampling_freq=0x03;
+- break;
+- case 44100:
+- sampling_freq=0x00;
+- break;
+- case 48000:
+- sampling_freq=0x02;
+- break;
+- case 88200:
+- sampling_freq=0x08;
+- break;
+- case 96000:
+- sampling_freq=0x0a;
+- break;
+- case 176400:
+- sampling_freq=0x0c;
+- break;
+- case 192000:
+- sampling_freq=0x0e;
+- break;
+- default:
+- dev_err(codec->dev,
+- "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
+- samplerate);
+- }
+-
+- snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
+- snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
+-
+- ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
+- sysclk, SND_SOC_CLOCK_OUT);
+- if (ret < 0) {
+- dev_err(codec->dev,
+- "Failed to set WM8804 SYSCLK: %d\n", ret);
+- return ret;
+- }
+-
+- /* Enable TX output */
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
+-
+- /* Power on */
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
+-
+- /* set sampling frequency status bits */
+- snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
+-
+- return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
+-}
+-
+-/* machine stream operations */
+-static struct snd_soc_ops snd_rpi_boomberry_digi_ops = {
+- .hw_params = snd_rpi_boomberry_digi_hw_params,
+- .startup = snd_rpi_boomberry_digi_startup,
+- .shutdown = snd_rpi_boomberry_digi_shutdown,
+-};
+-
+-static struct snd_soc_dai_link snd_rpi_boomberry_digi_dai[] = {
+-{
+- .name = "BoomBerry Digi",
+- .stream_name = "BoomBerry Digi HiFi",
+- .cpu_dai_name = "bcm2708-i2s.0",
+- .codec_dai_name = "wm8804-spdif",
+- .platform_name = "bcm2708-i2s.0",
+- .codec_name = "wm8804.1-003b",
+- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
+- SND_SOC_DAIFMT_CBM_CFM,
+- .ops = &snd_rpi_boomberry_digi_ops,
+- .init = snd_rpi_boomberry_digi_init,
+-},
+-};
+-
+-/* audio machine driver */
+-static struct snd_soc_card snd_rpi_boomberry_digi = {
+- .name = "snd_rpi_boomberry_digi",
+- .owner = THIS_MODULE,
+- .dai_link = snd_rpi_boomberry_digi_dai,
+- .num_links = ARRAY_SIZE(snd_rpi_boomberry_digi_dai),
+-};
+-
+-static int snd_rpi_boomberry_digi_probe(struct platform_device *pdev)
+-{
+- int ret = 0;
+-
+- snd_rpi_boomberry_digi.dev = &pdev->dev;
+-
+- if (pdev->dev.of_node) {
+- struct device_node *i2s_node;
+- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_digi_dai[0];
+- i2s_node = of_parse_phandle(pdev->dev.of_node,
+- "i2s-controller", 0);
+-
+- if (i2s_node) {
+- dai->cpu_dai_name = NULL;
+- dai->cpu_of_node = i2s_node;
+- dai->platform_name = NULL;
+- dai->platform_of_node = i2s_node;
+- }
+- }
+-
+- ret = snd_soc_register_card(&snd_rpi_boomberry_digi);
+- if (ret)
+- dev_err(&pdev->dev,
+- "snd_soc_register_card() failed: %d\n", ret);
+-
+- return ret;
+-}
+-
+-static int snd_rpi_boomberry_digi_remove(struct platform_device *pdev)
+-{
+- return snd_soc_unregister_card(&snd_rpi_boomberry_digi);
+-}
+-
+-static const struct of_device_id snd_rpi_boomberry_digi_of_match[] = {
+- { .compatible = "boomberry,boomberry-digi", },
+- {},
+-};
+-MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_digi_of_match);
+-
+-static struct platform_driver snd_rpi_boomberry_digi_driver = {
+- .driver = {
+- .name = "snd-rpi-boomberry-digi",
+- .owner = THIS_MODULE,
+- .of_match_table = snd_rpi_boomberry_digi_of_match,
+- },
+- .probe = snd_rpi_boomberry_digi_probe,
+- .remove = snd_rpi_boomberry_digi_remove,
+-};
+-
+-module_platform_driver(snd_rpi_boomberry_digi_driver);
+-
+-MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
+-MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI Digi HAT Sound Card");
+-MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/sound/soc/bcm/justboom-dac.c
+@@ -0,0 +1,162 @@
++/*
++ * ASoC Driver for JustBoom DAC Raspberry Pi HAT Sound Card
++ *
++ * Author: Milan Neskovic
++ * Copyright 2016
++ * based on code by Daniel Matuschek <info@crazy-audio.com>
++ * based on code by Florian Meier <florian.meier@koalo.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++#include "../codecs/pcm512x.h"
++
++static bool digital_gain_0db_limit = true;
++
++static int snd_rpi_justboom_dac_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
++ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
++ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
++
++ if (digital_gain_0db_limit)
++ {
++ int ret;
++ struct snd_soc_card *card = rtd->card;
++
++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
++ if (ret < 0)
++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
++ }
++
++ return 0;
++}
++
++static int snd_rpi_justboom_dac_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++ /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
++ unsigned int sample_bits =
++ snd_pcm_format_physical_width(params_format(params));
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
++}
++
++static int snd_rpi_justboom_dac_startup(struct snd_pcm_substream *substream) {
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
++ return 0;
++}
++
++static void snd_rpi_justboom_dac_shutdown(struct snd_pcm_substream *substream) {
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_justboom_dac_ops = {
++ .hw_params = snd_rpi_justboom_dac_hw_params,
++ .startup = snd_rpi_justboom_dac_startup,
++ .shutdown = snd_rpi_justboom_dac_shutdown,
++};
++
++static struct snd_soc_dai_link snd_rpi_justboom_dac_dai[] = {
++{
++ .name = "JustBoom DAC",
++ .stream_name = "JustBoom DAC HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "pcm512x-hifi",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "pcm512x.1-004d",
++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBS_CFS,
++ .ops = &snd_rpi_justboom_dac_ops,
++ .init = snd_rpi_justboom_dac_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_justboom_dac = {
++ .name = "snd_rpi_justboom_dac",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_justboom_dac_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai),
++};
++
++static int snd_rpi_justboom_dac_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ snd_rpi_justboom_dac.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &snd_rpi_justboom_dac_dai[0];
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ digital_gain_0db_limit = !of_property_read_bool(
++ pdev->dev.of_node, "justboom,24db_digital_gain");
++ }
++
++ ret = snd_soc_register_card(&snd_rpi_justboom_dac);
++ if (ret)
++ dev_err(&pdev->dev,
++ "snd_soc_register_card() failed: %d\n", ret);
++
++ return ret;
++}
++
++static int snd_rpi_justboom_dac_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_justboom_dac);
++}
++
++static const struct of_device_id snd_rpi_justboom_dac_of_match[] = {
++ { .compatible = "justboom,justboom-dac", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_justboom_dac_of_match);
++
++static struct platform_driver snd_rpi_justboom_dac_driver = {
++ .driver = {
++ .name = "snd-rpi-justboom-dac",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_justboom_dac_of_match,
++ },
++ .probe = snd_rpi_justboom_dac_probe,
++ .remove = snd_rpi_justboom_dac_remove,
++};
++
++module_platform_driver(snd_rpi_justboom_dac_driver);
++
++MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
++MODULE_DESCRIPTION("ASoC Driver for JustBoom PI DAC HAT Sound Card");
++MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/sound/soc/bcm/justboom-digi.c
+@@ -0,0 +1,215 @@
++/*
++ * ASoC Driver for JustBoom Raspberry Pi Digi HAT Sound Card
++ *
++ * Author: Milan Neskovic
++ * Copyright 2016
++ * based on code by Daniel Matuschek <info@crazy-audio.com>
++ * based on code by Florian Meier <florian.meier@koalo.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++#include "../codecs/wm8804.h"
++
++static int snd_rpi_justboom_digi_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ return 0;
++}
++
++static int snd_rpi_justboom_digi_startup(struct snd_pcm_substream *substream) {
++ /* turn on digital output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
++ return 0;
++}
++
++static void snd_rpi_justboom_digi_shutdown(struct snd_pcm_substream *substream) {
++ /* turn off output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
++}
++
++static int snd_rpi_justboom_digi_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ int sysclk = 27000000; /* This is fixed on this board */
++
++ long mclk_freq=0;
++ int mclk_div=1;
++ int sampling_freq=1;
++
++ int ret;
++
++ int samplerate = params_rate(params);
++
++ if (samplerate<=96000) {
++ mclk_freq=samplerate*256;
++ mclk_div=WM8804_MCLKDIV_256FS;
++ } else {
++ mclk_freq=samplerate*128;
++ mclk_div=WM8804_MCLKDIV_128FS;
++ }
++
++ switch (samplerate) {
++ case 32000:
++ sampling_freq=0x03;
++ break;
++ case 44100:
++ sampling_freq=0x00;
++ break;
++ case 48000:
++ sampling_freq=0x02;
++ break;
++ case 88200:
++ sampling_freq=0x08;
++ break;
++ case 96000:
++ sampling_freq=0x0a;
++ break;
++ case 176400:
++ sampling_freq=0x0c;
++ break;
++ case 192000:
++ sampling_freq=0x0e;
++ break;
++ default:
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
++ samplerate);
++ }
++
++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
++ sysclk, SND_SOC_CLOCK_OUT);
++ if (ret < 0) {
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK: %d\n", ret);
++ return ret;
++ }
++
++ /* Enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ /* Power on */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
++
++ /* set sampling frequency status bits */
++ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_justboom_digi_ops = {
++ .hw_params = snd_rpi_justboom_digi_hw_params,
++ .startup = snd_rpi_justboom_digi_startup,
++ .shutdown = snd_rpi_justboom_digi_shutdown,
++};
++
++static struct snd_soc_dai_link snd_rpi_justboom_digi_dai[] = {
++{
++ .name = "JustBoom Digi",
++ .stream_name = "JustBoom Digi HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8804-spdif",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "wm8804.1-003b",
++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &snd_rpi_justboom_digi_ops,
++ .init = snd_rpi_justboom_digi_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_justboom_digi = {
++ .name = "snd_rpi_justboom_digi",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_justboom_digi_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_justboom_digi_dai),
++};
++
++static int snd_rpi_justboom_digi_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ snd_rpi_justboom_digi.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &snd_rpi_justboom_digi_dai[0];
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++ }
++
++ ret = snd_soc_register_card(&snd_rpi_justboom_digi);
++ if (ret)
++ dev_err(&pdev->dev,
++ "snd_soc_register_card() failed: %d\n", ret);
++
++ return ret;
++}
++
++static int snd_rpi_justboom_digi_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_justboom_digi);
++}
++
++static const struct of_device_id snd_rpi_justboom_digi_of_match[] = {
++ { .compatible = "justboom,justboom-digi", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_justboom_digi_of_match);
++
++static struct platform_driver snd_rpi_justboom_digi_driver = {
++ .driver = {
++ .name = "snd-rpi-justboom-digi",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_justboom_digi_of_match,
++ },
++ .probe = snd_rpi_justboom_digi_probe,
++ .remove = snd_rpi_justboom_digi_remove,
++};
++
++module_platform_driver(snd_rpi_justboom_digi_driver);
++
++MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
++MODULE_DESCRIPTION("ASoC Driver for JustBoom PI Digi HAT Sound Card");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 881972c61d00aa1b949e75eca9643c8f98b99b45 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 27 May 2016 18:23:51 +0100
-Subject: [PATCH 366/381] config: Add support for Logitech Rumblepad
-
----
- arch/arm/configs/bcm2709_defconfig | 4 ++++
- arch/arm/configs/bcmrpi_defconfig | 4 ++++
- 2 files changed, 8 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -896,6 +896,10 @@ CONFIG_HID_TWINHAN=m
- CONFIG_HID_KENSINGTON=m
- CONFIG_HID_LCPOWER=m
- CONFIG_HID_LOGITECH=m
-+CONFIG_HID_LOGITECH_DJ=m
-+CONFIG_LOGITECH_FF=y
-+CONFIG_LOGIRUMBLEPAD2_FF=y
-+CONFIG_LOGIG940_FF=y
- CONFIG_HID_MAGICMOUSE=m
- CONFIG_HID_MICROSOFT=m
- CONFIG_HID_MONTEREY=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -888,6 +888,10 @@ CONFIG_HID_TWINHAN=m
- CONFIG_HID_KENSINGTON=m
- CONFIG_HID_LCPOWER=m
- CONFIG_HID_LOGITECH=m
-+CONFIG_HID_LOGITECH_DJ=m
-+CONFIG_LOGITECH_FF=y
-+CONFIG_LOGIRUMBLEPAD2_FF=y
-+CONFIG_LOGIG940_FF=y
- CONFIG_HID_MAGICMOUSE=m
- CONFIG_HID_MICROSOFT=m
- CONFIG_HID_MONTEREY=m
+++ /dev/null
-From 3fb73fd6dd7fc8bb8d2b282de1856967d7af0099 Mon Sep 17 00:00:00 2001
-From: escalator2015 <jmtasende@gmail.com>
-Date: Tue, 24 May 2016 16:20:09 +0100
-Subject: [PATCH 367/381] New driver for RRA DigiDAC1 soundcard using WM8741 +
- WM8804
-
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 +
- .../overlays/rra-digidac1-wm8741-audio-overlay.dts | 81 ++++
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- sound/soc/bcm/Kconfig | 8 +
- sound/soc/bcm/Makefile | 2 +
- sound/soc/bcm/digidac1-soundcard.c | 422 +++++++++++++++++++++
- 8 files changed, 522 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
- create mode 100644 sound/soc/bcm/digidac1-soundcard.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -67,6 +67,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-display.d
- dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -842,6 +842,12 @@ Load: dtoverlay=rpi-sense
- Params: <None>
-
-
-+Name: rra-digidac1-wm8741-audio
-+Info: Configures the Red Rocks Audio DigiDAC1 soundcard
-+Load: dtoverlay=rra-digidac1-wm8741-audio
-+Params: <None>
-+
-+
- Name: sdhost
- Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
- N.B. This overlay is designed for situations where the mmc driver is
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
-@@ -0,0 +1,81 @@
-+// Definitions for RRA DigiDAC1 Audio card
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target-path = "/";
-+ __overlay__ {
-+ aliases {
-+ ldo0 = &ldo0;
-+ ldo1 = &ldo1;
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target-path = "/soc";
-+ __overlay__ {
-+
-+ ldo1: ldo1 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "DC_5V";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ regulator-always-on;
-+ };
-+
-+ ldo0: ldo0 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "DC_3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@3 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8804@3b {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8804";
-+ reg = <0x3b>;
-+ status = "okay";
-+ PVDD-supply = <&ldo0>;
-+ DVDD-supply = <&ldo0>;
-+ };
-+
-+ wm8742: wm8741@1a {
-+ compatible = "wlf,wm8741";
-+ reg = <0x1a>;
-+ status = "okay";
-+ AVDD-supply = <&ldo1>;
-+ DVDD-supply = <&ldo0>;
-+ };
-+ };
-+ };
-+
-+ fragment@4 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "rra,digidac1-soundcard";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -866,6 +866,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
-+CONFIG_SND_DIGIDAC1_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -858,6 +858,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
-+CONFIG_SND_DIGIDAC1_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -92,3 +92,11 @@ config SND_AUDIOINJECTOR_PI_SOUNDCARD
- select SND_SOC_WM8731
- help
- Say Y or M if you want to add support for audioinjector.net Pi Hat
-+
-+config SND_DIGIDAC1_SOUNDCARD
-+ tristate "Support for Red Rocks Audio DigiDAC1"
-+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
-+ select SND_SOC_WM8804
-+ select SND_SOC_WM8741
-+ help
-+ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -16,6 +16,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
- snd-soc-raspidac3-objs := raspidac3.o
- snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
-+snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
-
- obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
-@@ -29,4 +30,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO)
- obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
- obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
-+obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
-
---- /dev/null
-+++ b/sound/soc/bcm/digidac1-soundcard.c
-@@ -0,0 +1,422 @@
-+/*
-+ * ASoC Driver for RRA DigiDAC1
-+ * Copyright 2016
-+ * Author: José M. Tasende <vintage@redrocksaudio.es>
-+ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
-+ * and the Wolfson card driver by Nikesh Oswal, <Nikesh.Oswal@wolfsonmicro.com>
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/i2c.h>
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+#include <sound/soc-dapm.h>
-+#include <sound/tlv.h>
-+#include <linux/regulator/consumer.h>
-+
-+#include "../codecs/wm8804.h"
-+#include "../codecs/wm8741.h"
-+
-+#define WM8741_NUM_SUPPLIES 2
-+
-+/* codec private data */
-+struct wm8741_priv {
-+ struct wm8741_platform_data pdata;
-+ struct regmap *regmap;
-+ struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
-+ unsigned int sysclk;
-+ const struct snd_pcm_hw_constraint_list *sysclk_constraints;
-+};
-+
-+static int samplerate = 44100;
-+
-+/* New Alsa Controls not exposed by original wm8741 codec driver */
-+/* in actual driver the att. adjustment is wrong because */
-+/* this DAC has a coarse attenuation register with 4dB steps */
-+/* and a fine level register with 0.125dB steps */
-+/* each register has 32 steps so combining both we have 1024 steps */
-+/* of 0.125 dB. */
-+/* The original level controls from driver are removed at startup */
-+/* and replaced by the corrected ones. */
-+/* The same wm8741 driver can be used for wm8741 and wm8742 devices */
-+
-+static const DECLARE_TLV_DB_SCALE(dac_tlv_fine, 0, 13, 0);
-+static const DECLARE_TLV_DB_SCALE(dac_tlv_coarse, -12700, 400, 1);
-+static const char *w8741_dither[4] = {"Off", "RPDF", "TPDF", "HPDF"};
-+static const char *w8741_filter[5] = {
-+ "Type 1", "Type 2", "Type 3", "Type 4", "Type 5"};
-+static const char *w8741_switch[2] = {"Off", "On"};
-+static const struct soc_enum w8741_enum[] = {
-+SOC_ENUM_SINGLE(WM8741_MODE_CONTROL_2, 0, 4, w8741_dither),/* dithering type */
-+SOC_ENUM_SINGLE(WM8741_FILTER_CONTROL, 0, 5, w8741_filter),/* filter type */
-+SOC_ENUM_SINGLE(WM8741_FORMAT_CONTROL, 6, 2, w8741_switch),/* phase invert */
-+SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 0, 2, w8741_switch),/* volume ramp */
-+SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 3, 2, w8741_switch),/* soft mute */
-+};
-+
-+static const struct snd_kcontrol_new w8741_snd_controls_stereo[] = {
-+SOC_DOUBLE_R_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
-+ WM8741_DACRLSB_ATTENUATION, 0, 31, 1, dac_tlv_fine),
-+SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
-+ WM8741_DACRMSB_ATTENUATION, 0, 31, 1, dac_tlv_coarse),
-+SOC_ENUM("DAC Dither", w8741_enum[0]),
-+SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
-+SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
-+SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
-+SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
-+};
-+
-+static const struct snd_kcontrol_new w8741_snd_controls_mono_left[] = {
-+SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
-+ 0, 31, 0, dac_tlv_fine),
-+SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
-+ 0, 31, 1, dac_tlv_coarse),
-+SOC_ENUM("DAC Dither", w8741_enum[0]),
-+SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
-+SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
-+SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
-+SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
-+};
-+
-+static const struct snd_kcontrol_new w8741_snd_controls_mono_right[] = {
-+SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACRLSB_ATTENUATION,
-+ 0, 31, 0, dac_tlv_fine),
-+SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACRMSB_ATTENUATION,
-+ 0, 31, 1, dac_tlv_coarse),
-+SOC_ENUM("DAC Dither", w8741_enum[0]),
-+SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
-+SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
-+SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
-+SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
-+};
-+
-+static int w8741_add_controls(struct snd_soc_codec *codec)
-+{
-+ struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
-+
-+ switch (wm8741->pdata.diff_mode) {
-+ case WM8741_DIFF_MODE_STEREO:
-+ case WM8741_DIFF_MODE_STEREO_REVERSED:
-+ snd_soc_add_codec_controls(codec,
-+ w8741_snd_controls_stereo,
-+ ARRAY_SIZE(w8741_snd_controls_stereo));
-+ break;
-+ case WM8741_DIFF_MODE_MONO_LEFT:
-+ snd_soc_add_codec_controls(codec,
-+ w8741_snd_controls_mono_left,
-+ ARRAY_SIZE(w8741_snd_controls_mono_left));
-+ break;
-+ case WM8741_DIFF_MODE_MONO_RIGHT:
-+ snd_soc_add_codec_controls(codec,
-+ w8741_snd_controls_mono_right,
-+ ARRAY_SIZE(w8741_snd_controls_mono_right));
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+static int digidac1_soundcard_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_card *card = rtd->card;
-+ struct snd_soc_pcm_runtime *wm8741_rtd;
-+ struct snd_soc_codec *wm8741_codec;
-+ struct snd_card *sound_card = card->snd_card;
-+ struct snd_kcontrol *kctl;
-+ int ret;
-+
-+ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
-+ if (!wm8741_rtd) {
-+ dev_warn(card->dev, "digidac1_soundcard_init: couldn't get wm8741 rtd\n");
-+ return -EFAULT;
-+ }
-+ wm8741_codec = wm8741_rtd->codec;
-+ ret = w8741_add_controls(wm8741_codec);
-+ if (ret < 0)
-+ dev_warn(card->dev, "Failed to add new wm8741 controls: %d\n",
-+ ret);
-+
-+ /* enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ kctl = snd_soc_card_get_kcontrol(card,
-+ "Playback Volume");
-+ if (kctl) {
-+ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
-+ snd_ctl_remove(sound_card, kctl);
-+ }
-+ kctl = snd_soc_card_get_kcontrol(card,
-+ "Fine Playback Volume");
-+ if (kctl) {
-+ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
-+ snd_ctl_remove(sound_card, kctl);
-+ }
-+ return 0;
-+}
-+
-+static int digidac1_soundcard_startup(struct snd_pcm_substream *substream)
-+{
-+ /* turn on wm8804 digital output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_card *card = rtd->card;
-+ struct snd_soc_pcm_runtime *wm8741_rtd;
-+ struct snd_soc_codec *wm8741_codec;
-+
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-+ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
-+ if (!wm8741_rtd) {
-+ dev_warn(card->dev, "digidac1_soundcard_startup: couldn't get WM8741 rtd\n");
-+ return -EFAULT;
-+ }
-+ wm8741_codec = wm8741_rtd->codec;
-+
-+ /* latch wm8741 level */
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACLLSB_ATTENUATION,
-+ WM8741_UPDATELL, WM8741_UPDATELL);
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACLMSB_ATTENUATION,
-+ WM8741_UPDATELM, WM8741_UPDATELM);
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACRLSB_ATTENUATION,
-+ WM8741_UPDATERL, WM8741_UPDATERL);
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACRMSB_ATTENUATION,
-+ WM8741_UPDATERM, WM8741_UPDATERM);
-+
-+ return 0;
-+}
-+
-+static void digidac1_soundcard_shutdown(struct snd_pcm_substream *substream)
-+{
-+ /* turn off wm8804 digital output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
-+}
-+
-+static int digidac1_soundcard_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+ struct snd_soc_card *card = rtd->card;
-+ struct snd_soc_pcm_runtime *wm8741_rtd;
-+ struct snd_soc_codec *wm8741_codec;
-+
-+ int sysclk = 27000000;
-+ long mclk_freq = 0;
-+ int mclk_div = 1;
-+ int sampling_freq = 1;
-+ int ret;
-+
-+ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
-+ if (!wm8741_rtd) {
-+ dev_warn(card->dev, "digidac1_soundcard_hw_params: couldn't get WM8741 rtd\n");
-+ return -EFAULT;
-+ }
-+ wm8741_codec = wm8741_rtd->codec;
-+ samplerate = params_rate(params);
-+
-+ if (samplerate <= 96000) {
-+ mclk_freq = samplerate*256;
-+ mclk_div = WM8804_MCLKDIV_256FS;
-+ } else {
-+ mclk_freq = samplerate*128;
-+ mclk_div = WM8804_MCLKDIV_128FS;
-+ }
-+
-+ switch (samplerate) {
-+ case 32000:
-+ sampling_freq = 0x03;
-+ break;
-+ case 44100:
-+ sampling_freq = 0x00;
-+ break;
-+ case 48000:
-+ sampling_freq = 0x02;
-+ break;
-+ case 88200:
-+ sampling_freq = 0x08;
-+ break;
-+ case 96000:
-+ sampling_freq = 0x0a;
-+ break;
-+ case 176400:
-+ sampling_freq = 0x0c;
-+ break;
-+ case 192000:
-+ sampling_freq = 0x0e;
-+ break;
-+ default:
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-+ samplerate);
-+ }
-+
-+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
-+
-+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-+ sysclk, SND_SOC_CLOCK_OUT);
-+ if (ret < 0) {
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK: %d\n", ret);
-+ return ret;
-+ }
-+ /* Enable wm8804 TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ /* wm8804 Power on */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
-+
-+ /* wm8804 set sampling frequency status bits */
-+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
-+
-+ /* Now update wm8741 registers for the correct oversampling */
-+ if (samplerate <= 48000)
-+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
-+ WM8741_OSR_MASK, 0x00);
-+ else if (samplerate <= 96000)
-+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
-+ WM8741_OSR_MASK, 0x20);
-+ else
-+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
-+ WM8741_OSR_MASK, 0x40);
-+
-+ /* wm8741 bit size */
-+ switch (params_width(params)) {
-+ case 16:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x00);
-+ break;
-+ case 20:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x01);
-+ break;
-+ case 24:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x02);
-+ break;
-+ case 32:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x03);
-+ break;
-+ default:
-+ dev_dbg(codec->dev, "wm8741_hw_params: Unsupported bit size param = %d",
-+ params_width(params));
-+ return -EINVAL;
-+ }
-+
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
-+}
-+/* machine stream operations */
-+static struct snd_soc_ops digidac1_soundcard_ops = {
-+ .hw_params = digidac1_soundcard_hw_params,
-+ .startup = digidac1_soundcard_startup,
-+ .shutdown = digidac1_soundcard_shutdown,
-+};
-+
-+static struct snd_soc_dai_link digidac1_soundcard_dai[] = {
-+ {
-+ .name = "RRA DigiDAC1",
-+ .stream_name = "RRA DigiDAC1 HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "wm8804-spdif",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "wm8804.1-003b",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBM_CFM,
-+ .ops = &digidac1_soundcard_ops,
-+ .init = digidac1_soundcard_init,
-+ },
-+ {
-+ .name = "RRA DigiDAC11",
-+ .stream_name = "RRA DigiDAC11 HiFi",
-+ .cpu_dai_name = "wm8804-spdif",
-+ .codec_dai_name = "wm8741",
-+ .codec_name = "wm8741.1-001a",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S
-+ | SND_SOC_DAIFMT_NB_NF
-+ | SND_SOC_DAIFMT_CBS_CFS,
-+ },
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card digidac1_soundcard = {
-+ .name = "digidac1-soundcard",
-+ .owner = THIS_MODULE,
-+ .dai_link = digidac1_soundcard_dai,
-+ .num_links = ARRAY_SIZE(digidac1_soundcard_dai),
-+};
-+
-+static int digidac1_soundcard_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ digidac1_soundcard.dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &digidac1_soundcard_dai[0];
-+
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+ }
-+
-+ ret = snd_soc_register_card(&digidac1_soundcard);
-+ if (ret)
-+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
-+ ret);
-+
-+ return ret;
-+}
-+
-+static int digidac1_soundcard_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&digidac1_soundcard);
-+}
-+
-+static const struct of_device_id digidac1_soundcard_of_match[] = {
-+ { .compatible = "rra,digidac1-soundcard", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, digidac1_soundcard_of_match);
-+
-+static struct platform_driver digidac1_soundcard_driver = {
-+ .driver = {
-+ .name = "digidac1-audio",
-+ .owner = THIS_MODULE,
-+ .of_match_table = digidac1_soundcard_of_match,
-+ },
-+ .probe = digidac1_soundcard_probe,
-+ .remove = digidac1_soundcard_remove,
-+};
-+
-+module_platform_driver(digidac1_soundcard_driver);
-+
-+MODULE_AUTHOR("José M. Tasende <vintage@redrocksaudio.es>");
-+MODULE_DESCRIPTION("ASoC Driver for RRA DigiDAC1");
-+MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 34193c64b66da53cf36bec310fc4b660912847e1 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <6by9@users.noreply.github.com>
-Date: Wed, 25 May 2016 23:25:36 +0100
-Subject: [PATCH 368/381] BCM2835-V4L2: Correct handling for BGR24 vs RGB24.
-
-There was a bug in the GPU firmware that had reversed these
-two formats.
-Detect the old firmware, and reverse the formats if necessary.
-
-Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 69 ++++++++++++++++++-------
- drivers/media/platform/bcm2835/bcm2835-camera.h | 1 +
- 2 files changed, 52 insertions(+), 18 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -115,7 +115,7 @@ static struct mmal_fmt formats[] = {
- .name = "RGB24 (LE)",
- .fourcc = V4L2_PIX_FMT_RGB24,
- .flags = 0,
-- .mmal = MMAL_ENCODING_BGR24,
-+ .mmal = MMAL_ENCODING_RGB24,
- .depth = 24,
- .mmal_component = MMAL_COMPONENT_CAMERA,
- .ybbp = 3,
-@@ -187,7 +187,7 @@ static struct mmal_fmt formats[] = {
- .name = "RGB24 (BE)",
- .fourcc = V4L2_PIX_FMT_BGR24,
- .flags = 0,
-- .mmal = MMAL_ENCODING_RGB24,
-+ .mmal = MMAL_ENCODING_BGR24,
- .depth = 24,
- .mmal_component = MMAL_COMPONENT_CAMERA,
- .ybbp = 3,
-@@ -1059,6 +1059,13 @@ static int mmal_setup_components(struct
- else
- camera_port->format.encoding = mfmt->mmal;
-
-+ if (dev->rgb_bgr_swapped) {
-+ if (camera_port->format.encoding == MMAL_ENCODING_RGB24)
-+ camera_port->format.encoding = MMAL_ENCODING_BGR24;
-+ else if (camera_port->format.encoding == MMAL_ENCODING_BGR24)
-+ camera_port->format.encoding = MMAL_ENCODING_RGB24;
-+ }
-+
- camera_port->format.encoding_variant = 0;
- camera_port->es.video.width = f->fmt.pix.width;
- camera_port->es.video.height = f->fmt.pix.height;
-@@ -1569,12 +1576,17 @@ static int set_camera_parameters(struct
- return ret;
- }
-
-+#define MAX_SUPPORTED_ENCODINGS 20
-+
- /* MMAL instance and component init */
- static int __init mmal_init(struct bm2835_mmal_dev *dev)
- {
- int ret;
- struct mmal_es_format *format;
- u32 bool_true = 1;
-+ u32 supported_encodings[MAX_SUPPORTED_ENCODINGS];
-+ int param_size;
-+ struct vchiq_mmal_component *camera;
-
- ret = vchiq_mmal_init(&dev->instance);
- if (ret < 0)
-@@ -1586,21 +1598,48 @@ static int __init mmal_init(struct bm283
- if (ret < 0)
- goto unreg_mmal;
-
-- if (dev->component[MMAL_COMPONENT_CAMERA]->outputs <
-- MMAL_CAMERA_PORT_COUNT) {
-+ camera = dev->component[MMAL_COMPONENT_CAMERA];
-+ if (camera->outputs < MMAL_CAMERA_PORT_COUNT) {
- ret = -EINVAL;
- goto unreg_camera;
- }
-
- ret = set_camera_parameters(dev->instance,
-- dev->component[MMAL_COMPONENT_CAMERA],
-+ camera,
- dev);
- if (ret < 0)
- goto unreg_camera;
-
-- format =
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_PREVIEW].format;
-+ /* There was an error in the firmware that meant the camera component
-+ * produced BGR instead of RGB.
-+ * This is now fixed, but in order to support the old firmwares, we
-+ * have to check.
-+ */
-+ dev->rgb_bgr_swapped = true;
-+ param_size = sizeof(supported_encodings);
-+ ret = vchiq_mmal_port_parameter_get(dev->instance,
-+ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
-+ MMAL_PARAMETER_SUPPORTED_ENCODINGS,
-+ &supported_encodings,
-+ ¶m_size);
-+ if (ret == 0) {
-+ int i;
-+
-+ for (i = 0; i < param_size/sizeof(u32); i++) {
-+ if (supported_encodings[i] == MMAL_ENCODING_BGR24) {
-+ /* Found BGR24 first - old firmware. */
-+ break;
-+ }
-+ if (supported_encodings[i] == MMAL_ENCODING_RGB24) {
-+ /* Found RGB24 first
-+ * new firmware, so use RGB24.
-+ */
-+ dev->rgb_bgr_swapped = false;
-+ break;
-+ }
-+ }
-+ }
-+ format = &camera->output[MMAL_CAMERA_PORT_PREVIEW].format;
-
- format->encoding = MMAL_ENCODING_OPAQUE;
- format->encoding_variant = MMAL_ENCODING_I420;
-@@ -1614,9 +1653,7 @@ static int __init mmal_init(struct bm283
- format->es->video.frame_rate.num = 0; /* Rely on fps_range */
- format->es->video.frame_rate.den = 1;
-
-- format =
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_VIDEO].format;
-+ format = &camera->output[MMAL_CAMERA_PORT_VIDEO].format;
-
- format->encoding = MMAL_ENCODING_OPAQUE;
- format->encoding_variant = MMAL_ENCODING_I420;
-@@ -1631,14 +1668,11 @@ static int __init mmal_init(struct bm283
- format->es->video.frame_rate.den = 1;
-
- vchiq_mmal_port_parameter_set(dev->instance,
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_VIDEO],
-+ &camera->output[MMAL_CAMERA_PORT_VIDEO],
- MMAL_PARAMETER_NO_IMAGE_PADDING,
- &bool_true, sizeof(bool_true));
-
-- format =
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_CAPTURE].format;
-+ format = &camera->output[MMAL_CAMERA_PORT_CAPTURE].format;
-
- format->encoding = MMAL_ENCODING_OPAQUE;
-
-@@ -1660,8 +1694,7 @@ static int __init mmal_init(struct bm283
- dev->capture.enc_level = V4L2_MPEG_VIDEO_H264_LEVEL_4_0;
-
- vchiq_mmal_port_parameter_set(dev->instance,
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_CAPTURE],
-+ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
- MMAL_PARAMETER_NO_IMAGE_PADDING,
- &bool_true, sizeof(bool_true));
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.h
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.h
-@@ -109,6 +109,7 @@ struct bm2835_mmal_dev {
- unsigned int camera_num;
- unsigned int max_width;
- unsigned int max_height;
-+ unsigned int rgb_bgr_swapped;
- };
-
- int bm2835_mmal_init_controls(
--- /dev/null
+From e4183dfba92b3adf88a9be7e073cf80c5bda2c69 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Sun, 29 May 2016 05:22:29 +0100
+Subject: [PATCH 369/423] Add dt param to force HiFiBerry DAC+ Pro into slave
+ mode
+
+"dtoverlay=hifiberry-dacplus,slave"
+
+Add 'slave' param to use HiFiBerry DAC+ Pro in slave mode,
+with Pi as master for bit and frame clock.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/README | 2 ++
+ arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 6 ++++--
+ sound/soc/bcm/hifiberry_dacplus.c | 10 ++++++++--
+ 3 files changed, 14 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -344,6 +344,8 @@ Params: 24db_digital_gain Allow ga
+ responsibility of the user to ensure that
+ the Digital volume control is set to a value
+ that does not result in clipping/distortion!)
++ slave Force DAC+ Pro into slave mode, using Pi as
++ master for bit clock and frame clock.
+
+
+ Name: hifiberry-digi
+--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
+@@ -41,7 +41,7 @@
+
+ fragment@3 {
+ target = <&sound>;
+- frag3: __overlay__ {
++ hifiberry_dacplus: __overlay__ {
+ compatible = "hifiberry,hifiberry-dacplus";
+ i2s-controller = <&i2s>;
+ status = "okay";
+@@ -49,6 +49,8 @@
+ };
+
+ __overrides__ {
+- 24db_digital_gain = <&frag3>,"hifiberry,24db_digital_gain?";
++ 24db_digital_gain =
++ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
++ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
+ };
+ };
+--- a/sound/soc/bcm/hifiberry_dacplus.c
++++ b/sound/soc/bcm/hifiberry_dacplus.c
+@@ -47,6 +47,7 @@ struct pcm512x_priv {
+ /* Clock rate of CLK48EN attached to GPIO3 pin */
+ #define CLK_48EN_RATE 24576000UL
+
++static bool slave;
+ static bool snd_rpi_hifiberry_is_dacpro;
+ static bool digital_gain_0db_limit = true;
+
+@@ -145,8 +146,11 @@ static int snd_rpi_hifiberry_dacplus_ini
+ struct snd_soc_codec *codec = rtd->codec;
+ struct pcm512x_priv *priv;
+
+- snd_rpi_hifiberry_is_dacpro
+- = snd_rpi_hifiberry_dacplus_is_pro_card(codec);
++ if (slave)
++ snd_rpi_hifiberry_is_dacpro = false;
++ else
++ snd_rpi_hifiberry_is_dacpro =
++ snd_rpi_hifiberry_dacplus_is_pro_card(codec);
+
+ if (snd_rpi_hifiberry_is_dacpro) {
+ struct snd_soc_dai_link *dai = rtd->dai_link;
+@@ -314,6 +318,8 @@ static int snd_rpi_hifiberry_dacplus_pro
+
+ digital_gain_0db_limit = !of_property_read_bool(
+ pdev->dev.of_node, "hifiberry,24db_digital_gain");
++ slave = of_property_read_bool(pdev->dev.of_node,
++ "hifiberry-dacplus,slave");
+ }
+
+ ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplus);
+++ /dev/null
-From a71a54f2a42f4df6bf5094ed3df019b8813d2426 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 3 Jun 2016 22:21:47 +0100
-Subject: [PATCH 369/381] BCM270X_DT: Add mcp23017 to the overlay Makefile
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -44,6 +44,7 @@ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacpl
- dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
+++ /dev/null
-From 30c48dc447e8c678fd7db6bdc0b09c46bf18c155 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 3 Jun 2016 23:01:01 +0100
-Subject: [PATCH 370/381] BCM270X_DT: Sort entries to placate check script
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -18,10 +18,10 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += enc28j60.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += gpio-ir.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += gpio-poweroff.dtbo
-@@ -31,10 +31,10 @@ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dac
- dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-mux.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31.dtbo
-@@ -73,16 +73,16 @@ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdtweak.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi2-1cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi2-2cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi2-3cs.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += tinylcd35.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += uart1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += vc4-kms-v3d.dtbo
--- /dev/null
+From b035bb68499b1b100f3f06c76fc1ad7f10953f19 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Thu, 19 May 2016 00:00:00 +0100
+Subject: [PATCH 370/423] simple: add sound-dai-cells to I2S def
+
+Add '#sound-dai-cells = <0>;' to the I2S definition in
+bcm2708_common.dtsi
+
+Not having it specified, whilst not causing an issue right now with
+rpi-4.4.y, is going to cause an issue going forward with the use of
+simple-card driver. So it doesn't fall through the cracks, patch it
+in now.
+
+Hopefully Martin has taken care of getting a patch submitted for the
+upstream Pi dts, as it was he who first run into the issue with the
+current upstream kernel....
+https://github.com/msperl/linux-rpi/issues/3#issue-154916615
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -137,6 +137,7 @@
+
+ i2s: i2s@7e203000 {
+ compatible = "brcm,bcm2835-i2s";
++ #sound-dai-cells = <0>;
+ reg = <0x7e203000 0x24>,
+ <0x7e101098 0x08>;
+
--- /dev/null
+From 85e7cbd400714fff019db2d1ec7eb500a6bbc0ba Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <6by9@users.noreply.github.com>
+Date: Tue, 31 May 2016 10:38:31 +0100
+Subject: [PATCH 371/423] BCM2835-V4L2: Increase minimum resolution to 32x32
+
+https://github.com/raspberrypi/linux/issues/1498 showed
+up that 16x16 is failing to work on the GPU for some reason.
+
+GPU bug being tracked on
+https://github.com/raspberrypi/firmware/issues/607
+Workaround here by increasing minimum resolution via V4L2
+to 32x32.
+
+Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -36,8 +36,8 @@
+
+ #define BM2835_MMAL_VERSION "0.0.2"
+ #define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2"
+-#define MIN_WIDTH 16
+-#define MIN_HEIGHT 16
++#define MIN_WIDTH 32
++#define MIN_HEIGHT 32
+ #define MIN_BUFFER_SIZE (80*1024)
+
+ #define MAX_VIDEO_MODE_WIDTH 1280
+++ /dev/null
-From 20ef0358f5d9c9a63ee3a62301a366315c503bd1 Mon Sep 17 00:00:00 2001
-From: Matthias Reichl <hias@horus.com>
-Date: Sat, 4 Jun 2016 11:30:48 +0200
-Subject: [PATCH 371/381] gpio-ir overlay: gpio_pin shouldn't change pull
- setting
-
-Signed-off-by: Matthias Reichl <hias@horus.com>
----
- arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
-@@ -36,8 +36,7 @@
- __overrides__ {
- // parameters
- gpio_pin = <&gpio_ir>,"gpios:4",
-- <&gpio_ir_pins>,"brcm,pins:0",
-- <&gpio_ir_pins>,"brcm,pull:0"; // pin number
-+ <&gpio_ir_pins>,"brcm,pins:0"; // pin number
- gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
-
- rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
--- /dev/null
+From f141b0d59a1cc6783462e3b0656527a12e63be4a Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 27 May 2016 18:23:51 +0100
+Subject: [PATCH 372/423] config: Add support for Logitech Rumblepad
+
+---
+ arch/arm/configs/bcm2709_defconfig | 4 ++++
+ arch/arm/configs/bcmrpi_defconfig | 4 ++++
+ 2 files changed, 8 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -896,6 +896,10 @@ CONFIG_HID_TWINHAN=m
+ CONFIG_HID_KENSINGTON=m
+ CONFIG_HID_LCPOWER=m
+ CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
+ CONFIG_HID_MAGICMOUSE=m
+ CONFIG_HID_MICROSOFT=m
+ CONFIG_HID_MONTEREY=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -888,6 +888,10 @@ CONFIG_HID_TWINHAN=m
+ CONFIG_HID_KENSINGTON=m
+ CONFIG_HID_LCPOWER=m
+ CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
+ CONFIG_HID_MAGICMOUSE=m
+ CONFIG_HID_MICROSOFT=m
+ CONFIG_HID_MONTEREY=m
+++ /dev/null
-From 3abeeb47bad351f535efdf176cd623ac8ff7cfe3 Mon Sep 17 00:00:00 2001
-From: Eric Nelson <eric@nelint.com>
-Date: Sat, 3 Oct 2015 08:18:50 -0700
-Subject: [PATCH 372/381] [media] rc-core: define a default timeout for drivers
-
-A default timeout value of 125 ms should work for all decoders.
-
-Declare a constant to help standardize its' use.
-
-Signed-off-by: Eric Nelson <eric@nelint.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- include/media/rc-core.h | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/include/media/rc-core.h
-+++ b/include/media/rc-core.h
-@@ -239,6 +239,7 @@ static inline void init_ir_raw_event(str
- memset(ev, 0, sizeof(*ev));
- }
-
-+#define IR_DEFAULT_TIMEOUT MS_TO_NS(125)
- #define IR_MAX_DURATION 500000000 /* 500 ms */
- #define US_TO_NS(usec) ((usec) * 1000)
- #define MS_TO_US(msec) ((msec) * 1000)
--- /dev/null
+From 4e543fbd917ecbc07317afa418341bde1c0569b6 Mon Sep 17 00:00:00 2001
+From: escalator2015 <jmtasende@gmail.com>
+Date: Tue, 24 May 2016 16:20:09 +0100
+Subject: [PATCH 373/423] New driver for RRA DigiDAC1 soundcard using WM8741 +
+ WM8804
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +
+ .../overlays/rra-digidac1-wm8741-audio-overlay.dts | 81 ++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 8 +
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/digidac1-soundcard.c | 422 +++++++++++++++++++++
+ 8 files changed, 522 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
+ create mode 100644 sound/soc/bcm/digidac1-soundcard.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -67,6 +67,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-display.d
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -842,6 +842,12 @@ Load: dtoverlay=rpi-sense
+ Params: <None>
+
+
++Name: rra-digidac1-wm8741-audio
++Info: Configures the Red Rocks Audio DigiDAC1 soundcard
++Load: dtoverlay=rra-digidac1-wm8741-audio
++Params: <None>
++
++
+ Name: sdhost
+ Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
+ N.B. This overlay is designed for situations where the mmc driver is
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
+@@ -0,0 +1,81 @@
++// Definitions for RRA DigiDAC1 Audio card
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target-path = "/";
++ __overlay__ {
++ aliases {
++ ldo0 = &ldo0;
++ ldo1 = &ldo1;
++ };
++ };
++ };
++
++ fragment@1 {
++ target-path = "/soc";
++ __overlay__ {
++
++ ldo1: ldo1 {
++ compatible = "regulator-fixed";
++ regulator-name = "DC_5V";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-always-on;
++ };
++
++ ldo0: ldo0 {
++ compatible = "regulator-fixed";
++ regulator-name = "DC_3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@3 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ PVDD-supply = <&ldo0>;
++ DVDD-supply = <&ldo0>;
++ };
++
++ wm8742: wm8741@1a {
++ compatible = "wlf,wm8741";
++ reg = <0x1a>;
++ status = "okay";
++ AVDD-supply = <&ldo1>;
++ DVDD-supply = <&ldo0>;
++ };
++ };
++ };
++
++ fragment@4 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rra,digidac1-soundcard";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -866,6 +866,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -858,6 +858,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -92,3 +92,11 @@ config SND_AUDIOINJECTOR_PI_SOUNDCARD
+ select SND_SOC_WM8731
+ help
+ Say Y or M if you want to add support for audioinjector.net Pi Hat
++
++config SND_DIGIDAC1_SOUNDCARD
++ tristate "Support for Red Rocks Audio DigiDAC1"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_WM8804
++ select SND_SOC_WM8741
++ help
++ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -16,6 +16,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
+ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
++snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -29,4 +30,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO)
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
++obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+
+--- /dev/null
++++ b/sound/soc/bcm/digidac1-soundcard.c
+@@ -0,0 +1,422 @@
++/*
++ * ASoC Driver for RRA DigiDAC1
++ * Copyright 2016
++ * Author: José M. Tasende <vintage@redrocksaudio.es>
++ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
++ * and the Wolfson card driver by Nikesh Oswal, <Nikesh.Oswal@wolfsonmicro.com>
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/i2c.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++#include <sound/soc-dapm.h>
++#include <sound/tlv.h>
++#include <linux/regulator/consumer.h>
++
++#include "../codecs/wm8804.h"
++#include "../codecs/wm8741.h"
++
++#define WM8741_NUM_SUPPLIES 2
++
++/* codec private data */
++struct wm8741_priv {
++ struct wm8741_platform_data pdata;
++ struct regmap *regmap;
++ struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
++ unsigned int sysclk;
++ const struct snd_pcm_hw_constraint_list *sysclk_constraints;
++};
++
++static int samplerate = 44100;
++
++/* New Alsa Controls not exposed by original wm8741 codec driver */
++/* in actual driver the att. adjustment is wrong because */
++/* this DAC has a coarse attenuation register with 4dB steps */
++/* and a fine level register with 0.125dB steps */
++/* each register has 32 steps so combining both we have 1024 steps */
++/* of 0.125 dB. */
++/* The original level controls from driver are removed at startup */
++/* and replaced by the corrected ones. */
++/* The same wm8741 driver can be used for wm8741 and wm8742 devices */
++
++static const DECLARE_TLV_DB_SCALE(dac_tlv_fine, 0, 13, 0);
++static const DECLARE_TLV_DB_SCALE(dac_tlv_coarse, -12700, 400, 1);
++static const char *w8741_dither[4] = {"Off", "RPDF", "TPDF", "HPDF"};
++static const char *w8741_filter[5] = {
++ "Type 1", "Type 2", "Type 3", "Type 4", "Type 5"};
++static const char *w8741_switch[2] = {"Off", "On"};
++static const struct soc_enum w8741_enum[] = {
++SOC_ENUM_SINGLE(WM8741_MODE_CONTROL_2, 0, 4, w8741_dither),/* dithering type */
++SOC_ENUM_SINGLE(WM8741_FILTER_CONTROL, 0, 5, w8741_filter),/* filter type */
++SOC_ENUM_SINGLE(WM8741_FORMAT_CONTROL, 6, 2, w8741_switch),/* phase invert */
++SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 0, 2, w8741_switch),/* volume ramp */
++SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 3, 2, w8741_switch),/* soft mute */
++};
++
++static const struct snd_kcontrol_new w8741_snd_controls_stereo[] = {
++SOC_DOUBLE_R_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
++ WM8741_DACRLSB_ATTENUATION, 0, 31, 1, dac_tlv_fine),
++SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
++ WM8741_DACRMSB_ATTENUATION, 0, 31, 1, dac_tlv_coarse),
++SOC_ENUM("DAC Dither", w8741_enum[0]),
++SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
++SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
++SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
++SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
++};
++
++static const struct snd_kcontrol_new w8741_snd_controls_mono_left[] = {
++SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
++ 0, 31, 0, dac_tlv_fine),
++SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
++ 0, 31, 1, dac_tlv_coarse),
++SOC_ENUM("DAC Dither", w8741_enum[0]),
++SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
++SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
++SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
++SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
++};
++
++static const struct snd_kcontrol_new w8741_snd_controls_mono_right[] = {
++SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACRLSB_ATTENUATION,
++ 0, 31, 0, dac_tlv_fine),
++SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACRMSB_ATTENUATION,
++ 0, 31, 1, dac_tlv_coarse),
++SOC_ENUM("DAC Dither", w8741_enum[0]),
++SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
++SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
++SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
++SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
++};
++
++static int w8741_add_controls(struct snd_soc_codec *codec)
++{
++ struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
++
++ switch (wm8741->pdata.diff_mode) {
++ case WM8741_DIFF_MODE_STEREO:
++ case WM8741_DIFF_MODE_STEREO_REVERSED:
++ snd_soc_add_codec_controls(codec,
++ w8741_snd_controls_stereo,
++ ARRAY_SIZE(w8741_snd_controls_stereo));
++ break;
++ case WM8741_DIFF_MODE_MONO_LEFT:
++ snd_soc_add_codec_controls(codec,
++ w8741_snd_controls_mono_left,
++ ARRAY_SIZE(w8741_snd_controls_mono_left));
++ break;
++ case WM8741_DIFF_MODE_MONO_RIGHT:
++ snd_soc_add_codec_controls(codec,
++ w8741_snd_controls_mono_right,
++ ARRAY_SIZE(w8741_snd_controls_mono_right));
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static int digidac1_soundcard_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_card *card = rtd->card;
++ struct snd_soc_pcm_runtime *wm8741_rtd;
++ struct snd_soc_codec *wm8741_codec;
++ struct snd_card *sound_card = card->snd_card;
++ struct snd_kcontrol *kctl;
++ int ret;
++
++ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
++ if (!wm8741_rtd) {
++ dev_warn(card->dev, "digidac1_soundcard_init: couldn't get wm8741 rtd\n");
++ return -EFAULT;
++ }
++ wm8741_codec = wm8741_rtd->codec;
++ ret = w8741_add_controls(wm8741_codec);
++ if (ret < 0)
++ dev_warn(card->dev, "Failed to add new wm8741 controls: %d\n",
++ ret);
++
++ /* enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ kctl = snd_soc_card_get_kcontrol(card,
++ "Playback Volume");
++ if (kctl) {
++ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
++ snd_ctl_remove(sound_card, kctl);
++ }
++ kctl = snd_soc_card_get_kcontrol(card,
++ "Fine Playback Volume");
++ if (kctl) {
++ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
++ snd_ctl_remove(sound_card, kctl);
++ }
++ return 0;
++}
++
++static int digidac1_soundcard_startup(struct snd_pcm_substream *substream)
++{
++ /* turn on wm8804 digital output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_card *card = rtd->card;
++ struct snd_soc_pcm_runtime *wm8741_rtd;
++ struct snd_soc_codec *wm8741_codec;
++
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
++ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
++ if (!wm8741_rtd) {
++ dev_warn(card->dev, "digidac1_soundcard_startup: couldn't get WM8741 rtd\n");
++ return -EFAULT;
++ }
++ wm8741_codec = wm8741_rtd->codec;
++
++ /* latch wm8741 level */
++ snd_soc_update_bits(wm8741_codec, WM8741_DACLLSB_ATTENUATION,
++ WM8741_UPDATELL, WM8741_UPDATELL);
++ snd_soc_update_bits(wm8741_codec, WM8741_DACLMSB_ATTENUATION,
++ WM8741_UPDATELM, WM8741_UPDATELM);
++ snd_soc_update_bits(wm8741_codec, WM8741_DACRLSB_ATTENUATION,
++ WM8741_UPDATERL, WM8741_UPDATERL);
++ snd_soc_update_bits(wm8741_codec, WM8741_DACRMSB_ATTENUATION,
++ WM8741_UPDATERM, WM8741_UPDATERM);
++
++ return 0;
++}
++
++static void digidac1_soundcard_shutdown(struct snd_pcm_substream *substream)
++{
++ /* turn off wm8804 digital output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
++}
++
++static int digidac1_soundcard_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++ struct snd_soc_card *card = rtd->card;
++ struct snd_soc_pcm_runtime *wm8741_rtd;
++ struct snd_soc_codec *wm8741_codec;
++
++ int sysclk = 27000000;
++ long mclk_freq = 0;
++ int mclk_div = 1;
++ int sampling_freq = 1;
++ int ret;
++
++ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
++ if (!wm8741_rtd) {
++ dev_warn(card->dev, "digidac1_soundcard_hw_params: couldn't get WM8741 rtd\n");
++ return -EFAULT;
++ }
++ wm8741_codec = wm8741_rtd->codec;
++ samplerate = params_rate(params);
++
++ if (samplerate <= 96000) {
++ mclk_freq = samplerate*256;
++ mclk_div = WM8804_MCLKDIV_256FS;
++ } else {
++ mclk_freq = samplerate*128;
++ mclk_div = WM8804_MCLKDIV_128FS;
++ }
++
++ switch (samplerate) {
++ case 32000:
++ sampling_freq = 0x03;
++ break;
++ case 44100:
++ sampling_freq = 0x00;
++ break;
++ case 48000:
++ sampling_freq = 0x02;
++ break;
++ case 88200:
++ sampling_freq = 0x08;
++ break;
++ case 96000:
++ sampling_freq = 0x0a;
++ break;
++ case 176400:
++ sampling_freq = 0x0c;
++ break;
++ case 192000:
++ sampling_freq = 0x0e;
++ break;
++ default:
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
++ samplerate);
++ }
++
++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
++ sysclk, SND_SOC_CLOCK_OUT);
++ if (ret < 0) {
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK: %d\n", ret);
++ return ret;
++ }
++ /* Enable wm8804 TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ /* wm8804 Power on */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
++
++ /* wm8804 set sampling frequency status bits */
++ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
++
++ /* Now update wm8741 registers for the correct oversampling */
++ if (samplerate <= 48000)
++ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
++ WM8741_OSR_MASK, 0x00);
++ else if (samplerate <= 96000)
++ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
++ WM8741_OSR_MASK, 0x20);
++ else
++ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
++ WM8741_OSR_MASK, 0x40);
++
++ /* wm8741 bit size */
++ switch (params_width(params)) {
++ case 16:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x00);
++ break;
++ case 20:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x01);
++ break;
++ case 24:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x02);
++ break;
++ case 32:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x03);
++ break;
++ default:
++ dev_dbg(codec->dev, "wm8741_hw_params: Unsupported bit size param = %d",
++ params_width(params));
++ return -EINVAL;
++ }
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
++}
++/* machine stream operations */
++static struct snd_soc_ops digidac1_soundcard_ops = {
++ .hw_params = digidac1_soundcard_hw_params,
++ .startup = digidac1_soundcard_startup,
++ .shutdown = digidac1_soundcard_shutdown,
++};
++
++static struct snd_soc_dai_link digidac1_soundcard_dai[] = {
++ {
++ .name = "RRA DigiDAC1",
++ .stream_name = "RRA DigiDAC1 HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8804-spdif",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "wm8804.1-003b",
++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &digidac1_soundcard_ops,
++ .init = digidac1_soundcard_init,
++ },
++ {
++ .name = "RRA DigiDAC11",
++ .stream_name = "RRA DigiDAC11 HiFi",
++ .cpu_dai_name = "wm8804-spdif",
++ .codec_dai_name = "wm8741",
++ .codec_name = "wm8741.1-001a",
++ .dai_fmt = SND_SOC_DAIFMT_I2S
++ | SND_SOC_DAIFMT_NB_NF
++ | SND_SOC_DAIFMT_CBS_CFS,
++ },
++};
++
++/* audio machine driver */
++static struct snd_soc_card digidac1_soundcard = {
++ .name = "digidac1-soundcard",
++ .owner = THIS_MODULE,
++ .dai_link = digidac1_soundcard_dai,
++ .num_links = ARRAY_SIZE(digidac1_soundcard_dai),
++};
++
++static int digidac1_soundcard_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ digidac1_soundcard.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &digidac1_soundcard_dai[0];
++
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++ }
++
++ ret = snd_soc_register_card(&digidac1_soundcard);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
++ ret);
++
++ return ret;
++}
++
++static int digidac1_soundcard_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&digidac1_soundcard);
++}
++
++static const struct of_device_id digidac1_soundcard_of_match[] = {
++ { .compatible = "rra,digidac1-soundcard", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, digidac1_soundcard_of_match);
++
++static struct platform_driver digidac1_soundcard_driver = {
++ .driver = {
++ .name = "digidac1-audio",
++ .owner = THIS_MODULE,
++ .of_match_table = digidac1_soundcard_of_match,
++ },
++ .probe = digidac1_soundcard_probe,
++ .remove = digidac1_soundcard_remove,
++};
++
++module_platform_driver(digidac1_soundcard_driver);
++
++MODULE_AUTHOR("José M. Tasende <vintage@redrocksaudio.es>");
++MODULE_DESCRIPTION("ASoC Driver for RRA DigiDAC1");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 1940010ff839276f53494bafc2e709117d70f590 Mon Sep 17 00:00:00 2001
-From: Eric Nelson <eric@nelint.com>
-Date: Wed, 23 Sep 2015 11:07:08 -0300
-Subject: [PATCH 373/381] [media] rc: gpio-ir-recv: add timeout on idle
-
-Many decoders require a trailing space (period without IR illumination)
-to be delivered before completing a decode.
-
-Since the gpio-ir-recv driver only delivers events on gpio transitions,
-a single IR symbol (caused by a quick touch on an IR remote) will not
-be properly decoded without the use of a timer to flush the tail end
-state of the IR receiver.
-
-This patch initializes and uses a timer and the timeout field of rcdev
-to complete the stream and allow decode.
-
-The timeout can be overridden through the use of the LIRC_SET_REC_TIMEOUT
-ioctl.
-
-Signed-off-by: Eric Nelson <eric@nelint.com>
-Acked-by: Sean Young <sean@mess.org>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- drivers/media/rc/gpio-ir-recv.c | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
---- a/drivers/media/rc/gpio-ir-recv.c
-+++ b/drivers/media/rc/gpio-ir-recv.c
-@@ -30,6 +30,7 @@ struct gpio_rc_dev {
- struct rc_dev *rcdev;
- int gpio_nr;
- bool active_low;
-+ struct timer_list flush_timer;
- };
-
- #ifdef CONFIG_OF
-@@ -93,12 +94,26 @@ static irqreturn_t gpio_ir_recv_irq(int
- if (rc < 0)
- goto err_get_value;
-
-+ mod_timer(&gpio_dev->flush_timer,
-+ jiffies + nsecs_to_jiffies(gpio_dev->rcdev->timeout));
-+
- ir_raw_event_handle(gpio_dev->rcdev);
-
- err_get_value:
- return IRQ_HANDLED;
- }
-
-+static void flush_timer(unsigned long arg)
-+{
-+ struct gpio_rc_dev *gpio_dev = (struct gpio_rc_dev *)arg;
-+ DEFINE_IR_RAW_EVENT(ev);
-+
-+ ev.timeout = true;
-+ ev.duration = gpio_dev->rcdev->timeout;
-+ ir_raw_event_store(gpio_dev->rcdev, &ev);
-+ ir_raw_event_handle(gpio_dev->rcdev);
-+}
-+
- static int gpio_ir_recv_probe(struct platform_device *pdev)
- {
- struct gpio_rc_dev *gpio_dev;
-@@ -144,6 +159,9 @@ static int gpio_ir_recv_probe(struct pla
- rcdev->input_id.version = 0x0100;
- rcdev->dev.parent = &pdev->dev;
- rcdev->driver_name = GPIO_IR_DRIVER_NAME;
-+ rcdev->min_timeout = 0;
-+ rcdev->timeout = IR_DEFAULT_TIMEOUT;
-+ rcdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
- if (pdata->allowed_protos)
- rcdev->allowed_protocols = pdata->allowed_protos;
- else
-@@ -154,6 +172,9 @@ static int gpio_ir_recv_probe(struct pla
- gpio_dev->gpio_nr = pdata->gpio_nr;
- gpio_dev->active_low = pdata->active_low;
-
-+ setup_timer(&gpio_dev->flush_timer, flush_timer,
-+ (unsigned long)gpio_dev);
-+
- rc = gpio_request(pdata->gpio_nr, "gpio-ir-recv");
- if (rc < 0)
- goto err_gpio_request;
-@@ -196,6 +217,7 @@ static int gpio_ir_recv_remove(struct pl
- struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
-
- free_irq(gpio_to_irq(gpio_dev->gpio_nr), gpio_dev);
-+ del_timer_sync(&gpio_dev->flush_timer);
- rc_unregister_device(gpio_dev->rcdev);
- gpio_free(gpio_dev->gpio_nr);
- kfree(gpio_dev);
+++ /dev/null
-From 0208831d16535a040ffdce0afeeccd13253c2b02 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-Date: Thu, 19 Nov 2015 11:41:36 -0200
-Subject: [PATCH 374/381] smsir.h: remove a now duplicated definition
- (IR_DEFAULT_TIMEOUT)
-
-This macro is now part of the core. Remove from Siano driver.
-
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- drivers/media/common/siano/smsir.h | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/media/common/siano/smsir.h
-+++ b/drivers/media/common/siano/smsir.h
-@@ -30,8 +30,6 @@ along with this program. If not, see <h
- #include <linux/input.h>
- #include <media/rc-core.h>
-
--#define IR_DEFAULT_TIMEOUT 100
--
- struct smscore_device_t;
-
- struct ir_t {
--- /dev/null
+From e773144578da8e21392ce8b6e99cfcd313779da9 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <6by9@users.noreply.github.com>
+Date: Wed, 25 May 2016 23:25:36 +0100
+Subject: [PATCH 375/423] BCM2835-V4L2: Correct handling for BGR24 vs RGB24.
+
+There was a bug in the GPU firmware that had reversed these
+two formats.
+Detect the old firmware, and reverse the formats if necessary.
+
+Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 69 ++++++++++++++++++-------
+ drivers/media/platform/bcm2835/bcm2835-camera.h | 1 +
+ 2 files changed, 52 insertions(+), 18 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -115,7 +115,7 @@ static struct mmal_fmt formats[] = {
+ .name = "RGB24 (LE)",
+ .fourcc = V4L2_PIX_FMT_RGB24,
+ .flags = 0,
+- .mmal = MMAL_ENCODING_BGR24,
++ .mmal = MMAL_ENCODING_RGB24,
+ .depth = 24,
+ .mmal_component = MMAL_COMPONENT_CAMERA,
+ .ybbp = 3,
+@@ -187,7 +187,7 @@ static struct mmal_fmt formats[] = {
+ .name = "RGB24 (BE)",
+ .fourcc = V4L2_PIX_FMT_BGR24,
+ .flags = 0,
+- .mmal = MMAL_ENCODING_RGB24,
++ .mmal = MMAL_ENCODING_BGR24,
+ .depth = 24,
+ .mmal_component = MMAL_COMPONENT_CAMERA,
+ .ybbp = 3,
+@@ -1059,6 +1059,13 @@ static int mmal_setup_components(struct
+ else
+ camera_port->format.encoding = mfmt->mmal;
+
++ if (dev->rgb_bgr_swapped) {
++ if (camera_port->format.encoding == MMAL_ENCODING_RGB24)
++ camera_port->format.encoding = MMAL_ENCODING_BGR24;
++ else if (camera_port->format.encoding == MMAL_ENCODING_BGR24)
++ camera_port->format.encoding = MMAL_ENCODING_RGB24;
++ }
++
+ camera_port->format.encoding_variant = 0;
+ camera_port->es.video.width = f->fmt.pix.width;
+ camera_port->es.video.height = f->fmt.pix.height;
+@@ -1569,12 +1576,17 @@ static int set_camera_parameters(struct
+ return ret;
+ }
+
++#define MAX_SUPPORTED_ENCODINGS 20
++
+ /* MMAL instance and component init */
+ static int __init mmal_init(struct bm2835_mmal_dev *dev)
+ {
+ int ret;
+ struct mmal_es_format *format;
+ u32 bool_true = 1;
++ u32 supported_encodings[MAX_SUPPORTED_ENCODINGS];
++ int param_size;
++ struct vchiq_mmal_component *camera;
+
+ ret = vchiq_mmal_init(&dev->instance);
+ if (ret < 0)
+@@ -1586,21 +1598,48 @@ static int __init mmal_init(struct bm283
+ if (ret < 0)
+ goto unreg_mmal;
+
+- if (dev->component[MMAL_COMPONENT_CAMERA]->outputs <
+- MMAL_CAMERA_PORT_COUNT) {
++ camera = dev->component[MMAL_COMPONENT_CAMERA];
++ if (camera->outputs < MMAL_CAMERA_PORT_COUNT) {
+ ret = -EINVAL;
+ goto unreg_camera;
+ }
+
+ ret = set_camera_parameters(dev->instance,
+- dev->component[MMAL_COMPONENT_CAMERA],
++ camera,
+ dev);
+ if (ret < 0)
+ goto unreg_camera;
+
+- format =
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_PREVIEW].format;
++ /* There was an error in the firmware that meant the camera component
++ * produced BGR instead of RGB.
++ * This is now fixed, but in order to support the old firmwares, we
++ * have to check.
++ */
++ dev->rgb_bgr_swapped = true;
++ param_size = sizeof(supported_encodings);
++ ret = vchiq_mmal_port_parameter_get(dev->instance,
++ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
++ MMAL_PARAMETER_SUPPORTED_ENCODINGS,
++ &supported_encodings,
++ ¶m_size);
++ if (ret == 0) {
++ int i;
++
++ for (i = 0; i < param_size/sizeof(u32); i++) {
++ if (supported_encodings[i] == MMAL_ENCODING_BGR24) {
++ /* Found BGR24 first - old firmware. */
++ break;
++ }
++ if (supported_encodings[i] == MMAL_ENCODING_RGB24) {
++ /* Found RGB24 first
++ * new firmware, so use RGB24.
++ */
++ dev->rgb_bgr_swapped = false;
++ break;
++ }
++ }
++ }
++ format = &camera->output[MMAL_CAMERA_PORT_PREVIEW].format;
+
+ format->encoding = MMAL_ENCODING_OPAQUE;
+ format->encoding_variant = MMAL_ENCODING_I420;
+@@ -1614,9 +1653,7 @@ static int __init mmal_init(struct bm283
+ format->es->video.frame_rate.num = 0; /* Rely on fps_range */
+ format->es->video.frame_rate.den = 1;
+
+- format =
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_VIDEO].format;
++ format = &camera->output[MMAL_CAMERA_PORT_VIDEO].format;
+
+ format->encoding = MMAL_ENCODING_OPAQUE;
+ format->encoding_variant = MMAL_ENCODING_I420;
+@@ -1631,14 +1668,11 @@ static int __init mmal_init(struct bm283
+ format->es->video.frame_rate.den = 1;
+
+ vchiq_mmal_port_parameter_set(dev->instance,
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_VIDEO],
++ &camera->output[MMAL_CAMERA_PORT_VIDEO],
+ MMAL_PARAMETER_NO_IMAGE_PADDING,
+ &bool_true, sizeof(bool_true));
+
+- format =
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_CAPTURE].format;
++ format = &camera->output[MMAL_CAMERA_PORT_CAPTURE].format;
+
+ format->encoding = MMAL_ENCODING_OPAQUE;
+
+@@ -1660,8 +1694,7 @@ static int __init mmal_init(struct bm283
+ dev->capture.enc_level = V4L2_MPEG_VIDEO_H264_LEVEL_4_0;
+
+ vchiq_mmal_port_parameter_set(dev->instance,
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_CAPTURE],
++ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
+ MMAL_PARAMETER_NO_IMAGE_PADDING,
+ &bool_true, sizeof(bool_true));
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.h
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.h
+@@ -109,6 +109,7 @@ struct bm2835_mmal_dev {
+ unsigned int camera_num;
+ unsigned int max_width;
+ unsigned int max_height;
++ unsigned int rgb_bgr_swapped;
+ };
+
+ int bm2835_mmal_init_controls(
+++ /dev/null
-From 5286423195daead727d1a76c9b16d75d7d34e915 Mon Sep 17 00:00:00 2001
-From: Nicolas Boullis <nboullis@debian.org>
-Date: Sat, 4 Jun 2016 00:57:06 +0200
-Subject: [PATCH 375/381] Implement a "wakeup-source" option for the i2c-rtc
- DeviceTree overlay.
-
-See: https://github.com/raspberrypi/linux/pull/1511
----
- arch/arm/boot/dts/overlays/README | 3 +++
- arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 4 ++++
- 2 files changed, 7 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -445,6 +445,9 @@ Params: ds1307 Select t
-
- trickle-resistor-ohms Resistor value for trickle charge (DS1339-only)
-
-+ wakeup-source Specify that the RTC can be used as a wakeup
-+ source
-+
-
- Name: i2c0-bcm2708
- Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations
---- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
-@@ -65,5 +65,9 @@
- pcf8523 = <&pcf8523>,"status";
- pcf8563 = <&pcf8563>,"status";
- trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0";
-+ wakeup-source = <&ds1339>,"wakeup-source?",
-+ <&ds3231>,"wakeup-source?",
-+ <&mcp7940x>,"wakeup-source?",
-+ <&mcp7941x>,"wakeup-source?";
- };
- };
--- /dev/null
+From 9bfe3611959168e5d1035bafc8917340bc1e9791 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 3 Jun 2016 22:21:47 +0100
+Subject: [PATCH 376/423] BCM270X_DT: Add mcp23017 to the overlay Makefile
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -44,6 +44,7 @@ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacpl
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
+++ /dev/null
-From 0978d55c391b3698dbecfd927378dc24c57eaa07 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 3 Jun 2016 21:56:40 +0100
-Subject: [PATCH 376/381] BCM270X_DT: Fix rpi-dac overlay
-
-The rpi-dac overlay is almost identical to the hifiberry-dac overlay -
-the codec used is different but it also doesn't sit on the I2C bus. As
-a result, when the overlays were modified for dynamic loading and it
-was discovered that the hifiberry-dac overlay didn't work any more, the
-the rpi-dac overlay was also broken.
-
-The failure was caused by the fact that outside a bus, device names are
-constructed from the concatenation of the path elements leading to it,
-so moving the codec instantiation inside /soc caused the device name
-to get a "soc" added, breaking ALSA's naming.
-
-See: http://forum.kodi.tv/showthread.php?tid=269814&pid=2349776#pid2349776
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
-@@ -13,7 +13,7 @@
- };
-
- fragment@1 {
-- target = <&soc>;
-+ target-path = "/";
- __overlay__ {
- pcm1794a-codec {
- #sound-dai-cells = <0>;
+++ /dev/null
-From 432f47525a7916c723a80679b608f9bc0b4375b0 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Mon, 6 Jun 2016 09:23:37 +0100
-Subject: [PATCH 377/381] BCM270X_DT: Make i2c-gpio usable by other overlays
-
-Modify the i2c-gpio overlay to export symbol i2c-gpio for use by other
-overlays. Export the alias as well for good measure.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
-@@ -19,6 +19,21 @@
- };
- };
- };
-+
-+ fragment@1 {
-+ target-path = "/aliases";
-+ __overlay__ {
-+ i2c_gpio = "/i2c@0";
-+ };
-+ };
-+
-+ fragment@2 {
-+ target-path = "/__symbols__";
-+ __overlay__ {
-+ i2c_gpio = "/i2c@0";
-+ };
-+ };
-+
- __overrides__ {
- i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
- i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
--- /dev/null
+From e5dfd4f6544c0bc78d3d5b4158ad0f3660a244d4 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 3 Jun 2016 23:01:01 +0100
+Subject: [PATCH 377/423] BCM270X_DT: Sort entries to placate check script
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -18,10 +18,10 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += enc28j60.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += gpio-ir.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += gpio-poweroff.dtbo
+@@ -31,10 +31,10 @@ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dac
+ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-mux.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31.dtbo
+@@ -73,16 +73,16 @@ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdtweak.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-3cs.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += tinylcd35.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += uart1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += vc4-kms-v3d.dtbo
--- /dev/null
+From 5ae23709f303503c983cc3658a95ade9573c2540 Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Sat, 4 Jun 2016 11:30:48 +0200
+Subject: [PATCH 378/423] gpio-ir overlay: gpio_pin shouldn't change pull
+ setting
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+---
+ arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
++++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
+@@ -36,8 +36,7 @@
+ __overrides__ {
+ // parameters
+ gpio_pin = <&gpio_ir>,"gpios:4",
+- <&gpio_ir_pins>,"brcm,pins:0",
+- <&gpio_ir_pins>,"brcm,pull:0"; // pin number
++ <&gpio_ir_pins>,"brcm,pins:0"; // pin number
+ gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
+
+ rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
--- /dev/null
+From 17d27b2171c997d5803172e7a9fa4f474f9687c1 Mon Sep 17 00:00:00 2001
+From: Eric Nelson <eric@nelint.com>
+Date: Sat, 3 Oct 2015 08:18:50 -0700
+Subject: [PATCH 379/423] [media] rc-core: define a default timeout for drivers
+
+A default timeout value of 125 ms should work for all decoders.
+
+Declare a constant to help standardize its' use.
+
+Signed-off-by: Eric Nelson <eric@nelint.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+---
+ include/media/rc-core.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/include/media/rc-core.h
++++ b/include/media/rc-core.h
+@@ -239,6 +239,7 @@ static inline void init_ir_raw_event(str
+ memset(ev, 0, sizeof(*ev));
+ }
+
++#define IR_DEFAULT_TIMEOUT MS_TO_NS(125)
+ #define IR_MAX_DURATION 500000000 /* 500 ms */
+ #define US_TO_NS(usec) ((usec) * 1000)
+ #define MS_TO_US(msec) ((msec) * 1000)
--- /dev/null
+From 87909c64d14dc0f907ebe95f77874075a75e7f66 Mon Sep 17 00:00:00 2001
+From: Eric Nelson <eric@nelint.com>
+Date: Wed, 23 Sep 2015 11:07:08 -0300
+Subject: [PATCH 380/423] [media] rc: gpio-ir-recv: add timeout on idle
+
+Many decoders require a trailing space (period without IR illumination)
+to be delivered before completing a decode.
+
+Since the gpio-ir-recv driver only delivers events on gpio transitions,
+a single IR symbol (caused by a quick touch on an IR remote) will not
+be properly decoded without the use of a timer to flush the tail end
+state of the IR receiver.
+
+This patch initializes and uses a timer and the timeout field of rcdev
+to complete the stream and allow decode.
+
+The timeout can be overridden through the use of the LIRC_SET_REC_TIMEOUT
+ioctl.
+
+Signed-off-by: Eric Nelson <eric@nelint.com>
+Acked-by: Sean Young <sean@mess.org>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+---
+ drivers/media/rc/gpio-ir-recv.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+--- a/drivers/media/rc/gpio-ir-recv.c
++++ b/drivers/media/rc/gpio-ir-recv.c
+@@ -30,6 +30,7 @@ struct gpio_rc_dev {
+ struct rc_dev *rcdev;
+ int gpio_nr;
+ bool active_low;
++ struct timer_list flush_timer;
+ };
+
+ #ifdef CONFIG_OF
+@@ -93,12 +94,26 @@ static irqreturn_t gpio_ir_recv_irq(int
+ if (rc < 0)
+ goto err_get_value;
+
++ mod_timer(&gpio_dev->flush_timer,
++ jiffies + nsecs_to_jiffies(gpio_dev->rcdev->timeout));
++
+ ir_raw_event_handle(gpio_dev->rcdev);
+
+ err_get_value:
+ return IRQ_HANDLED;
+ }
+
++static void flush_timer(unsigned long arg)
++{
++ struct gpio_rc_dev *gpio_dev = (struct gpio_rc_dev *)arg;
++ DEFINE_IR_RAW_EVENT(ev);
++
++ ev.timeout = true;
++ ev.duration = gpio_dev->rcdev->timeout;
++ ir_raw_event_store(gpio_dev->rcdev, &ev);
++ ir_raw_event_handle(gpio_dev->rcdev);
++}
++
+ static int gpio_ir_recv_probe(struct platform_device *pdev)
+ {
+ struct gpio_rc_dev *gpio_dev;
+@@ -144,6 +159,9 @@ static int gpio_ir_recv_probe(struct pla
+ rcdev->input_id.version = 0x0100;
+ rcdev->dev.parent = &pdev->dev;
+ rcdev->driver_name = GPIO_IR_DRIVER_NAME;
++ rcdev->min_timeout = 0;
++ rcdev->timeout = IR_DEFAULT_TIMEOUT;
++ rcdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
+ if (pdata->allowed_protos)
+ rcdev->allowed_protocols = pdata->allowed_protos;
+ else
+@@ -154,6 +172,9 @@ static int gpio_ir_recv_probe(struct pla
+ gpio_dev->gpio_nr = pdata->gpio_nr;
+ gpio_dev->active_low = pdata->active_low;
+
++ setup_timer(&gpio_dev->flush_timer, flush_timer,
++ (unsigned long)gpio_dev);
++
+ rc = gpio_request(pdata->gpio_nr, "gpio-ir-recv");
+ if (rc < 0)
+ goto err_gpio_request;
+@@ -196,6 +217,7 @@ static int gpio_ir_recv_remove(struct pl
+ struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+ free_irq(gpio_to_irq(gpio_dev->gpio_nr), gpio_dev);
++ del_timer_sync(&gpio_dev->flush_timer);
+ rc_unregister_device(gpio_dev->rcdev);
+ gpio_free(gpio_dev->gpio_nr);
+ kfree(gpio_dev);
+++ /dev/null
-From 11e5c941ff3d09701e57d26b068f634fae29265c Mon Sep 17 00:00:00 2001
-From: Erik Sejr <erik@eriks.ssimicro.com>
-Date: Tue, 7 Jun 2016 20:58:17 -0400
-Subject: [PATCH 381/381] Add ads1015 overlay
-
-See: https://github.com/raspberrypi/linux/pull/1520
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 22 ++++++
- arch/arm/boot/dts/overlays/ads1015-overlay.dts | 98 ++++++++++++++++++++++++++
- 3 files changed, 121 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -13,6 +13,7 @@ ifeq ($(CONFIG_ARCH_BCM2835),y)
- endif
-
- dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += ads1015.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -168,6 +168,28 @@ Load: dtoverlay=adau1977-adc
- Params: <None>
-
-
-+Name: ads1015
-+Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
-+Load: dtoverlay=ads1015,<param>=<val>
-+Params: addr I2C bus address of device. Set based on how the
-+ addr pin is wired. (default=0x48 assumes addr
-+ is pulled to GND)
-+ cha_enable Enable virtual channel a. (default=true)
-+ cha_cfg Set the configuration for virtual channel a.
-+ (default=4 configures this channel for the
-+ voltage at A0 with respect to GND)
-+ cha_datarate Set the datarate (samples/sec) for this channel.
-+ (default=4 sets 1600 sps)
-+ cha_gain Set the gain of the Programmable Gain
-+ Amplifier for this channel. (default=2 sets the
-+ full scale of the channel to 2.048 Volts)
-+
-+ Channel (ch) parameters can be set for each enabled channel.
-+ A maximum of 4 channels can be enabled (letters a thru d).
-+ For more information refer to the device datasheet at:
-+ http://www.ti.com/lit/ds/symlink/ads1015.pdf
-+
-+
- Name: ads7846
- Info: ADS7846 Touch controller
- Load: dtoverlay=ads7846,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
-@@ -0,0 +1,98 @@
-+/*
-+ * 2016 - Erik Sejr
-+ */
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+ /* ----------- ADS1015 ------------ */
-+ fragment@0 {
-+ target = <&i2c_arm>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+ ads1015: ads1015 {
-+ compatible = "ti,ads1015";
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x48>;
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target-path = "i2c_arm/ads1015";
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_a: channel_a {
-+ reg = <4>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target-path = "i2c_arm/ads1015";
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_b: channel_b {
-+ reg = <5>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ fragment@3 {
-+ target-path = "i2c_arm/ads1015";
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_c: channel_c {
-+ reg = <6>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ fragment@4 {
-+ target-path = "i2c_arm/ads1015";
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_d: channel_d {
-+ reg = <7>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ addr = <&ads1015>,"reg:0";
-+ cha_enable = <0>,"=1";
-+ cha_cfg = <&channel_a>,"reg:0";
-+ cha_gain = <&channel_a>,"ti,gain:0";
-+ cha_datarate = <&channel_a>,"ti,datarate:0";
-+ chb_enable = <0>,"=2";
-+ chb_cfg = <&channel_b>,"reg:0";
-+ chb_gain = <&channel_b>,"ti,gain:0";
-+ chb_datarate = <&channel_b>,"ti,datarate:0";
-+ chc_enable = <0>,"=3";
-+ chc_cfg = <&channel_c>,"reg:0";
-+ chc_gain = <&channel_c>,"ti,gain:0";
-+ chc_datarate = <&channel_c>,"ti,datarate:0";
-+ chd_enable = <0>,"=4";
-+ chd_cfg = <&channel_d>,"reg:0";
-+ chd_gain = <&channel_d>,"ti,gain:0";
-+ chd_datarate = <&channel_d>,"ti,datarate:0";
-+ };
-+
-+};
--- /dev/null
+From 3818b6877b525824f6fff4c9ede5f768ce55aac6 Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+Date: Thu, 19 Nov 2015 11:41:36 -0200
+Subject: [PATCH 381/423] smsir.h: remove a now duplicated definition
+ (IR_DEFAULT_TIMEOUT)
+
+This macro is now part of the core. Remove from Siano driver.
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+---
+ drivers/media/common/siano/smsir.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/drivers/media/common/siano/smsir.h
++++ b/drivers/media/common/siano/smsir.h
+@@ -30,8 +30,6 @@ along with this program. If not, see <h
+ #include <linux/input.h>
+ #include <media/rc-core.h>
+
+-#define IR_DEFAULT_TIMEOUT 100
+-
+ struct smscore_device_t;
+
+ struct ir_t {
--- /dev/null
+From 0b0219c615f8715c180e0c20bbecb97ae2c49f45 Mon Sep 17 00:00:00 2001
+From: Nicolas Boullis <nboullis@debian.org>
+Date: Sat, 4 Jun 2016 00:57:06 +0200
+Subject: [PATCH 382/423] Implement a "wakeup-source" option for the i2c-rtc
+ DeviceTree overlay.
+
+See: https://github.com/raspberrypi/linux/pull/1511
+---
+ arch/arm/boot/dts/overlays/README | 3 +++
+ arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 4 ++++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -445,6 +445,9 @@ Params: ds1307 Select t
+
+ trickle-resistor-ohms Resistor value for trickle charge (DS1339-only)
+
++ wakeup-source Specify that the RTC can be used as a wakeup
++ source
++
+
+ Name: i2c0-bcm2708
+ Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations
+--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
+@@ -65,5 +65,9 @@
+ pcf8523 = <&pcf8523>,"status";
+ pcf8563 = <&pcf8563>,"status";
+ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0";
++ wakeup-source = <&ds1339>,"wakeup-source?",
++ <&ds3231>,"wakeup-source?",
++ <&mcp7940x>,"wakeup-source?",
++ <&mcp7941x>,"wakeup-source?";
+ };
+ };
--- /dev/null
+From 5524577be75ee648266c47fe6d4a9be80411827f Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 3 Jun 2016 21:56:40 +0100
+Subject: [PATCH 383/423] BCM270X_DT: Fix rpi-dac overlay
+
+The rpi-dac overlay is almost identical to the hifiberry-dac overlay -
+the codec used is different but it also doesn't sit on the I2C bus. As
+a result, when the overlays were modified for dynamic loading and it
+was discovered that the hifiberry-dac overlay didn't work any more, the
+the rpi-dac overlay was also broken.
+
+The failure was caused by the fact that outside a bus, device names are
+constructed from the concatenation of the path elements leading to it,
+so moving the codec instantiation inside /soc caused the device name
+to get a "soc" added, breaking ALSA's naming.
+
+See: http://forum.kodi.tv/showthread.php?tid=269814&pid=2349776#pid2349776
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
+@@ -13,7 +13,7 @@
+ };
+
+ fragment@1 {
+- target = <&soc>;
++ target-path = "/";
+ __overlay__ {
+ pcm1794a-codec {
+ #sound-dai-cells = <0>;
--- /dev/null
+From 1ea97f82e7a653ad18f39f9de5ea34f182650d70 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 6 Jun 2016 09:23:37 +0100
+Subject: [PATCH 384/423] BCM270X_DT: Make i2c-gpio usable by other overlays
+
+Modify the i2c-gpio overlay to export symbol i2c-gpio for use by other
+overlays. Export the alias as well for good measure.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
+@@ -19,6 +19,21 @@
+ };
+ };
+ };
++
++ fragment@1 {
++ target-path = "/aliases";
++ __overlay__ {
++ i2c_gpio = "/i2c@0";
++ };
++ };
++
++ fragment@2 {
++ target-path = "/__symbols__";
++ __overlay__ {
++ i2c_gpio = "/i2c@0";
++ };
++ };
++
+ __overrides__ {
+ i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
+ i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
--- /dev/null
+From a16a1b167229779e3e417a1f63eeb176048ef6e0 Mon Sep 17 00:00:00 2001
+From: Erik Sejr <erik@eriks.ssimicro.com>
+Date: Tue, 7 Jun 2016 20:58:17 -0400
+Subject: [PATCH 388/423] Add ads1015 overlay
+
+See: https://github.com/raspberrypi/linux/pull/1520
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 22 ++++++
+ arch/arm/boot/dts/overlays/ads1015-overlay.dts | 98 ++++++++++++++++++++++++++
+ 3 files changed, 121 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -13,6 +13,7 @@ ifeq ($(CONFIG_ARCH_BCM2835),y)
+ endif
+
+ dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += ads1015.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -168,6 +168,28 @@ Load: dtoverlay=adau1977-adc
+ Params: <None>
+
+
++Name: ads1015
++Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
++Load: dtoverlay=ads1015,<param>=<val>
++Params: addr I2C bus address of device. Set based on how the
++ addr pin is wired. (default=0x48 assumes addr
++ is pulled to GND)
++ cha_enable Enable virtual channel a. (default=true)
++ cha_cfg Set the configuration for virtual channel a.
++ (default=4 configures this channel for the
++ voltage at A0 with respect to GND)
++ cha_datarate Set the datarate (samples/sec) for this channel.
++ (default=4 sets 1600 sps)
++ cha_gain Set the gain of the Programmable Gain
++ Amplifier for this channel. (default=2 sets the
++ full scale of the channel to 2.048 Volts)
++
++ Channel (ch) parameters can be set for each enabled channel.
++ A maximum of 4 channels can be enabled (letters a thru d).
++ For more information refer to the device datasheet at:
++ http://www.ti.com/lit/ds/symlink/ads1015.pdf
++
++
+ Name: ads7846
+ Info: ADS7846 Touch controller
+ Load: dtoverlay=ads7846,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
+@@ -0,0 +1,98 @@
++/*
++ * 2016 - Erik Sejr
++ */
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++ /* ----------- ADS1015 ------------ */
++ fragment@0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++ ads1015: ads1015 {
++ compatible = "ti,ads1015";
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x48>;
++ };
++ };
++ };
++
++ fragment@1 {
++ target-path = "i2c_arm/ads1015";
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_a: channel_a {
++ reg = <4>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_b: channel_b {
++ reg = <5>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment@3 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_c: channel_c {
++ reg = <6>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment@4 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_d: channel_d {
++ reg = <7>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ __overrides__ {
++ addr = <&ads1015>,"reg:0";
++ cha_enable = <0>,"=1";
++ cha_cfg = <&channel_a>,"reg:0";
++ cha_gain = <&channel_a>,"ti,gain:0";
++ cha_datarate = <&channel_a>,"ti,datarate:0";
++ chb_enable = <0>,"=2";
++ chb_cfg = <&channel_b>,"reg:0";
++ chb_gain = <&channel_b>,"ti,gain:0";
++ chb_datarate = <&channel_b>,"ti,datarate:0";
++ chc_enable = <0>,"=3";
++ chc_cfg = <&channel_c>,"reg:0";
++ chc_gain = <&channel_c>,"ti,gain:0";
++ chc_datarate = <&channel_c>,"ti,datarate:0";
++ chd_enable = <0>,"=4";
++ chd_cfg = <&channel_d>,"reg:0";
++ chd_gain = <&channel_d>,"ti,gain:0";
++ chd_datarate = <&channel_d>,"ti,datarate:0";
++ };
++
++};
--- /dev/null
+From 863ab87efa682d499ed1bfaeae1753e4a86b392d Mon Sep 17 00:00:00 2001
+From: Michael Kaplan <m.kaplan@evva.com>
+Date: Wed, 8 Jun 2016 15:14:11 +0200
+Subject: [PATCH 389/423] Fixed MCP23017 section in overlay README
+
+Old description could have led to the misunderstanding that it is an
+i2c port expander, but in fact it is a gpio expander.
+---
+ arch/arm/boot/dts/overlays/README | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -595,7 +595,7 @@ Params: gpio_out_pin GPIO for
+
+
+ Name: mcp23017
+-Info: Configures the MCP23017 I2C port expander
++Info: Configures the MCP23017 I2C GPIO expander
+ Load: dtoverlay=mcp23017,<param>=<val>
+ Params: gpiopin Gpio pin connected to the INTA output of the
+ MCP23017 (default: 4)
--- /dev/null
+From d9c36fdc44cdf154a0849b03e94b0a6b6f86defb Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:13 +0000
+Subject: [PATCH 390/423] Revert "bcm2835-dma: Fix up convert to DMA pool"
+
+This reverts commit ec2e48fda22c57cab56a4332d1a095f91c919493.
+---
+ drivers/dma/bcm2835-dma.c | 36 ++++++++++--------------------------
+ 1 file changed, 10 insertions(+), 26 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -488,17 +488,6 @@ static struct dma_async_tx_descriptor *b
+ c->cyclic = true;
+
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+-error_cb:
+- i--;
+- for (; i >= 0; i--) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+-
+- dma_pool_free(c->cb_pool, cb_entry->cb, cb_entry->paddr);
+- }
+-
+- kfree(d->cb_list);
+- kfree(d);
+- return NULL;
+ }
+
+ static struct dma_async_tx_descriptor *
+@@ -545,7 +534,6 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+ if (!d)
+ return NULL;
+
+- d->c = c;
+ d->dir = direction;
+
+ if (c->ch >= 8) /* LITE channel */
+@@ -565,21 +553,15 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+ d->frames += len / max_size + 1;
+ }
+
+- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+- if (!d->cb_list) {
++ /* Allocate memory for control blocks */
++ d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
++ d->control_block_base = dma_zalloc_coherent(chan->device->dev,
++ d->control_block_size, &d->control_block_base_phys,
++ GFP_NOWAIT);
++ if (!d->control_block_base) {
+ kfree(d);
+ return NULL;
+ }
+- /* Allocate memory for control blocks */
+- for (i = 0; i < d->frames; i++) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+-
+- cb_entry->cb = dma_pool_zalloc(c->cb_pool, GFP_ATOMIC,
+- &cb_entry->paddr);
+-
+- if (!cb_entry->cb)
+- goto error_cb;
+- }
+
+ /*
+ * Iterate over all SG entries, create a control block
+@@ -596,7 +578,7 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+
+ for (j = 0; j < len; j += max_size) {
+ struct bcm2835_dma_cb *control_block =
+- d->cb_list[i + split_cnt].cb;
++ &d->control_block_base[i + split_cnt];
+
+ /* Setup addresses */
+ if (d->dir == DMA_DEV_TO_MEM) {
+@@ -638,7 +620,9 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+ if (i < sg_len - 1 || len - j > max_size) {
+ /* Next block is the next frame. */
+ control_block->next =
+- d->cb_list[i + split_cnt + 1].paddr;
++ d->control_block_base_phys +
++ sizeof(struct bcm2835_dma_cb) *
++ (i + split_cnt + 1);
+ } else {
+ /* Next block is empty. */
+ control_block->next = 0;
--- /dev/null
+From 0bdc822d579b856a40a24f8c58765d2200f15099 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:22 +0000
+Subject: [PATCH 391/423] Revert "bcm2835-dma: Limit cyclic transfers on lite
+ channels to 32k"
+
+This reverts commit 052c2005b6ecedc5abad86632f5781adda310aa7.
+---
+ drivers/dma/bcm2835-dma.c | 8 +-------
+ 1 file changed, 1 insertion(+), 7 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -144,12 +144,6 @@ struct bcm2835_desc {
+ */
+ #define MAX_LITE_TRANSFER (SZ_64K - 4)
+
+-/*
+- * Transfers larger than 32k cause issues with the bcm2708-i2s driver,
+- * so limit transfer size to 32k as bcm2708-dmaengine did.
+- */
+-#define MAX_CYCLIC_LITE_TRANSFER SZ_32K
+-
+ static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+ {
+ return container_of(d, struct bcm2835_dmadev, ddev);
+@@ -418,7 +412,7 @@ static struct dma_async_tx_descriptor *b
+ d->c = c;
+ d->dir = direction;
+ if (c->ch >= 8) /* LITE channel */
+- max_size = MAX_CYCLIC_LITE_TRANSFER;
++ max_size = MAX_LITE_TRANSFER;
+ else
+ max_size = MAX_NORMAL_TRANSFER;
+ period_len = min(period_len, max_size);
--- /dev/null
+From 7550c11bac6c1990f2e4a583c99e211cb402782b Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:30 +0000
+Subject: [PATCH 392/423] Revert "dmaengine: bcm2835: Load driver early and
+ support legacy API"
+
+This reverts commit 6f56fff39c811953809b011f59c49a2122c4d173.
+---
+ drivers/dma/Kconfig | 2 +-
+ drivers/dma/bcm2835-dma.c | 30 ++++++------------------------
+ 2 files changed, 7 insertions(+), 25 deletions(-)
+
+--- a/drivers/dma/Kconfig
++++ b/drivers/dma/Kconfig
+@@ -108,7 +108,7 @@ config COH901318
+
+ config DMA_BCM2835
+ tristate "BCM2835 DMA engine support"
+- depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
++ depends on ARCH_BCM2835
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -36,7 +36,6 @@
+ #include <linux/interrupt.h>
+ #include <linux/list.h>
+ #include <linux/module.h>
+-#include <linux/platform_data/dma-bcm2708.h>
+ #include <linux/platform_device.h>
+ #include <linux/slab.h>
+ #include <linux/io.h>
+@@ -787,10 +786,6 @@ static int bcm2835_dma_probe(struct plat
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+- rc = bcm_dmaman_probe(pdev, base, BCM2835_DMA_BULK_MASK);
+- if (rc)
+- dev_err(&pdev->dev, "Failed to initialize the legacy API\n");
+-
+ od->base = base;
+
+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+@@ -823,8 +818,11 @@ static int bcm2835_dma_probe(struct plat
+ goto err_no_dma;
+ }
+
+- /* Channel 0 is used by the legacy API */
+- chans_available &= ~BCM2835_DMA_BULK_MASK;
++ /*
++ * Do not use the FIQ and BULK channels,
++ * because they are used by the GPU.
++ */
++ chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
+
+ for (i = 0; i < pdev->num_resources; i++) {
+ irq = platform_get_irq(pdev, i);
+@@ -868,7 +866,6 @@ static int bcm2835_dma_remove(struct pla
+ {
+ struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
+
+- bcm_dmaman_remove(pdev);
+ dma_async_device_unregister(&od->ddev);
+ bcm2835_dma_free(od);
+
+@@ -884,22 +881,7 @@ static struct platform_driver bcm2835_dm
+ },
+ };
+
+-static int bcm2835_dma_init(void)
+-{
+- return platform_driver_register(&bcm2835_dma_driver);
+-}
+-
+-static void bcm2835_dma_exit(void)
+-{
+- platform_driver_unregister(&bcm2835_dma_driver);
+-}
+-
+-/*
+- * Load after serial driver (arch_initcall) so we see the messages if it fails,
+- * but before drivers (module_init) that need a DMA channel.
+- */
+-subsys_initcall(bcm2835_dma_init);
+-module_exit(bcm2835_dma_exit);
++module_platform_driver(bcm2835_dma_driver);
+
+ MODULE_ALIAS("platform:bcm2835-dma");
+ MODULE_DESCRIPTION("BCM2835 DMA engine driver");
--- /dev/null
+From c748f44b0b10023e4207cb288ce9c169e390fbaf Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:37 +0000
+Subject: [PATCH 393/423] Revert "dmaengine: bcm2835: Add slave dma support"
+
+This reverts commit 8a349301238aabb40c9da5ca8c8492b6b8d146f6.
+---
+ drivers/dma/bcm2835-dma.c | 206 ++++------------------------------------------
+ 1 file changed, 14 insertions(+), 192 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -1,10 +1,11 @@
+ /*
+ * BCM2835 DMA engine support
+ *
++ * This driver only supports cyclic DMA transfers
++ * as needed for the I2S module.
++ *
+ * Author: Florian Meier <florian.meier@koalo.de>
+ * Copyright 2013
+- * Gellert Weisz <gellert@raspberrypi.org>
+- * Copyright 2013-2014
+ *
+ * Based on
+ * OMAP DMAengine support by Russell King
+@@ -94,8 +95,6 @@ struct bcm2835_desc {
+ size_t size;
+ };
+
+-#define BCM2835_DMA_WAIT_CYCLES 0 /* Slow down DMA transfers: 0-31 */
+-
+ #define BCM2835_DMA_CS 0x00
+ #define BCM2835_DMA_ADDR 0x04
+ #define BCM2835_DMA_SOURCE_AD 0x0c
+@@ -112,16 +111,12 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
+
+ #define BCM2835_DMA_INT_EN BIT(0)
+-#define BCM2835_DMA_WAIT_RESP BIT(3)
+ #define BCM2835_DMA_D_INC BIT(4)
+-#define BCM2835_DMA_D_WIDTH BIT(5)
+ #define BCM2835_DMA_D_DREQ BIT(6)
+ #define BCM2835_DMA_S_INC BIT(8)
+-#define BCM2835_DMA_S_WIDTH BIT(9)
+ #define BCM2835_DMA_S_DREQ BIT(10)
+
+ #define BCM2835_DMA_PER_MAP(x) ((x) << 16)
+-#define BCM2835_DMA_WAITS(x) (((x) & 0x1f) << 21)
+
+ #define BCM2835_DMA_DATA_TYPE_S8 1
+ #define BCM2835_DMA_DATA_TYPE_S16 2
+@@ -135,14 +130,6 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+
+-#define MAX_NORMAL_TRANSFER SZ_1G
+-/*
+- * Max length on a Lite channel is 65535 bytes.
+- * DMA handles byte-enables on SDRAM reads and writes even on 128-bit accesses,
+- * but byte-enables don't exist on peripheral addresses, so align to 32-bit.
+- */
+-#define MAX_LITE_TRANSFER (SZ_64K - 4)
+-
+ static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+ {
+ return container_of(d, struct bcm2835_dmadev, ddev);
+@@ -239,19 +226,13 @@ static irqreturn_t bcm2835_dma_callback(
+ d = c->desc;
+
+ if (d) {
+- if (c->cyclic) {
+- vchan_cyclic_callback(&d->vd);
+-
+- /* Keep the DMA engine running */
+- writel(BCM2835_DMA_ACTIVE,
+- c->chan_base + BCM2835_DMA_CS);
+-
+- } else {
+- vchan_cookie_complete(&c->desc->vd);
+- bcm2835_dma_start_desc(c);
+- }
++ /* TODO Only works for cyclic DMA */
++ vchan_cyclic_callback(&d->vd);
+ }
+
++ /* Keep the DMA engine running */
++ writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
++
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return IRQ_HANDLED;
+@@ -358,6 +339,8 @@ static void bcm2835_dma_issue_pending(st
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ unsigned long flags;
+
++ c->cyclic = true; /* Nothing else is implemented */
++
+ spin_lock_irqsave(&c->vc.lock, flags);
+ if (vchan_issue_pending(&c->vc) && !c->desc)
+ bcm2835_dma_start_desc(c);
+@@ -375,7 +358,7 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_desc *d;
+ dma_addr_t dev_addr;
+ unsigned int es, sync_type;
+- unsigned int frame, max_size;
++ unsigned int frame;
+ int i;
+
+ /* Grab configuration */
+@@ -410,12 +393,7 @@ static struct dma_async_tx_descriptor *b
+
+ d->c = c;
+ d->dir = direction;
+- if (c->ch >= 8) /* LITE channel */
+- max_size = MAX_LITE_TRANSFER;
+- else
+- max_size = MAX_NORMAL_TRANSFER;
+- period_len = min(period_len, max_size);
+- d->frames = (buf_len - 1) / (period_len + 1);
++ d->frames = buf_len / period_len;
+
+ d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+ if (!d->cb_list) {
+@@ -463,171 +441,17 @@ static struct dma_async_tx_descriptor *b
+ BCM2835_DMA_PER_MAP(c->dreq);
+
+ /* Length of a frame */
+- if (frame != d->frames - 1)
+- control_block->length = period_len;
+- else
+- control_block->length = buf_len - (d->frames - 1) *
+- period_len;
++ control_block->length = period_len;
+ d->size += control_block->length;
+
+ /*
+ * Next block is the next frame.
+- * This function is called on cyclic DMA transfers.
++ * This DMA engine driver currently only supports cyclic DMA.
+ * Therefore, wrap around at number of frames.
+ */
+ control_block->next = d->cb_list[((frame + 1) % d->frames)].paddr;
+ }
+
+- c->cyclic = true;
+-
+- return vchan_tx_prep(&c->vc, &d->vd, flags);
+-}
+-
+-static struct dma_async_tx_descriptor *
+-bcm2835_dma_prep_slave_sg(struct dma_chan *chan,
+- struct scatterlist *sgl,
+- unsigned int sg_len,
+- enum dma_transfer_direction direction,
+- unsigned long flags, void *context)
+-{
+- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+- enum dma_slave_buswidth dev_width;
+- struct bcm2835_desc *d;
+- dma_addr_t dev_addr;
+- struct scatterlist *sgent;
+- unsigned int i, sync_type, split_cnt, max_size;
+-
+- if (!is_slave_direction(direction)) {
+- dev_err(chan->device->dev, "direction not supported\n");
+- return NULL;
+- }
+-
+- if (direction == DMA_DEV_TO_MEM) {
+- dev_addr = c->cfg.src_addr;
+- dev_width = c->cfg.src_addr_width;
+- sync_type = BCM2835_DMA_S_DREQ;
+- } else {
+- dev_addr = c->cfg.dst_addr;
+- dev_width = c->cfg.dst_addr_width;
+- sync_type = BCM2835_DMA_D_DREQ;
+- }
+-
+- /* Bus width translates to the element size (ES) */
+- switch (dev_width) {
+- case DMA_SLAVE_BUSWIDTH_4_BYTES:
+- break;
+- default:
+- dev_err(chan->device->dev, "buswidth not supported: %i\n",
+- dev_width);
+- return NULL;
+- }
+-
+- /* Allocate and setup the descriptor. */
+- d = kzalloc(sizeof(*d), GFP_NOWAIT);
+- if (!d)
+- return NULL;
+-
+- d->dir = direction;
+-
+- if (c->ch >= 8) /* LITE channel */
+- max_size = MAX_LITE_TRANSFER;
+- else
+- max_size = MAX_NORMAL_TRANSFER;
+-
+- /*
+- * Store the length of the SG list in d->frames
+- * taking care to account for splitting up transfers
+- * too large for a LITE channel
+- */
+- d->frames = 0;
+- for_each_sg(sgl, sgent, sg_len, i) {
+- unsigned int len = sg_dma_len(sgent);
+-
+- d->frames += len / max_size + 1;
+- }
+-
+- /* Allocate memory for control blocks */
+- d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
+- d->control_block_base = dma_zalloc_coherent(chan->device->dev,
+- d->control_block_size, &d->control_block_base_phys,
+- GFP_NOWAIT);
+- if (!d->control_block_base) {
+- kfree(d);
+- return NULL;
+- }
+-
+- /*
+- * Iterate over all SG entries, create a control block
+- * for each frame and link them together.
+- * Count the number of times an SG entry had to be split
+- * as a result of using a LITE channel
+- */
+- split_cnt = 0;
+-
+- for_each_sg(sgl, sgent, sg_len, i) {
+- unsigned int j;
+- dma_addr_t addr = sg_dma_address(sgent);
+- unsigned int len = sg_dma_len(sgent);
+-
+- for (j = 0; j < len; j += max_size) {
+- struct bcm2835_dma_cb *control_block =
+- &d->control_block_base[i + split_cnt];
+-
+- /* Setup addresses */
+- if (d->dir == DMA_DEV_TO_MEM) {
+- control_block->info = BCM2835_DMA_D_INC |
+- BCM2835_DMA_D_WIDTH |
+- BCM2835_DMA_S_DREQ;
+- control_block->src = dev_addr;
+- control_block->dst = addr + (dma_addr_t)j;
+- } else {
+- control_block->info = BCM2835_DMA_S_INC |
+- BCM2835_DMA_S_WIDTH |
+- BCM2835_DMA_D_DREQ;
+- control_block->src = addr + (dma_addr_t)j;
+- control_block->dst = dev_addr;
+- }
+-
+- /* Common part */
+- control_block->info |=
+- BCM2835_DMA_WAITS(BCM2835_DMA_WAIT_CYCLES);
+- control_block->info |= BCM2835_DMA_WAIT_RESP;
+-
+- /* Enable */
+- if (i == sg_len - 1 && len - j <= max_size)
+- control_block->info |= BCM2835_DMA_INT_EN;
+-
+- /* Setup synchronization */
+- if (sync_type)
+- control_block->info |= sync_type;
+-
+- /* Setup DREQ channel */
+- if (c->dreq)
+- control_block->info |=
+- BCM2835_DMA_PER_MAP(c->dreq);
+-
+- /* Length of a frame */
+- control_block->length = min(len - j, max_size);
+- d->size += control_block->length;
+-
+- if (i < sg_len - 1 || len - j > max_size) {
+- /* Next block is the next frame. */
+- control_block->next =
+- d->control_block_base_phys +
+- sizeof(struct bcm2835_dma_cb) *
+- (i + split_cnt + 1);
+- } else {
+- /* Next block is empty. */
+- control_block->next = 0;
+- }
+-
+- if (len - j > max_size)
+- split_cnt++;
+- }
+- }
+-
+- c->cyclic = false;
+-
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+ error_cb:
+ i--;
+@@ -796,7 +620,6 @@ static int bcm2835_dma_probe(struct plat
+ od->ddev.device_tx_status = bcm2835_dma_tx_status;
+ od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
+ od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
+- od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
+ od->ddev.device_config = bcm2835_dma_slave_config;
+ od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
+ od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+@@ -886,5 +709,4 @@ module_platform_driver(bcm2835_dma_drive
+ MODULE_ALIAS("platform:bcm2835-dma");
+ MODULE_DESCRIPTION("BCM2835 DMA engine driver");
+ MODULE_AUTHOR("Florian Meier <florian.meier@koalo.de>");
+-MODULE_AUTHOR("Gellert Weisz <gellert@raspberrypi.org>");
+ MODULE_LICENSE("GPL v2");
--- /dev/null
+From dd06728c740cdeb3346a7b74d8a5924672ed6da1 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:56 -0700
+Subject: [PATCH 394/423] dmaengine: bcm2835: remove unnecessary masking of dma
+ channels
+
+The original patch contained 3 dma channels that were masked out.
+
+These - as far as research and discussions show - are a
+artefacts remaining from the downstream legacy dma-api.
+
+Right now down-stream still includes a legacy api used only
+in a single (downstream only) driver (bcm2708_fb) that requires
+2D DMA for speedup (DMA-channel 0).
+Formerly the sd-card support driver also was using this legacy
+api (DMA-channel 2), but since has been moved over to use
+dmaengine directly.
+
+The DMA-channel 3 is already masked out in the devicetree in
+the default property "brcm,dma-channel-mask = <0x7f35>;"
+
+So we can remove the whole masking of DMA channels.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 9 ---------
+ 1 file changed, 9 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -123,9 +123,6 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_DATA_TYPE_S32 4
+ #define BCM2835_DMA_DATA_TYPE_S128 16
+
+-#define BCM2835_DMA_BULK_MASK BIT(0)
+-#define BCM2835_DMA_FIQ_MASK (BIT(2) | BIT(3))
+-
+ /* Valid only for channels 0 - 14, 15 has its own base address */
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+@@ -641,12 +638,6 @@ static int bcm2835_dma_probe(struct plat
+ goto err_no_dma;
+ }
+
+- /*
+- * Do not use the FIQ and BULK channels,
+- * because they are used by the GPU.
+- */
+- chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
+-
+ for (i = 0; i < pdev->num_resources; i++) {
+ irq = platform_get_irq(pdev, i);
+ if (irq < 0)
--- /dev/null
+From b1f4d42406261ed1ddffbbf0582ebbfaf6c0a73b Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:57 -0700
+Subject: [PATCH 395/423] dmaengine: bcm2835: add additional defines for
+ DMA-registers
+
+Add additional defines describing the DMA registers
+as well as adding some more documentation to those registers.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 57 ++++++++++++++++++++++++++++++++++++++++-------
+ 1 file changed, 49 insertions(+), 8 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -97,26 +97,67 @@ struct bcm2835_desc {
+
+ #define BCM2835_DMA_CS 0x00
+ #define BCM2835_DMA_ADDR 0x04
++#define BCM2835_DMA_TI 0x08
+ #define BCM2835_DMA_SOURCE_AD 0x0c
+ #define BCM2835_DMA_DEST_AD 0x10
+-#define BCM2835_DMA_NEXTCB 0x1C
++#define BCM2835_DMA_LEN 0x14
++#define BCM2835_DMA_STRIDE 0x18
++#define BCM2835_DMA_NEXTCB 0x1c
++#define BCM2835_DMA_DEBUG 0x20
+
+ /* DMA CS Control and Status bits */
+-#define BCM2835_DMA_ACTIVE BIT(0)
+-#define BCM2835_DMA_INT BIT(2)
++#define BCM2835_DMA_ACTIVE BIT(0) /* activate the DMA */
++#define BCM2835_DMA_END BIT(1) /* current CB has ended */
++#define BCM2835_DMA_INT BIT(2) /* interrupt status */
++#define BCM2835_DMA_DREQ BIT(3) /* DREQ state */
+ #define BCM2835_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
+ #define BCM2835_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
+-#define BCM2835_DMA_ERR BIT(8)
++#define BCM2835_DMA_WAITING_FOR_WRITES BIT(6) /* waiting for last
++ * AXI-write to ack
++ */
++#define BCM2835_DMA_ERR BIT(8)
++#define BCM2835_DMA_PRIORITY(x) ((x & 15) << 16) /* AXI priority */
++#define BCM2835_DMA_PANIC_PRIORITY(x) ((x & 15) << 20) /* panic priority */
++/* current value of TI.BCM2835_DMA_WAIT_RESP */
++#define BCM2835_DMA_WAIT_FOR_WRITES BIT(28)
++#define BCM2835_DMA_DIS_DEBUG BIT(29) /* disable debug pause signal */
+ #define BCM2835_DMA_ABORT BIT(30) /* Stop current CB, go to next, WO */
+ #define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
+
++/* Transfer information bits - also bcm2835_cb.info field */
+ #define BCM2835_DMA_INT_EN BIT(0)
++#define BCM2835_DMA_TDMODE BIT(1) /* 2D-Mode */
++#define BCM2835_DMA_WAIT_RESP BIT(3) /* wait for AXI-write to be acked */
+ #define BCM2835_DMA_D_INC BIT(4)
+-#define BCM2835_DMA_D_DREQ BIT(6)
++#define BCM2835_DMA_D_WIDTH BIT(5) /* 128bit writes if set */
++#define BCM2835_DMA_D_DREQ BIT(6) /* enable DREQ for destination */
++#define BCM2835_DMA_D_IGNORE BIT(7) /* ignore destination writes */
+ #define BCM2835_DMA_S_INC BIT(8)
+-#define BCM2835_DMA_S_DREQ BIT(10)
++#define BCM2835_DMA_S_WIDTH BIT(9) /* 128bit writes if set */
++#define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
++#define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
++#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
++#define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */
++#define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */
++#define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
+
+-#define BCM2835_DMA_PER_MAP(x) ((x) << 16)
++/* debug register bits */
++#define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
++#define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
++#define BCM2835_DMA_DEBUG_READ_ERR BIT(2)
++#define BCM2835_DMA_DEBUG_OUTSTANDING_WRITES_SHIFT 4
++#define BCM2835_DMA_DEBUG_OUTSTANDING_WRITES_BITS 4
++#define BCM2835_DMA_DEBUG_ID_SHIFT 16
++#define BCM2835_DMA_DEBUG_ID_BITS 9
++#define BCM2835_DMA_DEBUG_STATE_SHIFT 16
++#define BCM2835_DMA_DEBUG_STATE_BITS 9
++#define BCM2835_DMA_DEBUG_VERSION_SHIFT 25
++#define BCM2835_DMA_DEBUG_VERSION_BITS 3
++#define BCM2835_DMA_DEBUG_LITE BIT(28)
++
++/* shared registers for all dma channels */
++#define BCM2835_DMA_INT_STATUS 0xfe0
++#define BCM2835_DMA_ENABLE 0xff0
+
+ #define BCM2835_DMA_DATA_TYPE_S8 1
+ #define BCM2835_DMA_DATA_TYPE_S16 2
--- /dev/null
+From 51fa7004613fc6a4567938f0a8358346ca602b5f Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:58 -0700
+Subject: [PATCH 396/423] dmaengine: bcm2835: move cyclic member from
+ bcm2835_chan into bcm2835_desc
+
+In preparation to consolidating code we move the cyclic member
+into the bcm_2835_desc structure.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -73,7 +73,6 @@ struct bcm2835_chan {
+ struct list_head node;
+
+ struct dma_slave_config cfg;
+- bool cyclic;
+ unsigned int dreq;
+
+ int ch;
+@@ -93,6 +92,8 @@ struct bcm2835_desc {
+
+ unsigned int frames;
+ size_t size;
++
++ bool cyclic;
+ };
+
+ #define BCM2835_DMA_CS 0x00
+@@ -377,8 +378,6 @@ static void bcm2835_dma_issue_pending(st
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ unsigned long flags;
+
+- c->cyclic = true; /* Nothing else is implemented */
+-
+ spin_lock_irqsave(&c->vc.lock, flags);
+ if (vchan_issue_pending(&c->vc) && !c->desc)
+ bcm2835_dma_start_desc(c);
+@@ -432,6 +431,7 @@ static struct dma_async_tx_descriptor *b
+ d->c = c;
+ d->dir = direction;
+ d->frames = buf_len / period_len;
++ d->cyclic = true;
+
+ d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+ if (!d->cb_list) {
--- /dev/null
+From b181092e7661f90e4777e0b858e601a33c1e5af9 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:59 -0700
+Subject: [PATCH 397/423] dmaengine: bcm2835: move controlblock chain
+ generation into separate method
+
+In preparation of adding slave_sg functionality this patch moves the
+generation/allocation of bcm2835_desc and the building of
+the corresponding DMA-control-block chain from bcm2835_dma_prep_dma_cyclic
+into the newly created method bcm2835_dma_create_cb_chain.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 294 +++++++++++++++++++++++++++++++---------------
+ 1 file changed, 198 insertions(+), 96 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -88,12 +88,12 @@ struct bcm2835_desc {
+ struct virt_dma_desc vd;
+ enum dma_transfer_direction dir;
+
+- struct bcm2835_cb_entry *cb_list;
+-
+ unsigned int frames;
+ size_t size;
+
+ bool cyclic;
++
++ struct bcm2835_cb_entry cb_list[];
+ };
+
+ #define BCM2835_DMA_CS 0x00
+@@ -169,6 +169,13 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+
++/* how many frames of max_len size do we need to transfer len bytes */
++static inline size_t bcm2835_dma_frames_for_length(size_t len,
++ size_t max_len)
++{
++ return DIV_ROUND_UP(len, max_len);
++}
++
+ static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+ {
+ return container_of(d, struct bcm2835_dmadev, ddev);
+@@ -185,19 +192,161 @@ static inline struct bcm2835_desc *to_bc
+ return container_of(t, struct bcm2835_desc, vd.tx);
+ }
+
+-static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
++static void bcm2835_dma_free_cb_chain(struct bcm2835_desc *desc)
+ {
+- struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd);
+- int i;
++ size_t i;
+
+ for (i = 0; i < desc->frames; i++)
+ dma_pool_free(desc->c->cb_pool, desc->cb_list[i].cb,
+ desc->cb_list[i].paddr);
+
+- kfree(desc->cb_list);
+ kfree(desc);
+ }
+
++static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
++{
++ bcm2835_dma_free_cb_chain(
++ container_of(vd, struct bcm2835_desc, vd));
++}
++
++static void bcm2835_dma_create_cb_set_length(
++ struct bcm2835_chan *chan,
++ struct bcm2835_dma_cb *control_block,
++ size_t len,
++ size_t period_len,
++ size_t *total_len,
++ u32 finalextrainfo)
++{
++ /* set the length */
++ control_block->length = len;
++
++ /* finished if we have no period_length */
++ if (!period_len)
++ return;
++
++ /*
++ * period_len means: that we need to generate
++ * transfers that are terminating at every
++ * multiple of period_len - this is typically
++ * used to set the interrupt flag in info
++ * which is required during cyclic transfers
++ */
++
++ /* have we filled in period_length yet? */
++ if (*total_len + control_block->length < period_len)
++ return;
++
++ /* calculate the length that remains to reach period_length */
++ control_block->length = period_len - *total_len;
++
++ /* reset total_length for next period */
++ *total_len = 0;
++
++ /* add extrainfo bits in info */
++ control_block->info |= finalextrainfo;
++}
++
++/**
++ * bcm2835_dma_create_cb_chain - create a control block and fills data in
++ *
++ * @chan: the @dma_chan for which we run this
++ * @direction: the direction in which we transfer
++ * @cyclic: it is a cyclic transfer
++ * @info: the default info bits to apply per controlblock
++ * @frames: number of controlblocks to allocate
++ * @src: the src address to assign (if the S_INC bit is set
++ * in @info, then it gets incremented)
++ * @dst: the dst address to assign (if the D_INC bit is set
++ * in @info, then it gets incremented)
++ * @buf_len: the full buffer length (may also be 0)
++ * @period_len: the period length when to apply @finalextrainfo
++ * in addition to the last transfer
++ * this will also break some control-blocks early
++ * @finalextrainfo: additional bits in last controlblock
++ * (or when period_len is reached in case of cyclic)
++ * @gfp: the GFP flag to use for allocation
++ */
++static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
++ struct dma_chan *chan, enum dma_transfer_direction direction,
++ bool cyclic, u32 info, u32 finalextrainfo, size_t frames,
++ dma_addr_t src, dma_addr_t dst, size_t buf_len,
++ size_t period_len, gfp_t gfp)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ size_t len = buf_len, total_len;
++ size_t frame;
++ struct bcm2835_desc *d;
++ struct bcm2835_cb_entry *cb_entry;
++ struct bcm2835_dma_cb *control_block;
++
++ /* allocate and setup the descriptor. */
++ d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
++ gfp);
++ if (!d)
++ return NULL;
++
++ d->c = c;
++ d->dir = direction;
++ d->cyclic = cyclic;
++
++ /*
++ * Iterate over all frames, create a control block
++ * for each frame and link them together.
++ */
++ for (frame = 0, total_len = 0; frame < frames; d->frames++, frame++) {
++ cb_entry = &d->cb_list[frame];
++ cb_entry->cb = dma_pool_alloc(c->cb_pool, gfp,
++ &cb_entry->paddr);
++ if (!cb_entry->cb)
++ goto error_cb;
++
++ /* fill in the control block */
++ control_block = cb_entry->cb;
++ control_block->info = info;
++ control_block->src = src;
++ control_block->dst = dst;
++ control_block->stride = 0;
++ control_block->next = 0;
++ /* set up length in control_block if requested */
++ if (buf_len) {
++ /* calculate length honoring period_length */
++ bcm2835_dma_create_cb_set_length(
++ c, control_block,
++ len, period_len, &total_len,
++ cyclic ? finalextrainfo : 0);
++
++ /* calculate new remaining length */
++ len -= control_block->length;
++ }
++
++ /* link this the last controlblock */
++ if (frame)
++ d->cb_list[frame - 1].cb->next = cb_entry->paddr;
++
++ /* update src and dst and length */
++ if (src && (info & BCM2835_DMA_S_INC))
++ src += control_block->length;
++ if (dst && (info & BCM2835_DMA_D_INC))
++ dst += control_block->length;
++
++ /* Length of total transfer */
++ d->size += control_block->length;
++ }
++
++ /* the last frame requires extra flags */
++ d->cb_list[d->frames - 1].cb->info |= finalextrainfo;
++
++ /* detect a size missmatch */
++ if (buf_len && (d->size != buf_len))
++ goto error_cb;
++
++ return d;
++error_cb:
++ bcm2835_dma_free_cb_chain(d);
++
++ return NULL;
++}
++
+ static int bcm2835_dma_abort(void __iomem *chan_base)
+ {
+ unsigned long cs;
+@@ -391,12 +540,11 @@ static struct dma_async_tx_descriptor *b
+ unsigned long flags)
+ {
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+- enum dma_slave_buswidth dev_width;
+ struct bcm2835_desc *d;
+- dma_addr_t dev_addr;
+- unsigned int es, sync_type;
+- unsigned int frame;
+- int i;
++ dma_addr_t src, dst;
++ u32 info = BCM2835_DMA_WAIT_RESP;
++ u32 extra = BCM2835_DMA_INT_EN;
++ size_t frames;
+
+ /* Grab configuration */
+ if (!is_slave_direction(direction)) {
+@@ -404,104 +552,58 @@ static struct dma_async_tx_descriptor *b
+ return NULL;
+ }
+
+- if (direction == DMA_DEV_TO_MEM) {
+- dev_addr = c->cfg.src_addr;
+- dev_width = c->cfg.src_addr_width;
+- sync_type = BCM2835_DMA_S_DREQ;
+- } else {
+- dev_addr = c->cfg.dst_addr;
+- dev_width = c->cfg.dst_addr_width;
+- sync_type = BCM2835_DMA_D_DREQ;
+- }
+-
+- /* Bus width translates to the element size (ES) */
+- switch (dev_width) {
+- case DMA_SLAVE_BUSWIDTH_4_BYTES:
+- es = BCM2835_DMA_DATA_TYPE_S32;
+- break;
+- default:
++ if (!buf_len) {
++ dev_err(chan->device->dev,
++ "%s: bad buffer length (= 0)\n", __func__);
+ return NULL;
+ }
+
+- /* Now allocate and setup the descriptor. */
+- d = kzalloc(sizeof(*d), GFP_NOWAIT);
+- if (!d)
+- return NULL;
+-
+- d->c = c;
+- d->dir = direction;
+- d->frames = buf_len / period_len;
+- d->cyclic = true;
++ /*
++ * warn if buf_len is not a multiple of period_len - this may leed
++ * to unexpected latencies for interrupts and thus audiable clicks
++ */
++ if (buf_len % period_len)
++ dev_warn_once(chan->device->dev,
++ "%s: buffer_length (%zd) is not a multiple of period_len (%zd)\n",
++ __func__, buf_len, period_len);
++
++ /* Setup DREQ channel */
++ if (c->dreq != 0)
++ info |= BCM2835_DMA_PER_MAP(c->dreq);
+
+- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+- if (!d->cb_list) {
+- kfree(d);
+- return NULL;
++ if (direction == DMA_DEV_TO_MEM) {
++ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ src = c->cfg.src_addr;
++ dst = buf_addr;
++ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
++ } else {
++ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ dst = c->cfg.dst_addr;
++ src = buf_addr;
++ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
+ }
+- /* Allocate memory for control blocks */
+- for (i = 0; i < d->frames; i++) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+
+- cb_entry->cb = dma_pool_zalloc(c->cb_pool, GFP_ATOMIC,
+- &cb_entry->paddr);
+- if (!cb_entry->cb)
+- goto error_cb;
+- }
++ /* calculate number of frames */
++ frames = DIV_ROUND_UP(buf_len, period_len);
+
+ /*
+- * Iterate over all frames, create a control block
+- * for each frame and link them together.
++ * allocate the CB chain
++ * note that we need to use GFP_NOWAIT, as the ALSA i2s dmaengine
++ * implementation calls prep_dma_cyclic with interrupts disabled.
+ */
+- for (frame = 0; frame < d->frames; frame++) {
+- struct bcm2835_dma_cb *control_block = d->cb_list[frame].cb;
+-
+- /* Setup adresses */
+- if (d->dir == DMA_DEV_TO_MEM) {
+- control_block->info = BCM2835_DMA_D_INC;
+- control_block->src = dev_addr;
+- control_block->dst = buf_addr + frame * period_len;
+- } else {
+- control_block->info = BCM2835_DMA_S_INC;
+- control_block->src = buf_addr + frame * period_len;
+- control_block->dst = dev_addr;
+- }
+-
+- /* Enable interrupt */
+- control_block->info |= BCM2835_DMA_INT_EN;
+-
+- /* Setup synchronization */
+- if (sync_type != 0)
+- control_block->info |= sync_type;
+-
+- /* Setup DREQ channel */
+- if (c->dreq != 0)
+- control_block->info |=
+- BCM2835_DMA_PER_MAP(c->dreq);
+-
+- /* Length of a frame */
+- control_block->length = period_len;
+- d->size += control_block->length;
++ d = bcm2835_dma_create_cb_chain(chan, direction, true,
++ info, extra,
++ frames, src, dst, buf_len,
++ period_len, GFP_NOWAIT);
++ if (!d)
++ return NULL;
+
+- /*
+- * Next block is the next frame.
+- * This DMA engine driver currently only supports cyclic DMA.
+- * Therefore, wrap around at number of frames.
+- */
+- control_block->next = d->cb_list[((frame + 1) % d->frames)].paddr;
+- }
++ /* wrap around into a loop */
++ d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr;
+
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+-error_cb:
+- i--;
+- for (; i >= 0; i--) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+-
+- dma_pool_free(c->cb_pool, cb_entry->cb, cb_entry->paddr);
+- }
+-
+- kfree(d->cb_list);
+- kfree(d);
+- return NULL;
+ }
+
+ static int bcm2835_dma_slave_config(struct dma_chan *chan,
--- /dev/null
+From 930015dce415e4203daeafb09c24759ac883613e Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:25:00 -0700
+Subject: [PATCH 398/423] dmaengine: bcm2835: limit max length based on channel
+ type
+
+The bcm2835 dma system has 2 basic types of dma-channels:
+* "normal" channels
+* "light" channels
+
+Lite channels are limited in several aspects:
+* internal data-structure is 128 bit (not 256)
+* does not support BCM2835_DMA_TDMODE (2D)
+* DMA length register is limited to 16 bit.
+ so 0-65535 (not 0-65536 as mentioned in the official datasheet)
+* BCM2835_DMA_S/D_IGNORE are not supported
+
+The detection of the type of mode is implemented by looking at
+the LITE bit in the DEBUG register for each channel.
+This allows automatic detection.
+
+Based on this the maximum block size is set to (64K - 4) or to 1G
+and this limit is honored during generation of control block
+chains. The effect is that when a LITE channel is used more
+control blocks are used to do the same transfer (compared
+to a normal channel).
+
+As there are several sources/target DREQS that are 32 bit wide
+we need to have the transfer to be a multiple of 4 as this would
+break the transfer otherwise.
+
+This is why the limit of (64K - 4) was chosen over the
+alternative of (64K - 4K).
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 29 ++++++++++++++++++++++++++---
+ 1 file changed, 26 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -81,6 +81,8 @@ struct bcm2835_chan {
+
+ void __iomem *chan_base;
+ int irq_number;
++
++ bool is_lite_channel;
+ };
+
+ struct bcm2835_desc {
+@@ -169,6 +171,16 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+
++/* the max dma length for different channels */
++#define MAX_DMA_LEN SZ_1G
++#define MAX_LITE_DMA_LEN (SZ_64K - 4)
++
++static inline size_t bcm2835_dma_max_frame_length(struct bcm2835_chan *c)
++{
++ /* lite and normal channels have different max frame length */
++ return c->is_lite_channel ? MAX_LITE_DMA_LEN : MAX_DMA_LEN;
++}
++
+ /* how many frames of max_len size do we need to transfer len bytes */
+ static inline size_t bcm2835_dma_frames_for_length(size_t len,
+ size_t max_len)
+@@ -217,8 +229,10 @@ static void bcm2835_dma_create_cb_set_le
+ size_t *total_len,
+ u32 finalextrainfo)
+ {
+- /* set the length */
+- control_block->length = len;
++ size_t max_len = bcm2835_dma_max_frame_length(chan);
++
++ /* set the length taking lite-channel limitations into account */
++ control_block->length = min_t(u32, len, max_len);
+
+ /* finished if we have no period_length */
+ if (!period_len)
+@@ -544,6 +558,7 @@ static struct dma_async_tx_descriptor *b
+ dma_addr_t src, dst;
+ u32 info = BCM2835_DMA_WAIT_RESP;
+ u32 extra = BCM2835_DMA_INT_EN;
++ size_t max_len = bcm2835_dma_max_frame_length(c);
+ size_t frames;
+
+ /* Grab configuration */
+@@ -586,7 +601,10 @@ static struct dma_async_tx_descriptor *b
+ }
+
+ /* calculate number of frames */
+- frames = DIV_ROUND_UP(buf_len, period_len);
++ frames = /* number of periods */
++ DIV_ROUND_UP(buf_len, period_len) *
++ /* number of frames per period */
++ bcm2835_dma_frames_for_length(period_len, max_len);
+
+ /*
+ * allocate the CB chain
+@@ -685,6 +703,11 @@ static int bcm2835_dma_chan_init(struct
+ c->ch = chan_id;
+ c->irq_number = irq;
+
++ /* check in DEBUG register if this is a LITE channel */
++ if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
++ BCM2835_DMA_DEBUG_LITE)
++ c->is_lite_channel = true;
++
+ return 0;
+ }
+
--- /dev/null
+From 7cd84b455f4681e4db6cd9e3cd628bcd06df0978 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:25:01 -0700
+Subject: [PATCH 399/423] dmaengine: bcm2835: add slave_sg support to
+ bcm2835-dma
+
+Add slave_sg support to bcm2835-dma using shared allocation
+code for bcm2835_desc and DMA-control blocks already used by
+dma_cyclic.
+
+Note that bcm2835_dma_callback had to get modified to support
+both modes of operation (cyclic and non-cyclic).
+
+Tested using:
+* Hifiberry I2S card (using cyclic DMA)
+* fb_st7735r SPI-framebuffer (using slave_sg DMA via spi-bcm2835)
+playing BigBuckBunny for audio and video.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 113 ++++++++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 108 insertions(+), 5 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -260,6 +260,23 @@ static void bcm2835_dma_create_cb_set_le
+ control_block->info |= finalextrainfo;
+ }
+
++static inline size_t bcm2835_dma_count_frames_for_sg(
++ struct bcm2835_chan *c,
++ struct scatterlist *sgl,
++ unsigned int sg_len)
++{
++ size_t frames = 0;
++ struct scatterlist *sgent;
++ unsigned int i;
++ size_t plength = bcm2835_dma_max_frame_length(c);
++
++ for_each_sg(sgl, sgent, sg_len, i)
++ frames += bcm2835_dma_frames_for_length(
++ sg_dma_len(sgent), plength);
++
++ return frames;
++}
++
+ /**
+ * bcm2835_dma_create_cb_chain - create a control block and fills data in
+ *
+@@ -361,6 +378,32 @@ error_cb:
+ return NULL;
+ }
+
++static void bcm2835_dma_fill_cb_chain_with_sg(
++ struct dma_chan *chan,
++ enum dma_transfer_direction direction,
++ struct bcm2835_cb_entry *cb,
++ struct scatterlist *sgl,
++ unsigned int sg_len)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ size_t max_len = bcm2835_dma_max_frame_length(c);
++ unsigned int i, len;
++ dma_addr_t addr;
++ struct scatterlist *sgent;
++
++ for_each_sg(sgl, sgent, sg_len, i) {
++ for (addr = sg_dma_address(sgent), len = sg_dma_len(sgent);
++ len > 0;
++ addr += cb->cb->length, len -= cb->cb->length, cb++) {
++ if (direction == DMA_DEV_TO_MEM)
++ cb->cb->dst = addr;
++ else
++ cb->cb->src = addr;
++ cb->cb->length = min(len, max_len);
++ }
++ }
++}
++
+ static int bcm2835_dma_abort(void __iomem *chan_base)
+ {
+ unsigned long cs;
+@@ -428,13 +471,19 @@ static irqreturn_t bcm2835_dma_callback(
+ d = c->desc;
+
+ if (d) {
+- /* TODO Only works for cyclic DMA */
+- vchan_cyclic_callback(&d->vd);
++ if (d->cyclic) {
++ /* call the cyclic callback */
++ vchan_cyclic_callback(&d->vd);
++
++ /* Keep the DMA engine running */
++ writel(BCM2835_DMA_ACTIVE,
++ c->chan_base + BCM2835_DMA_CS);
++ } else {
++ vchan_cookie_complete(&c->desc->vd);
++ bcm2835_dma_start_desc(c);
++ }
+ }
+
+- /* Keep the DMA engine running */
+- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
+-
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return IRQ_HANDLED;
+@@ -548,6 +597,58 @@ static void bcm2835_dma_issue_pending(st
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+ }
+
++static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
++ struct dma_chan *chan,
++ struct scatterlist *sgl, unsigned int sg_len,
++ enum dma_transfer_direction direction,
++ unsigned long flags, void *context)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ struct bcm2835_desc *d;
++ dma_addr_t src = 0, dst = 0;
++ u32 info = BCM2835_DMA_WAIT_RESP;
++ u32 extra = BCM2835_DMA_INT_EN;
++ size_t frames;
++
++ if (!is_slave_direction(direction)) {
++ dev_err(chan->device->dev,
++ "%s: bad direction?\n", __func__);
++ return NULL;
++ }
++
++ if (c->dreq != 0)
++ info |= BCM2835_DMA_PER_MAP(c->dreq);
++
++ if (direction == DMA_DEV_TO_MEM) {
++ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ src = c->cfg.src_addr;
++ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
++ } else {
++ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ dst = c->cfg.dst_addr;
++ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
++ }
++
++ /* count frames in sg list */
++ frames = bcm2835_dma_count_frames_for_sg(c, sgl, sg_len);
++
++ /* allocate the CB chain */
++ d = bcm2835_dma_create_cb_chain(chan, direction, false,
++ info, extra,
++ frames, src, dst, 0, 0,
++ GFP_KERNEL);
++ if (!d)
++ return NULL;
++
++ /* fill in frames with scatterlist pointers */
++ bcm2835_dma_fill_cb_chain_with_sg(chan, direction, d->cb_list,
++ sgl, sg_len);
++
++ return vchan_tx_prep(&c->vc, &d->vd, flags);
++}
++
+ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
+ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
+ size_t period_len, enum dma_transfer_direction direction,
+@@ -778,11 +879,13 @@ static int bcm2835_dma_probe(struct plat
+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+ dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
+ dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
++ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+ od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
+ od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
+ od->ddev.device_tx_status = bcm2835_dma_tx_status;
+ od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
+ od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
++ od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
+ od->ddev.device_config = bcm2835_dma_slave_config;
+ od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
+ od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
--- /dev/null
+From ce27d8ba202467a2b811de711ed95d17b2bb27e5 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:25:02 -0700
+Subject: [PATCH 400/423] dmaengine: bcm2835: add dma_memcopy support to
+ bcm2835-dma
+
+Also added check for an error condition in bcm2835_dma_create_cb_chain
+that showed up during development of this patch.
+
+Tested using dmatest for all enabled channels.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 36 +++++++++++++++++++++++++++++++++++-
+ 1 file changed, 35 insertions(+), 1 deletion(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -310,6 +310,9 @@ static struct bcm2835_desc *bcm2835_dma_
+ struct bcm2835_cb_entry *cb_entry;
+ struct bcm2835_dma_cb *control_block;
+
++ if (!frames)
++ return NULL;
++
+ /* allocate and setup the descriptor. */
+ d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
+ gfp);
+@@ -597,6 +600,34 @@ static void bcm2835_dma_issue_pending(st
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+ }
+
++struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_memcpy(
++ struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
++ size_t len, unsigned long flags)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ struct bcm2835_desc *d;
++ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
++ u32 extra = BCM2835_DMA_INT_EN | BCM2835_DMA_WAIT_RESP;
++ size_t max_len = bcm2835_dma_max_frame_length(c);
++ size_t frames;
++
++ /* if src, dst or len is not given return with an error */
++ if (!src || !dst || !len)
++ return NULL;
++
++ /* calculate number of frames */
++ frames = bcm2835_dma_frames_for_length(len, max_len);
++
++ /* allocate the CB chain - this also fills in the pointers */
++ d = bcm2835_dma_create_cb_chain(chan, DMA_MEM_TO_MEM, false,
++ info, extra, frames,
++ src, dst, len, 0, GFP_KERNEL);
++ if (!d)
++ return NULL;
++
++ return vchan_tx_prep(&c->vc, &d->vd, flags);
++}
++
+ static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
+ struct dma_chan *chan,
+ struct scatterlist *sgl, unsigned int sg_len,
+@@ -880,17 +911,20 @@ static int bcm2835_dma_probe(struct plat
+ dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
+ dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
++ dma_cap_set(DMA_MEMCPY, od->ddev.cap_mask);
+ od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
+ od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
+ od->ddev.device_tx_status = bcm2835_dma_tx_status;
+ od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
+ od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
+ od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
++ od->ddev.device_prep_dma_memcpy = bcm2835_dma_prep_dma_memcpy;
+ od->ddev.device_config = bcm2835_dma_slave_config;
+ od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
+ od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+ od->ddev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+- od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
++ od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
++ BIT(DMA_MEM_TO_MEM);
+ od->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
+ od->ddev.dev = &pdev->dev;
+ INIT_LIST_HEAD(&od->ddev.channels);
--- /dev/null
+From 1e4008ef44653e552ce20969322fc271a2b52fe4 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 11 Apr 2016 13:29:08 +0000
+Subject: [PATCH 401/423] dmaengine: bcm2835: use platform_get_irq_byname
+
+Use platform_get_irq_byname to allow for correct mapping of
+interrupts to dma channels.
+
+The currently implemented device tree is unfortunately
+implemented with the wrong assumption, that each dma-channel
+has its own dma channel, but dma-irq 11 is handling
+dma-channel 11-14 and dma-irq 12 is actually a "catch all"
+interrupt.
+
+So here we use the byname variant and require that interrupts
+are explicitly named via the interrupts-name property in the
+device tree.
+
+The use of shared interrupts is also implemented.
+
+As a side-effect this means we can now use dma channels 12, 13 and 14
+in a correct manner - also testing shows that onl using
+channels 11 to 14 for spi and i2s works perfectly (when playing
+some video)
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Acked-by: Eric Anholt <eric@anholt.net>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 77 ++++++++++++++++++++++++++++++++++++++---------
+ 1 file changed, 63 insertions(+), 14 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -46,6 +46,9 @@
+
+ #include "virt-dma.h"
+
++#define BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED 14
++#define BCM2835_DMA_CHAN_NAME_SIZE 8
++
+ struct bcm2835_dmadev {
+ struct dma_device ddev;
+ spinlock_t lock;
+@@ -81,6 +84,7 @@ struct bcm2835_chan {
+
+ void __iomem *chan_base;
+ int irq_number;
++ unsigned int irq_flags;
+
+ bool is_lite_channel;
+ };
+@@ -466,6 +470,15 @@ static irqreturn_t bcm2835_dma_callback(
+ struct bcm2835_desc *d;
+ unsigned long flags;
+
++ /* check the shared interrupt */
++ if (c->irq_flags & IRQF_SHARED) {
++ /* check if the interrupt is enabled */
++ flags = readl(c->chan_base + BCM2835_DMA_CS);
++ /* if not set then we are not the reason for the irq */
++ if (!(flags & BCM2835_DMA_INT))
++ return IRQ_NONE;
++ }
++
+ spin_lock_irqsave(&c->vc.lock, flags);
+
+ /* Acknowledge interrupt */
+@@ -506,8 +519,8 @@ static int bcm2835_dma_alloc_chan_resour
+ return -ENOMEM;
+ }
+
+- return request_irq(c->irq_number,
+- bcm2835_dma_callback, 0, "DMA IRQ", c);
++ return request_irq(c->irq_number, bcm2835_dma_callback,
++ c->irq_flags, "DMA IRQ", c);
+ }
+
+ static void bcm2835_dma_free_chan_resources(struct dma_chan *chan)
+@@ -819,7 +832,8 @@ static int bcm2835_dma_terminate_all(str
+ return 0;
+ }
+
+-static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq)
++static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id,
++ int irq, unsigned int irq_flags)
+ {
+ struct bcm2835_chan *c;
+
+@@ -834,6 +848,7 @@ static int bcm2835_dma_chan_init(struct
+ c->chan_base = BCM2835_DMA_CHANIO(d->base, chan_id);
+ c->ch = chan_id;
+ c->irq_number = irq;
++ c->irq_flags = irq_flags;
+
+ /* check in DEBUG register if this is a LITE channel */
+ if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
+@@ -882,9 +897,11 @@ static int bcm2835_dma_probe(struct plat
+ struct resource *res;
+ void __iomem *base;
+ int rc;
+- int i;
+- int irq;
++ int i, j;
++ int irq[BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED + 1];
++ int irq_flags;
+ uint32_t chans_available;
++ char chan_name[BCM2835_DMA_CHAN_NAME_SIZE];
+
+ if (!pdev->dev.dma_mask)
+ pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
+@@ -941,16 +958,48 @@ static int bcm2835_dma_probe(struct plat
+ goto err_no_dma;
+ }
+
+- for (i = 0; i < pdev->num_resources; i++) {
+- irq = platform_get_irq(pdev, i);
+- if (irq < 0)
+- break;
+-
+- if (chans_available & (1 << i)) {
+- rc = bcm2835_dma_chan_init(od, i, irq);
+- if (rc)
+- goto err_no_dma;
++ /* get irqs for each channel that we support */
++ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) {
++ /* skip masked out channels */
++ if (!(chans_available & (1 << i))) {
++ irq[i] = -1;
++ continue;
+ }
++
++ /* get the named irq */
++ snprintf(chan_name, sizeof(chan_name), "dma%i", i);
++ irq[i] = platform_get_irq_byname(pdev, chan_name);
++ if (irq[i] >= 0)
++ continue;
++
++ /* legacy device tree case handling */
++ dev_warn_once(&pdev->dev,
++ "missing interrupts-names property in device tree - legacy interpretation is used");
++ /*
++ * in case of channel >= 11
++ * use the 11th interrupt and that is shared
++ */
++ irq[i] = platform_get_irq(pdev, i < 11 ? i : 11);
++ }
++
++ /* get irqs for each channel */
++ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) {
++ /* skip channels without irq */
++ if (irq[i] < 0)
++ continue;
++
++ /* check if there are other channels that also use this irq */
++ irq_flags = 0;
++ for (j = 0; j <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; j++)
++ if ((i != j) && (irq[j] == irq[i])) {
++ irq_flags = IRQF_SHARED;
++ break;
++ }
++
++ /* initialize the channel */
++ rc = bcm2835_dma_chan_init(od, i, irq[i], irq_flags);
++ if (rc)
++ goto err_no_dma;
+ }
+
+ dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i);
--- /dev/null
+From b0ad872cdb56e3dfd36ec2fbd0aad0375609bb0f Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
+Date: Sat, 3 Oct 2015 22:22:55 +0200
+Subject: [PATCH 402/423] dmaengine: bcm2835: Load driver early and support
+ legacy API
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Load driver early since at least bcm2708_fb doesn't support deferred
+probing and even if it did, we don't want the video driver deferred.
+
+Support the legacy DMA API which is needed by bcm2708_fb
+(but only using the dedicated dma channel 0).
+
+Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ drivers/dma/Kconfig | 2 +-
+ drivers/dma/bcm2835-dma.c | 27 ++++++++++++++++++++++++++-
+ 2 files changed, 27 insertions(+), 2 deletions(-)
+
+--- a/drivers/dma/Kconfig
++++ b/drivers/dma/Kconfig
+@@ -108,7 +108,7 @@ config COH901318
+
+ config DMA_BCM2835
+ tristate "BCM2835 DMA engine support"
+- depends on ARCH_BCM2835
++ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -37,6 +37,7 @@
+ #include <linux/interrupt.h>
+ #include <linux/list.h>
+ #include <linux/module.h>
++#include <linux/platform_data/dma-bcm2708.h>
+ #include <linux/platform_device.h>
+ #include <linux/slab.h>
+ #include <linux/io.h>
+@@ -1021,6 +1022,14 @@ static int bcm2835_dma_probe(struct plat
+
+ dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n");
+
++ /* load the legacy api if bit 0 in the mask is cleared */
++ if ((chans_available & BIT(0)) == 0) {
++ rc = bcm_dmaman_probe(pdev, base, BIT(0));
++ if (rc)
++ dev_err(&pdev->dev,
++ "Failed to initialize the legacy API\n");
++ }
++
+ return 0;
+
+ err_no_dma:
+@@ -1032,6 +1041,7 @@ static int bcm2835_dma_remove(struct pla
+ {
+ struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
+
++ bcm_dmaman_remove(pdev);
+ dma_async_device_unregister(&od->ddev);
+ bcm2835_dma_free(od);
+
+@@ -1047,7 +1057,22 @@ static struct platform_driver bcm2835_dm
+ },
+ };
+
+-module_platform_driver(bcm2835_dma_driver);
++static int bcm2835_dma_init(void)
++{
++ return platform_driver_register(&bcm2835_dma_driver);
++}
++
++static void bcm2835_dma_exit(void)
++{
++ platform_driver_unregister(&bcm2835_dma_driver);
++}
++
++/*
++ * Load after serial driver (arch_initcall) so we see the messages if it fails,
++ * but before drivers (module_init) that need a DMA channel.
++ */
++subsys_initcall(bcm2835_dma_init);
++module_exit(bcm2835_dma_exit);
+
+ MODULE_ALIAS("platform:bcm2835-dma");
+ MODULE_DESCRIPTION("BCM2835 DMA engine driver");
--- /dev/null
+From 397377a39914146b6c7ac085436fbc948c39b0ff Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 16:13:59 +0000
+Subject: [PATCH 403/423] ARM: bcm270x: changed bcrm,dma-channel-mask to mask
+ out the used channel
+
+Dma channel0 is used by the legacy api - to avoid confilcts this
+needs to get masked out in the device-tree instead of hardcoding it
+in the driver.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -59,7 +59,7 @@
+ <1 27>;
+
+ #dma-cells = <1>;
+- brcm,dma-channel-mask = <0x0f35>;
++ brcm,dma-channel-mask = <0x0f34>;
+ };
+
+ intc: interrupt-controller@7e00b200 {
--- /dev/null
+From b11585bc1bd969c750b3f02fd15a584b463602f8 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sat, 23 Apr 2016 14:07:03 +0000
+Subject: [PATCH 404/423] ARM: bcm2835: add interrupt-names and apply correct
+ mapping
+
+Add interrupt-names properties to dt and apply the correct
+mapping between irq and dma channels.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 26 ++++++++++++++++++++++++--
+ 1 file changed, 24 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -56,10 +56,32 @@
+ <1 24>,
+ <1 25>,
+ <1 26>,
+- <1 27>;
++ /* dma channel 11-14 share one irq */
++ <1 27>,
++ <1 27>,
++ <1 27>,
++ <1 27>,
++ /* unused shared irq for all channels */
++ <1 28>;
++ interrupt-names = "dma0",
++ "dma1",
++ "dma2",
++ "dma3",
++ "dma4",
++ "dma5",
++ "dma6",
++ "dma7",
++ "dma8",
++ "dma9",
++ "dma10",
++ "dma11",
++ "dma12",
++ "dma13",
++ "dma14",
++ "dma-shared-all";
+
+ #dma-cells = <1>;
+- brcm,dma-channel-mask = <0x0f34>;
++ brcm,dma-channel-mask = <0x7f34>;
+ };
+
+ intc: interrupt-controller@7e00b200 {
--- /dev/null
+From 2ebd83e6f79690289068f691c2ad67db4e40deca Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sat, 23 Apr 2016 14:20:41 +0000
+Subject: [PATCH 405/423] ARM: bcm2835: make dma-channel-0 available for kms
+ setups
+
+Enable the use of dma-channel 0 when using the vc4-kms-v3d overlay.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -119,6 +119,13 @@
+ };
+ };
+
++ fragment@15 {
++ target-path = "/soc/dma";
++ __overlay__ {
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++ };
++
+ __overrides__ {
+ cma-256 = <0>,"+0-1-2-3-4";
+ cma-192 = <0>,"-0+1-2-3-4";
--- /dev/null
+From 74d0d3161d711b51be692cf1750b6eb60719f782 Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Tue, 7 Jun 2016 19:37:10 +0200
+Subject: [PATCH 406/423] dmaengine: bcm2835: Fix cyclic DMA period splitting
+
+The code responsible for splitting periods into chunks that
+can be handled by the DMA controller missed to update total_len,
+the number of bytes processed in the current period, when there
+are more chunks to follow.
+
+Therefore total_len was stuck at 0 and the code didn't work at all.
+This resulted in a wrong control block layout and audio issues because
+the cyclic DMA callback wasn't executing on period boundaries.
+
+Fix this by adding the missing total_len update.
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
+---
+ drivers/dma/bcm2835-dma.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -252,8 +252,11 @@ static void bcm2835_dma_create_cb_set_le
+ */
+
+ /* have we filled in period_length yet? */
+- if (*total_len + control_block->length < period_len)
++ if (*total_len + control_block->length < period_len) {
++ /* update number of bytes in this period so far */
++ *total_len += control_block->length;
+ return;
++ }
+
+ /* calculate the length that remains to reach period_length */
+ control_block->length = period_len - *total_len;
--- /dev/null
+From 6bcfb541bbf5398f91d426c9e6c0e3817d18bb8e Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Wed, 8 Jun 2016 13:09:56 +0200
+Subject: [PATCH 407/423] dmaengine: bcm2835: Avoid splitting periods into very
+ small chunks
+
+The current cyclic DMA period splitting implementation can generate
+very small chunks at the end of each period. For example a 65536 byte
+period will be split into a 65532 byte chunk and a 4 byte chunk on
+the "lite" DMA channels.
+
+This increases pressure on the RAM controller as the DMA controller
+needs to fetch two control blocks from RAM in quick succession and
+could potentially cause latency issues if the RAM is tied up by other
+devices.
+
+We can easily avoid these situations by distributing the remaining
+length evenly between the last-but-one and the last chunk, making
+sure that split chunks will be at least half the maximum length the
+DMA controller can handle.
+
+This patch checks if the last chunk would be less than half of
+the maximum DMA length and if yes distributes the max len+4...max_len*1.5
+bytes evenly between the last 2 chunks. This results in chunk sizes
+between max_len/2 and max_len*0.75 bytes.
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
+---
+ drivers/dma/bcm2835-dma.c | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -253,6 +253,20 @@ static void bcm2835_dma_create_cb_set_le
+
+ /* have we filled in period_length yet? */
+ if (*total_len + control_block->length < period_len) {
++ /*
++ * If the next control block is the last in the period
++ * and it's length would be less than half of max_len
++ * change it so that both control blocks are (almost)
++ * equally long. This avoids generating very short
++ * control blocks (worst case would be 4 bytes) which
++ * might be problematic. We also have to make sure the
++ * new length is a multiple of 4 bytes.
++ */
++ if (*total_len + control_block->length + max_len / 2 >
++ period_len) {
++ control_block->length =
++ DIV_ROUND_UP(period_len - *total_len, 8) * 4;
++ }
+ /* update number of bytes in this period so far */
+ *total_len += control_block->length;
+ return;
--- /dev/null
+From 467c8219ee56e75ab53f29b569f9fb5d033f57d4 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 3 Jun 2016 19:29:11 -0700
+Subject: [PATCH 408/423] dmaengine: bcm2835: Fix polling for completion of DMA
+ with interrupts masked.
+
+The tx_status hook is supposed to be safe to call from interrupt
+context, but it wouldn't ever return completion for the last transfer,
+meaning you couldn't poll for DMA completion with interrupts masked.
+
+This fixes IRQ handling for bcm2835's DSI1, which requires using the
+DMA engine to write its registers due to a bug in the AXI bridge.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/dma/bcm2835-dma.c | 24 +++++++++++++++++++-----
+ 1 file changed, 19 insertions(+), 5 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -588,16 +588,16 @@ static enum dma_status bcm2835_dma_tx_st
+ struct virt_dma_desc *vd;
+ enum dma_status ret;
+ unsigned long flags;
++ u32 residue;
+
+ ret = dma_cookie_status(chan, cookie, txstate);
+- if (ret == DMA_COMPLETE || !txstate)
++ if (ret == DMA_COMPLETE)
+ return ret;
+
+ spin_lock_irqsave(&c->vc.lock, flags);
+ vd = vchan_find_desc(&c->vc, cookie);
+ if (vd) {
+- txstate->residue =
+- bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
++ residue = bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
+ } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
+ struct bcm2835_desc *d = c->desc;
+ dma_addr_t pos;
+@@ -609,11 +609,25 @@ static enum dma_status bcm2835_dma_tx_st
+ else
+ pos = 0;
+
+- txstate->residue = bcm2835_dma_desc_size_pos(d, pos);
++ residue = bcm2835_dma_desc_size_pos(d, pos);
++
++ /*
++ * If our non-cyclic transfer is done, then report
++ * complete and trigger the next tx now. This lets
++ * the dmaengine API be used synchronously from an IRQ
++ * handler.
++ */
++ if (!d->cyclic && residue == 0) {
++ vchan_cookie_complete(&c->desc->vd);
++ bcm2835_dma_start_desc(c);
++ ret = dma_cookie_status(chan, cookie, txstate);
++ }
+ } else {
+- txstate->residue = 0;
++ residue = 0;
+ }
+
++ dma_set_residue(txstate, residue);
++
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return ret;
--- /dev/null
+From ae24592f7b8e0af654a25d18a8d26cd0e5799fdb Mon Sep 17 00:00:00 2001
+From: Thomas Kriechbaumer <thomas@kriechbaumer.name>
+Date: Fri, 3 Jun 2016 09:40:44 +0200
+Subject: [PATCH 410/423] BCM270X_DT: Add spi-rtc overlay on SPI0.0
+
+Initial version only supports PCF2123 RTC.
+
+See: https://github.com/raspberrypi/linux/pull/1510
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +++++
+ arch/arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 ++++++++++++++++++++++++++
+ 3 files changed, 40 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -78,6 +78,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -975,6 +975,12 @@ Load: dtoverlay=spi-gpio35-39
+ Params: <None>
+
+
++Name: spi-rtc
++Info: Adds support for a number of SPI Real Time Clock devices
++Load: dtoverlay=spi-rtc,<param>=<val>
++Params: pcf2123 Select the PCF2123 device
++
++
+ Name: spi1-1cs
+ Info: Enables spi1 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
+@@ -0,0 +1,33 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment@1 {
++ target = <&spi0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ rtc-pcf2123@0 {
++ compatible = "nxp,rtc-pcf2123";
++ spi-max-frequency = <5000000>;
++ spi-cs-high = <1>;
++ reg = <0>;
++ };
++ };
++ };
++
++ __overrides__ {
++ pcf2123 = <0>, "=0=1";
++ };
++};
--- /dev/null
+From 2306db770d37cfaa8fe2805febe84a504709fac8 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 15 Jun 2016 16:48:41 +0100
+Subject: [PATCH 411/423] rtc: Add SPI alias for pcf2123 driver
+
+Without this alias, Device Tree won't cause the driver
+to be loaded.
+
+See: https://github.com/raspberrypi/linux/pull/1510
+---
+ drivers/rtc/rtc-pcf2123.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/rtc/rtc-pcf2123.c
++++ b/drivers/rtc/rtc-pcf2123.c
+@@ -358,3 +358,4 @@ MODULE_AUTHOR("Chris Verges <chrisv@cybe
+ MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
+ MODULE_LICENSE("GPL");
+ MODULE_VERSION(DRV_VERSION);
++MODULE_ALIAS("spi:rtc-pcf2123");
--- /dev/null
+From 5f16fa4548512193704eb5480bf93f6badc803bd Mon Sep 17 00:00:00 2001
+From: Matt Flax <flatmax@flatmax.org>
+Date: Fri, 17 Jun 2016 12:03:39 +1000
+Subject: [PATCH 412/423] Added support for headphones, microphone and
+ bclk_ratio settings.
+
+This patch adds headphone and microphone capability to the Audio Injector sound card. The patch also sets the bit clock ratio for use in the bcm2835-i2s driver. The bcm2835-i2s can't handle an 8 kHz sample rate when the bit clock is at 12 MHz because its register is only 10 bits wide which can't represent the ch2 offset of 1508. For that reason, the rate constraint is added.
+---
+ sound/soc/bcm/audioinjector-pi-soundcard.c | 67 ++++++++++++++++++++++++++----
+ 1 file changed, 58 insertions(+), 9 deletions(-)
+
+--- a/sound/soc/bcm/audioinjector-pi-soundcard.c
++++ b/sound/soc/bcm/audioinjector-pi-soundcard.c
+@@ -29,16 +29,56 @@
+
+ #include "../codecs/wm8731.h"
+
+-static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
++static const unsigned int bcm2835_rates_12000000[] = {
++ 32000, 44100, 48000, 96000, 88200,
++};
++
++static struct snd_pcm_hw_constraint_list bcm2835_constraints_12000000 = {
++ .list = bcm2835_rates_12000000,
++ .count = ARRAY_SIZE(bcm2835_rates_12000000),
++};
++
++static int snd_audioinjector_pi_soundcard_startup(struct snd_pcm_substream *substream)
+ {
+- struct snd_soc_dapm_context *dapm = &rtd->card->dapm;
++ /* Setup constraints, because there is a 12 MHz XTAL on the board */
++ snd_pcm_hw_constraint_list(substream->runtime, 0,
++ SNDRV_PCM_HW_PARAM_RATE,
++ &bcm2835_constraints_12000000);
++ return 0;
++}
+
+- // not connected
+- snd_soc_dapm_nc_pin(dapm, "Mic Bias");
+- snd_soc_dapm_nc_pin(dapm, "MICIN");
+- snd_soc_dapm_nc_pin(dapm, "RHPOUT");
+- snd_soc_dapm_nc_pin(dapm, "LHPOUT");
++static int snd_audioinjector_pi_soundcard_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
++ switch (params_rate(params)){
++ case 8000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 1508);
++ case 32000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 378);
++ case 44100:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 274);
++ case 48000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 252);
++ case 88200:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 136);
++ case 96000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
++ default:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
++ }
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_audioinjector_pi_soundcard_ops = {
++ .startup = snd_audioinjector_pi_soundcard_startup,
++ .hw_params = snd_audioinjector_pi_soundcard_hw_params,
++};
++
++static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
++{
+ return snd_soc_dai_set_sysclk(rtd->codec_dai, WM8731_SYSCLK_XTAL, 12000000, SND_SOC_CLOCK_IN);
+ }
+
+@@ -50,30 +90,39 @@ static struct snd_soc_dai_link audioinje
+ .codec_dai_name = "wm8731-hifi",
+ .platform_name = "bcm2835-i2s.0",
+ .codec_name = "wm8731.1-001a",
++ .ops = &snd_audioinjector_pi_soundcard_ops,
+ .init = audioinjector_pi_soundcard_dai_init,
+ .dai_fmt = SND_SOC_DAIFMT_CBM_CFM|SND_SOC_DAIFMT_I2S|SND_SOC_DAIFMT_NB_NF,
+ },
+ };
+
+ static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
++ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_SPK("Ext Spk", NULL),
+ SND_SOC_DAPM_LINE("Line In Jacks", NULL),
++ SND_SOC_DAPM_MIC("Microphone", NULL),
+ };
+
+-/* Corgi machine connections to the codec pins */
+ static const struct snd_soc_dapm_route audioinjector_audio_map[] = {
++ /* headphone connected to LHPOUT, RHPOUT */
++ {"Headphone Jack", NULL, "LHPOUT"},
++ {"Headphone Jack", NULL, "RHPOUT"},
++
+ /* speaker connected to LOUT, ROUT */
+ {"Ext Spk", NULL, "ROUT"},
+ {"Ext Spk", NULL, "LOUT"},
+
+ /* line inputs */
+ {"Line In Jacks", NULL, "Line Input"},
++
++ /* mic is connected to Mic Jack, with WM8731 Mic Bias */
++ {"Microphone", NULL, "Mic Bias"},
+ };
+
+ static struct snd_soc_card snd_soc_audioinjector = {
+ .name = "audioinjector-pi-soundcard",
+ .dai_link = audioinjector_pi_soundcard_dai,
+- .num_links = 1,
++ .num_links = ARRAY_SIZE(audioinjector_pi_soundcard_dai),
+
+ .dapm_widgets = wm8731_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
--- /dev/null
+From c5368041bdadf28f7081deb6e11c9aaafe05377f Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Mon, 9 May 2016 20:38:08 +0100
+Subject: [PATCH 413/423] IQaudIO: auto-mute for AMP+ and DigiAMP+
+
+IQAudIO amplifier mute via GPIO22. Add dt params for "one-shot" unmute
+and auto mute.
+
+Revision 2, auto mute implementing HiassofT suggestion to mute/unmute
+using set_bias_level, rather than startup/shutdown....
+"By default DAPM waits 5 seconds (pmdown_time) before shutting down
+playback streams so a close/stop immediately followed by open/start
+doesn't trigger an amp mute+unmute."
+
+Tested on both AMP+ (via DAC+) and DigiAMP+, with both options...
+
+dtoverlay=iqaudio-dacplus,unmute_amp
+ "one-shot" unmute when kernel module loads.
+
+dtoverlay=iqaudio-dacplus,auto_mute_amp
+ Unmute amp when ALSA device opened by a client. Mute, with 5 second delay
+ when ALSA device closed. (Re-opening the device within the 5 second close
+ window, will cancel mute.)
+
+Revision 4, using gpiod.
+
+Revision 5, clean-up formatting before adding mute code.
+ - Convert tab plus 4 space formatting to 2x tab
+ - Remove '// NOT USED' commented code
+
+Revision 6, don't attempt to "one-shot" unmute amp, unless card is
+successfully registered.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/README | 4 +
+ .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 7 +-
+ sound/soc/bcm/iqaudio-dac.c | 144 ++++++++++++++++-----
+ 3 files changed, 124 insertions(+), 31 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -540,6 +540,10 @@ Params: 24db_digital_gain Allow ga
+ responsibility of the user to ensure that
+ the Digital volume control is set to a value
+ that does not result in clipping/distortion!)
++ auto_mute_amp If specified, unmute/mute the IQaudIO amp when
++ starting/stopping audio playback.
++ unmute_amp If specified, unmute the IQaudIO amp once when
++ the DAC driver module loads.
+
+
+ Name: justboom-dac
+--- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
+@@ -30,14 +30,17 @@
+
+ fragment@2 {
+ target = <&sound>;
+- frag2: __overlay__ {
++ iqaudio_dac: __overlay__ {
+ compatible = "iqaudio,iqaudio-dac";
+ i2s-controller = <&i2s>;
++ mute-gpios = <&gpio 22 0>;
+ status = "okay";
+ };
+ };
+
+ __overrides__ {
+- 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
++ 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
++ auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
++ unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
+ };
+ };
+--- a/sound/soc/bcm/iqaudio-dac.c
++++ b/sound/soc/bcm/iqaudio-dac.c
+@@ -15,6 +15,7 @@
+ */
+
+ #include <linux/module.h>
++#include <linux/gpio/consumer.h>
+ #include <linux/platform_device.h>
+
+ #include <sound/core.h>
+@@ -25,6 +26,8 @@
+
+ static bool digital_gain_0db_limit = true;
+
++static struct gpio_desc *mute_gpio;
++
+ static int snd_rpi_iqaudio_dac_init(struct snd_soc_pcm_runtime *rtd)
+ {
+ if (digital_gain_0db_limit)
+@@ -41,11 +44,9 @@ static int snd_rpi_iqaudio_dac_init(stru
+ }
+
+ static int snd_rpi_iqaudio_dac_hw_params(struct snd_pcm_substream *substream,
+- struct snd_pcm_hw_params *params)
++ struct snd_pcm_hw_params *params)
+ {
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+-// NOT USED struct snd_soc_dai *codec_dai = rtd->codec_dai;
+-// NOT USED struct snd_soc_codec *codec = rtd->codec;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
+ unsigned int sample_bits =
+@@ -54,6 +55,56 @@ static int snd_rpi_iqaudio_dac_hw_params
+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
+ }
+
++static void snd_rpi_iqaudio_gpio_mute(struct snd_soc_card *card)
++{
++ if (mute_gpio) {
++ dev_info(card->dev, "%s: muting amp using GPIO22\n",
++ __func__);
++ gpiod_set_value_cansleep(mute_gpio, 0);
++ }
++}
++
++static void snd_rpi_iqaudio_gpio_unmute(struct snd_soc_card *card)
++{
++ if (mute_gpio) {
++ dev_info(card->dev, "%s: un-muting amp using GPIO22\n",
++ __func__);
++ gpiod_set_value_cansleep(mute_gpio, 1);
++ }
++}
++
++static int snd_rpi_iqaudio_set_bias_level(struct snd_soc_card *card,
++ struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
++{
++ struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
++
++ if (dapm->dev != codec_dai->dev)
++ return 0;
++
++ switch (level) {
++ case SND_SOC_BIAS_PREPARE:
++ if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
++ break;
++
++ /* UNMUTE AMP */
++ snd_rpi_iqaudio_gpio_unmute(card);
++
++ break;
++ case SND_SOC_BIAS_STANDBY:
++ if (dapm->bias_level != SND_SOC_BIAS_PREPARE)
++ break;
++
++ /* MUTE AMP */
++ snd_rpi_iqaudio_gpio_mute(card);
++
++ break;
++ default:
++ break;
++ }
++
++ return 0;
++}
++
+ /* machine stream operations */
+ static struct snd_soc_ops snd_rpi_iqaudio_dac_ops = {
+ .hw_params = snd_rpi_iqaudio_dac_hw_params,
+@@ -82,46 +133,81 @@ static struct snd_soc_card snd_rpi_iqaud
+ static int snd_rpi_iqaudio_dac_probe(struct platform_device *pdev)
+ {
+ int ret = 0;
++ bool gpio_unmute = false;
+
+ snd_rpi_iqaudio_dac.dev = &pdev->dev;
+
+ if (pdev->dev.of_node) {
+- struct device_node *i2s_node;
+- struct snd_soc_card *card = &snd_rpi_iqaudio_dac;
+- struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_dac_dai[0];
+- i2s_node = of_parse_phandle(pdev->dev.of_node,
+- "i2s-controller", 0);
+-
+- if (i2s_node) {
+- dai->cpu_dai_name = NULL;
+- dai->cpu_of_node = i2s_node;
+- dai->platform_name = NULL;
+- dai->platform_of_node = i2s_node;
+- }
+-
+- digital_gain_0db_limit = !of_property_read_bool(pdev->dev.of_node,
+- "iqaudio,24db_digital_gain");
+- if (of_property_read_string(pdev->dev.of_node, "card_name",
+- &card->name))
+- card->name = "IQaudIODAC";
+- if (of_property_read_string(pdev->dev.of_node, "dai_name",
+- &dai->name))
+- dai->name = "IQaudIO DAC";
+- if (of_property_read_string(pdev->dev.of_node, "dai_stream_name",
+- &dai->stream_name))
+- dai->stream_name = "IQaudIO DAC HiFi";
++ struct device_node *i2s_node;
++ struct snd_soc_card *card = &snd_rpi_iqaudio_dac;
++ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_dac_dai[0];
++ bool auto_gpio_mute = false;
++
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ digital_gain_0db_limit = !of_property_read_bool(
++ pdev->dev.of_node, "iqaudio,24db_digital_gain");
++
++ if (of_property_read_string(pdev->dev.of_node, "card_name",
++ &card->name))
++ card->name = "IQaudIODAC";
++
++ if (of_property_read_string(pdev->dev.of_node, "dai_name",
++ &dai->name))
++ dai->name = "IQaudIO DAC";
++
++ if (of_property_read_string(pdev->dev.of_node,
++ "dai_stream_name", &dai->stream_name))
++ dai->stream_name = "IQaudIO DAC HiFi";
++
++ /* gpio_unmute - one time unmute amp using GPIO */
++ gpio_unmute = of_property_read_bool(pdev->dev.of_node,
++ "iqaudio-dac,unmute-amp");
++
++ /* auto_gpio_mute - mute/unmute amp using GPIO */
++ auto_gpio_mute = of_property_read_bool(pdev->dev.of_node,
++ "iqaudio-dac,auto-mute-amp");
++
++ if (auto_gpio_mute || gpio_unmute) {
++ mute_gpio = devm_gpiod_get_optional(&pdev->dev, "mute",
++ GPIOD_OUT_LOW);
++ if (IS_ERR(mute_gpio)) {
++ ret = PTR_ERR(mute_gpio);
++ dev_err(&pdev->dev,
++ "Failed to get mute gpio: %d\n", ret);
++ return ret;
++ }
++
++ if (auto_gpio_mute && mute_gpio)
++ snd_rpi_iqaudio_dac.set_bias_level =
++ snd_rpi_iqaudio_set_bias_level;
++ }
+ }
+
+ ret = snd_soc_register_card(&snd_rpi_iqaudio_dac);
+- if (ret)
++ if (ret) {
+ dev_err(&pdev->dev,
+ "snd_soc_register_card() failed: %d\n", ret);
++ return ret;
++ }
++
++ if (gpio_unmute && mute_gpio)
++ snd_rpi_iqaudio_gpio_unmute(&snd_rpi_iqaudio_dac);
+
+- return ret;
++ return 0;
+ }
+
+ static int snd_rpi_iqaudio_dac_remove(struct platform_device *pdev)
+ {
++ snd_rpi_iqaudio_gpio_mute(&snd_rpi_iqaudio_dac);
++
+ return snd_soc_unregister_card(&snd_rpi_iqaudio_dac);
+ }
+
--- /dev/null
+From 62f0d8320a176602d37c51fad03cafc736441ad4 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 23 Jun 2016 16:37:46 +0100
+Subject: [PATCH 414/423] mmc: Apply ERASE_BROKEN quirks correctly
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/card/block.c | 9 +++------
+ 1 file changed, 3 insertions(+), 6 deletions(-)
+
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -2563,12 +2563,9 @@ static const struct mmc_fixup blk_fixups
+ * On some Kingston SD cards, multiple erases of less than 64
+ * sectors can cause corruption.
+ */
+- MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
+- MMC_QUIRK_ERASE_BROKEN),
+- MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk_mmc,
+- MMC_QUIRK_ERASE_BROKEN),
+- MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk_mmc,
+- MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
+
+ END_FIXUP
+ };
--- /dev/null
+From 7c9908c6f70b0c8c7213d663f8e517b5321ebfbe Mon Sep 17 00:00:00 2001
+From: Jools Wills <buzz@exotica.org.uk>
+Date: Sun, 26 Jun 2016 16:28:48 +0000
+Subject: [PATCH 415/423] enable led support for xpad driver - fixes flashing
+ leds on controller
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -559,6 +559,7 @@ CONFIG_JOYSTICK_IFORCE=m
+ CONFIG_JOYSTICK_IFORCE_USB=y
+ CONFIG_JOYSTICK_XPAD=m
+ CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
+ CONFIG_JOYSTICK_RPISENSE=m
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_ADS7846=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -552,6 +552,7 @@ CONFIG_JOYSTICK_IFORCE=m
+ CONFIG_JOYSTICK_IFORCE_USB=y
+ CONFIG_JOYSTICK_XPAD=m
+ CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
+ CONFIG_JOYSTICK_RPISENSE=m
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_ADS7846=m
--- /dev/null
+From 97230b9a008e1c6707ad1bafa4ebd4d6b11a022f Mon Sep 17 00:00:00 2001
+From: David Lechner <david@lechnology.com>
+Date: Mon, 27 Jun 2016 22:52:22 -0500
+Subject: [PATCH 416/423] Add critical information for getting pi3-miniuart-bt
+ overlay to work
+
+Bluetooth on RPi 3 using uart1 will not work without setting core_freq=250 in config.txt. This is not
+documented anywhere, so this seems like a good place to start.
+---
+ arch/arm/boot/dts/overlays/README | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -691,7 +691,9 @@ Info: Switch Pi3 Bluetooth function to
+ N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
+ and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
+ that create /dev/serial0 and /dev/serial1, in which case use
+- /dev/serial1 instead because it will always be correct.
++ /dev/serial1 instead because it will always be correct. Furthermore,
++ you must also set core_freq=250 in config.txt or the miniuart will not
++ work.
+ Load: dtoverlay=pi3-miniuart-bt
+ Params: <None>
+
--- /dev/null
+From 336a4fae0a026365e58842b5df9e275858938f79 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 15 Jun 2016 17:13:55 +0100
+Subject: [PATCH 417/423] bcm2835-sdhost: Improvements to error recovery
+
+1) Try to avoid reducing overclock when a card is removed.
+
+2) Reset overclock on card insertion.
+
+3) Reduce logging when errors occur, lowering the severity of
+ some messages and making others conditional on the debug
+ flag.
+
+4) Attempt to identify a disconnected SD bus earlier, treating a
+ zero returned OCR (voltage support) as an error condition.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/host/bcm2835-sdhost.c | 117 ++++++++++++++++++++++++--------------
+ 1 file changed, 74 insertions(+), 43 deletions(-)
+
+--- a/drivers/mmc/host/bcm2835-sdhost.c
++++ b/drivers/mmc/host/bcm2835-sdhost.c
+@@ -38,6 +38,7 @@
+ #include <linux/mmc/mmc.h>
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/sd.h>
++#include <linux/mmc/sdio.h>
+ #include <linux/scatterlist.h>
+ #include <linux/of_address.h>
+ #include <linux/of_irq.h>
+@@ -206,6 +207,7 @@ struct bcm2835_host {
+ struct timeval stop_time; /* when the last stop was issued */
+ u32 delay_after_stop; /* minimum time between stop and subsequent data transfer */
+ u32 delay_after_this_stop; /* minimum time between this stop and subsequent data transfer */
++ u32 user_overclock_50; /* User's preferred frequency to use when 50MHz is requested (in MHz) */
+ u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
+ u32 overclock; /* Current frequency if overclocked, else zero */
+ u32 pio_limit; /* Maximum block count for PIO (0 = always DMA) */
+@@ -282,7 +284,7 @@ static void log_dump(void)
+ do {
+ entry = sdhost_log_buf + idx;
+ if (entry->event[0] != '\0')
+- pr_err("[%08x] %.4s %x %x\n",
++ pr_info("[%08x] %.4s %x %x\n",
+ entry->timestamp,
+ entry->event,
+ entry->param1,
+@@ -324,7 +326,7 @@ static void bcm2835_sdhost_dumpcmd(struc
+ const char *label)
+ {
+ if (cmd)
+- pr_err("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
++ pr_info("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
+ mmc_hostname(host->mmc),
+ (cmd == host->cmd) ? '>' : ' ',
+ label, cmd->opcode, cmd->arg, cmd->flags,
+@@ -339,7 +341,7 @@ static void bcm2835_sdhost_dumpregs(stru
+ bcm2835_sdhost_dumpcmd(host, host->mrq->sbc, "sbc");
+ bcm2835_sdhost_dumpcmd(host, host->mrq->cmd, "cmd");
+ if (host->mrq->data)
+- pr_err("%s: data blocks %x blksz %x - err %d\n",
++ pr_info("%s: data blocks %x blksz %x - err %d\n",
+ mmc_hostname(host->mmc),
+ host->mrq->data->blocks,
+ host->mrq->data->blksz,
+@@ -347,53 +349,53 @@ static void bcm2835_sdhost_dumpregs(stru
+ bcm2835_sdhost_dumpcmd(host, host->mrq->stop, "stop");
+ }
+
+- pr_err("%s: =========== REGISTER DUMP ===========\n",
++ pr_info("%s: =========== REGISTER DUMP ===========\n",
+ mmc_hostname(host->mmc));
+
+- pr_err("%s: SDCMD 0x%08x\n",
++ pr_info("%s: SDCMD 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDCMD));
+- pr_err("%s: SDARG 0x%08x\n",
++ pr_info("%s: SDARG 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDARG));
+- pr_err("%s: SDTOUT 0x%08x\n",
++ pr_info("%s: SDTOUT 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDTOUT));
+- pr_err("%s: SDCDIV 0x%08x\n",
++ pr_info("%s: SDCDIV 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDCDIV));
+- pr_err("%s: SDRSP0 0x%08x\n",
++ pr_info("%s: SDRSP0 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP0));
+- pr_err("%s: SDRSP1 0x%08x\n",
++ pr_info("%s: SDRSP1 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP1));
+- pr_err("%s: SDRSP2 0x%08x\n",
++ pr_info("%s: SDRSP2 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP2));
+ pr_err("%s: SDRSP3 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP3));
+- pr_err("%s: SDHSTS 0x%08x\n",
++ pr_info("%s: SDHSTS 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHSTS));
+- pr_err("%s: SDVDD 0x%08x\n",
++ pr_info("%s: SDVDD 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDVDD));
+- pr_err("%s: SDEDM 0x%08x\n",
++ pr_info("%s: SDEDM 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDEDM));
+- pr_err("%s: SDHCFG 0x%08x\n",
++ pr_info("%s: SDHCFG 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHCFG));
+- pr_err("%s: SDHBCT 0x%08x\n",
++ pr_info("%s: SDHBCT 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHBCT));
+- pr_err("%s: SDHBLC 0x%08x\n",
++ pr_info("%s: SDHBLC 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHBLC));
+
+- pr_err("%s: ===========================================\n",
++ pr_info("%s: ===========================================\n",
+ mmc_hostname(host->mmc));
+ }
+
+@@ -608,7 +610,7 @@ static void bcm2835_sdhost_read_block_pi
+ (fsm_state != SDEDM_FSM_READCRC)) {
+ hsts = bcm2835_sdhost_read(host,
+ SDHSTS);
+- pr_err("%s: fsm %x, hsts %x\n",
++ pr_info("%s: fsm %x, hsts %x\n",
+ mmc_hostname(host->mmc),
+ fsm_state, hsts);
+ if (hsts & SDHSTS_ERROR_MASK)
+@@ -698,7 +700,7 @@ static void bcm2835_sdhost_write_block_p
+ (fsm_state != SDEDM_FSM_WRITESTART2)) {
+ hsts = bcm2835_sdhost_read(host,
+ SDHSTS);
+- pr_err("%s: fsm %x, hsts %x\n",
++ pr_info("%s: fsm %x, hsts %x\n",
+ mmc_hostname(host->mmc),
+ fsm_state, hsts);
+ if (hsts & SDHSTS_ERROR_MASK)
+@@ -953,9 +955,10 @@ bool bcm2835_sdhost_send_command(struct
+
+ while (bcm2835_sdhost_read(host, SDCMD) & SDCMD_NEW_FLAG) {
+ if (timeout == 0) {
+- pr_err("%s: previous command never completed.\n",
++ pr_warn("%s: previous command never completed.\n",
+ mmc_hostname(host->mmc));
+- bcm2835_sdhost_dumpregs(host);
++ if (host->debug)
++ bcm2835_sdhost_dumpregs(host);
+ cmd->error = -EILSEQ;
+ tasklet_schedule(&host->finish_tasklet);
+ return false;
+@@ -1213,10 +1216,12 @@ static void bcm2835_sdhost_finish_comman
+
+ /* Check for errors */
+ if (sdcmd & SDCMD_NEW_FLAG) {
+- pr_err("%s: command never completed.\n",
+- mmc_hostname(host->mmc));
+- bcm2835_sdhost_dumpregs(host);
+- host->cmd->error = -EIO;
++ if (host->debug) {
++ pr_err("%s: command %d never completed.\n",
++ mmc_hostname(host->mmc), host->cmd->opcode);
++ bcm2835_sdhost_dumpregs(host);
++ }
++ host->cmd->error = -EILSEQ;
+ tasklet_schedule(&host->finish_tasklet);
+ return;
+ } else if (sdcmd & SDCMD_FAIL_FLAG) {
+@@ -1238,15 +1243,14 @@ static void bcm2835_sdhost_finish_comman
+ } else {
+ if (sdhsts & SDHSTS_CMD_TIME_OUT) {
+ if (host->debug)
+- pr_err("%s: command %d timeout\n",
++ pr_warn("%s: command %d timeout\n",
+ mmc_hostname(host->mmc),
+ host->cmd->opcode);
+ host->cmd->error = -ETIMEDOUT;
+ } else {
+- pr_err("%s: unexpected command %d error\n",
++ pr_warn("%s: unexpected command %d error\n",
+ mmc_hostname(host->mmc),
+ host->cmd->opcode);
+- bcm2835_sdhost_dumpregs(host);
+ host->cmd->error = -EILSEQ;
+ }
+ tasklet_schedule(&host->finish_tasklet);
+@@ -1370,8 +1374,10 @@ static void bcm2835_sdhost_busy_irq(stru
+ } else if (intmask & SDHSTS_CMD_TIME_OUT)
+ host->cmd->error = -ETIMEDOUT;
+
+- log_dump();
+- bcm2835_sdhost_dumpregs(host);
++ if (host->debug) {
++ log_dump();
++ bcm2835_sdhost_dumpregs(host);
++ }
+ }
+ else
+ bcm2835_sdhost_finish_command(host, NULL);
+@@ -1595,7 +1601,7 @@ void bcm2835_sdhost_set_clock(struct bcm
+ host->overclock_50 = (clock/MHZ);
+
+ if (clock != host->overclock) {
+- pr_warn("%s: overclocking to %dHz\n",
++ pr_info("%s: overclocking to %dHz\n",
+ mmc_hostname(host->mmc), clock);
+ host->overclock = clock;
+ }
+@@ -1605,6 +1611,11 @@ void bcm2835_sdhost_set_clock(struct bcm
+ pr_warn("%s: cancelling overclock\n",
+ mmc_hostname(host->mmc));
+ }
++ } else if (input_clock == 0) {
++ /* Reset the preferred overclock when the clock is stopped.
++ * This always happens during initialisation. */
++ host->overclock_50 = host->user_overclock_50;
++ host->overclock = 0;
+ }
+
+ /* Set the timeout to 500ms */
+@@ -1678,13 +1689,15 @@ static void bcm2835_sdhost_request(struc
+ log_event("REQ<", (u32)mrq, edm);
+ if ((fsm != SDEDM_FSM_IDENTMODE) &&
+ (fsm != SDEDM_FSM_DATAMODE)) {
+- pr_err("%s: previous command (%d) not complete (EDM %x)\n",
+- mmc_hostname(host->mmc),
+- bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK,
+- edm);
+ log_event("REQ!", (u32)mrq, edm);
+- log_dump();
+- bcm2835_sdhost_dumpregs(host);
++ if (host->debug) {
++ pr_warn("%s: previous command (%d) not complete (EDM %x)\n",
++ mmc_hostname(host->mmc),
++ bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK,
++ edm);
++ log_dump();
++ bcm2835_sdhost_dumpregs(host);
++ }
+ mrq->cmd->error = -EILSEQ;
+ tasklet_schedule(&host->finish_tasklet);
+ mmiowb();
+@@ -1814,16 +1827,19 @@ static void bcm2835_sdhost_tasklet_finis
+ mrq = host->mrq;
+
+ /* Drop the overclock after any data corruption, or after any
+- error overclocked */
++ * error while overclocked. Ignore errors for status commands,
++ * as they are likely when a card is ejected. */
+ if (host->overclock) {
+- if ((mrq->cmd && mrq->cmd->error) ||
++ if ((mrq->cmd && mrq->cmd->error &&
++ (mrq->cmd->opcode != MMC_SEND_STATUS)) ||
+ (mrq->data && mrq->data->error) ||
+- (mrq->stop && mrq->stop->error)) {
++ (mrq->stop && mrq->stop->error) ||
++ (mrq->sbc && mrq->sbc->error)) {
+ host->overclock_50--;
+ pr_warn("%s: reducing overclock due to errors\n",
+ mmc_hostname(host->mmc));
+ host->reset_clock = 1;
+- mrq->cmd->error = -EILSEQ;
++ mrq->cmd->error = -ETIMEDOUT;
+ mrq->cmd->retries = 1;
+ }
+ }
+@@ -1848,6 +1864,21 @@ static void bcm2835_sdhost_tasklet_finis
+ mmc_hostname(host->mmc), err);
+ }
+
++ /* The SDHOST block doesn't report any errors for a disconnected
++ interface. All cards and SDIO devices should report some supported
++ voltage range, so a zero response to SEND_OP_COND, IO_SEND_OP_COND
++ or APP_SEND_OP_COND can be treated as an error. */
++ if (((mrq->cmd->opcode == MMC_SEND_OP_COND) ||
++ (mrq->cmd->opcode == SD_IO_SEND_OP_COND) ||
++ (mrq->cmd->opcode == SD_APP_OP_COND)) &&
++ (mrq->cmd->error == 0) &&
++ (mrq->cmd->resp[0] == 0)) {
++ mrq->cmd->error = -ETIMEDOUT;
++ if (host->debug)
++ pr_info("%s: faking timeout due to zero OCR\n",
++ mmc_hostname(host->mmc));
++ }
++
+ mmc_request_done(host->mmc, mrq);
+ log_event("TSK>", (u32)mrq, 0);
+ }
+@@ -2023,7 +2054,7 @@ static int bcm2835_sdhost_probe(struct p
+ &host->delay_after_stop);
+ of_property_read_u32(node,
+ "brcm,overclock-50",
+- &host->overclock_50);
++ &host->user_overclock_50);
+ of_property_read_u32(node,
+ "brcm,pio-limit",
+ &host->pio_limit);
--- /dev/null
+From cf4bd841e1b8b74c77601b90dff106331740af62 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 28 Jun 2016 22:13:15 +0100
+Subject: [PATCH 418/423] pinctrl-bcm2835: Fix return type of bcm2835_pmx_free
+
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -831,13 +831,14 @@ static const struct pinctrl_ops bcm2835_
+ .dt_free_map = bcm2835_pctl_dt_free_map,
+ };
+
+-static void bcm2835_pmx_free(struct pinctrl_dev *pctldev,
++static int bcm2835_pmx_free(struct pinctrl_dev *pctldev,
+ unsigned offset)
+ {
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+ /* disable by setting to GPIO_IN */
+ bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
++ return 0;
+ }
+
+ static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
--- /dev/null
+From c0b9e2c502269ef126969709f54e4489b87e3923 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Thu, 30 Jun 2016 18:38:42 +0100
+Subject: [PATCH 419/423] Add IQAudIO Digi WM8804 board support
+
+Support IQAudIO Digi board with iqaudio_digi machine driver and
+ iqaudio-digi-wm8804-audio overlay.
+
+NB. Machine driver is a cut and paste of hifiberry_digi code, with format
+ and general cleanup to comply with kernel coding standards.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 9 +
+ .../overlays/iqaudio-digi-wm8804-audio-overlay.dts | 47 ++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 +
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/iqaudio_digi.c | 239 +++++++++++++++++++++
+ 8 files changed, 307 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
+ create mode 100644 sound/soc/bcm/iqaudio_digi.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -42,6 +42,7 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += iqaudio-digi-wm8804-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -546,6 +546,15 @@ Params: 24db_digital_gain Allow ga
+ the DAC driver module loads.
+
+
++Name: iqaudio-digi-wm8804-audio
++Info: Configures the IQAudIO Digi WM8804 audio card
++Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
++Params: card_name Override the default, "IQAudIODigi", card name.
++ dai_name Override the default, "IQAudIO Digi", dai name.
++ dai_stream_name Override the default, "IQAudIO Digi HiFi",
++ dai stream name.
++
++
+ Name: justboom-dac
+ Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
+ cards
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
+@@ -0,0 +1,47 @@
++// Definitions for IQAudIO Digi WM8804 audio board
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ // DVDD-supply = <®_3v3>;
++ // PVDD-supply = <®_3v3>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ wm8804_digi: __overlay__ {
++ compatible = "iqaudio,wm8804-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ card_name = <&wm8804_digi>,"wm8804-digi,card-name";
++ dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
++ dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -865,6 +865,7 @@ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -857,6 +857,7 @@ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -71,6 +71,13 @@ config SND_BCM2708_SOC_IQAUDIO_DAC
+ help
+ Say Y or M if you want to add support for IQaudIO-DAC.
+
++config SND_BCM2708_SOC_IQAUDIO_DIGI
++ tristate "Support for IQAudIO Digi"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_WM8804
++ help
++ Say Y or M if you want to add support for IQAudIO Digital IO board.
++
+ config SND_BCM2708_SOC_RASPIDAC3
+ tristate "Support for RaspiDAC Rev.3x"
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -14,6 +14,7 @@ snd-soc-justboom-digi-objs := justboom-d
+ snd-soc-rpi-dac-objs := rpi-dac.o
+ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
++snd-soc-iqaudio-digi-objs := iqaudio_digi.o
+ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
+ snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
+@@ -28,6 +29,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DI
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
++obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI) += snd-soc-iqaudio-digi.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
+ obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+--- /dev/null
++++ b/sound/soc/bcm/iqaudio_digi.c
+@@ -0,0 +1,239 @@
++/*
++ * ASoC Driver for IQAudIO WM8804 Digi
++ *
++ * Author: Daniel Matuschek <info@crazy-audio.com>
++ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
++ * Copyright 2013
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++#include "../codecs/wm8804.h"
++
++static short int auto_shutdown_output;
++module_param(auto_shutdown_output, short,
++ S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
++MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped");
++
++static int snd_rpi_iqaudio_digi_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ return 0;
++}
++
++static int snd_rpi_iqaudio_digi_startup(struct snd_pcm_substream *substream)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* turn on digital output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
++
++ return 0;
++}
++
++static void snd_rpi_iqaudio_digi_shutdown(struct snd_pcm_substream *substream)
++{
++ if (auto_shutdown_output) {
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* turn off digital output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
++ }
++}
++
++
++static int snd_rpi_iqaudio_digi_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ int sysclk = 27000000; /* This is fixed on this board */
++
++ long mclk_freq = 0;
++ int mclk_div = 1;
++ int sampling_freq = 1;
++
++ int ret;
++
++ int samplerate = params_rate(params);
++
++ if (samplerate <= 96000) {
++ mclk_freq = samplerate * 256;
++ mclk_div = WM8804_MCLKDIV_256FS;
++ } else {
++ mclk_freq = samplerate * 128;
++ mclk_div = WM8804_MCLKDIV_128FS;
++ }
++
++ switch (samplerate) {
++ case 32000:
++ sampling_freq = 0x03;
++ break;
++ case 44100:
++ sampling_freq = 0x00;
++ break;
++ case 48000:
++ sampling_freq = 0x02;
++ break;
++ case 88200:
++ sampling_freq = 0x08;
++ break;
++ case 96000:
++ sampling_freq = 0x0a;
++ break;
++ case 176400:
++ sampling_freq = 0x0c;
++ break;
++ case 192000:
++ sampling_freq = 0x0e;
++ break;
++ default:
++ dev_err(codec->dev, "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
++ samplerate);
++ }
++
++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
++ sysclk, SND_SOC_CLOCK_OUT);
++ if (ret < 0) {
++ dev_err(codec->dev, "Failed to set WM8804 SYSCLK: %d\n", ret);
++ return ret;
++ }
++
++ /* Enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ /* Power on */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
++
++ /* set sampling frequency status bits */
++ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_iqaudio_digi_ops = {
++ .hw_params = snd_rpi_iqaudio_digi_hw_params,
++ .startup = snd_rpi_iqaudio_digi_startup,
++ .shutdown = snd_rpi_iqaudio_digi_shutdown,
++};
++
++static struct snd_soc_dai_link snd_rpi_iqaudio_digi_dai[] = {
++{
++ .name = "IQAudIO Digi",
++ .stream_name = "IQAudIO Digi HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8804-spdif",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "wm8804.1-003b",
++ .dai_fmt = SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &snd_rpi_iqaudio_digi_ops,
++ .init = snd_rpi_iqaudio_digi_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_iqaudio_digi = {
++ .name = "IQAudIODigi",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_iqaudio_digi_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_iqaudio_digi_dai),
++};
++
++static int snd_rpi_iqaudio_digi_probe(struct platform_device *pdev)
++{
++ struct snd_soc_card *card = &snd_rpi_iqaudio_digi;
++ char *prefix = "wm8804-digi,";
++ char prop[128];
++ struct device_node *np;
++ int ret = 0;
++
++ snd_rpi_iqaudio_digi.dev = &pdev->dev;
++
++ np = pdev->dev.of_node;
++ if (np) {
++ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_digi_dai[0];
++ struct device_node *i2s_node;
++
++ i2s_node = of_parse_phandle(np, "i2s-controller", 0);
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ snprintf(prop, sizeof(prop), "%scard-name", prefix);
++ of_property_read_string(np, prop, &card->name);
++
++ snprintf(prop, sizeof(prop), "%sdai-name", prefix);
++ of_property_read_string(np, prop, &dai->name);
++
++ snprintf(prop, sizeof(prop), "%sdai-stream-name", prefix);
++ of_property_read_string(np, prop, &dai->stream_name);
++ }
++
++ ret = snd_soc_register_card(card);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
++ ret);
++
++ return ret;
++}
++
++static int snd_rpi_iqaudio_digi_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_iqaudio_digi);
++}
++
++static const struct of_device_id snd_rpi_iqaudio_digi_of_match[] = {
++ { .compatible = "iqaudio,wm8804-digi", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_iqaudio_digi_of_match);
++
++static struct platform_driver snd_rpi_iqaudio_digi_driver = {
++ .driver = {
++ .name = "IQAudIODigi",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_iqaudio_digi_of_match,
++ },
++ .probe = snd_rpi_iqaudio_digi_probe,
++ .remove = snd_rpi_iqaudio_digi_remove,
++};
++
++module_platform_driver(snd_rpi_iqaudio_digi_driver);
++
++MODULE_AUTHOR("Daniel Matuschek <info@crazy-audio.com>");
++MODULE_DESCRIPTION("ASoC Driver for IQAudIO WM8804 Digi");
++MODULE_LICENSE("GPL v2");
--- /dev/null
+From 27fac2f6623e8a3cddeaaf9851b719469b8df22e Mon Sep 17 00:00:00 2001
+From: Erdem MEYDANLI <erdem.meydanli@punica.com.tr>
+Date: Thu, 30 Jun 2016 21:05:08 +0300
+Subject: [PATCH 420/423] dts: Add overlay for NXP SC16IS752 Dual UART with SPI
+ Interface
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 10 ++++
+ .../boot/dts/overlays/sc16is752-spi1-overlay.dts | 61 ++++++++++++++++++++++
+ 3 files changed, 72 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -71,6 +71,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -888,6 +888,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
+ Params: <None>
+
+
++Name: sc16is752-spi1
++Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
++ Enables the chip on SPI1.
++ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
++ A+, B+, Zero and PI2 B; as well as the Compute Module.
++
++Load: dtoverlay=sc16is752-spi1,<param>=<val>
++Params: int_pin GPIO used for IRQ (default 24)
++
++
+ Name: sdhost
+ Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
+ N.B. This overlay is designed for situations where the mmc driver is
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
+@@ -0,0 +1,61 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi1_pins: spi1_pins {
++ brcm,pins = <19 20 21>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi1_cs_pins: spi1_cs_pins {
++ brcm,pins = <18>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment@1 {
++ target = <&spi1>;
++ frag1: __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
++ cs-gpios = <&gpio 18 1>;
++ status = "okay";
++
++ sc16is752: sc16is752@0 {
++ compatible = "nxp,sc16is752";
++ reg = <0>; /* CE0 */
++ clocks = <&sc16is752_clk>;
++ interrupt-parent = <&gpio>;
++ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
++ #gpio-controller;
++ #gpio-cells = <2>;
++ spi-max-frequency = <4000000>;
++
++ sc16is752_clk: sc16is752_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <14745600>;
++ };
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ int_pin = <&sc16is752>,"interrupts:0";
++ };
++};
--- /dev/null
+From e95bf039347d97f57e7045d7cd2d1f7e4daed1c6 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 1 Jul 2016 22:09:24 +0100
+Subject: [PATCH 421/423] spi-bcm2835: Disable forced software CS
+
+Select software CS in bcm2708_common.dtsi, and disable the automatic
+conversion in the driver to allow hardware CS to be re-enabled with an
+overlay.
+
+See: https://github.com/raspberrypi/linux/issues/1547
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
+ drivers/spi/spi-bcm2835.c | 2 ++
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -183,7 +183,7 @@
+ * add more gpios if necessary as <&gpio 6 1>
+ * (but do not forget to make them output!)
+ */
+- cs-gpios = <0>, <0>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
+ };
+
+ i2c0: i2c@7e205000 {
+--- a/drivers/spi/spi-bcm2835.c
++++ b/drivers/spi/spi-bcm2835.c
+@@ -707,6 +707,7 @@ static int bcm2835_spi_setup(struct spi_
+ return -EINVAL;
+ }
+
++#if 0
+ /* now translate native cs to GPIO */
+ /* first look for chip select pins in the devices pin groups */
+ for (pingroup_index = 0;
+@@ -761,6 +762,7 @@ static int bcm2835_spi_setup(struct spi_
+ * so we are setting it here explicitly
+ */
+ gpio_set_value(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
++#endif
+
+ return 0;
+ }
--- /dev/null
+From b8fdcf0f9af482e7dfa6fc5bb470318696789a52 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 1 Jul 2016 22:34:52 +0100
+Subject: [PATCH 422/423] BCM270X_DT: Overlay to re-enable HW CS on SPI0
+
+See: https://github.com/raspberrypi/linux/issues/1547
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 ++++++
+ arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +++++++++++++++++++++++
+ 3 files changed, 33 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -81,6 +81,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi0-hw-cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1006,6 +1006,12 @@ Load: dtoverlay=spi-rtc,<param>=<val>
+ Params: pcf2123 Select the PCF2123 device
+
+
++Name: spi0-hw-cs
++Info: Re-enables hardware CS/CE (chip selects) for SPI0
++Load: dtoverlay=spi0-hw-cs
++Params: <None>
++
++
+ Name: spi1-1cs
+ Info: Enables spi1 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
+@@ -0,0 +1,26 @@
++/*
++ * Device tree overlay to re-enable hardware CS for SPI0
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&spi0>;
++ __overlay__ {
++ cs-gpios = <0>, <0>;
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&spi0_cs_pins>;
++ __overlay__ {
++ brcm,pins = <8 7>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++};
--- /dev/null
+From 6fa4c2110478a814a9dd44d64522e7a81a1a2793 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Sat, 2 Jul 2016 16:26:19 +0100
+Subject: [PATCH 423/423] Add support for Dion Audio LOCO DAC-AMP HAT
+
+Using dedicated machine driver and pcm5102a codec driver.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +
+ .../boot/dts/overlays/dionaudio-loco-overlay.dts | 39 +++++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 ++
+ sound/soc/bcm/Makefile | 3 +-
+ sound/soc/bcm/dionaudio_loco.c | 121 +++++++++++++++++++++
+ 8 files changed, 178 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
+ create mode 100644 sound/soc/bcm/dionaudio_loco.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -20,6 +20,7 @@ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtb
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dionaudio-loco.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -268,6 +268,12 @@ Params: gpiopin GPIO con
+ (default 4)
+
+
++Name: dionaudio-loco
++Info: Configures the Dion Audio LOCO DAC-AMP
++Load: dtoverlay=dionaudio-loco
++Params: <None>
++
++
+ Name: dpi24
+ Info: Overlay for a generic 24-bit DPI display
+ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for Dion Audio LOCO DAC-AMP
++
++/*
++ * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target-path = "/";
++ __overlay__ {
++ pcm5102a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5102a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "dionaudio,loco-pcm5242-tpa3118";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -870,6 +870,7 @@ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -862,6 +862,7 @@ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -107,3 +107,10 @@ config SND_DIGIDAC1_SOUNDCARD
+ select SND_SOC_WM8741
+ help
+ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
++
++config SND_BCM2708_SOC_DIONAUDIO_LOCO
++ tristate "Support for Dion Audio LOCO DAC-AMP"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_PCM5102a
++ help
++ Say Y or M if you want to add support for Dion Audio LOCO.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -18,6 +18,7 @@ snd-soc-iqaudio-digi-objs := iqaudio_dig
+ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
+ snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
++snd-soc-dionaudio-loco-objs := dionaudio_loco.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -33,4 +34,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIG
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
+ obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+-
++obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o
+--- /dev/null
++++ b/sound/soc/bcm/dionaudio_loco.c
+@@ -0,0 +1,121 @@
++/*
++ * ASoC Driver for Dion Audio LOCO DAC-AMP
++ *
++ * Author: Miquel Blauw <info@dionaudio.nl>
++ * Copyright 2016
++ *
++ * Based on the software of the RPi-DAC writen by Florian Meier
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++static int snd_rpi_dionaudio_loco_hw_params(
++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ unsigned int sample_bits =
++ snd_pcm_format_physical_width(params_format(params));
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_dionaudio_loco_ops = {
++ .hw_params = snd_rpi_dionaudio_loco_hw_params,
++};
++
++static struct snd_soc_dai_link snd_rpi_dionaudio_loco_dai[] = {
++{
++ .name = "DionAudio LOCO",
++ .stream_name = "DionAudio LOCO DAC-AMP",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "pcm5102a-hifi",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "pcm5102a-codec",
++ .dai_fmt = SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBS_CFS,
++ .ops = &snd_rpi_dionaudio_loco_ops,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_dionaudio_loco = {
++ .name = "snd_rpi_dionaudio_loco",
++ .dai_link = snd_rpi_dionaudio_loco_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_dionaudio_loco_dai),
++};
++
++static int snd_rpi_dionaudio_loco_probe(struct platform_device *pdev)
++{
++ struct device_node *np;
++ int ret = 0;
++
++ snd_rpi_dionaudio_loco.dev = &pdev->dev;
++
++ np = pdev->dev.of_node;
++ if (np) {
++ struct snd_soc_dai_link *dai = &snd_rpi_dionaudio_loco_dai[0];
++ struct device_node *i2s_np;
++
++ i2s_np = of_parse_phandle(np, "i2s-controller", 0);
++ if (i2s_np) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_np;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_np;
++ }
++ }
++
++ ret = snd_soc_register_card(&snd_rpi_dionaudio_loco);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
++ ret);
++
++ return ret;
++}
++
++static int snd_rpi_dionaudio_loco_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_dionaudio_loco);
++}
++
++static const struct of_device_id snd_rpi_dionaudio_loco_of_match[] = {
++ { .compatible = "dionaudio,loco-pcm5242-tpa3118", },
++ { /* sentinel */ },
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_dionaudio_loco_of_match);
++
++static struct platform_driver snd_rpi_dionaudio_loco_driver = {
++ .driver = {
++ .name = "snd-dionaudio-loco",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_dionaudio_loco_of_match,
++ },
++ .probe = snd_rpi_dionaudio_loco_probe,
++ .remove = snd_rpi_dionaudio_loco_remove,
++};
++
++module_platform_driver(snd_rpi_dionaudio_loco_driver);
++
++MODULE_AUTHOR("Miquel Blauw <info@dionaudio.nl>");
++MODULE_DESCRIPTION("ASoC Driver for DionAudio LOCO");
++MODULE_LICENSE("GPL v2");
projects / openwrt / openwrt.git / commitdiff