dtparam=spi=on
#dtoverlay=adau1977-adc
+#dtoverlay=allo-piano-dac-pcm512x-audio
#dtoverlay=audioinjector-wm8731-audio
#dtoverlay=dionaudio-loco
#dtoverlay=hifiberry-amp
#dtoverlay=iqaudio-digi-wm8804-audio
#dtoverlay=justboom-dac
#dtoverlay=justboom-digi
+#dtoverlay=pisound
#dtoverlay=raspidac3
#dtoverlay=rpi-dac
#dtoverlay=rpi-proto
$(eval $(call KernelPackage,sound-soc-adau1977-adc))
+define KernelPackage/sound-soc-allo-piano-dac
+ TITLE:=Support for Allo Piano DAC
+ KCONFIG:= \
+ CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC \
+ CONFIG_SND_SOC_PCM512x \
+ CONFIG_SND_SOC_PCM512x_I2C
+ FILES:= \
+ $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-piano-dac.ko \
+ $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \
+ $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko
+ AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \
+ snd-soc-allo-piano-dac)
+ DEPENDS:= \
+ kmod-sound-soc-bcm2835-i2s \
+ +kmod-i2c-bcm2708
+ $(call AddDepends/sound)
+endef
+
+define KernelPackage/sound-soc-allo-piano-dac/description
+ This package contains support for Allo Piano DAC
+endef
+
+$(eval $(call KernelPackage,sound-soc-allo-piano-dac))
+
define KernelPackage/sound-soc-audioinjector-pi-soundcard
TITLE:=Support for AudioInjector Pi soundcard
KCONFIG:= \
$(eval $(call KernelPackage,sound-soc-justboom-digi))
+define KernelPackage/sound-soc-pisound
+ TITLE:=Support for Blokas Labs PiSound
+ KCONFIG:= \
+ CONFIG_SND_PISOUND \
+ CONFIG_SND_SOC_PCM5102A
+ FILES:= \
+ $(LINUX_DIR)/sound/soc/bcm/snd-soc-pisound.ko \
+ $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko
+ AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a snd-soc-pisound)
+ DEPENDS:= \
+ kmod-sound-soc-bcm2835-i2s
+ $(call AddDepends/sound)
+endef
+
+define KernelPackage/sound-soc-pisound/description
+ This package contains support for Blokas Labs PiSound
+endef
+
+$(eval $(call KernelPackage,sound-soc-pisound))
+
define KernelPackage/sound-soc-raspidac3
TITLE:=Support for RaspiDAC Rev.3x
KCONFIG:= \
-From 4f81faf37ec66edd44da24800c5a5ae87edae808 Mon Sep 17 00:00:00 2001
+From 5f5e9d496540a0e6f915a04e8b9f364eed5e1f7a Mon Sep 17 00:00:00 2001
From: Steve Glendinning <steve.glendinning@smsc.com>
Date: Thu, 19 Feb 2015 18:47:12 +0000
Subject: [PATCH] smsx95xx: fix crimes against truesize
-From 588a0950ef065eb5a0b36974394245ae2c9fc75b Mon Sep 17 00:00:00 2001
+From 954a047293ac324d9497511eb4b5ce8c792a4039 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 17 Apr 2015 16:58:45 +0100
Subject: [PATCH] smsc95xx: Disable turbo mode by default
-From 8ca7ff8021f8d9bcbac83bd4584da9bbc854b829 Mon Sep 17 00:00:00 2001
+From c68809400f149d3f176e03a3ab36e576a4d5ae79 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Jun 2014 13:42:01 +0100
Subject: [PATCH] vmstat: Workaround for issue where dirty page count goes
-From 7aa3931981956896b353b58c068a941f522182bf Mon Sep 17 00:00:00 2001
+From b110393b07eb57aa234dbf25019f586a13b57792 Mon Sep 17 00:00:00 2001
From: Robert Tiemann <rtie@gmx.de>
Date: Mon, 20 Jul 2015 11:01:25 +0200
Subject: [PATCH] BCM2835_DT: Fix I2S register map
-From 71609ab22785edd13b385920b1b0c6de24adc901 Mon Sep 17 00:00:00 2001
+From 640ebb7ef07930c2f22362cadf8bfc3e46064dc0 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 4 Dec 2015 17:41:50 +0000
Subject: [PATCH] irq-bcm2836: Prevent spurious interrupts, and trap them early
-From e34586ca8f6b346d1ee37230f26c7ad44ca15786 Mon Sep 17 00:00:00 2001
+From f9663336907eaafa48c1d6e08b78c7dccb6b8699 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 12 Jun 2015 19:01:05 +0200
Subject: [PATCH] irqchip: bcm2835: Add FIQ support
-From e6387565d57b8d3912948dfb89d27705ef04bb89 Mon Sep 17 00:00:00 2001
+From 0d6484eb61b794ef795ff569f5f066922d554156 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 23 Oct 2015 16:26:55 +0200
Subject: [PATCH] irqchip: irq-bcm2835: Add 2836 FIQ support
-From 5638cf1b2b8a418553790662c414b29ced8521dd Mon Sep 17 00:00:00 2001
+From f17d5198c547b208379e523bf400e55cef88ff56 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 30 Jun 2015 14:12:42 +0100
Subject: [PATCH] serial: 8250: Don't crash when nr_uarts is 0
-From d64c6c6de97acb1f18415dfeeabd7e19294830a1 Mon Sep 17 00:00:00 2001
+From 1df70a75d48a37dbeb1d4865e2484e5b02779c3f Mon Sep 17 00:00:00 2001
From: notro <notro@tronnes.org>
Date: Thu, 10 Jul 2014 13:59:47 +0200
Subject: [PATCH] pinctrl-bcm2835: Set base to 0 give expected gpio numbering
-From 1d1f6e6688a282e9b091fcb56719893c72e88a3a Mon Sep 17 00:00:00 2001
+From 6027af32e9de99b2843602c3411a88793ae535e4 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 24 Feb 2015 13:40:50 +0000
Subject: [PATCH] pinctrl-bcm2835: Fix interrupt handling for GPIOs 28-31 and
-From d52d6e440040cd5139f9f9ef0071ea00b103302e Mon Sep 17 00:00:00 2001
+From d1758273a63b143f48c8856706a1d03f7dcb1b93 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 26 Feb 2015 09:58:22 +0000
Subject: [PATCH] pinctrl-bcm2835: Only request the interrupts listed in the
-From 41c1cc2920df75124c931cd58f6b67ec586a5a6a Mon Sep 17 00:00:00 2001
+From f58037ac49ec4233848397cf67f84afa97a3ab38 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 24 Jun 2015 14:10:44 +0100
Subject: [PATCH] spi-bcm2835: Support pin groups other than 7-11
-From 3b9d28ec938020106f431f5a47ab5525b73bb0d0 Mon Sep 17 00:00:00 2001
+From 3ebee041596518ad4bb5e6dfb2faedd2dd72e045 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Wed, 3 Jun 2015 12:26:13 +0200
Subject: [PATCH] ARM: bcm2835: Set Serial number and Revision
-From 17025015a60ffc92d09ade98131ed080bbf09106 Mon Sep 17 00:00:00 2001
+From 32530970c34f0e8e447fd9a7f8991df6f04b8ccc Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 16:44:05 +0200
Subject: [PATCH] bcm2835-i2s: get base address for DMA from devicetree
-From fb1dbd3a7ff1ae0ccd429a4decafc882473f5d94 Mon Sep 17 00:00:00 2001
+From 962015d18b8f8dcce75ec843b5a5224c813c3362 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:21:16 +0200
Subject: [PATCH] bcm2835-i2s: add 24bit support, update bclk_ratio to more
-From 63e23a08bd0bcf782f870bacaf82404e36a6a1bd Mon Sep 17 00:00:00 2001
+From 0d7ccc03423bee3040d1abf99a9d34c701138085 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:25:51 +0200
Subject: [PATCH] bcm2835-i2s: setup clock only if CPU is clock master
-From 487c53a0c7bbf586ccc441dfc6f7021dc5f1522d Mon Sep 17 00:00:00 2001
+From c94751eae717c8d87ef234389ef4795ce1e432f5 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:49:51 +0200
Subject: [PATCH] bcm2835-i2s: Eliminate debugfs directory error
-From d86d8ab0405b4eecee7516670e9497ce450c1bbe Mon Sep 17 00:00:00 2001
+From 35ac836d7cbe42c15b8823b38abff66efc88806c Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:35:20 +0200
Subject: [PATCH] bcm2835-i2s: Register PCM device
-From 4d08d5e742e59e1e73787bfeca27595d5afbf1af Mon Sep 17 00:00:00 2001
+From e8e6b5aae45b269c2fcc14159894901514961161 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 15:55:21 +0200
Subject: [PATCH] bcm2835-i2s: Enable MMAP support via a DT property
-From c9f03ab8241d445daebd5fb8c4cf63c976460e2d Mon Sep 17 00:00:00 2001
+From d19a0acbd44ad6cd7b6deb75c48f610bbbc44c94 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Thu, 9 Apr 2015 12:34:11 +0200
Subject: [PATCH] dmaengine: bcm2835: Add slave dma support
-From f4f1c7f4084eca4b826a07a43c467e2febe57f1e Mon Sep 17 00:00:00 2001
+From b289e31cd9ba63bfa054ec6584204e8ca6ee1019 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 3 Oct 2015 15:58:59 +0200
Subject: [PATCH] dmaengine: bcm2835: set residue_granularity field
-From d7714e2a4e40cbeb4e69fb7465621f2014b358d2 Mon Sep 17 00:00:00 2001
+From 1fcc178455d43657d3d7a318dd570b9a091a8708 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 3 Oct 2015 22:22:55 +0200
Subject: [PATCH] dmaengine: bcm2835: Load driver early and support legacy API
-From 93e23eca701dfbf20def2a598af43d64c39bd9b8 Mon Sep 17 00:00:00 2001
+From 79b7365ee2e49034a96061e91c4aaa3f9e37eabd Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sat, 10 Oct 2015 12:29:18 +0200
Subject: [PATCH] bcm2835-dma: Fix dreq not set for slave transfers
-From fc5bc111e65b27883284591aec9db5a290665ac9 Mon Sep 17 00:00:00 2001
+From c9b92657b415bc1b855c394284efa0e33119ef61 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Sun, 11 Oct 2015 12:28:30 +0200
Subject: [PATCH] bcm2835-dma: Limit cyclic transfers on lite channels to 32k
-From e95d949879bf632a5fa82c9a1c5607b40388484e Mon Sep 17 00:00:00 2001
+From 1f2bc712a966060a4e73d6e0742e7417877ac8ff Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 15 Aug 2015 20:50:02 +0200
Subject: [PATCH] bcm2835: Add support for uart1
-From 65277e76bcc581bb99f98bb69d9b603bdbfa1d98 Mon Sep 17 00:00:00 2001
+From 37faf877fc9db93893b313190f688c56f51ea1fd Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 26 Jun 2015 14:21:20 +0200
Subject: [PATCH] firmware: bcm2835: Add missing property tags
-From cea9e735ed55e4e75819e984290cf147e9712c73 Mon Sep 17 00:00:00 2001
+From 20ae9d488adbe06ef257b7920fab756063e2cf38 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Sun, 12 May 2013 12:24:19 +0100
Subject: [PATCH] Main bcm2708/bcm2709 linux port
-From 613412454d5196c8982a3abc0820389c16599a51 Mon Sep 17 00:00:00 2001
+From 792c5b694155f203fcb2daf73be8d3096c9c579b Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 11 Nov 2015 21:01:15 +0000
Subject: [PATCH] squash: include ARCH_BCM2708 / ARCH_BCM2709
-From 130a06f0f8becad1e93d3dda1ce96d6e5413ee39 Mon Sep 17 00:00:00 2001
+From fceeb5c989e1adda9676270cffca3225b51a15a1 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 1 May 2013 19:46:17 +0100
Subject: [PATCH] Add dwc_otg driver
-From c634714a43035371d4035b65e67413dcf1ff0f8e Mon Sep 17 00:00:00 2001
+From b55243d8af3cc0161d2ab671226635e7a203534c Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 17:06:34 +0100
Subject: [PATCH] bcm2708 framebuffer driver
-From 5fca3a9b2f0c0c928fa94368cdb767829a696ed5 Mon Sep 17 00:00:00 2001
+From 54def9a915b32cc162e77d8ce0f67da51fac5969 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 14:22:53 +0100
Subject: [PATCH] dmaengine: Add support for BCM2708
-From 28aa7cada5d110ced59ef0d9392a7fb3121cc551 Mon Sep 17 00:00:00 2001
+From 0b0a72af564ffb47a1447a25f05354b99ff40e63 Mon Sep 17 00:00:00 2001
From: gellert <gellert@raspberrypi.org>
Date: Fri, 15 Aug 2014 16:35:06 +0100
Subject: [PATCH] MMC: added alternative MMC driver
-From 0c9b7e17d022e45363737d67da590524416f8e3d Mon Sep 17 00:00:00 2001
+From 14e4f85ae6199d74472b35567b33a36d3dcf6428 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 25 Mar 2015 17:49:47 +0000
Subject: [PATCH] Adding bcm2835-sdhost driver, and an overlay to enable it
-From dec8e7bfb37280733ec278955f1bd8dd2bc176b8 Mon Sep 17 00:00:00 2001
+From 5941d6eccd8522090c18a68c506ab51885b955d5 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 3 Jul 2013 00:31:47 +0100
Subject: [PATCH] cma: Add vc_cma driver to enable use of CMA
-From b3f75cc54e1ee4612cfb34e2a91e03e3d1923534 Mon Sep 17 00:00:00 2001
+From ccbbc7dca6f75cf9874bf5a791f5abdae9e23143 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 26 Mar 2012 22:15:50 +0100
Subject: [PATCH] bcm2708: alsa sound driver
-From 9a1f0040b1f125f8729c772c1ad8e6940b923d7a Mon Sep 17 00:00:00 2001
+From 24d3397930cc8faafd020bae31a2c9f1e4682f02 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 2 Jul 2013 23:42:01 +0100
Subject: [PATCH] bcm2708 vchiq driver
-From bad77c41a36b52033392a19b2b6d51037f2614a5 Mon Sep 17 00:00:00 2001
+From b08bfcd6d88d7006f458e21dddabd42e53780708 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 16:07:06 +0100
Subject: [PATCH] vc_mem: Add vc_mem driver
-From 6bdbcad7cce6f6a6fc02f67add6b82d3fcc9e0c6 Mon Sep 17 00:00:00 2001
+From 02b8a5c4e32b9451932a583fb98ceacd4bc0d43b Mon Sep 17 00:00:00 2001
From: Tim Gover <tgover@broadcom.com>
Date: Tue, 22 Jul 2014 15:41:04 +0100
Subject: [PATCH] vcsm: VideoCore shared memory service for BCM2835
-From 5dc37246986844910511379a5c57ca87a50c6c0d Mon Sep 17 00:00:00 2001
+From e52d7ce66319f6687da3531b00cfec3001aec7a8 Mon Sep 17 00:00:00 2001
From: Luke Wren <luke@raspberrypi.org>
Date: Fri, 21 Aug 2015 23:14:48 +0100
Subject: [PATCH] Add /dev/gpiomem device for rootless user GPIO access
-From d85d7801b25872d08bd848c40da8fce973db5e46 Mon Sep 17 00:00:00 2001
+From 75b517005b8a733b84735cacfa9cdb3f301db6a0 Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sat, 5 Sep 2015 01:14:45 +0100
Subject: [PATCH] Add SMI driver
-From b1718d13dae01f04ead925c9562bf18634bbf267 Mon Sep 17 00:00:00 2001
+From 7c6a797f5ff01d8e968331eb83782ecbf2f13e6d Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sat, 5 Sep 2015 01:16:10 +0100
Subject: [PATCH] Add SMI NAND driver
-From b4269ab1d08d22959ec26ce1d31a45a1c5e85191 Mon Sep 17 00:00:00 2001
+From 656c19b0ad2dd41ae053d766ee4bda9a09cf34e6 Mon Sep 17 00:00:00 2001
From: Aron Szabo <aron@aron.ws>
Date: Sat, 16 Jun 2012 12:15:55 +0200
Subject: [PATCH] lirc: added support for RaspberryPi GPIO
-From f3f2bddacba23cab954a421d490bd17364e69d2d Mon Sep 17 00:00:00 2001
+From f2624ce13f5f6ba1121a8447a2a128215a62345a Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 3 Jul 2013 00:49:20 +0100
Subject: [PATCH] Add cpufreq driver
-From 688fec3024a2648a48396168a73ada00131682e1 Mon Sep 17 00:00:00 2001
+From 97433120b60c89bd6fa524bce96c7b0779d495b6 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 26 Mar 2013 19:24:24 +0000
Subject: [PATCH] Added hwmon/thermal driver for reporting core temperature.
-From b78bc1bb96c2db043c3be03c1bcccefa22621543 Mon Sep 17 00:00:00 2001
+From ea9c8e134ea48cdb7cd41db3afa3d9dafd09e00c Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Jun 2015 15:44:08 +0100
Subject: [PATCH] Add Chris Boot's i2c driver
-From 0fed71c0553d0bc86798f395c7e354cd132c9802 Mon Sep 17 00:00:00 2001
+From a7543fe261e31e16e8a6c1804d562556f0c1b794 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 26 Jun 2015 14:27:06 +0200
Subject: [PATCH] char: broadcom: Add vcio module
-From 2d716ee18a62c6e8b3a2e28a225bb3484693b6d2 Mon Sep 17 00:00:00 2001
+From cf0949b356a63cb426aa2bde985f669b48912564 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Fri, 26 Jun 2015 14:25:01 +0200
Subject: [PATCH] firmware: bcm2835: Support ARCH_BCM270x
-From b2868be5ed011e649590efdbcc6356bee4fcf257 Mon Sep 17 00:00:00 2001
+From 18383d506cc9489eb5e55bc3f7f481e82d5e33c5 Mon Sep 17 00:00:00 2001
From: Vincent Sanders <vincent.sanders@collabora.co.uk>
Date: Wed, 30 Jan 2013 12:45:18 +0000
Subject: [PATCH] bcm2835: add v4l2 camera device
-From 10a2bc39e76f415f9a42166ccc7af7e7b43565fc Mon Sep 17 00:00:00 2001
+From c5e1c42c941a7dbcb700d34b99e20e3f67725489 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 11 May 2015 09:00:42 +0100
Subject: [PATCH] scripts: Add mkknlimg and knlinfo scripts from tools repo
-From 5e3dd32b2906cc4f07b81f18de3d4a23c417e8fc Mon Sep 17 00:00:00 2001
+From 02b9189111d560c40c1ee4252b65d1dd59244108 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 5 Dec 2014 17:26:26 +0000
Subject: [PATCH] fdt: Add support for the CONFIG_CMDLINE_EXTEND option
--- a/drivers/of/fdt.c
+++ b/drivers/of/fdt.c
-@@ -954,19 +954,38 @@ int __init early_init_dt_scan_chosen(uns
+@@ -957,19 +957,38 @@ int __init early_init_dt_scan_chosen(uns
/* Retrieve command line */
p = of_get_flat_dt_prop(node, "bootargs", &l);
-From 48b5e0d194a88c4de6956f94ddd788e126de0a77 Mon Sep 17 00:00:00 2001
+From 92872257d573e4948d857100d8e68db63c8e76c0 Mon Sep 17 00:00:00 2001
From: notro <notro@tronnes.org>
Date: Wed, 9 Jul 2014 14:46:08 +0200
Subject: [PATCH] BCM2708: Add core Device Tree support
-From a8bd4a9fead66a720889c5693bf0d21608d9e2c0 Mon Sep 17 00:00:00 2001
+From 9e3c6310b7e656ef22e39fa0dfa5055171728431 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Sat, 15 Aug 2015 20:47:07 +0200
Subject: [PATCH] bcm2835: Match with BCM2708 Device Trees
-From a05a655545efe01002cf061b4373a9bb0071a302 Mon Sep 17 00:00:00 2001
+From b76321eab2ff7ba2a69eefd643a6c5e5dc917529 Mon Sep 17 00:00:00 2001
From: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Date: Mon, 17 Jun 2013 13:32:11 +0300
Subject: [PATCH] fbdev: add FBIOCOPYAREA ioctl
-From 4d7fd18a26cbb4a3cab0aff6ed48070e3aaf3599 Mon Sep 17 00:00:00 2001
+From d0ec0dae8be7a7181645bd8f9a849ea24f4484b0 Mon Sep 17 00:00:00 2001
From: Harm Hanemaaijer <fgenfb@yahoo.com>
Date: Thu, 20 Jun 2013 20:21:39 +0200
Subject: [PATCH] Speed up console framebuffer imageblit function
-From e681d15368e0c4515a5ee4bf238f859e8c501cf9 Mon Sep 17 00:00:00 2001
+From 534a5d5cecfd7c3e6cb18cde2dc15f5e6f1e415f Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 26 Mar 2013 17:26:38 +0000
Subject: [PATCH] Allow mac address to be set in smsc95xx
-From cab5187fbbc59808bab951b7f2736c4f0deff9fa Mon Sep 17 00:00:00 2001
+From d7a403ac584a5ed4a871c66deeb60fd887074ffc Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 8 May 2013 11:46:50 +0100
Subject: [PATCH] enabling the realtime clock 1-wire chip DS1307 and 1-wire on
-From c21be4772d67bc0b6bd3a59ce878b5dae705af44 Mon Sep 17 00:00:00 2001
+From 9646c6244bb4cc76369b2390b3a96d51566bea29 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 3 Jul 2013 00:54:08 +0100
Subject: [PATCH] Added Device IDs for August DVB-T 205
-From 7106c05e5f71588e746c786f93b1fca9dcdd3c50 Mon Sep 17 00:00:00 2001
+From 64f24afea7e30d68004f0d8db7822f87859d8dac Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Dec 2013 22:16:19 +0000
Subject: [PATCH] config: Enable CONFIG_MEMCG, but leave it disabled (due to
-From dbcc62f3ac4f3996b77cfb6b00ec26dc99f2521b Mon Sep 17 00:00:00 2001
+From 8d9e66b5c078b9677715362a48e17a55db1e0a41 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 14:59:51 +0100
Subject: [PATCH] ASoC: Add support for PCM5102A codec
-From 592ac515f17d49627b6653375267bad5c4bb1e5c Mon Sep 17 00:00:00 2001
+From 9cf0b8eed930ac26384249e193c1c91044a460e1 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 19:19:08 +0100
Subject: [PATCH] ASoC: Add support for HifiBerry DAC
-From ffd6597f0c3cff5d2171347f23b9a98d4e6fa95e Mon Sep 17 00:00:00 2001
+From 29c1cff5d670cc4f22eed035c6e584aec967c1b6 Mon Sep 17 00:00:00 2001
From: Florian Meier <florian.meier@koalo.de>
Date: Fri, 22 Nov 2013 19:21:34 +0100
Subject: [PATCH] ASoC: Add support for Rpi-DAC
-From 34e0545c33b0f444a5dd8c066cfe37420e95db33 Mon Sep 17 00:00:00 2001
+From dca34e0a5c4f9c77cbdb24f95e780e198d64013a Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Wed, 15 Jan 2014 21:41:23 +0100
Subject: [PATCH] ASoC: wm8804: Implement MCLK configuration options, add 32bit
-From 1d300db91ccab78593f0ea40d4e1c8a931232197 Mon Sep 17 00:00:00 2001
+From 881ed164c1e17831d21848d8fb2308d966860d82 Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Wed, 15 Jan 2014 21:42:08 +0100
Subject: [PATCH] ASoC: BCM:Add support for HiFiBerry Digi. Driver is based on
-From 0dd064b656993f40c09c055a6bef13fa023ceedf Mon Sep 17 00:00:00 2001
+From 8dc1047aba0f19791ee20957edcde1af7bb1ba0e Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Thu, 16 Jan 2014 07:36:35 +0100
Subject: [PATCH] ASoC: wm8804: Set idle_bias_off to false Idle bias has been
-From 8a4af475fccaff7b70b3d93ef1730001a2376063 Mon Sep 17 00:00:00 2001
+From dc2bd1c4b038c4f2d921808891b69a803805d984 Mon Sep 17 00:00:00 2001
From: Gordon Garrity <gordon@iqaudio.com>
Date: Sat, 8 Mar 2014 16:56:57 +0000
Subject: [PATCH] Add IQaudIO Sound Card support for Raspberry Pi
-From 8529e2130a7d67c7595746e5cf618e6058c3315c Mon Sep 17 00:00:00 2001
+From 4b8b269bc8793dd4367ed6e858bfdec4e0d2e850 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 14 Jul 2014 22:02:09 +0100
Subject: [PATCH] hid: Reduce default mouse polling interval to 60Hz
-From aaa93fd9dee0084d0c2d9b50021fe7f2a2457fd7 Mon Sep 17 00:00:00 2001
+From f3a96a42af5565562adadb00524ad386038aafff Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Mon, 4 Aug 2014 10:06:56 +0200
Subject: [PATCH] Added support for HiFiBerry DAC+
-From 4f718b9dbd8bd3d9ce465351463b0240116f4945 Mon Sep 17 00:00:00 2001
+From 8508fddff6dbb8b83296a4aa9edad6288b3b50bb Mon Sep 17 00:00:00 2001
From: Daniel Matuschek <info@crazy-audio.com>
Date: Mon, 4 Aug 2014 11:09:58 +0200
Subject: [PATCH] Added driver for HiFiBerry Amp amplifier add-on board
-From 5527e5534c58f8555d699d10d2d67afc3aa768e0 Mon Sep 17 00:00:00 2001
+From fc2758b64e4d75ae71f7a32b1a78b107d5ec84bd Mon Sep 17 00:00:00 2001
From: Ryan Coe <bluemrp9@gmail.com>
Date: Sat, 31 Jan 2015 18:25:49 -0700
Subject: [PATCH] Update ds1307 driver for device-tree support
-From b19a2e678c297e81b8b9ab6db1f4775be1c678a8 Mon Sep 17 00:00:00 2001
+From 1d7fe535e241fb25ba677a9f152d4e233b10273b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 6 Feb 2015 13:50:57 +0000
Subject: [PATCH] BCM270x_DT: Add pwr_led, and the required "input" trigger
-From 2eb050c58ca0620dd91af4e49a584118fadd9398 Mon Sep 17 00:00:00 2001
+From 872df8214f904707c5adab47beed4e8bbcfd8653 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 27 Feb 2015 15:10:24 +0000
Subject: [PATCH] enc28j60: Add device tree compatible string and an overlay
-From bae12047250724b26ffd0acdceeede7dfe766f52 Mon Sep 17 00:00:00 2001
+From d2f2b44e63dd67888a4d2b24a79a5d66206c9e2d Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbrodkorb@conet.de>
Date: Wed, 25 Mar 2015 09:26:17 +0100
Subject: [PATCH] Add driver for rpi-proto
-From b9a95c01f53d1ae5e2e5d24682d7533ee1f487a8 Mon Sep 17 00:00:00 2001
+From 7d42460d569ed603352ee1b28bfe5bc5501b3048 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 13 Apr 2015 17:16:29 +0100
Subject: [PATCH] config: Add default configs
-From c06545159fe86fd45a9ff570e0a1b7cf04c2ebe0 Mon Sep 17 00:00:00 2001
+From 0b4369e0b29b2c974e7d4792e19bd8ec5a1cfe32 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Wed, 29 Apr 2015 17:24:02 +0200
Subject: [PATCH] bcm2835: bcm2835_defconfig
-From 1c0f57f0ad2d226ec0d1ef1e91a38c3abdee891a Mon Sep 17 00:00:00 2001
+From e6cf054ec136973f863fb31684453c37aef9c616 Mon Sep 17 00:00:00 2001
From: Gordon Hollingworth <gordon@raspberrypi.org>
Date: Tue, 12 May 2015 14:47:56 +0100
Subject: [PATCH] rpi-ft5406: Add touchscreen driver for pi LCD display
-From 74c81d3d8233d758e3e58f9a72dd6370d08077ac Mon Sep 17 00:00:00 2001
+From ffdb5092c571c88a6d924c2c3dbf8bec9d70a3e6 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 13 Oct 2014 11:47:53 +0100
Subject: [PATCH] Improve __copy_to_user and __copy_from_user performance
-From 24703d6981447867a7092997e29ac911698ec77d Mon Sep 17 00:00:00 2001
+From 1ad569f9f83546073951ea911702cf3cb18affe3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 25 Jun 2015 12:16:11 +0100
Subject: [PATCH] gpio-poweroff: Allow it to work on Raspberry Pi
-From 962e7c5c04075063b86f389043dcfe1ac948a868 Mon Sep 17 00:00:00 2001
+From 8d428c18ab557bb00c6fb6d61d8e20a3c1602f32 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 14 Jul 2015 10:26:09 +0100
Subject: [PATCH] spidev: Add "spidev" compatible string to silence warning
-From cd035dbd2c541ab1f517f79d6b7c54948a91ed8b Mon Sep 17 00:00:00 2001
+From 546cd6ad07064b850fe069f84e28da11526cbc3f Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 14 Jul 2015 17:00:18 +0100
Subject: [PATCH] scripts/dtc: Add overlay support
-From 2b475b95bcf5487bd23b7a636ce36fae98f6e81a Mon Sep 17 00:00:00 2001
+From 2aea8eec985fba410f063532210f5757d494bc19 Mon Sep 17 00:00:00 2001
From: Phil Elwell <pelwell@users.noreply.github.com>
Date: Tue, 14 Jul 2015 14:32:47 +0100
Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver
-From 89afb4f891b10c2f736cfac22f274e33ebc5256e Mon Sep 17 00:00:00 2001
+From 08fec50dc8b898f329d1a44eedc1872895c195d6 Mon Sep 17 00:00:00 2001
From: Jan Grulich <jan@grulich.eu>
Date: Mon, 24 Aug 2015 16:03:47 +0100
Subject: [PATCH] RaspiDAC3 support
-From d182e9b8453b663bb0c75f73e1791bf78f2d4bcc Mon Sep 17 00:00:00 2001
+From fdc3eec5500e9a443609856afa4f7b1acf7440ea Mon Sep 17 00:00:00 2001
From: Jan Grulich <jan@grulich.eu>
Date: Mon, 24 Aug 2015 16:02:34 +0100
Subject: [PATCH] tpa6130a2: Add headphone switch control
-From 80bd42a96b7c6a20219803609651acd9e49f4db6 Mon Sep 17 00:00:00 2001
+From 3fd3bb6b780df4b923bfdb167313ee2ab359b741 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 28 Sep 2015 23:38:59 +0100
Subject: [PATCH] irq-bcm2835: Fix building with 2708
-From a8124cba46bd8d4d8fdf9e09fe3046b01ff21c42 Mon Sep 17 00:00:00 2001
+From df54a53fe53d15568160b7b975ba376bad83fc47 Mon Sep 17 00:00:00 2001
From: P33M <P33M@github.com>
Date: Wed, 21 Oct 2015 14:55:21 +0100
Subject: [PATCH] rpi_display: add backlight driver and overlay
-From 7e7500431515d41e1498cef0984ef6f9b91cac67 Mon Sep 17 00:00:00 2001
+From 073ad36caa6710db3a90cf2d1214c418cfa47644 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Mon, 16 Nov 2015 14:05:35 +0000
Subject: [PATCH] bcm2835-dma: Fix up convert to DMA pool
-From 93ede86bcccc686cdc933e0711289b0312f0361a Mon Sep 17 00:00:00 2001
+From aa3c95a513a7407550c304180ed4951cbd607a6c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 11 Nov 2015 11:38:59 +0000
Subject: [PATCH] scripts: Multi-platform support for mkknlimg and knlinfo
-From a70ea1cd22e9b4e7278dfea3b2d6fb87e8902ca3 Mon Sep 17 00:00:00 2001
+From 5009df0a7714100a74d455893485ea9a8dd8a48d Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 2 Mar 2015 13:01:12 -0800
Subject: [PATCH] drm/vc4: Add suport for 3D rendering using the V3D engine.
-From 1c356bdfac710d5427cfeac2ce2216d0bb17a6db Mon Sep 17 00:00:00 2001
+From ea89a4c8bf0456bffb86303180c5c77bea9544ba Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 14 Oct 2015 11:32:14 -0700
Subject: [PATCH] drm/vc4: Force HDMI to connected.
-From 99cab11df7185247a24977d8cbcf5d660d0f861b Mon Sep 17 00:00:00 2001
+From cc7b77efeca4e1c56f3634618cf152f8dc2c0a8d Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:23:18 -0700
Subject: [PATCH] drm/vc4: bo cache locking fixes.
-From beac608ce63d6537a89f3de8080a1c2d16aa1a4c Mon Sep 17 00:00:00 2001
+From f8b577f45825b0adbad112489f01a3bf62298b2c Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:29:41 -0700
Subject: [PATCH] drm/vc4: bo cache locking cleanup.
-From 454b9dabe51753598732a2d91f742abdd82f3b18 Mon Sep 17 00:00:00 2001
+From f3bf16818c042a794181a0f60f25a643fe66c72e Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:32:24 -0700
Subject: [PATCH] drm/vc4: Use job_lock to protect seqno_cb_list.
-From 72634a2adb667d991249e66e691878cd7e7722a0 Mon Sep 17 00:00:00 2001
+From 775a3408d94a474101066ac8dd8939a4cd5c793a Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:44:35 -0700
Subject: [PATCH] drm/vc4: Drop struct_mutex around CL validation.
-From 81fcdac0b54488a1fea35a0fe2e799511888fa84 Mon Sep 17 00:00:00 2001
+From 08d3b4a8535a142d79c30fe6a558ac8c97de11f1 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Oct 2015 08:44:35 -0700
Subject: [PATCH] drm/vc4: Drop struct_mutex around CL validation.
-From 593759c954e9ac7b237bb4e2136a12952ae107d0 Mon Sep 17 00:00:00 2001
+From b7c383a85d432fd5f4fdc41cda64200543cb2176 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 20 Oct 2015 13:59:15 +0100
Subject: [PATCH] drm/vc4: Add support for more display plane formats.
-From ab2cd74a31d3da208cc6264ab79c1c0ee503498d Mon Sep 17 00:00:00 2001
+From 8591fab92df5153be99548dbdd9b1fcb075a7924 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 23 Oct 2015 12:31:56 +0100
Subject: [PATCH] drm/vc4: No need to stop the stopped threads.
-From 7ab57c24a8c094163c2a5da180edbba0c45b5765 Mon Sep 17 00:00:00 2001
+From 77d99c047cae1413a2a5f2aa2f0a0723388d9e7b Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 23 Oct 2015 12:33:43 +0100
Subject: [PATCH] drm/vc4: Remove extra barrier()s aroudn CTnCA/CTnEA setup.
-From b1cfa411e68e4afc1d8bedda4ae1924108a5c2fa Mon Sep 17 00:00:00 2001
+From bf7d47d5a691a348dcbc884c35e9336ae4ad5d77 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 23 Oct 2015 14:57:22 +0100
Subject: [PATCH] drm/vc4: Fix a typo in a V3D debug register.
-From 7a4238c79a815c0cb87eecb30897f6710f5e4a82 Mon Sep 17 00:00:00 2001
+From e426c18fa0b44ddf9c059e4c0288fbcb0c1b7acf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 2 Nov 2015 17:07:33 +0000
Subject: [PATCH] drm/vc4: Enable VC4 modules, and increase CMA size with
-From 505327ef0c6712565139bfbae6fde8c881566088 Mon Sep 17 00:00:00 2001
+From 4572e750b39f33337337565be5e820aabcf79608 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Nov 2015 18:29:58 +0000
Subject: [PATCH] squash: fixups
-From fd632236b26e841d032acc5fce6cdd4d50780daa Mon Sep 17 00:00:00 2001
+From bd8a6a92307f8ab297904777b9d8fc9db86472c9 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 18 Nov 2015 20:26:03 +0000
Subject: [PATCH] squash: add missing vc4-kms-v3d-overlay.dtb to makefile
-From d8d6facbd16527ccc11a926e769ec3e86f60dcdb Mon Sep 17 00:00:00 2001
+From e339d872e8c50264bf026a09d521dfb20f463c55 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 12 Oct 2015 11:23:34 -0700
Subject: [PATCH] clk: bcm2835: Also build the driver for downstream kernels.
-From d47719348c1c616d8ffa42d9ae8827147c0251ea Mon Sep 17 00:00:00 2001
+From 95901c883fd6a5220e0aee84a9f52179d6410a1d Mon Sep 17 00:00:00 2001
From: Holger Steinhaus <hsteinhaus@gmx.de>
Date: Sat, 14 Nov 2015 18:37:43 +0100
Subject: [PATCH] dts: Added overlay for gpio_ir_recv driver
-From 85b8ee017f92d4aa0e004e01878cab3ba5b88851 Mon Sep 17 00:00:00 2001
+From c8d4cf878f12987c7fda5ac6bfe85168a24dc40a Mon Sep 17 00:00:00 2001
From: Alistair Buxton <a.j.buxton@gmail.com>
Date: Sun, 1 Nov 2015 22:27:56 +0000
Subject: [PATCH] Build i2c_gpio module and add a device tree overlay to
-From 1e78b98d827b57373b0a984af0ceb21e576b6037 Mon Sep 17 00:00:00 2001
+From 4dbd55cb96ca68e96e9b5f4b38891305c5ef1b13 Mon Sep 17 00:00:00 2001
From: mwilliams03 <mark.mwilliams@gmail.com>
Date: Sun, 18 Oct 2015 17:07:24 -0700
Subject: [PATCH] New overlay for PiScreen2r
-From cd12f8bd219b60685803c427847909f5151d8143 Mon Sep 17 00:00:00 2001
+From b69e933e051a52e91c1b0acf8d0edc132b6de10e Mon Sep 17 00:00:00 2001
From: Ondrej Wisniewski <ondrej.wisniewski@gmail.com>
Date: Fri, 6 Nov 2015 15:01:28 +0100
Subject: [PATCH] dts: Added overlay for Adafruit PiTFT 2.8" capacitive touch
-From bc4c561b1b11b068263addb6ca5055136859cc5e Mon Sep 17 00:00:00 2001
+From 0672f5739873fe7c7513a2b1ee4422bab906bc77 Mon Sep 17 00:00:00 2001
From: Stuart MacLean <stuart@hifiberry.com>
Date: Fri, 2 Oct 2015 15:12:59 +0100
Subject: [PATCH] Add support for the HiFiBerry DAC+ Pro.
-From c952f560bf95867368542c0f2e46abe536ad9afc Mon Sep 17 00:00:00 2001
+From bab0eadfe38c5ef41da44d7bddd5c1940fb21444 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 5 Oct 2015 10:47:45 +0100
Subject: [PATCH] BCM270X_DT: Add at86rf233 overlay
-From daf482fad156e7bf39e3e2a26183452068796e7d Mon Sep 17 00:00:00 2001
+From 25b689e947f8607f961d12f3cb51c1c52394a71c Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 18 Dec 2014 16:07:15 -0800
Subject: [PATCH] mm: Remove the PFN busy warning
-From a1fbf2a0424262c6f2d974aa5a6e71d47288e1a8 Mon Sep 17 00:00:00 2001
+From 997e91885e700a7b175c98f0e64670ed4fd57bc0 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 19 Nov 2014 12:06:38 -0800
Subject: [PATCH] drm: Put an optional field in the driver struct for GEM obj
-From 66b424ecf55290f394d004e13f800bec1b44a87a Mon Sep 17 00:00:00 2001
+From 4deea5f5ad38d8b398355a636b9113150ca9da9f Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 30 Oct 2015 10:09:02 -0700
Subject: [PATCH] drm/vc4: Add an interface for capturing the GPU state after a
-From c6f6dec9e9b7956d7261f11caf6e2a0b78a54d89 Mon Sep 17 00:00:00 2001
+From dd5e9636e87ee08b38b28626fc862099e5a038cf Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 4 Dec 2015 11:35:34 -0800
Subject: [PATCH] drm/vc4: Update a bunch of code to match upstream submission.
-From 3fb1fdfad76d7ebbe1c78e262f57e636cfa2545d Mon Sep 17 00:00:00 2001
+From 7e34028c87bb714dff3d3e3720a18e46d452feaa Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 11 Dec 2015 19:45:03 -0800
Subject: [PATCH] drm: Use the driver's gem_object_free function from CMA
-From 3fcab2551c8649da57ad5fc5166f85edd870f641 Mon Sep 17 00:00:00 2001
+From c682c50a4564b43a43791dc03d0aa7c8848b2564 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 17 Jul 2015 13:15:50 -0700
Subject: [PATCH] drm/vc4: Add support for MSAA rendering.
-From 4c19d1b2713fd0452edfc479cea4628229048994 Mon Sep 17 00:00:00 2001
+From 7d93805e31f36c9766e05e32c84e143090a5b3f9 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 8 Dec 2015 14:00:43 -0800
Subject: [PATCH] drm/vc4: A few more non-functional changes to sync to
-From b45971f3b371a7e50bfa2ebd8545abaf299182d5 Mon Sep 17 00:00:00 2001
+From 24c98ec16f68e3028b8db89ce6ceb074d719fe19 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 15 Dec 2015 23:46:32 +0000
Subject: [PATCH] drm/vc4: Use "hpd-gpios" for HDMI GPIO, like what landed
-From 837fa77c227eda3ebdab64b24acb3dc94599e76d Mon Sep 17 00:00:00 2001
+From 55242268abd2076c4560de14d0227ae5382f274e Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 7 Dec 2015 12:35:01 -0800
Subject: [PATCH] drm/vc4: Synchronize validation code for v2 submission
-From 6a602d99694b69c8cd19970f7d2b019dadaaaa09 Mon Sep 17 00:00:00 2001
+From 426f98468a5e4d083a1753f60ddfa777d98cd86c Mon Sep 17 00:00:00 2001
From: janluca <janluca@zedat.fu-berlin.de>
Date: Sun, 27 Dec 2015 14:34:04 +0100
Subject: [PATCH] MMC: Do not use mmc_debug if CONFIG_MMC_BCM2835 is not set
-From 29171b2e2b69a4edb84bd228e1d9ea0451e7dcd2 Mon Sep 17 00:00:00 2001
+From eca01622bfb78a9fd65266d0c31a87d5930416bd Mon Sep 17 00:00:00 2001
From: Devon Fyson <devonfyson@gmail.com>
Date: Wed, 30 Dec 2015 16:40:47 -0500
Subject: [PATCH] Extend clock timeout, fix modprobe baudrate parameter.
-From 9715590cd5024b1eb657d06a6eb60a48751e221c Mon Sep 17 00:00:00 2001
+From f59901d7849b23cd2ae6dc17184d46f62eaf9386 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
Date: Thu, 31 Dec 2015 16:44:58 +0100
Subject: [PATCH] bcm270x_dt: Add dwc2 and dwc-otg overlays
-From 5c8479b7e82155eed9e86658935dda7bf8202b8d Mon Sep 17 00:00:00 2001
+From 22c2725b4321128985d9780152d85a8dd1ace706 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Jan 2016 14:42:17 +0000
Subject: [PATCH] BCM270X_DT: Add the sdtweak overlay, for tuning sdhost
-From 5e45aa3d7aa8a59d82fb57cafd341e2c8c908f81 Mon Sep 17 00:00:00 2001
+From 55a1a97ec19439ea0225e666508878a4619a1dff Mon Sep 17 00:00:00 2001
From: Andrew Litt <ajlitt@splunge.net>
Date: Mon, 11 Jan 2016 07:54:21 +0000
Subject: [PATCH] bcm2835-mmc: Don't override bus width capabilities from
-From bafb94810a17cd66baa5d220f6005d8f1db1e516 Mon Sep 17 00:00:00 2001
+From f2c83096a1292894329f8c3855be4a21f31efa44 Mon Sep 17 00:00:00 2001
From: Andrew Litt <ajlitt@splunge.net>
Date: Mon, 11 Jan 2016 07:55:54 +0000
Subject: [PATCH] SDIO-overlay: add bus_width parameter
-From 0b6eb4c6015ead6da180ef4a4da695b660bcb99f Mon Sep 17 00:00:00 2001
+From 9901970aec244478351526d0ec64bd71998a4898 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:41:45 +0100
Subject: [PATCH] bcm2835: extend allowed range of channels and samplerates
-From 4b235ff95b0fcfa9731c1159402f4fef0e26f1d3 Mon Sep 17 00:00:00 2001
+From f204c383ca1e309b94e7c447b1b15f1063a4d2ba Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:42:18 +0100
Subject: [PATCH] bcm2835: restrict channels*rate to 8*960000
-From fa0c088b7f7372b6946a2f2139f0e391cace34d6 Mon Sep 17 00:00:00 2001
+From d7d03f10e6da33cd732e25499977c88f172732a4 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:42:48 +0100
Subject: [PATCH] rpi: update vc_vchi_audioserv_defs.h
-From 55349969a1914b515956c14f3fafd25df5c827a9 Mon Sep 17 00:00:00 2001
+From 32cfd4810065c36ad0cb136a47004e4c4c9ed227 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:43:12 +0100
Subject: [PATCH] bcm2835: implement channel map API
-From 7067b04bc0f05e25621868e47e3de42befa8ac61 Mon Sep 17 00:00:00 2001
+From 0346d7cfbc9c1f48eada6f27c929eda059298879 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:43:35 +0100
Subject: [PATCH] bcm2835: access controls under the audio mutex
-From db9dc8093738d064963257f19b8b6d927d137dd9 Mon Sep 17 00:00:00 2001
+From 895025420b369c66ed590356ebfd0b787572956a Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:44:03 +0100
Subject: [PATCH] bcm2835: always use 2/4/8 channels for multichannel layouts
-From 8bf3ca92ea1352a4b97258eee4b225240e525a54 Mon Sep 17 00:00:00 2001
+From f54692dc8ff6e0aecf27fdd2ebaed8e22d04f053 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:44:24 +0100
Subject: [PATCH] bcm2835: only allow stereo if analogue jack is selected
-From 7756cf7615123045c60b9f9e311d2491a5e23424 Mon Sep 17 00:00:00 2001
+From 965303a0745da159e5eaa72694421ce95ccf8421 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Wed, 13 Jan 2016 19:44:47 +0100
Subject: [PATCH] bcm2835: interpolate audio delay
-From 2e34fd2e06d95cd4e4e29d94ce016ab4426f75af Mon Sep 17 00:00:00 2001
+From a621bf4951f8e66f77d3298148a064c94db1ef0e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 19 Jan 2016 17:16:38 +0000
Subject: [PATCH] bcm2835-sdhost: Add workaround for odd behaviour on some
-From 8349a032c4e1d3f9c3c5e4bb66064b6addf6f111 Mon Sep 17 00:00:00 2001
+From b08d7543b04d9b9d82073ed5c61123be28f5300d Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 22 Jan 2016 16:03:24 +0000
Subject: [PATCH] bcm2835-sdhost: Add debug_flags dtparam
-From 1bb36898f708926752ef4afa43c62056b376d7a4 Mon Sep 17 00:00:00 2001
+From 9120234bb37043477ef69fec8c03c3731ed6861f Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 25 Jan 2016 09:12:06 +0000
Subject: [PATCH] BCM270X_DT: Add sdio_overclock parameter to sdio overlay
-From e4bd962eeb728b924ebdaca077c2136280a190f2 Mon Sep 17 00:00:00 2001
+From cc252ee4f3948d12a878c93cbdb0505a9ee7bc03 Mon Sep 17 00:00:00 2001
From: Michael Lange <linuxstuff@milaw.biz>
Date: Thu, 21 Jan 2016 18:10:16 +0100
Subject: [PATCH] rtc: ds1307: add support for the DT property 'wakeup-source'
-From 44a37e094bbe4dd9ee63fb1d5426b3945981fd26 Mon Sep 17 00:00:00 2001
+From 5e6354c06e4fe463c37179a768da78d675cc2f36 Mon Sep 17 00:00:00 2001
From: vitalogy <vitalogy_github@milaw.biz>
Date: Tue, 19 Jan 2016 07:02:02 +0100
Subject: [PATCH] dt-overlay: add wittypi-overlay.dts
-From 4efc768113042d0b48fdb4e170d5469f93f6e20b Mon Sep 17 00:00:00 2001
+From 6ddd618b031bc8f28f76114ac553f14bed1eb2ee Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 19 Jan 2016 16:28:05 +0000
Subject: [PATCH] FIXUP i2c_bcm2708: Don't change module baudrate parameter
-From 290cec3c415ef37c10465f201545f26423241249 Mon Sep 17 00:00:00 2001
+From cd2b4030e41c716256e0ee92286a4b376d242956 Mon Sep 17 00:00:00 2001
From: Digital Dreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 4 Feb 2016 14:14:44 +0000
Subject: [PATCH] Allow up to 24dB digital gain to be applied when using
-From 3f38eac723b07d22f70a77ae006d18eb84218a9e Mon Sep 17 00:00:00 2001
+From 5eb11c1a6735ddbcb4b37014caf5945123aad8a2 Mon Sep 17 00:00:00 2001
From: Digital Dreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 4 Feb 2016 20:04:00 +0000
Subject: [PATCH] Limit PCM512x "Digital" gain to 0dB by default with HiFiBerry
-From 8d559133434730d0a1c5f661e6cdaca27f6ee184 Mon Sep 17 00:00:00 2001
+From fff71f293b81ea6aa254397236484437b491ed9c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 8 Feb 2016 09:46:33 +0000
Subject: [PATCH] BCM270X_DT: Adjust overlay README formatting
-From da5b64aae5cb189a2a2e24a459e84cb5fab5d864 Mon Sep 17 00:00:00 2001
+From 7febd88f815cadf0cb2f73b4aa9ad78e8cf79e04 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 11 Feb 2016 16:51:01 +0000
Subject: [PATCH] bcm2835-sdhost: Major revision
-From f6031fa472bf8ce9eaba902b00cd2af3d00f0fb4 Mon Sep 17 00:00:00 2001
+From dab78628dc1fe1488674cdc8a6864cbf382f72cc Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 12 Feb 2016 15:38:00 +0000
Subject: [PATCH] BCM270X_DT: Add dtparams for the SD interface
-From 20c4f162386eea18273c461a183244a472ecc1da Mon Sep 17 00:00:00 2001
+From 2407b0b1342fbe40d1c25a879590544405a07a11 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 12 Feb 2016 14:50:25 +0000
Subject: [PATCH] dcw_otg: trim xfer length when buffer larger than allocated
-From 2ace17c79f413a43950944cf282235ea3de8c6e2 Mon Sep 17 00:00:00 2001
+From dc519294e6a463eae2f1ad1d65fd06b1c4d10c96 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 15 Feb 2016 10:00:27 +0000
Subject: [PATCH] bcm2835-sdhost: Restore ATOMIC flag to PIO sg mapping
-From ef351705676a8a3906bfbc3696e7d44bcc3a320b Mon Sep 17 00:00:00 2001
+From 0f77e8585ca73daddcc386ec45c9e5d5649de0fa Mon Sep 17 00:00:00 2001
From: Craig Roberts <cjr@craigroberts.net>
Date: Tue, 16 Feb 2016 10:03:42 +0000
Subject: [PATCH] Updated smsc95xx driver to check for a valid MAC address in
-From 82973637f761439a9ff507bf7a0a4aa325d98870 Mon Sep 17 00:00:00 2001
+From ef391c488590773b5b1476a3095a38d728a92751 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 17 Feb 2016 19:02:31 +0000
Subject: [PATCH] dcw_otg: Make trimming messages less noisy
-From dfcdab5a069fb85d39ae9b0b86dca5f7277a5a47 Mon Sep 17 00:00:00 2001
+From 8c1a913881a9805fce189f382f929beeb8ea2a50 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 18 Feb 2016 15:28:14 +0000
Subject: [PATCH] BCM270X_DT: at86rf233 overlay - drop to 3MHz
-From 0f091b751bab3fcedb2281d3a201c42c627c7867 Mon Sep 17 00:00:00 2001
+From 36cb06886133f1ce5374a5c6b38b6598370f7094 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 19 Feb 2016 12:04:48 +0000
Subject: [PATCH] bcm2835-sdhost: Downgrade log message status
-From 87614bfb6cc2eba2b5dd80596a76866f42bef42a Mon Sep 17 00:00:00 2001
+From 0d89bfb41f2879a9b5ea0831cab8f0e75dbba831 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 15 Jan 2016 16:48:27 +0000
Subject: [PATCH] config: Enable HCI over UARTs
-From fc507785b54db0e908719ba738531f45fb1797d3 Mon Sep 17 00:00:00 2001
+From 8398a93b43f10a99e9c40297d46801eda6e681b1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 17 Dec 2015 13:37:07 +0000
Subject: [PATCH] hci_h5: Don't send conf_req when ACTIVE
-From e0f147530d17dfe705fee528c40232047bd1ee47 Mon Sep 17 00:00:00 2001
+From 39f58f568f34295be6c0b9a2f6f2e502b9305c01 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 23 Feb 2016 17:26:48 +0000
Subject: [PATCH] amba_pl011: Don't use DT aliases for numbering
-From 0ace9f0a0b1d5768cec58a69bd0d4fffd5995ad2 Mon Sep 17 00:00:00 2001
+From 85e7001af712694f81195fe9389deb14aa562da3 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 15 Dec 2015 15:35:57 -0800
Subject: [PATCH] clk: bcm2835: Add bindings for the auxiliary peripheral clock
-From 19a393608fdcadad7fdde85e4439f05d10381d84 Mon Sep 17 00:00:00 2001
+From 55c1d677bb9f90db7d08c514171a9e3cbf643910 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 15 Dec 2015 15:35:58 -0800
Subject: [PATCH] clk: bcm2835: Add a driver for the auxiliary peripheral clock
-From fb47ac65c77bd2bc6480bb45a0bef29056108984 Mon Sep 17 00:00:00 2001
+From 9fa83cc7de026d7d41b4a13f037cc30f5f877956 Mon Sep 17 00:00:00 2001
From: Fraser <github@frasersdev.net>
Date: Tue, 23 Feb 2016 10:04:37 +1100
Subject: [PATCH] Aux SPI 1&2 implementation
-From 8369af719005849271d4c50a87dc6422b83dc276 Mon Sep 17 00:00:00 2001
+From 2508082b19a36af8ad56d401c910362b4d54ffca Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Tue, 23 Feb 2016 17:28:23 +0100
Subject: [PATCH] ASoC: bcm: add missing .owner fields in sound card drivers
-From 3bd2928682ee70f260d9c62a17d1a5e43f979fec Mon Sep 17 00:00:00 2001
+From fc2a68dea3c04061fa6f237dac63e7a8cdc7c1e4 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Wed, 20 Jan 2016 17:50:09 +0000
Subject: [PATCH] smsx95xx: Add option to disable the crimes against truesize
-From fba2e30e3511cbc94249468490843723268a0c39 Mon Sep 17 00:00:00 2001
+From 3ffde07f9d0ee50522cb017639c12a83cfd6409b Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 23 Feb 2016 19:56:04 +0000
Subject: [PATCH] bcm2835-virtgpio: Virtual GPIO driver
-From d5ed78c5a2305b7952f4e86f4de4c68630875264 Mon Sep 17 00:00:00 2001
+From 4ef209cd78c9e9eac87838309c727bc90e46abe7 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 21 Jan 2016 17:57:49 +0000
Subject: [PATCH] BCM270X_DT: Add Pi3 support
-From ff7f4e8e8f46f1132b1013cf1799abb7dde687cb Mon Sep 17 00:00:00 2001
+From 67c13f9569f35903cd8e02307223f31701e3bece Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Mon, 8 Feb 2016 23:49:41 +0000
Subject: [PATCH] DT: Add overlays to configure I2C pins
-From 185f82a6c86933b1df3ba8ec99f82fbcdd77d396 Mon Sep 17 00:00:00 2001
+From 6760ab7eda42c3fba4a8057a51d7cb17fa5d4c5e Mon Sep 17 00:00:00 2001
From: Dhiraj Goel <dhiraj.goel@gmail.com>
Date: Thu, 3 Mar 2016 21:10:50 -0800
Subject: [PATCH] bcm2835-camera: fix a bug in computation of frame timestamp
-From f74038a8afbdbb109f831befeb53ce2b641a8805 Mon Sep 17 00:00:00 2001
+From e203577bc5e6aab0b42e2d7cc25999b2e0976e0b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 2 Mar 2016 10:59:05 +0000
Subject: [PATCH] BCM270X_DT: Add pi3-disable-bt overlay
-From 3a7f5db20ed4d685ce8b5336f859d547bdd98a85 Mon Sep 17 00:00:00 2001
+From adc561fa52120b3dd7a7c5f485bd7ab29e46e881 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 09:53:03 +0000
Subject: [PATCH] BCM270X_DT: Add pi3-miniuart-bt DT overlay
-From a241da2b069599afab9ee1259855d3c2e509894d Mon Sep 17 00:00:00 2001
+From 6d0549bc24a0c4668ab1a526d9816fe4acbfe2ea Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 13:38:39 +0000
Subject: [PATCH] Pi3 DT: Add dtparams for the SD interface
-From 37f28c9626c8217166a1096e1d6432fca73a0849 Mon Sep 17 00:00:00 2001
+From b7c9cdabb89d18689a9cd3dad75d7a4fffed4818 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 15:05:11 +0000
Subject: [PATCH] vchiq_arm: Tweak the logging output
-From 5f0af4369aeb791f481e05447e1d4d05579367cd Mon Sep 17 00:00:00 2001
+From 535bf1097beb4279ac4895a61199078672ffc63a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 7 Mar 2016 16:46:39 +0000
Subject: [PATCH] bcm2835-sdhost: Only claim one DMA channel
-From fba9024580be3eed90cce59f776fc27e6ca8fbc9 Mon Sep 17 00:00:00 2001
+From f505fc71c85f0f87e45d4890ae9e7762c38e6c9a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 8 Mar 2016 09:49:16 +0000
Subject: [PATCH] bcm2835-mmc: Only claim one DMA channel
-From fe221477aa6c78391646e226c029a56e34595873 Mon Sep 17 00:00:00 2001
+From db0e0480f0b4ada69a4c9b4a275b4b111370976f Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 8 Mar 2016 17:08:39 +0000
Subject: [PATCH] config: rebuild with savedefconfig
-From 8ceec2dfed10944e299b4114d756dbe494baaaec Mon Sep 17 00:00:00 2001
+From aa00be1f6c0ae1f04b8ff94d3a091cd2860d47e1 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 8 Mar 2016 17:06:33 +0000
Subject: [PATCH] config: Add module for mcp3422 ADC
-From e1fd7a9ccd89e291334d4a9d6b7d1f3040d7aad0 Mon Sep 17 00:00:00 2001
+From 4231d2f39951636a1274bfca0073161478e6203b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 8 Mar 2016 16:18:57 +0000
Subject: [PATCH] Pi3 DT: Add pull-ups on the UART RX lines
-From 94ffee1a2cbfa8016ca9e4782342618bf88a14c7 Mon Sep 17 00:00:00 2001
+From d74ae60dde1069e18d717bfe9362caa5d3aa8660 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 9 Mar 2016 21:28:52 +0000
Subject: [PATCH] BCM270X_DT: rpi-display overlay - add swapxy param
-From 1bdb6cc0903dce08e168a6d23ba6675202c3dd0f Mon Sep 17 00:00:00 2001
+From 7942b527d3e7d1740a8e74af70437eb05e82ce56 Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Fri, 11 Mar 2016 11:44:35 +0000
Subject: [PATCH] Remove I2S config from bt_pins.
-From f8a8a35b960f948c60c9d0a4b544366c9154d5a0 Mon Sep 17 00:00:00 2001
+From 042eed4d005cd09ee1322285c0c1e92c93b07795 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 10 Aug 2015 09:44:59 +0100
Subject: [PATCH] Revert "scripts/dtc: Add overlay support"
-From c128c19379082f13558d4b51ae7d15a209bd9918 Mon Sep 17 00:00:00 2001
+From 0b65cac4de4a82ca44fdb9e1a448efa8e7d4c939 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 10 Aug 2015 09:49:15 +0100
Subject: [PATCH] scripts/dtc: Update to upstream version 1.4.1
-From 14ea3d6ac7fea0e515bbde859379b0a43b6d67b9 Mon Sep 17 00:00:00 2001
+From 5bf309aa8dfe300fdfe23413f32935c34ebc8770 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Thu, 22 Oct 2015 23:30:04 +0300
Subject: [PATCH] configfs: implement binary attributes
-From 9745f13ee715e7f47ac11a31d0f75b9661b63344 Mon Sep 17 00:00:00 2001
+From 837aeb8b5e162873fe687e788c74984645e83964 Mon Sep 17 00:00:00 2001
From: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Date: Wed, 3 Dec 2014 13:23:28 +0200
Subject: [PATCH] OF: DT-Overlay configfs interface
-From 984c98b47f9ffd5f57599e604df2cc09c63f74ba Mon Sep 17 00:00:00 2001
+From a58c105dfd13e0ba54a1124d0aad81d9c25f85e3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 13 Mar 2015 12:43:36 +0000
Subject: [PATCH] Protect __release_resource against resources without parents
-From 95aee427e91922408870627e6e3d66f975791336 Mon Sep 17 00:00:00 2001
+From dc51a5855ded07e7f8bcf0e63c38f23e747be828 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 13 Mar 2015 20:00:21 +0000
Subject: [PATCH] BCM270X_DT: Add a .dtbo target, use for overlays
-From 5f1a77a98df6352d585a906a61166062cb43c14b Mon Sep 17 00:00:00 2001
+From 6aa589e510033a1876471f6aa0dbbd4626d46da3 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 29 May 2015 11:18:58 +0100
Subject: [PATCH] scripts/knlinfo: Decode DDTK atom
-From 6d4c8ab1f16bc536dd5d858341e1c0d0b67d930b Mon Sep 17 00:00:00 2001
+From f5017a57544d55b8dddb02bf34379bc1ab31b169 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 29 May 2015 11:48:59 +0100
Subject: [PATCH] Enable Dynamic Device Tree for bcmrpi_defconfig and
-From fbc9f06dc47543dbd6b7f2806f6535082eac3696 Mon Sep 17 00:00:00 2001
+From 61f50528b39f21e872ec0a3a138f2323a2676f6d Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Sun, 13 Mar 2016 16:14:44 +0000
Subject: [PATCH] SQUASH: Add CONFIG_OF_CONFIGFS to bcmrpi_defconfig
-From 68bdbeeade267f4aff7a4eaf9a122baf306982f4 Mon Sep 17 00:00:00 2001
+From 8ceb57a34f122beb1ac3fe70173c541d26fba76e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 14 Mar 2016 16:56:54 +0000
Subject: [PATCH] dts, kbuild: dtbs_install installs .dtbo files too
-From a4a7cdd3364de9fa9edfb32a64fa0e7a577d9143 Mon Sep 17 00:00:00 2001
+From 95ca033cb9ac492b060c0cc44093180871e8d63b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 14:10:29 +0000
Subject: [PATCH] bcm2835-sdhost: Workaround for "slow" sectors
-From bf6a2bb922c5ef6831d40eb934597733836080bf Mon Sep 17 00:00:00 2001
+From 2007577b3766f15a9fa3d288d4a31d58ac9e2fbc Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 15:49:16 +0000
Subject: [PATCH] BCM270X_DT: Add labels to spidev nodes
-From 66c35d065749cfb8b128077cfc1a114674273bea Mon Sep 17 00:00:00 2001
+From 9f69e431b2fb604797348c3b443b5c67b0e33c6d Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 16:27:26 +0000
Subject: [PATCH] BCM270X_DT: Use spidev labels in overlays
-From 3b2ac4714efbc144e8df9fd939498313958eaac5 Mon Sep 17 00:00:00 2001
+From 1bf20e7041a933386fb59eee85fbdeed19114f3e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 15 Mar 2016 16:41:37 +0000
Subject: [PATCH] BCM270X_DT: Build and document the wittypi overlay
-From c12c80f4a33ca959cb0a62c6284bbc27cdce0b48 Mon Sep 17 00:00:00 2001
+From 2c25f59ed0d0feaf05ff1b7b4665081ecd429c50 Mon Sep 17 00:00:00 2001
From: Matthias Reichl <hias@horus.com>
Date: Tue, 15 Mar 2016 21:13:39 +0100
Subject: [PATCH] scripts/dtc: Fix UMR causing corrupt dtbo overlay files
-From 64b838bcfcd490561e919bd569da8ab3afb83f83 Mon Sep 17 00:00:00 2001
+From ccc5778597639879e9260af8c3fa601c03e13846 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 16 Mar 2016 08:35:06 +0000
Subject: [PATCH] BCM270X_DT: Add dtparam for uart1
-From a81b12982d9624ad84d05996233239bb7e213f70 Mon Sep 17 00:00:00 2001
+From dda2c9e1ba7c3a98e49e57a2188f713affd22b2b Mon Sep 17 00:00:00 2001
From: Przemek Rudy <prudy1@o2.pl>
Date: Fri, 11 Mar 2016 22:41:26 +0100
Subject: [PATCH] dwc-overlay: Use label so overrides can apply.
-From 2bcb714370ae69fe808d7e2061927c2ea1753ff7 Mon Sep 17 00:00:00 2001
+From 52b14a59aff492c6064e12e7e9c943a256a19e9c Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 22 Jan 2016 13:06:39 -0800
Subject: [PATCH] drm/vc4: Add a debugfs node for tracking execution state.
-From e8da5a4c9dfbb65205cc9e4d448af3e8965af88d Mon Sep 17 00:00:00 2001
+From e825d46ed778699b2e96adbe7e947a2d3c0f092b Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 13:03:33 -0800
Subject: [PATCH] drm/vc4: Include vc4_drm.h in uapi in downstream build.
-From baf132f97c5fa25c0dcec59369e225e759ab22e6 Mon Sep 17 00:00:00 2001
+From d0ec6706ad65b6d760da74f5d437d973fe1e8a23 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 13:05:00 -0800
Subject: [PATCH] drm/vc4: Validate that WAIT_BO padding is cleared.
-From 339e2ea50b25fe0183161cee31f640e691f2a1c0 Mon Sep 17 00:00:00 2001
+From 97a21ddbd77a52a444560be76dfd9e0a58ddb141 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 13:52:41 -0800
Subject: [PATCH] drm/vc4: Fix the clear color for the first tile rendered.
-From 96cfc336eb33c0152c4aff462bd6a21cd75cc731 Mon Sep 17 00:00:00 2001
+From 6931f7be4e5485733229d15be79ca2a2861255e0 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 14:13:12 -0800
Subject: [PATCH] drm/vc4: Return an ERR_PTR from BO creation instead of NULL.
-From 0304e9381edf30280122d981e5a1b8dedc4c003f Mon Sep 17 00:00:00 2001
+From 4c0209e0ffde7a73494aca652145f5a803fa58ae Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 14:32:41 -0800
Subject: [PATCH] drm/vc4: Fix -ERESTARTSYS error return from BO waits.
-From d12dd7a58fcc585b75fae60ab230a51b2ac9a6cb Mon Sep 17 00:00:00 2001
+From ab28176ed8636d47a33183238b3003585b02bafc Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 25 Jan 2016 14:33:50 -0800
Subject: [PATCH] drm/vc4: Drop error message on seqno wait timeouts.
-From 895c93a3efd6653df6bbabc12c2e0205be5560dd Mon Sep 17 00:00:00 2001
+From 0c30ca161cd0aeda5ce514055897c07dcdf8e5cb Mon Sep 17 00:00:00 2001
From: campag <dave-lowe@ntlworld.com>
Date: Wed, 24 Feb 2016 16:45:42 +0000
Subject: [PATCH] BCM270X_DT: Add 1-bit SDIO using minimal pins...
-From 52ca91f1e28a45f4584432525b149f32a0048dd0 Mon Sep 17 00:00:00 2001
+From 1051b5df8570b9b4585fa549628f3fdd4269c171 Mon Sep 17 00:00:00 2001
From: Michael Heimpold <michael.heimpold@i2se.com>
Date: Fri, 29 Jan 2016 12:00:37 +0100
Subject: [PATCH] Add overlay and enable support for QCA7000 board
-From baaee4dd48573d8de4e22d812717c6863ba4b7e6 Mon Sep 17 00:00:00 2001
+From a98fb5280c69d90e85bb875177a68880089312b0 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 9 Mar 2016 13:28:24 +0000
Subject: [PATCH] serial: Take care starting a hung-up tty's port
-From f763209fb1c001b84b03ba86c72db7a7ae8fb441 Mon Sep 17 00:00:00 2001
+From 36b8544e144679820d51eaa2df304037cde3d790 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 17 Mar 2016 10:16:16 +0000
Subject: [PATCH] pi3-miniuart-bt-overlay: Correct and clarify info
-From 45513400f0b487f9bbca90e823fa591ef741dad8 Mon Sep 17 00:00:00 2001
+From 7f76d6841a10b715bea14251c948d92ad3067ff7 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 17 Mar 2016 10:41:56 +0000
Subject: [PATCH] pwm overlays: Params must have in-overlay targets
-From 263f82e038a8ae204e6beaf2102ad9d91d5ca4ee Mon Sep 17 00:00:00 2001
+From df6733ad56b80de44fdddf9401ca8dbb45ef5479 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 18 Mar 2016 13:06:29 +0000
Subject: [PATCH] BCM270X_DT: Switch Compute Module to MMC
-From c237ff4a1325ac94169ed1f5f9022f1358b79ac9 Mon Sep 17 00:00:00 2001
+From 63c48596343f1431c898381a06629eef2719fbeb Mon Sep 17 00:00:00 2001
From: P33M <P33M@github.com>
Date: Fri, 18 Mar 2016 17:38:37 +0000
Subject: [PATCH] dwc_otg: Don't free qh align buffers in atomic context
-From 87dd923568a28a6784581a3f4c18970b834779a8 Mon Sep 17 00:00:00 2001
+From 233851b858bcbf1be26d372064a71cfee7d31f4a Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 21 Mar 2016 15:38:38 +0000
Subject: [PATCH] dwc_otg: Enable the hack for Split Interrupt transactions by
-From 678f08c4c3fd62b5e3cd95cc9596733354b2ba19 Mon Sep 17 00:00:00 2001
+From a2f5eadfa43687957033e3ee56c945db0d8842ff Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Sat, 19 Mar 2016 16:51:37 +0000
Subject: [PATCH] BCM270X_DT: Remove explicit claiming of UART pins
-From f05cfb491a1895d0975be326a9e7e061c6db2d5a Mon Sep 17 00:00:00 2001
+From fbef85f29f48bd75a0bd5a7aa9c1a061ef30eaad Mon Sep 17 00:00:00 2001
From: Rodrigo Freire <rfreire@rf.usersys.redhat.com>
Date: Tue, 22 Mar 2016 12:40:33 -0300
Subject: [PATCH] lirc_rpi: Lower IR reception error to debug
-From 39afc75832ce9cd81f09b035630dd30e325f1797 Mon Sep 17 00:00:00 2001
+From c2d672f4a69716b0619162a9fd99e3daf5b7406c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Mar 2016 14:16:25 +0000
Subject: [PATCH] vchiq_arm: Access the dequeue_pending flag locked
-From 48ba5a6ae0158827e416d8b8cd21680672737b79 Mon Sep 17 00:00:00 2001
+From b77abe2ef3f89489f9ca47653170bf31c3ea0bab Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Mar 2016 15:57:14 +0000
Subject: [PATCH] BCM270X_DT: Add pi3-act-led overlay
-From 827e46013755254e526f0b682495ee88066a05a3 Mon Sep 17 00:00:00 2001
+From 9f0245f4c5b19e0708891143438d93b876e48aca Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 23 Mar 2016 20:53:47 +0000
Subject: [PATCH] vchiq_arm: Service callbacks must not fail
-From 07207eccca9d4439d69e56fb5df378ac669087bf Mon Sep 17 00:00:00 2001
+From 7a08c498e9f5c7ddd27e7f1956fa532cba009cd4 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Thu, 17 Mar 2016 18:16:16 +0000
Subject: [PATCH] Add configs and overlay for PCA9548 I2C mux
-From d491a6a5acfeacccf0a24171babc0d5cf80a91da Mon Sep 17 00:00:00 2001
+From d1235b349a4f89dec0738692494373471acb3a36 Mon Sep 17 00:00:00 2001
From: Nicolas Boullis <nboullis@debian.org>
Date: Wed, 23 Mar 2016 23:40:15 +0100
Subject: [PATCH] BCM270X_DT: Add DS1339 to i2c-rtc overlay
-From 2f3fc168789eb4952a99e19c046867516fc522f7 Mon Sep 17 00:00:00 2001
+From f881fd5a75d0731743bad5b5f05add485c867d4b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 29 Mar 2016 15:32:30 +0100
Subject: [PATCH] copy_from_user: CPU_SW_DOMAIN_PAN compatibility
-From f48a0653d0d30576b57061c30e3907e3363b6107 Mon Sep 17 00:00:00 2001
+From 1ce5a11b0faf0657a65a510ba960554bbfee2410 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 16:33:09 +0100
Subject: [PATCH] bcm2835-sdhost: Adjust to core clock changes
-From b80428cf646d37e5b84103807a7259f8dccfe4d0 Mon Sep 17 00:00:00 2001
+From 8f857c4b1ed23af5464538180466a48639bdab2b Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 17:07:15 +0100
Subject: [PATCH] BCM270X_DT: Document hazards of sdhost overlay
-From 6a91406ee4a03844ef1dd7b9db4f4d52eee9047d Mon Sep 17 00:00:00 2001
+From dd1c9e1693db72a6dd5c7a62fbfae4c30b97d5d9 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 17:23:15 +0100
Subject: [PATCH] cpufreq: Temporarily ignore io_is_busy=1
-From 29e93302df7295b89c3819c304ce25d7830bd857 Mon Sep 17 00:00:00 2001
+From dee2755eac7464d0fc303f81d316cfe3a09b23a1 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 30 Mar 2016 20:18:38 +0100
Subject: [PATCH] Revert "cpufreq: Temporarily ignore io_is_busy=1"
-From cb795ee030d3ed4b792e795e545b81c00254df25 Mon Sep 17 00:00:00 2001
+From 4395275fcbb80f1e312d75b20a68aabcb7c0dc74 Mon Sep 17 00:00:00 2001
From: Daniel Borkmann <daniel@iogearbox.net>
Date: Thu, 7 Jan 2016 15:50:22 +0100
Subject: [PATCH] net, sched: add skb_at_tc_ingress helper
Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
- net/sched/cls_bpf.c | 6 +-----
- 2 files changed, 10 insertions(+), 5 deletions(-)
+ net/sched/cls_bpf.c | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
--- a/net/sched/cls_bpf.c
+++ b/net/sched/cls_bpf.c
-From 4a680ce7ef96ac561e02c1e02951a210092a2ef6 Mon Sep 17 00:00:00 2001
+From 446e5857ddeac1cae84ec54d64b748820b5b455a Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 31 Mar 2016 15:44:53 +0100
Subject: [PATCH] bcm2835-sdhost: Precalc divisors and overclocks
-From 664ffae1f5e89a69f12f83717c2a7efccea008ca Mon Sep 17 00:00:00 2001
+From cc8d551542116bd779ee2ceb63746324bc3732ed Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Apr 2016 12:35:32 +0100
Subject: [PATCH] Revert "bcm2835-sdhost: Precalc divisors and overclocks"
-From fe985856bc342027d498cfb5e261fef698ac336b Mon Sep 17 00:00:00 2001
+From 1537ae821b86a8d13c669e1fed2d20d87bb6d2dd Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Apr 2016 12:35:51 +0100
Subject: [PATCH] Revert "bcm2835-sdhost: Adjust to core clock changes"
-From 38575eb0b705f13b039b433687cf2a70cd8d425b Mon Sep 17 00:00:00 2001
+From 8851ac5dfa652434a8e031883314a8fd0226fecf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 4 Apr 2016 16:03:18 +0100
Subject: [PATCH] bcm2835-sdhost: Firmware manages the clock divisor
-From 086b24cf253a55acfaa185310fa19b7493ddbe3f Mon Sep 17 00:00:00 2001
+From 322b3f1b3d2b9296147b07735f1a24c63872fc09 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Mon, 4 Apr 2016 19:52:27 +0100
Subject: [PATCH] Revert "Revert "cpufreq: Temporarily ignore io_is_busy=1""
-From 2791d33cb965581363a616e116574b16cf279a5a Mon Sep 17 00:00:00 2001
+From f3aeac2717f9a0fa33625e84340803453b98a726 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Thu, 31 Mar 2016 16:49:52 +0100
Subject: [PATCH] config: Enabled IPV6_SUBTREES
-From 8e367cd08419234412d2d9b430d2ebe7d528b931 Mon Sep 17 00:00:00 2001
+From 13d40fc43b9c2e3bdf4be8f8166a28ca1c5bdc34 Mon Sep 17 00:00:00 2001
From: Sam Nazarko <email@samnazarko.co.uk>
Date: Fri, 1 Apr 2016 17:27:21 +0100
Subject: [PATCH] add smsc95xx packetsize module_param
-From 9891143d60d8c653db23b6fafaa402fc1de12588 Mon Sep 17 00:00:00 2001
+From e7c6a88f381479abcefee8313e183b56574ca529 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 5 Apr 2016 19:40:12 +0100
Subject: [PATCH] reboot: Use power off rather than busy spinning when halt is
-From 8fa158cb700b0fdbb76ede07ec2103b5930e0913 Mon Sep 17 00:00:00 2001
+From 199d6fd8ab2e9095b45d0258841247a21c3786b9 Mon Sep 17 00:00:00 2001
From: HiassofT <github@hias.horus.com>
Date: Wed, 6 Apr 2016 21:45:01 +0200
Subject: [PATCH] Revert "bcm2835-dma: Fix dreq not set for slave transfers"
-From 2026557f3f9df2d0563f71b4bd704956c4cfd4ab Mon Sep 17 00:00:00 2001
+From 3a8d33418117261b9d8423ac792b414947683b6d Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Fri, 1 Apr 2016 15:28:46 +0100
Subject: [PATCH] RPi config: Add CONFIG_PWM_PCA9685 for NXP PCA9685 driver
-From 28cb7cf5480a77df08bba1e30e7070dff46463d7 Mon Sep 17 00:00:00 2001
+From c161493ab80ad1fffc70c36a78e3c751f86edaa9 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 8 Apr 2016 17:43:27 +0100
Subject: [PATCH] BCM270X_DT: Don't generate "linux,phandle" props
-From 35730c81cb94119c117901bbdcc148baf35aa37c Mon Sep 17 00:00:00 2001
+From 22fef46503bd929ef663255285c9aa7c6a4dd93f Mon Sep 17 00:00:00 2001
From: 6by9 <6by9@users.noreply.github.com>
Date: Fri, 8 Apr 2016 18:15:43 +0100
Subject: [PATCH] V4L2 driver updates (#1393)
-From b61249080d5492fdb4bcf22e1672dc773a9bd95a Mon Sep 17 00:00:00 2001
+From c63af7f27233c7e7c6f0e4ee7d040e9545190df8 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 11 Apr 2016 12:50:58 +0100
Subject: [PATCH] bcm2835-sdhost: Reset the clock in task context
-From 715ff3d10588ca8b2a72acbc918ba4849a1f988c Mon Sep 17 00:00:00 2001
+From 04f3358c4a1b8f12d2820d47f318a768a539dc76 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Thu, 7 Apr 2016 12:44:24 +0100
Subject: [PATCH] config: Enable CONFIG_IPV6_ROUTER_PREF for networks with
-From 0561be97d8de22572d91d78c807b1bb4a38255f3 Mon Sep 17 00:00:00 2001
+From 42c7a126580dbb98b33d63e15fdc28c5f9349792 Mon Sep 17 00:00:00 2001
From: jochenberger <fooberger@gmail.com>
Date: Thu, 7 Apr 2016 21:38:46 +0200
Subject: [PATCH] Enable hid-betopff module
-From 9efe69a81ab2f031cbfeccb2f606a241f155e6b5 Mon Sep 17 00:00:00 2001
+From 23bed22a1e5402195e167b1abbff63e3b6d0f3d5 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 12 Apr 2016 12:45:16 +0100
Subject: [PATCH] config: Make IPV6 a module and regenerate with defconfig
-From f88c6236440972207406742d87692859b4f15612 Mon Sep 17 00:00:00 2001
+From 8f6cc1607cb38e53b0638be389fceaafb48b3f34 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 5 Apr 2016 13:01:54 +0100
Subject: [PATCH] BCM270X_DT: Add dpi24 overlay
-From 6e50eac8d374fa7d6ed3e02564851bc250443402 Mon Sep 17 00:00:00 2001
+From 70b0a84fca1cda347f62151daf18c0a970259e1c Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 14 Apr 2016 00:57:33 +0100
Subject: [PATCH] Modify IQAudIO DAC+ ASoC driver to set card/dai config from
-From 0a36540c6a3b383a554412bf65cc75d65f7b77f8 Mon Sep 17 00:00:00 2001
+From 00fa941a2c5be22d7ab5034458b1275d108c18bb Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Thu, 14 Apr 2016 01:00:58 +0100
Subject: [PATCH] Add support for the Digital Dreamtime Akkordion music player.
-From 3120b4247e34e255f4f43d291df4b779b3e9d4c8 Mon Sep 17 00:00:00 2001
+From 5d4a20fc508c8e161ba58eace5ddd3d91a27f1f9 Mon Sep 17 00:00:00 2001
From: Aaron Shaw <shawaj@gmail.com>
Date: Thu, 7 Apr 2016 21:26:21 +0100
Subject: [PATCH] Add Support for BoomBerry Audio boards
-From 215eb99b0a93a3365c7e3819b2701b416f88a25a Mon Sep 17 00:00:00 2001
+From 66800cc055de7b25eb233e70e48695b816aa2067 Mon Sep 17 00:00:00 2001
From: Aaron Shaw <shawaj@gmail.com>
Date: Fri, 8 Apr 2016 00:06:00 +0100
Subject: [PATCH] Add support for mcp7940x family of RTC
-From ab1d490040fb4f7ea284feebb8a1e78bd6d54176 Mon Sep 17 00:00:00 2001
+From b671dfcbf9a59907b3d6947bc78eb1d744020112 Mon Sep 17 00:00:00 2001
From: Jeremy McDermond <nh6z@nh6z.net>
Date: Thu, 14 Apr 2016 09:39:20 -0700
Subject: [PATCH] bcm2709_defconfig: Fix typo on BoomBerry configuration
-From 9d3c4c7019c68e5eb1c1635c8878f5c6bff3e120 Mon Sep 17 00:00:00 2001
+From 464afbfc94db24cda3c9a0e5c227396b93f30f57 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 15 Apr 2016 10:48:39 +0100
Subject: [PATCH] boomberry-dac: Adjust for ALSA API change
-From 39aaeeb6912c97ede930b463c99b7848d1340a45 Mon Sep 17 00:00:00 2001
+From 34ae5dd6055af9a01dc15a04e58068a14816fb88 Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Sun, 17 Apr 2016 04:44:47 -0700
Subject: [PATCH] vmcs: Remove unused sm_cache_map_vector definition (#1411)
-From 27c3944874a034975d23722b10d6d7e6b7dd930d Mon Sep 17 00:00:00 2001
+From 4c9a54f3e2d0f73144e1837e2e7dde39447a40cb Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 18 Apr 2016 11:56:53 +0100
Subject: [PATCH] scripts/mkknlimg: Append a trailer for all input
-From bd462524b465fc6aeed292cca8c2da19be3d9887 Mon Sep 17 00:00:00 2001
+From 39f86135e9808c9e037f3bf98893af63d9777c6a Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Tue, 19 Apr 2016 12:57:52 +0100
Subject: [PATCH] bcm2835_thermal: Don't report unsupported trip type
-From e9e95f1830775a13ccd1a3746d7fa526ed2c722c Mon Sep 17 00:00:00 2001
+From 82ba59f70cfce918365d11787866e5681d43ffb8 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 19 Apr 2016 13:55:29 +0100
Subject: [PATCH] scripts/dtc: Only emit local fixups for overlays
-From 955fba9c62f43238b5c3687a78ed812ac95edd44 Mon Sep 17 00:00:00 2001
+From 89c0c9310876b7ae0d0ed9002e1ebe44f856f876 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Tue, 19 Apr 2016 16:08:35 +0200
Subject: [PATCH] bcm2835: do not require substream for accessing chmap ctl
-From f3e1f2d9d34ab1cfafc4df7d67b7c65619b69ce0 Mon Sep 17 00:00:00 2001
+From 1c535cbe0b5ddcea74691b40bc4810c56d71f79b Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Tue, 19 Apr 2016 16:29:41 +0200
Subject: [PATCH] bcm2835: add fallback channel layouts if channel map API is
-From 221eae6137f4ed70aa0c55decd7a0659391cd30b Mon Sep 17 00:00:00 2001
+From 6d91385fc4b510f7eeaf390ea63549df1004f209 Mon Sep 17 00:00:00 2001
From: wm4 <wm4@nowhere>
Date: Tue, 19 Apr 2016 16:38:03 +0200
Subject: [PATCH] bcm2835: log which channel map is set
-From 01993e1dda68d85ff6cf11cab6051bcefa46d2c1 Mon Sep 17 00:00:00 2001
+From 929fdf6bd4f3dcbe4d545e920ec41437225b777f Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:46 +0100
Subject: [PATCH] clk: bcm2835: add a round up ability to the clock divisor
-From c9de2447d4b9cf641276d74902405a0b5e1c2a8d Mon Sep 17 00:00:00 2001
+From eca8103766d1addc0ce0866298aca3937ac62727 Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:47 +0100
Subject: [PATCH] clk: bcm2835: Support for clock parent selection
-From cbf30c2377959725bfcccc8cbb5b98fe6af4aefb Mon Sep 17 00:00:00 2001
+From ab4de687cdad0adbc555237364e5a8e2cdef5144 Mon Sep 17 00:00:00 2001
From: Remi Pommarel <repk@triplefau.lt>
Date: Sun, 6 Dec 2015 17:22:48 +0100
Subject: [PATCH] clk: bcm2835: Add PWM clock support
-From f9855ea88630c3fdf6508db8775f34103f363f50 Mon Sep 17 00:00:00 2001
+From 99afe6a0ee26f6e848fde5db3b32bc693d692764 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Tue, 22 Dec 2015 20:13:08 +0000
Subject: [PATCH] clk: bcm2835: added missing clock register definitions
-From 111293a9f0aa27bfdbb0ca864d9524691bb5934f Mon Sep 17 00:00:00 2001
+From d1b891afed88e5f675fa30f1dcc8e728472208ac Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 11:39:21 +0000
Subject: [PATCH] clk: bcm2835: correctly enable fractional clock support
-From 30ffff91447cd2d0dc6afd6ada53b13bc04f2f05 Mon Sep 17 00:00:00 2001
+From 98fbd9211b97b261dd1c8935920e93e2808d892e Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 11:39:22 +0000
Subject: [PATCH] clk: bcm2835: clean up coding style issues
-From 57390bceca1ef7df484290d3864b76a217c6b553 Mon Sep 17 00:00:00 2001
+From db6d450ea27bd6e355561539c0eedaa54c923471 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 14:20:15 +0000
Subject: [PATCH] clk: bcm2835: expose raw clock-registers via debugfs
-From 061e3130a957f04af48ff703209096e8a0b5655e Mon Sep 17 00:00:00 2001
+From 67071edadb9965b7c9a36443c5d6e6808dfae8d9 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 12:51:41 +0000
Subject: [PATCH] clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver
-From c0e6c2ae19400047ad0f744f95b6997b579e0ffc Mon Sep 17 00:00:00 2001
+From 9d38f8ad8156a83b2f9e3c68ddf87541a8511395 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 12:51:42 +0000
Subject: [PATCH] clk: bcm2835: reorganize bcm2835_clock_array assignment
-From 5be1920e2cfc7e351aeff3920607c4d96fed9f1a Mon Sep 17 00:00:00 2001
+From 817850fa2ab1a1b66ac1235b9dfe403d5efc8ac4 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 12:51:43 +0000
Subject: [PATCH] clk: bcm2835: enable management of PCM clock
-From 0bd7afe408b2afd845f3b4971cfa641653716a12 Mon Sep 17 00:00:00 2001
+From 471248ef11464161346bd623becb383625122162 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 15:43:56 +0000
Subject: [PATCH] clk: bcm2835: add missing PLL clock dividers
-From 3f26e43abb4c245d41dfbed03d82c3bc36044b04 Mon Sep 17 00:00:00 2001
+From 45ef8c48a9c0d695fb649f5188e244fe75672244 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Mon, 29 Feb 2016 15:43:57 +0000
Subject: [PATCH] clk: bcm2835: add missing osc and per clocks
-From 0021fdc59ccc2901f9ae829eb89d624a518eab27 Mon Sep 17 00:00:00 2001
+From e87c05bd439fa2bd69ab809a3d2d89492cf33521 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 1 Dec 2015 16:49:12 -0800
Subject: [PATCH] ARM: bcm2835: Define two new packets from the latest
-From fab8814aede95569e5dfe3bad78ceda471bd341f Mon Sep 17 00:00:00 2001
+From a25a9d99959c6508d26d5d48794334b11326bb4c Mon Sep 17 00:00:00 2001
From: Alexander Aring <alex.aring@gmail.com>
Date: Wed, 16 Dec 2015 16:26:47 -0800
Subject: [PATCH] ARM: bcm2835: add rpi power domain driver
-From 98f387ec974ccd45054a13211ed8d91d46bbe4cc Mon Sep 17 00:00:00 2001
+From 28d6a37d9a4fb6a6add95951f09ba5c5f6765952 Mon Sep 17 00:00:00 2001
From: Arnd Bergmann <arnd@arndb.de>
Date: Thu, 31 Dec 2015 23:39:14 +0100
Subject: [PATCH] ARM: bcm2835: clarify RASPBERRYPI_FIRMWARE dependency
-From 5b934c573b70da98f70b98aa20a1f96bba8ef9b2 Mon Sep 17 00:00:00 2001
+From 0d0f40a68002763b33a1d981ce2366d8121ac4cb Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 Apr 2016 15:55:02 -0700
Subject: [PATCH] ARM: bcm2708: Enable building power domain driver.
-From 9d065d6d38cb379a36e655c98f5e42cbfc1de0b2 Mon Sep 17 00:00:00 2001
+From 17604268d3980b4c2b309074cd482aacaed40f89 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 Apr 2016 14:23:30 -0700
Subject: [PATCH] bcm2708: Add RASPBERRYPI_POWER to the defconfigs.
-From 61a1a146c39f694a1d347ac251ebd9b7d804064f Mon Sep 17 00:00:00 2001
+From 9cc05ac9630c22193a7e177466aeec5704e54ed1 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 Apr 2016 14:36:31 -0700
Subject: [PATCH] bcm2708: Add the power domain driver to the device tree.
-From 8c3b6b58d1f49ce8a352379cd48647e8116659ca Mon Sep 17 00:00:00 2001
+From 2f08815292d1c80d6581f19f2dc7132b8b7928b4 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 Apr 2016 14:40:08 -0700
Subject: [PATCH] bcm2708: Reference the HDMI power domain for the HDMI driver.
-From e1d56edafff76ade96b5dce25e7cf1300213929b Mon Sep 17 00:00:00 2001
+From efbaf42dfcaca937a67b560884a74e04ade66dd9 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 17 Dec 2015 15:36:28 +0300
Subject: [PATCH] drm/vc4: copy_to_user() returns the number of bytes remaining
-From 6d29873e5a006db5b342630976b5527c8049acd2 Mon Sep 17 00:00:00 2001
+From 3c2d156ad9e5e45d46938d2138aca038df44b9d3 Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Thu, 17 Dec 2015 15:39:08 +0300
Subject: [PATCH] drm/vc4: allocate enough memory in vc4_save_hang_state()
-From 015bc9646e2ff3586789757645aeee592819d843 Mon Sep 17 00:00:00 2001
+From 13d9887c2a348c14fae98fedcee204c4d9d8c9f1 Mon Sep 17 00:00:00 2001
From: Dave Airlie <airlied@redhat.com>
Date: Mon, 18 Jan 2016 09:10:42 +1000
Subject: [PATCH] drm/vc4: fix warning in validate printf.
-From 2fa85567b77dc0a771cdeb37a4e6fb27ec23100d Mon Sep 17 00:00:00 2001
+From 464137e9a7f5c690a0125679936d9b86799f3dc0 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 28 Dec 2015 14:14:09 -0800
Subject: [PATCH] drm/vc4: Improve comments on vc4_plane_state members.
-From 66c0f03718b26cb3bf47c60ef94770fab9728464 Mon Sep 17 00:00:00 2001
+From 2c5f2132dd02490d11aa37a22c258ad345b37c92 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 28 Dec 2015 14:14:57 -0800
Subject: [PATCH] drm/vc4: Add missing __iomem annotation to hw_dlist.
-From eb708cc358e2f94461f971012c9c477a41b01237 Mon Sep 17 00:00:00 2001
+From 7e56858dfcadd3edc4a218c03c8f52c9bae2dfae Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 28 Dec 2015 14:34:44 -0800
Subject: [PATCH] drm/vc4: Move the plane clipping/scaling setup to a separate
-From 81f885f1ab1729bb2d14ca44d4861e0bb982b324 Mon Sep 17 00:00:00 2001
+From 73801d8192779fb0c763a4ef7fd058ce41df056d Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 30 Dec 2015 11:50:22 -0800
Subject: [PATCH] drm/vc4: Add a proper short-circut path for legacy cursor
-From 1c86cb2794cdba850675a95de59acf505a3d7654 Mon Sep 17 00:00:00 2001
+From 4bfd9c177d92b59723ee6323e9ed81fbc331675c Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 28 Dec 2015 13:25:41 -0800
Subject: [PATCH] drm/vc4: Make the CRTCs cooperate on allocating display
-From dfda3a55b70ee0b1227ec4551d6376d463dd14b9 Mon Sep 17 00:00:00 2001
+From 0b493b472e9c0fa5882243a649dbf2b473c2e680 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 20 Oct 2015 14:18:56 +0100
Subject: [PATCH] drm/vc4: Add more display planes to each CRTC.
-From 4ac20cea599c0f91b3240013ce603e608cab2d6a Mon Sep 17 00:00:00 2001
+From dd89447cbae60a723e7192f4c176eb62672dfb2b Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 28 Dec 2015 14:45:25 -0800
Subject: [PATCH] drm/vc4: Fix which value is being used for source image size.
-From 0b7d1c1de27840bd1a32bc0a28c8354e362b38ca Mon Sep 17 00:00:00 2001
+From 446bf09980764ce077b74a85af9f141e6192d3dc Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 20 Oct 2015 16:06:57 +0100
Subject: [PATCH] drm/vc4: Add support for scaling of display planes.
-From 64f2da0496d51f7260e18aeed6e72ed09fec7b00 Mon Sep 17 00:00:00 2001
+From 6fba6a7c20cecfc587e5043030cba78af582823e Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 30 Dec 2015 12:25:44 -0800
Subject: [PATCH] drm/vc4: Add support for YUV planes.
-From bb79ceb9166d67ad8d658dead2f62bda7668f139 Mon Sep 17 00:00:00 2001
+From 15d0cf1b80d818770bc1fa70ac58e1ee8551617b Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 8 Feb 2016 11:19:14 -0800
Subject: [PATCH] drm/vc4: Fix spurious GPU resets due to BO reuse.
-From 2ee2a1f157f4eb81c2aca3a076fe74c1e587d2f8 Mon Sep 17 00:00:00 2001
+From 08d2762526279939513276a142849f5a82b31106 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 5 Feb 2016 15:06:15 -0800
Subject: [PATCH] drm/vc4: Fix a framebuffer reference leak on async flip
-From 17467b182d70d76c27d8e498abb281b28f58f92c Mon Sep 17 00:00:00 2001
+From fdd5a9166e76db86360c19da7917cd0aab407b85 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 12 Feb 2016 14:15:14 -0800
Subject: [PATCH] drm/vc4: Bring HDMI up from power off if necessary.
-From 00d72cb223055ccdac7e9cda524b00a26a63c13e Mon Sep 17 00:00:00 2001
+From 8cfb1bedd144e0d460776f139011197f5236a71f Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 12 Feb 2016 15:16:56 -0800
Subject: [PATCH] drm/vc4: Add another reg to HDMI debug dumping.
-From 7c26f1c9cbdcaa0e8e3c6b740273f4722ce5c4ed Mon Sep 17 00:00:00 2001
+From e76db648a5d38f3fce7b93d30eb6632a4f4b47c6 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 15 Feb 2016 17:06:02 -0800
Subject: [PATCH] drm/vc4: Fix the name of the VSYNCD_EVEN register.
-From 9654afa1c26516e3461cd8575f08b367fe5ff42a Mon Sep 17 00:00:00 2001
+From 701edcaf771736ca24a173352d9d7291f5059e17 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 15 Feb 2016 17:31:41 -0800
Subject: [PATCH] drm/vc4: Fix setting of vertical timings in the CRTC.
-From a4d7f252c7aca463cd85dd21f5929e4ba12a2a41 Mon Sep 17 00:00:00 2001
+From a8aa07e1bf9d48e8f47a873062080c7fd2f05a25 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 16 Feb 2016 10:24:08 -0800
Subject: [PATCH] drm/vc4: Initialize scaler DISPBKGND on modeset.
-From 1624a40cc0b7760e60b842b15fe46859940a9f48 Mon Sep 17 00:00:00 2001
+From d5bd63dfce65ffdda325e7b2bb6e37266af17e26 Mon Sep 17 00:00:00 2001
From: Varad Gautam <varadgautam@gmail.com>
Date: Wed, 17 Feb 2016 19:08:21 +0530
Subject: [PATCH] drm/vc4: improve throughput by pipelining binning and
-From 92bceb9faef5ef033e79b746aa8d5fd465548fbc Mon Sep 17 00:00:00 2001
+From d56beecdd7e25be0969c3c51fa6e9a659ba6b1bc Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 29 Feb 2016 17:53:00 -0800
Subject: [PATCH] drm/vc4: Let gpiolib know that we're OK with sleeping for
-From ce00fb0111a4b7c47dc301d7d4845736ee9bb493 Mon Sep 17 00:00:00 2001
+From 874ea6861ec0a21d463a03ed32288c9eedb06a7f Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 29 Feb 2016 17:53:01 -0800
Subject: [PATCH] drm/vc4: Respect GPIO_ACTIVE_LOW on HDMI HPD if set in the
-From b73a3233de4b17d80cfb100dcda2216cb3fcf8c6 Mon Sep 17 00:00:00 2001
+From 04e5f676bbb36a111eff484212f4d6c2898a956a Mon Sep 17 00:00:00 2001
From: Dan Carpenter <dan.carpenter@oracle.com>
Date: Tue, 8 Mar 2016 15:09:41 +0300
Subject: [PATCH] drm/vc4: Return -EFAULT on copy_from_user() failure
-From 4e30b1819e50588d5a3720ad1ac42cfbcb913101 Mon Sep 17 00:00:00 2001
+From 25f82524a9f48fc1e6a1a1c04739c5c8df14c1e2 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 4 Mar 2016 12:32:07 -0800
Subject: [PATCH] drm/vc4: Recognize a more specific compatible string for V3D.
-From 6cdbac4755ed4e63299ea24635597e1d1188e8c8 Mon Sep 17 00:00:00 2001
+From 6eb7e2a6b33ad1fe73b96c26666623eb7cab8827 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 Apr 2016 17:21:06 -0700
Subject: [PATCH] ARM: bcm2708: Move the CMA range down for kernel 4.4.
-From e16d40b0eafe97952af1005d8b1ab97ce4440066 Mon Sep 17 00:00:00 2001
+From 3a96f1b9e00a93037cfa0a100557444d8545cda8 Mon Sep 17 00:00:00 2001
From: Vladimir Zapolskiy <vz@mleia.com>
Date: Sun, 6 Mar 2016 03:21:35 +0200
Subject: [PATCH] clk: bcm2835: fix check of error code returned by
-From d4bbd21245e600f32074724152f77a4ae9904047 Mon Sep 17 00:00:00 2001
+From 249ccc9a345b7641aaf276867a375cd50f41627d Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 21 Apr 2016 13:49:32 +0100
Subject: [PATCH] vchiq_arm: Add completion records under the mutex
-From 03fb94e9e8e68ba9809bdd0f966346ea2807d1dd Mon Sep 17 00:00:00 2001
+From 27c0e3a0fdba663c89a23157e878998c4edf8275 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 21 Apr 2016 16:07:15 +0100
Subject: [PATCH] config: Add DRM_UDL module
-From a7f989cdcb11a8ff5bbb51a675e3662872b5dd55 Mon Sep 17 00:00:00 2001
+From e27e038a64e9a3499f76e9581ea67b4b81a33555 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 21 Apr 2016 15:44:14 +0100
Subject: [PATCH] bcm2835-i2s: Reduce the TX DREQ threshold
-From 4bf5d7236db0e122eb20cf73699557122f49c9dc Mon Sep 17 00:00:00 2001
+From a8eb7a0d68b50ddae371b306f6ccba5383060a15 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <6by9@users.noreply.github.com>
Date: Sat, 16 Apr 2016 23:09:54 +0100
Subject: [PATCH] V4L2: Request maximum resolution from GPU
-From c865e89f79eca5a324d541a03aa4725bc0614f64 Mon Sep 17 00:00:00 2001
+From e64de6a371f40d4d1b3333e2b85ca8aa0b52fe74 Mon Sep 17 00:00:00 2001
From: Martin Sperl <kernel@martin.sperl.org>
Date: Sat, 23 Apr 2016 15:21:41 +0000
Subject: [PATCH] ARM: bcm2835: add i2s-gpio28-31 for cm
-From 4f7d976e703d5196ade9d27074ce4bb49c11bb52 Mon Sep 17 00:00:00 2001
+From 2648818dcb79c89305cf68b5f53a521b9065c341 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Sun, 24 Apr 2016 17:28:15 +0100
Subject: [PATCH] drm/vc4: Add DT parameters to control CMA usage
-From 314c504fe66cf918a847fd0ab5a4c9f82def6e06 Mon Sep 17 00:00:00 2001
+From d3cc3200a6764adeb6604c495cdfebe79870855f Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Mon, 25 Apr 2016 10:43:36 +0100
Subject: [PATCH] SQUASH: BCM270X_DT: Add make rule for sdio-1bit
-From d2ecf44fbe03bd988a608473d5b515d21fab8950 Mon Sep 17 00:00:00 2001
+From 9a5679751907b45b2470c02322dff8e87980464a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Petter=20Mab=C3=A4cker?= <petter@technux.se>
Date: Fri, 8 Jan 2016 09:02:44 +0100
Subject: [PATCH] dts: add overlay for pitft22
-From 5bab2e037ad60c491b7a48171b33fb1413e91352 Mon Sep 17 00:00:00 2001
+From 18530eb2ce1219fb8e11c7ffbeb0a8ff73a7cabf Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Tue, 26 Apr 2016 10:44:59 +0100
Subject: [PATCH] BCM270X_DT: Sound DT adjustments for Dynamic DT
-From 5f01fff2c8d665404e11aff29278d63f6250af61 Mon Sep 17 00:00:00 2001
+From 6d665e736d0418ad5ffbfc49fc09aff30148b7a4 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 27 Apr 2016 12:01:41 +0100
Subject: [PATCH] BCM270X_DT: Fix codec use in hifiberry-dac overlay
-From 593366c81d96fb54152093ab5ca3d62607440cf8 Mon Sep 17 00:00:00 2001
+From 2079ceb6673cafb6896c7841ad2b3eff4d92a95b Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:27:33 +0100
Subject: [PATCH] Revert "bcm2835: log which channel map is set"
-From ed9e011f0f6a823a2e278ce7dd9e8bb620b08e56 Mon Sep 17 00:00:00 2001
+From fc43a2bf668e325aab427a8c0827cfc3b8a1e39f Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:27:35 +0100
Subject: [PATCH] Revert "bcm2835: add fallback channel layouts if channel map
-From e26366439123ef9f20f7728942f35937035c9c73 Mon Sep 17 00:00:00 2001
+From 9c6c1cef21569d9a0ef62b7d621f864e5db89994 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:27:36 +0100
Subject: [PATCH] Revert "bcm2835: do not require substream for accessing chmap
-From 30abbf1d6db5eb081c9693958b098d86758aa7f4 Mon Sep 17 00:00:00 2001
+From af3ae835c6da0f3383aac9957df02f7160c9d2b4 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:27:37 +0100
Subject: [PATCH] Revert "bcm2835: interpolate audio delay"
-From ad3d718e72cdc2c01c22578831603ea1981f9906 Mon Sep 17 00:00:00 2001
+From a6aaa7b9b060fcb361dd4d52255cb80d6e43fa5a Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:28:06 +0100
Subject: [PATCH] Revert "bcm2835: only allow stereo if analogue jack is
-From 506c92b9847bb1fb0ef2fab567b74da572c2ad97 Mon Sep 17 00:00:00 2001
+From 0a72daddfb78fe60ac0ce70aab010ba604158edd Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:28:08 +0100
Subject: [PATCH] Revert "bcm2835: always use 2/4/8 channels for multichannel
-From 1e3a2bebcbd26fdf1b0d13d2219186163708ae4c Mon Sep 17 00:00:00 2001
+From 321cf99bd2206e741a89b5ac350dfe3f182a00a3 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:29:03 +0100
Subject: [PATCH] Revert "bcm2835: implement channel map API"
-From cb54a471f7066a763b9da5d33d6613fe15d2aa3d Mon Sep 17 00:00:00 2001
+From 3dc4ed78cd40e820a68fb6de679b7ed22e7f638c Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 29 Apr 2016 17:30:00 +0100
Subject: [PATCH] Revert "bcm2835: extend allowed range of channels and
-From 550960c37d5de04808943e9ae6cecb16ad003070 Mon Sep 17 00:00:00 2001
+From ae2ee2f4ea51785f408606ffd1195c84b0641f49 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 6 May 2016 12:32:47 +0100
Subject: [PATCH] pinctrl-bcm2835: Return pins to inputs when freed
-From 9b6cc71b7159bebe78cd1ee823a479c0ca485c82 Mon Sep 17 00:00:00 2001
+From c3b4c2b0432a51abe5836dd8a90fd25c1e08f2ad Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Fri, 6 May 2016 12:53:16 +0100
Subject: [PATCH] BCM270X_DT: i2c0-bcm2708 - pin group params
-From 708cc4c531fdf3b6061589031cd15b9382e042b8 Mon Sep 17 00:00:00 2001
+From 6b32cf38a121a9e40e2e7f870c9193da48cce177 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 6 May 2016 12:40:37 +0100
Subject: [PATCH] config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE
-From 61a0378d024e96bfe068fac75a4ed401eef46676 Mon Sep 17 00:00:00 2001
+From 9023265ca66a0152d9e57ba44c6e619aabd3df1e Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 6 May 2016 17:18:57 +0100
Subject: [PATCH] Revert "rpi: update vc_vchi_audioserv_defs.h"
-From d796713d0e6da4b9fdfd88350f0321d8f63ccf91 Mon Sep 17 00:00:00 2001
+From 8dea51318cb961004586a94fe2a9d03526b54955 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 6 May 2016 17:21:58 +0100
Subject: [PATCH] Revert "config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE"
-From e6728a3fb4b185e632a63b7d0d61838d8d690548 Mon Sep 17 00:00:00 2001
+From bec2ad610c71adc8c26598fb27259d7d7348d4c3 Mon Sep 17 00:00:00 2001
From: Andrey Grodzovsky <andrey2805@gmail.com>
Date: Tue, 3 May 2016 22:10:59 -0400
Subject: [PATCH] ARM: adau1977-adc: Add basic machine driver for adau1977
-From 691922255a15630c6f726c4c871ce2475d4fec72 Mon Sep 17 00:00:00 2001
+From e38ba0616f674d2e78f8edd52f8fe770eb0e0a8e Mon Sep 17 00:00:00 2001
From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
Date: Fri, 6 May 2016 09:42:55 +0100
Subject: [PATCH] Allow up to 24dB digital gain to be applied when using
-From e84d0b3f337b2ad8f8b7879fb64bcd48a87919c6 Mon Sep 17 00:00:00 2001
+From 60f712014d29328acde9849d97ecf90d2b2377f0 Mon Sep 17 00:00:00 2001
From: popcornmix <popcornmix@gmail.com>
Date: Fri, 6 May 2016 12:40:37 +0100
Subject: [PATCH] config: Add CONFIG_DRM_LOAD_EDID_FIRMWARE
-From a2d2ac2146d46c29d9fd086c777ca7643eb699db Mon Sep 17 00:00:00 2001
+From 9c7e2df0d4cbbb196c808bef6c543d1dc01921ec Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 6 May 2016 11:48:35 -0700
Subject: [PATCH] BCM270X_DT: Move vc4 node contents to bcm2708_common.dtsi.
-From f8d384eb825833f16db1b410dc7bdb62857bcf54 Mon Sep 17 00:00:00 2001
+From 064b3d9122f8652a4ebfc0ec8bcbcaa8658cde78 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 6 May 2016 12:42:26 -0700
Subject: [PATCH] BCM270X_DT: Set correct HDMI HPD GPIO levels for various
-From bfde336df6d52984f6eef6ad5e4981fe18c0dfcc Mon Sep 17 00:00:00 2001
+From 6225e3d4a9c7442ffb8a0491fafbc8c7fd2151ba Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 6 May 2016 12:43:25 -0700
Subject: [PATCH] Revert "drm/vc4: Force HDMI to connected."
-From a62182109337f799ee97d1e41fee09be5faa8975 Mon Sep 17 00:00:00 2001
+From 20c1353fd7aa5d414b8eaa86646da23e3d29bd3a Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 6 May 2016 12:59:27 -0700
Subject: [PATCH] BCM270X: Include DRM_PANEL_SIMPLE in the defconfigs.
-From 870639e585709adc65183d75619fc01e35adb774 Mon Sep 17 00:00:00 2001
+From b3536f336e6c0feaf28ff73613cb4258fa246229 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 18 Mar 2016 12:34:59 -0700
Subject: [PATCH] drm: Add an encoder and connector type enum for DPI.
-From eb2044830badaa2cc277e21920c4d401dde554cd Mon Sep 17 00:00:00 2001
+From 93941306fa9fd2f57ca2d484119bc2f87c238a31 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 4 Mar 2016 12:32:06 -0800
Subject: [PATCH] dt-bindings: Add binding docs for V3D.
-From fe826daeea975dcf3ce3fca6e8a0850e5761f602 Mon Sep 17 00:00:00 2001
+From 1993e73606600fecd48190c650b732da12d62158 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Wed, 10 Feb 2016 11:42:32 -0800
Subject: [PATCH] drm/vc4: Add DPI driver
-From 69def03fa1b25514d142397748522e1f88b325cb Mon Sep 17 00:00:00 2001
+From c8930bab8d094c5a0c41e17fa0c6f855b93fd0d1 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 4 Apr 2016 14:25:59 -0700
Subject: [PATCH] drm/vc4: Fix NULL deref in HDMI init error path
-From 8fde5a249d84674a92b4732def88cbc47f2bb530 Mon Sep 17 00:00:00 2001
+From 36e64f18d0df45797656ddbbcf6a58cfae397ca1 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 Apr 2016 13:24:14 -0700
Subject: [PATCH] drm/vc4: Kick out the simplefb framebuffer before we set up
-From db48b84381e9cc7c4cc559bad3e5210db3b13c4e Mon Sep 17 00:00:00 2001
+From e6fd7b2c38d1c2f9f49f7bf9bfb200038e894db5 Mon Sep 17 00:00:00 2001
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date: Tue, 26 Apr 2016 16:11:44 +0200
Subject: [PATCH] drm/vc4: Rename async to nonblock.
-From 16c6164e2046f7b7bce7c1e028a2f938545f5401 Mon Sep 17 00:00:00 2001
+From 716125d6733c9722b238f6d230579ead67a616bf Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 31 Mar 2016 18:38:20 -0700
Subject: [PATCH] drm/vc4: Add support for gamma ramps.
-From cb3e6f502adebcbddfe15a3479c3e48305717f46 Mon Sep 17 00:00:00 2001
+From f0076844b242dd25f678b89aa433a43c907cf779 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 14 Apr 2016 23:16:05 -0700
Subject: [PATCH] drm/vc4: Add missing render node support
-From 59c699fe982aa0df961465654c4d87d109b127e6 Mon Sep 17 00:00:00 2001
+From dd5315cfa3267320577c92d0e6115345677f931f Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 24 Mar 2016 17:23:48 -0700
Subject: [PATCH] drm/panel: simple: Add the 7" DPI panel from Adafruit
-From 55387e0dc0e0982f62b1131e79a86e655dcfb3f4 Mon Sep 17 00:00:00 2001
+From e9bc88c63a0812560b2789f16934a2e205dd6341 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Fri, 6 May 2016 13:18:09 -0700
Subject: [PATCH] BCM270X_DT: Add the disabled-by-default DPI device node.
-From 9684d1176621e7edee8475dbd3ad186591898b21 Mon Sep 17 00:00:00 2001
+From 3b82a9f86033a7a0cef86738f45bd191742a55db Mon Sep 17 00:00:00 2001
From: Mario Kleiner <mario.kleiner.de@gmail.com>
Date: Fri, 6 May 2016 19:26:05 +0200
Subject: [PATCH] drm/vc4: Fix get_vblank_counter with proper no-op for Linux
-From bd3aef6d9474fbb9fe063a2f409f920263c28ff1 Mon Sep 17 00:00:00 2001
+From 973a3b6f56336673afbf63a108aa9f1419eb38d8 Mon Sep 17 00:00:00 2001
From: Mario Kleiner <mario.kleiner.de@gmail.com>
Date: Fri, 6 May 2016 19:26:06 +0200
Subject: [PATCH] drm/vc4: Fix drm_vblank_put/get imbalance in page flip path.
-From ee32bb475a3986f961466e00f5ed0bc1fb708699 Mon Sep 17 00:00:00 2001
+From 76abdcc15b223ab75922f38c1cab6d224510af52 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 11 May 2016 15:38:04 +0100
Subject: [PATCH] BCM270X_DT: Add umbrella I2C Mux overlay i2c-mux
-From 4ba99a9cdd73c1e8f24ac981a7d7af3f440de4f6 Mon Sep 17 00:00:00 2001
+From 77eff1bfa410edc8c6cc2fb5441aaac2054ebb5c Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 12 May 2016 08:52:06 +0100
Subject: [PATCH] BCM270X_DT: Include address override for pca9542
-From f2bdc9fa776b22616cb5ec64ae1d027b8c4ca721 Mon Sep 17 00:00:00 2001
+From 6410b301f0c9fb6751b03eb11724dd1cd9748f4e Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 12 May 2016 09:04:20 +0100
Subject: [PATCH] BCM270X_DT: Fix the tinylcd35 overlay RTC support
-From f782ae472861f096fb8b349c3775fbce6316826e Mon Sep 17 00:00:00 2001
+From e58a4a79b9b83d9afa66c0e2cc7490ca40a193bf Mon Sep 17 00:00:00 2001
From: Lee Jones <lee.jones@linaro.org>
Date: Thu, 11 Feb 2016 13:19:09 -0800
Subject: [PATCH] clk: Allow clocks to be marked as CRITICAL
-From 9f73459ac27903bb52d831db29cb70a95189fdba Mon Sep 17 00:00:00 2001
+From 9c899d1ac90b4f6357f0b531a29d8403c8a021c7 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 26 Apr 2016 11:44:59 -0700
Subject: [PATCH] clk: bcm2835: Mark the VPU clock as critical
-From 832d2f1df231073ac72474743e3d3adbf0540030 Mon Sep 17 00:00:00 2001
+From 3ee855d8520adaba936bccf377433468fb1c3ab0 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 9 May 2016 17:28:18 -0700
Subject: [PATCH] clk: bcm2835: Mark GPIO clocks enabled at boot as critical.
-From 960587a39d7ca3d5279841218b42e008df7194aa Mon Sep 17 00:00:00 2001
+From ca56b6fab9cfc0beca2a706193f1c158e124c1f9 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 26 Apr 2016 12:39:45 -0700
Subject: [PATCH] clk: bcm2835: Skip PLLC clocks when deciding on a new clock
-From 8b01bab8c89fd4930ad304b5a7b3c1f6016c3743 Mon Sep 17 00:00:00 2001
+From 10c91a7a11bfada03809a19adfbc7197e19f2fea Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Wed, 11 May 2016 12:50:33 +0100
Subject: [PATCH] mmc: Add MMC_QUIRK_ERASE_BROKEN for some cards
-From ae776ef7eb34d99945aadbaa607e1aec66fd04d0 Mon Sep 17 00:00:00 2001
+From 4f02da8ef066e8f62f41bae95348aede12bd4bd1 Mon Sep 17 00:00:00 2001
From: Matt Flax <flatmax@flatmax.org>
Date: Mon, 16 May 2016 21:36:31 +1000
Subject: [PATCH] New AudioInjector.net Pi soundcard with low jitter audio in
-From 2aa9602cca746c3bd2fe664574234adb147e4ba7 Mon Sep 17 00:00:00 2001
+From 762eec4d6e09623bb5dad09a469a626a5d18ec98 Mon Sep 17 00:00:00 2001
From: Phil Elwell <phil@raspberrypi.org>
Date: Thu, 19 May 2016 14:40:28 +0100
Subject: [PATCH] mmc: Apply QUIRK_BROKEN_ERASE to other capacities
--- /dev/null
+From f17556101fcff8a54e52e6d88d24555308b9774f Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 20 May 2016 10:11:43 +0100
+Subject: [PATCH] mmc: Add card_quirks module parameter, log quirks
+
+Use mmc_block.card_quirks to override the quirks for all SD or MMC
+cards. The value is a bitfield using the bit positions defined in
+include/linux/mmc/card.h. If the module parameter is placed in the
+kernel command line (or bootargs) stored on the card then, assuming the
+device only has one SD card interface, the override effectively becomes
+card-specific.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/card/block.c | 28 +++++++++++++++++++++++++---
+ 1 file changed, 25 insertions(+), 3 deletions(-)
+
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -137,6 +137,13 @@ enum {
+ module_param(perdev_minors, int, 0444);
+ MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
+
++/*
++ * Allow quirks to be overridden for the current card
++ */
++static char *card_quirks;
++module_param(card_quirks, charp, 0644);
++MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
++
+ static inline int mmc_blk_part_switch(struct mmc_card *card,
+ struct mmc_blk_data *md);
+ static int get_card_status(struct mmc_card *card, u32 *status, int retries);
+@@ -2571,6 +2578,7 @@ static int mmc_blk_probe(struct mmc_card
+ {
+ struct mmc_blk_data *md, *part_md;
+ char cap_str[10];
++ char quirk_str[24];
+
+ /*
+ * Check that the card supports the command class(es) we need.
+@@ -2578,7 +2586,16 @@ static int mmc_blk_probe(struct mmc_card
+ if (!(card->csd.cmdclass & CCC_BLOCK_READ))
+ return -ENODEV;
+
+- mmc_fixup_device(card, blk_fixups);
++ if (card_quirks) {
++ unsigned long quirks;
++ if (kstrtoul(card_quirks, 0, &quirks) == 0)
++ card->quirks = (unsigned int)quirks;
++ else
++ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
++ card_quirks);
++ }
++ else
++ mmc_fixup_device(card, blk_fixups);
+
+ md = mmc_blk_alloc(card);
+ if (IS_ERR(md))
+@@ -2586,9 +2603,14 @@ static int mmc_blk_probe(struct mmc_card
+
+ string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
+ cap_str, sizeof(cap_str));
+- pr_info("%s: %s %s %s %s\n",
++ if (card->quirks)
++ snprintf(quirk_str, sizeof(quirk_str),
++ " (quirks 0x%08x)", card->quirks);
++ else
++ quirk_str[0] = '\0';
++ pr_info("%s: %s %s %s%s%s\n",
+ md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
+- cap_str, md->read_only ? "(ro)" : "");
++ cap_str, md->read_only ? " (ro)" : "", quirk_str);
+
+ if (mmc_blk_alloc_parts(card, md))
+ goto out;
+++ /dev/null
-From 2b859a1735c3113756c172ab8113f3f764c49c38 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 20 May 2016 10:11:43 +0100
-Subject: [PATCH] mmc: Add card_quirks module parameter, log quirks
-
-Use mmc_block.card_quirks to override the quirks for all SD or MMC
-cards. The value is a bitfield using the bit positions defined in
-include/linux/mmc/card.h. If the module parameter is placed in the
-kernel command line (or bootargs) stored on the card then, assuming the
-device only has one SD card interface, the override effectively becomes
-card-specific.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/card/block.c | 28 +++++++++++++++++++++++++---
- 1 file changed, 25 insertions(+), 3 deletions(-)
-
---- a/drivers/mmc/card/block.c
-+++ b/drivers/mmc/card/block.c
-@@ -137,6 +137,13 @@ enum {
- module_param(perdev_minors, int, 0444);
- MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device");
-
-+/*
-+ * Allow quirks to be overridden for the current card
-+ */
-+static char *card_quirks;
-+module_param(card_quirks, charp, 0644);
-+MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)");
-+
- static inline int mmc_blk_part_switch(struct mmc_card *card,
- struct mmc_blk_data *md);
- static int get_card_status(struct mmc_card *card, u32 *status, int retries);
-@@ -2571,6 +2578,7 @@ static int mmc_blk_probe(struct mmc_card
- {
- struct mmc_blk_data *md, *part_md;
- char cap_str[10];
-+ char quirk_str[24];
-
- /*
- * Check that the card supports the command class(es) we need.
-@@ -2578,7 +2586,16 @@ static int mmc_blk_probe(struct mmc_card
- if (!(card->csd.cmdclass & CCC_BLOCK_READ))
- return -ENODEV;
-
-- mmc_fixup_device(card, blk_fixups);
-+ if (card_quirks) {
-+ unsigned long quirks;
-+ if (kstrtoul(card_quirks, 0, &quirks) == 0)
-+ card->quirks = (unsigned int)quirks;
-+ else
-+ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n",
-+ card_quirks);
-+ }
-+ else
-+ mmc_fixup_device(card, blk_fixups);
-
- md = mmc_blk_alloc(card);
- if (IS_ERR(md))
-@@ -2586,9 +2603,14 @@ static int mmc_blk_probe(struct mmc_card
-
- string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2,
- cap_str, sizeof(cap_str));
-- pr_info("%s: %s %s %s %s\n",
-+ if (card->quirks)
-+ snprintf(quirk_str, sizeof(quirk_str),
-+ " (quirks 0x%08x)", card->quirks);
-+ else
-+ quirk_str[0] = '\0';
-+ pr_info("%s: %s %s %s%s%s\n",
- md->disk->disk_name, mmc_card_id(card), mmc_card_name(card),
-- cap_str, md->read_only ? "(ro)" : "");
-+ cap_str, md->read_only ? " (ro)" : "", quirk_str);
-
- if (mmc_blk_alloc_parts(card, md))
- goto out;
--- /dev/null
+From e7628e85cf049383e17688b1d4ed8e9e13980b0b Mon Sep 17 00:00:00 2001
+From: Nicolas Boullis <nboullis@debian.org>
+Date: Sun, 10 Apr 2016 13:23:05 +0200
+Subject: [PATCH] rtc: ds1307: ensure that any pending alarm is cleared before
+ a new alarm is enabled
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+If a previously-set alarm was disabled and then triggered, it may still
+be pending when a new alarm is configured.
+
+Then, if the alarm is enabled before the pending alarm is cleared, then
+an interrupt is immediately raised.
+
+Unfortunately, when the alarm is cleared and enabled during the same I²C
+block write, the chip (at least the DS1339 I have) considers that the
+alarm is enabled before it is cleared, and raises an interrupt.
+
+This patch ensures that the pending alarm is cleared before the alarm is
+enabled.
+
+Signed-off-by: Nicolas Boullis <nboullis@debian.org>
+Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
+---
+ drivers/rtc/rtc-ds1307.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+--- a/drivers/rtc/rtc-ds1307.c
++++ b/drivers/rtc/rtc-ds1307.c
+@@ -540,12 +540,8 @@ static int ds1337_set_alarm(struct devic
+ buf[5] = 0;
+ buf[6] = 0;
+
+- /* optionally enable ALARM1 */
++ /* disable alarms */
+ buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
+- if (t->enabled) {
+- dev_dbg(dev, "alarm IRQ armed\n");
+- buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
+- }
+ buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
+
+ ret = ds1307->write_block_data(client,
+@@ -555,6 +551,13 @@ static int ds1337_set_alarm(struct devic
+ return ret;
+ }
+
++ /* optionally enable ALARM1 */
++ if (t->enabled) {
++ dev_dbg(dev, "alarm IRQ armed\n");
++ buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
++ i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
++ }
++
+ return 0;
+ }
+
--- /dev/null
+From 773b6960e7937b504e5012efce4c85b1d4b2cc24 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 23 May 2016 17:06:08 +0100
+Subject: [PATCH] Revert "Revert "drm/vc4: Force HDMI to connected.""
+
+This reverts commit 7da44d06540b4a191ecc74e943f3203577fce0df.
+
+This breaks the driver on Pi3 as hotplug is implemented through a
+gpio expander owned by the GPU.
+
+We need to extend the virtual gpio driver to support this, but for
+now assume hotplug is always enabled.
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -166,6 +166,8 @@ vc4_hdmi_connector_detect(struct drm_con
+ struct drm_device *dev = connector->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
++ return connector_status_connected;
++
+ if (vc4->hdmi->hpd_gpio) {
+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
+ vc4->hdmi->hpd_active_low)
+++ /dev/null
-From dab463aa0dbd5ac45403dade2723046eba214359 Mon Sep 17 00:00:00 2001
-From: Nicolas Boullis <nboullis@debian.org>
-Date: Sun, 10 Apr 2016 13:23:05 +0200
-Subject: [PATCH] rtc: ds1307: ensure that any pending alarm is cleared before
- a new alarm is enabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If a previously-set alarm was disabled and then triggered, it may still
-be pending when a new alarm is configured.
-
-Then, if the alarm is enabled before the pending alarm is cleared, then
-an interrupt is immediately raised.
-
-Unfortunately, when the alarm is cleared and enabled during the same I²C
-block write, the chip (at least the DS1339 I have) considers that the
-alarm is enabled before it is cleared, and raises an interrupt.
-
-This patch ensures that the pending alarm is cleared before the alarm is
-enabled.
-
-Signed-off-by: Nicolas Boullis <nboullis@debian.org>
-Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
----
- drivers/rtc/rtc-ds1307.c | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
---- a/drivers/rtc/rtc-ds1307.c
-+++ b/drivers/rtc/rtc-ds1307.c
-@@ -540,12 +540,8 @@ static int ds1337_set_alarm(struct devic
- buf[5] = 0;
- buf[6] = 0;
-
-- /* optionally enable ALARM1 */
-+ /* disable alarms */
- buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
-- if (t->enabled) {
-- dev_dbg(dev, "alarm IRQ armed\n");
-- buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
-- }
- buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
-
- ret = ds1307->write_block_data(client,
-@@ -555,6 +551,13 @@ static int ds1337_set_alarm(struct devic
- return ret;
- }
-
-+ /* optionally enable ALARM1 */
-+ if (t->enabled) {
-+ dev_dbg(dev, "alarm IRQ armed\n");
-+ buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
-+ i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
-+ }
-+
- return 0;
- }
-
+++ /dev/null
-From 01f818eabe959b1d58ad3ef41310e1210b04a9b0 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Mon, 23 May 2016 17:06:08 +0100
-Subject: [PATCH] Revert "Revert "drm/vc4: Force HDMI to connected.""
-
-This reverts commit 7da44d06540b4a191ecc74e943f3203577fce0df.
-
-This breaks the driver on Pi3 as hotplug is implemented through a
-gpio expander owned by the GPU.
-
-We need to extend the virtual gpio driver to support this, but for
-now assume hotplug is always enabled.
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -166,6 +166,8 @@ vc4_hdmi_connector_detect(struct drm_con
- struct drm_device *dev = connector->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-
-+ return connector_status_connected;
-+
- if (vc4->hdmi->hpd_gpio) {
- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
- vc4->hdmi->hpd_active_low)
--- /dev/null
+From a1e0cd7f3d671062051eee6758b81c0dba1307b2 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 23 May 2016 18:22:52 +0100
+Subject: [PATCH] config: Add NF_MATCH_RPFILTER
+
+---
+ arch/arm/configs/bcm2709_defconfig | 2 ++
+ arch/arm/configs/bcmrpi_defconfig | 2 ++
+ 2 files changed, 4 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -223,6 +223,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
+ CONFIG_IP_NF_IPTABLES=m
+ CONFIG_IP_NF_MATCH_AH=m
+ CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
+ CONFIG_IP_NF_MATCH_TTL=m
+ CONFIG_IP_NF_FILTER=m
+ CONFIG_IP_NF_TARGET_REJECT=m
+@@ -247,6 +248,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
+ CONFIG_IP6_NF_MATCH_HL=m
+ CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+ CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
+ CONFIG_IP6_NF_MATCH_RT=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_FILTER=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -216,6 +216,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
+ CONFIG_IP_NF_IPTABLES=m
+ CONFIG_IP_NF_MATCH_AH=m
+ CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_RPFILTER=m
+ CONFIG_IP_NF_MATCH_TTL=m
+ CONFIG_IP_NF_FILTER=m
+ CONFIG_IP_NF_TARGET_REJECT=m
+@@ -240,6 +241,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
+ CONFIG_IP6_NF_MATCH_HL=m
+ CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+ CONFIG_IP6_NF_MATCH_MH=m
++CONFIG_IP6_NF_MATCH_RPFILTER=m
+ CONFIG_IP6_NF_MATCH_RT=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_FILTER=m
--- /dev/null
+From 58c72d20f05a5943b48d834e8388a58332897ed8 Mon Sep 17 00:00:00 2001
+From: Michael Kaplan <m.kaplan@evva.com>
+Date: Tue, 24 May 2016 10:19:08 +0200
+Subject: [PATCH] Added Overlay for Microchip MCP23017 I2C gpio expander
+
+---
+ arch/arm/boot/dts/overlays/README | 9 +++++
+ arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 54 +++++++++++++++++++++++++
+ 2 files changed, 63 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -567,6 +567,15 @@ Params: gpio_out_pin GPIO for
+ (default "off")
+
+
++Name: mcp23017
++Info: Configures the MCP23017 I2C port expander
++Load: dtoverlay=mcp23017,<param>=<val>
++Params: gpiopin Gpio pin connected to the INTA output of the
++ MCP23017 (default: 4)
++
++ addr I2C address of the MCP23017 (default: 0x20)
++
++
+ Name: mcp2515-can0
+ Info: Configures the MCP2515 CAN controller on spi0.0
+ Load: dtoverlay=mcp2515-can0,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
+@@ -0,0 +1,54 @@
++// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&i2c1>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&gpio>;
++ __overlay__ {
++ mcp23017_pins: mcp23017_pins {
++ brcm,pins = <4>;
++ brcm,function = <0>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mcp23017: mcp@20 {
++ compatible = "microchip,mcp23017";
++ reg = <0x20>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ #interrupt-cells=<2>;
++ interrupt-parent = <&gpio>;
++ interrupts = <4 2>;
++ interrupt-controller;
++ microchip,irq-mirror;
++
++ status = "okay";
++ };
++ };
++ };
++
++ __overrides__ {
++ gpiopin = <&mcp23017_pins>,"brcm,pins:0",
++ <&mcp23017>,"interrupts:0";
++ addr = <&mcp23017>,"reg:0";
++ };
++};
++
+++ /dev/null
-From 42af2a4e065f71af6505ba6159073a2da28bcc2f Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Mon, 23 May 2016 18:22:52 +0100
-Subject: [PATCH] config: Add NF_MATCH_RPFILTER
-
----
- arch/arm/configs/bcm2709_defconfig | 2 ++
- arch/arm/configs/bcmrpi_defconfig | 2 ++
- 2 files changed, 4 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -223,6 +223,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
- CONFIG_IP_NF_IPTABLES=m
- CONFIG_IP_NF_MATCH_AH=m
- CONFIG_IP_NF_MATCH_ECN=m
-+CONFIG_IP_NF_MATCH_RPFILTER=m
- CONFIG_IP_NF_MATCH_TTL=m
- CONFIG_IP_NF_FILTER=m
- CONFIG_IP_NF_TARGET_REJECT=m
-@@ -247,6 +248,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
- CONFIG_IP6_NF_MATCH_HL=m
- CONFIG_IP6_NF_MATCH_IPV6HEADER=m
- CONFIG_IP6_NF_MATCH_MH=m
-+CONFIG_IP6_NF_MATCH_RPFILTER=m
- CONFIG_IP6_NF_MATCH_RT=m
- CONFIG_IP6_NF_TARGET_HL=m
- CONFIG_IP6_NF_FILTER=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -216,6 +216,7 @@ CONFIG_NF_CONNTRACK_IPV4=m
- CONFIG_IP_NF_IPTABLES=m
- CONFIG_IP_NF_MATCH_AH=m
- CONFIG_IP_NF_MATCH_ECN=m
-+CONFIG_IP_NF_MATCH_RPFILTER=m
- CONFIG_IP_NF_MATCH_TTL=m
- CONFIG_IP_NF_FILTER=m
- CONFIG_IP_NF_TARGET_REJECT=m
-@@ -240,6 +241,7 @@ CONFIG_IP6_NF_MATCH_OPTS=m
- CONFIG_IP6_NF_MATCH_HL=m
- CONFIG_IP6_NF_MATCH_IPV6HEADER=m
- CONFIG_IP6_NF_MATCH_MH=m
-+CONFIG_IP6_NF_MATCH_RPFILTER=m
- CONFIG_IP6_NF_MATCH_RT=m
- CONFIG_IP6_NF_TARGET_HL=m
- CONFIG_IP6_NF_FILTER=m
+++ /dev/null
-From 40609ec9a60194b9f04cf5ee4fbc4ee5a011a7ea Mon Sep 17 00:00:00 2001
-From: Michael Kaplan <m.kaplan@evva.com>
-Date: Tue, 24 May 2016 10:19:08 +0200
-Subject: [PATCH] Added Overlay for Microchip MCP23017 I2C gpio expander
-
----
- arch/arm/boot/dts/overlays/README | 9 +++++
- arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 54 +++++++++++++++++++++++++
- 2 files changed, 63 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -567,6 +567,15 @@ Params: gpio_out_pin GPIO for
- (default "off")
-
-
-+Name: mcp23017
-+Info: Configures the MCP23017 I2C port expander
-+Load: dtoverlay=mcp23017,<param>=<val>
-+Params: gpiopin Gpio pin connected to the INTA output of the
-+ MCP23017 (default: 4)
-+
-+ addr I2C address of the MCP23017 (default: 0x20)
-+
-+
- Name: mcp2515-can0
- Info: Configures the MCP2515 CAN controller on spi0.0
- Load: dtoverlay=mcp2515-can0,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
-@@ -0,0 +1,54 @@
-+// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&gpio>;
-+ __overlay__ {
-+ mcp23017_pins: mcp23017_pins {
-+ brcm,pins = <4>;
-+ brcm,function = <0>;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ mcp23017: mcp@20 {
-+ compatible = "microchip,mcp23017";
-+ reg = <0x20>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ #interrupt-cells=<2>;
-+ interrupt-parent = <&gpio>;
-+ interrupts = <4 2>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ gpiopin = <&mcp23017_pins>,"brcm,pins:0",
-+ <&mcp23017>,"interrupts:0";
-+ addr = <&mcp23017>,"reg:0";
-+ };
-+};
-+
--- /dev/null
+From 91ed8882918caf0d80e822b1529b1e32e6eaa007 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 24 May 2016 16:20:09 +0100
+Subject: [PATCH] bcm2835-camera: Fix max/min error when looping over
+ cameras/resolutions
+
+See: https://github.com/raspberrypi/linux/issues/1447#issuecomment-221303506
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -1530,8 +1530,8 @@ static int get_num_cameras(struct vchiq_
+ }
+ for (i = 0;
+ i < (cam_info.num_cameras > num_resolutions ?
+- cam_info.num_cameras :
+- num_resolutions);
++ num_resolutions :
++ cam_info.num_cameras);
+ i++) {
+ resolutions[i][0] = cam_info.cameras[i].max_width;
+ resolutions[i][1] = cam_info.cameras[i].max_height;
--- /dev/null
+From 6a5d72f7ea13b48840353fd22f672dc3af8b9fc5 Mon Sep 17 00:00:00 2001
+From: Aaron Shaw <shawaj@gmail.com>
+Date: Thu, 26 May 2016 23:37:11 +0100
+Subject: [PATCH] Change BoomBerry name to JustBoom in all locations due to
+ legal challenge
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 4 +-
+ arch/arm/boot/dts/overlays/README | 52 ++---
+ .../boot/dts/overlays/boomberry-dac-overlay.dts | 43 -----
+ .../boot/dts/overlays/boomberry-digi-overlay.dts | 39 ----
+ .../arm/boot/dts/overlays/justboom-dac-overlay.dts | 43 +++++
+ .../boot/dts/overlays/justboom-digi-overlay.dts | 39 ++++
+ arch/arm/configs/bcm2709_defconfig | 4 +-
+ arch/arm/configs/bcmrpi_defconfig | 4 +-
+ sound/soc/bcm/Kconfig | 12 +-
+ sound/soc/bcm/Makefile | 8 +-
+ sound/soc/bcm/boomberry-dac.c | 162 ----------------
+ sound/soc/bcm/boomberry-digi.c | 215 ---------------------
+ sound/soc/bcm/justboom-dac.c | 162 ++++++++++++++++
+ sound/soc/bcm/justboom-digi.c | 215 +++++++++++++++++++++
+ 14 files changed, 501 insertions(+), 501 deletions(-)
+ delete mode 100644 arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
+ delete mode 100644 arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
+ create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
+ create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
+ delete mode 100644 sound/soc/bcm/boomberry-dac.c
+ delete mode 100644 sound/soc/bcm/boomberry-digi.c
+ create mode 100644 sound/soc/bcm/justboom-dac.c
+ create mode 100644 sound/soc/bcm/justboom-digi.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -18,8 +18,6 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += boomberry-dac.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += boomberry-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+@@ -43,6 +41,8 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -238,32 +238,6 @@ Load: dtoverlay=bmp085_i2c-sensor
+ Params: <None>
+
+
+-Name: boomberry-dac
+-Info: Configures the BoomBerry DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
+- cards
+-Load: dtoverlay=boomberry-dac,<param>=<val>
+-Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
+- Digital volume control. Enable with
+- "dtoverlay=boomberry-dac,24db_digital_gain"
+- (The default behaviour is that the Digital
+- volume control is limited to a maximum of
+- 0dB. ie. it can attenuate but not provide
+- gain. For most users, this will be desired
+- as it will prevent clipping. By appending
+- the 24dB_digital_gain parameter, the Digital
+- volume control will allow up to 24dB of
+- gain. If this parameter is enabled, it is the
+- responsibility of the user to ensure that
+- the Digital volume control is set to a value
+- that does not result in clipping/distortion!)
+-
+-
+-Name: boomberry-digi
+-Info: Configures the BoomBerry Digi HAT and Digi Zero audio cards
+-Load: dtoverlay=boomberry-digi
+-Params: <None>
+-
+-
+ Name: dht11
+ Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
+ Also sometimes found with the part number(s) AM230x.
+@@ -541,6 +515,32 @@ Params: 24db_digital_gain Allow ga
+ that does not result in clipping/distortion!)
+
+
++Name: justboom-dac
++Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
++ cards
++Load: dtoverlay=justboom-dac,<param>=<val>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control. Enable with
++ "dtoverlay=justboom-dac,24db_digital_gain"
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24dB_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
++Name: justboom-digi
++Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
++Load: dtoverlay=justboom-digi
++Params: <None>
++
++
+ Name: lirc-rpi
+ Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
+ Consult the module documentation for more details.
+--- a/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
++++ /dev/null
+@@ -1,43 +0,0 @@
+-// Definitions for BoomBerry DAC
+-/dts-v1/;
+-/plugin/;
+-
+-/ {
+- compatible = "brcm,bcm2708";
+-
+- fragment@0 {
+- target = <&i2s>;
+- __overlay__ {
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+- target = <&i2c1>;
+- __overlay__ {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "okay";
+-
+- pcm5122@4d {
+- #sound-dai-cells = <0>;
+- compatible = "ti,pcm5122";
+- reg = <0x4d>;
+- status = "okay";
+- };
+- };
+- };
+-
+- fragment@2 {
+- target = <&sound>;
+- frag2: __overlay__ {
+- compatible = "boomberry,boomberry-dac";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-
+- __overrides__ {
+- 24db_digital_gain = <&frag2>,"boomberry,24db_digital_gain?";
+- };
+-};
+--- a/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
++++ /dev/null
+@@ -1,39 +0,0 @@
+-// Definitions for BoomBerry Digi
+-/dts-v1/;
+-/plugin/;
+-
+-/ {
+- compatible = "brcm,bcm2708";
+-
+- fragment@0 {
+- target = <&i2s>;
+- __overlay__ {
+- status = "okay";
+- };
+- };
+-
+- fragment@1 {
+- target = <&i2c1>;
+- __overlay__ {
+- #address-cells = <1>;
+- #size-cells = <0>;
+- status = "okay";
+-
+- wm8804@3b {
+- #sound-dai-cells = <0>;
+- compatible = "wlf,wm8804";
+- reg = <0x3b>;
+- status = "okay";
+- };
+- };
+- };
+-
+- fragment@2 {
+- target = <&sound>;
+- __overlay__ {
+- compatible = "boomberry,boomberry-digi";
+- i2s-controller = <&i2s>;
+- status = "okay";
+- };
+- };
+-};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
+@@ -0,0 +1,43 @@
++// Definitions for JustBoom DAC
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5122@4d {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5122";
++ reg = <0x4d>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ frag2: __overlay__ {
++ compatible = "justboom,justboom-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for JustBoom Digi
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "justboom,justboom-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -861,8 +861,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
+ CONFIG_SND_BCM2708_SOC_RPI_DAC=m
+ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -853,8 +853,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
+ CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
+ CONFIG_SND_BCM2708_SOC_RPI_DAC=m
+ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
+-CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -50,19 +50,19 @@ config SND_BCM2708_SOC_RPI_PROTO
+ help
+ Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731).
+
+-config SND_BCM2708_SOC_BOOMBERRY_DAC
+- tristate "Support for BoomBerry DAC"
++config SND_BCM2708_SOC_JUSTBOOM_DAC
++ tristate "Support for JustBoom DAC"
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
+ select SND_SOC_PCM512x
+ help
+- Say Y or M if you want to add support for BoomBerry DAC.
++ Say Y or M if you want to add support for JustBoom DAC.
+
+-config SND_BCM2708_SOC_BOOMBERRY_DIGI
+- tristate "Support for BoomBerry Digi"
++config SND_BCM2708_SOC_JUSTBOOM_DIGI
++ tristate "Support for JustBoom Digi"
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
+ select SND_SOC_WM8804
+ help
+- Say Y or M if you want to add support for BoomBerry Digi.
++ Say Y or M if you want to add support for JustBoom Digi.
+
+ config SND_BCM2708_SOC_IQAUDIO_DAC
+ tristate "Support for IQaudIO-DAC"
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -9,8 +9,8 @@ snd-soc-hifiberry-dac-objs := hifiberry_
+ snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
+ snd-soc-hifiberry-digi-objs := hifiberry_digi.o
+ snd-soc-hifiberry-amp-objs := hifiberry_amp.o
+-snd-soc-boomberry-dac-objs := boomberry-dac.o
+-snd-soc-boomberry-digi-objs := boomberry-digi.o
++snd-soc-justboom-dac-objs := justboom-dac.o
++snd-soc-justboom-digi-objs := justboom-digi.o
+ snd-soc-rpi-dac-objs := rpi-dac.o
+ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
+@@ -22,8 +22,8 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o
+-obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC) += snd-soc-boomberry-dac.o
+-obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI) += snd-soc-boomberry-digi.o
++obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o
++obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI) += snd-soc-justboom-digi.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
+--- a/sound/soc/bcm/boomberry-dac.c
++++ /dev/null
+@@ -1,162 +0,0 @@
+-/*
+- * ASoC Driver for BoomBerry DAC Raspberry Pi HAT Sound Card
+- *
+- * Author: Milan Neskovic
+- * Copyright 2016
+- * based on code by Daniel Matuschek <info@crazy-audio.com>
+- * based on code by Florian Meier <florian.meier@koalo.de>
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- * General Public License for more details.
+- */
+-
+-#include <linux/module.h>
+-#include <linux/platform_device.h>
+-
+-#include <sound/core.h>
+-#include <sound/pcm.h>
+-#include <sound/pcm_params.h>
+-#include <sound/soc.h>
+-#include <sound/jack.h>
+-
+-#include "../codecs/pcm512x.h"
+-
+-static bool digital_gain_0db_limit = true;
+-
+-static int snd_rpi_boomberry_dac_init(struct snd_soc_pcm_runtime *rtd)
+-{
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
+- snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
+- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
+-
+- if (digital_gain_0db_limit)
+- {
+- int ret;
+- struct snd_soc_card *card = rtd->card;
+-
+- ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
+- if (ret < 0)
+- dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
+- }
+-
+- return 0;
+-}
+-
+-static int snd_rpi_boomberry_dac_hw_params(struct snd_pcm_substream *substream,
+- struct snd_pcm_hw_params *params)
+-{
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+- /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
+- unsigned int sample_bits =
+- snd_pcm_format_physical_width(params_format(params));
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
+-}
+-
+-static int snd_rpi_boomberry_dac_startup(struct snd_pcm_substream *substream) {
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
+- return 0;
+-}
+-
+-static void snd_rpi_boomberry_dac_shutdown(struct snd_pcm_substream *substream) {
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
+-}
+-
+-/* machine stream operations */
+-static struct snd_soc_ops snd_rpi_boomberry_dac_ops = {
+- .hw_params = snd_rpi_boomberry_dac_hw_params,
+- .startup = snd_rpi_boomberry_dac_startup,
+- .shutdown = snd_rpi_boomberry_dac_shutdown,
+-};
+-
+-static struct snd_soc_dai_link snd_rpi_boomberry_dac_dai[] = {
+-{
+- .name = "BoomBerry DAC",
+- .stream_name = "BoomBerry DAC HiFi",
+- .cpu_dai_name = "bcm2708-i2s.0",
+- .codec_dai_name = "pcm512x-hifi",
+- .platform_name = "bcm2708-i2s.0",
+- .codec_name = "pcm512x.1-004d",
+- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
+- SND_SOC_DAIFMT_CBS_CFS,
+- .ops = &snd_rpi_boomberry_dac_ops,
+- .init = snd_rpi_boomberry_dac_init,
+-},
+-};
+-
+-/* audio machine driver */
+-static struct snd_soc_card snd_rpi_boomberry_dac = {
+- .name = "snd_rpi_boomberry_dac",
+- .owner = THIS_MODULE,
+- .dai_link = snd_rpi_boomberry_dac_dai,
+- .num_links = ARRAY_SIZE(snd_rpi_boomberry_dac_dai),
+-};
+-
+-static int snd_rpi_boomberry_dac_probe(struct platform_device *pdev)
+-{
+- int ret = 0;
+-
+- snd_rpi_boomberry_dac.dev = &pdev->dev;
+-
+- if (pdev->dev.of_node) {
+- struct device_node *i2s_node;
+- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_dac_dai[0];
+- i2s_node = of_parse_phandle(pdev->dev.of_node,
+- "i2s-controller", 0);
+-
+- if (i2s_node) {
+- dai->cpu_dai_name = NULL;
+- dai->cpu_of_node = i2s_node;
+- dai->platform_name = NULL;
+- dai->platform_of_node = i2s_node;
+- }
+-
+- digital_gain_0db_limit = !of_property_read_bool(
+- pdev->dev.of_node, "boomberry,24db_digital_gain");
+- }
+-
+- ret = snd_soc_register_card(&snd_rpi_boomberry_dac);
+- if (ret)
+- dev_err(&pdev->dev,
+- "snd_soc_register_card() failed: %d\n", ret);
+-
+- return ret;
+-}
+-
+-static int snd_rpi_boomberry_dac_remove(struct platform_device *pdev)
+-{
+- return snd_soc_unregister_card(&snd_rpi_boomberry_dac);
+-}
+-
+-static const struct of_device_id snd_rpi_boomberry_dac_of_match[] = {
+- { .compatible = "boomberry,boomberry-dac", },
+- {},
+-};
+-MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_dac_of_match);
+-
+-static struct platform_driver snd_rpi_boomberry_dac_driver = {
+- .driver = {
+- .name = "snd-rpi-boomberry-dac",
+- .owner = THIS_MODULE,
+- .of_match_table = snd_rpi_boomberry_dac_of_match,
+- },
+- .probe = snd_rpi_boomberry_dac_probe,
+- .remove = snd_rpi_boomberry_dac_remove,
+-};
+-
+-module_platform_driver(snd_rpi_boomberry_dac_driver);
+-
+-MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
+-MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI DAC HAT Sound Card");
+-MODULE_LICENSE("GPL v2");
+--- a/sound/soc/bcm/boomberry-digi.c
++++ /dev/null
+@@ -1,215 +0,0 @@
+-/*
+- * ASoC Driver for BoomBerry Raspberry Pi Digi HAT Sound Card
+- *
+- * Author: Milan Neskovic
+- * Copyright 2016
+- * based on code by Daniel Matuschek <info@crazy-audio.com>
+- * based on code by Florian Meier <florian.meier@koalo.de>
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License
+- * version 2 as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope that it will be useful, but
+- * WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- * General Public License for more details.
+- */
+-
+-#include <linux/module.h>
+-#include <linux/platform_device.h>
+-
+-#include <sound/core.h>
+-#include <sound/pcm.h>
+-#include <sound/pcm_params.h>
+-#include <sound/soc.h>
+-#include <sound/jack.h>
+-
+-#include "../codecs/wm8804.h"
+-
+-static int snd_rpi_boomberry_digi_init(struct snd_soc_pcm_runtime *rtd)
+-{
+- struct snd_soc_codec *codec = rtd->codec;
+-
+- /* enable TX output */
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
+-
+- return 0;
+-}
+-
+-static int snd_rpi_boomberry_digi_startup(struct snd_pcm_substream *substream) {
+- /* turn on digital output */
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
+- return 0;
+-}
+-
+-static void snd_rpi_boomberry_digi_shutdown(struct snd_pcm_substream *substream) {
+- /* turn off output */
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_codec *codec = rtd->codec;
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
+-}
+-
+-static int snd_rpi_boomberry_digi_hw_params(struct snd_pcm_substream *substream,
+- struct snd_pcm_hw_params *params)
+-{
+- struct snd_soc_pcm_runtime *rtd = substream->private_data;
+- struct snd_soc_dai *codec_dai = rtd->codec_dai;
+- struct snd_soc_codec *codec = rtd->codec;
+- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+-
+- int sysclk = 27000000; /* This is fixed on this board */
+-
+- long mclk_freq=0;
+- int mclk_div=1;
+- int sampling_freq=1;
+-
+- int ret;
+-
+- int samplerate = params_rate(params);
+-
+- if (samplerate<=96000) {
+- mclk_freq=samplerate*256;
+- mclk_div=WM8804_MCLKDIV_256FS;
+- } else {
+- mclk_freq=samplerate*128;
+- mclk_div=WM8804_MCLKDIV_128FS;
+- }
+-
+- switch (samplerate) {
+- case 32000:
+- sampling_freq=0x03;
+- break;
+- case 44100:
+- sampling_freq=0x00;
+- break;
+- case 48000:
+- sampling_freq=0x02;
+- break;
+- case 88200:
+- sampling_freq=0x08;
+- break;
+- case 96000:
+- sampling_freq=0x0a;
+- break;
+- case 176400:
+- sampling_freq=0x0c;
+- break;
+- case 192000:
+- sampling_freq=0x0e;
+- break;
+- default:
+- dev_err(codec->dev,
+- "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
+- samplerate);
+- }
+-
+- snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
+- snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
+-
+- ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
+- sysclk, SND_SOC_CLOCK_OUT);
+- if (ret < 0) {
+- dev_err(codec->dev,
+- "Failed to set WM8804 SYSCLK: %d\n", ret);
+- return ret;
+- }
+-
+- /* Enable TX output */
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
+-
+- /* Power on */
+- snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
+-
+- /* set sampling frequency status bits */
+- snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
+-
+- return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
+-}
+-
+-/* machine stream operations */
+-static struct snd_soc_ops snd_rpi_boomberry_digi_ops = {
+- .hw_params = snd_rpi_boomberry_digi_hw_params,
+- .startup = snd_rpi_boomberry_digi_startup,
+- .shutdown = snd_rpi_boomberry_digi_shutdown,
+-};
+-
+-static struct snd_soc_dai_link snd_rpi_boomberry_digi_dai[] = {
+-{
+- .name = "BoomBerry Digi",
+- .stream_name = "BoomBerry Digi HiFi",
+- .cpu_dai_name = "bcm2708-i2s.0",
+- .codec_dai_name = "wm8804-spdif",
+- .platform_name = "bcm2708-i2s.0",
+- .codec_name = "wm8804.1-003b",
+- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
+- SND_SOC_DAIFMT_CBM_CFM,
+- .ops = &snd_rpi_boomberry_digi_ops,
+- .init = snd_rpi_boomberry_digi_init,
+-},
+-};
+-
+-/* audio machine driver */
+-static struct snd_soc_card snd_rpi_boomberry_digi = {
+- .name = "snd_rpi_boomberry_digi",
+- .owner = THIS_MODULE,
+- .dai_link = snd_rpi_boomberry_digi_dai,
+- .num_links = ARRAY_SIZE(snd_rpi_boomberry_digi_dai),
+-};
+-
+-static int snd_rpi_boomberry_digi_probe(struct platform_device *pdev)
+-{
+- int ret = 0;
+-
+- snd_rpi_boomberry_digi.dev = &pdev->dev;
+-
+- if (pdev->dev.of_node) {
+- struct device_node *i2s_node;
+- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_digi_dai[0];
+- i2s_node = of_parse_phandle(pdev->dev.of_node,
+- "i2s-controller", 0);
+-
+- if (i2s_node) {
+- dai->cpu_dai_name = NULL;
+- dai->cpu_of_node = i2s_node;
+- dai->platform_name = NULL;
+- dai->platform_of_node = i2s_node;
+- }
+- }
+-
+- ret = snd_soc_register_card(&snd_rpi_boomberry_digi);
+- if (ret)
+- dev_err(&pdev->dev,
+- "snd_soc_register_card() failed: %d\n", ret);
+-
+- return ret;
+-}
+-
+-static int snd_rpi_boomberry_digi_remove(struct platform_device *pdev)
+-{
+- return snd_soc_unregister_card(&snd_rpi_boomberry_digi);
+-}
+-
+-static const struct of_device_id snd_rpi_boomberry_digi_of_match[] = {
+- { .compatible = "boomberry,boomberry-digi", },
+- {},
+-};
+-MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_digi_of_match);
+-
+-static struct platform_driver snd_rpi_boomberry_digi_driver = {
+- .driver = {
+- .name = "snd-rpi-boomberry-digi",
+- .owner = THIS_MODULE,
+- .of_match_table = snd_rpi_boomberry_digi_of_match,
+- },
+- .probe = snd_rpi_boomberry_digi_probe,
+- .remove = snd_rpi_boomberry_digi_remove,
+-};
+-
+-module_platform_driver(snd_rpi_boomberry_digi_driver);
+-
+-MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
+-MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI Digi HAT Sound Card");
+-MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/sound/soc/bcm/justboom-dac.c
+@@ -0,0 +1,162 @@
++/*
++ * ASoC Driver for JustBoom DAC Raspberry Pi HAT Sound Card
++ *
++ * Author: Milan Neskovic
++ * Copyright 2016
++ * based on code by Daniel Matuschek <info@crazy-audio.com>
++ * based on code by Florian Meier <florian.meier@koalo.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++#include "../codecs/pcm512x.h"
++
++static bool digital_gain_0db_limit = true;
++
++static int snd_rpi_justboom_dac_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
++ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
++ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
++
++ if (digital_gain_0db_limit)
++ {
++ int ret;
++ struct snd_soc_card *card = rtd->card;
++
++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
++ if (ret < 0)
++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
++ }
++
++ return 0;
++}
++
++static int snd_rpi_justboom_dac_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++ /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
++ unsigned int sample_bits =
++ snd_pcm_format_physical_width(params_format(params));
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
++}
++
++static int snd_rpi_justboom_dac_startup(struct snd_pcm_substream *substream) {
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
++ return 0;
++}
++
++static void snd_rpi_justboom_dac_shutdown(struct snd_pcm_substream *substream) {
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_justboom_dac_ops = {
++ .hw_params = snd_rpi_justboom_dac_hw_params,
++ .startup = snd_rpi_justboom_dac_startup,
++ .shutdown = snd_rpi_justboom_dac_shutdown,
++};
++
++static struct snd_soc_dai_link snd_rpi_justboom_dac_dai[] = {
++{
++ .name = "JustBoom DAC",
++ .stream_name = "JustBoom DAC HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "pcm512x-hifi",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "pcm512x.1-004d",
++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBS_CFS,
++ .ops = &snd_rpi_justboom_dac_ops,
++ .init = snd_rpi_justboom_dac_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_justboom_dac = {
++ .name = "snd_rpi_justboom_dac",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_justboom_dac_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai),
++};
++
++static int snd_rpi_justboom_dac_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ snd_rpi_justboom_dac.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &snd_rpi_justboom_dac_dai[0];
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ digital_gain_0db_limit = !of_property_read_bool(
++ pdev->dev.of_node, "justboom,24db_digital_gain");
++ }
++
++ ret = snd_soc_register_card(&snd_rpi_justboom_dac);
++ if (ret)
++ dev_err(&pdev->dev,
++ "snd_soc_register_card() failed: %d\n", ret);
++
++ return ret;
++}
++
++static int snd_rpi_justboom_dac_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_justboom_dac);
++}
++
++static const struct of_device_id snd_rpi_justboom_dac_of_match[] = {
++ { .compatible = "justboom,justboom-dac", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_justboom_dac_of_match);
++
++static struct platform_driver snd_rpi_justboom_dac_driver = {
++ .driver = {
++ .name = "snd-rpi-justboom-dac",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_justboom_dac_of_match,
++ },
++ .probe = snd_rpi_justboom_dac_probe,
++ .remove = snd_rpi_justboom_dac_remove,
++};
++
++module_platform_driver(snd_rpi_justboom_dac_driver);
++
++MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
++MODULE_DESCRIPTION("ASoC Driver for JustBoom PI DAC HAT Sound Card");
++MODULE_LICENSE("GPL v2");
+--- /dev/null
++++ b/sound/soc/bcm/justboom-digi.c
+@@ -0,0 +1,215 @@
++/*
++ * ASoC Driver for JustBoom Raspberry Pi Digi HAT Sound Card
++ *
++ * Author: Milan Neskovic
++ * Copyright 2016
++ * based on code by Daniel Matuschek <info@crazy-audio.com>
++ * based on code by Florian Meier <florian.meier@koalo.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++#include "../codecs/wm8804.h"
++
++static int snd_rpi_justboom_digi_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ return 0;
++}
++
++static int snd_rpi_justboom_digi_startup(struct snd_pcm_substream *substream) {
++ /* turn on digital output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
++ return 0;
++}
++
++static void snd_rpi_justboom_digi_shutdown(struct snd_pcm_substream *substream) {
++ /* turn off output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
++}
++
++static int snd_rpi_justboom_digi_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ int sysclk = 27000000; /* This is fixed on this board */
++
++ long mclk_freq=0;
++ int mclk_div=1;
++ int sampling_freq=1;
++
++ int ret;
++
++ int samplerate = params_rate(params);
++
++ if (samplerate<=96000) {
++ mclk_freq=samplerate*256;
++ mclk_div=WM8804_MCLKDIV_256FS;
++ } else {
++ mclk_freq=samplerate*128;
++ mclk_div=WM8804_MCLKDIV_128FS;
++ }
++
++ switch (samplerate) {
++ case 32000:
++ sampling_freq=0x03;
++ break;
++ case 44100:
++ sampling_freq=0x00;
++ break;
++ case 48000:
++ sampling_freq=0x02;
++ break;
++ case 88200:
++ sampling_freq=0x08;
++ break;
++ case 96000:
++ sampling_freq=0x0a;
++ break;
++ case 176400:
++ sampling_freq=0x0c;
++ break;
++ case 192000:
++ sampling_freq=0x0e;
++ break;
++ default:
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
++ samplerate);
++ }
++
++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
++ sysclk, SND_SOC_CLOCK_OUT);
++ if (ret < 0) {
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK: %d\n", ret);
++ return ret;
++ }
++
++ /* Enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ /* Power on */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
++
++ /* set sampling frequency status bits */
++ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_justboom_digi_ops = {
++ .hw_params = snd_rpi_justboom_digi_hw_params,
++ .startup = snd_rpi_justboom_digi_startup,
++ .shutdown = snd_rpi_justboom_digi_shutdown,
++};
++
++static struct snd_soc_dai_link snd_rpi_justboom_digi_dai[] = {
++{
++ .name = "JustBoom Digi",
++ .stream_name = "JustBoom Digi HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8804-spdif",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "wm8804.1-003b",
++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &snd_rpi_justboom_digi_ops,
++ .init = snd_rpi_justboom_digi_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_justboom_digi = {
++ .name = "snd_rpi_justboom_digi",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_justboom_digi_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_justboom_digi_dai),
++};
++
++static int snd_rpi_justboom_digi_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ snd_rpi_justboom_digi.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &snd_rpi_justboom_digi_dai[0];
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++ }
++
++ ret = snd_soc_register_card(&snd_rpi_justboom_digi);
++ if (ret)
++ dev_err(&pdev->dev,
++ "snd_soc_register_card() failed: %d\n", ret);
++
++ return ret;
++}
++
++static int snd_rpi_justboom_digi_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_justboom_digi);
++}
++
++static const struct of_device_id snd_rpi_justboom_digi_of_match[] = {
++ { .compatible = "justboom,justboom-digi", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_justboom_digi_of_match);
++
++static struct platform_driver snd_rpi_justboom_digi_driver = {
++ .driver = {
++ .name = "snd-rpi-justboom-digi",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_justboom_digi_of_match,
++ },
++ .probe = snd_rpi_justboom_digi_probe,
++ .remove = snd_rpi_justboom_digi_remove,
++};
++
++module_platform_driver(snd_rpi_justboom_digi_driver);
++
++MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
++MODULE_DESCRIPTION("ASoC Driver for JustBoom PI Digi HAT Sound Card");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From bc431816b3277e61807a3c279ae8fe11b1599f67 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Tue, 24 May 2016 16:20:09 +0100
-Subject: [PATCH] bcm2835-camera: Fix max/min error when looping over
- cameras/resolutions
-
-See: https://github.com/raspberrypi/linux/issues/1447#issuecomment-221303506
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -1530,8 +1530,8 @@ static int get_num_cameras(struct vchiq_
- }
- for (i = 0;
- i < (cam_info.num_cameras > num_resolutions ?
-- cam_info.num_cameras :
-- num_resolutions);
-+ num_resolutions :
-+ cam_info.num_cameras);
- i++) {
- resolutions[i][0] = cam_info.cameras[i].max_width;
- resolutions[i][1] = cam_info.cameras[i].max_height;
+++ /dev/null
-From 027817e4c01f900824dde9932e1e3fb32575bc9f Mon Sep 17 00:00:00 2001
-From: Aaron Shaw <shawaj@gmail.com>
-Date: Thu, 26 May 2016 23:37:11 +0100
-Subject: [PATCH] Change BoomBerry name to JustBoom in all locations due to
- legal challenge
-
----
- arch/arm/boot/dts/overlays/Makefile | 4 +-
- arch/arm/boot/dts/overlays/README | 52 ++---
- .../boot/dts/overlays/boomberry-dac-overlay.dts | 43 -----
- .../boot/dts/overlays/boomberry-digi-overlay.dts | 39 ----
- .../arm/boot/dts/overlays/justboom-dac-overlay.dts | 43 +++++
- .../boot/dts/overlays/justboom-digi-overlay.dts | 39 ++++
- arch/arm/configs/bcm2709_defconfig | 4 +-
- arch/arm/configs/bcmrpi_defconfig | 4 +-
- sound/soc/bcm/Kconfig | 12 +-
- sound/soc/bcm/Makefile | 8 +-
- sound/soc/bcm/boomberry-dac.c | 162 ----------------
- sound/soc/bcm/boomberry-digi.c | 215 ---------------------
- sound/soc/bcm/justboom-dac.c | 162 ++++++++++++++++
- sound/soc/bcm/justboom-digi.c | 215 +++++++++++++++++++++
- 14 files changed, 501 insertions(+), 501 deletions(-)
- delete mode 100644 arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
- delete mode 100644 arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
- create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
- create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
- delete mode 100644 sound/soc/bcm/boomberry-dac.c
- delete mode 100644 sound/soc/bcm/boomberry-digi.c
- create mode 100644 sound/soc/bcm/justboom-dac.c
- create mode 100644 sound/soc/bcm/justboom-digi.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -18,8 +18,6 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += boomberry-dac.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += boomberry-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
-@@ -43,6 +41,8 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
- dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -238,32 +238,6 @@ Load: dtoverlay=bmp085_i2c-sensor
- Params: <None>
-
-
--Name: boomberry-dac
--Info: Configures the BoomBerry DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
-- cards
--Load: dtoverlay=boomberry-dac,<param>=<val>
--Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
-- Digital volume control. Enable with
-- "dtoverlay=boomberry-dac,24db_digital_gain"
-- (The default behaviour is that the Digital
-- volume control is limited to a maximum of
-- 0dB. ie. it can attenuate but not provide
-- gain. For most users, this will be desired
-- as it will prevent clipping. By appending
-- the 24dB_digital_gain parameter, the Digital
-- volume control will allow up to 24dB of
-- gain. If this parameter is enabled, it is the
-- responsibility of the user to ensure that
-- the Digital volume control is set to a value
-- that does not result in clipping/distortion!)
--
--
--Name: boomberry-digi
--Info: Configures the BoomBerry Digi HAT and Digi Zero audio cards
--Load: dtoverlay=boomberry-digi
--Params: <None>
--
--
- Name: dht11
- Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
- Also sometimes found with the part number(s) AM230x.
-@@ -541,6 +515,32 @@ Params: 24db_digital_gain Allow ga
- that does not result in clipping/distortion!)
-
-
-+Name: justboom-dac
-+Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
-+ cards
-+Load: dtoverlay=justboom-dac,<param>=<val>
-+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
-+ Digital volume control. Enable with
-+ "dtoverlay=justboom-dac,24db_digital_gain"
-+ (The default behaviour is that the Digital
-+ volume control is limited to a maximum of
-+ 0dB. ie. it can attenuate but not provide
-+ gain. For most users, this will be desired
-+ as it will prevent clipping. By appending
-+ the 24dB_digital_gain parameter, the Digital
-+ volume control will allow up to 24dB of
-+ gain. If this parameter is enabled, it is the
-+ responsibility of the user to ensure that
-+ the Digital volume control is set to a value
-+ that does not result in clipping/distortion!)
-+
-+
-+Name: justboom-digi
-+Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
-+Load: dtoverlay=justboom-digi
-+Params: <None>
-+
-+
- Name: lirc-rpi
- Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi)
- Consult the module documentation for more details.
---- a/arch/arm/boot/dts/overlays/boomberry-dac-overlay.dts
-+++ /dev/null
-@@ -1,43 +0,0 @@
--// Definitions for BoomBerry DAC
--/dts-v1/;
--/plugin/;
--
--/ {
-- compatible = "brcm,bcm2708";
--
-- fragment@0 {
-- target = <&i2s>;
-- __overlay__ {
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
-- target = <&i2c1>;
-- __overlay__ {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- status = "okay";
--
-- pcm5122@4d {
-- #sound-dai-cells = <0>;
-- compatible = "ti,pcm5122";
-- reg = <0x4d>;
-- status = "okay";
-- };
-- };
-- };
--
-- fragment@2 {
-- target = <&sound>;
-- frag2: __overlay__ {
-- compatible = "boomberry,boomberry-dac";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--
-- __overrides__ {
-- 24db_digital_gain = <&frag2>,"boomberry,24db_digital_gain?";
-- };
--};
---- a/arch/arm/boot/dts/overlays/boomberry-digi-overlay.dts
-+++ /dev/null
-@@ -1,39 +0,0 @@
--// Definitions for BoomBerry Digi
--/dts-v1/;
--/plugin/;
--
--/ {
-- compatible = "brcm,bcm2708";
--
-- fragment@0 {
-- target = <&i2s>;
-- __overlay__ {
-- status = "okay";
-- };
-- };
--
-- fragment@1 {
-- target = <&i2c1>;
-- __overlay__ {
-- #address-cells = <1>;
-- #size-cells = <0>;
-- status = "okay";
--
-- wm8804@3b {
-- #sound-dai-cells = <0>;
-- compatible = "wlf,wm8804";
-- reg = <0x3b>;
-- status = "okay";
-- };
-- };
-- };
--
-- fragment@2 {
-- target = <&sound>;
-- __overlay__ {
-- compatible = "boomberry,boomberry-digi";
-- i2s-controller = <&i2s>;
-- status = "okay";
-- };
-- };
--};
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
-@@ -0,0 +1,43 @@
-+// Definitions for JustBoom DAC
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ pcm5122@4d {
-+ #sound-dai-cells = <0>;
-+ compatible = "ti,pcm5122";
-+ reg = <0x4d>;
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ frag2: __overlay__ {
-+ compatible = "justboom,justboom-dac";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
-+ __overrides__ {
-+ 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
-+ };
-+};
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
-@@ -0,0 +1,39 @@
-+// Definitions for JustBoom Digi
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8804@3b {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8804";
-+ reg = <0x3b>;
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "justboom,justboom-digi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -861,8 +861,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
- CONFIG_SND_BCM2708_SOC_RPI_DAC=m
- CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -853,8 +853,8 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m
- CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m
- CONFIG_SND_BCM2708_SOC_RPI_DAC=m
- CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC=m
--CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
-+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -50,19 +50,19 @@ config SND_BCM2708_SOC_RPI_PROTO
- help
- Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731).
-
--config SND_BCM2708_SOC_BOOMBERRY_DAC
-- tristate "Support for BoomBerry DAC"
-+config SND_BCM2708_SOC_JUSTBOOM_DAC
-+ tristate "Support for JustBoom DAC"
- depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
- select SND_SOC_PCM512x
- help
-- Say Y or M if you want to add support for BoomBerry DAC.
-+ Say Y or M if you want to add support for JustBoom DAC.
-
--config SND_BCM2708_SOC_BOOMBERRY_DIGI
-- tristate "Support for BoomBerry Digi"
-+config SND_BCM2708_SOC_JUSTBOOM_DIGI
-+ tristate "Support for JustBoom Digi"
- depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
- select SND_SOC_WM8804
- help
-- Say Y or M if you want to add support for BoomBerry Digi.
-+ Say Y or M if you want to add support for JustBoom Digi.
-
- config SND_BCM2708_SOC_IQAUDIO_DAC
- tristate "Support for IQaudIO-DAC"
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -9,8 +9,8 @@ snd-soc-hifiberry-dac-objs := hifiberry_
- snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o
- snd-soc-hifiberry-digi-objs := hifiberry_digi.o
- snd-soc-hifiberry-amp-objs := hifiberry_amp.o
--snd-soc-boomberry-dac-objs := boomberry-dac.o
--snd-soc-boomberry-digi-objs := boomberry-digi.o
-+snd-soc-justboom-dac-objs := justboom-dac.o
-+snd-soc-justboom-digi-objs := justboom-digi.o
- snd-soc-rpi-dac-objs := rpi-dac.o
- snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
-@@ -22,8 +22,8 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o
--obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DAC) += snd-soc-boomberry-dac.o
--obj-$(CONFIG_SND_BCM2708_SOC_BOOMBERRY_DIGI) += snd-soc-boomberry-digi.o
-+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o
-+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI) += snd-soc-justboom-digi.o
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
- obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
---- a/sound/soc/bcm/boomberry-dac.c
-+++ /dev/null
-@@ -1,162 +0,0 @@
--/*
-- * ASoC Driver for BoomBerry DAC Raspberry Pi HAT Sound Card
-- *
-- * Author: Milan Neskovic
-- * Copyright 2016
-- * based on code by Daniel Matuschek <info@crazy-audio.com>
-- * based on code by Florian Meier <florian.meier@koalo.de>
-- *
-- * This program is free software; you can redistribute it and/or
-- * modify it under the terms of the GNU General Public License
-- * version 2 as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope that it will be useful, but
-- * WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- * General Public License for more details.
-- */
--
--#include <linux/module.h>
--#include <linux/platform_device.h>
--
--#include <sound/core.h>
--#include <sound/pcm.h>
--#include <sound/pcm_params.h>
--#include <sound/soc.h>
--#include <sound/jack.h>
--
--#include "../codecs/pcm512x.h"
--
--static bool digital_gain_0db_limit = true;
--
--static int snd_rpi_boomberry_dac_init(struct snd_soc_pcm_runtime *rtd)
--{
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
-- snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
-- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
--
-- if (digital_gain_0db_limit)
-- {
-- int ret;
-- struct snd_soc_card *card = rtd->card;
--
-- ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
-- if (ret < 0)
-- dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
-- }
--
-- return 0;
--}
--
--static int snd_rpi_boomberry_dac_hw_params(struct snd_pcm_substream *substream,
-- struct snd_pcm_hw_params *params)
--{
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-- /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
-- unsigned int sample_bits =
-- snd_pcm_format_physical_width(params_format(params));
-- return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
--}
--
--static int snd_rpi_boomberry_dac_startup(struct snd_pcm_substream *substream) {
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
-- return 0;
--}
--
--static void snd_rpi_boomberry_dac_shutdown(struct snd_pcm_substream *substream) {
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
--}
--
--/* machine stream operations */
--static struct snd_soc_ops snd_rpi_boomberry_dac_ops = {
-- .hw_params = snd_rpi_boomberry_dac_hw_params,
-- .startup = snd_rpi_boomberry_dac_startup,
-- .shutdown = snd_rpi_boomberry_dac_shutdown,
--};
--
--static struct snd_soc_dai_link snd_rpi_boomberry_dac_dai[] = {
--{
-- .name = "BoomBerry DAC",
-- .stream_name = "BoomBerry DAC HiFi",
-- .cpu_dai_name = "bcm2708-i2s.0",
-- .codec_dai_name = "pcm512x-hifi",
-- .platform_name = "bcm2708-i2s.0",
-- .codec_name = "pcm512x.1-004d",
-- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-- SND_SOC_DAIFMT_CBS_CFS,
-- .ops = &snd_rpi_boomberry_dac_ops,
-- .init = snd_rpi_boomberry_dac_init,
--},
--};
--
--/* audio machine driver */
--static struct snd_soc_card snd_rpi_boomberry_dac = {
-- .name = "snd_rpi_boomberry_dac",
-- .owner = THIS_MODULE,
-- .dai_link = snd_rpi_boomberry_dac_dai,
-- .num_links = ARRAY_SIZE(snd_rpi_boomberry_dac_dai),
--};
--
--static int snd_rpi_boomberry_dac_probe(struct platform_device *pdev)
--{
-- int ret = 0;
--
-- snd_rpi_boomberry_dac.dev = &pdev->dev;
--
-- if (pdev->dev.of_node) {
-- struct device_node *i2s_node;
-- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_dac_dai[0];
-- i2s_node = of_parse_phandle(pdev->dev.of_node,
-- "i2s-controller", 0);
--
-- if (i2s_node) {
-- dai->cpu_dai_name = NULL;
-- dai->cpu_of_node = i2s_node;
-- dai->platform_name = NULL;
-- dai->platform_of_node = i2s_node;
-- }
--
-- digital_gain_0db_limit = !of_property_read_bool(
-- pdev->dev.of_node, "boomberry,24db_digital_gain");
-- }
--
-- ret = snd_soc_register_card(&snd_rpi_boomberry_dac);
-- if (ret)
-- dev_err(&pdev->dev,
-- "snd_soc_register_card() failed: %d\n", ret);
--
-- return ret;
--}
--
--static int snd_rpi_boomberry_dac_remove(struct platform_device *pdev)
--{
-- return snd_soc_unregister_card(&snd_rpi_boomberry_dac);
--}
--
--static const struct of_device_id snd_rpi_boomberry_dac_of_match[] = {
-- { .compatible = "boomberry,boomberry-dac", },
-- {},
--};
--MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_dac_of_match);
--
--static struct platform_driver snd_rpi_boomberry_dac_driver = {
-- .driver = {
-- .name = "snd-rpi-boomberry-dac",
-- .owner = THIS_MODULE,
-- .of_match_table = snd_rpi_boomberry_dac_of_match,
-- },
-- .probe = snd_rpi_boomberry_dac_probe,
-- .remove = snd_rpi_boomberry_dac_remove,
--};
--
--module_platform_driver(snd_rpi_boomberry_dac_driver);
--
--MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
--MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI DAC HAT Sound Card");
--MODULE_LICENSE("GPL v2");
---- a/sound/soc/bcm/boomberry-digi.c
-+++ /dev/null
-@@ -1,215 +0,0 @@
--/*
-- * ASoC Driver for BoomBerry Raspberry Pi Digi HAT Sound Card
-- *
-- * Author: Milan Neskovic
-- * Copyright 2016
-- * based on code by Daniel Matuschek <info@crazy-audio.com>
-- * based on code by Florian Meier <florian.meier@koalo.de>
-- *
-- * This program is free software; you can redistribute it and/or
-- * modify it under the terms of the GNU General Public License
-- * version 2 as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope that it will be useful, but
-- * WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-- * General Public License for more details.
-- */
--
--#include <linux/module.h>
--#include <linux/platform_device.h>
--
--#include <sound/core.h>
--#include <sound/pcm.h>
--#include <sound/pcm_params.h>
--#include <sound/soc.h>
--#include <sound/jack.h>
--
--#include "../codecs/wm8804.h"
--
--static int snd_rpi_boomberry_digi_init(struct snd_soc_pcm_runtime *rtd)
--{
-- struct snd_soc_codec *codec = rtd->codec;
--
-- /* enable TX output */
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
--
-- return 0;
--}
--
--static int snd_rpi_boomberry_digi_startup(struct snd_pcm_substream *substream) {
-- /* turn on digital output */
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-- return 0;
--}
--
--static void snd_rpi_boomberry_digi_shutdown(struct snd_pcm_substream *substream) {
-- /* turn off output */
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_codec *codec = rtd->codec;
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
--}
--
--static int snd_rpi_boomberry_digi_hw_params(struct snd_pcm_substream *substream,
-- struct snd_pcm_hw_params *params)
--{
-- struct snd_soc_pcm_runtime *rtd = substream->private_data;
-- struct snd_soc_dai *codec_dai = rtd->codec_dai;
-- struct snd_soc_codec *codec = rtd->codec;
-- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
--
-- int sysclk = 27000000; /* This is fixed on this board */
--
-- long mclk_freq=0;
-- int mclk_div=1;
-- int sampling_freq=1;
--
-- int ret;
--
-- int samplerate = params_rate(params);
--
-- if (samplerate<=96000) {
-- mclk_freq=samplerate*256;
-- mclk_div=WM8804_MCLKDIV_256FS;
-- } else {
-- mclk_freq=samplerate*128;
-- mclk_div=WM8804_MCLKDIV_128FS;
-- }
--
-- switch (samplerate) {
-- case 32000:
-- sampling_freq=0x03;
-- break;
-- case 44100:
-- sampling_freq=0x00;
-- break;
-- case 48000:
-- sampling_freq=0x02;
-- break;
-- case 88200:
-- sampling_freq=0x08;
-- break;
-- case 96000:
-- sampling_freq=0x0a;
-- break;
-- case 176400:
-- sampling_freq=0x0c;
-- break;
-- case 192000:
-- sampling_freq=0x0e;
-- break;
-- default:
-- dev_err(codec->dev,
-- "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-- samplerate);
-- }
--
-- snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-- snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
--
-- ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-- sysclk, SND_SOC_CLOCK_OUT);
-- if (ret < 0) {
-- dev_err(codec->dev,
-- "Failed to set WM8804 SYSCLK: %d\n", ret);
-- return ret;
-- }
--
-- /* Enable TX output */
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
--
-- /* Power on */
-- snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
--
-- /* set sampling frequency status bits */
-- snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
--
-- return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
--}
--
--/* machine stream operations */
--static struct snd_soc_ops snd_rpi_boomberry_digi_ops = {
-- .hw_params = snd_rpi_boomberry_digi_hw_params,
-- .startup = snd_rpi_boomberry_digi_startup,
-- .shutdown = snd_rpi_boomberry_digi_shutdown,
--};
--
--static struct snd_soc_dai_link snd_rpi_boomberry_digi_dai[] = {
--{
-- .name = "BoomBerry Digi",
-- .stream_name = "BoomBerry Digi HiFi",
-- .cpu_dai_name = "bcm2708-i2s.0",
-- .codec_dai_name = "wm8804-spdif",
-- .platform_name = "bcm2708-i2s.0",
-- .codec_name = "wm8804.1-003b",
-- .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-- SND_SOC_DAIFMT_CBM_CFM,
-- .ops = &snd_rpi_boomberry_digi_ops,
-- .init = snd_rpi_boomberry_digi_init,
--},
--};
--
--/* audio machine driver */
--static struct snd_soc_card snd_rpi_boomberry_digi = {
-- .name = "snd_rpi_boomberry_digi",
-- .owner = THIS_MODULE,
-- .dai_link = snd_rpi_boomberry_digi_dai,
-- .num_links = ARRAY_SIZE(snd_rpi_boomberry_digi_dai),
--};
--
--static int snd_rpi_boomberry_digi_probe(struct platform_device *pdev)
--{
-- int ret = 0;
--
-- snd_rpi_boomberry_digi.dev = &pdev->dev;
--
-- if (pdev->dev.of_node) {
-- struct device_node *i2s_node;
-- struct snd_soc_dai_link *dai = &snd_rpi_boomberry_digi_dai[0];
-- i2s_node = of_parse_phandle(pdev->dev.of_node,
-- "i2s-controller", 0);
--
-- if (i2s_node) {
-- dai->cpu_dai_name = NULL;
-- dai->cpu_of_node = i2s_node;
-- dai->platform_name = NULL;
-- dai->platform_of_node = i2s_node;
-- }
-- }
--
-- ret = snd_soc_register_card(&snd_rpi_boomberry_digi);
-- if (ret)
-- dev_err(&pdev->dev,
-- "snd_soc_register_card() failed: %d\n", ret);
--
-- return ret;
--}
--
--static int snd_rpi_boomberry_digi_remove(struct platform_device *pdev)
--{
-- return snd_soc_unregister_card(&snd_rpi_boomberry_digi);
--}
--
--static const struct of_device_id snd_rpi_boomberry_digi_of_match[] = {
-- { .compatible = "boomberry,boomberry-digi", },
-- {},
--};
--MODULE_DEVICE_TABLE(of, snd_rpi_boomberry_digi_of_match);
--
--static struct platform_driver snd_rpi_boomberry_digi_driver = {
-- .driver = {
-- .name = "snd-rpi-boomberry-digi",
-- .owner = THIS_MODULE,
-- .of_match_table = snd_rpi_boomberry_digi_of_match,
-- },
-- .probe = snd_rpi_boomberry_digi_probe,
-- .remove = snd_rpi_boomberry_digi_remove,
--};
--
--module_platform_driver(snd_rpi_boomberry_digi_driver);
--
--MODULE_AUTHOR("Milan Neskovic <info@boomberry.co>");
--MODULE_DESCRIPTION("ASoC Driver for BoomBerry PI Digi HAT Sound Card");
--MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/sound/soc/bcm/justboom-dac.c
-@@ -0,0 +1,162 @@
-+/*
-+ * ASoC Driver for JustBoom DAC Raspberry Pi HAT Sound Card
-+ *
-+ * Author: Milan Neskovic
-+ * Copyright 2016
-+ * based on code by Daniel Matuschek <info@crazy-audio.com>
-+ * based on code by Florian Meier <florian.meier@koalo.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+#include "../codecs/pcm512x.h"
-+
-+static bool digital_gain_0db_limit = true;
-+
-+static int snd_rpi_justboom_dac_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08);
-+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02);
-+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
-+
-+ if (digital_gain_0db_limit)
-+ {
-+ int ret;
-+ struct snd_soc_card *card = rtd->card;
-+
-+ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207);
-+ if (ret < 0)
-+ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret);
-+ }
-+
-+ return 0;
-+}
-+
-+static int snd_rpi_justboom_dac_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+ /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/
-+ unsigned int sample_bits =
-+ snd_pcm_format_physical_width(params_format(params));
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
-+}
-+
-+static int snd_rpi_justboom_dac_startup(struct snd_pcm_substream *substream) {
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08);
-+ return 0;
-+}
-+
-+static void snd_rpi_justboom_dac_shutdown(struct snd_pcm_substream *substream) {
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00);
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_rpi_justboom_dac_ops = {
-+ .hw_params = snd_rpi_justboom_dac_hw_params,
-+ .startup = snd_rpi_justboom_dac_startup,
-+ .shutdown = snd_rpi_justboom_dac_shutdown,
-+};
-+
-+static struct snd_soc_dai_link snd_rpi_justboom_dac_dai[] = {
-+{
-+ .name = "JustBoom DAC",
-+ .stream_name = "JustBoom DAC HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "pcm512x-hifi",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "pcm512x.1-004d",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBS_CFS,
-+ .ops = &snd_rpi_justboom_dac_ops,
-+ .init = snd_rpi_justboom_dac_init,
-+},
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_rpi_justboom_dac = {
-+ .name = "snd_rpi_justboom_dac",
-+ .owner = THIS_MODULE,
-+ .dai_link = snd_rpi_justboom_dac_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai),
-+};
-+
-+static int snd_rpi_justboom_dac_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ snd_rpi_justboom_dac.dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_dac_dai[0];
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+
-+ digital_gain_0db_limit = !of_property_read_bool(
-+ pdev->dev.of_node, "justboom,24db_digital_gain");
-+ }
-+
-+ ret = snd_soc_register_card(&snd_rpi_justboom_dac);
-+ if (ret)
-+ dev_err(&pdev->dev,
-+ "snd_soc_register_card() failed: %d\n", ret);
-+
-+ return ret;
-+}
-+
-+static int snd_rpi_justboom_dac_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_rpi_justboom_dac);
-+}
-+
-+static const struct of_device_id snd_rpi_justboom_dac_of_match[] = {
-+ { .compatible = "justboom,justboom-dac", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_dac_of_match);
-+
-+static struct platform_driver snd_rpi_justboom_dac_driver = {
-+ .driver = {
-+ .name = "snd-rpi-justboom-dac",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_rpi_justboom_dac_of_match,
-+ },
-+ .probe = snd_rpi_justboom_dac_probe,
-+ .remove = snd_rpi_justboom_dac_remove,
-+};
-+
-+module_platform_driver(snd_rpi_justboom_dac_driver);
-+
-+MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
-+MODULE_DESCRIPTION("ASoC Driver for JustBoom PI DAC HAT Sound Card");
-+MODULE_LICENSE("GPL v2");
---- /dev/null
-+++ b/sound/soc/bcm/justboom-digi.c
-@@ -0,0 +1,215 @@
-+/*
-+ * ASoC Driver for JustBoom Raspberry Pi Digi HAT Sound Card
-+ *
-+ * Author: Milan Neskovic
-+ * Copyright 2016
-+ * based on code by Daniel Matuschek <info@crazy-audio.com>
-+ * based on code by Florian Meier <florian.meier@koalo.de>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+#include "../codecs/wm8804.h"
-+
-+static int snd_rpi_justboom_digi_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ /* enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ return 0;
-+}
-+
-+static int snd_rpi_justboom_digi_startup(struct snd_pcm_substream *substream) {
-+ /* turn on digital output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-+ return 0;
-+}
-+
-+static void snd_rpi_justboom_digi_shutdown(struct snd_pcm_substream *substream) {
-+ /* turn off output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
-+}
-+
-+static int snd_rpi_justboom_digi_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+
-+ int sysclk = 27000000; /* This is fixed on this board */
-+
-+ long mclk_freq=0;
-+ int mclk_div=1;
-+ int sampling_freq=1;
-+
-+ int ret;
-+
-+ int samplerate = params_rate(params);
-+
-+ if (samplerate<=96000) {
-+ mclk_freq=samplerate*256;
-+ mclk_div=WM8804_MCLKDIV_256FS;
-+ } else {
-+ mclk_freq=samplerate*128;
-+ mclk_div=WM8804_MCLKDIV_128FS;
-+ }
-+
-+ switch (samplerate) {
-+ case 32000:
-+ sampling_freq=0x03;
-+ break;
-+ case 44100:
-+ sampling_freq=0x00;
-+ break;
-+ case 48000:
-+ sampling_freq=0x02;
-+ break;
-+ case 88200:
-+ sampling_freq=0x08;
-+ break;
-+ case 96000:
-+ sampling_freq=0x0a;
-+ break;
-+ case 176400:
-+ sampling_freq=0x0c;
-+ break;
-+ case 192000:
-+ sampling_freq=0x0e;
-+ break;
-+ default:
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-+ samplerate);
-+ }
-+
-+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
-+
-+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-+ sysclk, SND_SOC_CLOCK_OUT);
-+ if (ret < 0) {
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK: %d\n", ret);
-+ return ret;
-+ }
-+
-+ /* Enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ /* Power on */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
-+
-+ /* set sampling frequency status bits */
-+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
-+
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai,64);
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_rpi_justboom_digi_ops = {
-+ .hw_params = snd_rpi_justboom_digi_hw_params,
-+ .startup = snd_rpi_justboom_digi_startup,
-+ .shutdown = snd_rpi_justboom_digi_shutdown,
-+};
-+
-+static struct snd_soc_dai_link snd_rpi_justboom_digi_dai[] = {
-+{
-+ .name = "JustBoom Digi",
-+ .stream_name = "JustBoom Digi HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "wm8804-spdif",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "wm8804.1-003b",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBM_CFM,
-+ .ops = &snd_rpi_justboom_digi_ops,
-+ .init = snd_rpi_justboom_digi_init,
-+},
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_rpi_justboom_digi = {
-+ .name = "snd_rpi_justboom_digi",
-+ .owner = THIS_MODULE,
-+ .dai_link = snd_rpi_justboom_digi_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_justboom_digi_dai),
-+};
-+
-+static int snd_rpi_justboom_digi_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ snd_rpi_justboom_digi.dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_digi_dai[0];
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+ }
-+
-+ ret = snd_soc_register_card(&snd_rpi_justboom_digi);
-+ if (ret)
-+ dev_err(&pdev->dev,
-+ "snd_soc_register_card() failed: %d\n", ret);
-+
-+ return ret;
-+}
-+
-+static int snd_rpi_justboom_digi_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_rpi_justboom_digi);
-+}
-+
-+static const struct of_device_id snd_rpi_justboom_digi_of_match[] = {
-+ { .compatible = "justboom,justboom-digi", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_digi_of_match);
-+
-+static struct platform_driver snd_rpi_justboom_digi_driver = {
-+ .driver = {
-+ .name = "snd-rpi-justboom-digi",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_rpi_justboom_digi_of_match,
-+ },
-+ .probe = snd_rpi_justboom_digi_probe,
-+ .remove = snd_rpi_justboom_digi_remove,
-+};
-+
-+module_platform_driver(snd_rpi_justboom_digi_driver);
-+
-+MODULE_AUTHOR("Milan Neskovic <info@justboom.co>");
-+MODULE_DESCRIPTION("ASoC Driver for JustBoom PI Digi HAT Sound Card");
-+MODULE_LICENSE("GPL v2");
--- /dev/null
+From 8f9baa887c3328ee17a78b05eba51af6c8ffc83e Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Sun, 29 May 2016 05:22:29 +0100
+Subject: [PATCH] Add dt param to force HiFiBerry DAC+ Pro into slave mode
+
+"dtoverlay=hifiberry-dacplus,slave"
+
+Add 'slave' param to use HiFiBerry DAC+ Pro in slave mode,
+with Pi as master for bit and frame clock.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/README | 2 ++
+ arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 6 ++++--
+ sound/soc/bcm/hifiberry_dacplus.c | 10 ++++++++--
+ 3 files changed, 14 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -344,6 +344,8 @@ Params: 24db_digital_gain Allow ga
+ responsibility of the user to ensure that
+ the Digital volume control is set to a value
+ that does not result in clipping/distortion!)
++ slave Force DAC+ Pro into slave mode, using Pi as
++ master for bit clock and frame clock.
+
+
+ Name: hifiberry-digi
+--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
+@@ -41,7 +41,7 @@
+
+ fragment@3 {
+ target = <&sound>;
+- frag3: __overlay__ {
++ hifiberry_dacplus: __overlay__ {
+ compatible = "hifiberry,hifiberry-dacplus";
+ i2s-controller = <&i2s>;
+ status = "okay";
+@@ -49,6 +49,8 @@
+ };
+
+ __overrides__ {
+- 24db_digital_gain = <&frag3>,"hifiberry,24db_digital_gain?";
++ 24db_digital_gain =
++ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
++ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
+ };
+ };
+--- a/sound/soc/bcm/hifiberry_dacplus.c
++++ b/sound/soc/bcm/hifiberry_dacplus.c
+@@ -47,6 +47,7 @@ struct pcm512x_priv {
+ /* Clock rate of CLK48EN attached to GPIO3 pin */
+ #define CLK_48EN_RATE 24576000UL
+
++static bool slave;
+ static bool snd_rpi_hifiberry_is_dacpro;
+ static bool digital_gain_0db_limit = true;
+
+@@ -145,8 +146,11 @@ static int snd_rpi_hifiberry_dacplus_ini
+ struct snd_soc_codec *codec = rtd->codec;
+ struct pcm512x_priv *priv;
+
+- snd_rpi_hifiberry_is_dacpro
+- = snd_rpi_hifiberry_dacplus_is_pro_card(codec);
++ if (slave)
++ snd_rpi_hifiberry_is_dacpro = false;
++ else
++ snd_rpi_hifiberry_is_dacpro =
++ snd_rpi_hifiberry_dacplus_is_pro_card(codec);
+
+ if (snd_rpi_hifiberry_is_dacpro) {
+ struct snd_soc_dai_link *dai = rtd->dai_link;
+@@ -314,6 +318,8 @@ static int snd_rpi_hifiberry_dacplus_pro
+
+ digital_gain_0db_limit = !of_property_read_bool(
+ pdev->dev.of_node, "hifiberry,24db_digital_gain");
++ slave = of_property_read_bool(pdev->dev.of_node,
++ "hifiberry-dacplus,slave");
+ }
+
+ ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplus);
+++ /dev/null
-From 23a2a66f68d9cef1664e904b741e074dab5b82d6 Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Sun, 29 May 2016 05:22:29 +0100
-Subject: [PATCH] Add dt param to force HiFiBerry DAC+ Pro into slave mode
-
-"dtoverlay=hifiberry-dacplus,slave"
-
-Add 'slave' param to use HiFiBerry DAC+ Pro in slave mode,
-with Pi as master for bit and frame clock.
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/overlays/README | 2 ++
- arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 6 ++++--
- sound/soc/bcm/hifiberry_dacplus.c | 10 ++++++++--
- 3 files changed, 14 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -344,6 +344,8 @@ Params: 24db_digital_gain Allow ga
- responsibility of the user to ensure that
- the Digital volume control is set to a value
- that does not result in clipping/distortion!)
-+ slave Force DAC+ Pro into slave mode, using Pi as
-+ master for bit clock and frame clock.
-
-
- Name: hifiberry-digi
---- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
-@@ -41,7 +41,7 @@
-
- fragment@3 {
- target = <&sound>;
-- frag3: __overlay__ {
-+ hifiberry_dacplus: __overlay__ {
- compatible = "hifiberry,hifiberry-dacplus";
- i2s-controller = <&i2s>;
- status = "okay";
-@@ -49,6 +49,8 @@
- };
-
- __overrides__ {
-- 24db_digital_gain = <&frag3>,"hifiberry,24db_digital_gain?";
-+ 24db_digital_gain =
-+ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
-+ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
- };
- };
---- a/sound/soc/bcm/hifiberry_dacplus.c
-+++ b/sound/soc/bcm/hifiberry_dacplus.c
-@@ -47,6 +47,7 @@ struct pcm512x_priv {
- /* Clock rate of CLK48EN attached to GPIO3 pin */
- #define CLK_48EN_RATE 24576000UL
-
-+static bool slave;
- static bool snd_rpi_hifiberry_is_dacpro;
- static bool digital_gain_0db_limit = true;
-
-@@ -145,8 +146,11 @@ static int snd_rpi_hifiberry_dacplus_ini
- struct snd_soc_codec *codec = rtd->codec;
- struct pcm512x_priv *priv;
-
-- snd_rpi_hifiberry_is_dacpro
-- = snd_rpi_hifiberry_dacplus_is_pro_card(codec);
-+ if (slave)
-+ snd_rpi_hifiberry_is_dacpro = false;
-+ else
-+ snd_rpi_hifiberry_is_dacpro =
-+ snd_rpi_hifiberry_dacplus_is_pro_card(codec);
-
- if (snd_rpi_hifiberry_is_dacpro) {
- struct snd_soc_dai_link *dai = rtd->dai_link;
-@@ -314,6 +318,8 @@ static int snd_rpi_hifiberry_dacplus_pro
-
- digital_gain_0db_limit = !of_property_read_bool(
- pdev->dev.of_node, "hifiberry,24db_digital_gain");
-+ slave = of_property_read_bool(pdev->dev.of_node,
-+ "hifiberry-dacplus,slave");
- }
-
- ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplus);
--- /dev/null
+From 68b9ea24724f403ab475c2d8822c7dcd3ca5b875 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Thu, 19 May 2016 00:00:00 +0100
+Subject: [PATCH] simple: add sound-dai-cells to I2S def
+
+Add '#sound-dai-cells = <0>;' to the I2S definition in
+bcm2708_common.dtsi
+
+Not having it specified, whilst not causing an issue right now with
+rpi-4.4.y, is going to cause an issue going forward with the use of
+simple-card driver. So it doesn't fall through the cracks, patch it
+in now.
+
+Hopefully Martin has taken care of getting a patch submitted for the
+upstream Pi dts, as it was he who first run into the issue with the
+current upstream kernel....
+https://github.com/msperl/linux-rpi/issues/3#issue-154916615
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -137,6 +137,7 @@
+
+ i2s: i2s@7e203000 {
+ compatible = "brcm,bcm2835-i2s";
++ #sound-dai-cells = <0>;
+ reg = <0x7e203000 0x24>,
+ <0x7e101098 0x08>;
+
--- /dev/null
+From 12f6492a41b05d08a324cb53631804719e378e73 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <6by9@users.noreply.github.com>
+Date: Tue, 31 May 2016 10:38:31 +0100
+Subject: [PATCH] BCM2835-V4L2: Increase minimum resolution to 32x32
+
+https://github.com/raspberrypi/linux/issues/1498 showed
+up that 16x16 is failing to work on the GPU for some reason.
+
+GPU bug being tracked on
+https://github.com/raspberrypi/firmware/issues/607
+Workaround here by increasing minimum resolution via V4L2
+to 32x32.
+
+Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -36,8 +36,8 @@
+
+ #define BM2835_MMAL_VERSION "0.0.2"
+ #define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2"
+-#define MIN_WIDTH 16
+-#define MIN_HEIGHT 16
++#define MIN_WIDTH 32
++#define MIN_HEIGHT 32
+ #define MIN_BUFFER_SIZE (80*1024)
+
+ #define MAX_VIDEO_MODE_WIDTH 1280
+++ /dev/null
-From 488b8934b1f8c36a86570c6d6215404a2508cf5d Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Thu, 19 May 2016 00:00:00 +0100
-Subject: [PATCH] simple: add sound-dai-cells to I2S def
-
-Add '#sound-dai-cells = <0>;' to the I2S definition in
-bcm2708_common.dtsi
-
-Not having it specified, whilst not causing an issue right now with
-rpi-4.4.y, is going to cause an issue going forward with the use of
-simple-card driver. So it doesn't fall through the cracks, patch it
-in now.
-
-Hopefully Martin has taken care of getting a patch submitted for the
-upstream Pi dts, as it was he who first run into the issue with the
-current upstream kernel....
-https://github.com/msperl/linux-rpi/issues/3#issue-154916615
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -137,6 +137,7 @@
-
- i2s: i2s@7e203000 {
- compatible = "brcm,bcm2835-i2s";
-+ #sound-dai-cells = <0>;
- reg = <0x7e203000 0x24>,
- <0x7e101098 0x08>;
-
+++ /dev/null
-From 23573e4540b9de3c8506fa26956815fc0d71fb75 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <6by9@users.noreply.github.com>
-Date: Tue, 31 May 2016 10:38:31 +0100
-Subject: [PATCH] BCM2835-V4L2: Increase minimum resolution to 32x32
-
-https://github.com/raspberrypi/linux/issues/1498 showed
-up that 16x16 is failing to work on the GPU for some reason.
-
-GPU bug being tracked on
-https://github.com/raspberrypi/firmware/issues/607
-Workaround here by increasing minimum resolution via V4L2
-to 32x32.
-
-Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -36,8 +36,8 @@
-
- #define BM2835_MMAL_VERSION "0.0.2"
- #define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2"
--#define MIN_WIDTH 16
--#define MIN_HEIGHT 16
-+#define MIN_WIDTH 32
-+#define MIN_HEIGHT 32
- #define MIN_BUFFER_SIZE (80*1024)
-
- #define MAX_VIDEO_MODE_WIDTH 1280
--- /dev/null
+From 5be3a203fd3b663f590e97938203b6d0766a1578 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 27 May 2016 18:23:51 +0100
+Subject: [PATCH] config: Add support for Logitech Rumblepad
+
+---
+ arch/arm/configs/bcm2709_defconfig | 4 ++++
+ arch/arm/configs/bcmrpi_defconfig | 4 ++++
+ 2 files changed, 8 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -896,6 +896,10 @@ CONFIG_HID_TWINHAN=m
+ CONFIG_HID_KENSINGTON=m
+ CONFIG_HID_LCPOWER=m
+ CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
+ CONFIG_HID_MAGICMOUSE=m
+ CONFIG_HID_MICROSOFT=m
+ CONFIG_HID_MONTEREY=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -888,6 +888,10 @@ CONFIG_HID_TWINHAN=m
+ CONFIG_HID_KENSINGTON=m
+ CONFIG_HID_LCPOWER=m
+ CONFIG_HID_LOGITECH=m
++CONFIG_HID_LOGITECH_DJ=m
++CONFIG_LOGITECH_FF=y
++CONFIG_LOGIRUMBLEPAD2_FF=y
++CONFIG_LOGIG940_FF=y
+ CONFIG_HID_MAGICMOUSE=m
+ CONFIG_HID_MICROSOFT=m
+ CONFIG_HID_MONTEREY=m
--- /dev/null
+From 46c94fc6017e8a4e768aeb7c4b3d3a40928f1fa6 Mon Sep 17 00:00:00 2001
+From: escalator2015 <jmtasende@gmail.com>
+Date: Tue, 24 May 2016 16:20:09 +0100
+Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +
+ .../overlays/rra-digidac1-wm8741-audio-overlay.dts | 81 ++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 8 +
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/digidac1-soundcard.c | 422 +++++++++++++++++++++
+ 8 files changed, 522 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
+ create mode 100644 sound/soc/bcm/digidac1-soundcard.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -67,6 +67,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-display.d
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -842,6 +842,12 @@ Load: dtoverlay=rpi-sense
+ Params: <None>
+
+
++Name: rra-digidac1-wm8741-audio
++Info: Configures the Red Rocks Audio DigiDAC1 soundcard
++Load: dtoverlay=rra-digidac1-wm8741-audio
++Params: <None>
++
++
+ Name: sdhost
+ Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
+ N.B. This overlay is designed for situations where the mmc driver is
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
+@@ -0,0 +1,81 @@
++// Definitions for RRA DigiDAC1 Audio card
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target-path = "/";
++ __overlay__ {
++ aliases {
++ ldo0 = &ldo0;
++ ldo1 = &ldo1;
++ };
++ };
++ };
++
++ fragment@1 {
++ target-path = "/soc";
++ __overlay__ {
++
++ ldo1: ldo1 {
++ compatible = "regulator-fixed";
++ regulator-name = "DC_5V";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-always-on;
++ };
++
++ ldo0: ldo0 {
++ compatible = "regulator-fixed";
++ regulator-name = "DC_3V3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@3 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ PVDD-supply = <&ldo0>;
++ DVDD-supply = <&ldo0>;
++ };
++
++ wm8742: wm8741@1a {
++ compatible = "wlf,wm8741";
++ reg = <0x1a>;
++ status = "okay";
++ AVDD-supply = <&ldo1>;
++ DVDD-supply = <&ldo0>;
++ };
++ };
++ };
++
++ fragment@4 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "rra,digidac1-soundcard";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -866,6 +866,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -858,6 +858,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
++CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -92,3 +92,11 @@ config SND_AUDIOINJECTOR_PI_SOUNDCARD
+ select SND_SOC_WM8731
+ help
+ Say Y or M if you want to add support for audioinjector.net Pi Hat
++
++config SND_DIGIDAC1_SOUNDCARD
++ tristate "Support for Red Rocks Audio DigiDAC1"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_WM8804
++ select SND_SOC_WM8741
++ help
++ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -16,6 +16,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
+ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
++snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -29,4 +30,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO)
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
++obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+
+--- /dev/null
++++ b/sound/soc/bcm/digidac1-soundcard.c
+@@ -0,0 +1,422 @@
++/*
++ * ASoC Driver for RRA DigiDAC1
++ * Copyright 2016
++ * Author: José M. Tasende <vintage@redrocksaudio.es>
++ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
++ * and the Wolfson card driver by Nikesh Oswal, <Nikesh.Oswal@wolfsonmicro.com>
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/i2c.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++#include <sound/soc-dapm.h>
++#include <sound/tlv.h>
++#include <linux/regulator/consumer.h>
++
++#include "../codecs/wm8804.h"
++#include "../codecs/wm8741.h"
++
++#define WM8741_NUM_SUPPLIES 2
++
++/* codec private data */
++struct wm8741_priv {
++ struct wm8741_platform_data pdata;
++ struct regmap *regmap;
++ struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
++ unsigned int sysclk;
++ const struct snd_pcm_hw_constraint_list *sysclk_constraints;
++};
++
++static int samplerate = 44100;
++
++/* New Alsa Controls not exposed by original wm8741 codec driver */
++/* in actual driver the att. adjustment is wrong because */
++/* this DAC has a coarse attenuation register with 4dB steps */
++/* and a fine level register with 0.125dB steps */
++/* each register has 32 steps so combining both we have 1024 steps */
++/* of 0.125 dB. */
++/* The original level controls from driver are removed at startup */
++/* and replaced by the corrected ones. */
++/* The same wm8741 driver can be used for wm8741 and wm8742 devices */
++
++static const DECLARE_TLV_DB_SCALE(dac_tlv_fine, 0, 13, 0);
++static const DECLARE_TLV_DB_SCALE(dac_tlv_coarse, -12700, 400, 1);
++static const char *w8741_dither[4] = {"Off", "RPDF", "TPDF", "HPDF"};
++static const char *w8741_filter[5] = {
++ "Type 1", "Type 2", "Type 3", "Type 4", "Type 5"};
++static const char *w8741_switch[2] = {"Off", "On"};
++static const struct soc_enum w8741_enum[] = {
++SOC_ENUM_SINGLE(WM8741_MODE_CONTROL_2, 0, 4, w8741_dither),/* dithering type */
++SOC_ENUM_SINGLE(WM8741_FILTER_CONTROL, 0, 5, w8741_filter),/* filter type */
++SOC_ENUM_SINGLE(WM8741_FORMAT_CONTROL, 6, 2, w8741_switch),/* phase invert */
++SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 0, 2, w8741_switch),/* volume ramp */
++SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 3, 2, w8741_switch),/* soft mute */
++};
++
++static const struct snd_kcontrol_new w8741_snd_controls_stereo[] = {
++SOC_DOUBLE_R_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
++ WM8741_DACRLSB_ATTENUATION, 0, 31, 1, dac_tlv_fine),
++SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
++ WM8741_DACRMSB_ATTENUATION, 0, 31, 1, dac_tlv_coarse),
++SOC_ENUM("DAC Dither", w8741_enum[0]),
++SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
++SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
++SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
++SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
++};
++
++static const struct snd_kcontrol_new w8741_snd_controls_mono_left[] = {
++SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
++ 0, 31, 0, dac_tlv_fine),
++SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
++ 0, 31, 1, dac_tlv_coarse),
++SOC_ENUM("DAC Dither", w8741_enum[0]),
++SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
++SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
++SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
++SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
++};
++
++static const struct snd_kcontrol_new w8741_snd_controls_mono_right[] = {
++SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACRLSB_ATTENUATION,
++ 0, 31, 0, dac_tlv_fine),
++SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACRMSB_ATTENUATION,
++ 0, 31, 1, dac_tlv_coarse),
++SOC_ENUM("DAC Dither", w8741_enum[0]),
++SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
++SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
++SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
++SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
++};
++
++static int w8741_add_controls(struct snd_soc_codec *codec)
++{
++ struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
++
++ switch (wm8741->pdata.diff_mode) {
++ case WM8741_DIFF_MODE_STEREO:
++ case WM8741_DIFF_MODE_STEREO_REVERSED:
++ snd_soc_add_codec_controls(codec,
++ w8741_snd_controls_stereo,
++ ARRAY_SIZE(w8741_snd_controls_stereo));
++ break;
++ case WM8741_DIFF_MODE_MONO_LEFT:
++ snd_soc_add_codec_controls(codec,
++ w8741_snd_controls_mono_left,
++ ARRAY_SIZE(w8741_snd_controls_mono_left));
++ break;
++ case WM8741_DIFF_MODE_MONO_RIGHT:
++ snd_soc_add_codec_controls(codec,
++ w8741_snd_controls_mono_right,
++ ARRAY_SIZE(w8741_snd_controls_mono_right));
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static int digidac1_soundcard_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_card *card = rtd->card;
++ struct snd_soc_pcm_runtime *wm8741_rtd;
++ struct snd_soc_codec *wm8741_codec;
++ struct snd_card *sound_card = card->snd_card;
++ struct snd_kcontrol *kctl;
++ int ret;
++
++ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
++ if (!wm8741_rtd) {
++ dev_warn(card->dev, "digidac1_soundcard_init: couldn't get wm8741 rtd\n");
++ return -EFAULT;
++ }
++ wm8741_codec = wm8741_rtd->codec;
++ ret = w8741_add_controls(wm8741_codec);
++ if (ret < 0)
++ dev_warn(card->dev, "Failed to add new wm8741 controls: %d\n",
++ ret);
++
++ /* enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ kctl = snd_soc_card_get_kcontrol(card,
++ "Playback Volume");
++ if (kctl) {
++ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
++ snd_ctl_remove(sound_card, kctl);
++ }
++ kctl = snd_soc_card_get_kcontrol(card,
++ "Fine Playback Volume");
++ if (kctl) {
++ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
++ snd_ctl_remove(sound_card, kctl);
++ }
++ return 0;
++}
++
++static int digidac1_soundcard_startup(struct snd_pcm_substream *substream)
++{
++ /* turn on wm8804 digital output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_card *card = rtd->card;
++ struct snd_soc_pcm_runtime *wm8741_rtd;
++ struct snd_soc_codec *wm8741_codec;
++
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
++ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
++ if (!wm8741_rtd) {
++ dev_warn(card->dev, "digidac1_soundcard_startup: couldn't get WM8741 rtd\n");
++ return -EFAULT;
++ }
++ wm8741_codec = wm8741_rtd->codec;
++
++ /* latch wm8741 level */
++ snd_soc_update_bits(wm8741_codec, WM8741_DACLLSB_ATTENUATION,
++ WM8741_UPDATELL, WM8741_UPDATELL);
++ snd_soc_update_bits(wm8741_codec, WM8741_DACLMSB_ATTENUATION,
++ WM8741_UPDATELM, WM8741_UPDATELM);
++ snd_soc_update_bits(wm8741_codec, WM8741_DACRLSB_ATTENUATION,
++ WM8741_UPDATERL, WM8741_UPDATERL);
++ snd_soc_update_bits(wm8741_codec, WM8741_DACRMSB_ATTENUATION,
++ WM8741_UPDATERM, WM8741_UPDATERM);
++
++ return 0;
++}
++
++static void digidac1_soundcard_shutdown(struct snd_pcm_substream *substream)
++{
++ /* turn off wm8804 digital output */
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
++}
++
++static int digidac1_soundcard_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++ struct snd_soc_card *card = rtd->card;
++ struct snd_soc_pcm_runtime *wm8741_rtd;
++ struct snd_soc_codec *wm8741_codec;
++
++ int sysclk = 27000000;
++ long mclk_freq = 0;
++ int mclk_div = 1;
++ int sampling_freq = 1;
++ int ret;
++
++ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
++ if (!wm8741_rtd) {
++ dev_warn(card->dev, "digidac1_soundcard_hw_params: couldn't get WM8741 rtd\n");
++ return -EFAULT;
++ }
++ wm8741_codec = wm8741_rtd->codec;
++ samplerate = params_rate(params);
++
++ if (samplerate <= 96000) {
++ mclk_freq = samplerate*256;
++ mclk_div = WM8804_MCLKDIV_256FS;
++ } else {
++ mclk_freq = samplerate*128;
++ mclk_div = WM8804_MCLKDIV_128FS;
++ }
++
++ switch (samplerate) {
++ case 32000:
++ sampling_freq = 0x03;
++ break;
++ case 44100:
++ sampling_freq = 0x00;
++ break;
++ case 48000:
++ sampling_freq = 0x02;
++ break;
++ case 88200:
++ sampling_freq = 0x08;
++ break;
++ case 96000:
++ sampling_freq = 0x0a;
++ break;
++ case 176400:
++ sampling_freq = 0x0c;
++ break;
++ case 192000:
++ sampling_freq = 0x0e;
++ break;
++ default:
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
++ samplerate);
++ }
++
++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
++ sysclk, SND_SOC_CLOCK_OUT);
++ if (ret < 0) {
++ dev_err(codec->dev,
++ "Failed to set WM8804 SYSCLK: %d\n", ret);
++ return ret;
++ }
++ /* Enable wm8804 TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ /* wm8804 Power on */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
++
++ /* wm8804 set sampling frequency status bits */
++ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
++
++ /* Now update wm8741 registers for the correct oversampling */
++ if (samplerate <= 48000)
++ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
++ WM8741_OSR_MASK, 0x00);
++ else if (samplerate <= 96000)
++ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
++ WM8741_OSR_MASK, 0x20);
++ else
++ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
++ WM8741_OSR_MASK, 0x40);
++
++ /* wm8741 bit size */
++ switch (params_width(params)) {
++ case 16:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x00);
++ break;
++ case 20:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x01);
++ break;
++ case 24:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x02);
++ break;
++ case 32:
++ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
++ WM8741_IWL_MASK, 0x03);
++ break;
++ default:
++ dev_dbg(codec->dev, "wm8741_hw_params: Unsupported bit size param = %d",
++ params_width(params));
++ return -EINVAL;
++ }
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
++}
++/* machine stream operations */
++static struct snd_soc_ops digidac1_soundcard_ops = {
++ .hw_params = digidac1_soundcard_hw_params,
++ .startup = digidac1_soundcard_startup,
++ .shutdown = digidac1_soundcard_shutdown,
++};
++
++static struct snd_soc_dai_link digidac1_soundcard_dai[] = {
++ {
++ .name = "RRA DigiDAC1",
++ .stream_name = "RRA DigiDAC1 HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8804-spdif",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "wm8804.1-003b",
++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &digidac1_soundcard_ops,
++ .init = digidac1_soundcard_init,
++ },
++ {
++ .name = "RRA DigiDAC11",
++ .stream_name = "RRA DigiDAC11 HiFi",
++ .cpu_dai_name = "wm8804-spdif",
++ .codec_dai_name = "wm8741",
++ .codec_name = "wm8741.1-001a",
++ .dai_fmt = SND_SOC_DAIFMT_I2S
++ | SND_SOC_DAIFMT_NB_NF
++ | SND_SOC_DAIFMT_CBS_CFS,
++ },
++};
++
++/* audio machine driver */
++static struct snd_soc_card digidac1_soundcard = {
++ .name = "digidac1-soundcard",
++ .owner = THIS_MODULE,
++ .dai_link = digidac1_soundcard_dai,
++ .num_links = ARRAY_SIZE(digidac1_soundcard_dai),
++};
++
++static int digidac1_soundcard_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ digidac1_soundcard.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai = &digidac1_soundcard_dai[0];
++
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++ }
++
++ ret = snd_soc_register_card(&digidac1_soundcard);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
++ ret);
++
++ return ret;
++}
++
++static int digidac1_soundcard_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&digidac1_soundcard);
++}
++
++static const struct of_device_id digidac1_soundcard_of_match[] = {
++ { .compatible = "rra,digidac1-soundcard", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, digidac1_soundcard_of_match);
++
++static struct platform_driver digidac1_soundcard_driver = {
++ .driver = {
++ .name = "digidac1-audio",
++ .owner = THIS_MODULE,
++ .of_match_table = digidac1_soundcard_of_match,
++ },
++ .probe = digidac1_soundcard_probe,
++ .remove = digidac1_soundcard_remove,
++};
++
++module_platform_driver(digidac1_soundcard_driver);
++
++MODULE_AUTHOR("José M. Tasende <vintage@redrocksaudio.es>");
++MODULE_DESCRIPTION("ASoC Driver for RRA DigiDAC1");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 339b9cfaae888619c7c84c18c148a48baadddc2d Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 27 May 2016 18:23:51 +0100
-Subject: [PATCH] config: Add support for Logitech Rumblepad
-
----
- arch/arm/configs/bcm2709_defconfig | 4 ++++
- arch/arm/configs/bcmrpi_defconfig | 4 ++++
- 2 files changed, 8 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -896,6 +896,10 @@ CONFIG_HID_TWINHAN=m
- CONFIG_HID_KENSINGTON=m
- CONFIG_HID_LCPOWER=m
- CONFIG_HID_LOGITECH=m
-+CONFIG_HID_LOGITECH_DJ=m
-+CONFIG_LOGITECH_FF=y
-+CONFIG_LOGIRUMBLEPAD2_FF=y
-+CONFIG_LOGIG940_FF=y
- CONFIG_HID_MAGICMOUSE=m
- CONFIG_HID_MICROSOFT=m
- CONFIG_HID_MONTEREY=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -888,6 +888,10 @@ CONFIG_HID_TWINHAN=m
- CONFIG_HID_KENSINGTON=m
- CONFIG_HID_LCPOWER=m
- CONFIG_HID_LOGITECH=m
-+CONFIG_HID_LOGITECH_DJ=m
-+CONFIG_LOGITECH_FF=y
-+CONFIG_LOGIRUMBLEPAD2_FF=y
-+CONFIG_LOGIG940_FF=y
- CONFIG_HID_MAGICMOUSE=m
- CONFIG_HID_MICROSOFT=m
- CONFIG_HID_MONTEREY=m
+++ /dev/null
-From bcba10e5c5da279fa57920ee1c08ee1dea84a4f6 Mon Sep 17 00:00:00 2001
-From: escalator2015 <jmtasende@gmail.com>
-Date: Tue, 24 May 2016 16:20:09 +0100
-Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804
-
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 +
- .../overlays/rra-digidac1-wm8741-audio-overlay.dts | 81 ++++
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- sound/soc/bcm/Kconfig | 8 +
- sound/soc/bcm/Makefile | 2 +
- sound/soc/bcm/digidac1-soundcard.c | 422 +++++++++++++++++++++
- 8 files changed, 522 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
- create mode 100644 sound/soc/bcm/digidac1-soundcard.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -67,6 +67,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-display.d
- dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -842,6 +842,12 @@ Load: dtoverlay=rpi-sense
- Params: <None>
-
-
-+Name: rra-digidac1-wm8741-audio
-+Info: Configures the Red Rocks Audio DigiDAC1 soundcard
-+Load: dtoverlay=rra-digidac1-wm8741-audio
-+Params: <None>
-+
-+
- Name: sdhost
- Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
- N.B. This overlay is designed for situations where the mmc driver is
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
-@@ -0,0 +1,81 @@
-+// Definitions for RRA DigiDAC1 Audio card
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target-path = "/";
-+ __overlay__ {
-+ aliases {
-+ ldo0 = &ldo0;
-+ ldo1 = &ldo1;
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target-path = "/soc";
-+ __overlay__ {
-+
-+ ldo1: ldo1 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "DC_5V";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ regulator-always-on;
-+ };
-+
-+ ldo0: ldo0 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "DC_3V3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@3 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8804@3b {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8804";
-+ reg = <0x3b>;
-+ status = "okay";
-+ PVDD-supply = <&ldo0>;
-+ DVDD-supply = <&ldo0>;
-+ };
-+
-+ wm8742: wm8741@1a {
-+ compatible = "wlf,wm8741";
-+ reg = <0x1a>;
-+ status = "okay";
-+ AVDD-supply = <&ldo1>;
-+ DVDD-supply = <&ldo0>;
-+ };
-+ };
-+ };
-+
-+ fragment@4 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "rra,digidac1-soundcard";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -866,6 +866,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
-+CONFIG_SND_DIGIDAC1_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -858,6 +858,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
-+CONFIG_SND_DIGIDAC1_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -92,3 +92,11 @@ config SND_AUDIOINJECTOR_PI_SOUNDCARD
- select SND_SOC_WM8731
- help
- Say Y or M if you want to add support for audioinjector.net Pi Hat
-+
-+config SND_DIGIDAC1_SOUNDCARD
-+ tristate "Support for Red Rocks Audio DigiDAC1"
-+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
-+ select SND_SOC_WM8804
-+ select SND_SOC_WM8741
-+ help
-+ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -16,6 +16,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
- snd-soc-raspidac3-objs := raspidac3.o
- snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
-+snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
-
- obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
-@@ -29,4 +30,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO)
- obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
- obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
-+obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
-
---- /dev/null
-+++ b/sound/soc/bcm/digidac1-soundcard.c
-@@ -0,0 +1,422 @@
-+/*
-+ * ASoC Driver for RRA DigiDAC1
-+ * Copyright 2016
-+ * Author: José M. Tasende <vintage@redrocksaudio.es>
-+ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
-+ * and the Wolfson card driver by Nikesh Oswal, <Nikesh.Oswal@wolfsonmicro.com>
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/i2c.h>
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+#include <sound/soc-dapm.h>
-+#include <sound/tlv.h>
-+#include <linux/regulator/consumer.h>
-+
-+#include "../codecs/wm8804.h"
-+#include "../codecs/wm8741.h"
-+
-+#define WM8741_NUM_SUPPLIES 2
-+
-+/* codec private data */
-+struct wm8741_priv {
-+ struct wm8741_platform_data pdata;
-+ struct regmap *regmap;
-+ struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
-+ unsigned int sysclk;
-+ const struct snd_pcm_hw_constraint_list *sysclk_constraints;
-+};
-+
-+static int samplerate = 44100;
-+
-+/* New Alsa Controls not exposed by original wm8741 codec driver */
-+/* in actual driver the att. adjustment is wrong because */
-+/* this DAC has a coarse attenuation register with 4dB steps */
-+/* and a fine level register with 0.125dB steps */
-+/* each register has 32 steps so combining both we have 1024 steps */
-+/* of 0.125 dB. */
-+/* The original level controls from driver are removed at startup */
-+/* and replaced by the corrected ones. */
-+/* The same wm8741 driver can be used for wm8741 and wm8742 devices */
-+
-+static const DECLARE_TLV_DB_SCALE(dac_tlv_fine, 0, 13, 0);
-+static const DECLARE_TLV_DB_SCALE(dac_tlv_coarse, -12700, 400, 1);
-+static const char *w8741_dither[4] = {"Off", "RPDF", "TPDF", "HPDF"};
-+static const char *w8741_filter[5] = {
-+ "Type 1", "Type 2", "Type 3", "Type 4", "Type 5"};
-+static const char *w8741_switch[2] = {"Off", "On"};
-+static const struct soc_enum w8741_enum[] = {
-+SOC_ENUM_SINGLE(WM8741_MODE_CONTROL_2, 0, 4, w8741_dither),/* dithering type */
-+SOC_ENUM_SINGLE(WM8741_FILTER_CONTROL, 0, 5, w8741_filter),/* filter type */
-+SOC_ENUM_SINGLE(WM8741_FORMAT_CONTROL, 6, 2, w8741_switch),/* phase invert */
-+SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 0, 2, w8741_switch),/* volume ramp */
-+SOC_ENUM_SINGLE(WM8741_VOLUME_CONTROL, 3, 2, w8741_switch),/* soft mute */
-+};
-+
-+static const struct snd_kcontrol_new w8741_snd_controls_stereo[] = {
-+SOC_DOUBLE_R_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
-+ WM8741_DACRLSB_ATTENUATION, 0, 31, 1, dac_tlv_fine),
-+SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
-+ WM8741_DACRMSB_ATTENUATION, 0, 31, 1, dac_tlv_coarse),
-+SOC_ENUM("DAC Dither", w8741_enum[0]),
-+SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
-+SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
-+SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
-+SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
-+};
-+
-+static const struct snd_kcontrol_new w8741_snd_controls_mono_left[] = {
-+SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACLLSB_ATTENUATION,
-+ 0, 31, 0, dac_tlv_fine),
-+SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACLMSB_ATTENUATION,
-+ 0, 31, 1, dac_tlv_coarse),
-+SOC_ENUM("DAC Dither", w8741_enum[0]),
-+SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
-+SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
-+SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
-+SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
-+};
-+
-+static const struct snd_kcontrol_new w8741_snd_controls_mono_right[] = {
-+SOC_SINGLE_TLV("DAC Fine Playback Volume", WM8741_DACRLSB_ATTENUATION,
-+ 0, 31, 0, dac_tlv_fine),
-+SOC_SINGLE_TLV("Digital Playback Volume", WM8741_DACRMSB_ATTENUATION,
-+ 0, 31, 1, dac_tlv_coarse),
-+SOC_ENUM("DAC Dither", w8741_enum[0]),
-+SOC_ENUM("DAC Digital Filter", w8741_enum[1]),
-+SOC_ENUM("DAC Phase Invert", w8741_enum[2]),
-+SOC_ENUM("DAC Volume Ramp", w8741_enum[3]),
-+SOC_ENUM("DAC Soft Mute", w8741_enum[4]),
-+};
-+
-+static int w8741_add_controls(struct snd_soc_codec *codec)
-+{
-+ struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
-+
-+ switch (wm8741->pdata.diff_mode) {
-+ case WM8741_DIFF_MODE_STEREO:
-+ case WM8741_DIFF_MODE_STEREO_REVERSED:
-+ snd_soc_add_codec_controls(codec,
-+ w8741_snd_controls_stereo,
-+ ARRAY_SIZE(w8741_snd_controls_stereo));
-+ break;
-+ case WM8741_DIFF_MODE_MONO_LEFT:
-+ snd_soc_add_codec_controls(codec,
-+ w8741_snd_controls_mono_left,
-+ ARRAY_SIZE(w8741_snd_controls_mono_left));
-+ break;
-+ case WM8741_DIFF_MODE_MONO_RIGHT:
-+ snd_soc_add_codec_controls(codec,
-+ w8741_snd_controls_mono_right,
-+ ARRAY_SIZE(w8741_snd_controls_mono_right));
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+static int digidac1_soundcard_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_card *card = rtd->card;
-+ struct snd_soc_pcm_runtime *wm8741_rtd;
-+ struct snd_soc_codec *wm8741_codec;
-+ struct snd_card *sound_card = card->snd_card;
-+ struct snd_kcontrol *kctl;
-+ int ret;
-+
-+ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
-+ if (!wm8741_rtd) {
-+ dev_warn(card->dev, "digidac1_soundcard_init: couldn't get wm8741 rtd\n");
-+ return -EFAULT;
-+ }
-+ wm8741_codec = wm8741_rtd->codec;
-+ ret = w8741_add_controls(wm8741_codec);
-+ if (ret < 0)
-+ dev_warn(card->dev, "Failed to add new wm8741 controls: %d\n",
-+ ret);
-+
-+ /* enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ kctl = snd_soc_card_get_kcontrol(card,
-+ "Playback Volume");
-+ if (kctl) {
-+ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
-+ snd_ctl_remove(sound_card, kctl);
-+ }
-+ kctl = snd_soc_card_get_kcontrol(card,
-+ "Fine Playback Volume");
-+ if (kctl) {
-+ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
-+ snd_ctl_remove(sound_card, kctl);
-+ }
-+ return 0;
-+}
-+
-+static int digidac1_soundcard_startup(struct snd_pcm_substream *substream)
-+{
-+ /* turn on wm8804 digital output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_card *card = rtd->card;
-+ struct snd_soc_pcm_runtime *wm8741_rtd;
-+ struct snd_soc_codec *wm8741_codec;
-+
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-+ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
-+ if (!wm8741_rtd) {
-+ dev_warn(card->dev, "digidac1_soundcard_startup: couldn't get WM8741 rtd\n");
-+ return -EFAULT;
-+ }
-+ wm8741_codec = wm8741_rtd->codec;
-+
-+ /* latch wm8741 level */
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACLLSB_ATTENUATION,
-+ WM8741_UPDATELL, WM8741_UPDATELL);
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACLMSB_ATTENUATION,
-+ WM8741_UPDATELM, WM8741_UPDATELM);
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACRLSB_ATTENUATION,
-+ WM8741_UPDATERL, WM8741_UPDATERL);
-+ snd_soc_update_bits(wm8741_codec, WM8741_DACRMSB_ATTENUATION,
-+ WM8741_UPDATERM, WM8741_UPDATERM);
-+
-+ return 0;
-+}
-+
-+static void digidac1_soundcard_shutdown(struct snd_pcm_substream *substream)
-+{
-+ /* turn off wm8804 digital output */
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
-+}
-+
-+static int digidac1_soundcard_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+ struct snd_soc_card *card = rtd->card;
-+ struct snd_soc_pcm_runtime *wm8741_rtd;
-+ struct snd_soc_codec *wm8741_codec;
-+
-+ int sysclk = 27000000;
-+ long mclk_freq = 0;
-+ int mclk_div = 1;
-+ int sampling_freq = 1;
-+ int ret;
-+
-+ wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name);
-+ if (!wm8741_rtd) {
-+ dev_warn(card->dev, "digidac1_soundcard_hw_params: couldn't get WM8741 rtd\n");
-+ return -EFAULT;
-+ }
-+ wm8741_codec = wm8741_rtd->codec;
-+ samplerate = params_rate(params);
-+
-+ if (samplerate <= 96000) {
-+ mclk_freq = samplerate*256;
-+ mclk_div = WM8804_MCLKDIV_256FS;
-+ } else {
-+ mclk_freq = samplerate*128;
-+ mclk_div = WM8804_MCLKDIV_128FS;
-+ }
-+
-+ switch (samplerate) {
-+ case 32000:
-+ sampling_freq = 0x03;
-+ break;
-+ case 44100:
-+ sampling_freq = 0x00;
-+ break;
-+ case 48000:
-+ sampling_freq = 0x02;
-+ break;
-+ case 88200:
-+ sampling_freq = 0x08;
-+ break;
-+ case 96000:
-+ sampling_freq = 0x0a;
-+ break;
-+ case 176400:
-+ sampling_freq = 0x0c;
-+ break;
-+ case 192000:
-+ sampling_freq = 0x0e;
-+ break;
-+ default:
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-+ samplerate);
-+ }
-+
-+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
-+
-+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-+ sysclk, SND_SOC_CLOCK_OUT);
-+ if (ret < 0) {
-+ dev_err(codec->dev,
-+ "Failed to set WM8804 SYSCLK: %d\n", ret);
-+ return ret;
-+ }
-+ /* Enable wm8804 TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ /* wm8804 Power on */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
-+
-+ /* wm8804 set sampling frequency status bits */
-+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
-+
-+ /* Now update wm8741 registers for the correct oversampling */
-+ if (samplerate <= 48000)
-+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
-+ WM8741_OSR_MASK, 0x00);
-+ else if (samplerate <= 96000)
-+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
-+ WM8741_OSR_MASK, 0x20);
-+ else
-+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1,
-+ WM8741_OSR_MASK, 0x40);
-+
-+ /* wm8741 bit size */
-+ switch (params_width(params)) {
-+ case 16:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x00);
-+ break;
-+ case 20:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x01);
-+ break;
-+ case 24:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x02);
-+ break;
-+ case 32:
-+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL,
-+ WM8741_IWL_MASK, 0x03);
-+ break;
-+ default:
-+ dev_dbg(codec->dev, "wm8741_hw_params: Unsupported bit size param = %d",
-+ params_width(params));
-+ return -EINVAL;
-+ }
-+
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
-+}
-+/* machine stream operations */
-+static struct snd_soc_ops digidac1_soundcard_ops = {
-+ .hw_params = digidac1_soundcard_hw_params,
-+ .startup = digidac1_soundcard_startup,
-+ .shutdown = digidac1_soundcard_shutdown,
-+};
-+
-+static struct snd_soc_dai_link digidac1_soundcard_dai[] = {
-+ {
-+ .name = "RRA DigiDAC1",
-+ .stream_name = "RRA DigiDAC1 HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "wm8804-spdif",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "wm8804.1-003b",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBM_CFM,
-+ .ops = &digidac1_soundcard_ops,
-+ .init = digidac1_soundcard_init,
-+ },
-+ {
-+ .name = "RRA DigiDAC11",
-+ .stream_name = "RRA DigiDAC11 HiFi",
-+ .cpu_dai_name = "wm8804-spdif",
-+ .codec_dai_name = "wm8741",
-+ .codec_name = "wm8741.1-001a",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S
-+ | SND_SOC_DAIFMT_NB_NF
-+ | SND_SOC_DAIFMT_CBS_CFS,
-+ },
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card digidac1_soundcard = {
-+ .name = "digidac1-soundcard",
-+ .owner = THIS_MODULE,
-+ .dai_link = digidac1_soundcard_dai,
-+ .num_links = ARRAY_SIZE(digidac1_soundcard_dai),
-+};
-+
-+static int digidac1_soundcard_probe(struct platform_device *pdev)
-+{
-+ int ret = 0;
-+
-+ digidac1_soundcard.dev = &pdev->dev;
-+
-+ if (pdev->dev.of_node) {
-+ struct device_node *i2s_node;
-+ struct snd_soc_dai_link *dai = &digidac1_soundcard_dai[0];
-+
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+ }
-+
-+ ret = snd_soc_register_card(&digidac1_soundcard);
-+ if (ret)
-+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
-+ ret);
-+
-+ return ret;
-+}
-+
-+static int digidac1_soundcard_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&digidac1_soundcard);
-+}
-+
-+static const struct of_device_id digidac1_soundcard_of_match[] = {
-+ { .compatible = "rra,digidac1-soundcard", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, digidac1_soundcard_of_match);
-+
-+static struct platform_driver digidac1_soundcard_driver = {
-+ .driver = {
-+ .name = "digidac1-audio",
-+ .owner = THIS_MODULE,
-+ .of_match_table = digidac1_soundcard_of_match,
-+ },
-+ .probe = digidac1_soundcard_probe,
-+ .remove = digidac1_soundcard_remove,
-+};
-+
-+module_platform_driver(digidac1_soundcard_driver);
-+
-+MODULE_AUTHOR("José M. Tasende <vintage@redrocksaudio.es>");
-+MODULE_DESCRIPTION("ASoC Driver for RRA DigiDAC1");
-+MODULE_LICENSE("GPL v2");
--- /dev/null
+From 8d2b378035000b56c9ac7964c7000e9cd7679c01 Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <6by9@users.noreply.github.com>
+Date: Wed, 25 May 2016 23:25:36 +0100
+Subject: [PATCH] BCM2835-V4L2: Correct handling for BGR24 vs RGB24.
+
+There was a bug in the GPU firmware that had reversed these
+two formats.
+Detect the old firmware, and reverse the formats if necessary.
+
+Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 69 ++++++++++++++++++-------
+ drivers/media/platform/bcm2835/bcm2835-camera.h | 1 +
+ 2 files changed, 52 insertions(+), 18 deletions(-)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -115,7 +115,7 @@ static struct mmal_fmt formats[] = {
+ .name = "RGB24 (LE)",
+ .fourcc = V4L2_PIX_FMT_RGB24,
+ .flags = 0,
+- .mmal = MMAL_ENCODING_BGR24,
++ .mmal = MMAL_ENCODING_RGB24,
+ .depth = 24,
+ .mmal_component = MMAL_COMPONENT_CAMERA,
+ .ybbp = 3,
+@@ -187,7 +187,7 @@ static struct mmal_fmt formats[] = {
+ .name = "RGB24 (BE)",
+ .fourcc = V4L2_PIX_FMT_BGR24,
+ .flags = 0,
+- .mmal = MMAL_ENCODING_RGB24,
++ .mmal = MMAL_ENCODING_BGR24,
+ .depth = 24,
+ .mmal_component = MMAL_COMPONENT_CAMERA,
+ .ybbp = 3,
+@@ -1059,6 +1059,13 @@ static int mmal_setup_components(struct
+ else
+ camera_port->format.encoding = mfmt->mmal;
+
++ if (dev->rgb_bgr_swapped) {
++ if (camera_port->format.encoding == MMAL_ENCODING_RGB24)
++ camera_port->format.encoding = MMAL_ENCODING_BGR24;
++ else if (camera_port->format.encoding == MMAL_ENCODING_BGR24)
++ camera_port->format.encoding = MMAL_ENCODING_RGB24;
++ }
++
+ camera_port->format.encoding_variant = 0;
+ camera_port->es.video.width = f->fmt.pix.width;
+ camera_port->es.video.height = f->fmt.pix.height;
+@@ -1569,12 +1576,17 @@ static int set_camera_parameters(struct
+ return ret;
+ }
+
++#define MAX_SUPPORTED_ENCODINGS 20
++
+ /* MMAL instance and component init */
+ static int __init mmal_init(struct bm2835_mmal_dev *dev)
+ {
+ int ret;
+ struct mmal_es_format *format;
+ u32 bool_true = 1;
++ u32 supported_encodings[MAX_SUPPORTED_ENCODINGS];
++ int param_size;
++ struct vchiq_mmal_component *camera;
+
+ ret = vchiq_mmal_init(&dev->instance);
+ if (ret < 0)
+@@ -1586,21 +1598,48 @@ static int __init mmal_init(struct bm283
+ if (ret < 0)
+ goto unreg_mmal;
+
+- if (dev->component[MMAL_COMPONENT_CAMERA]->outputs <
+- MMAL_CAMERA_PORT_COUNT) {
++ camera = dev->component[MMAL_COMPONENT_CAMERA];
++ if (camera->outputs < MMAL_CAMERA_PORT_COUNT) {
+ ret = -EINVAL;
+ goto unreg_camera;
+ }
+
+ ret = set_camera_parameters(dev->instance,
+- dev->component[MMAL_COMPONENT_CAMERA],
++ camera,
+ dev);
+ if (ret < 0)
+ goto unreg_camera;
+
+- format =
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_PREVIEW].format;
++ /* There was an error in the firmware that meant the camera component
++ * produced BGR instead of RGB.
++ * This is now fixed, but in order to support the old firmwares, we
++ * have to check.
++ */
++ dev->rgb_bgr_swapped = true;
++ param_size = sizeof(supported_encodings);
++ ret = vchiq_mmal_port_parameter_get(dev->instance,
++ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
++ MMAL_PARAMETER_SUPPORTED_ENCODINGS,
++ &supported_encodings,
++ ¶m_size);
++ if (ret == 0) {
++ int i;
++
++ for (i = 0; i < param_size/sizeof(u32); i++) {
++ if (supported_encodings[i] == MMAL_ENCODING_BGR24) {
++ /* Found BGR24 first - old firmware. */
++ break;
++ }
++ if (supported_encodings[i] == MMAL_ENCODING_RGB24) {
++ /* Found RGB24 first
++ * new firmware, so use RGB24.
++ */
++ dev->rgb_bgr_swapped = false;
++ break;
++ }
++ }
++ }
++ format = &camera->output[MMAL_CAMERA_PORT_PREVIEW].format;
+
+ format->encoding = MMAL_ENCODING_OPAQUE;
+ format->encoding_variant = MMAL_ENCODING_I420;
+@@ -1614,9 +1653,7 @@ static int __init mmal_init(struct bm283
+ format->es->video.frame_rate.num = 0; /* Rely on fps_range */
+ format->es->video.frame_rate.den = 1;
+
+- format =
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_VIDEO].format;
++ format = &camera->output[MMAL_CAMERA_PORT_VIDEO].format;
+
+ format->encoding = MMAL_ENCODING_OPAQUE;
+ format->encoding_variant = MMAL_ENCODING_I420;
+@@ -1631,14 +1668,11 @@ static int __init mmal_init(struct bm283
+ format->es->video.frame_rate.den = 1;
+
+ vchiq_mmal_port_parameter_set(dev->instance,
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_VIDEO],
++ &camera->output[MMAL_CAMERA_PORT_VIDEO],
+ MMAL_PARAMETER_NO_IMAGE_PADDING,
+ &bool_true, sizeof(bool_true));
+
+- format =
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_CAPTURE].format;
++ format = &camera->output[MMAL_CAMERA_PORT_CAPTURE].format;
+
+ format->encoding = MMAL_ENCODING_OPAQUE;
+
+@@ -1660,8 +1694,7 @@ static int __init mmal_init(struct bm283
+ dev->capture.enc_level = V4L2_MPEG_VIDEO_H264_LEVEL_4_0;
+
+ vchiq_mmal_port_parameter_set(dev->instance,
+- &dev->component[MMAL_COMPONENT_CAMERA]->
+- output[MMAL_CAMERA_PORT_CAPTURE],
++ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
+ MMAL_PARAMETER_NO_IMAGE_PADDING,
+ &bool_true, sizeof(bool_true));
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.h
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.h
+@@ -109,6 +109,7 @@ struct bm2835_mmal_dev {
+ unsigned int camera_num;
+ unsigned int max_width;
+ unsigned int max_height;
++ unsigned int rgb_bgr_swapped;
+ };
+
+ int bm2835_mmal_init_controls(
--- /dev/null
+From 12dd94a6587b4d327216d12675e3691e0f4316aa Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 3 Jun 2016 22:21:47 +0100
+Subject: [PATCH] BCM270X_DT: Add mcp23017 to the overlay Makefile
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -44,6 +44,7 @@ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacpl
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
+++ /dev/null
-From 1fa221e0909bc0052bdc8b458fb31e8a088e7723 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <6by9@users.noreply.github.com>
-Date: Wed, 25 May 2016 23:25:36 +0100
-Subject: [PATCH] BCM2835-V4L2: Correct handling for BGR24 vs RGB24.
-
-There was a bug in the GPU firmware that had reversed these
-two formats.
-Detect the old firmware, and reverse the formats if necessary.
-
-Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com>
----
- drivers/media/platform/bcm2835/bcm2835-camera.c | 69 ++++++++++++++++++-------
- drivers/media/platform/bcm2835/bcm2835-camera.h | 1 +
- 2 files changed, 52 insertions(+), 18 deletions(-)
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.c
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
-@@ -115,7 +115,7 @@ static struct mmal_fmt formats[] = {
- .name = "RGB24 (LE)",
- .fourcc = V4L2_PIX_FMT_RGB24,
- .flags = 0,
-- .mmal = MMAL_ENCODING_BGR24,
-+ .mmal = MMAL_ENCODING_RGB24,
- .depth = 24,
- .mmal_component = MMAL_COMPONENT_CAMERA,
- .ybbp = 3,
-@@ -187,7 +187,7 @@ static struct mmal_fmt formats[] = {
- .name = "RGB24 (BE)",
- .fourcc = V4L2_PIX_FMT_BGR24,
- .flags = 0,
-- .mmal = MMAL_ENCODING_RGB24,
-+ .mmal = MMAL_ENCODING_BGR24,
- .depth = 24,
- .mmal_component = MMAL_COMPONENT_CAMERA,
- .ybbp = 3,
-@@ -1059,6 +1059,13 @@ static int mmal_setup_components(struct
- else
- camera_port->format.encoding = mfmt->mmal;
-
-+ if (dev->rgb_bgr_swapped) {
-+ if (camera_port->format.encoding == MMAL_ENCODING_RGB24)
-+ camera_port->format.encoding = MMAL_ENCODING_BGR24;
-+ else if (camera_port->format.encoding == MMAL_ENCODING_BGR24)
-+ camera_port->format.encoding = MMAL_ENCODING_RGB24;
-+ }
-+
- camera_port->format.encoding_variant = 0;
- camera_port->es.video.width = f->fmt.pix.width;
- camera_port->es.video.height = f->fmt.pix.height;
-@@ -1569,12 +1576,17 @@ static int set_camera_parameters(struct
- return ret;
- }
-
-+#define MAX_SUPPORTED_ENCODINGS 20
-+
- /* MMAL instance and component init */
- static int __init mmal_init(struct bm2835_mmal_dev *dev)
- {
- int ret;
- struct mmal_es_format *format;
- u32 bool_true = 1;
-+ u32 supported_encodings[MAX_SUPPORTED_ENCODINGS];
-+ int param_size;
-+ struct vchiq_mmal_component *camera;
-
- ret = vchiq_mmal_init(&dev->instance);
- if (ret < 0)
-@@ -1586,21 +1598,48 @@ static int __init mmal_init(struct bm283
- if (ret < 0)
- goto unreg_mmal;
-
-- if (dev->component[MMAL_COMPONENT_CAMERA]->outputs <
-- MMAL_CAMERA_PORT_COUNT) {
-+ camera = dev->component[MMAL_COMPONENT_CAMERA];
-+ if (camera->outputs < MMAL_CAMERA_PORT_COUNT) {
- ret = -EINVAL;
- goto unreg_camera;
- }
-
- ret = set_camera_parameters(dev->instance,
-- dev->component[MMAL_COMPONENT_CAMERA],
-+ camera,
- dev);
- if (ret < 0)
- goto unreg_camera;
-
-- format =
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_PREVIEW].format;
-+ /* There was an error in the firmware that meant the camera component
-+ * produced BGR instead of RGB.
-+ * This is now fixed, but in order to support the old firmwares, we
-+ * have to check.
-+ */
-+ dev->rgb_bgr_swapped = true;
-+ param_size = sizeof(supported_encodings);
-+ ret = vchiq_mmal_port_parameter_get(dev->instance,
-+ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
-+ MMAL_PARAMETER_SUPPORTED_ENCODINGS,
-+ &supported_encodings,
-+ ¶m_size);
-+ if (ret == 0) {
-+ int i;
-+
-+ for (i = 0; i < param_size/sizeof(u32); i++) {
-+ if (supported_encodings[i] == MMAL_ENCODING_BGR24) {
-+ /* Found BGR24 first - old firmware. */
-+ break;
-+ }
-+ if (supported_encodings[i] == MMAL_ENCODING_RGB24) {
-+ /* Found RGB24 first
-+ * new firmware, so use RGB24.
-+ */
-+ dev->rgb_bgr_swapped = false;
-+ break;
-+ }
-+ }
-+ }
-+ format = &camera->output[MMAL_CAMERA_PORT_PREVIEW].format;
-
- format->encoding = MMAL_ENCODING_OPAQUE;
- format->encoding_variant = MMAL_ENCODING_I420;
-@@ -1614,9 +1653,7 @@ static int __init mmal_init(struct bm283
- format->es->video.frame_rate.num = 0; /* Rely on fps_range */
- format->es->video.frame_rate.den = 1;
-
-- format =
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_VIDEO].format;
-+ format = &camera->output[MMAL_CAMERA_PORT_VIDEO].format;
-
- format->encoding = MMAL_ENCODING_OPAQUE;
- format->encoding_variant = MMAL_ENCODING_I420;
-@@ -1631,14 +1668,11 @@ static int __init mmal_init(struct bm283
- format->es->video.frame_rate.den = 1;
-
- vchiq_mmal_port_parameter_set(dev->instance,
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_VIDEO],
-+ &camera->output[MMAL_CAMERA_PORT_VIDEO],
- MMAL_PARAMETER_NO_IMAGE_PADDING,
- &bool_true, sizeof(bool_true));
-
-- format =
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_CAPTURE].format;
-+ format = &camera->output[MMAL_CAMERA_PORT_CAPTURE].format;
-
- format->encoding = MMAL_ENCODING_OPAQUE;
-
-@@ -1660,8 +1694,7 @@ static int __init mmal_init(struct bm283
- dev->capture.enc_level = V4L2_MPEG_VIDEO_H264_LEVEL_4_0;
-
- vchiq_mmal_port_parameter_set(dev->instance,
-- &dev->component[MMAL_COMPONENT_CAMERA]->
-- output[MMAL_CAMERA_PORT_CAPTURE],
-+ &camera->output[MMAL_CAMERA_PORT_CAPTURE],
- MMAL_PARAMETER_NO_IMAGE_PADDING,
- &bool_true, sizeof(bool_true));
-
---- a/drivers/media/platform/bcm2835/bcm2835-camera.h
-+++ b/drivers/media/platform/bcm2835/bcm2835-camera.h
-@@ -109,6 +109,7 @@ struct bm2835_mmal_dev {
- unsigned int camera_num;
- unsigned int max_width;
- unsigned int max_height;
-+ unsigned int rgb_bgr_swapped;
- };
-
- int bm2835_mmal_init_controls(
+++ /dev/null
-From b7cd83145ba0f51721715034135a6c396dff9522 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 3 Jun 2016 22:21:47 +0100
-Subject: [PATCH] BCM270X_DT: Add mcp23017 to the overlay Makefile
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -44,6 +44,7 @@ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacpl
- dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
--- /dev/null
+From d42e78e55dcd757dc2002675d9266bc17f903900 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 3 Jun 2016 23:01:01 +0100
+Subject: [PATCH] BCM270X_DT: Sort entries to placate check script
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -18,10 +18,10 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += enc28j60.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += gpio-ir.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += gpio-poweroff.dtbo
+@@ -31,10 +31,10 @@ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dac
+ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-mux.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31.dtbo
+@@ -73,16 +73,16 @@ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdtweak.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-3cs.dtbo
+-dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += tinylcd35.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += uart1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += vc4-kms-v3d.dtbo
+++ /dev/null
-From 847d6f110dcd6b95120fc224cd71151464990f56 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 3 Jun 2016 23:01:01 +0100
-Subject: [PATCH] BCM270X_DT: Sort entries to placate check script
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -18,10 +18,10 @@ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqd
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += enc28j60.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += gpio-ir.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += gpio-poweroff.dtbo
-@@ -31,10 +31,10 @@ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dac
- dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-mux.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-pwm-pca9685a.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += i2c-rtc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c0-bcm2708.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c1-bcm2708.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31.dtbo
-@@ -73,16 +73,16 @@ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdtweak.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi2-1cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi2-2cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi2-3cs.dtbo
--dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += tinylcd35.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += uart1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += vc4-kms-v3d.dtbo
--- /dev/null
+From ac88474b485e297429614c8544e779d9329d2851 Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Sat, 4 Jun 2016 11:30:48 +0200
+Subject: [PATCH] gpio-ir overlay: gpio_pin shouldn't change pull setting
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+---
+ arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
++++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
+@@ -36,8 +36,7 @@
+ __overrides__ {
+ // parameters
+ gpio_pin = <&gpio_ir>,"gpios:4",
+- <&gpio_ir_pins>,"brcm,pins:0",
+- <&gpio_ir_pins>,"brcm,pull:0"; // pin number
++ <&gpio_ir_pins>,"brcm,pins:0"; // pin number
+ gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
+
+ rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
+++ /dev/null
-From 61702c8c68510797341356d03cf63380190afea9 Mon Sep 17 00:00:00 2001
-From: Matthias Reichl <hias@horus.com>
-Date: Sat, 4 Jun 2016 11:30:48 +0200
-Subject: [PATCH] gpio-ir overlay: gpio_pin shouldn't change pull setting
-
-Signed-off-by: Matthias Reichl <hias@horus.com>
----
- arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
-@@ -36,8 +36,7 @@
- __overrides__ {
- // parameters
- gpio_pin = <&gpio_ir>,"gpios:4",
-- <&gpio_ir_pins>,"brcm,pins:0",
-- <&gpio_ir_pins>,"brcm,pull:0"; // pin number
-+ <&gpio_ir_pins>,"brcm,pins:0"; // pin number
- gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
-
- rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
--- /dev/null
+From f3331b8d48456a8113abbaf1985a0ca50e4d17a3 Mon Sep 17 00:00:00 2001
+From: Eric Nelson <eric@nelint.com>
+Date: Sat, 3 Oct 2015 08:18:50 -0700
+Subject: [PATCH] [media] rc-core: define a default timeout for drivers
+
+A default timeout value of 125 ms should work for all decoders.
+
+Declare a constant to help standardize its' use.
+
+Signed-off-by: Eric Nelson <eric@nelint.com>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+---
+ include/media/rc-core.h | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/include/media/rc-core.h
++++ b/include/media/rc-core.h
+@@ -239,6 +239,7 @@ static inline void init_ir_raw_event(str
+ memset(ev, 0, sizeof(*ev));
+ }
+
++#define IR_DEFAULT_TIMEOUT MS_TO_NS(125)
+ #define IR_MAX_DURATION 500000000 /* 500 ms */
+ #define US_TO_NS(usec) ((usec) * 1000)
+ #define MS_TO_US(msec) ((msec) * 1000)
+++ /dev/null
-From 3d63c720f92caf1f3870154739bf9770eab06b9a Mon Sep 17 00:00:00 2001
-From: Eric Nelson <eric@nelint.com>
-Date: Sat, 3 Oct 2015 08:18:50 -0700
-Subject: [PATCH] [media] rc-core: define a default timeout for drivers
-
-A default timeout value of 125 ms should work for all decoders.
-
-Declare a constant to help standardize its' use.
-
-Signed-off-by: Eric Nelson <eric@nelint.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- include/media/rc-core.h | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/include/media/rc-core.h
-+++ b/include/media/rc-core.h
-@@ -239,6 +239,7 @@ static inline void init_ir_raw_event(str
- memset(ev, 0, sizeof(*ev));
- }
-
-+#define IR_DEFAULT_TIMEOUT MS_TO_NS(125)
- #define IR_MAX_DURATION 500000000 /* 500 ms */
- #define US_TO_NS(usec) ((usec) * 1000)
- #define MS_TO_US(msec) ((msec) * 1000)
--- /dev/null
+From 0cb8bcc4bbdb393d9f8ffa3b81eb09c4f1628be9 Mon Sep 17 00:00:00 2001
+From: Eric Nelson <eric@nelint.com>
+Date: Wed, 23 Sep 2015 11:07:08 -0300
+Subject: [PATCH] [media] rc: gpio-ir-recv: add timeout on idle
+
+Many decoders require a trailing space (period without IR illumination)
+to be delivered before completing a decode.
+
+Since the gpio-ir-recv driver only delivers events on gpio transitions,
+a single IR symbol (caused by a quick touch on an IR remote) will not
+be properly decoded without the use of a timer to flush the tail end
+state of the IR receiver.
+
+This patch initializes and uses a timer and the timeout field of rcdev
+to complete the stream and allow decode.
+
+The timeout can be overridden through the use of the LIRC_SET_REC_TIMEOUT
+ioctl.
+
+Signed-off-by: Eric Nelson <eric@nelint.com>
+Acked-by: Sean Young <sean@mess.org>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+---
+ drivers/media/rc/gpio-ir-recv.c | 22 ++++++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+--- a/drivers/media/rc/gpio-ir-recv.c
++++ b/drivers/media/rc/gpio-ir-recv.c
+@@ -30,6 +30,7 @@ struct gpio_rc_dev {
+ struct rc_dev *rcdev;
+ int gpio_nr;
+ bool active_low;
++ struct timer_list flush_timer;
+ };
+
+ #ifdef CONFIG_OF
+@@ -93,12 +94,26 @@ static irqreturn_t gpio_ir_recv_irq(int
+ if (rc < 0)
+ goto err_get_value;
+
++ mod_timer(&gpio_dev->flush_timer,
++ jiffies + nsecs_to_jiffies(gpio_dev->rcdev->timeout));
++
+ ir_raw_event_handle(gpio_dev->rcdev);
+
+ err_get_value:
+ return IRQ_HANDLED;
+ }
+
++static void flush_timer(unsigned long arg)
++{
++ struct gpio_rc_dev *gpio_dev = (struct gpio_rc_dev *)arg;
++ DEFINE_IR_RAW_EVENT(ev);
++
++ ev.timeout = true;
++ ev.duration = gpio_dev->rcdev->timeout;
++ ir_raw_event_store(gpio_dev->rcdev, &ev);
++ ir_raw_event_handle(gpio_dev->rcdev);
++}
++
+ static int gpio_ir_recv_probe(struct platform_device *pdev)
+ {
+ struct gpio_rc_dev *gpio_dev;
+@@ -144,6 +159,9 @@ static int gpio_ir_recv_probe(struct pla
+ rcdev->input_id.version = 0x0100;
+ rcdev->dev.parent = &pdev->dev;
+ rcdev->driver_name = GPIO_IR_DRIVER_NAME;
++ rcdev->min_timeout = 0;
++ rcdev->timeout = IR_DEFAULT_TIMEOUT;
++ rcdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
+ if (pdata->allowed_protos)
+ rcdev->allowed_protocols = pdata->allowed_protos;
+ else
+@@ -154,6 +172,9 @@ static int gpio_ir_recv_probe(struct pla
+ gpio_dev->gpio_nr = pdata->gpio_nr;
+ gpio_dev->active_low = pdata->active_low;
+
++ setup_timer(&gpio_dev->flush_timer, flush_timer,
++ (unsigned long)gpio_dev);
++
+ rc = gpio_request(pdata->gpio_nr, "gpio-ir-recv");
+ if (rc < 0)
+ goto err_gpio_request;
+@@ -196,6 +217,7 @@ static int gpio_ir_recv_remove(struct pl
+ struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
+
+ free_irq(gpio_to_irq(gpio_dev->gpio_nr), gpio_dev);
++ del_timer_sync(&gpio_dev->flush_timer);
+ rc_unregister_device(gpio_dev->rcdev);
+ gpio_free(gpio_dev->gpio_nr);
+ kfree(gpio_dev);
+++ /dev/null
-From ae20f89a35806322a318195e1067ddd9ca8b7eb8 Mon Sep 17 00:00:00 2001
-From: Eric Nelson <eric@nelint.com>
-Date: Wed, 23 Sep 2015 11:07:08 -0300
-Subject: [PATCH] [media] rc: gpio-ir-recv: add timeout on idle
-
-Many decoders require a trailing space (period without IR illumination)
-to be delivered before completing a decode.
-
-Since the gpio-ir-recv driver only delivers events on gpio transitions,
-a single IR symbol (caused by a quick touch on an IR remote) will not
-be properly decoded without the use of a timer to flush the tail end
-state of the IR receiver.
-
-This patch initializes and uses a timer and the timeout field of rcdev
-to complete the stream and allow decode.
-
-The timeout can be overridden through the use of the LIRC_SET_REC_TIMEOUT
-ioctl.
-
-Signed-off-by: Eric Nelson <eric@nelint.com>
-Acked-by: Sean Young <sean@mess.org>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- drivers/media/rc/gpio-ir-recv.c | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
---- a/drivers/media/rc/gpio-ir-recv.c
-+++ b/drivers/media/rc/gpio-ir-recv.c
-@@ -30,6 +30,7 @@ struct gpio_rc_dev {
- struct rc_dev *rcdev;
- int gpio_nr;
- bool active_low;
-+ struct timer_list flush_timer;
- };
-
- #ifdef CONFIG_OF
-@@ -93,12 +94,26 @@ static irqreturn_t gpio_ir_recv_irq(int
- if (rc < 0)
- goto err_get_value;
-
-+ mod_timer(&gpio_dev->flush_timer,
-+ jiffies + nsecs_to_jiffies(gpio_dev->rcdev->timeout));
-+
- ir_raw_event_handle(gpio_dev->rcdev);
-
- err_get_value:
- return IRQ_HANDLED;
- }
-
-+static void flush_timer(unsigned long arg)
-+{
-+ struct gpio_rc_dev *gpio_dev = (struct gpio_rc_dev *)arg;
-+ DEFINE_IR_RAW_EVENT(ev);
-+
-+ ev.timeout = true;
-+ ev.duration = gpio_dev->rcdev->timeout;
-+ ir_raw_event_store(gpio_dev->rcdev, &ev);
-+ ir_raw_event_handle(gpio_dev->rcdev);
-+}
-+
- static int gpio_ir_recv_probe(struct platform_device *pdev)
- {
- struct gpio_rc_dev *gpio_dev;
-@@ -144,6 +159,9 @@ static int gpio_ir_recv_probe(struct pla
- rcdev->input_id.version = 0x0100;
- rcdev->dev.parent = &pdev->dev;
- rcdev->driver_name = GPIO_IR_DRIVER_NAME;
-+ rcdev->min_timeout = 0;
-+ rcdev->timeout = IR_DEFAULT_TIMEOUT;
-+ rcdev->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
- if (pdata->allowed_protos)
- rcdev->allowed_protocols = pdata->allowed_protos;
- else
-@@ -154,6 +172,9 @@ static int gpio_ir_recv_probe(struct pla
- gpio_dev->gpio_nr = pdata->gpio_nr;
- gpio_dev->active_low = pdata->active_low;
-
-+ setup_timer(&gpio_dev->flush_timer, flush_timer,
-+ (unsigned long)gpio_dev);
-+
- rc = gpio_request(pdata->gpio_nr, "gpio-ir-recv");
- if (rc < 0)
- goto err_gpio_request;
-@@ -196,6 +217,7 @@ static int gpio_ir_recv_remove(struct pl
- struct gpio_rc_dev *gpio_dev = platform_get_drvdata(pdev);
-
- free_irq(gpio_to_irq(gpio_dev->gpio_nr), gpio_dev);
-+ del_timer_sync(&gpio_dev->flush_timer);
- rc_unregister_device(gpio_dev->rcdev);
- gpio_free(gpio_dev->gpio_nr);
- kfree(gpio_dev);
--- /dev/null
+From a2da38f8f3d558aeee87ebd3208f475ef684a59d Mon Sep 17 00:00:00 2001
+From: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+Date: Thu, 19 Nov 2015 11:41:36 -0200
+Subject: [PATCH] smsir.h: remove a now duplicated definition
+ (IR_DEFAULT_TIMEOUT)
+
+This macro is now part of the core. Remove from Siano driver.
+
+Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+---
+ drivers/media/common/siano/smsir.h | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/drivers/media/common/siano/smsir.h
++++ b/drivers/media/common/siano/smsir.h
+@@ -30,8 +30,6 @@ along with this program. If not, see <h
+ #include <linux/input.h>
+ #include <media/rc-core.h>
+
+-#define IR_DEFAULT_TIMEOUT 100
+-
+ struct smscore_device_t;
+
+ struct ir_t {
--- /dev/null
+From cce231204608c6829f716774a286236e23bff7bf Mon Sep 17 00:00:00 2001
+From: Nicolas Boullis <nboullis@debian.org>
+Date: Sat, 4 Jun 2016 00:57:06 +0200
+Subject: [PATCH] Implement a "wakeup-source" option for the i2c-rtc DeviceTree
+ overlay.
+
+See: https://github.com/raspberrypi/linux/pull/1511
+---
+ arch/arm/boot/dts/overlays/README | 3 +++
+ arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 4 ++++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -445,6 +445,9 @@ Params: ds1307 Select t
+
+ trickle-resistor-ohms Resistor value for trickle charge (DS1339-only)
+
++ wakeup-source Specify that the RTC can be used as a wakeup
++ source
++
+
+ Name: i2c0-bcm2708
+ Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations
+--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
+@@ -65,5 +65,9 @@
+ pcf8523 = <&pcf8523>,"status";
+ pcf8563 = <&pcf8563>,"status";
+ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0";
++ wakeup-source = <&ds1339>,"wakeup-source?",
++ <&ds3231>,"wakeup-source?",
++ <&mcp7940x>,"wakeup-source?",
++ <&mcp7941x>,"wakeup-source?";
+ };
+ };
+++ /dev/null
-From 0f922daa23beb3c3f591d61824a2e4a2031559a3 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
-Date: Thu, 19 Nov 2015 11:41:36 -0200
-Subject: [PATCH] smsir.h: remove a now duplicated definition
- (IR_DEFAULT_TIMEOUT)
-
-This macro is now part of the core. Remove from Siano driver.
-
-Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
----
- drivers/media/common/siano/smsir.h | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/media/common/siano/smsir.h
-+++ b/drivers/media/common/siano/smsir.h
-@@ -30,8 +30,6 @@ along with this program. If not, see <h
- #include <linux/input.h>
- #include <media/rc-core.h>
-
--#define IR_DEFAULT_TIMEOUT 100
--
- struct smscore_device_t;
-
- struct ir_t {
--- /dev/null
+From 89f988c93882e1ac4ad7864ee9469aa02550090c Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 3 Jun 2016 21:56:40 +0100
+Subject: [PATCH] BCM270X_DT: Fix rpi-dac overlay
+
+The rpi-dac overlay is almost identical to the hifiberry-dac overlay -
+the codec used is different but it also doesn't sit on the I2C bus. As
+a result, when the overlays were modified for dynamic loading and it
+was discovered that the hifiberry-dac overlay didn't work any more, the
+the rpi-dac overlay was also broken.
+
+The failure was caused by the fact that outside a bus, device names are
+constructed from the concatenation of the path elements leading to it,
+so moving the codec instantiation inside /soc caused the device name
+to get a "soc" added, breaking ALSA's naming.
+
+See: http://forum.kodi.tv/showthread.php?tid=269814&pid=2349776#pid2349776
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
++++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
+@@ -13,7 +13,7 @@
+ };
+
+ fragment@1 {
+- target = <&soc>;
++ target-path = "/";
+ __overlay__ {
+ pcm1794a-codec {
+ #sound-dai-cells = <0>;
+++ /dev/null
-From 23a16f885df81479a81bc6ba3ebbb4a25716ca6c Mon Sep 17 00:00:00 2001
-From: Nicolas Boullis <nboullis@debian.org>
-Date: Sat, 4 Jun 2016 00:57:06 +0200
-Subject: [PATCH] Implement a "wakeup-source" option for the i2c-rtc DeviceTree
- overlay.
-
-See: https://github.com/raspberrypi/linux/pull/1511
----
- arch/arm/boot/dts/overlays/README | 3 +++
- arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 4 ++++
- 2 files changed, 7 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -445,6 +445,9 @@ Params: ds1307 Select t
-
- trickle-resistor-ohms Resistor value for trickle charge (DS1339-only)
-
-+ wakeup-source Specify that the RTC can be used as a wakeup
-+ source
-+
-
- Name: i2c0-bcm2708
- Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations
---- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
-@@ -65,5 +65,9 @@
- pcf8523 = <&pcf8523>,"status";
- pcf8563 = <&pcf8563>,"status";
- trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0";
-+ wakeup-source = <&ds1339>,"wakeup-source?",
-+ <&ds3231>,"wakeup-source?",
-+ <&mcp7940x>,"wakeup-source?",
-+ <&mcp7941x>,"wakeup-source?";
- };
- };
+++ /dev/null
-From d6b1e376414ff77bcfc449e7dcc0f1ee7b91a888 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 3 Jun 2016 21:56:40 +0100
-Subject: [PATCH] BCM270X_DT: Fix rpi-dac overlay
-
-The rpi-dac overlay is almost identical to the hifiberry-dac overlay -
-the codec used is different but it also doesn't sit on the I2C bus. As
-a result, when the overlays were modified for dynamic loading and it
-was discovered that the hifiberry-dac overlay didn't work any more, the
-the rpi-dac overlay was also broken.
-
-The failure was caused by the fact that outside a bus, device names are
-constructed from the concatenation of the path elements leading to it,
-so moving the codec instantiation inside /soc caused the device name
-to get a "soc" added, breaking ALSA's naming.
-
-See: http://forum.kodi.tv/showthread.php?tid=269814&pid=2349776#pid2349776
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
-@@ -13,7 +13,7 @@
- };
-
- fragment@1 {
-- target = <&soc>;
-+ target-path = "/";
- __overlay__ {
- pcm1794a-codec {
- #sound-dai-cells = <0>;
--- /dev/null
+From 312ddfe70ee2d9893aec7d03b70f3c38d374fed1 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 6 Jun 2016 09:23:37 +0100
+Subject: [PATCH] BCM270X_DT: Make i2c-gpio usable by other overlays
+
+Modify the i2c-gpio overlay to export symbol i2c-gpio for use by other
+overlays. Export the alias as well for good measure.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
+@@ -19,6 +19,21 @@
+ };
+ };
+ };
++
++ fragment@1 {
++ target-path = "/aliases";
++ __overlay__ {
++ i2c_gpio = "/i2c@0";
++ };
++ };
++
++ fragment@2 {
++ target-path = "/__symbols__";
++ __overlay__ {
++ i2c_gpio = "/i2c@0";
++ };
++ };
++
+ __overrides__ {
+ i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
+ i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
+++ /dev/null
-From 5e5cb8f76037673c14925324606738587f65427c Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Mon, 6 Jun 2016 09:23:37 +0100
-Subject: [PATCH] BCM270X_DT: Make i2c-gpio usable by other overlays
-
-Modify the i2c-gpio overlay to export symbol i2c-gpio for use by other
-overlays. Export the alias as well for good measure.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
-@@ -19,6 +19,21 @@
- };
- };
- };
-+
-+ fragment@1 {
-+ target-path = "/aliases";
-+ __overlay__ {
-+ i2c_gpio = "/i2c@0";
-+ };
-+ };
-+
-+ fragment@2 {
-+ target-path = "/__symbols__";
-+ __overlay__ {
-+ i2c_gpio = "/i2c@0";
-+ };
-+ };
-+
- __overrides__ {
- i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
- i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
--- /dev/null
+From 940b863512662c2da10729fbb6d57fe072c9b887 Mon Sep 17 00:00:00 2001
+From: Erik Sejr <erik@eriks.ssimicro.com>
+Date: Tue, 7 Jun 2016 20:58:17 -0400
+Subject: [PATCH] Add ads1015 overlay
+
+See: https://github.com/raspberrypi/linux/pull/1520
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 22 ++++++
+ arch/arm/boot/dts/overlays/ads1015-overlay.dts | 98 ++++++++++++++++++++++++++
+ 3 files changed, 121 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -13,6 +13,7 @@ ifeq ($(CONFIG_ARCH_BCM2835),y)
+ endif
+
+ dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += ads1015.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -168,6 +168,28 @@ Load: dtoverlay=adau1977-adc
+ Params: <None>
+
+
++Name: ads1015
++Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
++Load: dtoverlay=ads1015,<param>=<val>
++Params: addr I2C bus address of device. Set based on how the
++ addr pin is wired. (default=0x48 assumes addr
++ is pulled to GND)
++ cha_enable Enable virtual channel a. (default=true)
++ cha_cfg Set the configuration for virtual channel a.
++ (default=4 configures this channel for the
++ voltage at A0 with respect to GND)
++ cha_datarate Set the datarate (samples/sec) for this channel.
++ (default=4 sets 1600 sps)
++ cha_gain Set the gain of the Programmable Gain
++ Amplifier for this channel. (default=2 sets the
++ full scale of the channel to 2.048 Volts)
++
++ Channel (ch) parameters can be set for each enabled channel.
++ A maximum of 4 channels can be enabled (letters a thru d).
++ For more information refer to the device datasheet at:
++ http://www.ti.com/lit/ds/symlink/ads1015.pdf
++
++
+ Name: ads7846
+ Info: ADS7846 Touch controller
+ Load: dtoverlay=ads7846,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
+@@ -0,0 +1,98 @@
++/*
++ * 2016 - Erik Sejr
++ */
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++ /* ----------- ADS1015 ------------ */
++ fragment@0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++ ads1015: ads1015 {
++ compatible = "ti,ads1015";
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x48>;
++ };
++ };
++ };
++
++ fragment@1 {
++ target-path = "i2c_arm/ads1015";
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_a: channel_a {
++ reg = <4>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_b: channel_b {
++ reg = <5>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment@3 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_c: channel_c {
++ reg = <6>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ fragment@4 {
++ target-path = "i2c_arm/ads1015";
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ channel_d: channel_d {
++ reg = <7>;
++ ti,gain = <2>;
++ ti,datarate = <4>;
++ };
++ };
++ };
++
++ __overrides__ {
++ addr = <&ads1015>,"reg:0";
++ cha_enable = <0>,"=1";
++ cha_cfg = <&channel_a>,"reg:0";
++ cha_gain = <&channel_a>,"ti,gain:0";
++ cha_datarate = <&channel_a>,"ti,datarate:0";
++ chb_enable = <0>,"=2";
++ chb_cfg = <&channel_b>,"reg:0";
++ chb_gain = <&channel_b>,"ti,gain:0";
++ chb_datarate = <&channel_b>,"ti,datarate:0";
++ chc_enable = <0>,"=3";
++ chc_cfg = <&channel_c>,"reg:0";
++ chc_gain = <&channel_c>,"ti,gain:0";
++ chc_datarate = <&channel_c>,"ti,datarate:0";
++ chd_enable = <0>,"=4";
++ chd_cfg = <&channel_d>,"reg:0";
++ chd_gain = <&channel_d>,"ti,gain:0";
++ chd_datarate = <&channel_d>,"ti,datarate:0";
++ };
++
++};
+++ /dev/null
-From adce42f39f75ac5d479d2b4caff73723107e0539 Mon Sep 17 00:00:00 2001
-From: Erik Sejr <erik@eriks.ssimicro.com>
-Date: Tue, 7 Jun 2016 20:58:17 -0400
-Subject: [PATCH] Add ads1015 overlay
-
-See: https://github.com/raspberrypi/linux/pull/1520
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 22 ++++++
- arch/arm/boot/dts/overlays/ads1015-overlay.dts | 98 ++++++++++++++++++++++++++
- 3 files changed, 121 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -13,6 +13,7 @@ ifeq ($(CONFIG_ARCH_BCM2835),y)
- endif
-
- dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += ads1015.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -168,6 +168,28 @@ Load: dtoverlay=adau1977-adc
- Params: <None>
-
-
-+Name: ads1015
-+Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
-+Load: dtoverlay=ads1015,<param>=<val>
-+Params: addr I2C bus address of device. Set based on how the
-+ addr pin is wired. (default=0x48 assumes addr
-+ is pulled to GND)
-+ cha_enable Enable virtual channel a. (default=true)
-+ cha_cfg Set the configuration for virtual channel a.
-+ (default=4 configures this channel for the
-+ voltage at A0 with respect to GND)
-+ cha_datarate Set the datarate (samples/sec) for this channel.
-+ (default=4 sets 1600 sps)
-+ cha_gain Set the gain of the Programmable Gain
-+ Amplifier for this channel. (default=2 sets the
-+ full scale of the channel to 2.048 Volts)
-+
-+ Channel (ch) parameters can be set for each enabled channel.
-+ A maximum of 4 channels can be enabled (letters a thru d).
-+ For more information refer to the device datasheet at:
-+ http://www.ti.com/lit/ds/symlink/ads1015.pdf
-+
-+
- Name: ads7846
- Info: ADS7846 Touch controller
- Load: dtoverlay=ads7846,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
-@@ -0,0 +1,98 @@
-+/*
-+ * 2016 - Erik Sejr
-+ */
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+ /* ----------- ADS1015 ------------ */
-+ fragment@0 {
-+ target = <&i2c_arm>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+ ads1015: ads1015 {
-+ compatible = "ti,ads1015";
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x48>;
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target-path = "i2c_arm/ads1015";
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_a: channel_a {
-+ reg = <4>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target-path = "i2c_arm/ads1015";
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_b: channel_b {
-+ reg = <5>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ fragment@3 {
-+ target-path = "i2c_arm/ads1015";
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_c: channel_c {
-+ reg = <6>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ fragment@4 {
-+ target-path = "i2c_arm/ads1015";
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ channel_d: channel_d {
-+ reg = <7>;
-+ ti,gain = <2>;
-+ ti,datarate = <4>;
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ addr = <&ads1015>,"reg:0";
-+ cha_enable = <0>,"=1";
-+ cha_cfg = <&channel_a>,"reg:0";
-+ cha_gain = <&channel_a>,"ti,gain:0";
-+ cha_datarate = <&channel_a>,"ti,datarate:0";
-+ chb_enable = <0>,"=2";
-+ chb_cfg = <&channel_b>,"reg:0";
-+ chb_gain = <&channel_b>,"ti,gain:0";
-+ chb_datarate = <&channel_b>,"ti,datarate:0";
-+ chc_enable = <0>,"=3";
-+ chc_cfg = <&channel_c>,"reg:0";
-+ chc_gain = <&channel_c>,"ti,gain:0";
-+ chc_datarate = <&channel_c>,"ti,datarate:0";
-+ chd_enable = <0>,"=4";
-+ chd_cfg = <&channel_d>,"reg:0";
-+ chd_gain = <&channel_d>,"ti,gain:0";
-+ chd_datarate = <&channel_d>,"ti,datarate:0";
-+ };
-+
-+};
--- /dev/null
+From cdf33f3fa4f136d6e558161b517aca695a6151ff Mon Sep 17 00:00:00 2001
+From: Michael Kaplan <m.kaplan@evva.com>
+Date: Wed, 8 Jun 2016 15:14:11 +0200
+Subject: [PATCH] Fixed MCP23017 section in overlay README
+
+Old description could have led to the misunderstanding that it is an
+i2c port expander, but in fact it is a gpio expander.
+---
+ arch/arm/boot/dts/overlays/README | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -595,7 +595,7 @@ Params: gpio_out_pin GPIO for
+
+
+ Name: mcp23017
+-Info: Configures the MCP23017 I2C port expander
++Info: Configures the MCP23017 I2C GPIO expander
+ Load: dtoverlay=mcp23017,<param>=<val>
+ Params: gpiopin Gpio pin connected to the INTA output of the
+ MCP23017 (default: 4)
+++ /dev/null
-From 83ee5f5d26599a914e05a9eac8250029a4410969 Mon Sep 17 00:00:00 2001
-From: Michael Kaplan <m.kaplan@evva.com>
-Date: Wed, 8 Jun 2016 15:14:11 +0200
-Subject: [PATCH] Fixed MCP23017 section in overlay README
-
-Old description could have led to the misunderstanding that it is an
-i2c port expander, but in fact it is a gpio expander.
----
- arch/arm/boot/dts/overlays/README | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -595,7 +595,7 @@ Params: gpio_out_pin GPIO for
-
-
- Name: mcp23017
--Info: Configures the MCP23017 I2C port expander
-+Info: Configures the MCP23017 I2C GPIO expander
- Load: dtoverlay=mcp23017,<param>=<val>
- Params: gpiopin Gpio pin connected to the INTA output of the
- MCP23017 (default: 4)
--- /dev/null
+From 80e7256b69b395f91738b44dc259c9fa4d15dda3 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:13 +0000
+Subject: [PATCH] Revert "bcm2835-dma: Fix up convert to DMA pool"
+
+This reverts commit ec2e48fda22c57cab56a4332d1a095f91c919493.
+---
+ drivers/dma/bcm2835-dma.c | 36 ++++++++++--------------------------
+ 1 file changed, 10 insertions(+), 26 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -488,17 +488,6 @@ static struct dma_async_tx_descriptor *b
+ c->cyclic = true;
+
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+-error_cb:
+- i--;
+- for (; i >= 0; i--) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+-
+- dma_pool_free(c->cb_pool, cb_entry->cb, cb_entry->paddr);
+- }
+-
+- kfree(d->cb_list);
+- kfree(d);
+- return NULL;
+ }
+
+ static struct dma_async_tx_descriptor *
+@@ -545,7 +534,6 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+ if (!d)
+ return NULL;
+
+- d->c = c;
+ d->dir = direction;
+
+ if (c->ch >= 8) /* LITE channel */
+@@ -565,21 +553,15 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+ d->frames += len / max_size + 1;
+ }
+
+- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+- if (!d->cb_list) {
++ /* Allocate memory for control blocks */
++ d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
++ d->control_block_base = dma_zalloc_coherent(chan->device->dev,
++ d->control_block_size, &d->control_block_base_phys,
++ GFP_NOWAIT);
++ if (!d->control_block_base) {
+ kfree(d);
+ return NULL;
+ }
+- /* Allocate memory for control blocks */
+- for (i = 0; i < d->frames; i++) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+-
+- cb_entry->cb = dma_pool_zalloc(c->cb_pool, GFP_ATOMIC,
+- &cb_entry->paddr);
+-
+- if (!cb_entry->cb)
+- goto error_cb;
+- }
+
+ /*
+ * Iterate over all SG entries, create a control block
+@@ -596,7 +578,7 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+
+ for (j = 0; j < len; j += max_size) {
+ struct bcm2835_dma_cb *control_block =
+- d->cb_list[i + split_cnt].cb;
++ &d->control_block_base[i + split_cnt];
+
+ /* Setup addresses */
+ if (d->dir == DMA_DEV_TO_MEM) {
+@@ -638,7 +620,9 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
+ if (i < sg_len - 1 || len - j > max_size) {
+ /* Next block is the next frame. */
+ control_block->next =
+- d->cb_list[i + split_cnt + 1].paddr;
++ d->control_block_base_phys +
++ sizeof(struct bcm2835_dma_cb) *
++ (i + split_cnt + 1);
+ } else {
+ /* Next block is empty. */
+ control_block->next = 0;
+++ /dev/null
-From a236ecec838c8cf9928e9d2b8dc03346276627a1 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Fri, 22 Apr 2016 17:17:13 +0000
-Subject: [PATCH] Revert "bcm2835-dma: Fix up convert to DMA pool"
-
-This reverts commit ec2e48fda22c57cab56a4332d1a095f91c919493.
----
- drivers/dma/bcm2835-dma.c | 36 ++++++++++--------------------------
- 1 file changed, 10 insertions(+), 26 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -488,17 +488,6 @@ static struct dma_async_tx_descriptor *b
- c->cyclic = true;
-
- return vchan_tx_prep(&c->vc, &d->vd, flags);
--error_cb:
-- i--;
-- for (; i >= 0; i--) {
-- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
--
-- dma_pool_free(c->cb_pool, cb_entry->cb, cb_entry->paddr);
-- }
--
-- kfree(d->cb_list);
-- kfree(d);
-- return NULL;
- }
-
- static struct dma_async_tx_descriptor *
-@@ -545,7 +534,6 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
- if (!d)
- return NULL;
-
-- d->c = c;
- d->dir = direction;
-
- if (c->ch >= 8) /* LITE channel */
-@@ -565,21 +553,15 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
- d->frames += len / max_size + 1;
- }
-
-- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
-- if (!d->cb_list) {
-+ /* Allocate memory for control blocks */
-+ d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
-+ d->control_block_base = dma_zalloc_coherent(chan->device->dev,
-+ d->control_block_size, &d->control_block_base_phys,
-+ GFP_NOWAIT);
-+ if (!d->control_block_base) {
- kfree(d);
- return NULL;
- }
-- /* Allocate memory for control blocks */
-- for (i = 0; i < d->frames; i++) {
-- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
--
-- cb_entry->cb = dma_pool_zalloc(c->cb_pool, GFP_ATOMIC,
-- &cb_entry->paddr);
--
-- if (!cb_entry->cb)
-- goto error_cb;
-- }
-
- /*
- * Iterate over all SG entries, create a control block
-@@ -596,7 +578,7 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
-
- for (j = 0; j < len; j += max_size) {
- struct bcm2835_dma_cb *control_block =
-- d->cb_list[i + split_cnt].cb;
-+ &d->control_block_base[i + split_cnt];
-
- /* Setup addresses */
- if (d->dir == DMA_DEV_TO_MEM) {
-@@ -638,7 +620,9 @@ bcm2835_dma_prep_slave_sg(struct dma_cha
- if (i < sg_len - 1 || len - j > max_size) {
- /* Next block is the next frame. */
- control_block->next =
-- d->cb_list[i + split_cnt + 1].paddr;
-+ d->control_block_base_phys +
-+ sizeof(struct bcm2835_dma_cb) *
-+ (i + split_cnt + 1);
- } else {
- /* Next block is empty. */
- control_block->next = 0;
--- /dev/null
+From 50523fe3cfcef4a7728176b11a6e2975243ab74e Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:22 +0000
+Subject: [PATCH] Revert "bcm2835-dma: Limit cyclic transfers on lite channels
+ to 32k"
+
+This reverts commit 052c2005b6ecedc5abad86632f5781adda310aa7.
+---
+ drivers/dma/bcm2835-dma.c | 8 +-------
+ 1 file changed, 1 insertion(+), 7 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -144,12 +144,6 @@ struct bcm2835_desc {
+ */
+ #define MAX_LITE_TRANSFER (SZ_64K - 4)
+
+-/*
+- * Transfers larger than 32k cause issues with the bcm2708-i2s driver,
+- * so limit transfer size to 32k as bcm2708-dmaengine did.
+- */
+-#define MAX_CYCLIC_LITE_TRANSFER SZ_32K
+-
+ static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+ {
+ return container_of(d, struct bcm2835_dmadev, ddev);
+@@ -418,7 +412,7 @@ static struct dma_async_tx_descriptor *b
+ d->c = c;
+ d->dir = direction;
+ if (c->ch >= 8) /* LITE channel */
+- max_size = MAX_CYCLIC_LITE_TRANSFER;
++ max_size = MAX_LITE_TRANSFER;
+ else
+ max_size = MAX_NORMAL_TRANSFER;
+ period_len = min(period_len, max_size);
+++ /dev/null
-From 31c4d45f25abd0680e05775f3166ec6066e39a2a Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Fri, 22 Apr 2016 17:17:22 +0000
-Subject: [PATCH] Revert "bcm2835-dma: Limit cyclic transfers on lite channels
- to 32k"
-
-This reverts commit 052c2005b6ecedc5abad86632f5781adda310aa7.
----
- drivers/dma/bcm2835-dma.c | 8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -144,12 +144,6 @@ struct bcm2835_desc {
- */
- #define MAX_LITE_TRANSFER (SZ_64K - 4)
-
--/*
-- * Transfers larger than 32k cause issues with the bcm2708-i2s driver,
-- * so limit transfer size to 32k as bcm2708-dmaengine did.
-- */
--#define MAX_CYCLIC_LITE_TRANSFER SZ_32K
--
- static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
- {
- return container_of(d, struct bcm2835_dmadev, ddev);
-@@ -418,7 +412,7 @@ static struct dma_async_tx_descriptor *b
- d->c = c;
- d->dir = direction;
- if (c->ch >= 8) /* LITE channel */
-- max_size = MAX_CYCLIC_LITE_TRANSFER;
-+ max_size = MAX_LITE_TRANSFER;
- else
- max_size = MAX_NORMAL_TRANSFER;
- period_len = min(period_len, max_size);
--- /dev/null
+From ef68b1e7c830c23cf87a927474b5e53da14d9bac Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:30 +0000
+Subject: [PATCH] Revert "dmaengine: bcm2835: Load driver early and support
+ legacy API"
+
+This reverts commit 6f56fff39c811953809b011f59c49a2122c4d173.
+---
+ drivers/dma/Kconfig | 2 +-
+ drivers/dma/bcm2835-dma.c | 30 ++++++------------------------
+ 2 files changed, 7 insertions(+), 25 deletions(-)
+
+--- a/drivers/dma/Kconfig
++++ b/drivers/dma/Kconfig
+@@ -108,7 +108,7 @@ config COH901318
+
+ config DMA_BCM2835
+ tristate "BCM2835 DMA engine support"
+- depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
++ depends on ARCH_BCM2835
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -36,7 +36,6 @@
+ #include <linux/interrupt.h>
+ #include <linux/list.h>
+ #include <linux/module.h>
+-#include <linux/platform_data/dma-bcm2708.h>
+ #include <linux/platform_device.h>
+ #include <linux/slab.h>
+ #include <linux/io.h>
+@@ -787,10 +786,6 @@ static int bcm2835_dma_probe(struct plat
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+- rc = bcm_dmaman_probe(pdev, base, BCM2835_DMA_BULK_MASK);
+- if (rc)
+- dev_err(&pdev->dev, "Failed to initialize the legacy API\n");
+-
+ od->base = base;
+
+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+@@ -823,8 +818,11 @@ static int bcm2835_dma_probe(struct plat
+ goto err_no_dma;
+ }
+
+- /* Channel 0 is used by the legacy API */
+- chans_available &= ~BCM2835_DMA_BULK_MASK;
++ /*
++ * Do not use the FIQ and BULK channels,
++ * because they are used by the GPU.
++ */
++ chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
+
+ for (i = 0; i < pdev->num_resources; i++) {
+ irq = platform_get_irq(pdev, i);
+@@ -868,7 +866,6 @@ static int bcm2835_dma_remove(struct pla
+ {
+ struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
+
+- bcm_dmaman_remove(pdev);
+ dma_async_device_unregister(&od->ddev);
+ bcm2835_dma_free(od);
+
+@@ -884,22 +881,7 @@ static struct platform_driver bcm2835_dm
+ },
+ };
+
+-static int bcm2835_dma_init(void)
+-{
+- return platform_driver_register(&bcm2835_dma_driver);
+-}
+-
+-static void bcm2835_dma_exit(void)
+-{
+- platform_driver_unregister(&bcm2835_dma_driver);
+-}
+-
+-/*
+- * Load after serial driver (arch_initcall) so we see the messages if it fails,
+- * but before drivers (module_init) that need a DMA channel.
+- */
+-subsys_initcall(bcm2835_dma_init);
+-module_exit(bcm2835_dma_exit);
++module_platform_driver(bcm2835_dma_driver);
+
+ MODULE_ALIAS("platform:bcm2835-dma");
+ MODULE_DESCRIPTION("BCM2835 DMA engine driver");
--- /dev/null
+From 31f3ee328b2a471999acca527e3a83d6af3c75d9 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 17:17:37 +0000
+Subject: [PATCH] Revert "dmaengine: bcm2835: Add slave dma support"
+
+This reverts commit 8a349301238aabb40c9da5ca8c8492b6b8d146f6.
+---
+ drivers/dma/bcm2835-dma.c | 206 ++++------------------------------------------
+ 1 file changed, 14 insertions(+), 192 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -1,10 +1,11 @@
+ /*
+ * BCM2835 DMA engine support
+ *
++ * This driver only supports cyclic DMA transfers
++ * as needed for the I2S module.
++ *
+ * Author: Florian Meier <florian.meier@koalo.de>
+ * Copyright 2013
+- * Gellert Weisz <gellert@raspberrypi.org>
+- * Copyright 2013-2014
+ *
+ * Based on
+ * OMAP DMAengine support by Russell King
+@@ -94,8 +95,6 @@ struct bcm2835_desc {
+ size_t size;
+ };
+
+-#define BCM2835_DMA_WAIT_CYCLES 0 /* Slow down DMA transfers: 0-31 */
+-
+ #define BCM2835_DMA_CS 0x00
+ #define BCM2835_DMA_ADDR 0x04
+ #define BCM2835_DMA_SOURCE_AD 0x0c
+@@ -112,16 +111,12 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
+
+ #define BCM2835_DMA_INT_EN BIT(0)
+-#define BCM2835_DMA_WAIT_RESP BIT(3)
+ #define BCM2835_DMA_D_INC BIT(4)
+-#define BCM2835_DMA_D_WIDTH BIT(5)
+ #define BCM2835_DMA_D_DREQ BIT(6)
+ #define BCM2835_DMA_S_INC BIT(8)
+-#define BCM2835_DMA_S_WIDTH BIT(9)
+ #define BCM2835_DMA_S_DREQ BIT(10)
+
+ #define BCM2835_DMA_PER_MAP(x) ((x) << 16)
+-#define BCM2835_DMA_WAITS(x) (((x) & 0x1f) << 21)
+
+ #define BCM2835_DMA_DATA_TYPE_S8 1
+ #define BCM2835_DMA_DATA_TYPE_S16 2
+@@ -135,14 +130,6 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+
+-#define MAX_NORMAL_TRANSFER SZ_1G
+-/*
+- * Max length on a Lite channel is 65535 bytes.
+- * DMA handles byte-enables on SDRAM reads and writes even on 128-bit accesses,
+- * but byte-enables don't exist on peripheral addresses, so align to 32-bit.
+- */
+-#define MAX_LITE_TRANSFER (SZ_64K - 4)
+-
+ static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+ {
+ return container_of(d, struct bcm2835_dmadev, ddev);
+@@ -239,19 +226,13 @@ static irqreturn_t bcm2835_dma_callback(
+ d = c->desc;
+
+ if (d) {
+- if (c->cyclic) {
+- vchan_cyclic_callback(&d->vd);
+-
+- /* Keep the DMA engine running */
+- writel(BCM2835_DMA_ACTIVE,
+- c->chan_base + BCM2835_DMA_CS);
+-
+- } else {
+- vchan_cookie_complete(&c->desc->vd);
+- bcm2835_dma_start_desc(c);
+- }
++ /* TODO Only works for cyclic DMA */
++ vchan_cyclic_callback(&d->vd);
+ }
+
++ /* Keep the DMA engine running */
++ writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
++
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return IRQ_HANDLED;
+@@ -358,6 +339,8 @@ static void bcm2835_dma_issue_pending(st
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ unsigned long flags;
+
++ c->cyclic = true; /* Nothing else is implemented */
++
+ spin_lock_irqsave(&c->vc.lock, flags);
+ if (vchan_issue_pending(&c->vc) && !c->desc)
+ bcm2835_dma_start_desc(c);
+@@ -375,7 +358,7 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_desc *d;
+ dma_addr_t dev_addr;
+ unsigned int es, sync_type;
+- unsigned int frame, max_size;
++ unsigned int frame;
+ int i;
+
+ /* Grab configuration */
+@@ -410,12 +393,7 @@ static struct dma_async_tx_descriptor *b
+
+ d->c = c;
+ d->dir = direction;
+- if (c->ch >= 8) /* LITE channel */
+- max_size = MAX_LITE_TRANSFER;
+- else
+- max_size = MAX_NORMAL_TRANSFER;
+- period_len = min(period_len, max_size);
+- d->frames = (buf_len - 1) / (period_len + 1);
++ d->frames = buf_len / period_len;
+
+ d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+ if (!d->cb_list) {
+@@ -463,171 +441,17 @@ static struct dma_async_tx_descriptor *b
+ BCM2835_DMA_PER_MAP(c->dreq);
+
+ /* Length of a frame */
+- if (frame != d->frames - 1)
+- control_block->length = period_len;
+- else
+- control_block->length = buf_len - (d->frames - 1) *
+- period_len;
++ control_block->length = period_len;
+ d->size += control_block->length;
+
+ /*
+ * Next block is the next frame.
+- * This function is called on cyclic DMA transfers.
++ * This DMA engine driver currently only supports cyclic DMA.
+ * Therefore, wrap around at number of frames.
+ */
+ control_block->next = d->cb_list[((frame + 1) % d->frames)].paddr;
+ }
+
+- c->cyclic = true;
+-
+- return vchan_tx_prep(&c->vc, &d->vd, flags);
+-}
+-
+-static struct dma_async_tx_descriptor *
+-bcm2835_dma_prep_slave_sg(struct dma_chan *chan,
+- struct scatterlist *sgl,
+- unsigned int sg_len,
+- enum dma_transfer_direction direction,
+- unsigned long flags, void *context)
+-{
+- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+- enum dma_slave_buswidth dev_width;
+- struct bcm2835_desc *d;
+- dma_addr_t dev_addr;
+- struct scatterlist *sgent;
+- unsigned int i, sync_type, split_cnt, max_size;
+-
+- if (!is_slave_direction(direction)) {
+- dev_err(chan->device->dev, "direction not supported\n");
+- return NULL;
+- }
+-
+- if (direction == DMA_DEV_TO_MEM) {
+- dev_addr = c->cfg.src_addr;
+- dev_width = c->cfg.src_addr_width;
+- sync_type = BCM2835_DMA_S_DREQ;
+- } else {
+- dev_addr = c->cfg.dst_addr;
+- dev_width = c->cfg.dst_addr_width;
+- sync_type = BCM2835_DMA_D_DREQ;
+- }
+-
+- /* Bus width translates to the element size (ES) */
+- switch (dev_width) {
+- case DMA_SLAVE_BUSWIDTH_4_BYTES:
+- break;
+- default:
+- dev_err(chan->device->dev, "buswidth not supported: %i\n",
+- dev_width);
+- return NULL;
+- }
+-
+- /* Allocate and setup the descriptor. */
+- d = kzalloc(sizeof(*d), GFP_NOWAIT);
+- if (!d)
+- return NULL;
+-
+- d->dir = direction;
+-
+- if (c->ch >= 8) /* LITE channel */
+- max_size = MAX_LITE_TRANSFER;
+- else
+- max_size = MAX_NORMAL_TRANSFER;
+-
+- /*
+- * Store the length of the SG list in d->frames
+- * taking care to account for splitting up transfers
+- * too large for a LITE channel
+- */
+- d->frames = 0;
+- for_each_sg(sgl, sgent, sg_len, i) {
+- unsigned int len = sg_dma_len(sgent);
+-
+- d->frames += len / max_size + 1;
+- }
+-
+- /* Allocate memory for control blocks */
+- d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
+- d->control_block_base = dma_zalloc_coherent(chan->device->dev,
+- d->control_block_size, &d->control_block_base_phys,
+- GFP_NOWAIT);
+- if (!d->control_block_base) {
+- kfree(d);
+- return NULL;
+- }
+-
+- /*
+- * Iterate over all SG entries, create a control block
+- * for each frame and link them together.
+- * Count the number of times an SG entry had to be split
+- * as a result of using a LITE channel
+- */
+- split_cnt = 0;
+-
+- for_each_sg(sgl, sgent, sg_len, i) {
+- unsigned int j;
+- dma_addr_t addr = sg_dma_address(sgent);
+- unsigned int len = sg_dma_len(sgent);
+-
+- for (j = 0; j < len; j += max_size) {
+- struct bcm2835_dma_cb *control_block =
+- &d->control_block_base[i + split_cnt];
+-
+- /* Setup addresses */
+- if (d->dir == DMA_DEV_TO_MEM) {
+- control_block->info = BCM2835_DMA_D_INC |
+- BCM2835_DMA_D_WIDTH |
+- BCM2835_DMA_S_DREQ;
+- control_block->src = dev_addr;
+- control_block->dst = addr + (dma_addr_t)j;
+- } else {
+- control_block->info = BCM2835_DMA_S_INC |
+- BCM2835_DMA_S_WIDTH |
+- BCM2835_DMA_D_DREQ;
+- control_block->src = addr + (dma_addr_t)j;
+- control_block->dst = dev_addr;
+- }
+-
+- /* Common part */
+- control_block->info |=
+- BCM2835_DMA_WAITS(BCM2835_DMA_WAIT_CYCLES);
+- control_block->info |= BCM2835_DMA_WAIT_RESP;
+-
+- /* Enable */
+- if (i == sg_len - 1 && len - j <= max_size)
+- control_block->info |= BCM2835_DMA_INT_EN;
+-
+- /* Setup synchronization */
+- if (sync_type)
+- control_block->info |= sync_type;
+-
+- /* Setup DREQ channel */
+- if (c->dreq)
+- control_block->info |=
+- BCM2835_DMA_PER_MAP(c->dreq);
+-
+- /* Length of a frame */
+- control_block->length = min(len - j, max_size);
+- d->size += control_block->length;
+-
+- if (i < sg_len - 1 || len - j > max_size) {
+- /* Next block is the next frame. */
+- control_block->next =
+- d->control_block_base_phys +
+- sizeof(struct bcm2835_dma_cb) *
+- (i + split_cnt + 1);
+- } else {
+- /* Next block is empty. */
+- control_block->next = 0;
+- }
+-
+- if (len - j > max_size)
+- split_cnt++;
+- }
+- }
+-
+- c->cyclic = false;
+-
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+ error_cb:
+ i--;
+@@ -796,7 +620,6 @@ static int bcm2835_dma_probe(struct plat
+ od->ddev.device_tx_status = bcm2835_dma_tx_status;
+ od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
+ od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
+- od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
+ od->ddev.device_config = bcm2835_dma_slave_config;
+ od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
+ od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+@@ -886,5 +709,4 @@ module_platform_driver(bcm2835_dma_drive
+ MODULE_ALIAS("platform:bcm2835-dma");
+ MODULE_DESCRIPTION("BCM2835 DMA engine driver");
+ MODULE_AUTHOR("Florian Meier <florian.meier@koalo.de>");
+-MODULE_AUTHOR("Gellert Weisz <gellert@raspberrypi.org>");
+ MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 7d58feb7f06a5e05aa3b99b32b4bba4b927b7b3f Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Fri, 22 Apr 2016 17:17:30 +0000
-Subject: [PATCH] Revert "dmaengine: bcm2835: Load driver early and support
- legacy API"
-
-This reverts commit 6f56fff39c811953809b011f59c49a2122c4d173.
----
- drivers/dma/Kconfig | 2 +-
- drivers/dma/bcm2835-dma.c | 30 ++++++------------------------
- 2 files changed, 7 insertions(+), 25 deletions(-)
-
---- a/drivers/dma/Kconfig
-+++ b/drivers/dma/Kconfig
-@@ -108,7 +108,7 @@ config COH901318
-
- config DMA_BCM2835
- tristate "BCM2835 DMA engine support"
-- depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
-+ depends on ARCH_BCM2835
- select DMA_ENGINE
- select DMA_VIRTUAL_CHANNELS
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -36,7 +36,6 @@
- #include <linux/interrupt.h>
- #include <linux/list.h>
- #include <linux/module.h>
--#include <linux/platform_data/dma-bcm2708.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
- #include <linux/io.h>
-@@ -787,10 +786,6 @@ static int bcm2835_dma_probe(struct plat
- if (IS_ERR(base))
- return PTR_ERR(base);
-
-- rc = bcm_dmaman_probe(pdev, base, BCM2835_DMA_BULK_MASK);
-- if (rc)
-- dev_err(&pdev->dev, "Failed to initialize the legacy API\n");
--
- od->base = base;
-
- dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
-@@ -823,8 +818,11 @@ static int bcm2835_dma_probe(struct plat
- goto err_no_dma;
- }
-
-- /* Channel 0 is used by the legacy API */
-- chans_available &= ~BCM2835_DMA_BULK_MASK;
-+ /*
-+ * Do not use the FIQ and BULK channels,
-+ * because they are used by the GPU.
-+ */
-+ chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
-
- for (i = 0; i < pdev->num_resources; i++) {
- irq = platform_get_irq(pdev, i);
-@@ -868,7 +866,6 @@ static int bcm2835_dma_remove(struct pla
- {
- struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
-
-- bcm_dmaman_remove(pdev);
- dma_async_device_unregister(&od->ddev);
- bcm2835_dma_free(od);
-
-@@ -884,22 +881,7 @@ static struct platform_driver bcm2835_dm
- },
- };
-
--static int bcm2835_dma_init(void)
--{
-- return platform_driver_register(&bcm2835_dma_driver);
--}
--
--static void bcm2835_dma_exit(void)
--{
-- platform_driver_unregister(&bcm2835_dma_driver);
--}
--
--/*
-- * Load after serial driver (arch_initcall) so we see the messages if it fails,
-- * but before drivers (module_init) that need a DMA channel.
-- */
--subsys_initcall(bcm2835_dma_init);
--module_exit(bcm2835_dma_exit);
-+module_platform_driver(bcm2835_dma_driver);
-
- MODULE_ALIAS("platform:bcm2835-dma");
- MODULE_DESCRIPTION("BCM2835 DMA engine driver");
+++ /dev/null
-From b80a19b329a3fcbb74490a4b8d86055ee7d40c13 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Fri, 22 Apr 2016 17:17:37 +0000
-Subject: [PATCH] Revert "dmaengine: bcm2835: Add slave dma support"
-
-This reverts commit 8a349301238aabb40c9da5ca8c8492b6b8d146f6.
----
- drivers/dma/bcm2835-dma.c | 206 ++++------------------------------------------
- 1 file changed, 14 insertions(+), 192 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -1,10 +1,11 @@
- /*
- * BCM2835 DMA engine support
- *
-+ * This driver only supports cyclic DMA transfers
-+ * as needed for the I2S module.
-+ *
- * Author: Florian Meier <florian.meier@koalo.de>
- * Copyright 2013
-- * Gellert Weisz <gellert@raspberrypi.org>
-- * Copyright 2013-2014
- *
- * Based on
- * OMAP DMAengine support by Russell King
-@@ -94,8 +95,6 @@ struct bcm2835_desc {
- size_t size;
- };
-
--#define BCM2835_DMA_WAIT_CYCLES 0 /* Slow down DMA transfers: 0-31 */
--
- #define BCM2835_DMA_CS 0x00
- #define BCM2835_DMA_ADDR 0x04
- #define BCM2835_DMA_SOURCE_AD 0x0c
-@@ -112,16 +111,12 @@ struct bcm2835_desc {
- #define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
-
- #define BCM2835_DMA_INT_EN BIT(0)
--#define BCM2835_DMA_WAIT_RESP BIT(3)
- #define BCM2835_DMA_D_INC BIT(4)
--#define BCM2835_DMA_D_WIDTH BIT(5)
- #define BCM2835_DMA_D_DREQ BIT(6)
- #define BCM2835_DMA_S_INC BIT(8)
--#define BCM2835_DMA_S_WIDTH BIT(9)
- #define BCM2835_DMA_S_DREQ BIT(10)
-
- #define BCM2835_DMA_PER_MAP(x) ((x) << 16)
--#define BCM2835_DMA_WAITS(x) (((x) & 0x1f) << 21)
-
- #define BCM2835_DMA_DATA_TYPE_S8 1
- #define BCM2835_DMA_DATA_TYPE_S16 2
-@@ -135,14 +130,6 @@ struct bcm2835_desc {
- #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
- #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
-
--#define MAX_NORMAL_TRANSFER SZ_1G
--/*
-- * Max length on a Lite channel is 65535 bytes.
-- * DMA handles byte-enables on SDRAM reads and writes even on 128-bit accesses,
-- * but byte-enables don't exist on peripheral addresses, so align to 32-bit.
-- */
--#define MAX_LITE_TRANSFER (SZ_64K - 4)
--
- static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
- {
- return container_of(d, struct bcm2835_dmadev, ddev);
-@@ -239,19 +226,13 @@ static irqreturn_t bcm2835_dma_callback(
- d = c->desc;
-
- if (d) {
-- if (c->cyclic) {
-- vchan_cyclic_callback(&d->vd);
--
-- /* Keep the DMA engine running */
-- writel(BCM2835_DMA_ACTIVE,
-- c->chan_base + BCM2835_DMA_CS);
--
-- } else {
-- vchan_cookie_complete(&c->desc->vd);
-- bcm2835_dma_start_desc(c);
-- }
-+ /* TODO Only works for cyclic DMA */
-+ vchan_cyclic_callback(&d->vd);
- }
-
-+ /* Keep the DMA engine running */
-+ writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
-+
- spin_unlock_irqrestore(&c->vc.lock, flags);
-
- return IRQ_HANDLED;
-@@ -358,6 +339,8 @@ static void bcm2835_dma_issue_pending(st
- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
- unsigned long flags;
-
-+ c->cyclic = true; /* Nothing else is implemented */
-+
- spin_lock_irqsave(&c->vc.lock, flags);
- if (vchan_issue_pending(&c->vc) && !c->desc)
- bcm2835_dma_start_desc(c);
-@@ -375,7 +358,7 @@ static struct dma_async_tx_descriptor *b
- struct bcm2835_desc *d;
- dma_addr_t dev_addr;
- unsigned int es, sync_type;
-- unsigned int frame, max_size;
-+ unsigned int frame;
- int i;
-
- /* Grab configuration */
-@@ -410,12 +393,7 @@ static struct dma_async_tx_descriptor *b
-
- d->c = c;
- d->dir = direction;
-- if (c->ch >= 8) /* LITE channel */
-- max_size = MAX_LITE_TRANSFER;
-- else
-- max_size = MAX_NORMAL_TRANSFER;
-- period_len = min(period_len, max_size);
-- d->frames = (buf_len - 1) / (period_len + 1);
-+ d->frames = buf_len / period_len;
-
- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
- if (!d->cb_list) {
-@@ -463,171 +441,17 @@ static struct dma_async_tx_descriptor *b
- BCM2835_DMA_PER_MAP(c->dreq);
-
- /* Length of a frame */
-- if (frame != d->frames - 1)
-- control_block->length = period_len;
-- else
-- control_block->length = buf_len - (d->frames - 1) *
-- period_len;
-+ control_block->length = period_len;
- d->size += control_block->length;
-
- /*
- * Next block is the next frame.
-- * This function is called on cyclic DMA transfers.
-+ * This DMA engine driver currently only supports cyclic DMA.
- * Therefore, wrap around at number of frames.
- */
- control_block->next = d->cb_list[((frame + 1) % d->frames)].paddr;
- }
-
-- c->cyclic = true;
--
-- return vchan_tx_prep(&c->vc, &d->vd, flags);
--}
--
--static struct dma_async_tx_descriptor *
--bcm2835_dma_prep_slave_sg(struct dma_chan *chan,
-- struct scatterlist *sgl,
-- unsigned int sg_len,
-- enum dma_transfer_direction direction,
-- unsigned long flags, void *context)
--{
-- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
-- enum dma_slave_buswidth dev_width;
-- struct bcm2835_desc *d;
-- dma_addr_t dev_addr;
-- struct scatterlist *sgent;
-- unsigned int i, sync_type, split_cnt, max_size;
--
-- if (!is_slave_direction(direction)) {
-- dev_err(chan->device->dev, "direction not supported\n");
-- return NULL;
-- }
--
-- if (direction == DMA_DEV_TO_MEM) {
-- dev_addr = c->cfg.src_addr;
-- dev_width = c->cfg.src_addr_width;
-- sync_type = BCM2835_DMA_S_DREQ;
-- } else {
-- dev_addr = c->cfg.dst_addr;
-- dev_width = c->cfg.dst_addr_width;
-- sync_type = BCM2835_DMA_D_DREQ;
-- }
--
-- /* Bus width translates to the element size (ES) */
-- switch (dev_width) {
-- case DMA_SLAVE_BUSWIDTH_4_BYTES:
-- break;
-- default:
-- dev_err(chan->device->dev, "buswidth not supported: %i\n",
-- dev_width);
-- return NULL;
-- }
--
-- /* Allocate and setup the descriptor. */
-- d = kzalloc(sizeof(*d), GFP_NOWAIT);
-- if (!d)
-- return NULL;
--
-- d->dir = direction;
--
-- if (c->ch >= 8) /* LITE channel */
-- max_size = MAX_LITE_TRANSFER;
-- else
-- max_size = MAX_NORMAL_TRANSFER;
--
-- /*
-- * Store the length of the SG list in d->frames
-- * taking care to account for splitting up transfers
-- * too large for a LITE channel
-- */
-- d->frames = 0;
-- for_each_sg(sgl, sgent, sg_len, i) {
-- unsigned int len = sg_dma_len(sgent);
--
-- d->frames += len / max_size + 1;
-- }
--
-- /* Allocate memory for control blocks */
-- d->control_block_size = d->frames * sizeof(struct bcm2835_dma_cb);
-- d->control_block_base = dma_zalloc_coherent(chan->device->dev,
-- d->control_block_size, &d->control_block_base_phys,
-- GFP_NOWAIT);
-- if (!d->control_block_base) {
-- kfree(d);
-- return NULL;
-- }
--
-- /*
-- * Iterate over all SG entries, create a control block
-- * for each frame and link them together.
-- * Count the number of times an SG entry had to be split
-- * as a result of using a LITE channel
-- */
-- split_cnt = 0;
--
-- for_each_sg(sgl, sgent, sg_len, i) {
-- unsigned int j;
-- dma_addr_t addr = sg_dma_address(sgent);
-- unsigned int len = sg_dma_len(sgent);
--
-- for (j = 0; j < len; j += max_size) {
-- struct bcm2835_dma_cb *control_block =
-- &d->control_block_base[i + split_cnt];
--
-- /* Setup addresses */
-- if (d->dir == DMA_DEV_TO_MEM) {
-- control_block->info = BCM2835_DMA_D_INC |
-- BCM2835_DMA_D_WIDTH |
-- BCM2835_DMA_S_DREQ;
-- control_block->src = dev_addr;
-- control_block->dst = addr + (dma_addr_t)j;
-- } else {
-- control_block->info = BCM2835_DMA_S_INC |
-- BCM2835_DMA_S_WIDTH |
-- BCM2835_DMA_D_DREQ;
-- control_block->src = addr + (dma_addr_t)j;
-- control_block->dst = dev_addr;
-- }
--
-- /* Common part */
-- control_block->info |=
-- BCM2835_DMA_WAITS(BCM2835_DMA_WAIT_CYCLES);
-- control_block->info |= BCM2835_DMA_WAIT_RESP;
--
-- /* Enable */
-- if (i == sg_len - 1 && len - j <= max_size)
-- control_block->info |= BCM2835_DMA_INT_EN;
--
-- /* Setup synchronization */
-- if (sync_type)
-- control_block->info |= sync_type;
--
-- /* Setup DREQ channel */
-- if (c->dreq)
-- control_block->info |=
-- BCM2835_DMA_PER_MAP(c->dreq);
--
-- /* Length of a frame */
-- control_block->length = min(len - j, max_size);
-- d->size += control_block->length;
--
-- if (i < sg_len - 1 || len - j > max_size) {
-- /* Next block is the next frame. */
-- control_block->next =
-- d->control_block_base_phys +
-- sizeof(struct bcm2835_dma_cb) *
-- (i + split_cnt + 1);
-- } else {
-- /* Next block is empty. */
-- control_block->next = 0;
-- }
--
-- if (len - j > max_size)
-- split_cnt++;
-- }
-- }
--
-- c->cyclic = false;
--
- return vchan_tx_prep(&c->vc, &d->vd, flags);
- error_cb:
- i--;
-@@ -796,7 +620,6 @@ static int bcm2835_dma_probe(struct plat
- od->ddev.device_tx_status = bcm2835_dma_tx_status;
- od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
- od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
-- od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
- od->ddev.device_config = bcm2835_dma_slave_config;
- od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
- od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
-@@ -886,5 +709,4 @@ module_platform_driver(bcm2835_dma_drive
- MODULE_ALIAS("platform:bcm2835-dma");
- MODULE_DESCRIPTION("BCM2835 DMA engine driver");
- MODULE_AUTHOR("Florian Meier <florian.meier@koalo.de>");
--MODULE_AUTHOR("Gellert Weisz <gellert@raspberrypi.org>");
- MODULE_LICENSE("GPL v2");
--- /dev/null
+From 54ecedafe5c0a626888e781804ee54125e4cdea9 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:56 -0700
+Subject: [PATCH] dmaengine: bcm2835: remove unnecessary masking of dma
+ channels
+
+The original patch contained 3 dma channels that were masked out.
+
+These - as far as research and discussions show - are a
+artefacts remaining from the downstream legacy dma-api.
+
+Right now down-stream still includes a legacy api used only
+in a single (downstream only) driver (bcm2708_fb) that requires
+2D DMA for speedup (DMA-channel 0).
+Formerly the sd-card support driver also was using this legacy
+api (DMA-channel 2), but since has been moved over to use
+dmaengine directly.
+
+The DMA-channel 3 is already masked out in the devicetree in
+the default property "brcm,dma-channel-mask = <0x7f35>;"
+
+So we can remove the whole masking of DMA channels.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 9 ---------
+ 1 file changed, 9 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -123,9 +123,6 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_DATA_TYPE_S32 4
+ #define BCM2835_DMA_DATA_TYPE_S128 16
+
+-#define BCM2835_DMA_BULK_MASK BIT(0)
+-#define BCM2835_DMA_FIQ_MASK (BIT(2) | BIT(3))
+-
+ /* Valid only for channels 0 - 14, 15 has its own base address */
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+@@ -641,12 +638,6 @@ static int bcm2835_dma_probe(struct plat
+ goto err_no_dma;
+ }
+
+- /*
+- * Do not use the FIQ and BULK channels,
+- * because they are used by the GPU.
+- */
+- chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
+-
+ for (i = 0; i < pdev->num_resources; i++) {
+ irq = platform_get_irq(pdev, i);
+ if (irq < 0)
--- /dev/null
+From 2fe3ede60d3b88bb94ee1a100b5e771567db0962 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:57 -0700
+Subject: [PATCH] dmaengine: bcm2835: add additional defines for DMA-registers
+
+Add additional defines describing the DMA registers
+as well as adding some more documentation to those registers.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 57 ++++++++++++++++++++++++++++++++++++++++-------
+ 1 file changed, 49 insertions(+), 8 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -97,26 +97,67 @@ struct bcm2835_desc {
+
+ #define BCM2835_DMA_CS 0x00
+ #define BCM2835_DMA_ADDR 0x04
++#define BCM2835_DMA_TI 0x08
+ #define BCM2835_DMA_SOURCE_AD 0x0c
+ #define BCM2835_DMA_DEST_AD 0x10
+-#define BCM2835_DMA_NEXTCB 0x1C
++#define BCM2835_DMA_LEN 0x14
++#define BCM2835_DMA_STRIDE 0x18
++#define BCM2835_DMA_NEXTCB 0x1c
++#define BCM2835_DMA_DEBUG 0x20
+
+ /* DMA CS Control and Status bits */
+-#define BCM2835_DMA_ACTIVE BIT(0)
+-#define BCM2835_DMA_INT BIT(2)
++#define BCM2835_DMA_ACTIVE BIT(0) /* activate the DMA */
++#define BCM2835_DMA_END BIT(1) /* current CB has ended */
++#define BCM2835_DMA_INT BIT(2) /* interrupt status */
++#define BCM2835_DMA_DREQ BIT(3) /* DREQ state */
+ #define BCM2835_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
+ #define BCM2835_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
+-#define BCM2835_DMA_ERR BIT(8)
++#define BCM2835_DMA_WAITING_FOR_WRITES BIT(6) /* waiting for last
++ * AXI-write to ack
++ */
++#define BCM2835_DMA_ERR BIT(8)
++#define BCM2835_DMA_PRIORITY(x) ((x & 15) << 16) /* AXI priority */
++#define BCM2835_DMA_PANIC_PRIORITY(x) ((x & 15) << 20) /* panic priority */
++/* current value of TI.BCM2835_DMA_WAIT_RESP */
++#define BCM2835_DMA_WAIT_FOR_WRITES BIT(28)
++#define BCM2835_DMA_DIS_DEBUG BIT(29) /* disable debug pause signal */
+ #define BCM2835_DMA_ABORT BIT(30) /* Stop current CB, go to next, WO */
+ #define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
+
++/* Transfer information bits - also bcm2835_cb.info field */
+ #define BCM2835_DMA_INT_EN BIT(0)
++#define BCM2835_DMA_TDMODE BIT(1) /* 2D-Mode */
++#define BCM2835_DMA_WAIT_RESP BIT(3) /* wait for AXI-write to be acked */
+ #define BCM2835_DMA_D_INC BIT(4)
+-#define BCM2835_DMA_D_DREQ BIT(6)
++#define BCM2835_DMA_D_WIDTH BIT(5) /* 128bit writes if set */
++#define BCM2835_DMA_D_DREQ BIT(6) /* enable DREQ for destination */
++#define BCM2835_DMA_D_IGNORE BIT(7) /* ignore destination writes */
+ #define BCM2835_DMA_S_INC BIT(8)
+-#define BCM2835_DMA_S_DREQ BIT(10)
++#define BCM2835_DMA_S_WIDTH BIT(9) /* 128bit writes if set */
++#define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
++#define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
++#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
++#define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */
++#define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */
++#define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
+
+-#define BCM2835_DMA_PER_MAP(x) ((x) << 16)
++/* debug register bits */
++#define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
++#define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
++#define BCM2835_DMA_DEBUG_READ_ERR BIT(2)
++#define BCM2835_DMA_DEBUG_OUTSTANDING_WRITES_SHIFT 4
++#define BCM2835_DMA_DEBUG_OUTSTANDING_WRITES_BITS 4
++#define BCM2835_DMA_DEBUG_ID_SHIFT 16
++#define BCM2835_DMA_DEBUG_ID_BITS 9
++#define BCM2835_DMA_DEBUG_STATE_SHIFT 16
++#define BCM2835_DMA_DEBUG_STATE_BITS 9
++#define BCM2835_DMA_DEBUG_VERSION_SHIFT 25
++#define BCM2835_DMA_DEBUG_VERSION_BITS 3
++#define BCM2835_DMA_DEBUG_LITE BIT(28)
++
++/* shared registers for all dma channels */
++#define BCM2835_DMA_INT_STATUS 0xfe0
++#define BCM2835_DMA_ENABLE 0xff0
+
+ #define BCM2835_DMA_DATA_TYPE_S8 1
+ #define BCM2835_DMA_DATA_TYPE_S16 2
+++ /dev/null
-From 0f65c306a55ab6a8e8148b6d9c966a1d214ae3c9 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:24:56 -0700
-Subject: [PATCH] dmaengine: bcm2835: remove unnecessary masking of dma
- channels
-
-The original patch contained 3 dma channels that were masked out.
-
-These - as far as research and discussions show - are a
-artefacts remaining from the downstream legacy dma-api.
-
-Right now down-stream still includes a legacy api used only
-in a single (downstream only) driver (bcm2708_fb) that requires
-2D DMA for speedup (DMA-channel 0).
-Formerly the sd-card support driver also was using this legacy
-api (DMA-channel 2), but since has been moved over to use
-dmaengine directly.
-
-The DMA-channel 3 is already masked out in the devicetree in
-the default property "brcm,dma-channel-mask = <0x7f35>;"
-
-So we can remove the whole masking of DMA channels.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -123,9 +123,6 @@ struct bcm2835_desc {
- #define BCM2835_DMA_DATA_TYPE_S32 4
- #define BCM2835_DMA_DATA_TYPE_S128 16
-
--#define BCM2835_DMA_BULK_MASK BIT(0)
--#define BCM2835_DMA_FIQ_MASK (BIT(2) | BIT(3))
--
- /* Valid only for channels 0 - 14, 15 has its own base address */
- #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
- #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
-@@ -641,12 +638,6 @@ static int bcm2835_dma_probe(struct plat
- goto err_no_dma;
- }
-
-- /*
-- * Do not use the FIQ and BULK channels,
-- * because they are used by the GPU.
-- */
-- chans_available &= ~(BCM2835_DMA_FIQ_MASK | BCM2835_DMA_BULK_MASK);
--
- for (i = 0; i < pdev->num_resources; i++) {
- irq = platform_get_irq(pdev, i);
- if (irq < 0)
+++ /dev/null
-From 2e9daa8fabdef7a31da63f9a532105d94ade48ae Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:24:57 -0700
-Subject: [PATCH] dmaengine: bcm2835: add additional defines for DMA-registers
-
-Add additional defines describing the DMA registers
-as well as adding some more documentation to those registers.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 57 ++++++++++++++++++++++++++++++++++++++++-------
- 1 file changed, 49 insertions(+), 8 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -97,26 +97,67 @@ struct bcm2835_desc {
-
- #define BCM2835_DMA_CS 0x00
- #define BCM2835_DMA_ADDR 0x04
-+#define BCM2835_DMA_TI 0x08
- #define BCM2835_DMA_SOURCE_AD 0x0c
- #define BCM2835_DMA_DEST_AD 0x10
--#define BCM2835_DMA_NEXTCB 0x1C
-+#define BCM2835_DMA_LEN 0x14
-+#define BCM2835_DMA_STRIDE 0x18
-+#define BCM2835_DMA_NEXTCB 0x1c
-+#define BCM2835_DMA_DEBUG 0x20
-
- /* DMA CS Control and Status bits */
--#define BCM2835_DMA_ACTIVE BIT(0)
--#define BCM2835_DMA_INT BIT(2)
-+#define BCM2835_DMA_ACTIVE BIT(0) /* activate the DMA */
-+#define BCM2835_DMA_END BIT(1) /* current CB has ended */
-+#define BCM2835_DMA_INT BIT(2) /* interrupt status */
-+#define BCM2835_DMA_DREQ BIT(3) /* DREQ state */
- #define BCM2835_DMA_ISPAUSED BIT(4) /* Pause requested or not active */
- #define BCM2835_DMA_ISHELD BIT(5) /* Is held by DREQ flow control */
--#define BCM2835_DMA_ERR BIT(8)
-+#define BCM2835_DMA_WAITING_FOR_WRITES BIT(6) /* waiting for last
-+ * AXI-write to ack
-+ */
-+#define BCM2835_DMA_ERR BIT(8)
-+#define BCM2835_DMA_PRIORITY(x) ((x & 15) << 16) /* AXI priority */
-+#define BCM2835_DMA_PANIC_PRIORITY(x) ((x & 15) << 20) /* panic priority */
-+/* current value of TI.BCM2835_DMA_WAIT_RESP */
-+#define BCM2835_DMA_WAIT_FOR_WRITES BIT(28)
-+#define BCM2835_DMA_DIS_DEBUG BIT(29) /* disable debug pause signal */
- #define BCM2835_DMA_ABORT BIT(30) /* Stop current CB, go to next, WO */
- #define BCM2835_DMA_RESET BIT(31) /* WO, self clearing */
-
-+/* Transfer information bits - also bcm2835_cb.info field */
- #define BCM2835_DMA_INT_EN BIT(0)
-+#define BCM2835_DMA_TDMODE BIT(1) /* 2D-Mode */
-+#define BCM2835_DMA_WAIT_RESP BIT(3) /* wait for AXI-write to be acked */
- #define BCM2835_DMA_D_INC BIT(4)
--#define BCM2835_DMA_D_DREQ BIT(6)
-+#define BCM2835_DMA_D_WIDTH BIT(5) /* 128bit writes if set */
-+#define BCM2835_DMA_D_DREQ BIT(6) /* enable DREQ for destination */
-+#define BCM2835_DMA_D_IGNORE BIT(7) /* ignore destination writes */
- #define BCM2835_DMA_S_INC BIT(8)
--#define BCM2835_DMA_S_DREQ BIT(10)
-+#define BCM2835_DMA_S_WIDTH BIT(9) /* 128bit writes if set */
-+#define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */
-+#define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */
-+#define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12)
-+#define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */
-+#define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */
-+#define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
-
--#define BCM2835_DMA_PER_MAP(x) ((x) << 16)
-+/* debug register bits */
-+#define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
-+#define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
-+#define BCM2835_DMA_DEBUG_READ_ERR BIT(2)
-+#define BCM2835_DMA_DEBUG_OUTSTANDING_WRITES_SHIFT 4
-+#define BCM2835_DMA_DEBUG_OUTSTANDING_WRITES_BITS 4
-+#define BCM2835_DMA_DEBUG_ID_SHIFT 16
-+#define BCM2835_DMA_DEBUG_ID_BITS 9
-+#define BCM2835_DMA_DEBUG_STATE_SHIFT 16
-+#define BCM2835_DMA_DEBUG_STATE_BITS 9
-+#define BCM2835_DMA_DEBUG_VERSION_SHIFT 25
-+#define BCM2835_DMA_DEBUG_VERSION_BITS 3
-+#define BCM2835_DMA_DEBUG_LITE BIT(28)
-+
-+/* shared registers for all dma channels */
-+#define BCM2835_DMA_INT_STATUS 0xfe0
-+#define BCM2835_DMA_ENABLE 0xff0
-
- #define BCM2835_DMA_DATA_TYPE_S8 1
- #define BCM2835_DMA_DATA_TYPE_S16 2
--- /dev/null
+From 1a9dffc1772e2c6be450149fe1a0114a778132ef Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:58 -0700
+Subject: [PATCH] dmaengine: bcm2835: move cyclic member from bcm2835_chan into
+ bcm2835_desc
+
+In preparation to consolidating code we move the cyclic member
+into the bcm_2835_desc structure.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -73,7 +73,6 @@ struct bcm2835_chan {
+ struct list_head node;
+
+ struct dma_slave_config cfg;
+- bool cyclic;
+ unsigned int dreq;
+
+ int ch;
+@@ -93,6 +92,8 @@ struct bcm2835_desc {
+
+ unsigned int frames;
+ size_t size;
++
++ bool cyclic;
+ };
+
+ #define BCM2835_DMA_CS 0x00
+@@ -377,8 +378,6 @@ static void bcm2835_dma_issue_pending(st
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ unsigned long flags;
+
+- c->cyclic = true; /* Nothing else is implemented */
+-
+ spin_lock_irqsave(&c->vc.lock, flags);
+ if (vchan_issue_pending(&c->vc) && !c->desc)
+ bcm2835_dma_start_desc(c);
+@@ -432,6 +431,7 @@ static struct dma_async_tx_descriptor *b
+ d->c = c;
+ d->dir = direction;
+ d->frames = buf_len / period_len;
++ d->cyclic = true;
+
+ d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+ if (!d->cb_list) {
--- /dev/null
+From 79ef7f167c859ce2a11b1bb69fbfca786504d6d7 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:24:59 -0700
+Subject: [PATCH] dmaengine: bcm2835: move controlblock chain generation into
+ separate method
+
+In preparation of adding slave_sg functionality this patch moves the
+generation/allocation of bcm2835_desc and the building of
+the corresponding DMA-control-block chain from bcm2835_dma_prep_dma_cyclic
+into the newly created method bcm2835_dma_create_cb_chain.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 294 +++++++++++++++++++++++++++++++---------------
+ 1 file changed, 198 insertions(+), 96 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -88,12 +88,12 @@ struct bcm2835_desc {
+ struct virt_dma_desc vd;
+ enum dma_transfer_direction dir;
+
+- struct bcm2835_cb_entry *cb_list;
+-
+ unsigned int frames;
+ size_t size;
+
+ bool cyclic;
++
++ struct bcm2835_cb_entry cb_list[];
+ };
+
+ #define BCM2835_DMA_CS 0x00
+@@ -169,6 +169,13 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+
++/* how many frames of max_len size do we need to transfer len bytes */
++static inline size_t bcm2835_dma_frames_for_length(size_t len,
++ size_t max_len)
++{
++ return DIV_ROUND_UP(len, max_len);
++}
++
+ static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
+ {
+ return container_of(d, struct bcm2835_dmadev, ddev);
+@@ -185,19 +192,161 @@ static inline struct bcm2835_desc *to_bc
+ return container_of(t, struct bcm2835_desc, vd.tx);
+ }
+
+-static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
++static void bcm2835_dma_free_cb_chain(struct bcm2835_desc *desc)
+ {
+- struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd);
+- int i;
++ size_t i;
+
+ for (i = 0; i < desc->frames; i++)
+ dma_pool_free(desc->c->cb_pool, desc->cb_list[i].cb,
+ desc->cb_list[i].paddr);
+
+- kfree(desc->cb_list);
+ kfree(desc);
+ }
+
++static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
++{
++ bcm2835_dma_free_cb_chain(
++ container_of(vd, struct bcm2835_desc, vd));
++}
++
++static void bcm2835_dma_create_cb_set_length(
++ struct bcm2835_chan *chan,
++ struct bcm2835_dma_cb *control_block,
++ size_t len,
++ size_t period_len,
++ size_t *total_len,
++ u32 finalextrainfo)
++{
++ /* set the length */
++ control_block->length = len;
++
++ /* finished if we have no period_length */
++ if (!period_len)
++ return;
++
++ /*
++ * period_len means: that we need to generate
++ * transfers that are terminating at every
++ * multiple of period_len - this is typically
++ * used to set the interrupt flag in info
++ * which is required during cyclic transfers
++ */
++
++ /* have we filled in period_length yet? */
++ if (*total_len + control_block->length < period_len)
++ return;
++
++ /* calculate the length that remains to reach period_length */
++ control_block->length = period_len - *total_len;
++
++ /* reset total_length for next period */
++ *total_len = 0;
++
++ /* add extrainfo bits in info */
++ control_block->info |= finalextrainfo;
++}
++
++/**
++ * bcm2835_dma_create_cb_chain - create a control block and fills data in
++ *
++ * @chan: the @dma_chan for which we run this
++ * @direction: the direction in which we transfer
++ * @cyclic: it is a cyclic transfer
++ * @info: the default info bits to apply per controlblock
++ * @frames: number of controlblocks to allocate
++ * @src: the src address to assign (if the S_INC bit is set
++ * in @info, then it gets incremented)
++ * @dst: the dst address to assign (if the D_INC bit is set
++ * in @info, then it gets incremented)
++ * @buf_len: the full buffer length (may also be 0)
++ * @period_len: the period length when to apply @finalextrainfo
++ * in addition to the last transfer
++ * this will also break some control-blocks early
++ * @finalextrainfo: additional bits in last controlblock
++ * (or when period_len is reached in case of cyclic)
++ * @gfp: the GFP flag to use for allocation
++ */
++static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
++ struct dma_chan *chan, enum dma_transfer_direction direction,
++ bool cyclic, u32 info, u32 finalextrainfo, size_t frames,
++ dma_addr_t src, dma_addr_t dst, size_t buf_len,
++ size_t period_len, gfp_t gfp)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ size_t len = buf_len, total_len;
++ size_t frame;
++ struct bcm2835_desc *d;
++ struct bcm2835_cb_entry *cb_entry;
++ struct bcm2835_dma_cb *control_block;
++
++ /* allocate and setup the descriptor. */
++ d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
++ gfp);
++ if (!d)
++ return NULL;
++
++ d->c = c;
++ d->dir = direction;
++ d->cyclic = cyclic;
++
++ /*
++ * Iterate over all frames, create a control block
++ * for each frame and link them together.
++ */
++ for (frame = 0, total_len = 0; frame < frames; d->frames++, frame++) {
++ cb_entry = &d->cb_list[frame];
++ cb_entry->cb = dma_pool_alloc(c->cb_pool, gfp,
++ &cb_entry->paddr);
++ if (!cb_entry->cb)
++ goto error_cb;
++
++ /* fill in the control block */
++ control_block = cb_entry->cb;
++ control_block->info = info;
++ control_block->src = src;
++ control_block->dst = dst;
++ control_block->stride = 0;
++ control_block->next = 0;
++ /* set up length in control_block if requested */
++ if (buf_len) {
++ /* calculate length honoring period_length */
++ bcm2835_dma_create_cb_set_length(
++ c, control_block,
++ len, period_len, &total_len,
++ cyclic ? finalextrainfo : 0);
++
++ /* calculate new remaining length */
++ len -= control_block->length;
++ }
++
++ /* link this the last controlblock */
++ if (frame)
++ d->cb_list[frame - 1].cb->next = cb_entry->paddr;
++
++ /* update src and dst and length */
++ if (src && (info & BCM2835_DMA_S_INC))
++ src += control_block->length;
++ if (dst && (info & BCM2835_DMA_D_INC))
++ dst += control_block->length;
++
++ /* Length of total transfer */
++ d->size += control_block->length;
++ }
++
++ /* the last frame requires extra flags */
++ d->cb_list[d->frames - 1].cb->info |= finalextrainfo;
++
++ /* detect a size missmatch */
++ if (buf_len && (d->size != buf_len))
++ goto error_cb;
++
++ return d;
++error_cb:
++ bcm2835_dma_free_cb_chain(d);
++
++ return NULL;
++}
++
+ static int bcm2835_dma_abort(void __iomem *chan_base)
+ {
+ unsigned long cs;
+@@ -391,12 +540,11 @@ static struct dma_async_tx_descriptor *b
+ unsigned long flags)
+ {
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+- enum dma_slave_buswidth dev_width;
+ struct bcm2835_desc *d;
+- dma_addr_t dev_addr;
+- unsigned int es, sync_type;
+- unsigned int frame;
+- int i;
++ dma_addr_t src, dst;
++ u32 info = BCM2835_DMA_WAIT_RESP;
++ u32 extra = BCM2835_DMA_INT_EN;
++ size_t frames;
+
+ /* Grab configuration */
+ if (!is_slave_direction(direction)) {
+@@ -404,104 +552,58 @@ static struct dma_async_tx_descriptor *b
+ return NULL;
+ }
+
+- if (direction == DMA_DEV_TO_MEM) {
+- dev_addr = c->cfg.src_addr;
+- dev_width = c->cfg.src_addr_width;
+- sync_type = BCM2835_DMA_S_DREQ;
+- } else {
+- dev_addr = c->cfg.dst_addr;
+- dev_width = c->cfg.dst_addr_width;
+- sync_type = BCM2835_DMA_D_DREQ;
+- }
+-
+- /* Bus width translates to the element size (ES) */
+- switch (dev_width) {
+- case DMA_SLAVE_BUSWIDTH_4_BYTES:
+- es = BCM2835_DMA_DATA_TYPE_S32;
+- break;
+- default:
++ if (!buf_len) {
++ dev_err(chan->device->dev,
++ "%s: bad buffer length (= 0)\n", __func__);
+ return NULL;
+ }
+
+- /* Now allocate and setup the descriptor. */
+- d = kzalloc(sizeof(*d), GFP_NOWAIT);
+- if (!d)
+- return NULL;
+-
+- d->c = c;
+- d->dir = direction;
+- d->frames = buf_len / period_len;
+- d->cyclic = true;
++ /*
++ * warn if buf_len is not a multiple of period_len - this may leed
++ * to unexpected latencies for interrupts and thus audiable clicks
++ */
++ if (buf_len % period_len)
++ dev_warn_once(chan->device->dev,
++ "%s: buffer_length (%zd) is not a multiple of period_len (%zd)\n",
++ __func__, buf_len, period_len);
++
++ /* Setup DREQ channel */
++ if (c->dreq != 0)
++ info |= BCM2835_DMA_PER_MAP(c->dreq);
+
+- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
+- if (!d->cb_list) {
+- kfree(d);
+- return NULL;
++ if (direction == DMA_DEV_TO_MEM) {
++ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ src = c->cfg.src_addr;
++ dst = buf_addr;
++ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
++ } else {
++ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ dst = c->cfg.dst_addr;
++ src = buf_addr;
++ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
+ }
+- /* Allocate memory for control blocks */
+- for (i = 0; i < d->frames; i++) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+
+- cb_entry->cb = dma_pool_zalloc(c->cb_pool, GFP_ATOMIC,
+- &cb_entry->paddr);
+- if (!cb_entry->cb)
+- goto error_cb;
+- }
++ /* calculate number of frames */
++ frames = DIV_ROUND_UP(buf_len, period_len);
+
+ /*
+- * Iterate over all frames, create a control block
+- * for each frame and link them together.
++ * allocate the CB chain
++ * note that we need to use GFP_NOWAIT, as the ALSA i2s dmaengine
++ * implementation calls prep_dma_cyclic with interrupts disabled.
+ */
+- for (frame = 0; frame < d->frames; frame++) {
+- struct bcm2835_dma_cb *control_block = d->cb_list[frame].cb;
+-
+- /* Setup adresses */
+- if (d->dir == DMA_DEV_TO_MEM) {
+- control_block->info = BCM2835_DMA_D_INC;
+- control_block->src = dev_addr;
+- control_block->dst = buf_addr + frame * period_len;
+- } else {
+- control_block->info = BCM2835_DMA_S_INC;
+- control_block->src = buf_addr + frame * period_len;
+- control_block->dst = dev_addr;
+- }
+-
+- /* Enable interrupt */
+- control_block->info |= BCM2835_DMA_INT_EN;
+-
+- /* Setup synchronization */
+- if (sync_type != 0)
+- control_block->info |= sync_type;
+-
+- /* Setup DREQ channel */
+- if (c->dreq != 0)
+- control_block->info |=
+- BCM2835_DMA_PER_MAP(c->dreq);
+-
+- /* Length of a frame */
+- control_block->length = period_len;
+- d->size += control_block->length;
++ d = bcm2835_dma_create_cb_chain(chan, direction, true,
++ info, extra,
++ frames, src, dst, buf_len,
++ period_len, GFP_NOWAIT);
++ if (!d)
++ return NULL;
+
+- /*
+- * Next block is the next frame.
+- * This DMA engine driver currently only supports cyclic DMA.
+- * Therefore, wrap around at number of frames.
+- */
+- control_block->next = d->cb_list[((frame + 1) % d->frames)].paddr;
+- }
++ /* wrap around into a loop */
++ d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr;
+
+ return vchan_tx_prep(&c->vc, &d->vd, flags);
+-error_cb:
+- i--;
+- for (; i >= 0; i--) {
+- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
+-
+- dma_pool_free(c->cb_pool, cb_entry->cb, cb_entry->paddr);
+- }
+-
+- kfree(d->cb_list);
+- kfree(d);
+- return NULL;
+ }
+
+ static int bcm2835_dma_slave_config(struct dma_chan *chan,
+++ /dev/null
-From 45a5aa455ea243c3daf0d1bdbfdb83787ae95249 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:24:58 -0700
-Subject: [PATCH] dmaengine: bcm2835: move cyclic member from bcm2835_chan into
- bcm2835_desc
-
-In preparation to consolidating code we move the cyclic member
-into the bcm_2835_desc structure.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -73,7 +73,6 @@ struct bcm2835_chan {
- struct list_head node;
-
- struct dma_slave_config cfg;
-- bool cyclic;
- unsigned int dreq;
-
- int ch;
-@@ -93,6 +92,8 @@ struct bcm2835_desc {
-
- unsigned int frames;
- size_t size;
-+
-+ bool cyclic;
- };
-
- #define BCM2835_DMA_CS 0x00
-@@ -377,8 +378,6 @@ static void bcm2835_dma_issue_pending(st
- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
- unsigned long flags;
-
-- c->cyclic = true; /* Nothing else is implemented */
--
- spin_lock_irqsave(&c->vc.lock, flags);
- if (vchan_issue_pending(&c->vc) && !c->desc)
- bcm2835_dma_start_desc(c);
-@@ -432,6 +431,7 @@ static struct dma_async_tx_descriptor *b
- d->c = c;
- d->dir = direction;
- d->frames = buf_len / period_len;
-+ d->cyclic = true;
-
- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
- if (!d->cb_list) {
--- /dev/null
+From 690414c3621a694fc4ace6775ae3c11e64da2895 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:25:00 -0700
+Subject: [PATCH] dmaengine: bcm2835: limit max length based on channel type
+
+The bcm2835 dma system has 2 basic types of dma-channels:
+* "normal" channels
+* "light" channels
+
+Lite channels are limited in several aspects:
+* internal data-structure is 128 bit (not 256)
+* does not support BCM2835_DMA_TDMODE (2D)
+* DMA length register is limited to 16 bit.
+ so 0-65535 (not 0-65536 as mentioned in the official datasheet)
+* BCM2835_DMA_S/D_IGNORE are not supported
+
+The detection of the type of mode is implemented by looking at
+the LITE bit in the DEBUG register for each channel.
+This allows automatic detection.
+
+Based on this the maximum block size is set to (64K - 4) or to 1G
+and this limit is honored during generation of control block
+chains. The effect is that when a LITE channel is used more
+control blocks are used to do the same transfer (compared
+to a normal channel).
+
+As there are several sources/target DREQS that are 32 bit wide
+we need to have the transfer to be a multiple of 4 as this would
+break the transfer otherwise.
+
+This is why the limit of (64K - 4) was chosen over the
+alternative of (64K - 4K).
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 29 ++++++++++++++++++++++++++---
+ 1 file changed, 26 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -81,6 +81,8 @@ struct bcm2835_chan {
+
+ void __iomem *chan_base;
+ int irq_number;
++
++ bool is_lite_channel;
+ };
+
+ struct bcm2835_desc {
+@@ -169,6 +171,16 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
+ #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
+
++/* the max dma length for different channels */
++#define MAX_DMA_LEN SZ_1G
++#define MAX_LITE_DMA_LEN (SZ_64K - 4)
++
++static inline size_t bcm2835_dma_max_frame_length(struct bcm2835_chan *c)
++{
++ /* lite and normal channels have different max frame length */
++ return c->is_lite_channel ? MAX_LITE_DMA_LEN : MAX_DMA_LEN;
++}
++
+ /* how many frames of max_len size do we need to transfer len bytes */
+ static inline size_t bcm2835_dma_frames_for_length(size_t len,
+ size_t max_len)
+@@ -217,8 +229,10 @@ static void bcm2835_dma_create_cb_set_le
+ size_t *total_len,
+ u32 finalextrainfo)
+ {
+- /* set the length */
+- control_block->length = len;
++ size_t max_len = bcm2835_dma_max_frame_length(chan);
++
++ /* set the length taking lite-channel limitations into account */
++ control_block->length = min_t(u32, len, max_len);
+
+ /* finished if we have no period_length */
+ if (!period_len)
+@@ -544,6 +558,7 @@ static struct dma_async_tx_descriptor *b
+ dma_addr_t src, dst;
+ u32 info = BCM2835_DMA_WAIT_RESP;
+ u32 extra = BCM2835_DMA_INT_EN;
++ size_t max_len = bcm2835_dma_max_frame_length(c);
+ size_t frames;
+
+ /* Grab configuration */
+@@ -586,7 +601,10 @@ static struct dma_async_tx_descriptor *b
+ }
+
+ /* calculate number of frames */
+- frames = DIV_ROUND_UP(buf_len, period_len);
++ frames = /* number of periods */
++ DIV_ROUND_UP(buf_len, period_len) *
++ /* number of frames per period */
++ bcm2835_dma_frames_for_length(period_len, max_len);
+
+ /*
+ * allocate the CB chain
+@@ -685,6 +703,11 @@ static int bcm2835_dma_chan_init(struct
+ c->ch = chan_id;
+ c->irq_number = irq;
+
++ /* check in DEBUG register if this is a LITE channel */
++ if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
++ BCM2835_DMA_DEBUG_LITE)
++ c->is_lite_channel = true;
++
+ return 0;
+ }
+
+++ /dev/null
-From a41b5c7005c6880ac91b9e08062c6b6813df758e Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:24:59 -0700
-Subject: [PATCH] dmaengine: bcm2835: move controlblock chain generation into
- separate method
-
-In preparation of adding slave_sg functionality this patch moves the
-generation/allocation of bcm2835_desc and the building of
-the corresponding DMA-control-block chain from bcm2835_dma_prep_dma_cyclic
-into the newly created method bcm2835_dma_create_cb_chain.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 294 +++++++++++++++++++++++++++++++---------------
- 1 file changed, 198 insertions(+), 96 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -88,12 +88,12 @@ struct bcm2835_desc {
- struct virt_dma_desc vd;
- enum dma_transfer_direction dir;
-
-- struct bcm2835_cb_entry *cb_list;
--
- unsigned int frames;
- size_t size;
-
- bool cyclic;
-+
-+ struct bcm2835_cb_entry cb_list[];
- };
-
- #define BCM2835_DMA_CS 0x00
-@@ -169,6 +169,13 @@ struct bcm2835_desc {
- #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
- #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
-
-+/* how many frames of max_len size do we need to transfer len bytes */
-+static inline size_t bcm2835_dma_frames_for_length(size_t len,
-+ size_t max_len)
-+{
-+ return DIV_ROUND_UP(len, max_len);
-+}
-+
- static inline struct bcm2835_dmadev *to_bcm2835_dma_dev(struct dma_device *d)
- {
- return container_of(d, struct bcm2835_dmadev, ddev);
-@@ -185,19 +192,161 @@ static inline struct bcm2835_desc *to_bc
- return container_of(t, struct bcm2835_desc, vd.tx);
- }
-
--static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
-+static void bcm2835_dma_free_cb_chain(struct bcm2835_desc *desc)
- {
-- struct bcm2835_desc *desc = container_of(vd, struct bcm2835_desc, vd);
-- int i;
-+ size_t i;
-
- for (i = 0; i < desc->frames; i++)
- dma_pool_free(desc->c->cb_pool, desc->cb_list[i].cb,
- desc->cb_list[i].paddr);
-
-- kfree(desc->cb_list);
- kfree(desc);
- }
-
-+static void bcm2835_dma_desc_free(struct virt_dma_desc *vd)
-+{
-+ bcm2835_dma_free_cb_chain(
-+ container_of(vd, struct bcm2835_desc, vd));
-+}
-+
-+static void bcm2835_dma_create_cb_set_length(
-+ struct bcm2835_chan *chan,
-+ struct bcm2835_dma_cb *control_block,
-+ size_t len,
-+ size_t period_len,
-+ size_t *total_len,
-+ u32 finalextrainfo)
-+{
-+ /* set the length */
-+ control_block->length = len;
-+
-+ /* finished if we have no period_length */
-+ if (!period_len)
-+ return;
-+
-+ /*
-+ * period_len means: that we need to generate
-+ * transfers that are terminating at every
-+ * multiple of period_len - this is typically
-+ * used to set the interrupt flag in info
-+ * which is required during cyclic transfers
-+ */
-+
-+ /* have we filled in period_length yet? */
-+ if (*total_len + control_block->length < period_len)
-+ return;
-+
-+ /* calculate the length that remains to reach period_length */
-+ control_block->length = period_len - *total_len;
-+
-+ /* reset total_length for next period */
-+ *total_len = 0;
-+
-+ /* add extrainfo bits in info */
-+ control_block->info |= finalextrainfo;
-+}
-+
-+/**
-+ * bcm2835_dma_create_cb_chain - create a control block and fills data in
-+ *
-+ * @chan: the @dma_chan for which we run this
-+ * @direction: the direction in which we transfer
-+ * @cyclic: it is a cyclic transfer
-+ * @info: the default info bits to apply per controlblock
-+ * @frames: number of controlblocks to allocate
-+ * @src: the src address to assign (if the S_INC bit is set
-+ * in @info, then it gets incremented)
-+ * @dst: the dst address to assign (if the D_INC bit is set
-+ * in @info, then it gets incremented)
-+ * @buf_len: the full buffer length (may also be 0)
-+ * @period_len: the period length when to apply @finalextrainfo
-+ * in addition to the last transfer
-+ * this will also break some control-blocks early
-+ * @finalextrainfo: additional bits in last controlblock
-+ * (or when period_len is reached in case of cyclic)
-+ * @gfp: the GFP flag to use for allocation
-+ */
-+static struct bcm2835_desc *bcm2835_dma_create_cb_chain(
-+ struct dma_chan *chan, enum dma_transfer_direction direction,
-+ bool cyclic, u32 info, u32 finalextrainfo, size_t frames,
-+ dma_addr_t src, dma_addr_t dst, size_t buf_len,
-+ size_t period_len, gfp_t gfp)
-+{
-+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
-+ size_t len = buf_len, total_len;
-+ size_t frame;
-+ struct bcm2835_desc *d;
-+ struct bcm2835_cb_entry *cb_entry;
-+ struct bcm2835_dma_cb *control_block;
-+
-+ /* allocate and setup the descriptor. */
-+ d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
-+ gfp);
-+ if (!d)
-+ return NULL;
-+
-+ d->c = c;
-+ d->dir = direction;
-+ d->cyclic = cyclic;
-+
-+ /*
-+ * Iterate over all frames, create a control block
-+ * for each frame and link them together.
-+ */
-+ for (frame = 0, total_len = 0; frame < frames; d->frames++, frame++) {
-+ cb_entry = &d->cb_list[frame];
-+ cb_entry->cb = dma_pool_alloc(c->cb_pool, gfp,
-+ &cb_entry->paddr);
-+ if (!cb_entry->cb)
-+ goto error_cb;
-+
-+ /* fill in the control block */
-+ control_block = cb_entry->cb;
-+ control_block->info = info;
-+ control_block->src = src;
-+ control_block->dst = dst;
-+ control_block->stride = 0;
-+ control_block->next = 0;
-+ /* set up length in control_block if requested */
-+ if (buf_len) {
-+ /* calculate length honoring period_length */
-+ bcm2835_dma_create_cb_set_length(
-+ c, control_block,
-+ len, period_len, &total_len,
-+ cyclic ? finalextrainfo : 0);
-+
-+ /* calculate new remaining length */
-+ len -= control_block->length;
-+ }
-+
-+ /* link this the last controlblock */
-+ if (frame)
-+ d->cb_list[frame - 1].cb->next = cb_entry->paddr;
-+
-+ /* update src and dst and length */
-+ if (src && (info & BCM2835_DMA_S_INC))
-+ src += control_block->length;
-+ if (dst && (info & BCM2835_DMA_D_INC))
-+ dst += control_block->length;
-+
-+ /* Length of total transfer */
-+ d->size += control_block->length;
-+ }
-+
-+ /* the last frame requires extra flags */
-+ d->cb_list[d->frames - 1].cb->info |= finalextrainfo;
-+
-+ /* detect a size missmatch */
-+ if (buf_len && (d->size != buf_len))
-+ goto error_cb;
-+
-+ return d;
-+error_cb:
-+ bcm2835_dma_free_cb_chain(d);
-+
-+ return NULL;
-+}
-+
- static int bcm2835_dma_abort(void __iomem *chan_base)
- {
- unsigned long cs;
-@@ -391,12 +540,11 @@ static struct dma_async_tx_descriptor *b
- unsigned long flags)
- {
- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
-- enum dma_slave_buswidth dev_width;
- struct bcm2835_desc *d;
-- dma_addr_t dev_addr;
-- unsigned int es, sync_type;
-- unsigned int frame;
-- int i;
-+ dma_addr_t src, dst;
-+ u32 info = BCM2835_DMA_WAIT_RESP;
-+ u32 extra = BCM2835_DMA_INT_EN;
-+ size_t frames;
-
- /* Grab configuration */
- if (!is_slave_direction(direction)) {
-@@ -404,104 +552,58 @@ static struct dma_async_tx_descriptor *b
- return NULL;
- }
-
-- if (direction == DMA_DEV_TO_MEM) {
-- dev_addr = c->cfg.src_addr;
-- dev_width = c->cfg.src_addr_width;
-- sync_type = BCM2835_DMA_S_DREQ;
-- } else {
-- dev_addr = c->cfg.dst_addr;
-- dev_width = c->cfg.dst_addr_width;
-- sync_type = BCM2835_DMA_D_DREQ;
-- }
--
-- /* Bus width translates to the element size (ES) */
-- switch (dev_width) {
-- case DMA_SLAVE_BUSWIDTH_4_BYTES:
-- es = BCM2835_DMA_DATA_TYPE_S32;
-- break;
-- default:
-+ if (!buf_len) {
-+ dev_err(chan->device->dev,
-+ "%s: bad buffer length (= 0)\n", __func__);
- return NULL;
- }
-
-- /* Now allocate and setup the descriptor. */
-- d = kzalloc(sizeof(*d), GFP_NOWAIT);
-- if (!d)
-- return NULL;
--
-- d->c = c;
-- d->dir = direction;
-- d->frames = buf_len / period_len;
-- d->cyclic = true;
-+ /*
-+ * warn if buf_len is not a multiple of period_len - this may leed
-+ * to unexpected latencies for interrupts and thus audiable clicks
-+ */
-+ if (buf_len % period_len)
-+ dev_warn_once(chan->device->dev,
-+ "%s: buffer_length (%zd) is not a multiple of period_len (%zd)\n",
-+ __func__, buf_len, period_len);
-+
-+ /* Setup DREQ channel */
-+ if (c->dreq != 0)
-+ info |= BCM2835_DMA_PER_MAP(c->dreq);
-
-- d->cb_list = kcalloc(d->frames, sizeof(*d->cb_list), GFP_KERNEL);
-- if (!d->cb_list) {
-- kfree(d);
-- return NULL;
-+ if (direction == DMA_DEV_TO_MEM) {
-+ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
-+ return NULL;
-+ src = c->cfg.src_addr;
-+ dst = buf_addr;
-+ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
-+ } else {
-+ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
-+ return NULL;
-+ dst = c->cfg.dst_addr;
-+ src = buf_addr;
-+ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
- }
-- /* Allocate memory for control blocks */
-- for (i = 0; i < d->frames; i++) {
-- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
-
-- cb_entry->cb = dma_pool_zalloc(c->cb_pool, GFP_ATOMIC,
-- &cb_entry->paddr);
-- if (!cb_entry->cb)
-- goto error_cb;
-- }
-+ /* calculate number of frames */
-+ frames = DIV_ROUND_UP(buf_len, period_len);
-
- /*
-- * Iterate over all frames, create a control block
-- * for each frame and link them together.
-+ * allocate the CB chain
-+ * note that we need to use GFP_NOWAIT, as the ALSA i2s dmaengine
-+ * implementation calls prep_dma_cyclic with interrupts disabled.
- */
-- for (frame = 0; frame < d->frames; frame++) {
-- struct bcm2835_dma_cb *control_block = d->cb_list[frame].cb;
--
-- /* Setup adresses */
-- if (d->dir == DMA_DEV_TO_MEM) {
-- control_block->info = BCM2835_DMA_D_INC;
-- control_block->src = dev_addr;
-- control_block->dst = buf_addr + frame * period_len;
-- } else {
-- control_block->info = BCM2835_DMA_S_INC;
-- control_block->src = buf_addr + frame * period_len;
-- control_block->dst = dev_addr;
-- }
--
-- /* Enable interrupt */
-- control_block->info |= BCM2835_DMA_INT_EN;
--
-- /* Setup synchronization */
-- if (sync_type != 0)
-- control_block->info |= sync_type;
--
-- /* Setup DREQ channel */
-- if (c->dreq != 0)
-- control_block->info |=
-- BCM2835_DMA_PER_MAP(c->dreq);
--
-- /* Length of a frame */
-- control_block->length = period_len;
-- d->size += control_block->length;
-+ d = bcm2835_dma_create_cb_chain(chan, direction, true,
-+ info, extra,
-+ frames, src, dst, buf_len,
-+ period_len, GFP_NOWAIT);
-+ if (!d)
-+ return NULL;
-
-- /*
-- * Next block is the next frame.
-- * This DMA engine driver currently only supports cyclic DMA.
-- * Therefore, wrap around at number of frames.
-- */
-- control_block->next = d->cb_list[((frame + 1) % d->frames)].paddr;
-- }
-+ /* wrap around into a loop */
-+ d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr;
-
- return vchan_tx_prep(&c->vc, &d->vd, flags);
--error_cb:
-- i--;
-- for (; i >= 0; i--) {
-- struct bcm2835_cb_entry *cb_entry = &d->cb_list[i];
--
-- dma_pool_free(c->cb_pool, cb_entry->cb, cb_entry->paddr);
-- }
--
-- kfree(d->cb_list);
-- kfree(d);
-- return NULL;
- }
-
- static int bcm2835_dma_slave_config(struct dma_chan *chan,
--- /dev/null
+From 9d449a908099a6dc0779bb1a9e87f5e224909a24 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:25:01 -0700
+Subject: [PATCH] dmaengine: bcm2835: add slave_sg support to bcm2835-dma
+
+Add slave_sg support to bcm2835-dma using shared allocation
+code for bcm2835_desc and DMA-control blocks already used by
+dma_cyclic.
+
+Note that bcm2835_dma_callback had to get modified to support
+both modes of operation (cyclic and non-cyclic).
+
+Tested using:
+* Hifiberry I2S card (using cyclic DMA)
+* fb_st7735r SPI-framebuffer (using slave_sg DMA via spi-bcm2835)
+playing BigBuckBunny for audio and video.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 113 ++++++++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 108 insertions(+), 5 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -260,6 +260,23 @@ static void bcm2835_dma_create_cb_set_le
+ control_block->info |= finalextrainfo;
+ }
+
++static inline size_t bcm2835_dma_count_frames_for_sg(
++ struct bcm2835_chan *c,
++ struct scatterlist *sgl,
++ unsigned int sg_len)
++{
++ size_t frames = 0;
++ struct scatterlist *sgent;
++ unsigned int i;
++ size_t plength = bcm2835_dma_max_frame_length(c);
++
++ for_each_sg(sgl, sgent, sg_len, i)
++ frames += bcm2835_dma_frames_for_length(
++ sg_dma_len(sgent), plength);
++
++ return frames;
++}
++
+ /**
+ * bcm2835_dma_create_cb_chain - create a control block and fills data in
+ *
+@@ -361,6 +378,32 @@ error_cb:
+ return NULL;
+ }
+
++static void bcm2835_dma_fill_cb_chain_with_sg(
++ struct dma_chan *chan,
++ enum dma_transfer_direction direction,
++ struct bcm2835_cb_entry *cb,
++ struct scatterlist *sgl,
++ unsigned int sg_len)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ size_t max_len = bcm2835_dma_max_frame_length(c);
++ unsigned int i, len;
++ dma_addr_t addr;
++ struct scatterlist *sgent;
++
++ for_each_sg(sgl, sgent, sg_len, i) {
++ for (addr = sg_dma_address(sgent), len = sg_dma_len(sgent);
++ len > 0;
++ addr += cb->cb->length, len -= cb->cb->length, cb++) {
++ if (direction == DMA_DEV_TO_MEM)
++ cb->cb->dst = addr;
++ else
++ cb->cb->src = addr;
++ cb->cb->length = min(len, max_len);
++ }
++ }
++}
++
+ static int bcm2835_dma_abort(void __iomem *chan_base)
+ {
+ unsigned long cs;
+@@ -428,13 +471,19 @@ static irqreturn_t bcm2835_dma_callback(
+ d = c->desc;
+
+ if (d) {
+- /* TODO Only works for cyclic DMA */
+- vchan_cyclic_callback(&d->vd);
++ if (d->cyclic) {
++ /* call the cyclic callback */
++ vchan_cyclic_callback(&d->vd);
++
++ /* Keep the DMA engine running */
++ writel(BCM2835_DMA_ACTIVE,
++ c->chan_base + BCM2835_DMA_CS);
++ } else {
++ vchan_cookie_complete(&c->desc->vd);
++ bcm2835_dma_start_desc(c);
++ }
+ }
+
+- /* Keep the DMA engine running */
+- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
+-
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return IRQ_HANDLED;
+@@ -548,6 +597,58 @@ static void bcm2835_dma_issue_pending(st
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+ }
+
++static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
++ struct dma_chan *chan,
++ struct scatterlist *sgl, unsigned int sg_len,
++ enum dma_transfer_direction direction,
++ unsigned long flags, void *context)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ struct bcm2835_desc *d;
++ dma_addr_t src = 0, dst = 0;
++ u32 info = BCM2835_DMA_WAIT_RESP;
++ u32 extra = BCM2835_DMA_INT_EN;
++ size_t frames;
++
++ if (!is_slave_direction(direction)) {
++ dev_err(chan->device->dev,
++ "%s: bad direction?\n", __func__);
++ return NULL;
++ }
++
++ if (c->dreq != 0)
++ info |= BCM2835_DMA_PER_MAP(c->dreq);
++
++ if (direction == DMA_DEV_TO_MEM) {
++ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ src = c->cfg.src_addr;
++ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
++ } else {
++ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
++ return NULL;
++ dst = c->cfg.dst_addr;
++ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
++ }
++
++ /* count frames in sg list */
++ frames = bcm2835_dma_count_frames_for_sg(c, sgl, sg_len);
++
++ /* allocate the CB chain */
++ d = bcm2835_dma_create_cb_chain(chan, direction, false,
++ info, extra,
++ frames, src, dst, 0, 0,
++ GFP_KERNEL);
++ if (!d)
++ return NULL;
++
++ /* fill in frames with scatterlist pointers */
++ bcm2835_dma_fill_cb_chain_with_sg(chan, direction, d->cb_list,
++ sgl, sg_len);
++
++ return vchan_tx_prep(&c->vc, &d->vd, flags);
++}
++
+ static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
+ struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
+ size_t period_len, enum dma_transfer_direction direction,
+@@ -778,11 +879,13 @@ static int bcm2835_dma_probe(struct plat
+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+ dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
+ dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
++ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+ od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
+ od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
+ od->ddev.device_tx_status = bcm2835_dma_tx_status;
+ od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
+ od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
++ od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
+ od->ddev.device_config = bcm2835_dma_slave_config;
+ od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
+ od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+++ /dev/null
-From 350247e0611f171a3372386e389e24746daff84f Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:25:00 -0700
-Subject: [PATCH] dmaengine: bcm2835: limit max length based on channel type
-
-The bcm2835 dma system has 2 basic types of dma-channels:
-* "normal" channels
-* "light" channels
-
-Lite channels are limited in several aspects:
-* internal data-structure is 128 bit (not 256)
-* does not support BCM2835_DMA_TDMODE (2D)
-* DMA length register is limited to 16 bit.
- so 0-65535 (not 0-65536 as mentioned in the official datasheet)
-* BCM2835_DMA_S/D_IGNORE are not supported
-
-The detection of the type of mode is implemented by looking at
-the LITE bit in the DEBUG register for each channel.
-This allows automatic detection.
-
-Based on this the maximum block size is set to (64K - 4) or to 1G
-and this limit is honored during generation of control block
-chains. The effect is that when a LITE channel is used more
-control blocks are used to do the same transfer (compared
-to a normal channel).
-
-As there are several sources/target DREQS that are 32 bit wide
-we need to have the transfer to be a multiple of 4 as this would
-break the transfer otherwise.
-
-This is why the limit of (64K - 4) was chosen over the
-alternative of (64K - 4K).
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 29 ++++++++++++++++++++++++++---
- 1 file changed, 26 insertions(+), 3 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -81,6 +81,8 @@ struct bcm2835_chan {
-
- void __iomem *chan_base;
- int irq_number;
-+
-+ bool is_lite_channel;
- };
-
- struct bcm2835_desc {
-@@ -169,6 +171,16 @@ struct bcm2835_desc {
- #define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */
- #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n))
-
-+/* the max dma length for different channels */
-+#define MAX_DMA_LEN SZ_1G
-+#define MAX_LITE_DMA_LEN (SZ_64K - 4)
-+
-+static inline size_t bcm2835_dma_max_frame_length(struct bcm2835_chan *c)
-+{
-+ /* lite and normal channels have different max frame length */
-+ return c->is_lite_channel ? MAX_LITE_DMA_LEN : MAX_DMA_LEN;
-+}
-+
- /* how many frames of max_len size do we need to transfer len bytes */
- static inline size_t bcm2835_dma_frames_for_length(size_t len,
- size_t max_len)
-@@ -217,8 +229,10 @@ static void bcm2835_dma_create_cb_set_le
- size_t *total_len,
- u32 finalextrainfo)
- {
-- /* set the length */
-- control_block->length = len;
-+ size_t max_len = bcm2835_dma_max_frame_length(chan);
-+
-+ /* set the length taking lite-channel limitations into account */
-+ control_block->length = min_t(u32, len, max_len);
-
- /* finished if we have no period_length */
- if (!period_len)
-@@ -544,6 +558,7 @@ static struct dma_async_tx_descriptor *b
- dma_addr_t src, dst;
- u32 info = BCM2835_DMA_WAIT_RESP;
- u32 extra = BCM2835_DMA_INT_EN;
-+ size_t max_len = bcm2835_dma_max_frame_length(c);
- size_t frames;
-
- /* Grab configuration */
-@@ -586,7 +601,10 @@ static struct dma_async_tx_descriptor *b
- }
-
- /* calculate number of frames */
-- frames = DIV_ROUND_UP(buf_len, period_len);
-+ frames = /* number of periods */
-+ DIV_ROUND_UP(buf_len, period_len) *
-+ /* number of frames per period */
-+ bcm2835_dma_frames_for_length(period_len, max_len);
-
- /*
- * allocate the CB chain
-@@ -685,6 +703,11 @@ static int bcm2835_dma_chan_init(struct
- c->ch = chan_id;
- c->irq_number = irq;
-
-+ /* check in DEBUG register if this is a LITE channel */
-+ if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
-+ BCM2835_DMA_DEBUG_LITE)
-+ c->is_lite_channel = true;
-+
- return 0;
- }
-
--- /dev/null
+From 764cf7045e6338c1ca850ef1fce522b31440dab9 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 16 Mar 2016 12:25:02 -0700
+Subject: [PATCH] dmaengine: bcm2835: add dma_memcopy support to bcm2835-dma
+
+Also added check for an error condition in bcm2835_dma_create_cb_chain
+that showed up during development of this patch.
+
+Tested using dmatest for all enabled channels.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 36 +++++++++++++++++++++++++++++++++++-
+ 1 file changed, 35 insertions(+), 1 deletion(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -310,6 +310,9 @@ static struct bcm2835_desc *bcm2835_dma_
+ struct bcm2835_cb_entry *cb_entry;
+ struct bcm2835_dma_cb *control_block;
+
++ if (!frames)
++ return NULL;
++
+ /* allocate and setup the descriptor. */
+ d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
+ gfp);
+@@ -597,6 +600,34 @@ static void bcm2835_dma_issue_pending(st
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+ }
+
++struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_memcpy(
++ struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
++ size_t len, unsigned long flags)
++{
++ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
++ struct bcm2835_desc *d;
++ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
++ u32 extra = BCM2835_DMA_INT_EN | BCM2835_DMA_WAIT_RESP;
++ size_t max_len = bcm2835_dma_max_frame_length(c);
++ size_t frames;
++
++ /* if src, dst or len is not given return with an error */
++ if (!src || !dst || !len)
++ return NULL;
++
++ /* calculate number of frames */
++ frames = bcm2835_dma_frames_for_length(len, max_len);
++
++ /* allocate the CB chain - this also fills in the pointers */
++ d = bcm2835_dma_create_cb_chain(chan, DMA_MEM_TO_MEM, false,
++ info, extra, frames,
++ src, dst, len, 0, GFP_KERNEL);
++ if (!d)
++ return NULL;
++
++ return vchan_tx_prep(&c->vc, &d->vd, flags);
++}
++
+ static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
+ struct dma_chan *chan,
+ struct scatterlist *sgl, unsigned int sg_len,
+@@ -880,17 +911,20 @@ static int bcm2835_dma_probe(struct plat
+ dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
+ dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
++ dma_cap_set(DMA_MEMCPY, od->ddev.cap_mask);
+ od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
+ od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
+ od->ddev.device_tx_status = bcm2835_dma_tx_status;
+ od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
+ od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
+ od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
++ od->ddev.device_prep_dma_memcpy = bcm2835_dma_prep_dma_memcpy;
+ od->ddev.device_config = bcm2835_dma_slave_config;
+ od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
+ od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+ od->ddev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+- od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
++ od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
++ BIT(DMA_MEM_TO_MEM);
+ od->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
+ od->ddev.dev = &pdev->dev;
+ INIT_LIST_HEAD(&od->ddev.channels);
+++ /dev/null
-From 9026efd53eae4b320941e581f141ddc87f2adc20 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:25:01 -0700
-Subject: [PATCH] dmaengine: bcm2835: add slave_sg support to bcm2835-dma
-
-Add slave_sg support to bcm2835-dma using shared allocation
-code for bcm2835_desc and DMA-control blocks already used by
-dma_cyclic.
-
-Note that bcm2835_dma_callback had to get modified to support
-both modes of operation (cyclic and non-cyclic).
-
-Tested using:
-* Hifiberry I2S card (using cyclic DMA)
-* fb_st7735r SPI-framebuffer (using slave_sg DMA via spi-bcm2835)
-playing BigBuckBunny for audio and video.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 113 ++++++++++++++++++++++++++++++++++++++++++++--
- 1 file changed, 108 insertions(+), 5 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -260,6 +260,23 @@ static void bcm2835_dma_create_cb_set_le
- control_block->info |= finalextrainfo;
- }
-
-+static inline size_t bcm2835_dma_count_frames_for_sg(
-+ struct bcm2835_chan *c,
-+ struct scatterlist *sgl,
-+ unsigned int sg_len)
-+{
-+ size_t frames = 0;
-+ struct scatterlist *sgent;
-+ unsigned int i;
-+ size_t plength = bcm2835_dma_max_frame_length(c);
-+
-+ for_each_sg(sgl, sgent, sg_len, i)
-+ frames += bcm2835_dma_frames_for_length(
-+ sg_dma_len(sgent), plength);
-+
-+ return frames;
-+}
-+
- /**
- * bcm2835_dma_create_cb_chain - create a control block and fills data in
- *
-@@ -361,6 +378,32 @@ error_cb:
- return NULL;
- }
-
-+static void bcm2835_dma_fill_cb_chain_with_sg(
-+ struct dma_chan *chan,
-+ enum dma_transfer_direction direction,
-+ struct bcm2835_cb_entry *cb,
-+ struct scatterlist *sgl,
-+ unsigned int sg_len)
-+{
-+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
-+ size_t max_len = bcm2835_dma_max_frame_length(c);
-+ unsigned int i, len;
-+ dma_addr_t addr;
-+ struct scatterlist *sgent;
-+
-+ for_each_sg(sgl, sgent, sg_len, i) {
-+ for (addr = sg_dma_address(sgent), len = sg_dma_len(sgent);
-+ len > 0;
-+ addr += cb->cb->length, len -= cb->cb->length, cb++) {
-+ if (direction == DMA_DEV_TO_MEM)
-+ cb->cb->dst = addr;
-+ else
-+ cb->cb->src = addr;
-+ cb->cb->length = min(len, max_len);
-+ }
-+ }
-+}
-+
- static int bcm2835_dma_abort(void __iomem *chan_base)
- {
- unsigned long cs;
-@@ -428,13 +471,19 @@ static irqreturn_t bcm2835_dma_callback(
- d = c->desc;
-
- if (d) {
-- /* TODO Only works for cyclic DMA */
-- vchan_cyclic_callback(&d->vd);
-+ if (d->cyclic) {
-+ /* call the cyclic callback */
-+ vchan_cyclic_callback(&d->vd);
-+
-+ /* Keep the DMA engine running */
-+ writel(BCM2835_DMA_ACTIVE,
-+ c->chan_base + BCM2835_DMA_CS);
-+ } else {
-+ vchan_cookie_complete(&c->desc->vd);
-+ bcm2835_dma_start_desc(c);
-+ }
- }
-
-- /* Keep the DMA engine running */
-- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS);
--
- spin_unlock_irqrestore(&c->vc.lock, flags);
-
- return IRQ_HANDLED;
-@@ -548,6 +597,58 @@ static void bcm2835_dma_issue_pending(st
- spin_unlock_irqrestore(&c->vc.lock, flags);
- }
-
-+static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
-+ struct dma_chan *chan,
-+ struct scatterlist *sgl, unsigned int sg_len,
-+ enum dma_transfer_direction direction,
-+ unsigned long flags, void *context)
-+{
-+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
-+ struct bcm2835_desc *d;
-+ dma_addr_t src = 0, dst = 0;
-+ u32 info = BCM2835_DMA_WAIT_RESP;
-+ u32 extra = BCM2835_DMA_INT_EN;
-+ size_t frames;
-+
-+ if (!is_slave_direction(direction)) {
-+ dev_err(chan->device->dev,
-+ "%s: bad direction?\n", __func__);
-+ return NULL;
-+ }
-+
-+ if (c->dreq != 0)
-+ info |= BCM2835_DMA_PER_MAP(c->dreq);
-+
-+ if (direction == DMA_DEV_TO_MEM) {
-+ if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
-+ return NULL;
-+ src = c->cfg.src_addr;
-+ info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC;
-+ } else {
-+ if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
-+ return NULL;
-+ dst = c->cfg.dst_addr;
-+ info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC;
-+ }
-+
-+ /* count frames in sg list */
-+ frames = bcm2835_dma_count_frames_for_sg(c, sgl, sg_len);
-+
-+ /* allocate the CB chain */
-+ d = bcm2835_dma_create_cb_chain(chan, direction, false,
-+ info, extra,
-+ frames, src, dst, 0, 0,
-+ GFP_KERNEL);
-+ if (!d)
-+ return NULL;
-+
-+ /* fill in frames with scatterlist pointers */
-+ bcm2835_dma_fill_cb_chain_with_sg(chan, direction, d->cb_list,
-+ sgl, sg_len);
-+
-+ return vchan_tx_prep(&c->vc, &d->vd, flags);
-+}
-+
- static struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_cyclic(
- struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
- size_t period_len, enum dma_transfer_direction direction,
-@@ -778,11 +879,13 @@ static int bcm2835_dma_probe(struct plat
- dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
- dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
- dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
-+ dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
- od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
- od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
- od->ddev.device_tx_status = bcm2835_dma_tx_status;
- od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
- od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
-+ od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
- od->ddev.device_config = bcm2835_dma_slave_config;
- od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
- od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+++ /dev/null
-From 24392a5f014f3106442cef99e9956d0f826337e3 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Wed, 16 Mar 2016 12:25:02 -0700
-Subject: [PATCH] dmaengine: bcm2835: add dma_memcopy support to bcm2835-dma
-
-Also added check for an error condition in bcm2835_dma_create_cb_chain
-that showed up during development of this patch.
-
-Tested using dmatest for all enabled channels.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 36 +++++++++++++++++++++++++++++++++++-
- 1 file changed, 35 insertions(+), 1 deletion(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -310,6 +310,9 @@ static struct bcm2835_desc *bcm2835_dma_
- struct bcm2835_cb_entry *cb_entry;
- struct bcm2835_dma_cb *control_block;
-
-+ if (!frames)
-+ return NULL;
-+
- /* allocate and setup the descriptor. */
- d = kzalloc(sizeof(*d) + frames * sizeof(struct bcm2835_cb_entry),
- gfp);
-@@ -597,6 +600,34 @@ static void bcm2835_dma_issue_pending(st
- spin_unlock_irqrestore(&c->vc.lock, flags);
- }
-
-+struct dma_async_tx_descriptor *bcm2835_dma_prep_dma_memcpy(
-+ struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
-+ size_t len, unsigned long flags)
-+{
-+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
-+ struct bcm2835_desc *d;
-+ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
-+ u32 extra = BCM2835_DMA_INT_EN | BCM2835_DMA_WAIT_RESP;
-+ size_t max_len = bcm2835_dma_max_frame_length(c);
-+ size_t frames;
-+
-+ /* if src, dst or len is not given return with an error */
-+ if (!src || !dst || !len)
-+ return NULL;
-+
-+ /* calculate number of frames */
-+ frames = bcm2835_dma_frames_for_length(len, max_len);
-+
-+ /* allocate the CB chain - this also fills in the pointers */
-+ d = bcm2835_dma_create_cb_chain(chan, DMA_MEM_TO_MEM, false,
-+ info, extra, frames,
-+ src, dst, len, 0, GFP_KERNEL);
-+ if (!d)
-+ return NULL;
-+
-+ return vchan_tx_prep(&c->vc, &d->vd, flags);
-+}
-+
- static struct dma_async_tx_descriptor *bcm2835_dma_prep_slave_sg(
- struct dma_chan *chan,
- struct scatterlist *sgl, unsigned int sg_len,
-@@ -880,17 +911,20 @@ static int bcm2835_dma_probe(struct plat
- dma_cap_set(DMA_PRIVATE, od->ddev.cap_mask);
- dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
- dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
-+ dma_cap_set(DMA_MEMCPY, od->ddev.cap_mask);
- od->ddev.device_alloc_chan_resources = bcm2835_dma_alloc_chan_resources;
- od->ddev.device_free_chan_resources = bcm2835_dma_free_chan_resources;
- od->ddev.device_tx_status = bcm2835_dma_tx_status;
- od->ddev.device_issue_pending = bcm2835_dma_issue_pending;
- od->ddev.device_prep_dma_cyclic = bcm2835_dma_prep_dma_cyclic;
- od->ddev.device_prep_slave_sg = bcm2835_dma_prep_slave_sg;
-+ od->ddev.device_prep_dma_memcpy = bcm2835_dma_prep_dma_memcpy;
- od->ddev.device_config = bcm2835_dma_slave_config;
- od->ddev.device_terminate_all = bcm2835_dma_terminate_all;
- od->ddev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
- od->ddev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
-- od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
-+ od->ddev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
-+ BIT(DMA_MEM_TO_MEM);
- od->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
- od->ddev.dev = &pdev->dev;
- INIT_LIST_HEAD(&od->ddev.channels);
--- /dev/null
+From 2913407433c67a96d02bc4b4c1e5111fdb6d356d Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Mon, 11 Apr 2016 13:29:08 +0000
+Subject: [PATCH] dmaengine: bcm2835: use platform_get_irq_byname
+
+Use platform_get_irq_byname to allow for correct mapping of
+interrupts to dma channels.
+
+The currently implemented device tree is unfortunately
+implemented with the wrong assumption, that each dma-channel
+has its own dma channel, but dma-irq 11 is handling
+dma-channel 11-14 and dma-irq 12 is actually a "catch all"
+interrupt.
+
+So here we use the byname variant and require that interrupts
+are explicitly named via the interrupts-name property in the
+device tree.
+
+The use of shared interrupts is also implemented.
+
+As a side-effect this means we can now use dma channels 12, 13 and 14
+in a correct manner - also testing shows that onl using
+channels 11 to 14 for spi and i2s works perfectly (when playing
+some video)
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Acked-by: Eric Anholt <eric@anholt.net>
+Acked-by: Mark Rutland <mark.rutland@arm.com>
+Signed-off-by: Vinod Koul <vinod.koul@intel.com>
+---
+ drivers/dma/bcm2835-dma.c | 77 ++++++++++++++++++++++++++++++++++++++---------
+ 1 file changed, 63 insertions(+), 14 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -46,6 +46,9 @@
+
+ #include "virt-dma.h"
+
++#define BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED 14
++#define BCM2835_DMA_CHAN_NAME_SIZE 8
++
+ struct bcm2835_dmadev {
+ struct dma_device ddev;
+ spinlock_t lock;
+@@ -81,6 +84,7 @@ struct bcm2835_chan {
+
+ void __iomem *chan_base;
+ int irq_number;
++ unsigned int irq_flags;
+
+ bool is_lite_channel;
+ };
+@@ -466,6 +470,15 @@ static irqreturn_t bcm2835_dma_callback(
+ struct bcm2835_desc *d;
+ unsigned long flags;
+
++ /* check the shared interrupt */
++ if (c->irq_flags & IRQF_SHARED) {
++ /* check if the interrupt is enabled */
++ flags = readl(c->chan_base + BCM2835_DMA_CS);
++ /* if not set then we are not the reason for the irq */
++ if (!(flags & BCM2835_DMA_INT))
++ return IRQ_NONE;
++ }
++
+ spin_lock_irqsave(&c->vc.lock, flags);
+
+ /* Acknowledge interrupt */
+@@ -506,8 +519,8 @@ static int bcm2835_dma_alloc_chan_resour
+ return -ENOMEM;
+ }
+
+- return request_irq(c->irq_number,
+- bcm2835_dma_callback, 0, "DMA IRQ", c);
++ return request_irq(c->irq_number, bcm2835_dma_callback,
++ c->irq_flags, "DMA IRQ", c);
+ }
+
+ static void bcm2835_dma_free_chan_resources(struct dma_chan *chan)
+@@ -819,7 +832,8 @@ static int bcm2835_dma_terminate_all(str
+ return 0;
+ }
+
+-static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq)
++static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id,
++ int irq, unsigned int irq_flags)
+ {
+ struct bcm2835_chan *c;
+
+@@ -834,6 +848,7 @@ static int bcm2835_dma_chan_init(struct
+ c->chan_base = BCM2835_DMA_CHANIO(d->base, chan_id);
+ c->ch = chan_id;
+ c->irq_number = irq;
++ c->irq_flags = irq_flags;
+
+ /* check in DEBUG register if this is a LITE channel */
+ if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
+@@ -882,9 +897,11 @@ static int bcm2835_dma_probe(struct plat
+ struct resource *res;
+ void __iomem *base;
+ int rc;
+- int i;
+- int irq;
++ int i, j;
++ int irq[BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED + 1];
++ int irq_flags;
+ uint32_t chans_available;
++ char chan_name[BCM2835_DMA_CHAN_NAME_SIZE];
+
+ if (!pdev->dev.dma_mask)
+ pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
+@@ -941,16 +958,48 @@ static int bcm2835_dma_probe(struct plat
+ goto err_no_dma;
+ }
+
+- for (i = 0; i < pdev->num_resources; i++) {
+- irq = platform_get_irq(pdev, i);
+- if (irq < 0)
+- break;
+-
+- if (chans_available & (1 << i)) {
+- rc = bcm2835_dma_chan_init(od, i, irq);
+- if (rc)
+- goto err_no_dma;
++ /* get irqs for each channel that we support */
++ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) {
++ /* skip masked out channels */
++ if (!(chans_available & (1 << i))) {
++ irq[i] = -1;
++ continue;
+ }
++
++ /* get the named irq */
++ snprintf(chan_name, sizeof(chan_name), "dma%i", i);
++ irq[i] = platform_get_irq_byname(pdev, chan_name);
++ if (irq[i] >= 0)
++ continue;
++
++ /* legacy device tree case handling */
++ dev_warn_once(&pdev->dev,
++ "missing interrupts-names property in device tree - legacy interpretation is used");
++ /*
++ * in case of channel >= 11
++ * use the 11th interrupt and that is shared
++ */
++ irq[i] = platform_get_irq(pdev, i < 11 ? i : 11);
++ }
++
++ /* get irqs for each channel */
++ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) {
++ /* skip channels without irq */
++ if (irq[i] < 0)
++ continue;
++
++ /* check if there are other channels that also use this irq */
++ irq_flags = 0;
++ for (j = 0; j <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; j++)
++ if ((i != j) && (irq[j] == irq[i])) {
++ irq_flags = IRQF_SHARED;
++ break;
++ }
++
++ /* initialize the channel */
++ rc = bcm2835_dma_chan_init(od, i, irq[i], irq_flags);
++ if (rc)
++ goto err_no_dma;
+ }
+
+ dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i);
--- /dev/null
+From 8b8b59db27e6e1597737fbd1fd7a17216540bc38 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
+Date: Sat, 3 Oct 2015 22:22:55 +0200
+Subject: [PATCH] dmaengine: bcm2835: Load driver early and support legacy API
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Load driver early since at least bcm2708_fb doesn't support deferred
+probing and even if it did, we don't want the video driver deferred.
+
+Support the legacy DMA API which is needed by bcm2708_fb
+(but only using the dedicated dma channel 0).
+
+Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ drivers/dma/Kconfig | 2 +-
+ drivers/dma/bcm2835-dma.c | 27 ++++++++++++++++++++++++++-
+ 2 files changed, 27 insertions(+), 2 deletions(-)
+
+--- a/drivers/dma/Kconfig
++++ b/drivers/dma/Kconfig
+@@ -108,7 +108,7 @@ config COH901318
+
+ config DMA_BCM2835
+ tristate "BCM2835 DMA engine support"
+- depends on ARCH_BCM2835
++ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -37,6 +37,7 @@
+ #include <linux/interrupt.h>
+ #include <linux/list.h>
+ #include <linux/module.h>
++#include <linux/platform_data/dma-bcm2708.h>
+ #include <linux/platform_device.h>
+ #include <linux/slab.h>
+ #include <linux/io.h>
+@@ -1021,6 +1022,14 @@ static int bcm2835_dma_probe(struct plat
+
+ dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n");
+
++ /* load the legacy api if bit 0 in the mask is cleared */
++ if ((chans_available & BIT(0)) == 0) {
++ rc = bcm_dmaman_probe(pdev, base, BIT(0));
++ if (rc)
++ dev_err(&pdev->dev,
++ "Failed to initialize the legacy API\n");
++ }
++
+ return 0;
+
+ err_no_dma:
+@@ -1032,6 +1041,7 @@ static int bcm2835_dma_remove(struct pla
+ {
+ struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
+
++ bcm_dmaman_remove(pdev);
+ dma_async_device_unregister(&od->ddev);
+ bcm2835_dma_free(od);
+
+@@ -1047,7 +1057,22 @@ static struct platform_driver bcm2835_dm
+ },
+ };
+
+-module_platform_driver(bcm2835_dma_driver);
++static int bcm2835_dma_init(void)
++{
++ return platform_driver_register(&bcm2835_dma_driver);
++}
++
++static void bcm2835_dma_exit(void)
++{
++ platform_driver_unregister(&bcm2835_dma_driver);
++}
++
++/*
++ * Load after serial driver (arch_initcall) so we see the messages if it fails,
++ * but before drivers (module_init) that need a DMA channel.
++ */
++subsys_initcall(bcm2835_dma_init);
++module_exit(bcm2835_dma_exit);
+
+ MODULE_ALIAS("platform:bcm2835-dma");
+ MODULE_DESCRIPTION("BCM2835 DMA engine driver");
+++ /dev/null
-From 27a895c19212e695f70bd4860d4420f70f915fe1 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Mon, 11 Apr 2016 13:29:08 +0000
-Subject: [PATCH] dmaengine: bcm2835: use platform_get_irq_byname
-
-Use platform_get_irq_byname to allow for correct mapping of
-interrupts to dma channels.
-
-The currently implemented device tree is unfortunately
-implemented with the wrong assumption, that each dma-channel
-has its own dma channel, but dma-irq 11 is handling
-dma-channel 11-14 and dma-irq 12 is actually a "catch all"
-interrupt.
-
-So here we use the byname variant and require that interrupts
-are explicitly named via the interrupts-name property in the
-device tree.
-
-The use of shared interrupts is also implemented.
-
-As a side-effect this means we can now use dma channels 12, 13 and 14
-in a correct manner - also testing shows that onl using
-channels 11 to 14 for spi and i2s works perfectly (when playing
-some video)
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Acked-by: Eric Anholt <eric@anholt.net>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
----
- drivers/dma/bcm2835-dma.c | 77 ++++++++++++++++++++++++++++++++++++++---------
- 1 file changed, 63 insertions(+), 14 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -46,6 +46,9 @@
-
- #include "virt-dma.h"
-
-+#define BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED 14
-+#define BCM2835_DMA_CHAN_NAME_SIZE 8
-+
- struct bcm2835_dmadev {
- struct dma_device ddev;
- spinlock_t lock;
-@@ -81,6 +84,7 @@ struct bcm2835_chan {
-
- void __iomem *chan_base;
- int irq_number;
-+ unsigned int irq_flags;
-
- bool is_lite_channel;
- };
-@@ -466,6 +470,15 @@ static irqreturn_t bcm2835_dma_callback(
- struct bcm2835_desc *d;
- unsigned long flags;
-
-+ /* check the shared interrupt */
-+ if (c->irq_flags & IRQF_SHARED) {
-+ /* check if the interrupt is enabled */
-+ flags = readl(c->chan_base + BCM2835_DMA_CS);
-+ /* if not set then we are not the reason for the irq */
-+ if (!(flags & BCM2835_DMA_INT))
-+ return IRQ_NONE;
-+ }
-+
- spin_lock_irqsave(&c->vc.lock, flags);
-
- /* Acknowledge interrupt */
-@@ -506,8 +519,8 @@ static int bcm2835_dma_alloc_chan_resour
- return -ENOMEM;
- }
-
-- return request_irq(c->irq_number,
-- bcm2835_dma_callback, 0, "DMA IRQ", c);
-+ return request_irq(c->irq_number, bcm2835_dma_callback,
-+ c->irq_flags, "DMA IRQ", c);
- }
-
- static void bcm2835_dma_free_chan_resources(struct dma_chan *chan)
-@@ -819,7 +832,8 @@ static int bcm2835_dma_terminate_all(str
- return 0;
- }
-
--static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id, int irq)
-+static int bcm2835_dma_chan_init(struct bcm2835_dmadev *d, int chan_id,
-+ int irq, unsigned int irq_flags)
- {
- struct bcm2835_chan *c;
-
-@@ -834,6 +848,7 @@ static int bcm2835_dma_chan_init(struct
- c->chan_base = BCM2835_DMA_CHANIO(d->base, chan_id);
- c->ch = chan_id;
- c->irq_number = irq;
-+ c->irq_flags = irq_flags;
-
- /* check in DEBUG register if this is a LITE channel */
- if (readl(c->chan_base + BCM2835_DMA_DEBUG) &
-@@ -882,9 +897,11 @@ static int bcm2835_dma_probe(struct plat
- struct resource *res;
- void __iomem *base;
- int rc;
-- int i;
-- int irq;
-+ int i, j;
-+ int irq[BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED + 1];
-+ int irq_flags;
- uint32_t chans_available;
-+ char chan_name[BCM2835_DMA_CHAN_NAME_SIZE];
-
- if (!pdev->dev.dma_mask)
- pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
-@@ -941,16 +958,48 @@ static int bcm2835_dma_probe(struct plat
- goto err_no_dma;
- }
-
-- for (i = 0; i < pdev->num_resources; i++) {
-- irq = platform_get_irq(pdev, i);
-- if (irq < 0)
-- break;
--
-- if (chans_available & (1 << i)) {
-- rc = bcm2835_dma_chan_init(od, i, irq);
-- if (rc)
-- goto err_no_dma;
-+ /* get irqs for each channel that we support */
-+ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) {
-+ /* skip masked out channels */
-+ if (!(chans_available & (1 << i))) {
-+ irq[i] = -1;
-+ continue;
- }
-+
-+ /* get the named irq */
-+ snprintf(chan_name, sizeof(chan_name), "dma%i", i);
-+ irq[i] = platform_get_irq_byname(pdev, chan_name);
-+ if (irq[i] >= 0)
-+ continue;
-+
-+ /* legacy device tree case handling */
-+ dev_warn_once(&pdev->dev,
-+ "missing interrupts-names property in device tree - legacy interpretation is used");
-+ /*
-+ * in case of channel >= 11
-+ * use the 11th interrupt and that is shared
-+ */
-+ irq[i] = platform_get_irq(pdev, i < 11 ? i : 11);
-+ }
-+
-+ /* get irqs for each channel */
-+ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) {
-+ /* skip channels without irq */
-+ if (irq[i] < 0)
-+ continue;
-+
-+ /* check if there are other channels that also use this irq */
-+ irq_flags = 0;
-+ for (j = 0; j <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; j++)
-+ if ((i != j) && (irq[j] == irq[i])) {
-+ irq_flags = IRQF_SHARED;
-+ break;
-+ }
-+
-+ /* initialize the channel */
-+ rc = bcm2835_dma_chan_init(od, i, irq[i], irq_flags);
-+ if (rc)
-+ goto err_no_dma;
- }
-
- dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i);
--- /dev/null
+From aa8fd2f11c4e5928d5ba0ad2e45d6abee4b897c2 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Fri, 22 Apr 2016 16:13:59 +0000
+Subject: [PATCH] ARM: bcm270x: changed bcrm,dma-channel-mask to mask out the
+ used channel
+
+Dma channel0 is used by the legacy api - to avoid confilcts this
+needs to get masked out in the device-tree instead of hardcoding it
+in the driver.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -59,7 +59,7 @@
+ <1 27>;
+
+ #dma-cells = <1>;
+- brcm,dma-channel-mask = <0x0f35>;
++ brcm,dma-channel-mask = <0x0f34>;
+ };
+
+ intc: interrupt-controller@7e00b200 {
+++ /dev/null
-From 479b918cb9511d5044cc660f0c74d42952a87910 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
-Date: Sat, 3 Oct 2015 22:22:55 +0200
-Subject: [PATCH] dmaengine: bcm2835: Load driver early and support legacy API
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Load driver early since at least bcm2708_fb doesn't support deferred
-probing and even if it did, we don't want the video driver deferred.
-
-Support the legacy DMA API which is needed by bcm2708_fb
-(but only using the dedicated dma channel 0).
-
-Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
----
- drivers/dma/Kconfig | 2 +-
- drivers/dma/bcm2835-dma.c | 27 ++++++++++++++++++++++++++-
- 2 files changed, 27 insertions(+), 2 deletions(-)
-
---- a/drivers/dma/Kconfig
-+++ b/drivers/dma/Kconfig
-@@ -108,7 +108,7 @@ config COH901318
-
- config DMA_BCM2835
- tristate "BCM2835 DMA engine support"
-- depends on ARCH_BCM2835
-+ depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709
- select DMA_ENGINE
- select DMA_VIRTUAL_CHANNELS
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -37,6 +37,7 @@
- #include <linux/interrupt.h>
- #include <linux/list.h>
- #include <linux/module.h>
-+#include <linux/platform_data/dma-bcm2708.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
- #include <linux/io.h>
-@@ -1021,6 +1022,14 @@ static int bcm2835_dma_probe(struct plat
-
- dev_dbg(&pdev->dev, "Load BCM2835 DMA engine driver\n");
-
-+ /* load the legacy api if bit 0 in the mask is cleared */
-+ if ((chans_available & BIT(0)) == 0) {
-+ rc = bcm_dmaman_probe(pdev, base, BIT(0));
-+ if (rc)
-+ dev_err(&pdev->dev,
-+ "Failed to initialize the legacy API\n");
-+ }
-+
- return 0;
-
- err_no_dma:
-@@ -1032,6 +1041,7 @@ static int bcm2835_dma_remove(struct pla
- {
- struct bcm2835_dmadev *od = platform_get_drvdata(pdev);
-
-+ bcm_dmaman_remove(pdev);
- dma_async_device_unregister(&od->ddev);
- bcm2835_dma_free(od);
-
-@@ -1047,7 +1057,22 @@ static struct platform_driver bcm2835_dm
- },
- };
-
--module_platform_driver(bcm2835_dma_driver);
-+static int bcm2835_dma_init(void)
-+{
-+ return platform_driver_register(&bcm2835_dma_driver);
-+}
-+
-+static void bcm2835_dma_exit(void)
-+{
-+ platform_driver_unregister(&bcm2835_dma_driver);
-+}
-+
-+/*
-+ * Load after serial driver (arch_initcall) so we see the messages if it fails,
-+ * but before drivers (module_init) that need a DMA channel.
-+ */
-+subsys_initcall(bcm2835_dma_init);
-+module_exit(bcm2835_dma_exit);
-
- MODULE_ALIAS("platform:bcm2835-dma");
- MODULE_DESCRIPTION("BCM2835 DMA engine driver");
+++ /dev/null
-From fa1852176e0d03be5650aa88a6e051541fa3da7a Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Fri, 22 Apr 2016 16:13:59 +0000
-Subject: [PATCH] ARM: bcm270x: changed bcrm,dma-channel-mask to mask out the
- used channel
-
-Dma channel0 is used by the legacy api - to avoid confilcts this
-needs to get masked out in the device-tree instead of hardcoding it
-in the driver.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -59,7 +59,7 @@
- <1 27>;
-
- #dma-cells = <1>;
-- brcm,dma-channel-mask = <0x0f35>;
-+ brcm,dma-channel-mask = <0x0f34>;
- };
-
- intc: interrupt-controller@7e00b200 {
--- /dev/null
+From 620065b16a5da22db7fbac1017357e3c2e37e1f6 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sat, 23 Apr 2016 14:07:03 +0000
+Subject: [PATCH] ARM: bcm2835: add interrupt-names and apply correct mapping
+
+Add interrupt-names properties to dt and apply the correct
+mapping between irq and dma channels.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 26 ++++++++++++++++++++++++--
+ 1 file changed, 24 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -56,10 +56,32 @@
+ <1 24>,
+ <1 25>,
+ <1 26>,
+- <1 27>;
++ /* dma channel 11-14 share one irq */
++ <1 27>,
++ <1 27>,
++ <1 27>,
++ <1 27>,
++ /* unused shared irq for all channels */
++ <1 28>;
++ interrupt-names = "dma0",
++ "dma1",
++ "dma2",
++ "dma3",
++ "dma4",
++ "dma5",
++ "dma6",
++ "dma7",
++ "dma8",
++ "dma9",
++ "dma10",
++ "dma11",
++ "dma12",
++ "dma13",
++ "dma14",
++ "dma-shared-all";
+
+ #dma-cells = <1>;
+- brcm,dma-channel-mask = <0x0f34>;
++ brcm,dma-channel-mask = <0x7f34>;
+ };
+
+ intc: interrupt-controller@7e00b200 {
+++ /dev/null
-From c4eb741282cc9300119adaa4d6d3a278b9cd5f15 Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Sat, 23 Apr 2016 14:07:03 +0000
-Subject: [PATCH] ARM: bcm2835: add interrupt-names and apply correct mapping
-
-Add interrupt-names properties to dt and apply the correct
-mapping between irq and dma channels.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 26 ++++++++++++++++++++++++--
- 1 file changed, 24 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -56,10 +56,32 @@
- <1 24>,
- <1 25>,
- <1 26>,
-- <1 27>;
-+ /* dma channel 11-14 share one irq */
-+ <1 27>,
-+ <1 27>,
-+ <1 27>,
-+ <1 27>,
-+ /* unused shared irq for all channels */
-+ <1 28>;
-+ interrupt-names = "dma0",
-+ "dma1",
-+ "dma2",
-+ "dma3",
-+ "dma4",
-+ "dma5",
-+ "dma6",
-+ "dma7",
-+ "dma8",
-+ "dma9",
-+ "dma10",
-+ "dma11",
-+ "dma12",
-+ "dma13",
-+ "dma14",
-+ "dma-shared-all";
-
- #dma-cells = <1>;
-- brcm,dma-channel-mask = <0x0f34>;
-+ brcm,dma-channel-mask = <0x7f34>;
- };
-
- intc: interrupt-controller@7e00b200 {
--- /dev/null
+From 9ca847e5e96f1cb3e9886434c25cb755124dfdb9 Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Sat, 23 Apr 2016 14:20:41 +0000
+Subject: [PATCH] ARM: bcm2835: make dma-channel-0 available for kms setups
+
+Enable the use of dma-channel 0 when using the vc4-kms-v3d overlay.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+---
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -119,6 +119,13 @@
+ };
+ };
+
++ fragment@15 {
++ target-path = "/soc/dma";
++ __overlay__ {
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++ };
++
+ __overrides__ {
+ cma-256 = <0>,"+0-1-2-3-4";
+ cma-192 = <0>,"-0+1-2-3-4";
+++ /dev/null
-From 0cbf2a548657ddbeb0b7b7d144cc4f46f477b2fc Mon Sep 17 00:00:00 2001
-From: Martin Sperl <kernel@martin.sperl.org>
-Date: Sat, 23 Apr 2016 14:20:41 +0000
-Subject: [PATCH] ARM: bcm2835: make dma-channel-0 available for kms setups
-
-Enable the use of dma-channel 0 when using the vc4-kms-v3d overlay.
-
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
----
- arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-@@ -119,6 +119,13 @@
- };
- };
-
-+ fragment@15 {
-+ target-path = "/soc/dma";
-+ __overlay__ {
-+ brcm,dma-channel-mask = <0x7f35>;
-+ };
-+ };
-+
- __overrides__ {
- cma-256 = <0>,"+0-1-2-3-4";
- cma-192 = <0>,"-0+1-2-3-4";
--- /dev/null
+From 60026ebc9abd3e719f56db57c482679176ae8881 Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Tue, 7 Jun 2016 19:37:10 +0200
+Subject: [PATCH] dmaengine: bcm2835: Fix cyclic DMA period splitting
+
+The code responsible for splitting periods into chunks that
+can be handled by the DMA controller missed to update total_len,
+the number of bytes processed in the current period, when there
+are more chunks to follow.
+
+Therefore total_len was stuck at 0 and the code didn't work at all.
+This resulted in a wrong control block layout and audio issues because
+the cyclic DMA callback wasn't executing on period boundaries.
+
+Fix this by adding the missing total_len update.
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
+---
+ drivers/dma/bcm2835-dma.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -252,8 +252,11 @@ static void bcm2835_dma_create_cb_set_le
+ */
+
+ /* have we filled in period_length yet? */
+- if (*total_len + control_block->length < period_len)
++ if (*total_len + control_block->length < period_len) {
++ /* update number of bytes in this period so far */
++ *total_len += control_block->length;
+ return;
++ }
+
+ /* calculate the length that remains to reach period_length */
+ control_block->length = period_len - *total_len;
--- /dev/null
+From 1b57eb7cd54e31f84df2378c3858a4ad2d3ab8a1 Mon Sep 17 00:00:00 2001
+From: Matthias Reichl <hias@horus.com>
+Date: Wed, 8 Jun 2016 13:09:56 +0200
+Subject: [PATCH] dmaengine: bcm2835: Avoid splitting periods into very small
+ chunks
+
+The current cyclic DMA period splitting implementation can generate
+very small chunks at the end of each period. For example a 65536 byte
+period will be split into a 65532 byte chunk and a 4 byte chunk on
+the "lite" DMA channels.
+
+This increases pressure on the RAM controller as the DMA controller
+needs to fetch two control blocks from RAM in quick succession and
+could potentially cause latency issues if the RAM is tied up by other
+devices.
+
+We can easily avoid these situations by distributing the remaining
+length evenly between the last-but-one and the last chunk, making
+sure that split chunks will be at least half the maximum length the
+DMA controller can handle.
+
+This patch checks if the last chunk would be less than half of
+the maximum DMA length and if yes distributes the max len+4...max_len*1.5
+bytes evenly between the last 2 chunks. This results in chunk sizes
+between max_len/2 and max_len*0.75 bytes.
+
+Signed-off-by: Matthias Reichl <hias@horus.com>
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
+---
+ drivers/dma/bcm2835-dma.c | 14 ++++++++++++++
+ 1 file changed, 14 insertions(+)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -253,6 +253,20 @@ static void bcm2835_dma_create_cb_set_le
+
+ /* have we filled in period_length yet? */
+ if (*total_len + control_block->length < period_len) {
++ /*
++ * If the next control block is the last in the period
++ * and it's length would be less than half of max_len
++ * change it so that both control blocks are (almost)
++ * equally long. This avoids generating very short
++ * control blocks (worst case would be 4 bytes) which
++ * might be problematic. We also have to make sure the
++ * new length is a multiple of 4 bytes.
++ */
++ if (*total_len + control_block->length + max_len / 2 >
++ period_len) {
++ control_block->length =
++ DIV_ROUND_UP(period_len - *total_len, 8) * 4;
++ }
+ /* update number of bytes in this period so far */
+ *total_len += control_block->length;
+ return;
+++ /dev/null
-From aaf4cb4fda9ed5c19f0db02023c5c11f51a23aaf Mon Sep 17 00:00:00 2001
-From: Matthias Reichl <hias@horus.com>
-Date: Tue, 7 Jun 2016 19:37:10 +0200
-Subject: [PATCH] dmaengine: bcm2835: Fix cyclic DMA period splitting
-
-The code responsible for splitting periods into chunks that
-can be handled by the DMA controller missed to update total_len,
-the number of bytes processed in the current period, when there
-are more chunks to follow.
-
-Therefore total_len was stuck at 0 and the code didn't work at all.
-This resulted in a wrong control block layout and audio issues because
-the cyclic DMA callback wasn't executing on period boundaries.
-
-Fix this by adding the missing total_len update.
-
-Signed-off-by: Matthias Reichl <hias@horus.com>
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
----
- drivers/dma/bcm2835-dma.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -252,8 +252,11 @@ static void bcm2835_dma_create_cb_set_le
- */
-
- /* have we filled in period_length yet? */
-- if (*total_len + control_block->length < period_len)
-+ if (*total_len + control_block->length < period_len) {
-+ /* update number of bytes in this period so far */
-+ *total_len += control_block->length;
- return;
-+ }
-
- /* calculate the length that remains to reach period_length */
- control_block->length = period_len - *total_len;
+++ /dev/null
-From 47b93cc5b706cb592f924199f00d5adbb66bd3ca Mon Sep 17 00:00:00 2001
-From: Matthias Reichl <hias@horus.com>
-Date: Wed, 8 Jun 2016 13:09:56 +0200
-Subject: [PATCH] dmaengine: bcm2835: Avoid splitting periods into very small
- chunks
-
-The current cyclic DMA period splitting implementation can generate
-very small chunks at the end of each period. For example a 65536 byte
-period will be split into a 65532 byte chunk and a 4 byte chunk on
-the "lite" DMA channels.
-
-This increases pressure on the RAM controller as the DMA controller
-needs to fetch two control blocks from RAM in quick succession and
-could potentially cause latency issues if the RAM is tied up by other
-devices.
-
-We can easily avoid these situations by distributing the remaining
-length evenly between the last-but-one and the last chunk, making
-sure that split chunks will be at least half the maximum length the
-DMA controller can handle.
-
-This patch checks if the last chunk would be less than half of
-the maximum DMA length and if yes distributes the max len+4...max_len*1.5
-bytes evenly between the last 2 chunks. This results in chunk sizes
-between max_len/2 and max_len*0.75 bytes.
-
-Signed-off-by: Matthias Reichl <hias@horus.com>
-Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
-Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
----
- drivers/dma/bcm2835-dma.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -253,6 +253,20 @@ static void bcm2835_dma_create_cb_set_le
-
- /* have we filled in period_length yet? */
- if (*total_len + control_block->length < period_len) {
-+ /*
-+ * If the next control block is the last in the period
-+ * and it's length would be less than half of max_len
-+ * change it so that both control blocks are (almost)
-+ * equally long. This avoids generating very short
-+ * control blocks (worst case would be 4 bytes) which
-+ * might be problematic. We also have to make sure the
-+ * new length is a multiple of 4 bytes.
-+ */
-+ if (*total_len + control_block->length + max_len / 2 >
-+ period_len) {
-+ control_block->length =
-+ DIV_ROUND_UP(period_len - *total_len, 8) * 4;
-+ }
- /* update number of bytes in this period so far */
- *total_len += control_block->length;
- return;
--- /dev/null
+From 42504be159b0fd85d705265dceec01c74d853478 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 3 Jun 2016 19:29:11 -0700
+Subject: [PATCH] dmaengine: bcm2835: Fix polling for completion of DMA with
+ interrupts masked.
+
+The tx_status hook is supposed to be safe to call from interrupt
+context, but it wouldn't ever return completion for the last transfer,
+meaning you couldn't poll for DMA completion with interrupts masked.
+
+This fixes IRQ handling for bcm2835's DSI1, which requires using the
+DMA engine to write its registers due to a bug in the AXI bridge.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/dma/bcm2835-dma.c | 24 +++++++++++++++++++-----
+ 1 file changed, 19 insertions(+), 5 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -588,16 +588,16 @@ static enum dma_status bcm2835_dma_tx_st
+ struct virt_dma_desc *vd;
+ enum dma_status ret;
+ unsigned long flags;
++ u32 residue;
+
+ ret = dma_cookie_status(chan, cookie, txstate);
+- if (ret == DMA_COMPLETE || !txstate)
++ if (ret == DMA_COMPLETE)
+ return ret;
+
+ spin_lock_irqsave(&c->vc.lock, flags);
+ vd = vchan_find_desc(&c->vc, cookie);
+ if (vd) {
+- txstate->residue =
+- bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
++ residue = bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
+ } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
+ struct bcm2835_desc *d = c->desc;
+ dma_addr_t pos;
+@@ -609,11 +609,25 @@ static enum dma_status bcm2835_dma_tx_st
+ else
+ pos = 0;
+
+- txstate->residue = bcm2835_dma_desc_size_pos(d, pos);
++ residue = bcm2835_dma_desc_size_pos(d, pos);
++
++ /*
++ * If our non-cyclic transfer is done, then report
++ * complete and trigger the next tx now. This lets
++ * the dmaengine API be used synchronously from an IRQ
++ * handler.
++ */
++ if (!d->cyclic && residue == 0) {
++ vchan_cookie_complete(&c->desc->vd);
++ bcm2835_dma_start_desc(c);
++ ret = dma_cookie_status(chan, cookie, txstate);
++ }
+ } else {
+- txstate->residue = 0;
++ residue = 0;
+ }
+
++ dma_set_residue(txstate, residue);
++
+ spin_unlock_irqrestore(&c->vc.lock, flags);
+
+ return ret;
+++ /dev/null
-From 3288dc56cae869c8c49202f36669ea64d568407f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 3 Jun 2016 19:29:11 -0700
-Subject: [PATCH] dmaengine: bcm2835: Fix polling for completion of DMA with
- interrupts masked.
-
-The tx_status hook is supposed to be safe to call from interrupt
-context, but it wouldn't ever return completion for the last transfer,
-meaning you couldn't poll for DMA completion with interrupts masked.
-
-This fixes IRQ handling for bcm2835's DSI1, which requires using the
-DMA engine to write its registers due to a bug in the AXI bridge.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/dma/bcm2835-dma.c | 24 +++++++++++++++++++-----
- 1 file changed, 19 insertions(+), 5 deletions(-)
-
---- a/drivers/dma/bcm2835-dma.c
-+++ b/drivers/dma/bcm2835-dma.c
-@@ -588,16 +588,16 @@ static enum dma_status bcm2835_dma_tx_st
- struct virt_dma_desc *vd;
- enum dma_status ret;
- unsigned long flags;
-+ u32 residue;
-
- ret = dma_cookie_status(chan, cookie, txstate);
-- if (ret == DMA_COMPLETE || !txstate)
-+ if (ret == DMA_COMPLETE)
- return ret;
-
- spin_lock_irqsave(&c->vc.lock, flags);
- vd = vchan_find_desc(&c->vc, cookie);
- if (vd) {
-- txstate->residue =
-- bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
-+ residue = bcm2835_dma_desc_size(to_bcm2835_dma_desc(&vd->tx));
- } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
- struct bcm2835_desc *d = c->desc;
- dma_addr_t pos;
-@@ -609,11 +609,25 @@ static enum dma_status bcm2835_dma_tx_st
- else
- pos = 0;
-
-- txstate->residue = bcm2835_dma_desc_size_pos(d, pos);
-+ residue = bcm2835_dma_desc_size_pos(d, pos);
-+
-+ /*
-+ * If our non-cyclic transfer is done, then report
-+ * complete and trigger the next tx now. This lets
-+ * the dmaengine API be used synchronously from an IRQ
-+ * handler.
-+ */
-+ if (!d->cyclic && residue == 0) {
-+ vchan_cookie_complete(&c->desc->vd);
-+ bcm2835_dma_start_desc(c);
-+ ret = dma_cookie_status(chan, cookie, txstate);
-+ }
- } else {
-- txstate->residue = 0;
-+ residue = 0;
- }
-
-+ dma_set_residue(txstate, residue);
-+
- spin_unlock_irqrestore(&c->vc.lock, flags);
-
- return ret;
--- /dev/null
+From 6790d3a4683d7e2e6e0fe1bbc7ab856f23e37885 Mon Sep 17 00:00:00 2001
+From: Thomas Kriechbaumer <thomas@kriechbaumer.name>
+Date: Fri, 3 Jun 2016 09:40:44 +0200
+Subject: [PATCH] BCM270X_DT: Add spi-rtc overlay on SPI0.0
+
+Initial version only supports PCF2123 RTC.
+
+See: https://github.com/raspberrypi/linux/pull/1510
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +++++
+ arch/arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 ++++++++++++++++++++++++++
+ 3 files changed, 40 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -78,6 +78,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -975,6 +975,12 @@ Load: dtoverlay=spi-gpio35-39
+ Params: <None>
+
+
++Name: spi-rtc
++Info: Adds support for a number of SPI Real Time Clock devices
++Load: dtoverlay=spi-rtc,<param>=<val>
++Params: pcf2123 Select the PCF2123 device
++
++
+ Name: spi1-1cs
+ Info: Enables spi1 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
+@@ -0,0 +1,33 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ fragment@1 {
++ target = <&spi0>;
++ __dormant__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ rtc-pcf2123@0 {
++ compatible = "nxp,rtc-pcf2123";
++ spi-max-frequency = <5000000>;
++ spi-cs-high = <1>;
++ reg = <0>;
++ };
++ };
++ };
++
++ __overrides__ {
++ pcf2123 = <0>, "=0=1";
++ };
++};
+++ /dev/null
-From a008938ed54a702e72a8421776c1d3f97b79a97b Mon Sep 17 00:00:00 2001
-From: Thomas Kriechbaumer <thomas@kriechbaumer.name>
-Date: Fri, 3 Jun 2016 09:40:44 +0200
-Subject: [PATCH] BCM270X_DT: Add spi-rtc overlay on SPI0.0
-
-Initial version only supports PCF2123 RTC.
-
-See: https://github.com/raspberrypi/linux/pull/1510
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 +++++
- arch/arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 ++++++++++++++++++++++++++
- 3 files changed, 40 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -78,6 +78,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -975,6 +975,12 @@ Load: dtoverlay=spi-gpio35-39
- Params: <None>
-
-
-+Name: spi-rtc
-+Info: Adds support for a number of SPI Real Time Clock devices
-+Load: dtoverlay=spi-rtc,<param>=<val>
-+Params: pcf2123 Select the PCF2123 device
-+
-+
- Name: spi1-1cs
- Info: Enables spi1 with a single chip select (CS) line and associated spidev
- dev node. The gpio pin number for the CS line and spidev device node
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
-@@ -0,0 +1,33 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&spidev0>;
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&spi0>;
-+ __dormant__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ rtc-pcf2123@0 {
-+ compatible = "nxp,rtc-pcf2123";
-+ spi-max-frequency = <5000000>;
-+ spi-cs-high = <1>;
-+ reg = <0>;
-+ };
-+ };
-+ };
-+
-+ __overrides__ {
-+ pcf2123 = <0>, "=0=1";
-+ };
-+};
--- /dev/null
+From a7d1c71c6a12c3397d8a86f92980c0fbdf794d76 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 15 Jun 2016 16:48:41 +0100
+Subject: [PATCH] rtc: Add SPI alias for pcf2123 driver
+
+Without this alias, Device Tree won't cause the driver
+to be loaded.
+
+See: https://github.com/raspberrypi/linux/pull/1510
+---
+ drivers/rtc/rtc-pcf2123.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/rtc/rtc-pcf2123.c
++++ b/drivers/rtc/rtc-pcf2123.c
+@@ -358,3 +358,4 @@ MODULE_AUTHOR("Chris Verges <chrisv@cybe
+ MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
+ MODULE_LICENSE("GPL");
+ MODULE_VERSION(DRV_VERSION);
++MODULE_ALIAS("spi:rtc-pcf2123");
--- /dev/null
+From dfda207430384d249c2726f5e431565f56daf754 Mon Sep 17 00:00:00 2001
+From: Matt Flax <flatmax@flatmax.org>
+Date: Fri, 17 Jun 2016 12:03:39 +1000
+Subject: [PATCH] Added support for headphones, microphone and bclk_ratio
+ settings.
+
+This patch adds headphone and microphone capability to the Audio Injector sound card. The patch also sets the bit clock ratio for use in the bcm2835-i2s driver. The bcm2835-i2s can't handle an 8 kHz sample rate when the bit clock is at 12 MHz because its register is only 10 bits wide which can't represent the ch2 offset of 1508. For that reason, the rate constraint is added.
+---
+ sound/soc/bcm/audioinjector-pi-soundcard.c | 67 ++++++++++++++++++++++++++----
+ 1 file changed, 58 insertions(+), 9 deletions(-)
+
+--- a/sound/soc/bcm/audioinjector-pi-soundcard.c
++++ b/sound/soc/bcm/audioinjector-pi-soundcard.c
+@@ -29,16 +29,56 @@
+
+ #include "../codecs/wm8731.h"
+
+-static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
++static const unsigned int bcm2835_rates_12000000[] = {
++ 32000, 44100, 48000, 96000, 88200,
++};
++
++static struct snd_pcm_hw_constraint_list bcm2835_constraints_12000000 = {
++ .list = bcm2835_rates_12000000,
++ .count = ARRAY_SIZE(bcm2835_rates_12000000),
++};
++
++static int snd_audioinjector_pi_soundcard_startup(struct snd_pcm_substream *substream)
+ {
+- struct snd_soc_dapm_context *dapm = &rtd->card->dapm;
++ /* Setup constraints, because there is a 12 MHz XTAL on the board */
++ snd_pcm_hw_constraint_list(substream->runtime, 0,
++ SNDRV_PCM_HW_PARAM_RATE,
++ &bcm2835_constraints_12000000);
++ return 0;
++}
+
+- // not connected
+- snd_soc_dapm_nc_pin(dapm, "Mic Bias");
+- snd_soc_dapm_nc_pin(dapm, "MICIN");
+- snd_soc_dapm_nc_pin(dapm, "RHPOUT");
+- snd_soc_dapm_nc_pin(dapm, "LHPOUT");
++static int snd_audioinjector_pi_soundcard_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
++ switch (params_rate(params)){
++ case 8000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 1508);
++ case 32000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 378);
++ case 44100:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 274);
++ case 48000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 252);
++ case 88200:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 136);
++ case 96000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
++ default:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
++ }
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_audioinjector_pi_soundcard_ops = {
++ .startup = snd_audioinjector_pi_soundcard_startup,
++ .hw_params = snd_audioinjector_pi_soundcard_hw_params,
++};
++
++static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
++{
+ return snd_soc_dai_set_sysclk(rtd->codec_dai, WM8731_SYSCLK_XTAL, 12000000, SND_SOC_CLOCK_IN);
+ }
+
+@@ -50,30 +90,39 @@ static struct snd_soc_dai_link audioinje
+ .codec_dai_name = "wm8731-hifi",
+ .platform_name = "bcm2835-i2s.0",
+ .codec_name = "wm8731.1-001a",
++ .ops = &snd_audioinjector_pi_soundcard_ops,
+ .init = audioinjector_pi_soundcard_dai_init,
+ .dai_fmt = SND_SOC_DAIFMT_CBM_CFM|SND_SOC_DAIFMT_I2S|SND_SOC_DAIFMT_NB_NF,
+ },
+ };
+
+ static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
++ SND_SOC_DAPM_HP("Headphone Jack", NULL),
+ SND_SOC_DAPM_SPK("Ext Spk", NULL),
+ SND_SOC_DAPM_LINE("Line In Jacks", NULL),
++ SND_SOC_DAPM_MIC("Microphone", NULL),
+ };
+
+-/* Corgi machine connections to the codec pins */
+ static const struct snd_soc_dapm_route audioinjector_audio_map[] = {
++ /* headphone connected to LHPOUT, RHPOUT */
++ {"Headphone Jack", NULL, "LHPOUT"},
++ {"Headphone Jack", NULL, "RHPOUT"},
++
+ /* speaker connected to LOUT, ROUT */
+ {"Ext Spk", NULL, "ROUT"},
+ {"Ext Spk", NULL, "LOUT"},
+
+ /* line inputs */
+ {"Line In Jacks", NULL, "Line Input"},
++
++ /* mic is connected to Mic Jack, with WM8731 Mic Bias */
++ {"Microphone", NULL, "Mic Bias"},
+ };
+
+ static struct snd_soc_card snd_soc_audioinjector = {
+ .name = "audioinjector-pi-soundcard",
+ .dai_link = audioinjector_pi_soundcard_dai,
+- .num_links = 1,
++ .num_links = ARRAY_SIZE(audioinjector_pi_soundcard_dai),
+
+ .dapm_widgets = wm8731_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
+++ /dev/null
-From 2fbf5d24ff1f88d0aa977089549056cf4863f0de Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 15 Jun 2016 16:48:41 +0100
-Subject: [PATCH] rtc: Add SPI alias for pcf2123 driver
-
-Without this alias, Device Tree won't cause the driver
-to be loaded.
-
-See: https://github.com/raspberrypi/linux/pull/1510
----
- drivers/rtc/rtc-pcf2123.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/rtc/rtc-pcf2123.c
-+++ b/drivers/rtc/rtc-pcf2123.c
-@@ -358,3 +358,4 @@ MODULE_AUTHOR("Chris Verges <chrisv@cybe
- MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
- MODULE_LICENSE("GPL");
- MODULE_VERSION(DRV_VERSION);
-+MODULE_ALIAS("spi:rtc-pcf2123");
+++ /dev/null
-From 84b2845509748519f239b8212bdc672b84755cd0 Mon Sep 17 00:00:00 2001
-From: Matt Flax <flatmax@flatmax.org>
-Date: Fri, 17 Jun 2016 12:03:39 +1000
-Subject: [PATCH] Added support for headphones, microphone and bclk_ratio
- settings.
-
-This patch adds headphone and microphone capability to the Audio Injector sound card. The patch also sets the bit clock ratio for use in the bcm2835-i2s driver. The bcm2835-i2s can't handle an 8 kHz sample rate when the bit clock is at 12 MHz because its register is only 10 bits wide which can't represent the ch2 offset of 1508. For that reason, the rate constraint is added.
----
- sound/soc/bcm/audioinjector-pi-soundcard.c | 67 ++++++++++++++++++++++++++----
- 1 file changed, 58 insertions(+), 9 deletions(-)
-
---- a/sound/soc/bcm/audioinjector-pi-soundcard.c
-+++ b/sound/soc/bcm/audioinjector-pi-soundcard.c
-@@ -29,16 +29,56 @@
-
- #include "../codecs/wm8731.h"
-
--static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
-+static const unsigned int bcm2835_rates_12000000[] = {
-+ 32000, 44100, 48000, 96000, 88200,
-+};
-+
-+static struct snd_pcm_hw_constraint_list bcm2835_constraints_12000000 = {
-+ .list = bcm2835_rates_12000000,
-+ .count = ARRAY_SIZE(bcm2835_rates_12000000),
-+};
-+
-+static int snd_audioinjector_pi_soundcard_startup(struct snd_pcm_substream *substream)
- {
-- struct snd_soc_dapm_context *dapm = &rtd->card->dapm;
-+ /* Setup constraints, because there is a 12 MHz XTAL on the board */
-+ snd_pcm_hw_constraint_list(substream->runtime, 0,
-+ SNDRV_PCM_HW_PARAM_RATE,
-+ &bcm2835_constraints_12000000);
-+ return 0;
-+}
-
-- // not connected
-- snd_soc_dapm_nc_pin(dapm, "Mic Bias");
-- snd_soc_dapm_nc_pin(dapm, "MICIN");
-- snd_soc_dapm_nc_pin(dapm, "RHPOUT");
-- snd_soc_dapm_nc_pin(dapm, "LHPOUT");
-+static int snd_audioinjector_pi_soundcard_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-
-+ switch (params_rate(params)){
-+ case 8000:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 1508);
-+ case 32000:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 378);
-+ case 44100:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 274);
-+ case 48000:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 252);
-+ case 88200:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 136);
-+ case 96000:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
-+ default:
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
-+ }
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_audioinjector_pi_soundcard_ops = {
-+ .startup = snd_audioinjector_pi_soundcard_startup,
-+ .hw_params = snd_audioinjector_pi_soundcard_hw_params,
-+};
-+
-+static int audioinjector_pi_soundcard_dai_init(struct snd_soc_pcm_runtime *rtd)
-+{
- return snd_soc_dai_set_sysclk(rtd->codec_dai, WM8731_SYSCLK_XTAL, 12000000, SND_SOC_CLOCK_IN);
- }
-
-@@ -50,30 +90,39 @@ static struct snd_soc_dai_link audioinje
- .codec_dai_name = "wm8731-hifi",
- .platform_name = "bcm2835-i2s.0",
- .codec_name = "wm8731.1-001a",
-+ .ops = &snd_audioinjector_pi_soundcard_ops,
- .init = audioinjector_pi_soundcard_dai_init,
- .dai_fmt = SND_SOC_DAIFMT_CBM_CFM|SND_SOC_DAIFMT_I2S|SND_SOC_DAIFMT_NB_NF,
- },
- };
-
- static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
-+ SND_SOC_DAPM_HP("Headphone Jack", NULL),
- SND_SOC_DAPM_SPK("Ext Spk", NULL),
- SND_SOC_DAPM_LINE("Line In Jacks", NULL),
-+ SND_SOC_DAPM_MIC("Microphone", NULL),
- };
-
--/* Corgi machine connections to the codec pins */
- static const struct snd_soc_dapm_route audioinjector_audio_map[] = {
-+ /* headphone connected to LHPOUT, RHPOUT */
-+ {"Headphone Jack", NULL, "LHPOUT"},
-+ {"Headphone Jack", NULL, "RHPOUT"},
-+
- /* speaker connected to LOUT, ROUT */
- {"Ext Spk", NULL, "ROUT"},
- {"Ext Spk", NULL, "LOUT"},
-
- /* line inputs */
- {"Line In Jacks", NULL, "Line Input"},
-+
-+ /* mic is connected to Mic Jack, with WM8731 Mic Bias */
-+ {"Microphone", NULL, "Mic Bias"},
- };
-
- static struct snd_soc_card snd_soc_audioinjector = {
- .name = "audioinjector-pi-soundcard",
- .dai_link = audioinjector_pi_soundcard_dai,
-- .num_links = 1,
-+ .num_links = ARRAY_SIZE(audioinjector_pi_soundcard_dai),
-
- .dapm_widgets = wm8731_dapm_widgets,
- .num_dapm_widgets = ARRAY_SIZE(wm8731_dapm_widgets),
--- /dev/null
+From 727a41c904af3f1660de44dc3309b054a1234246 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Mon, 9 May 2016 20:38:08 +0100
+Subject: [PATCH] IQaudIO: auto-mute for AMP+ and DigiAMP+
+
+IQAudIO amplifier mute via GPIO22. Add dt params for "one-shot" unmute
+and auto mute.
+
+Revision 2, auto mute implementing HiassofT suggestion to mute/unmute
+using set_bias_level, rather than startup/shutdown....
+"By default DAPM waits 5 seconds (pmdown_time) before shutting down
+playback streams so a close/stop immediately followed by open/start
+doesn't trigger an amp mute+unmute."
+
+Tested on both AMP+ (via DAC+) and DigiAMP+, with both options...
+
+dtoverlay=iqaudio-dacplus,unmute_amp
+ "one-shot" unmute when kernel module loads.
+
+dtoverlay=iqaudio-dacplus,auto_mute_amp
+ Unmute amp when ALSA device opened by a client. Mute, with 5 second delay
+ when ALSA device closed. (Re-opening the device within the 5 second close
+ window, will cancel mute.)
+
+Revision 4, using gpiod.
+
+Revision 5, clean-up formatting before adding mute code.
+ - Convert tab plus 4 space formatting to 2x tab
+ - Remove '// NOT USED' commented code
+
+Revision 6, don't attempt to "one-shot" unmute amp, unless card is
+successfully registered.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/README | 4 +
+ .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 7 +-
+ sound/soc/bcm/iqaudio-dac.c | 144 ++++++++++++++++-----
+ 3 files changed, 124 insertions(+), 31 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -540,6 +540,10 @@ Params: 24db_digital_gain Allow ga
+ responsibility of the user to ensure that
+ the Digital volume control is set to a value
+ that does not result in clipping/distortion!)
++ auto_mute_amp If specified, unmute/mute the IQaudIO amp when
++ starting/stopping audio playback.
++ unmute_amp If specified, unmute the IQaudIO amp once when
++ the DAC driver module loads.
+
+
+ Name: justboom-dac
+--- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
++++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
+@@ -30,14 +30,17 @@
+
+ fragment@2 {
+ target = <&sound>;
+- frag2: __overlay__ {
++ iqaudio_dac: __overlay__ {
+ compatible = "iqaudio,iqaudio-dac";
+ i2s-controller = <&i2s>;
++ mute-gpios = <&gpio 22 0>;
+ status = "okay";
+ };
+ };
+
+ __overrides__ {
+- 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
++ 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
++ auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
++ unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
+ };
+ };
+--- a/sound/soc/bcm/iqaudio-dac.c
++++ b/sound/soc/bcm/iqaudio-dac.c
+@@ -15,6 +15,7 @@
+ */
+
+ #include <linux/module.h>
++#include <linux/gpio/consumer.h>
+ #include <linux/platform_device.h>
+
+ #include <sound/core.h>
+@@ -25,6 +26,8 @@
+
+ static bool digital_gain_0db_limit = true;
+
++static struct gpio_desc *mute_gpio;
++
+ static int snd_rpi_iqaudio_dac_init(struct snd_soc_pcm_runtime *rtd)
+ {
+ if (digital_gain_0db_limit)
+@@ -41,11 +44,9 @@ static int snd_rpi_iqaudio_dac_init(stru
+ }
+
+ static int snd_rpi_iqaudio_dac_hw_params(struct snd_pcm_substream *substream,
+- struct snd_pcm_hw_params *params)
++ struct snd_pcm_hw_params *params)
+ {
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+-// NOT USED struct snd_soc_dai *codec_dai = rtd->codec_dai;
+-// NOT USED struct snd_soc_codec *codec = rtd->codec;
+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+
+ unsigned int sample_bits =
+@@ -54,6 +55,56 @@ static int snd_rpi_iqaudio_dac_hw_params
+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
+ }
+
++static void snd_rpi_iqaudio_gpio_mute(struct snd_soc_card *card)
++{
++ if (mute_gpio) {
++ dev_info(card->dev, "%s: muting amp using GPIO22\n",
++ __func__);
++ gpiod_set_value_cansleep(mute_gpio, 0);
++ }
++}
++
++static void snd_rpi_iqaudio_gpio_unmute(struct snd_soc_card *card)
++{
++ if (mute_gpio) {
++ dev_info(card->dev, "%s: un-muting amp using GPIO22\n",
++ __func__);
++ gpiod_set_value_cansleep(mute_gpio, 1);
++ }
++}
++
++static int snd_rpi_iqaudio_set_bias_level(struct snd_soc_card *card,
++ struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
++{
++ struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
++
++ if (dapm->dev != codec_dai->dev)
++ return 0;
++
++ switch (level) {
++ case SND_SOC_BIAS_PREPARE:
++ if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
++ break;
++
++ /* UNMUTE AMP */
++ snd_rpi_iqaudio_gpio_unmute(card);
++
++ break;
++ case SND_SOC_BIAS_STANDBY:
++ if (dapm->bias_level != SND_SOC_BIAS_PREPARE)
++ break;
++
++ /* MUTE AMP */
++ snd_rpi_iqaudio_gpio_mute(card);
++
++ break;
++ default:
++ break;
++ }
++
++ return 0;
++}
++
+ /* machine stream operations */
+ static struct snd_soc_ops snd_rpi_iqaudio_dac_ops = {
+ .hw_params = snd_rpi_iqaudio_dac_hw_params,
+@@ -82,46 +133,81 @@ static struct snd_soc_card snd_rpi_iqaud
+ static int snd_rpi_iqaudio_dac_probe(struct platform_device *pdev)
+ {
+ int ret = 0;
++ bool gpio_unmute = false;
+
+ snd_rpi_iqaudio_dac.dev = &pdev->dev;
+
+ if (pdev->dev.of_node) {
+- struct device_node *i2s_node;
+- struct snd_soc_card *card = &snd_rpi_iqaudio_dac;
+- struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_dac_dai[0];
+- i2s_node = of_parse_phandle(pdev->dev.of_node,
+- "i2s-controller", 0);
+-
+- if (i2s_node) {
+- dai->cpu_dai_name = NULL;
+- dai->cpu_of_node = i2s_node;
+- dai->platform_name = NULL;
+- dai->platform_of_node = i2s_node;
+- }
+-
+- digital_gain_0db_limit = !of_property_read_bool(pdev->dev.of_node,
+- "iqaudio,24db_digital_gain");
+- if (of_property_read_string(pdev->dev.of_node, "card_name",
+- &card->name))
+- card->name = "IQaudIODAC";
+- if (of_property_read_string(pdev->dev.of_node, "dai_name",
+- &dai->name))
+- dai->name = "IQaudIO DAC";
+- if (of_property_read_string(pdev->dev.of_node, "dai_stream_name",
+- &dai->stream_name))
+- dai->stream_name = "IQaudIO DAC HiFi";
++ struct device_node *i2s_node;
++ struct snd_soc_card *card = &snd_rpi_iqaudio_dac;
++ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_dac_dai[0];
++ bool auto_gpio_mute = false;
++
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ digital_gain_0db_limit = !of_property_read_bool(
++ pdev->dev.of_node, "iqaudio,24db_digital_gain");
++
++ if (of_property_read_string(pdev->dev.of_node, "card_name",
++ &card->name))
++ card->name = "IQaudIODAC";
++
++ if (of_property_read_string(pdev->dev.of_node, "dai_name",
++ &dai->name))
++ dai->name = "IQaudIO DAC";
++
++ if (of_property_read_string(pdev->dev.of_node,
++ "dai_stream_name", &dai->stream_name))
++ dai->stream_name = "IQaudIO DAC HiFi";
++
++ /* gpio_unmute - one time unmute amp using GPIO */
++ gpio_unmute = of_property_read_bool(pdev->dev.of_node,
++ "iqaudio-dac,unmute-amp");
++
++ /* auto_gpio_mute - mute/unmute amp using GPIO */
++ auto_gpio_mute = of_property_read_bool(pdev->dev.of_node,
++ "iqaudio-dac,auto-mute-amp");
++
++ if (auto_gpio_mute || gpio_unmute) {
++ mute_gpio = devm_gpiod_get_optional(&pdev->dev, "mute",
++ GPIOD_OUT_LOW);
++ if (IS_ERR(mute_gpio)) {
++ ret = PTR_ERR(mute_gpio);
++ dev_err(&pdev->dev,
++ "Failed to get mute gpio: %d\n", ret);
++ return ret;
++ }
++
++ if (auto_gpio_mute && mute_gpio)
++ snd_rpi_iqaudio_dac.set_bias_level =
++ snd_rpi_iqaudio_set_bias_level;
++ }
+ }
+
+ ret = snd_soc_register_card(&snd_rpi_iqaudio_dac);
+- if (ret)
++ if (ret) {
+ dev_err(&pdev->dev,
+ "snd_soc_register_card() failed: %d\n", ret);
++ return ret;
++ }
++
++ if (gpio_unmute && mute_gpio)
++ snd_rpi_iqaudio_gpio_unmute(&snd_rpi_iqaudio_dac);
+
+- return ret;
++ return 0;
+ }
+
+ static int snd_rpi_iqaudio_dac_remove(struct platform_device *pdev)
+ {
++ snd_rpi_iqaudio_gpio_mute(&snd_rpi_iqaudio_dac);
++
+ return snd_soc_unregister_card(&snd_rpi_iqaudio_dac);
+ }
+
+++ /dev/null
-From 98f0214603229df4038cc0d318111a37b10078a1 Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Mon, 9 May 2016 20:38:08 +0100
-Subject: [PATCH] IQaudIO: auto-mute for AMP+ and DigiAMP+
-
-IQAudIO amplifier mute via GPIO22. Add dt params for "one-shot" unmute
-and auto mute.
-
-Revision 2, auto mute implementing HiassofT suggestion to mute/unmute
-using set_bias_level, rather than startup/shutdown....
-"By default DAPM waits 5 seconds (pmdown_time) before shutting down
-playback streams so a close/stop immediately followed by open/start
-doesn't trigger an amp mute+unmute."
-
-Tested on both AMP+ (via DAC+) and DigiAMP+, with both options...
-
-dtoverlay=iqaudio-dacplus,unmute_amp
- "one-shot" unmute when kernel module loads.
-
-dtoverlay=iqaudio-dacplus,auto_mute_amp
- Unmute amp when ALSA device opened by a client. Mute, with 5 second delay
- when ALSA device closed. (Re-opening the device within the 5 second close
- window, will cancel mute.)
-
-Revision 4, using gpiod.
-
-Revision 5, clean-up formatting before adding mute code.
- - Convert tab plus 4 space formatting to 2x tab
- - Remove '// NOT USED' commented code
-
-Revision 6, don't attempt to "one-shot" unmute amp, unless card is
-successfully registered.
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/overlays/README | 4 +
- .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 7 +-
- sound/soc/bcm/iqaudio-dac.c | 144 ++++++++++++++++-----
- 3 files changed, 124 insertions(+), 31 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -540,6 +540,10 @@ Params: 24db_digital_gain Allow ga
- responsibility of the user to ensure that
- the Digital volume control is set to a value
- that does not result in clipping/distortion!)
-+ auto_mute_amp If specified, unmute/mute the IQaudIO amp when
-+ starting/stopping audio playback.
-+ unmute_amp If specified, unmute the IQaudIO amp once when
-+ the DAC driver module loads.
-
-
- Name: justboom-dac
---- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
-@@ -30,14 +30,17 @@
-
- fragment@2 {
- target = <&sound>;
-- frag2: __overlay__ {
-+ iqaudio_dac: __overlay__ {
- compatible = "iqaudio,iqaudio-dac";
- i2s-controller = <&i2s>;
-+ mute-gpios = <&gpio 22 0>;
- status = "okay";
- };
- };
-
- __overrides__ {
-- 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
-+ 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
-+ auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
-+ unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
- };
- };
---- a/sound/soc/bcm/iqaudio-dac.c
-+++ b/sound/soc/bcm/iqaudio-dac.c
-@@ -15,6 +15,7 @@
- */
-
- #include <linux/module.h>
-+#include <linux/gpio/consumer.h>
- #include <linux/platform_device.h>
-
- #include <sound/core.h>
-@@ -25,6 +26,8 @@
-
- static bool digital_gain_0db_limit = true;
-
-+static struct gpio_desc *mute_gpio;
-+
- static int snd_rpi_iqaudio_dac_init(struct snd_soc_pcm_runtime *rtd)
- {
- if (digital_gain_0db_limit)
-@@ -41,11 +44,9 @@ static int snd_rpi_iqaudio_dac_init(stru
- }
-
- static int snd_rpi_iqaudio_dac_hw_params(struct snd_pcm_substream *substream,
-- struct snd_pcm_hw_params *params)
-+ struct snd_pcm_hw_params *params)
- {
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
--// NOT USED struct snd_soc_dai *codec_dai = rtd->codec_dai;
--// NOT USED struct snd_soc_codec *codec = rtd->codec;
- struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-
- unsigned int sample_bits =
-@@ -54,6 +55,56 @@ static int snd_rpi_iqaudio_dac_hw_params
- return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
- }
-
-+static void snd_rpi_iqaudio_gpio_mute(struct snd_soc_card *card)
-+{
-+ if (mute_gpio) {
-+ dev_info(card->dev, "%s: muting amp using GPIO22\n",
-+ __func__);
-+ gpiod_set_value_cansleep(mute_gpio, 0);
-+ }
-+}
-+
-+static void snd_rpi_iqaudio_gpio_unmute(struct snd_soc_card *card)
-+{
-+ if (mute_gpio) {
-+ dev_info(card->dev, "%s: un-muting amp using GPIO22\n",
-+ __func__);
-+ gpiod_set_value_cansleep(mute_gpio, 1);
-+ }
-+}
-+
-+static int snd_rpi_iqaudio_set_bias_level(struct snd_soc_card *card,
-+ struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level)
-+{
-+ struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
-+
-+ if (dapm->dev != codec_dai->dev)
-+ return 0;
-+
-+ switch (level) {
-+ case SND_SOC_BIAS_PREPARE:
-+ if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
-+ break;
-+
-+ /* UNMUTE AMP */
-+ snd_rpi_iqaudio_gpio_unmute(card);
-+
-+ break;
-+ case SND_SOC_BIAS_STANDBY:
-+ if (dapm->bias_level != SND_SOC_BIAS_PREPARE)
-+ break;
-+
-+ /* MUTE AMP */
-+ snd_rpi_iqaudio_gpio_mute(card);
-+
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ return 0;
-+}
-+
- /* machine stream operations */
- static struct snd_soc_ops snd_rpi_iqaudio_dac_ops = {
- .hw_params = snd_rpi_iqaudio_dac_hw_params,
-@@ -82,46 +133,81 @@ static struct snd_soc_card snd_rpi_iqaud
- static int snd_rpi_iqaudio_dac_probe(struct platform_device *pdev)
- {
- int ret = 0;
-+ bool gpio_unmute = false;
-
- snd_rpi_iqaudio_dac.dev = &pdev->dev;
-
- if (pdev->dev.of_node) {
-- struct device_node *i2s_node;
-- struct snd_soc_card *card = &snd_rpi_iqaudio_dac;
-- struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_dac_dai[0];
-- i2s_node = of_parse_phandle(pdev->dev.of_node,
-- "i2s-controller", 0);
--
-- if (i2s_node) {
-- dai->cpu_dai_name = NULL;
-- dai->cpu_of_node = i2s_node;
-- dai->platform_name = NULL;
-- dai->platform_of_node = i2s_node;
-- }
--
-- digital_gain_0db_limit = !of_property_read_bool(pdev->dev.of_node,
-- "iqaudio,24db_digital_gain");
-- if (of_property_read_string(pdev->dev.of_node, "card_name",
-- &card->name))
-- card->name = "IQaudIODAC";
-- if (of_property_read_string(pdev->dev.of_node, "dai_name",
-- &dai->name))
-- dai->name = "IQaudIO DAC";
-- if (of_property_read_string(pdev->dev.of_node, "dai_stream_name",
-- &dai->stream_name))
-- dai->stream_name = "IQaudIO DAC HiFi";
-+ struct device_node *i2s_node;
-+ struct snd_soc_card *card = &snd_rpi_iqaudio_dac;
-+ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_dac_dai[0];
-+ bool auto_gpio_mute = false;
-+
-+ i2s_node = of_parse_phandle(pdev->dev.of_node,
-+ "i2s-controller", 0);
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+
-+ digital_gain_0db_limit = !of_property_read_bool(
-+ pdev->dev.of_node, "iqaudio,24db_digital_gain");
-+
-+ if (of_property_read_string(pdev->dev.of_node, "card_name",
-+ &card->name))
-+ card->name = "IQaudIODAC";
-+
-+ if (of_property_read_string(pdev->dev.of_node, "dai_name",
-+ &dai->name))
-+ dai->name = "IQaudIO DAC";
-+
-+ if (of_property_read_string(pdev->dev.of_node,
-+ "dai_stream_name", &dai->stream_name))
-+ dai->stream_name = "IQaudIO DAC HiFi";
-+
-+ /* gpio_unmute - one time unmute amp using GPIO */
-+ gpio_unmute = of_property_read_bool(pdev->dev.of_node,
-+ "iqaudio-dac,unmute-amp");
-+
-+ /* auto_gpio_mute - mute/unmute amp using GPIO */
-+ auto_gpio_mute = of_property_read_bool(pdev->dev.of_node,
-+ "iqaudio-dac,auto-mute-amp");
-+
-+ if (auto_gpio_mute || gpio_unmute) {
-+ mute_gpio = devm_gpiod_get_optional(&pdev->dev, "mute",
-+ GPIOD_OUT_LOW);
-+ if (IS_ERR(mute_gpio)) {
-+ ret = PTR_ERR(mute_gpio);
-+ dev_err(&pdev->dev,
-+ "Failed to get mute gpio: %d\n", ret);
-+ return ret;
-+ }
-+
-+ if (auto_gpio_mute && mute_gpio)
-+ snd_rpi_iqaudio_dac.set_bias_level =
-+ snd_rpi_iqaudio_set_bias_level;
-+ }
- }
-
- ret = snd_soc_register_card(&snd_rpi_iqaudio_dac);
-- if (ret)
-+ if (ret) {
- dev_err(&pdev->dev,
- "snd_soc_register_card() failed: %d\n", ret);
-+ return ret;
-+ }
-+
-+ if (gpio_unmute && mute_gpio)
-+ snd_rpi_iqaudio_gpio_unmute(&snd_rpi_iqaudio_dac);
-
-- return ret;
-+ return 0;
- }
-
- static int snd_rpi_iqaudio_dac_remove(struct platform_device *pdev)
- {
-+ snd_rpi_iqaudio_gpio_mute(&snd_rpi_iqaudio_dac);
-+
- return snd_soc_unregister_card(&snd_rpi_iqaudio_dac);
- }
-
--- /dev/null
+From 16be2ba945abbb43d62dd7d5a34ab4d6b4f40932 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 23 Jun 2016 16:37:46 +0100
+Subject: [PATCH] mmc: Apply ERASE_BROKEN quirks correctly
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/card/block.c | 9 +++------
+ 1 file changed, 3 insertions(+), 6 deletions(-)
+
+--- a/drivers/mmc/card/block.c
++++ b/drivers/mmc/card/block.c
+@@ -2564,12 +2564,9 @@ static const struct mmc_fixup blk_fixups
+ * On some Kingston SD cards, multiple erases of less than 64
+ * sectors can cause corruption.
+ */
+- MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
+- MMC_QUIRK_ERASE_BROKEN),
+- MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk_mmc,
+- MMC_QUIRK_ERASE_BROKEN),
+- MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk_mmc,
+- MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
++ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
+
+ END_FIXUP
+ };
--- /dev/null
+From 2875141e9d5005e964e31e55b892e2fb1919e58e Mon Sep 17 00:00:00 2001
+From: Jools Wills <buzz@exotica.org.uk>
+Date: Sun, 26 Jun 2016 16:28:48 +0000
+Subject: [PATCH] enable led support for xpad driver - fixes flashing leds on
+ controller
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -559,6 +559,7 @@ CONFIG_JOYSTICK_IFORCE=m
+ CONFIG_JOYSTICK_IFORCE_USB=y
+ CONFIG_JOYSTICK_XPAD=m
+ CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
+ CONFIG_JOYSTICK_RPISENSE=m
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_ADS7846=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -552,6 +552,7 @@ CONFIG_JOYSTICK_IFORCE=m
+ CONFIG_JOYSTICK_IFORCE_USB=y
+ CONFIG_JOYSTICK_XPAD=m
+ CONFIG_JOYSTICK_XPAD_FF=y
++CONFIG_JOYSTICK_XPAD_LEDS=y
+ CONFIG_JOYSTICK_RPISENSE=m
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_ADS7846=m
+++ /dev/null
-From 3aa91ff84515641bdc7a3b2ddf4638af0942bc56 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 23 Jun 2016 16:37:46 +0100
-Subject: [PATCH] mmc: Apply ERASE_BROKEN quirks correctly
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/card/block.c | 9 +++------
- 1 file changed, 3 insertions(+), 6 deletions(-)
-
---- a/drivers/mmc/card/block.c
-+++ b/drivers/mmc/card/block.c
-@@ -2564,12 +2564,9 @@ static const struct mmc_fixup blk_fixups
- * On some Kingston SD cards, multiple erases of less than 64
- * sectors can cause corruption.
- */
-- MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc,
-- MMC_QUIRK_ERASE_BROKEN),
-- MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk_mmc,
-- MMC_QUIRK_ERASE_BROKEN),
-- MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk_mmc,
-- MMC_QUIRK_ERASE_BROKEN),
-+ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
-+ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
-+ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN),
-
- END_FIXUP
- };
--- /dev/null
+From d5daa09a0c5f5f6acf6f4445f24aa05c09f3b085 Mon Sep 17 00:00:00 2001
+From: David Lechner <david@lechnology.com>
+Date: Mon, 27 Jun 2016 22:52:22 -0500
+Subject: [PATCH] Add critical information for getting pi3-miniuart-bt overlay
+ to work
+
+Bluetooth on RPi 3 using uart1 will not work without setting core_freq=250 in config.txt. This is not
+documented anywhere, so this seems like a good place to start.
+---
+ arch/arm/boot/dts/overlays/README | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -691,7 +691,9 @@ Info: Switch Pi3 Bluetooth function to
+ N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
+ and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
+ that create /dev/serial0 and /dev/serial1, in which case use
+- /dev/serial1 instead because it will always be correct.
++ /dev/serial1 instead because it will always be correct. Furthermore,
++ you must also set core_freq=250 in config.txt or the miniuart will not
++ work.
+ Load: dtoverlay=pi3-miniuart-bt
+ Params: <None>
+
+++ /dev/null
-From 37d18c9d142632b625e03586657631099217dd5d Mon Sep 17 00:00:00 2001
-From: Jools Wills <buzz@exotica.org.uk>
-Date: Sun, 26 Jun 2016 16:28:48 +0000
-Subject: [PATCH] enable led support for xpad driver - fixes flashing leds on
- controller
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -559,6 +559,7 @@ CONFIG_JOYSTICK_IFORCE=m
- CONFIG_JOYSTICK_IFORCE_USB=y
- CONFIG_JOYSTICK_XPAD=m
- CONFIG_JOYSTICK_XPAD_FF=y
-+CONFIG_JOYSTICK_XPAD_LEDS=y
- CONFIG_JOYSTICK_RPISENSE=m
- CONFIG_INPUT_TOUCHSCREEN=y
- CONFIG_TOUCHSCREEN_ADS7846=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -552,6 +552,7 @@ CONFIG_JOYSTICK_IFORCE=m
- CONFIG_JOYSTICK_IFORCE_USB=y
- CONFIG_JOYSTICK_XPAD=m
- CONFIG_JOYSTICK_XPAD_FF=y
-+CONFIG_JOYSTICK_XPAD_LEDS=y
- CONFIG_JOYSTICK_RPISENSE=m
- CONFIG_INPUT_TOUCHSCREEN=y
- CONFIG_TOUCHSCREEN_ADS7846=m
+++ /dev/null
-From 740fa92fd41e2c4dd5798d462fe4646d0cc6cc48 Mon Sep 17 00:00:00 2001
-From: David Lechner <david@lechnology.com>
-Date: Mon, 27 Jun 2016 22:52:22 -0500
-Subject: [PATCH] Add critical information for getting pi3-miniuart-bt overlay
- to work
-
-Bluetooth on RPi 3 using uart1 will not work without setting core_freq=250 in config.txt. This is not
-documented anywhere, so this seems like a good place to start.
----
- arch/arm/boot/dts/overlays/README | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -691,7 +691,9 @@ Info: Switch Pi3 Bluetooth function to
- N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
- and replace ttyAMA0 with ttyS0, unless you have a system with udev rules
- that create /dev/serial0 and /dev/serial1, in which case use
-- /dev/serial1 instead because it will always be correct.
-+ /dev/serial1 instead because it will always be correct. Furthermore,
-+ you must also set core_freq=250 in config.txt or the miniuart will not
-+ work.
- Load: dtoverlay=pi3-miniuart-bt
- Params: <None>
-
--- /dev/null
+From 3b99e3ac668642719abd928743e1fce9fe1c24c9 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 15 Jun 2016 17:13:55 +0100
+Subject: [PATCH] bcm2835-sdhost: Improvements to error recovery
+
+1) Try to avoid reducing overclock when a card is removed.
+
+2) Reset overclock on card insertion.
+
+3) Reduce logging when errors occur, lowering the severity of
+ some messages and making others conditional on the debug
+ flag.
+
+4) Attempt to identify a disconnected SD bus earlier, treating a
+ zero returned OCR (voltage support) as an error condition.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/host/bcm2835-sdhost.c | 117 ++++++++++++++++++++++++--------------
+ 1 file changed, 74 insertions(+), 43 deletions(-)
+
+--- a/drivers/mmc/host/bcm2835-sdhost.c
++++ b/drivers/mmc/host/bcm2835-sdhost.c
+@@ -38,6 +38,7 @@
+ #include <linux/mmc/mmc.h>
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/sd.h>
++#include <linux/mmc/sdio.h>
+ #include <linux/scatterlist.h>
+ #include <linux/of_address.h>
+ #include <linux/of_irq.h>
+@@ -206,6 +207,7 @@ struct bcm2835_host {
+ struct timeval stop_time; /* when the last stop was issued */
+ u32 delay_after_stop; /* minimum time between stop and subsequent data transfer */
+ u32 delay_after_this_stop; /* minimum time between this stop and subsequent data transfer */
++ u32 user_overclock_50; /* User's preferred frequency to use when 50MHz is requested (in MHz) */
+ u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
+ u32 overclock; /* Current frequency if overclocked, else zero */
+ u32 pio_limit; /* Maximum block count for PIO (0 = always DMA) */
+@@ -282,7 +284,7 @@ static void log_dump(void)
+ do {
+ entry = sdhost_log_buf + idx;
+ if (entry->event[0] != '\0')
+- pr_err("[%08x] %.4s %x %x\n",
++ pr_info("[%08x] %.4s %x %x\n",
+ entry->timestamp,
+ entry->event,
+ entry->param1,
+@@ -324,7 +326,7 @@ static void bcm2835_sdhost_dumpcmd(struc
+ const char *label)
+ {
+ if (cmd)
+- pr_err("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
++ pr_info("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
+ mmc_hostname(host->mmc),
+ (cmd == host->cmd) ? '>' : ' ',
+ label, cmd->opcode, cmd->arg, cmd->flags,
+@@ -339,7 +341,7 @@ static void bcm2835_sdhost_dumpregs(stru
+ bcm2835_sdhost_dumpcmd(host, host->mrq->sbc, "sbc");
+ bcm2835_sdhost_dumpcmd(host, host->mrq->cmd, "cmd");
+ if (host->mrq->data)
+- pr_err("%s: data blocks %x blksz %x - err %d\n",
++ pr_info("%s: data blocks %x blksz %x - err %d\n",
+ mmc_hostname(host->mmc),
+ host->mrq->data->blocks,
+ host->mrq->data->blksz,
+@@ -347,53 +349,53 @@ static void bcm2835_sdhost_dumpregs(stru
+ bcm2835_sdhost_dumpcmd(host, host->mrq->stop, "stop");
+ }
+
+- pr_err("%s: =========== REGISTER DUMP ===========\n",
++ pr_info("%s: =========== REGISTER DUMP ===========\n",
+ mmc_hostname(host->mmc));
+
+- pr_err("%s: SDCMD 0x%08x\n",
++ pr_info("%s: SDCMD 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDCMD));
+- pr_err("%s: SDARG 0x%08x\n",
++ pr_info("%s: SDARG 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDARG));
+- pr_err("%s: SDTOUT 0x%08x\n",
++ pr_info("%s: SDTOUT 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDTOUT));
+- pr_err("%s: SDCDIV 0x%08x\n",
++ pr_info("%s: SDCDIV 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDCDIV));
+- pr_err("%s: SDRSP0 0x%08x\n",
++ pr_info("%s: SDRSP0 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP0));
+- pr_err("%s: SDRSP1 0x%08x\n",
++ pr_info("%s: SDRSP1 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP1));
+- pr_err("%s: SDRSP2 0x%08x\n",
++ pr_info("%s: SDRSP2 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP2));
+ pr_err("%s: SDRSP3 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP3));
+- pr_err("%s: SDHSTS 0x%08x\n",
++ pr_info("%s: SDHSTS 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHSTS));
+- pr_err("%s: SDVDD 0x%08x\n",
++ pr_info("%s: SDVDD 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDVDD));
+- pr_err("%s: SDEDM 0x%08x\n",
++ pr_info("%s: SDEDM 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDEDM));
+- pr_err("%s: SDHCFG 0x%08x\n",
++ pr_info("%s: SDHCFG 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHCFG));
+- pr_err("%s: SDHBCT 0x%08x\n",
++ pr_info("%s: SDHBCT 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHBCT));
+- pr_err("%s: SDHBLC 0x%08x\n",
++ pr_info("%s: SDHBLC 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDHBLC));
+
+- pr_err("%s: ===========================================\n",
++ pr_info("%s: ===========================================\n",
+ mmc_hostname(host->mmc));
+ }
+
+@@ -608,7 +610,7 @@ static void bcm2835_sdhost_read_block_pi
+ (fsm_state != SDEDM_FSM_READCRC)) {
+ hsts = bcm2835_sdhost_read(host,
+ SDHSTS);
+- pr_err("%s: fsm %x, hsts %x\n",
++ pr_info("%s: fsm %x, hsts %x\n",
+ mmc_hostname(host->mmc),
+ fsm_state, hsts);
+ if (hsts & SDHSTS_ERROR_MASK)
+@@ -698,7 +700,7 @@ static void bcm2835_sdhost_write_block_p
+ (fsm_state != SDEDM_FSM_WRITESTART2)) {
+ hsts = bcm2835_sdhost_read(host,
+ SDHSTS);
+- pr_err("%s: fsm %x, hsts %x\n",
++ pr_info("%s: fsm %x, hsts %x\n",
+ mmc_hostname(host->mmc),
+ fsm_state, hsts);
+ if (hsts & SDHSTS_ERROR_MASK)
+@@ -953,9 +955,10 @@ bool bcm2835_sdhost_send_command(struct
+
+ while (bcm2835_sdhost_read(host, SDCMD) & SDCMD_NEW_FLAG) {
+ if (timeout == 0) {
+- pr_err("%s: previous command never completed.\n",
++ pr_warn("%s: previous command never completed.\n",
+ mmc_hostname(host->mmc));
+- bcm2835_sdhost_dumpregs(host);
++ if (host->debug)
++ bcm2835_sdhost_dumpregs(host);
+ cmd->error = -EILSEQ;
+ tasklet_schedule(&host->finish_tasklet);
+ return false;
+@@ -1213,10 +1216,12 @@ static void bcm2835_sdhost_finish_comman
+
+ /* Check for errors */
+ if (sdcmd & SDCMD_NEW_FLAG) {
+- pr_err("%s: command never completed.\n",
+- mmc_hostname(host->mmc));
+- bcm2835_sdhost_dumpregs(host);
+- host->cmd->error = -EIO;
++ if (host->debug) {
++ pr_err("%s: command %d never completed.\n",
++ mmc_hostname(host->mmc), host->cmd->opcode);
++ bcm2835_sdhost_dumpregs(host);
++ }
++ host->cmd->error = -EILSEQ;
+ tasklet_schedule(&host->finish_tasklet);
+ return;
+ } else if (sdcmd & SDCMD_FAIL_FLAG) {
+@@ -1238,15 +1243,14 @@ static void bcm2835_sdhost_finish_comman
+ } else {
+ if (sdhsts & SDHSTS_CMD_TIME_OUT) {
+ if (host->debug)
+- pr_err("%s: command %d timeout\n",
++ pr_warn("%s: command %d timeout\n",
+ mmc_hostname(host->mmc),
+ host->cmd->opcode);
+ host->cmd->error = -ETIMEDOUT;
+ } else {
+- pr_err("%s: unexpected command %d error\n",
++ pr_warn("%s: unexpected command %d error\n",
+ mmc_hostname(host->mmc),
+ host->cmd->opcode);
+- bcm2835_sdhost_dumpregs(host);
+ host->cmd->error = -EILSEQ;
+ }
+ tasklet_schedule(&host->finish_tasklet);
+@@ -1370,8 +1374,10 @@ static void bcm2835_sdhost_busy_irq(stru
+ } else if (intmask & SDHSTS_CMD_TIME_OUT)
+ host->cmd->error = -ETIMEDOUT;
+
+- log_dump();
+- bcm2835_sdhost_dumpregs(host);
++ if (host->debug) {
++ log_dump();
++ bcm2835_sdhost_dumpregs(host);
++ }
+ }
+ else
+ bcm2835_sdhost_finish_command(host, NULL);
+@@ -1595,7 +1601,7 @@ void bcm2835_sdhost_set_clock(struct bcm
+ host->overclock_50 = (clock/MHZ);
+
+ if (clock != host->overclock) {
+- pr_warn("%s: overclocking to %dHz\n",
++ pr_info("%s: overclocking to %dHz\n",
+ mmc_hostname(host->mmc), clock);
+ host->overclock = clock;
+ }
+@@ -1605,6 +1611,11 @@ void bcm2835_sdhost_set_clock(struct bcm
+ pr_warn("%s: cancelling overclock\n",
+ mmc_hostname(host->mmc));
+ }
++ } else if (input_clock == 0) {
++ /* Reset the preferred overclock when the clock is stopped.
++ * This always happens during initialisation. */
++ host->overclock_50 = host->user_overclock_50;
++ host->overclock = 0;
+ }
+
+ /* Set the timeout to 500ms */
+@@ -1678,13 +1689,15 @@ static void bcm2835_sdhost_request(struc
+ log_event("REQ<", (u32)mrq, edm);
+ if ((fsm != SDEDM_FSM_IDENTMODE) &&
+ (fsm != SDEDM_FSM_DATAMODE)) {
+- pr_err("%s: previous command (%d) not complete (EDM %x)\n",
+- mmc_hostname(host->mmc),
+- bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK,
+- edm);
+ log_event("REQ!", (u32)mrq, edm);
+- log_dump();
+- bcm2835_sdhost_dumpregs(host);
++ if (host->debug) {
++ pr_warn("%s: previous command (%d) not complete (EDM %x)\n",
++ mmc_hostname(host->mmc),
++ bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK,
++ edm);
++ log_dump();
++ bcm2835_sdhost_dumpregs(host);
++ }
+ mrq->cmd->error = -EILSEQ;
+ tasklet_schedule(&host->finish_tasklet);
+ mmiowb();
+@@ -1814,16 +1827,19 @@ static void bcm2835_sdhost_tasklet_finis
+ mrq = host->mrq;
+
+ /* Drop the overclock after any data corruption, or after any
+- error overclocked */
++ * error while overclocked. Ignore errors for status commands,
++ * as they are likely when a card is ejected. */
+ if (host->overclock) {
+- if ((mrq->cmd && mrq->cmd->error) ||
++ if ((mrq->cmd && mrq->cmd->error &&
++ (mrq->cmd->opcode != MMC_SEND_STATUS)) ||
+ (mrq->data && mrq->data->error) ||
+- (mrq->stop && mrq->stop->error)) {
++ (mrq->stop && mrq->stop->error) ||
++ (mrq->sbc && mrq->sbc->error)) {
+ host->overclock_50--;
+ pr_warn("%s: reducing overclock due to errors\n",
+ mmc_hostname(host->mmc));
+ host->reset_clock = 1;
+- mrq->cmd->error = -EILSEQ;
++ mrq->cmd->error = -ETIMEDOUT;
+ mrq->cmd->retries = 1;
+ }
+ }
+@@ -1848,6 +1864,21 @@ static void bcm2835_sdhost_tasklet_finis
+ mmc_hostname(host->mmc), err);
+ }
+
++ /* The SDHOST block doesn't report any errors for a disconnected
++ interface. All cards and SDIO devices should report some supported
++ voltage range, so a zero response to SEND_OP_COND, IO_SEND_OP_COND
++ or APP_SEND_OP_COND can be treated as an error. */
++ if (((mrq->cmd->opcode == MMC_SEND_OP_COND) ||
++ (mrq->cmd->opcode == SD_IO_SEND_OP_COND) ||
++ (mrq->cmd->opcode == SD_APP_OP_COND)) &&
++ (mrq->cmd->error == 0) &&
++ (mrq->cmd->resp[0] == 0)) {
++ mrq->cmd->error = -ETIMEDOUT;
++ if (host->debug)
++ pr_info("%s: faking timeout due to zero OCR\n",
++ mmc_hostname(host->mmc));
++ }
++
+ mmc_request_done(host->mmc, mrq);
+ log_event("TSK>", (u32)mrq, 0);
+ }
+@@ -2023,7 +2054,7 @@ static int bcm2835_sdhost_probe(struct p
+ &host->delay_after_stop);
+ of_property_read_u32(node,
+ "brcm,overclock-50",
+- &host->overclock_50);
++ &host->user_overclock_50);
+ of_property_read_u32(node,
+ "brcm,pio-limit",
+ &host->pio_limit);
+++ /dev/null
-From d90c379ffd993c72371252fe7840c14e4428410b Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Wed, 15 Jun 2016 17:13:55 +0100
-Subject: [PATCH] bcm2835-sdhost: Improvements to error recovery
-
-1) Try to avoid reducing overclock when a card is removed.
-
-2) Reset overclock on card insertion.
-
-3) Reduce logging when errors occur, lowering the severity of
- some messages and making others conditional on the debug
- flag.
-
-4) Attempt to identify a disconnected SD bus earlier, treating a
- zero returned OCR (voltage support) as an error condition.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/host/bcm2835-sdhost.c | 117 ++++++++++++++++++++++++--------------
- 1 file changed, 74 insertions(+), 43 deletions(-)
-
---- a/drivers/mmc/host/bcm2835-sdhost.c
-+++ b/drivers/mmc/host/bcm2835-sdhost.c
-@@ -38,6 +38,7 @@
- #include <linux/mmc/mmc.h>
- #include <linux/mmc/host.h>
- #include <linux/mmc/sd.h>
-+#include <linux/mmc/sdio.h>
- #include <linux/scatterlist.h>
- #include <linux/of_address.h>
- #include <linux/of_irq.h>
-@@ -206,6 +207,7 @@ struct bcm2835_host {
- struct timeval stop_time; /* when the last stop was issued */
- u32 delay_after_stop; /* minimum time between stop and subsequent data transfer */
- u32 delay_after_this_stop; /* minimum time between this stop and subsequent data transfer */
-+ u32 user_overclock_50; /* User's preferred frequency to use when 50MHz is requested (in MHz) */
- u32 overclock_50; /* frequency to use when 50MHz is requested (in MHz) */
- u32 overclock; /* Current frequency if overclocked, else zero */
- u32 pio_limit; /* Maximum block count for PIO (0 = always DMA) */
-@@ -282,7 +284,7 @@ static void log_dump(void)
- do {
- entry = sdhost_log_buf + idx;
- if (entry->event[0] != '\0')
-- pr_err("[%08x] %.4s %x %x\n",
-+ pr_info("[%08x] %.4s %x %x\n",
- entry->timestamp,
- entry->event,
- entry->param1,
-@@ -324,7 +326,7 @@ static void bcm2835_sdhost_dumpcmd(struc
- const char *label)
- {
- if (cmd)
-- pr_err("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
-+ pr_info("%s:%c%s op %d arg 0x%x flags 0x%x - resp %08x %08x %08x %08x, err %d\n",
- mmc_hostname(host->mmc),
- (cmd == host->cmd) ? '>' : ' ',
- label, cmd->opcode, cmd->arg, cmd->flags,
-@@ -339,7 +341,7 @@ static void bcm2835_sdhost_dumpregs(stru
- bcm2835_sdhost_dumpcmd(host, host->mrq->sbc, "sbc");
- bcm2835_sdhost_dumpcmd(host, host->mrq->cmd, "cmd");
- if (host->mrq->data)
-- pr_err("%s: data blocks %x blksz %x - err %d\n",
-+ pr_info("%s: data blocks %x blksz %x - err %d\n",
- mmc_hostname(host->mmc),
- host->mrq->data->blocks,
- host->mrq->data->blksz,
-@@ -347,53 +349,53 @@ static void bcm2835_sdhost_dumpregs(stru
- bcm2835_sdhost_dumpcmd(host, host->mrq->stop, "stop");
- }
-
-- pr_err("%s: =========== REGISTER DUMP ===========\n",
-+ pr_info("%s: =========== REGISTER DUMP ===========\n",
- mmc_hostname(host->mmc));
-
-- pr_err("%s: SDCMD 0x%08x\n",
-+ pr_info("%s: SDCMD 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDCMD));
-- pr_err("%s: SDARG 0x%08x\n",
-+ pr_info("%s: SDARG 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDARG));
-- pr_err("%s: SDTOUT 0x%08x\n",
-+ pr_info("%s: SDTOUT 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDTOUT));
-- pr_err("%s: SDCDIV 0x%08x\n",
-+ pr_info("%s: SDCDIV 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDCDIV));
-- pr_err("%s: SDRSP0 0x%08x\n",
-+ pr_info("%s: SDRSP0 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDRSP0));
-- pr_err("%s: SDRSP1 0x%08x\n",
-+ pr_info("%s: SDRSP1 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDRSP1));
-- pr_err("%s: SDRSP2 0x%08x\n",
-+ pr_info("%s: SDRSP2 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDRSP2));
- pr_err("%s: SDRSP3 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDRSP3));
-- pr_err("%s: SDHSTS 0x%08x\n",
-+ pr_info("%s: SDHSTS 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDHSTS));
-- pr_err("%s: SDVDD 0x%08x\n",
-+ pr_info("%s: SDVDD 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDVDD));
-- pr_err("%s: SDEDM 0x%08x\n",
-+ pr_info("%s: SDEDM 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDEDM));
-- pr_err("%s: SDHCFG 0x%08x\n",
-+ pr_info("%s: SDHCFG 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDHCFG));
-- pr_err("%s: SDHBCT 0x%08x\n",
-+ pr_info("%s: SDHBCT 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDHBCT));
-- pr_err("%s: SDHBLC 0x%08x\n",
-+ pr_info("%s: SDHBLC 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDHBLC));
-
-- pr_err("%s: ===========================================\n",
-+ pr_info("%s: ===========================================\n",
- mmc_hostname(host->mmc));
- }
-
-@@ -608,7 +610,7 @@ static void bcm2835_sdhost_read_block_pi
- (fsm_state != SDEDM_FSM_READCRC)) {
- hsts = bcm2835_sdhost_read(host,
- SDHSTS);
-- pr_err("%s: fsm %x, hsts %x\n",
-+ pr_info("%s: fsm %x, hsts %x\n",
- mmc_hostname(host->mmc),
- fsm_state, hsts);
- if (hsts & SDHSTS_ERROR_MASK)
-@@ -698,7 +700,7 @@ static void bcm2835_sdhost_write_block_p
- (fsm_state != SDEDM_FSM_WRITESTART2)) {
- hsts = bcm2835_sdhost_read(host,
- SDHSTS);
-- pr_err("%s: fsm %x, hsts %x\n",
-+ pr_info("%s: fsm %x, hsts %x\n",
- mmc_hostname(host->mmc),
- fsm_state, hsts);
- if (hsts & SDHSTS_ERROR_MASK)
-@@ -953,9 +955,10 @@ bool bcm2835_sdhost_send_command(struct
-
- while (bcm2835_sdhost_read(host, SDCMD) & SDCMD_NEW_FLAG) {
- if (timeout == 0) {
-- pr_err("%s: previous command never completed.\n",
-+ pr_warn("%s: previous command never completed.\n",
- mmc_hostname(host->mmc));
-- bcm2835_sdhost_dumpregs(host);
-+ if (host->debug)
-+ bcm2835_sdhost_dumpregs(host);
- cmd->error = -EILSEQ;
- tasklet_schedule(&host->finish_tasklet);
- return false;
-@@ -1213,10 +1216,12 @@ static void bcm2835_sdhost_finish_comman
-
- /* Check for errors */
- if (sdcmd & SDCMD_NEW_FLAG) {
-- pr_err("%s: command never completed.\n",
-- mmc_hostname(host->mmc));
-- bcm2835_sdhost_dumpregs(host);
-- host->cmd->error = -EIO;
-+ if (host->debug) {
-+ pr_err("%s: command %d never completed.\n",
-+ mmc_hostname(host->mmc), host->cmd->opcode);
-+ bcm2835_sdhost_dumpregs(host);
-+ }
-+ host->cmd->error = -EILSEQ;
- tasklet_schedule(&host->finish_tasklet);
- return;
- } else if (sdcmd & SDCMD_FAIL_FLAG) {
-@@ -1238,15 +1243,14 @@ static void bcm2835_sdhost_finish_comman
- } else {
- if (sdhsts & SDHSTS_CMD_TIME_OUT) {
- if (host->debug)
-- pr_err("%s: command %d timeout\n",
-+ pr_warn("%s: command %d timeout\n",
- mmc_hostname(host->mmc),
- host->cmd->opcode);
- host->cmd->error = -ETIMEDOUT;
- } else {
-- pr_err("%s: unexpected command %d error\n",
-+ pr_warn("%s: unexpected command %d error\n",
- mmc_hostname(host->mmc),
- host->cmd->opcode);
-- bcm2835_sdhost_dumpregs(host);
- host->cmd->error = -EILSEQ;
- }
- tasklet_schedule(&host->finish_tasklet);
-@@ -1370,8 +1374,10 @@ static void bcm2835_sdhost_busy_irq(stru
- } else if (intmask & SDHSTS_CMD_TIME_OUT)
- host->cmd->error = -ETIMEDOUT;
-
-- log_dump();
-- bcm2835_sdhost_dumpregs(host);
-+ if (host->debug) {
-+ log_dump();
-+ bcm2835_sdhost_dumpregs(host);
-+ }
- }
- else
- bcm2835_sdhost_finish_command(host, NULL);
-@@ -1595,7 +1601,7 @@ void bcm2835_sdhost_set_clock(struct bcm
- host->overclock_50 = (clock/MHZ);
-
- if (clock != host->overclock) {
-- pr_warn("%s: overclocking to %dHz\n",
-+ pr_info("%s: overclocking to %dHz\n",
- mmc_hostname(host->mmc), clock);
- host->overclock = clock;
- }
-@@ -1605,6 +1611,11 @@ void bcm2835_sdhost_set_clock(struct bcm
- pr_warn("%s: cancelling overclock\n",
- mmc_hostname(host->mmc));
- }
-+ } else if (input_clock == 0) {
-+ /* Reset the preferred overclock when the clock is stopped.
-+ * This always happens during initialisation. */
-+ host->overclock_50 = host->user_overclock_50;
-+ host->overclock = 0;
- }
-
- /* Set the timeout to 500ms */
-@@ -1678,13 +1689,15 @@ static void bcm2835_sdhost_request(struc
- log_event("REQ<", (u32)mrq, edm);
- if ((fsm != SDEDM_FSM_IDENTMODE) &&
- (fsm != SDEDM_FSM_DATAMODE)) {
-- pr_err("%s: previous command (%d) not complete (EDM %x)\n",
-- mmc_hostname(host->mmc),
-- bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK,
-- edm);
- log_event("REQ!", (u32)mrq, edm);
-- log_dump();
-- bcm2835_sdhost_dumpregs(host);
-+ if (host->debug) {
-+ pr_warn("%s: previous command (%d) not complete (EDM %x)\n",
-+ mmc_hostname(host->mmc),
-+ bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK,
-+ edm);
-+ log_dump();
-+ bcm2835_sdhost_dumpregs(host);
-+ }
- mrq->cmd->error = -EILSEQ;
- tasklet_schedule(&host->finish_tasklet);
- mmiowb();
-@@ -1814,16 +1827,19 @@ static void bcm2835_sdhost_tasklet_finis
- mrq = host->mrq;
-
- /* Drop the overclock after any data corruption, or after any
-- error overclocked */
-+ * error while overclocked. Ignore errors for status commands,
-+ * as they are likely when a card is ejected. */
- if (host->overclock) {
-- if ((mrq->cmd && mrq->cmd->error) ||
-+ if ((mrq->cmd && mrq->cmd->error &&
-+ (mrq->cmd->opcode != MMC_SEND_STATUS)) ||
- (mrq->data && mrq->data->error) ||
-- (mrq->stop && mrq->stop->error)) {
-+ (mrq->stop && mrq->stop->error) ||
-+ (mrq->sbc && mrq->sbc->error)) {
- host->overclock_50--;
- pr_warn("%s: reducing overclock due to errors\n",
- mmc_hostname(host->mmc));
- host->reset_clock = 1;
-- mrq->cmd->error = -EILSEQ;
-+ mrq->cmd->error = -ETIMEDOUT;
- mrq->cmd->retries = 1;
- }
- }
-@@ -1848,6 +1864,21 @@ static void bcm2835_sdhost_tasklet_finis
- mmc_hostname(host->mmc), err);
- }
-
-+ /* The SDHOST block doesn't report any errors for a disconnected
-+ interface. All cards and SDIO devices should report some supported
-+ voltage range, so a zero response to SEND_OP_COND, IO_SEND_OP_COND
-+ or APP_SEND_OP_COND can be treated as an error. */
-+ if (((mrq->cmd->opcode == MMC_SEND_OP_COND) ||
-+ (mrq->cmd->opcode == SD_IO_SEND_OP_COND) ||
-+ (mrq->cmd->opcode == SD_APP_OP_COND)) &&
-+ (mrq->cmd->error == 0) &&
-+ (mrq->cmd->resp[0] == 0)) {
-+ mrq->cmd->error = -ETIMEDOUT;
-+ if (host->debug)
-+ pr_info("%s: faking timeout due to zero OCR\n",
-+ mmc_hostname(host->mmc));
-+ }
-+
- mmc_request_done(host->mmc, mrq);
- log_event("TSK>", (u32)mrq, 0);
- }
-@@ -2023,7 +2054,7 @@ static int bcm2835_sdhost_probe(struct p
- &host->delay_after_stop);
- of_property_read_u32(node,
- "brcm,overclock-50",
-- &host->overclock_50);
-+ &host->user_overclock_50);
- of_property_read_u32(node,
- "brcm,pio-limit",
- &host->pio_limit);
--- /dev/null
+From 139a3c77a6a73446e8e6d2086c8b1c4f236d4dfa Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 28 Jun 2016 22:13:15 +0100
+Subject: [PATCH] pinctrl-bcm2835: Fix return type of bcm2835_pmx_free
+
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -831,13 +831,14 @@ static const struct pinctrl_ops bcm2835_
+ .dt_free_map = bcm2835_pctl_dt_free_map,
+ };
+
+-static void bcm2835_pmx_free(struct pinctrl_dev *pctldev,
++static int bcm2835_pmx_free(struct pinctrl_dev *pctldev,
+ unsigned offset)
+ {
+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
+
+ /* disable by setting to GPIO_IN */
+ bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
++ return 0;
+ }
+
+ static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
--- /dev/null
+From 6fac57fc7d9e04a6f5083897b2f424cb3505dbf7 Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Thu, 30 Jun 2016 18:38:42 +0100
+Subject: [PATCH] Add IQAudIO Digi WM8804 board support
+
+Support IQAudIO Digi board with iqaudio_digi machine driver and
+ iqaudio-digi-wm8804-audio overlay.
+
+NB. Machine driver is a cut and paste of hifiberry_digi code, with format
+ and general cleanup to comply with kernel coding standards.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 9 +
+ .../overlays/iqaudio-digi-wm8804-audio-overlay.dts | 47 ++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 +
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/iqaudio_digi.c | 239 +++++++++++++++++++++
+ 8 files changed, 307 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
+ create mode 100644 sound/soc/bcm/iqaudio_digi.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -42,6 +42,7 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
+ dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += iqaudio-digi-wm8804-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -546,6 +546,15 @@ Params: 24db_digital_gain Allow ga
+ the DAC driver module loads.
+
+
++Name: iqaudio-digi-wm8804-audio
++Info: Configures the IQAudIO Digi WM8804 audio card
++Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
++Params: card_name Override the default, "IQAudIODigi", card name.
++ dai_name Override the default, "IQAudIO Digi", dai name.
++ dai_stream_name Override the default, "IQAudIO Digi HiFi",
++ dai stream name.
++
++
+ Name: justboom-dac
+ Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
+ cards
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
+@@ -0,0 +1,47 @@
++// Definitions for IQAudIO Digi WM8804 audio board
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ // DVDD-supply = <®_3v3>;
++ // PVDD-supply = <®_3v3>;
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ wm8804_digi: __overlay__ {
++ compatible = "iqaudio,wm8804-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ card_name = <&wm8804_digi>,"wm8804-digi,card-name";
++ dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
++ dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -865,6 +865,7 @@ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -857,6 +857,7 @@ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
+ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -71,6 +71,13 @@ config SND_BCM2708_SOC_IQAUDIO_DAC
+ help
+ Say Y or M if you want to add support for IQaudIO-DAC.
+
++config SND_BCM2708_SOC_IQAUDIO_DIGI
++ tristate "Support for IQAudIO Digi"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_WM8804
++ help
++ Say Y or M if you want to add support for IQAudIO Digital IO board.
++
+ config SND_BCM2708_SOC_RASPIDAC3
+ tristate "Support for RaspiDAC Rev.3x"
+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -14,6 +14,7 @@ snd-soc-justboom-digi-objs := justboom-d
+ snd-soc-rpi-dac-objs := rpi-dac.o
+ snd-soc-rpi-proto-objs := rpi-proto.o
+ snd-soc-iqaudio-dac-objs := iqaudio-dac.o
++snd-soc-iqaudio-digi-objs := iqaudio_digi.o
+ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
+ snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
+@@ -28,6 +29,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DI
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
+ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
++obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI) += snd-soc-iqaudio-digi.o
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
+ obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+--- /dev/null
++++ b/sound/soc/bcm/iqaudio_digi.c
+@@ -0,0 +1,239 @@
++/*
++ * ASoC Driver for IQAudIO WM8804 Digi
++ *
++ * Author: Daniel Matuschek <info@crazy-audio.com>
++ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
++ * Copyright 2013
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++#include "../codecs/wm8804.h"
++
++static short int auto_shutdown_output;
++module_param(auto_shutdown_output, short,
++ S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
++MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped");
++
++static int snd_rpi_iqaudio_digi_init(struct snd_soc_pcm_runtime *rtd)
++{
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ return 0;
++}
++
++static int snd_rpi_iqaudio_digi_startup(struct snd_pcm_substream *substream)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* turn on digital output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
++
++ return 0;
++}
++
++static void snd_rpi_iqaudio_digi_shutdown(struct snd_pcm_substream *substream)
++{
++ if (auto_shutdown_output) {
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->codec;
++
++ /* turn off digital output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
++ }
++}
++
++
++static int snd_rpi_iqaudio_digi_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->codec_dai;
++ struct snd_soc_codec *codec = rtd->codec;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ int sysclk = 27000000; /* This is fixed on this board */
++
++ long mclk_freq = 0;
++ int mclk_div = 1;
++ int sampling_freq = 1;
++
++ int ret;
++
++ int samplerate = params_rate(params);
++
++ if (samplerate <= 96000) {
++ mclk_freq = samplerate * 256;
++ mclk_div = WM8804_MCLKDIV_256FS;
++ } else {
++ mclk_freq = samplerate * 128;
++ mclk_div = WM8804_MCLKDIV_128FS;
++ }
++
++ switch (samplerate) {
++ case 32000:
++ sampling_freq = 0x03;
++ break;
++ case 44100:
++ sampling_freq = 0x00;
++ break;
++ case 48000:
++ sampling_freq = 0x02;
++ break;
++ case 88200:
++ sampling_freq = 0x08;
++ break;
++ case 96000:
++ sampling_freq = 0x0a;
++ break;
++ case 176400:
++ sampling_freq = 0x0c;
++ break;
++ case 192000:
++ sampling_freq = 0x0e;
++ break;
++ default:
++ dev_err(codec->dev, "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
++ samplerate);
++ }
++
++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
++
++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
++ sysclk, SND_SOC_CLOCK_OUT);
++ if (ret < 0) {
++ dev_err(codec->dev, "Failed to set WM8804 SYSCLK: %d\n", ret);
++ return ret;
++ }
++
++ /* Enable TX output */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
++
++ /* Power on */
++ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
++
++ /* set sampling frequency status bits */
++ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_iqaudio_digi_ops = {
++ .hw_params = snd_rpi_iqaudio_digi_hw_params,
++ .startup = snd_rpi_iqaudio_digi_startup,
++ .shutdown = snd_rpi_iqaudio_digi_shutdown,
++};
++
++static struct snd_soc_dai_link snd_rpi_iqaudio_digi_dai[] = {
++{
++ .name = "IQAudIO Digi",
++ .stream_name = "IQAudIO Digi HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "wm8804-spdif",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "wm8804.1-003b",
++ .dai_fmt = SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &snd_rpi_iqaudio_digi_ops,
++ .init = snd_rpi_iqaudio_digi_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_iqaudio_digi = {
++ .name = "IQAudIODigi",
++ .owner = THIS_MODULE,
++ .dai_link = snd_rpi_iqaudio_digi_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_iqaudio_digi_dai),
++};
++
++static int snd_rpi_iqaudio_digi_probe(struct platform_device *pdev)
++{
++ struct snd_soc_card *card = &snd_rpi_iqaudio_digi;
++ char *prefix = "wm8804-digi,";
++ char prop[128];
++ struct device_node *np;
++ int ret = 0;
++
++ snd_rpi_iqaudio_digi.dev = &pdev->dev;
++
++ np = pdev->dev.of_node;
++ if (np) {
++ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_digi_dai[0];
++ struct device_node *i2s_node;
++
++ i2s_node = of_parse_phandle(np, "i2s-controller", 0);
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ snprintf(prop, sizeof(prop), "%scard-name", prefix);
++ of_property_read_string(np, prop, &card->name);
++
++ snprintf(prop, sizeof(prop), "%sdai-name", prefix);
++ of_property_read_string(np, prop, &dai->name);
++
++ snprintf(prop, sizeof(prop), "%sdai-stream-name", prefix);
++ of_property_read_string(np, prop, &dai->stream_name);
++ }
++
++ ret = snd_soc_register_card(card);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
++ ret);
++
++ return ret;
++}
++
++static int snd_rpi_iqaudio_digi_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_iqaudio_digi);
++}
++
++static const struct of_device_id snd_rpi_iqaudio_digi_of_match[] = {
++ { .compatible = "iqaudio,wm8804-digi", },
++ {},
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_iqaudio_digi_of_match);
++
++static struct platform_driver snd_rpi_iqaudio_digi_driver = {
++ .driver = {
++ .name = "IQAudIODigi",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_iqaudio_digi_of_match,
++ },
++ .probe = snd_rpi_iqaudio_digi_probe,
++ .remove = snd_rpi_iqaudio_digi_remove,
++};
++
++module_platform_driver(snd_rpi_iqaudio_digi_driver);
++
++MODULE_AUTHOR("Daniel Matuschek <info@crazy-audio.com>");
++MODULE_DESCRIPTION("ASoC Driver for IQAudIO WM8804 Digi");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From a1c9b6e2482ecc3dd3191b494d6cb717fa700ce4 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Tue, 28 Jun 2016 22:13:15 +0100
-Subject: [PATCH] pinctrl-bcm2835: Fix return type of bcm2835_pmx_free
-
----
- drivers/pinctrl/bcm/pinctrl-bcm2835.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -831,13 +831,14 @@ static const struct pinctrl_ops bcm2835_
- .dt_free_map = bcm2835_pctl_dt_free_map,
- };
-
--static void bcm2835_pmx_free(struct pinctrl_dev *pctldev,
-+static int bcm2835_pmx_free(struct pinctrl_dev *pctldev,
- unsigned offset)
- {
- struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
-
- /* disable by setting to GPIO_IN */
- bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN);
-+ return 0;
- }
-
- static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
+++ /dev/null
-From a5bf4ef8a41a52453b9505ffef39b7635feef4b2 Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Thu, 30 Jun 2016 18:38:42 +0100
-Subject: [PATCH] Add IQAudIO Digi WM8804 board support
-
-Support IQAudIO Digi board with iqaudio_digi machine driver and
- iqaudio-digi-wm8804-audio overlay.
-
-NB. Machine driver is a cut and paste of hifiberry_digi code, with format
- and general cleanup to comply with kernel coding standards.
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 9 +
- .../overlays/iqaudio-digi-wm8804-audio-overlay.dts | 47 ++++
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- sound/soc/bcm/Kconfig | 7 +
- sound/soc/bcm/Makefile | 2 +
- sound/soc/bcm/iqaudio_digi.c | 239 +++++++++++++++++++++
- 8 files changed, 307 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
- create mode 100644 sound/soc/bcm/iqaudio_digi.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -42,6 +42,7 @@ dtbo-$(RPI_DT_OVERLAYS) += i2s-gpio28-31
- dtbo-$(RPI_DT_OVERLAYS) += i2s-mmap.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += iqaudio-dacplus.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += iqaudio-digi-wm8804-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -546,6 +546,15 @@ Params: 24db_digital_gain Allow ga
- the DAC driver module loads.
-
-
-+Name: iqaudio-digi-wm8804-audio
-+Info: Configures the IQAudIO Digi WM8804 audio card
-+Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
-+Params: card_name Override the default, "IQAudIODigi", card name.
-+ dai_name Override the default, "IQAudIO Digi", dai name.
-+ dai_stream_name Override the default, "IQAudIO Digi HiFi",
-+ dai stream name.
-+
-+
- Name: justboom-dac
- Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
- cards
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
-@@ -0,0 +1,47 @@
-+// Definitions for IQAudIO Digi WM8804 audio board
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8804@3b {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8804";
-+ reg = <0x3b>;
-+ status = "okay";
-+ // DVDD-supply = <®_3v3>;
-+ // PVDD-supply = <®_3v3>;
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ wm8804_digi: __overlay__ {
-+ compatible = "iqaudio,wm8804-digi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+
-+ __overrides__ {
-+ card_name = <&wm8804_digi>,"wm8804-digi,card-name";
-+ dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
-+ dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -865,6 +865,7 @@ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
- CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
- CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
-+CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_DIGIDAC1_SOUNDCARD=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -857,6 +857,7 @@ CONFIG_SND_BCM2708_SOC_RPI_PROTO=m
- CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m
- CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
-+CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_DIGIDAC1_SOUNDCARD=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -71,6 +71,13 @@ config SND_BCM2708_SOC_IQAUDIO_DAC
- help
- Say Y or M if you want to add support for IQaudIO-DAC.
-
-+config SND_BCM2708_SOC_IQAUDIO_DIGI
-+ tristate "Support for IQAudIO Digi"
-+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
-+ select SND_SOC_WM8804
-+ help
-+ Say Y or M if you want to add support for IQAudIO Digital IO board.
-+
- config SND_BCM2708_SOC_RASPIDAC3
- tristate "Support for RaspiDAC Rev.3x"
- depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -14,6 +14,7 @@ snd-soc-justboom-digi-objs := justboom-d
- snd-soc-rpi-dac-objs := rpi-dac.o
- snd-soc-rpi-proto-objs := rpi-proto.o
- snd-soc-iqaudio-dac-objs := iqaudio-dac.o
-+snd-soc-iqaudio-digi-objs := iqaudio_digi.o
- snd-soc-raspidac3-objs := raspidac3.o
- snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
- snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
-@@ -28,6 +29,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DI
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o
- obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o
- obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o
-+obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI) += snd-soc-iqaudio-digi.o
- obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
- obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
- obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
---- /dev/null
-+++ b/sound/soc/bcm/iqaudio_digi.c
-@@ -0,0 +1,239 @@
-+/*
-+ * ASoC Driver for IQAudIO WM8804 Digi
-+ *
-+ * Author: Daniel Matuschek <info@crazy-audio.com>
-+ * based on the HifiBerry DAC driver by Florian Meier <florian.meier@koalo.de>
-+ * Copyright 2013
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+#include "../codecs/wm8804.h"
-+
-+static short int auto_shutdown_output;
-+module_param(auto_shutdown_output, short,
-+ S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
-+MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped");
-+
-+static int snd_rpi_iqaudio_digi_init(struct snd_soc_pcm_runtime *rtd)
-+{
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ /* enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ return 0;
-+}
-+
-+static int snd_rpi_iqaudio_digi_startup(struct snd_pcm_substream *substream)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ /* turn on digital output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00);
-+
-+ return 0;
-+}
-+
-+static void snd_rpi_iqaudio_digi_shutdown(struct snd_pcm_substream *substream)
-+{
-+ if (auto_shutdown_output) {
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_codec *codec = rtd->codec;
-+
-+ /* turn off digital output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c);
-+ }
-+}
-+
-+
-+static int snd_rpi_iqaudio_digi_hw_params(struct snd_pcm_substream *substream,
-+ struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
-+ struct snd_soc_codec *codec = rtd->codec;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+
-+ int sysclk = 27000000; /* This is fixed on this board */
-+
-+ long mclk_freq = 0;
-+ int mclk_div = 1;
-+ int sampling_freq = 1;
-+
-+ int ret;
-+
-+ int samplerate = params_rate(params);
-+
-+ if (samplerate <= 96000) {
-+ mclk_freq = samplerate * 256;
-+ mclk_div = WM8804_MCLKDIV_256FS;
-+ } else {
-+ mclk_freq = samplerate * 128;
-+ mclk_div = WM8804_MCLKDIV_128FS;
-+ }
-+
-+ switch (samplerate) {
-+ case 32000:
-+ sampling_freq = 0x03;
-+ break;
-+ case 44100:
-+ sampling_freq = 0x00;
-+ break;
-+ case 48000:
-+ sampling_freq = 0x02;
-+ break;
-+ case 88200:
-+ sampling_freq = 0x08;
-+ break;
-+ case 96000:
-+ sampling_freq = 0x0a;
-+ break;
-+ case 176400:
-+ sampling_freq = 0x0c;
-+ break;
-+ case 192000:
-+ sampling_freq = 0x0e;
-+ break;
-+ default:
-+ dev_err(codec->dev, "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n",
-+ samplerate);
-+ }
-+
-+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div);
-+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq);
-+
-+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
-+ sysclk, SND_SOC_CLOCK_OUT);
-+ if (ret < 0) {
-+ dev_err(codec->dev, "Failed to set WM8804 SYSCLK: %d\n", ret);
-+ return ret;
-+ }
-+
-+ /* Enable TX output */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-+
-+ /* Power on */
-+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0);
-+
-+ /* set sampling frequency status bits */
-+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq);
-+
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_rpi_iqaudio_digi_ops = {
-+ .hw_params = snd_rpi_iqaudio_digi_hw_params,
-+ .startup = snd_rpi_iqaudio_digi_startup,
-+ .shutdown = snd_rpi_iqaudio_digi_shutdown,
-+};
-+
-+static struct snd_soc_dai_link snd_rpi_iqaudio_digi_dai[] = {
-+{
-+ .name = "IQAudIO Digi",
-+ .stream_name = "IQAudIO Digi HiFi",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "wm8804-spdif",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "wm8804.1-003b",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S |
-+ SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBM_CFM,
-+ .ops = &snd_rpi_iqaudio_digi_ops,
-+ .init = snd_rpi_iqaudio_digi_init,
-+},
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_rpi_iqaudio_digi = {
-+ .name = "IQAudIODigi",
-+ .owner = THIS_MODULE,
-+ .dai_link = snd_rpi_iqaudio_digi_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_iqaudio_digi_dai),
-+};
-+
-+static int snd_rpi_iqaudio_digi_probe(struct platform_device *pdev)
-+{
-+ struct snd_soc_card *card = &snd_rpi_iqaudio_digi;
-+ char *prefix = "wm8804-digi,";
-+ char prop[128];
-+ struct device_node *np;
-+ int ret = 0;
-+
-+ snd_rpi_iqaudio_digi.dev = &pdev->dev;
-+
-+ np = pdev->dev.of_node;
-+ if (np) {
-+ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_digi_dai[0];
-+ struct device_node *i2s_node;
-+
-+ i2s_node = of_parse_phandle(np, "i2s-controller", 0);
-+ if (i2s_node) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_node;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_node;
-+ }
-+
-+ snprintf(prop, sizeof(prop), "%scard-name", prefix);
-+ of_property_read_string(np, prop, &card->name);
-+
-+ snprintf(prop, sizeof(prop), "%sdai-name", prefix);
-+ of_property_read_string(np, prop, &dai->name);
-+
-+ snprintf(prop, sizeof(prop), "%sdai-stream-name", prefix);
-+ of_property_read_string(np, prop, &dai->stream_name);
-+ }
-+
-+ ret = snd_soc_register_card(card);
-+ if (ret)
-+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
-+ ret);
-+
-+ return ret;
-+}
-+
-+static int snd_rpi_iqaudio_digi_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_rpi_iqaudio_digi);
-+}
-+
-+static const struct of_device_id snd_rpi_iqaudio_digi_of_match[] = {
-+ { .compatible = "iqaudio,wm8804-digi", },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, snd_rpi_iqaudio_digi_of_match);
-+
-+static struct platform_driver snd_rpi_iqaudio_digi_driver = {
-+ .driver = {
-+ .name = "IQAudIODigi",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_rpi_iqaudio_digi_of_match,
-+ },
-+ .probe = snd_rpi_iqaudio_digi_probe,
-+ .remove = snd_rpi_iqaudio_digi_remove,
-+};
-+
-+module_platform_driver(snd_rpi_iqaudio_digi_driver);
-+
-+MODULE_AUTHOR("Daniel Matuschek <info@crazy-audio.com>");
-+MODULE_DESCRIPTION("ASoC Driver for IQAudIO WM8804 Digi");
-+MODULE_LICENSE("GPL v2");
--- /dev/null
+From 2770e16422c3d3df76bb510a309877b507d4553f Mon Sep 17 00:00:00 2001
+From: Erdem MEYDANLI <erdem.meydanli@punica.com.tr>
+Date: Thu, 30 Jun 2016 21:05:08 +0300
+Subject: [PATCH] dts: Add overlay for NXP SC16IS752 Dual UART with SPI
+ Interface
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 10 ++++
+ .../boot/dts/overlays/sc16is752-spi1-overlay.dts | 61 ++++++++++++++++++++++
+ 3 files changed, 72 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -71,6 +71,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -888,6 +888,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
+ Params: <None>
+
+
++Name: sc16is752-spi1
++Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
++ Enables the chip on SPI1.
++ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
++ A+, B+, Zero and PI2 B; as well as the Compute Module.
++
++Load: dtoverlay=sc16is752-spi1,<param>=<val>
++Params: int_pin GPIO used for IRQ (default 24)
++
++
+ Name: sdhost
+ Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
+ N.B. This overlay is designed for situations where the mmc driver is
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
+@@ -0,0 +1,61 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&gpio>;
++ __overlay__ {
++ spi1_pins: spi1_pins {
++ brcm,pins = <19 20 21>;
++ brcm,function = <3>; /* alt4 */
++ };
++
++ spi1_cs_pins: spi1_cs_pins {
++ brcm,pins = <18>;
++ brcm,function = <1>; /* output */
++ };
++ };
++ };
++
++ fragment@1 {
++ target = <&spi1>;
++ frag1: __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
++ cs-gpios = <&gpio 18 1>;
++ status = "okay";
++
++ sc16is752: sc16is752@0 {
++ compatible = "nxp,sc16is752";
++ reg = <0>; /* CE0 */
++ clocks = <&sc16is752_clk>;
++ interrupt-parent = <&gpio>;
++ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
++ #gpio-controller;
++ #gpio-cells = <2>;
++ spi-max-frequency = <4000000>;
++
++ sc16is752_clk: sc16is752_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <14745600>;
++ };
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&aux>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ int_pin = <&sc16is752>,"interrupts:0";
++ };
++};
+++ /dev/null
-From fbbafbb2b4739eb6980f18c78c276ffbee2602db Mon Sep 17 00:00:00 2001
-From: Erdem MEYDANLI <erdem.meydanli@punica.com.tr>
-Date: Thu, 30 Jun 2016 21:05:08 +0300
-Subject: [PATCH] dts: Add overlay for NXP SC16IS752 Dual UART with SPI
- Interface
-
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 10 ++++
- .../boot/dts/overlays/sc16is752-spi1-overlay.dts | 61 ++++++++++++++++++++++
- 3 files changed, 72 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -71,6 +71,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
- dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio-1bit.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -888,6 +888,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
- Params: <None>
-
-
-+Name: sc16is752-spi1
-+Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
-+ Enables the chip on SPI1.
-+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
-+ A+, B+, Zero and PI2 B; as well as the Compute Module.
-+
-+Load: dtoverlay=sc16is752-spi1,<param>=<val>
-+Params: int_pin GPIO used for IRQ (default 24)
-+
-+
- Name: sdhost
- Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
- N.B. This overlay is designed for situations where the mmc driver is
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
-@@ -0,0 +1,61 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&gpio>;
-+ __overlay__ {
-+ spi1_pins: spi1_pins {
-+ brcm,pins = <19 20 21>;
-+ brcm,function = <3>; /* alt4 */
-+ };
-+
-+ spi1_cs_pins: spi1_cs_pins {
-+ brcm,pins = <18>;
-+ brcm,function = <1>; /* output */
-+ };
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&spi1>;
-+ frag1: __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
-+ cs-gpios = <&gpio 18 1>;
-+ status = "okay";
-+
-+ sc16is752: sc16is752@0 {
-+ compatible = "nxp,sc16is752";
-+ reg = <0>; /* CE0 */
-+ clocks = <&sc16is752_clk>;
-+ interrupt-parent = <&gpio>;
-+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
-+ #gpio-controller;
-+ #gpio-cells = <2>;
-+ spi-max-frequency = <4000000>;
-+
-+ sc16is752_clk: sc16is752_clk {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <14745600>;
-+ };
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&aux>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ __overrides__ {
-+ int_pin = <&sc16is752>,"interrupts:0";
-+ };
-+};
--- /dev/null
+From ca5ffeeb576e6392ed1331f01fb2ac5be4524d24 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 1 Jul 2016 22:09:24 +0100
+Subject: [PATCH] spi-bcm2835: Disable forced software CS
+
+Select software CS in bcm2708_common.dtsi, and disable the automatic
+conversion in the driver to allow hardware CS to be re-enabled with an
+overlay.
+
+See: https://github.com/raspberrypi/linux/issues/1547
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
+ drivers/spi/spi-bcm2835.c | 2 ++
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -183,7 +183,7 @@
+ * add more gpios if necessary as <&gpio 6 1>
+ * (but do not forget to make them output!)
+ */
+- cs-gpios = <0>, <0>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
+ };
+
+ i2c0: i2c@7e205000 {
+--- a/drivers/spi/spi-bcm2835.c
++++ b/drivers/spi/spi-bcm2835.c
+@@ -707,6 +707,7 @@ static int bcm2835_spi_setup(struct spi_
+ return -EINVAL;
+ }
+
++#if 0
+ /* now translate native cs to GPIO */
+ /* first look for chip select pins in the devices pin groups */
+ for (pingroup_index = 0;
+@@ -761,6 +762,7 @@ static int bcm2835_spi_setup(struct spi_
+ * so we are setting it here explicitly
+ */
+ gpio_set_value(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
++#endif
+
+ return 0;
+ }
--- /dev/null
+From 0583a0c3f173c327dff70ee9d7a0d70e50b5d120 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 1 Jul 2016 22:34:52 +0100
+Subject: [PATCH] BCM270X_DT: Overlay to re-enable HW CS on SPI0
+
+See: https://github.com/raspberrypi/linux/issues/1547
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 ++++++
+ arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +++++++++++++++++++++++
+ 3 files changed, 33 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -81,6 +81,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += spi0-hw-cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1006,6 +1006,12 @@ Load: dtoverlay=spi-rtc,<param>=<val>
+ Params: pcf2123 Select the PCF2123 device
+
+
++Name: spi0-hw-cs
++Info: Re-enables hardware CS/CE (chip selects) for SPI0
++Load: dtoverlay=spi0-hw-cs
++Params: <None>
++
++
+ Name: spi1-1cs
+ Info: Enables spi1 with a single chip select (CS) line and associated spidev
+ dev node. The gpio pin number for the CS line and spidev device node
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
+@@ -0,0 +1,26 @@
++/*
++ * Device tree overlay to re-enable hardware CS for SPI0
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&spi0>;
++ __overlay__ {
++ cs-gpios = <0>, <0>;
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&spi0_cs_pins>;
++ __overlay__ {
++ brcm,pins = <8 7>;
++ brcm,function = <4>; /* alt0 */
++ };
++ };
++};
+++ /dev/null
-From f3ca1e96b47181a009fd99fbb8e22f9afa5b1972 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 1 Jul 2016 22:09:24 +0100
-Subject: [PATCH] spi-bcm2835: Disable forced software CS
-
-Select software CS in bcm2708_common.dtsi, and disable the automatic
-conversion in the driver to allow hardware CS to be re-enabled with an
-overlay.
-
-See: https://github.com/raspberrypi/linux/issues/1547
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
- drivers/spi/spi-bcm2835.c | 2 ++
- 2 files changed, 3 insertions(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -183,7 +183,7 @@
- * add more gpios if necessary as <&gpio 6 1>
- * (but do not forget to make them output!)
- */
-- cs-gpios = <0>, <0>;
-+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
- };
-
- i2c0: i2c@7e205000 {
---- a/drivers/spi/spi-bcm2835.c
-+++ b/drivers/spi/spi-bcm2835.c
-@@ -707,6 +707,7 @@ static int bcm2835_spi_setup(struct spi_
- return -EINVAL;
- }
-
-+#if 0
- /* now translate native cs to GPIO */
- /* first look for chip select pins in the devices pin groups */
- for (pingroup_index = 0;
-@@ -761,6 +762,7 @@ static int bcm2835_spi_setup(struct spi_
- * so we are setting it here explicitly
- */
- gpio_set_value(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
-+#endif
-
- return 0;
- }
--- /dev/null
+From be377792090556422c0735f3486b502b991da36d Mon Sep 17 00:00:00 2001
+From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+Date: Sat, 2 Jul 2016 16:26:19 +0100
+Subject: [PATCH] Add support for Dion Audio LOCO DAC-AMP HAT
+
+Using dedicated machine driver and pcm5102a codec driver.
+
+Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +
+ .../boot/dts/overlays/dionaudio-loco-overlay.dts | 39 +++++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 ++
+ sound/soc/bcm/Makefile | 3 +-
+ sound/soc/bcm/dionaudio_loco.c | 121 +++++++++++++++++++++
+ 8 files changed, 178 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
+ create mode 100644 sound/soc/bcm/dionaudio_loco.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -20,6 +20,7 @@ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtb
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dionaudio-loco.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -268,6 +268,12 @@ Params: gpiopin GPIO con
+ (default 4)
+
+
++Name: dionaudio-loco
++Info: Configures the Dion Audio LOCO DAC-AMP
++Load: dtoverlay=dionaudio-loco
++Params: <None>
++
++
+ Name: dpi24
+ Info: Overlay for a generic 24-bit DPI display
+ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
+@@ -0,0 +1,39 @@
++// Definitions for Dion Audio LOCO DAC-AMP
++
++/*
++ * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target-path = "/";
++ __overlay__ {
++ pcm5102a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5102a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "dionaudio,loco-pcm5242-tpa3118";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -870,6 +870,7 @@ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -862,6 +862,7 @@ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -107,3 +107,10 @@ config SND_DIGIDAC1_SOUNDCARD
+ select SND_SOC_WM8741
+ help
+ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
++
++config SND_BCM2708_SOC_DIONAUDIO_LOCO
++ tristate "Support for Dion Audio LOCO DAC-AMP"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_PCM5102a
++ help
++ Say Y or M if you want to add support for Dion Audio LOCO.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -18,6 +18,7 @@ snd-soc-iqaudio-digi-objs := iqaudio_dig
+ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
+ snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
++snd-soc-dionaudio-loco-objs := dionaudio_loco.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -33,4 +34,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIG
+ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
+ obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+-
++obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o
+--- /dev/null
++++ b/sound/soc/bcm/dionaudio_loco.c
+@@ -0,0 +1,121 @@
++/*
++ * ASoC Driver for Dion Audio LOCO DAC-AMP
++ *
++ * Author: Miquel Blauw <info@dionaudio.nl>
++ * Copyright 2016
++ *
++ * Based on the software of the RPi-DAC writen by Florian Meier
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++
++static int snd_rpi_dionaudio_loco_hw_params(
++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ unsigned int sample_bits =
++ snd_pcm_format_physical_width(params_format(params));
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_rpi_dionaudio_loco_ops = {
++ .hw_params = snd_rpi_dionaudio_loco_hw_params,
++};
++
++static struct snd_soc_dai_link snd_rpi_dionaudio_loco_dai[] = {
++{
++ .name = "DionAudio LOCO",
++ .stream_name = "DionAudio LOCO DAC-AMP",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "pcm5102a-hifi",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "pcm5102a-codec",
++ .dai_fmt = SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBS_CFS,
++ .ops = &snd_rpi_dionaudio_loco_ops,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_rpi_dionaudio_loco = {
++ .name = "snd_rpi_dionaudio_loco",
++ .dai_link = snd_rpi_dionaudio_loco_dai,
++ .num_links = ARRAY_SIZE(snd_rpi_dionaudio_loco_dai),
++};
++
++static int snd_rpi_dionaudio_loco_probe(struct platform_device *pdev)
++{
++ struct device_node *np;
++ int ret = 0;
++
++ snd_rpi_dionaudio_loco.dev = &pdev->dev;
++
++ np = pdev->dev.of_node;
++ if (np) {
++ struct snd_soc_dai_link *dai = &snd_rpi_dionaudio_loco_dai[0];
++ struct device_node *i2s_np;
++
++ i2s_np = of_parse_phandle(np, "i2s-controller", 0);
++ if (i2s_np) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_np;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_np;
++ }
++ }
++
++ ret = snd_soc_register_card(&snd_rpi_dionaudio_loco);
++ if (ret)
++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
++ ret);
++
++ return ret;
++}
++
++static int snd_rpi_dionaudio_loco_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_rpi_dionaudio_loco);
++}
++
++static const struct of_device_id snd_rpi_dionaudio_loco_of_match[] = {
++ { .compatible = "dionaudio,loco-pcm5242-tpa3118", },
++ { /* sentinel */ },
++};
++MODULE_DEVICE_TABLE(of, snd_rpi_dionaudio_loco_of_match);
++
++static struct platform_driver snd_rpi_dionaudio_loco_driver = {
++ .driver = {
++ .name = "snd-dionaudio-loco",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_rpi_dionaudio_loco_of_match,
++ },
++ .probe = snd_rpi_dionaudio_loco_probe,
++ .remove = snd_rpi_dionaudio_loco_remove,
++};
++
++module_platform_driver(snd_rpi_dionaudio_loco_driver);
++
++MODULE_AUTHOR("Miquel Blauw <info@dionaudio.nl>");
++MODULE_DESCRIPTION("ASoC Driver for DionAudio LOCO");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 538f85c20d4209dbae6851f9733e3e3f0450ff32 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 1 Jul 2016 22:34:52 +0100
-Subject: [PATCH] BCM270X_DT: Overlay to re-enable HW CS on SPI0
-
-See: https://github.com/raspberrypi/linux/issues/1547
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 ++++++
- arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 +++++++++++++++++++++++
- 3 files changed, 33 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -81,6 +81,7 @@ dtbo-$(RPI_DT_OVERLAYS) += smi-dev.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += smi-nand.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi-gpio35-39.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi-rtc.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += spi0-hw-cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-1cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-2cs.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += spi1-3cs.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -1006,6 +1006,12 @@ Load: dtoverlay=spi-rtc,<param>=<val>
- Params: pcf2123 Select the PCF2123 device
-
-
-+Name: spi0-hw-cs
-+Info: Re-enables hardware CS/CE (chip selects) for SPI0
-+Load: dtoverlay=spi0-hw-cs
-+Params: <None>
-+
-+
- Name: spi1-1cs
- Info: Enables spi1 with a single chip select (CS) line and associated spidev
- dev node. The gpio pin number for the CS line and spidev device node
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts
-@@ -0,0 +1,26 @@
-+/*
-+ * Device tree overlay to re-enable hardware CS for SPI0
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&spi0>;
-+ __overlay__ {
-+ cs-gpios = <0>, <0>;
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&spi0_cs_pins>;
-+ __overlay__ {
-+ brcm,pins = <8 7>;
-+ brcm,function = <4>; /* alt0 */
-+ };
-+ };
-+};
--- /dev/null
+From 30683cba03d40e685b6e8db97f8e3e3c6acaa782 Mon Sep 17 00:00:00 2001
+From: Matt Flax <flatmax@flatmax.org>
+Date: Fri, 17 Jun 2016 14:48:16 +1000
+Subject: [PATCH] ASoc: wm8731: add 32bit mode.
+
+commit cf5ef3a299ba32f6ac24c3c6ba18c1b7f1b5475f upstream.
+
+This patch adds 32 bit word capability to the wm8731 driver. The wm8731
+codec is capable of handling 32 bit word sizes, however that has not
+previously been activated in the codec driver.
+
+Signed-off-by: Matt Flax <flatmax@flatmax.org>
+Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ sound/soc/codecs/wm8731.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/sound/soc/codecs/wm8731.c
++++ b/sound/soc/codecs/wm8731.c
+@@ -358,6 +358,9 @@ static int wm8731_hw_params(struct snd_p
+ case 24:
+ iface |= 0x0008;
+ break;
++ case 32:
++ iface |= 0x000c;
++ break;
+ }
+
+ wm8731_set_deemph(codec);
+@@ -541,7 +544,7 @@ static int wm8731_startup(struct snd_pcm
+ #define WM8731_RATES SNDRV_PCM_RATE_8000_96000
+
+ #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
+- SNDRV_PCM_FMTBIT_S24_LE)
++ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
+
+ static const struct snd_soc_dai_ops wm8731_dai_ops = {
+ .startup = wm8731_startup,
+++ /dev/null
-From 91bb6ae349039ab6c1336a463d3c3d26e4df9fb0 Mon Sep 17 00:00:00 2001
-From: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
-Date: Sat, 2 Jul 2016 16:26:19 +0100
-Subject: [PATCH] Add support for Dion Audio LOCO DAC-AMP HAT
-
-Using dedicated machine driver and pcm5102a codec driver.
-
-Signed-off-by: DigitalDreamtime <clive.messer@digitaldreamtime.co.uk>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 +
- .../boot/dts/overlays/dionaudio-loco-overlay.dts | 39 +++++++
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- sound/soc/bcm/Kconfig | 7 ++
- sound/soc/bcm/Makefile | 3 +-
- sound/soc/bcm/dionaudio_loco.c | 121 +++++++++++++++++++++
- 8 files changed, 178 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
- create mode 100644 sound/soc/bcm/dionaudio_loco.c
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -20,6 +20,7 @@ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtb
- dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += dionaudio-loco.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -268,6 +268,12 @@ Params: gpiopin GPIO con
- (default 4)
-
-
-+Name: dionaudio-loco
-+Info: Configures the Dion Audio LOCO DAC-AMP
-+Load: dtoverlay=dionaudio-loco
-+Params: <None>
-+
-+
- Name: dpi24
- Info: Overlay for a generic 24-bit DPI display
- This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
-@@ -0,0 +1,39 @@
-+// Definitions for Dion Audio LOCO DAC-AMP
-+
-+/*
-+ * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
-+ */
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target-path = "/";
-+ __overlay__ {
-+ pcm5102a-codec {
-+ #sound-dai-cells = <0>;
-+ compatible = "ti,pcm5102a";
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "dionaudio,loco-pcm5242-tpa3118";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ };
-+ };
-+};
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -870,6 +870,7 @@ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_DIGIDAC1_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
-+CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
- CONFIG_SND_SIMPLE_CARD=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -862,6 +862,7 @@ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_DIGIDAC1_SOUNDCARD=m
- CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
-+CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
- CONFIG_SND_SIMPLE_CARD=m
---- a/sound/soc/bcm/Kconfig
-+++ b/sound/soc/bcm/Kconfig
-@@ -107,3 +107,10 @@ config SND_DIGIDAC1_SOUNDCARD
- select SND_SOC_WM8741
- help
- Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board.
-+
-+config SND_BCM2708_SOC_DIONAUDIO_LOCO
-+ tristate "Support for Dion Audio LOCO DAC-AMP"
-+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
-+ select SND_SOC_PCM5102a
-+ help
-+ Say Y or M if you want to add support for Dion Audio LOCO.
---- a/sound/soc/bcm/Makefile
-+++ b/sound/soc/bcm/Makefile
-@@ -18,6 +18,7 @@ snd-soc-iqaudio-digi-objs := iqaudio_dig
- snd-soc-raspidac3-objs := raspidac3.o
- snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
- snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
-+snd-soc-dionaudio-loco-objs := dionaudio_loco.o
-
- obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
- obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
-@@ -33,4 +34,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIG
- obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o
- obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
- obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
--
-+obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o
---- /dev/null
-+++ b/sound/soc/bcm/dionaudio_loco.c
-@@ -0,0 +1,121 @@
-+/*
-+ * ASoC Driver for Dion Audio LOCO DAC-AMP
-+ *
-+ * Author: Miquel Blauw <info@dionaudio.nl>
-+ * Copyright 2016
-+ *
-+ * Based on the software of the RPi-DAC writen by Florian Meier
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * version 2 as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-+ * General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc.h>
-+#include <sound/jack.h>
-+
-+static int snd_rpi_dionaudio_loco_hw_params(
-+ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
-+{
-+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
-+
-+ unsigned int sample_bits =
-+ snd_pcm_format_physical_width(params_format(params));
-+
-+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
-+}
-+
-+/* machine stream operations */
-+static struct snd_soc_ops snd_rpi_dionaudio_loco_ops = {
-+ .hw_params = snd_rpi_dionaudio_loco_hw_params,
-+};
-+
-+static struct snd_soc_dai_link snd_rpi_dionaudio_loco_dai[] = {
-+{
-+ .name = "DionAudio LOCO",
-+ .stream_name = "DionAudio LOCO DAC-AMP",
-+ .cpu_dai_name = "bcm2708-i2s.0",
-+ .codec_dai_name = "pcm5102a-hifi",
-+ .platform_name = "bcm2708-i2s.0",
-+ .codec_name = "pcm5102a-codec",
-+ .dai_fmt = SND_SOC_DAIFMT_I2S |
-+ SND_SOC_DAIFMT_NB_NF |
-+ SND_SOC_DAIFMT_CBS_CFS,
-+ .ops = &snd_rpi_dionaudio_loco_ops,
-+},
-+};
-+
-+/* audio machine driver */
-+static struct snd_soc_card snd_rpi_dionaudio_loco = {
-+ .name = "snd_rpi_dionaudio_loco",
-+ .dai_link = snd_rpi_dionaudio_loco_dai,
-+ .num_links = ARRAY_SIZE(snd_rpi_dionaudio_loco_dai),
-+};
-+
-+static int snd_rpi_dionaudio_loco_probe(struct platform_device *pdev)
-+{
-+ struct device_node *np;
-+ int ret = 0;
-+
-+ snd_rpi_dionaudio_loco.dev = &pdev->dev;
-+
-+ np = pdev->dev.of_node;
-+ if (np) {
-+ struct snd_soc_dai_link *dai = &snd_rpi_dionaudio_loco_dai[0];
-+ struct device_node *i2s_np;
-+
-+ i2s_np = of_parse_phandle(np, "i2s-controller", 0);
-+ if (i2s_np) {
-+ dai->cpu_dai_name = NULL;
-+ dai->cpu_of_node = i2s_np;
-+ dai->platform_name = NULL;
-+ dai->platform_of_node = i2s_np;
-+ }
-+ }
-+
-+ ret = snd_soc_register_card(&snd_rpi_dionaudio_loco);
-+ if (ret)
-+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n",
-+ ret);
-+
-+ return ret;
-+}
-+
-+static int snd_rpi_dionaudio_loco_remove(struct platform_device *pdev)
-+{
-+ return snd_soc_unregister_card(&snd_rpi_dionaudio_loco);
-+}
-+
-+static const struct of_device_id snd_rpi_dionaudio_loco_of_match[] = {
-+ { .compatible = "dionaudio,loco-pcm5242-tpa3118", },
-+ { /* sentinel */ },
-+};
-+MODULE_DEVICE_TABLE(of, snd_rpi_dionaudio_loco_of_match);
-+
-+static struct platform_driver snd_rpi_dionaudio_loco_driver = {
-+ .driver = {
-+ .name = "snd-dionaudio-loco",
-+ .owner = THIS_MODULE,
-+ .of_match_table = snd_rpi_dionaudio_loco_of_match,
-+ },
-+ .probe = snd_rpi_dionaudio_loco_probe,
-+ .remove = snd_rpi_dionaudio_loco_remove,
-+};
-+
-+module_platform_driver(snd_rpi_dionaudio_loco_driver);
-+
-+MODULE_AUTHOR("Miquel Blauw <info@dionaudio.nl>");
-+MODULE_DESCRIPTION("ASoC Driver for DionAudio LOCO");
-+MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 4dd7b6b8c1354ab21b4e3f85dcd513252fe8afea Mon Sep 17 00:00:00 2001
-From: Matt Flax <flatmax@flatmax.org>
-Date: Fri, 17 Jun 2016 14:48:16 +1000
-Subject: [PATCH] ASoc: wm8731: add 32bit mode.
-
-commit cf5ef3a299ba32f6ac24c3c6ba18c1b7f1b5475f upstream.
-
-This patch adds 32 bit word capability to the wm8731 driver. The wm8731
-codec is capable of handling 32 bit word sizes, however that has not
-previously been activated in the codec driver.
-
-Signed-off-by: Matt Flax <flatmax@flatmax.org>
-Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- sound/soc/codecs/wm8731.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/sound/soc/codecs/wm8731.c
-+++ b/sound/soc/codecs/wm8731.c
-@@ -358,6 +358,9 @@ static int wm8731_hw_params(struct snd_p
- case 24:
- iface |= 0x0008;
- break;
-+ case 32:
-+ iface |= 0x000c;
-+ break;
- }
-
- wm8731_set_deemph(codec);
-@@ -541,7 +544,7 @@ static int wm8731_startup(struct snd_pcm
- #define WM8731_RATES SNDRV_PCM_RATE_8000_96000
-
- #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
-- SNDRV_PCM_FMTBIT_S24_LE)
-+ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
-
- static const struct snd_soc_dai_ops wm8731_dai_ops = {
- .startup = wm8731_startup,
--- /dev/null
+From 44bc32bd05018d23b4145d56d09419ce8bd89055 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 20 Jun 2016 13:21:26 +0100
+Subject: [PATCH] BCM270X_DT: Declare the audio PWM pins explicitly
+
+Make the audio driver's use of the PWM functions explicit. Overlays
+that want to use the PWM functionality for other purposes must
+disable the audio node.
+
+See: https://github.com/raspberrypi/linux/issues/1473
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 10 ++++++++++
+ arch/arm/boot/dts/bcm2708-rpi-b.dts | 9 +++++++++
+ arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 10 ++++++++++
+ arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 10 ++++++++++
+ 4 files changed, 39 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
+@@ -37,6 +37,11 @@
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <4>; /* alt0 */
+ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 45>;
++ brcm,function = <4>;
++ };
+ };
+
+ &sdhost {
+@@ -120,6 +125,11 @@
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
+
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
+ / {
+ __overrides__ {
+ uart0 = <&uart0>,"status";
+--- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
+@@ -36,6 +36,10 @@
+ i2s_pins: i2s {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <6>; /* alt2 */
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 45>;
++ brcm,function = <4>;
+ };
+ };
+
+@@ -114,6 +118,11 @@
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ };
+
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
+ / {
+ __overrides__ {
+ uart0 = <&uart0>,"status";
+--- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
++++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
+@@ -37,6 +37,11 @@
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <4>; /* alt0 */
+ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 45>;
++ brcm,function = <4>;
++ };
+ };
+
+ &sdhost {
+@@ -120,6 +125,11 @@
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
+
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
+ / {
+ __overrides__ {
+ uart0 = <&uart0>,"status";
+--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
+@@ -61,6 +61,11 @@
+ brcm,function;
+ brcm,pull;
+ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 41>;
++ brcm,function = <4>;
++ };
+ };
+
+ &sdhost {
+@@ -165,6 +170,11 @@
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
+
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
+ / {
+ chosen {
+ bootargs = "8250.nr_uarts=1";
+++ /dev/null
-From 4a1655a918b26f5d24d04b1bb798feb39982ac78 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Mon, 20 Jun 2016 13:21:26 +0100
-Subject: [PATCH] BCM270X_DT: Declare the audio PWM pins explicitly
-
-Make the audio driver's use of the PWM functions explicit. Overlays
-that want to use the PWM functionality for other purposes must
-disable the audio node.
-
-See: https://github.com/raspberrypi/linux/issues/1473
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 10 ++++++++++
- arch/arm/boot/dts/bcm2708-rpi-b.dts | 9 +++++++++
- arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 10 ++++++++++
- arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 10 ++++++++++
- 4 files changed, 39 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
-+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
-@@ -37,6 +37,11 @@
- brcm,pins = <18 19 20 21>;
- brcm,function = <4>; /* alt0 */
- };
-+
-+ audio_pins: audio_pins {
-+ brcm,pins = <40 45>;
-+ brcm,function = <4>;
-+ };
- };
-
- &sdhost {
-@@ -120,6 +125,11 @@
- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
- };
-
-+&audio {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&audio_pins>;
-+};
-+
- / {
- __overrides__ {
- uart0 = <&uart0>,"status";
---- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
-+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
-@@ -36,6 +36,10 @@
- i2s_pins: i2s {
- brcm,pins = <28 29 30 31>;
- brcm,function = <6>; /* alt2 */
-+
-+ audio_pins: audio_pins {
-+ brcm,pins = <40 45>;
-+ brcm,function = <4>;
- };
- };
-
-@@ -114,6 +118,11 @@
- hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
- };
-
-+&audio {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&audio_pins>;
-+};
-+
- / {
- __overrides__ {
- uart0 = <&uart0>,"status";
---- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
-+++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
-@@ -37,6 +37,11 @@
- brcm,pins = <18 19 20 21>;
- brcm,function = <4>; /* alt0 */
- };
-+
-+ audio_pins: audio_pins {
-+ brcm,pins = <40 45>;
-+ brcm,function = <4>;
-+ };
- };
-
- &sdhost {
-@@ -120,6 +125,11 @@
- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
- };
-
-+&audio {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&audio_pins>;
-+};
-+
- / {
- __overrides__ {
- uart0 = <&uart0>,"status";
---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
-+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
-@@ -61,6 +61,11 @@
- brcm,function;
- brcm,pull;
- };
-+
-+ audio_pins: audio_pins {
-+ brcm,pins = <40 41>;
-+ brcm,function = <4>;
-+ };
- };
-
- &sdhost {
-@@ -165,6 +170,11 @@
- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
- };
-
-+&audio {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&audio_pins>;
-+};
-+
- / {
- chosen {
- bootargs = "8250.nr_uarts=1";
--- /dev/null
+From c97ebdd04db461f38eaa674f29a3f313533221a4 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Tue, 12 Jul 2016 10:35:01 +0100
+Subject: [PATCH] BCM270X_DT: Restore lost closing brace.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708-rpi-b.dts | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
+@@ -36,6 +36,7 @@
+ i2s_pins: i2s {
+ brcm,pins = <28 29 30 31>;
+ brcm,function = <6>; /* alt2 */
++ };
+
+ audio_pins: audio_pins {
+ brcm,pins = <40 45>;
+++ /dev/null
-From a9b472033e4d34df447f1bdf87d520137559bb66 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Tue, 12 Jul 2016 10:35:01 +0100
-Subject: [PATCH] BCM270X_DT: Restore lost closing brace.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/bcm2708-rpi-b.dts | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/bcm2708-rpi-b.dts
-+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
-@@ -36,6 +36,7 @@
- i2s_pins: i2s {
- brcm,pins = <28 29 30 31>;
- brcm,function = <6>; /* alt2 */
-+ };
-
- audio_pins: audio_pins {
- brcm,pins = <40 45>;
--- /dev/null
+From 6ff62ca3589f88112cddf0b61d708a784b3283f4 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 14 Jul 2016 10:40:20 +0100
+Subject: [PATCH] config: Add driver for mcp23017 I2C GPIO expander
+
+There is already an overlay for the mcp23017 I2C GPIO expander,
+but it does nothing without the required driver module.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/configs/bcm2709_defconfig | 3 ++-
+ arch/arm/configs/bcmrpi_defconfig | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -619,6 +619,7 @@ CONFIG_GPIO_SYSFS=y
+ CONFIG_GPIO_BCM_VIRT=y
+ CONFIG_GPIO_ARIZONA=m
+ CONFIG_GPIO_STMPE=y
++CONFIG_GPIO_MCP23S08=m
+ CONFIG_W1=m
+ CONFIG_W1_MASTER_DS2490=m
+ CONFIG_W1_MASTER_DS2482=m
+@@ -867,9 +868,9 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+-CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -611,6 +611,7 @@ CONFIG_PPS_CLIENT_GPIO=m
+ CONFIG_GPIO_SYSFS=y
+ CONFIG_GPIO_ARIZONA=m
+ CONFIG_GPIO_STMPE=y
++CONFIG_GPIO_MCP23S08=m
+ CONFIG_W1=m
+ CONFIG_W1_MASTER_DS2490=m
+ CONFIG_W1_MASTER_DS2482=m
+@@ -859,9 +860,9 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
+ CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
+ CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+-CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+++ /dev/null
-From 42700ba3ac2664f121b29892762b5c7eb2292fe1 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 14 Jul 2016 10:40:20 +0100
-Subject: [PATCH] config: Add driver for mcp23017 I2C GPIO expander
-
-There is already an overlay for the mcp23017 I2C GPIO expander,
-but it does nothing without the required driver module.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/configs/bcm2709_defconfig | 3 ++-
- arch/arm/configs/bcmrpi_defconfig | 3 ++-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -619,6 +619,7 @@ CONFIG_GPIO_SYSFS=y
- CONFIG_GPIO_BCM_VIRT=y
- CONFIG_GPIO_ARIZONA=m
- CONFIG_GPIO_STMPE=y
-+CONFIG_GPIO_MCP23S08=m
- CONFIG_W1=m
- CONFIG_W1_MASTER_DS2490=m
- CONFIG_W1_MASTER_DS2482=m
-@@ -867,9 +868,9 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
-+CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_DIGIDAC1_SOUNDCARD=m
--CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -611,6 +611,7 @@ CONFIG_PPS_CLIENT_GPIO=m
- CONFIG_GPIO_SYSFS=y
- CONFIG_GPIO_ARIZONA=m
- CONFIG_GPIO_STMPE=y
-+CONFIG_GPIO_MCP23S08=m
- CONFIG_W1=m
- CONFIG_W1_MASTER_DS2490=m
- CONFIG_W1_MASTER_DS2482=m
-@@ -859,9 +860,9 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m
- CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m
- CONFIG_SND_BCM2708_SOC_RASPIDAC3=m
-+CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
- CONFIG_SND_DIGIDAC1_SOUNDCARD=m
--CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
- CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
- CONFIG_SND_SOC_ADAU1701=m
- CONFIG_SND_SOC_WM8804_I2C=m
--- /dev/null
+From 96d2e8f913ef4e62b93a2fd42412655643d24ad1 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 20 Jun 2016 13:51:44 +0100
+Subject: [PATCH] vchiq_arm: Avoid use of mutex in add_completion
+
+Claiming the completion_mutex within add_completion did prevent some
+messages appearing twice, but provokes a deadlock caused by vcsm using
+vchiq within a page fault handler.
+
+Revert the use of completion_mutex, and instead fix the original
+problem using more memory barriers.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ .../vc04_services/interface/vchiq_arm/vchiq_arm.c | 55 +++++++++++-----------
+ .../vc04_services/interface/vchiq_arm/vchiq_core.c | 14 ++++--
+ 2 files changed, 37 insertions(+), 32 deletions(-)
+
+--- a/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
++++ b/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
+@@ -64,10 +64,10 @@
+ #define VCHIQ_MINOR 0
+
+ /* Some per-instance constants */
+-#define MAX_COMPLETIONS 16
++#define MAX_COMPLETIONS 128
+ #define MAX_SERVICES 64
+ #define MAX_ELEMENTS 8
+-#define MSG_QUEUE_SIZE 64
++#define MSG_QUEUE_SIZE 128
+
+ #define KEEPALIVE_VER 1
+ #define KEEPALIVE_VER_MIN KEEPALIVE_VER
+@@ -208,28 +208,24 @@ add_completion(VCHIQ_INSTANCE_T instance
+ void *bulk_userdata)
+ {
+ VCHIQ_COMPLETION_DATA_T *completion;
++ int insert;
+ DEBUG_INITIALISE(g_state.local)
+
+- mutex_lock(&instance->completion_mutex);
+-
+- while (instance->completion_insert ==
+- (instance->completion_remove + MAX_COMPLETIONS)) {
++ insert = instance->completion_insert;
++ while ((insert - instance->completion_remove) >= MAX_COMPLETIONS) {
+ /* Out of space - wait for the client */
+ DEBUG_TRACE(SERVICE_CALLBACK_LINE);
+ vchiq_log_trace(vchiq_arm_log_level,
+ "add_completion - completion queue full");
+ DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT);
+
+- mutex_unlock(&instance->completion_mutex);
+ if (down_interruptible(&instance->remove_event) != 0) {
+ vchiq_log_info(vchiq_arm_log_level,
+ "service_callback interrupted");
+ return VCHIQ_RETRY;
+ }
+
+- mutex_lock(&instance->completion_mutex);
+ if (instance->closing) {
+- mutex_unlock(&instance->completion_mutex);
+ vchiq_log_info(vchiq_arm_log_level,
+ "service_callback closing");
+ return VCHIQ_SUCCESS;
+@@ -237,9 +233,7 @@ add_completion(VCHIQ_INSTANCE_T instance
+ DEBUG_TRACE(SERVICE_CALLBACK_LINE);
+ }
+
+- completion =
+- &instance->completions[instance->completion_insert &
+- (MAX_COMPLETIONS - 1)];
++ completion = &instance->completions[insert & (MAX_COMPLETIONS - 1)];
+
+ completion->header = header;
+ completion->reason = reason;
+@@ -260,12 +254,9 @@ add_completion(VCHIQ_INSTANCE_T instance
+ wmb();
+
+ if (reason == VCHIQ_MESSAGE_AVAILABLE)
+- user_service->message_available_pos =
+- instance->completion_insert;
+-
+- instance->completion_insert++;
++ user_service->message_available_pos = insert;
+
+- mutex_unlock(&instance->completion_mutex);
++ instance->completion_insert = ++insert;
+
+ up(&instance->insert_event);
+
+@@ -795,6 +786,7 @@ vchiq_ioctl(struct file *file, unsigned
+ instance->completion_insert)
+ && !instance->closing) {
+ int rc;
++
+ DEBUG_TRACE(AWAIT_COMPLETION_LINE);
+ mutex_unlock(&instance->completion_mutex);
+ rc = down_interruptible(&instance->insert_event);
+@@ -809,24 +801,29 @@ vchiq_ioctl(struct file *file, unsigned
+ }
+ DEBUG_TRACE(AWAIT_COMPLETION_LINE);
+
+- /* A read memory barrier is needed to stop prefetch of a stale
+- ** completion record
+- */
+- rmb();
+-
+ if (ret == 0) {
+ int msgbufcount = args.msgbufcount;
++ int remove;
++
++ remove = instance->completion_remove;
++
+ for (ret = 0; ret < args.count; ret++) {
+ VCHIQ_COMPLETION_DATA_T *completion;
+ VCHIQ_SERVICE_T *service;
+ USER_SERVICE_T *user_service;
+ VCHIQ_HEADER_T *header;
+- if (instance->completion_remove ==
+- instance->completion_insert)
++
++ if (remove == instance->completion_insert)
+ break;
++
+ completion = &instance->completions[
+- instance->completion_remove &
+- (MAX_COMPLETIONS - 1)];
++ remove & (MAX_COMPLETIONS - 1)];
++
++
++ /* A read memory barrier is needed to prevent
++ ** the prefetch of a stale completion record
++ */
++ rmb();
+
+ service = completion->service_userdata;
+ user_service = service->base.userdata;
+@@ -903,7 +900,11 @@ vchiq_ioctl(struct file *file, unsigned
+ break;
+ }
+
+- instance->completion_remove++;
++ /* Ensure that the above copy has completed
++ ** before advancing the remove pointer. */
++ mb();
++
++ instance->completion_remove = ++remove;
+ }
+
+ if (msgbufcount != args.msgbufcount) {
+--- a/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.c
++++ b/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.c
+@@ -610,15 +610,15 @@ process_free_queue(VCHIQ_STATE_T *state)
+ BITSET_T service_found[BITSET_SIZE(VCHIQ_MAX_SERVICES)];
+ int slot_queue_available;
+
+- /* Use a read memory barrier to ensure that any state that may have
+- ** been modified by another thread is not masked by stale prefetched
+- ** values. */
+- rmb();
+-
+ /* Find slots which have been freed by the other side, and return them
+ ** to the available queue. */
+ slot_queue_available = state->slot_queue_available;
+
++ /* Use a memory barrier to ensure that any state that may have been
++ ** modified by another thread is not masked by stale prefetched
++ ** values. */
++ mb();
++
+ while (slot_queue_available != local->slot_queue_recycle) {
+ unsigned int pos;
+ int slot_index = local->slot_queue[slot_queue_available++ &
+@@ -626,6 +626,8 @@ process_free_queue(VCHIQ_STATE_T *state)
+ char *data = (char *)SLOT_DATA_FROM_INDEX(state, slot_index);
+ int data_found = 0;
+
++ rmb();
++
+ vchiq_log_trace(vchiq_core_log_level, "%d: pfq %d=%x %x %x",
+ state->id, slot_index, (unsigned int)data,
+ local->slot_queue_recycle, slot_queue_available);
+@@ -741,6 +743,8 @@ process_free_queue(VCHIQ_STATE_T *state)
+ up(&state->data_quota_event);
+ }
+
++ mb();
++
+ state->slot_queue_available = slot_queue_available;
+ up(&state->slot_available_event);
+ }
--- /dev/null
+From 227faa25e6fa97afb852eeff41d15b2e285776d5 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Thu, 28 Jul 2016 12:15:47 +0100
+Subject: [PATCH] bcm2708_fb: Default framebuffer to 32-bit
+
+Can be overridden with framebuffer_depth=16 in config.txt for old behaviour
+---
+ drivers/video/fbdev/bcm2708_fb.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/video/fbdev/bcm2708_fb.c
++++ b/drivers/video/fbdev/bcm2708_fb.c
+@@ -51,7 +51,7 @@ static const char *bcm2708_name = "BCM27
+
+ static int fbwidth = 800; /* module parameter */
+ static int fbheight = 480; /* module parameter */
+-static int fbdepth = 16; /* module parameter */
++static int fbdepth = 32; /* module parameter */
+ static int fbswap = 0; /* module parameter */
+
+ static u32 dma_busy_wait_threshold = 1<<15;
+++ /dev/null
-From 00d6172964200c5d72cef2264ff09d38f764bd69 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Mon, 20 Jun 2016 13:51:44 +0100
-Subject: [PATCH] vchiq_arm: Avoid use of mutex in add_completion
-
-Claiming the completion_mutex within add_completion did prevent some
-messages appearing twice, but provokes a deadlock caused by vcsm using
-vchiq within a page fault handler.
-
-Revert the use of completion_mutex, and instead fix the original
-problem using more memory barriers.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- .../vc04_services/interface/vchiq_arm/vchiq_arm.c | 55 +++++++++++-----------
- .../vc04_services/interface/vchiq_arm/vchiq_core.c | 14 ++++--
- 2 files changed, 37 insertions(+), 32 deletions(-)
-
---- a/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
-+++ b/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c
-@@ -64,10 +64,10 @@
- #define VCHIQ_MINOR 0
-
- /* Some per-instance constants */
--#define MAX_COMPLETIONS 16
-+#define MAX_COMPLETIONS 128
- #define MAX_SERVICES 64
- #define MAX_ELEMENTS 8
--#define MSG_QUEUE_SIZE 64
-+#define MSG_QUEUE_SIZE 128
-
- #define KEEPALIVE_VER 1
- #define KEEPALIVE_VER_MIN KEEPALIVE_VER
-@@ -208,28 +208,24 @@ add_completion(VCHIQ_INSTANCE_T instance
- void *bulk_userdata)
- {
- VCHIQ_COMPLETION_DATA_T *completion;
-+ int insert;
- DEBUG_INITIALISE(g_state.local)
-
-- mutex_lock(&instance->completion_mutex);
--
-- while (instance->completion_insert ==
-- (instance->completion_remove + MAX_COMPLETIONS)) {
-+ insert = instance->completion_insert;
-+ while ((insert - instance->completion_remove) >= MAX_COMPLETIONS) {
- /* Out of space - wait for the client */
- DEBUG_TRACE(SERVICE_CALLBACK_LINE);
- vchiq_log_trace(vchiq_arm_log_level,
- "add_completion - completion queue full");
- DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT);
-
-- mutex_unlock(&instance->completion_mutex);
- if (down_interruptible(&instance->remove_event) != 0) {
- vchiq_log_info(vchiq_arm_log_level,
- "service_callback interrupted");
- return VCHIQ_RETRY;
- }
-
-- mutex_lock(&instance->completion_mutex);
- if (instance->closing) {
-- mutex_unlock(&instance->completion_mutex);
- vchiq_log_info(vchiq_arm_log_level,
- "service_callback closing");
- return VCHIQ_SUCCESS;
-@@ -237,9 +233,7 @@ add_completion(VCHIQ_INSTANCE_T instance
- DEBUG_TRACE(SERVICE_CALLBACK_LINE);
- }
-
-- completion =
-- &instance->completions[instance->completion_insert &
-- (MAX_COMPLETIONS - 1)];
-+ completion = &instance->completions[insert & (MAX_COMPLETIONS - 1)];
-
- completion->header = header;
- completion->reason = reason;
-@@ -260,12 +254,9 @@ add_completion(VCHIQ_INSTANCE_T instance
- wmb();
-
- if (reason == VCHIQ_MESSAGE_AVAILABLE)
-- user_service->message_available_pos =
-- instance->completion_insert;
--
-- instance->completion_insert++;
-+ user_service->message_available_pos = insert;
-
-- mutex_unlock(&instance->completion_mutex);
-+ instance->completion_insert = ++insert;
-
- up(&instance->insert_event);
-
-@@ -795,6 +786,7 @@ vchiq_ioctl(struct file *file, unsigned
- instance->completion_insert)
- && !instance->closing) {
- int rc;
-+
- DEBUG_TRACE(AWAIT_COMPLETION_LINE);
- mutex_unlock(&instance->completion_mutex);
- rc = down_interruptible(&instance->insert_event);
-@@ -809,24 +801,29 @@ vchiq_ioctl(struct file *file, unsigned
- }
- DEBUG_TRACE(AWAIT_COMPLETION_LINE);
-
-- /* A read memory barrier is needed to stop prefetch of a stale
-- ** completion record
-- */
-- rmb();
--
- if (ret == 0) {
- int msgbufcount = args.msgbufcount;
-+ int remove;
-+
-+ remove = instance->completion_remove;
-+
- for (ret = 0; ret < args.count; ret++) {
- VCHIQ_COMPLETION_DATA_T *completion;
- VCHIQ_SERVICE_T *service;
- USER_SERVICE_T *user_service;
- VCHIQ_HEADER_T *header;
-- if (instance->completion_remove ==
-- instance->completion_insert)
-+
-+ if (remove == instance->completion_insert)
- break;
-+
- completion = &instance->completions[
-- instance->completion_remove &
-- (MAX_COMPLETIONS - 1)];
-+ remove & (MAX_COMPLETIONS - 1)];
-+
-+
-+ /* A read memory barrier is needed to prevent
-+ ** the prefetch of a stale completion record
-+ */
-+ rmb();
-
- service = completion->service_userdata;
- user_service = service->base.userdata;
-@@ -903,7 +900,11 @@ vchiq_ioctl(struct file *file, unsigned
- break;
- }
-
-- instance->completion_remove++;
-+ /* Ensure that the above copy has completed
-+ ** before advancing the remove pointer. */
-+ mb();
-+
-+ instance->completion_remove = ++remove;
- }
-
- if (msgbufcount != args.msgbufcount) {
---- a/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.c
-+++ b/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.c
-@@ -610,15 +610,15 @@ process_free_queue(VCHIQ_STATE_T *state)
- BITSET_T service_found[BITSET_SIZE(VCHIQ_MAX_SERVICES)];
- int slot_queue_available;
-
-- /* Use a read memory barrier to ensure that any state that may have
-- ** been modified by another thread is not masked by stale prefetched
-- ** values. */
-- rmb();
--
- /* Find slots which have been freed by the other side, and return them
- ** to the available queue. */
- slot_queue_available = state->slot_queue_available;
-
-+ /* Use a memory barrier to ensure that any state that may have been
-+ ** modified by another thread is not masked by stale prefetched
-+ ** values. */
-+ mb();
-+
- while (slot_queue_available != local->slot_queue_recycle) {
- unsigned int pos;
- int slot_index = local->slot_queue[slot_queue_available++ &
-@@ -626,6 +626,8 @@ process_free_queue(VCHIQ_STATE_T *state)
- char *data = (char *)SLOT_DATA_FROM_INDEX(state, slot_index);
- int data_found = 0;
-
-+ rmb();
-+
- vchiq_log_trace(vchiq_core_log_level, "%d: pfq %d=%x %x %x",
- state->id, slot_index, (unsigned int)data,
- local->slot_queue_recycle, slot_queue_available);
-@@ -741,6 +743,8 @@ process_free_queue(VCHIQ_STATE_T *state)
- up(&state->data_quota_event);
- }
-
-+ mb();
-+
- state->slot_queue_available = slot_queue_available;
- up(&state->slot_available_event);
- }
+++ /dev/null
-From bf38f441ef6cbc85f8232f4a43e19557c89ad21c Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Thu, 28 Jul 2016 12:15:47 +0100
-Subject: [PATCH] bcm2708_fb: Default framebuffer to 32-bit
-
-Can be overridden with framebuffer_depth=16 in config.txt for old behaviour
----
- drivers/video/fbdev/bcm2708_fb.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/video/fbdev/bcm2708_fb.c
-+++ b/drivers/video/fbdev/bcm2708_fb.c
-@@ -51,7 +51,7 @@ static const char *bcm2708_name = "BCM27
-
- static int fbwidth = 800; /* module parameter */
- static int fbheight = 480; /* module parameter */
--static int fbdepth = 16; /* module parameter */
-+static int fbdepth = 32; /* module parameter */
- static int fbswap = 0; /* module parameter */
-
- static u32 dma_busy_wait_threshold = 1<<15;
--- /dev/null
+From 413e42754e61620eb75e0bd632c697b89ff0ffb9 Mon Sep 17 00:00:00 2001
+From: Ingo Kresse <ingo.kresse@gmail.com>
+Date: Fri, 29 Jul 2016 22:50:21 +0000
+Subject: [PATCH] fix auto-sense in lirc_rpi driver
+
+On a Raspberry Pi 2, the lirc_rpi driver might receive spurious
+interrupts and change it's low-active / high-active setting.
+When this happens, the IR remote control stops working.
+
+This patch disables this auto-detection if the 'sense' parameter
+was set in the device tree, making the driver robust to such
+spurious interrupts.
+---
+ drivers/staging/media/lirc/lirc_rpi.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/staging/media/lirc/lirc_rpi.c
++++ b/drivers/staging/media/lirc/lirc_rpi.c
+@@ -79,6 +79,7 @@ static bool invert = 0;
+
+ struct gpio_chip *gpiochip;
+ static int irq_num;
++static int auto_sense = 1;
+
+ /* forward declarations */
+ static long send_pulse(unsigned long length);
+@@ -279,7 +280,9 @@ static irqreturn_t irq_handler(int i, vo
+ * detecting pulse while this
+ * MUST be a space!
+ */
+- sense = sense ? 0 : 1;
++ if (auto_sense) {
++ sense = sense ? 0 : 1;
++ }
+ }
+ } else {
+ data = (int) (deltv*1000000 +
+@@ -417,6 +420,7 @@ static int init_port(void)
+ printk(KERN_INFO LIRC_DRIVER_NAME
+ ": manually using active %s receiver on GPIO pin %d\n",
+ sense ? "low" : "high", gpio_in_pin);
++ auto_sense = 0;
+ }
+
+ return 0;
--- /dev/null
+From dcdecbf9e91309e3e497db20119c3f3df4391f66 Mon Sep 17 00:00:00 2001
+From: Jools Wills <buzz@exotica.org.uk>
+Date: Mon, 8 Aug 2016 11:04:29 +0100
+Subject: [PATCH] enable gembird joypad support
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -891,6 +891,7 @@ CONFIG_HID_EMS_FF=m
+ CONFIG_HID_ELECOM=m
+ CONFIG_HID_ELO=m
+ CONFIG_HID_EZKEY=m
++CONFIG_HID_GEMBIRD=m
+ CONFIG_HID_HOLTEK=m
+ CONFIG_HID_KEYTOUCH=m
+ CONFIG_HID_KYE=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -883,6 +883,7 @@ CONFIG_HID_EMS_FF=m
+ CONFIG_HID_ELECOM=m
+ CONFIG_HID_ELO=m
+ CONFIG_HID_EZKEY=m
++CONFIG_HID_GEMBIRD=m
+ CONFIG_HID_HOLTEK=m
+ CONFIG_HID_KEYTOUCH=m
+ CONFIG_HID_KYE=m
+++ /dev/null
-From 7e5bbf1a74ec6bbaa25fe6cadf715946e3e4d692 Mon Sep 17 00:00:00 2001
-From: Ingo Kresse <ingo.kresse@gmail.com>
-Date: Fri, 29 Jul 2016 22:50:21 +0000
-Subject: [PATCH] fix auto-sense in lirc_rpi driver
-
-On a Raspberry Pi 2, the lirc_rpi driver might receive spurious
-interrupts and change it's low-active / high-active setting.
-When this happens, the IR remote control stops working.
-
-This patch disables this auto-detection if the 'sense' parameter
-was set in the device tree, making the driver robust to such
-spurious interrupts.
----
- drivers/staging/media/lirc/lirc_rpi.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/staging/media/lirc/lirc_rpi.c
-+++ b/drivers/staging/media/lirc/lirc_rpi.c
-@@ -79,6 +79,7 @@ static bool invert = 0;
-
- struct gpio_chip *gpiochip;
- static int irq_num;
-+static int auto_sense = 1;
-
- /* forward declarations */
- static long send_pulse(unsigned long length);
-@@ -279,7 +280,9 @@ static irqreturn_t irq_handler(int i, vo
- * detecting pulse while this
- * MUST be a space!
- */
-- sense = sense ? 0 : 1;
-+ if (auto_sense) {
-+ sense = sense ? 0 : 1;
-+ }
- }
- } else {
- data = (int) (deltv*1000000 +
-@@ -417,6 +420,7 @@ static int init_port(void)
- printk(KERN_INFO LIRC_DRIVER_NAME
- ": manually using active %s receiver on GPIO pin %d\n",
- sense ? "low" : "high", gpio_in_pin);
-+ auto_sense = 0;
- }
-
- return 0;
--- /dev/null
+From 1a770fa3b51e674ba573628b1ad08153d9dbc39b Mon Sep 17 00:00:00 2001
+From: "Daniel Matuschek (HiFiBerry)" <daniel@hifiberry.com>
+Date: Tue, 26 Jul 2016 19:16:25 +0200
+Subject: [PATCH] Added HiFiBerry Digi+ Pro driver
+
+Signed-off-by: Daniel Matuschek <daniel@hifiberry.com>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 8 +++-
+ .../dts/overlays/hifiberry-digi-pro-overlay.dts | 41 +++++++++++++++++
+ sound/soc/bcm/hifiberry_digi.c | 51 ++++++++++++++++++++++
+ 4 files changed, 100 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -31,6 +31,7 @@ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-amp
+ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dac.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dacplus.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi-pro.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -377,11 +377,17 @@ Params: 24db_digital_gain Allow ga
+
+
+ Name: hifiberry-digi
+-Info: Configures the HifiBerry Digi audio card
++Info: Configures the HifiBerry Digi and Digi+ audio card
+ Load: dtoverlay=hifiberry-digi
+ Params: <None>
+
+
++Name: hifiberry-digi-pro
++Info: Configures the HifiBerry Digi+ Pro audio card
++Load: dtoverlay=hifiberry-digi-pro
++Params: <None>
++
++
+ Name: hy28a
+ Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
+ Default values match Texy's display shield
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
+@@ -0,0 +1,41 @@
++// Definitions for HiFiBerry Digi Pro
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ wm8804@3b {
++ #sound-dai-cells = <0>;
++ compatible = "wlf,wm8804";
++ reg = <0x3b>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "hifiberry,hifiberry-digi";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ clock44-gpio = <&gpio 5 0>;
++ clock48-gpio = <&gpio 6 0>;
++ };
++ };
++};
+--- a/sound/soc/bcm/hifiberry_digi.c
++++ b/sound/soc/bcm/hifiberry_digi.c
+@@ -23,6 +23,7 @@
+ #include <sound/pcm_params.h>
+ #include <sound/soc.h>
+ #include <sound/jack.h>
++#include <linux/gpio/consumer.h>
+
+ #include "../codecs/wm8804.h"
+
+@@ -30,9 +31,34 @@ static short int auto_shutdown_output =
+ module_param(auto_shutdown_output, short, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
+ MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped");
+
++#define CLK_44EN_RATE 22579200UL
++#define CLK_48EN_RATE 24576000UL
++
++static bool snd_rpi_hifiberry_is_digipro;
++static struct gpio_desc *snd_rpi_hifiberry_clk44gpio;
++static struct gpio_desc *snd_rpi_hifiberry_clk48gpio;
+
+ static int samplerate=44100;
+
++static uint32_t snd_rpi_hifiberry_digi_enable_clock(int sample_rate)
++{
++ switch (sample_rate) {
++ case 11025:
++ case 22050:
++ case 44100:
++ case 88200:
++ case 176400:
++ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk44gpio, 1);
++ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk48gpio, 0);
++ return CLK_44EN_RATE;
++ default:
++ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk48gpio, 1);
++ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk44gpio, 0);
++ return CLK_48EN_RATE;
++ }
++}
++
++
+ static int snd_rpi_hifiberry_digi_init(struct snd_soc_pcm_runtime *rtd)
+ {
+ struct snd_soc_codec *codec = rtd->codec;
+@@ -40,6 +66,14 @@ static int snd_rpi_hifiberry_digi_init(s
+ /* enable TX output */
+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
+
++ /* Initialize Digi+ Pro hardware */
++ if (snd_rpi_hifiberry_is_digipro) {
++ struct snd_soc_dai_link *dai = rtd->dai_link;
++
++ dai->name = "HiFiBerry Digi+ Pro";
++ dai->stream_name = "HiFiBerry Digi+ Pro HiFi";
++ }
++
+ return 0;
+ }
+
+@@ -87,6 +121,9 @@ static int snd_rpi_hifiberry_digi_hw_par
+ mclk_freq=samplerate*128;
+ mclk_div=WM8804_MCLKDIV_128FS;
+ }
++
++ if (snd_rpi_hifiberry_is_digipro)
++ sysclk = snd_rpi_hifiberry_digi_enable_clock(samplerate);
+
+ switch (samplerate) {
+ case 32000:
+@@ -121,6 +158,7 @@ static int snd_rpi_hifiberry_digi_hw_par
+
+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
+ sysclk, SND_SOC_CLOCK_OUT);
++
+ if (ret < 0) {
+ dev_err(codec->dev,
+ "Failed to set WM8804 SYSCLK: %d\n", ret);
+@@ -187,6 +225,19 @@ static int snd_rpi_hifiberry_digi_probe(
+ dai->platform_name = NULL;
+ dai->platform_of_node = i2s_node;
+ }
++
++ snd_rpi_hifiberry_is_digipro = 1;
++
++ snd_rpi_hifiberry_clk44gpio =
++ devm_gpiod_get(&pdev->dev, "clock44", GPIOD_OUT_LOW);
++ if (IS_ERR(snd_rpi_hifiberry_clk44gpio))
++ snd_rpi_hifiberry_is_digipro = 0;
++
++ snd_rpi_hifiberry_clk48gpio =
++ devm_gpiod_get(&pdev->dev, "clock48", GPIOD_OUT_LOW);
++ if (IS_ERR(snd_rpi_hifiberry_clk48gpio))
++ snd_rpi_hifiberry_is_digipro = 0;
++
+ }
+
+ ret = snd_soc_register_card(&snd_rpi_hifiberry_digi);
+++ /dev/null
-From 71a05d081ab744650deae9bc9008739ad16581f5 Mon Sep 17 00:00:00 2001
-From: Jools Wills <buzz@exotica.org.uk>
-Date: Mon, 8 Aug 2016 11:04:29 +0100
-Subject: [PATCH] enable gembird joypad support
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -891,6 +891,7 @@ CONFIG_HID_EMS_FF=m
- CONFIG_HID_ELECOM=m
- CONFIG_HID_ELO=m
- CONFIG_HID_EZKEY=m
-+CONFIG_HID_GEMBIRD=m
- CONFIG_HID_HOLTEK=m
- CONFIG_HID_KEYTOUCH=m
- CONFIG_HID_KYE=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -883,6 +883,7 @@ CONFIG_HID_EMS_FF=m
- CONFIG_HID_ELECOM=m
- CONFIG_HID_ELO=m
- CONFIG_HID_EZKEY=m
-+CONFIG_HID_GEMBIRD=m
- CONFIG_HID_HOLTEK=m
- CONFIG_HID_KEYTOUCH=m
- CONFIG_HID_KYE=m
+++ /dev/null
-From e528c5d3f8cffca37abf9c69f7178f0221974225 Mon Sep 17 00:00:00 2001
-From: "Daniel Matuschek (HiFiBerry)" <daniel@hifiberry.com>
-Date: Tue, 26 Jul 2016 19:16:25 +0200
-Subject: [PATCH] Added HiFiBerry Digi+ Pro driver
-
-Signed-off-by: Daniel Matuschek <daniel@hifiberry.com>
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 8 +++-
- .../dts/overlays/hifiberry-digi-pro-overlay.dts | 41 +++++++++++++++++
- sound/soc/bcm/hifiberry_digi.c | 51 ++++++++++++++++++++++
- 4 files changed, 100 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -31,6 +31,7 @@ dtbo-$(RPI_DT_OVERLAYS) += hifiberry-amp
- dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dac.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hifiberry-dacplus.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += hifiberry-digi-pro.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28a.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += hy28b.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += i2c-gpio.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -377,11 +377,17 @@ Params: 24db_digital_gain Allow ga
-
-
- Name: hifiberry-digi
--Info: Configures the HifiBerry Digi audio card
-+Info: Configures the HifiBerry Digi and Digi+ audio card
- Load: dtoverlay=hifiberry-digi
- Params: <None>
-
-
-+Name: hifiberry-digi-pro
-+Info: Configures the HifiBerry Digi+ Pro audio card
-+Load: dtoverlay=hifiberry-digi-pro
-+Params: <None>
-+
-+
- Name: hy28a
- Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
- Default values match Texy's display shield
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
-@@ -0,0 +1,41 @@
-+// Definitions for HiFiBerry Digi Pro
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&i2s>;
-+ __overlay__ {
-+ status = "okay";
-+ };
-+ };
-+
-+ fragment@1 {
-+ target = <&i2c1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ wm8804@3b {
-+ #sound-dai-cells = <0>;
-+ compatible = "wlf,wm8804";
-+ reg = <0x3b>;
-+ status = "okay";
-+ };
-+ };
-+ };
-+
-+ fragment@2 {
-+ target = <&sound>;
-+ __overlay__ {
-+ compatible = "hifiberry,hifiberry-digi";
-+ i2s-controller = <&i2s>;
-+ status = "okay";
-+ clock44-gpio = <&gpio 5 0>;
-+ clock48-gpio = <&gpio 6 0>;
-+ };
-+ };
-+};
---- a/sound/soc/bcm/hifiberry_digi.c
-+++ b/sound/soc/bcm/hifiberry_digi.c
-@@ -23,6 +23,7 @@
- #include <sound/pcm_params.h>
- #include <sound/soc.h>
- #include <sound/jack.h>
-+#include <linux/gpio/consumer.h>
-
- #include "../codecs/wm8804.h"
-
-@@ -30,9 +31,34 @@ static short int auto_shutdown_output =
- module_param(auto_shutdown_output, short, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
- MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped");
-
-+#define CLK_44EN_RATE 22579200UL
-+#define CLK_48EN_RATE 24576000UL
-+
-+static bool snd_rpi_hifiberry_is_digipro;
-+static struct gpio_desc *snd_rpi_hifiberry_clk44gpio;
-+static struct gpio_desc *snd_rpi_hifiberry_clk48gpio;
-
- static int samplerate=44100;
-
-+static uint32_t snd_rpi_hifiberry_digi_enable_clock(int sample_rate)
-+{
-+ switch (sample_rate) {
-+ case 11025:
-+ case 22050:
-+ case 44100:
-+ case 88200:
-+ case 176400:
-+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk44gpio, 1);
-+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk48gpio, 0);
-+ return CLK_44EN_RATE;
-+ default:
-+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk48gpio, 1);
-+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk44gpio, 0);
-+ return CLK_48EN_RATE;
-+ }
-+}
-+
-+
- static int snd_rpi_hifiberry_digi_init(struct snd_soc_pcm_runtime *rtd)
- {
- struct snd_soc_codec *codec = rtd->codec;
-@@ -40,6 +66,14 @@ static int snd_rpi_hifiberry_digi_init(s
- /* enable TX output */
- snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0);
-
-+ /* Initialize Digi+ Pro hardware */
-+ if (snd_rpi_hifiberry_is_digipro) {
-+ struct snd_soc_dai_link *dai = rtd->dai_link;
-+
-+ dai->name = "HiFiBerry Digi+ Pro";
-+ dai->stream_name = "HiFiBerry Digi+ Pro HiFi";
-+ }
-+
- return 0;
- }
-
-@@ -87,6 +121,9 @@ static int snd_rpi_hifiberry_digi_hw_par
- mclk_freq=samplerate*128;
- mclk_div=WM8804_MCLKDIV_128FS;
- }
-+
-+ if (snd_rpi_hifiberry_is_digipro)
-+ sysclk = snd_rpi_hifiberry_digi_enable_clock(samplerate);
-
- switch (samplerate) {
- case 32000:
-@@ -121,6 +158,7 @@ static int snd_rpi_hifiberry_digi_hw_par
-
- ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL,
- sysclk, SND_SOC_CLOCK_OUT);
-+
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to set WM8804 SYSCLK: %d\n", ret);
-@@ -187,6 +225,19 @@ static int snd_rpi_hifiberry_digi_probe(
- dai->platform_name = NULL;
- dai->platform_of_node = i2s_node;
- }
-+
-+ snd_rpi_hifiberry_is_digipro = 1;
-+
-+ snd_rpi_hifiberry_clk44gpio =
-+ devm_gpiod_get(&pdev->dev, "clock44", GPIOD_OUT_LOW);
-+ if (IS_ERR(snd_rpi_hifiberry_clk44gpio))
-+ snd_rpi_hifiberry_is_digipro = 0;
-+
-+ snd_rpi_hifiberry_clk48gpio =
-+ devm_gpiod_get(&pdev->dev, "clock48", GPIOD_OUT_LOW);
-+ if (IS_ERR(snd_rpi_hifiberry_clk48gpio))
-+ snd_rpi_hifiberry_is_digipro = 0;
-+
- }
-
- ret = snd_soc_register_card(&snd_rpi_hifiberry_digi);
--- /dev/null
+From 3dbdbeedb865d12700dae53b59e259ea083e6186 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 1 Jun 2016 12:05:35 -0700
+Subject: [PATCH] clk: bcm2835: Mark the CM SDRAM clock's parent as critical
+
+While the SDRAM is being driven by its dedicated PLL most of the time,
+there is a little loop running in the firmware that periodically turns
+on the CM SDRAM clock (using its pre-initialized parent) and switches
+SDRAM to using the CM clock to do PVT recalibration.
+
+This avoids system hangs if we choose SDRAM's parent for some other
+clock, then disable that clock.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/clk/bcm/clk-bcm2835.c | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -36,6 +36,7 @@
+
+ #include <linux/clk-provider.h>
+ #include <linux/clkdev.h>
++#include <linux/clk.h>
+ #include <linux/clk/bcm2835.h>
+ #include <linux/debugfs.h>
+ #include <linux/module.h>
+@@ -1839,6 +1840,25 @@ static const struct bcm2835_clk_desc clk
+ .ctl_reg = CM_PERIICTL),
+ };
+
++/*
++ * Permanently take a reference on the parent of the SDRAM clock.
++ *
++ * While the SDRAM is being driven by its dedicated PLL most of the
++ * time, there is a little loop running in the firmware that
++ * periodically switches the SDRAM to using our CM clock to do PVT
++ * recalibration, with the assumption that the previously configured
++ * SDRAM parent is still enabled and running.
++ */
++static int bcm2835_mark_sdc_parent_critical(struct clk *sdc)
++{
++ struct clk *parent = clk_get_parent(sdc);
++
++ if (IS_ERR(parent))
++ return PTR_ERR(parent);
++
++ return clk_prepare_enable(parent);
++}
++
+ static int bcm2835_clk_probe(struct platform_device *pdev)
+ {
+ struct device *dev = &pdev->dev;
+@@ -1848,6 +1868,7 @@ static int bcm2835_clk_probe(struct plat
+ const struct bcm2835_clk_desc *desc;
+ const size_t asize = ARRAY_SIZE(clk_desc_array);
+ size_t i;
++ int ret;
+
+ cprman = devm_kzalloc(dev,
+ sizeof(*cprman) + asize * sizeof(*clks),
+@@ -1878,6 +1899,10 @@ static int bcm2835_clk_probe(struct plat
+ clks[i] = desc->clk_register(cprman, desc->data);
+ }
+
++ ret = bcm2835_mark_sdc_parent_critical(clks[BCM2835_CLOCK_SDRAM]);
++ if (ret)
++ return ret;
++
+ return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
+ &cprman->onecell);
+ }
--- /dev/null
+From bf239659e82c137de23c322fa852b24a0acd3156 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 31 Mar 2016 12:51:04 -0700
+Subject: [PATCH] clk: bcm2835: Don't rate change PLLs on behalf of dividers.
+
+Our core PLLs are intended to be configured once and left alone. With
+the flag set, asking to set the PLLD_DSI1 clock rate would change PLLD
+just to get closer to the requested DSI clock, thus changing PLLD_PER,
+the UART and ethernet PHY clock rates downstream of it, and breaking
+ethernet.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/clk/bcm/clk-bcm2835.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -1209,7 +1209,7 @@ bcm2835_register_pll_divider(struct bcm2
+ init.num_parents = 1;
+ init.name = divider_name;
+ init.ops = &bcm2835_pll_divider_clk_ops;
+- init.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED;
++ init.flags = CLK_IGNORE_UNUSED;
+
+ divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL);
+ if (!divider)
+++ /dev/null
-From a916fdb4aef02300a69cb49fb20f36ab4dc91673 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 1 Jun 2016 12:05:35 -0700
-Subject: [PATCH] clk: bcm2835: Mark the CM SDRAM clock's parent as critical
-
-While the SDRAM is being driven by its dedicated PLL most of the time,
-there is a little loop running in the firmware that periodically turns
-on the CM SDRAM clock (using its pre-initialized parent) and switches
-SDRAM to using the CM clock to do PVT recalibration.
-
-This avoids system hangs if we choose SDRAM's parent for some other
-clock, then disable that clock.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -36,6 +36,7 @@
-
- #include <linux/clk-provider.h>
- #include <linux/clkdev.h>
-+#include <linux/clk.h>
- #include <linux/clk/bcm2835.h>
- #include <linux/debugfs.h>
- #include <linux/module.h>
-@@ -1839,6 +1840,25 @@ static const struct bcm2835_clk_desc clk
- .ctl_reg = CM_PERIICTL),
- };
-
-+/*
-+ * Permanently take a reference on the parent of the SDRAM clock.
-+ *
-+ * While the SDRAM is being driven by its dedicated PLL most of the
-+ * time, there is a little loop running in the firmware that
-+ * periodically switches the SDRAM to using our CM clock to do PVT
-+ * recalibration, with the assumption that the previously configured
-+ * SDRAM parent is still enabled and running.
-+ */
-+static int bcm2835_mark_sdc_parent_critical(struct clk *sdc)
-+{
-+ struct clk *parent = clk_get_parent(sdc);
-+
-+ if (IS_ERR(parent))
-+ return PTR_ERR(parent);
-+
-+ return clk_prepare_enable(parent);
-+}
-+
- static int bcm2835_clk_probe(struct platform_device *pdev)
- {
- struct device *dev = &pdev->dev;
-@@ -1848,6 +1868,7 @@ static int bcm2835_clk_probe(struct plat
- const struct bcm2835_clk_desc *desc;
- const size_t asize = ARRAY_SIZE(clk_desc_array);
- size_t i;
-+ int ret;
-
- cprman = devm_kzalloc(dev,
- sizeof(*cprman) + asize * sizeof(*clks),
-@@ -1878,6 +1899,10 @@ static int bcm2835_clk_probe(struct plat
- clks[i] = desc->clk_register(cprman, desc->data);
- }
-
-+ ret = bcm2835_mark_sdc_parent_critical(clks[BCM2835_CLOCK_SDRAM]);
-+ if (ret)
-+ return ret;
-+
- return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
- &cprman->onecell);
- }
--- /dev/null
+From 332b2ceea539c6dc84d7478aa89f96317060e7f9 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 14 Apr 2016 15:13:53 -0700
+Subject: [PATCH] clk: bcm2835: Do appropriate name lookups for DSI1's parents
+ as well.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ .../bindings/clock/brcm,bcm2835-cprman.txt | 12 ++++-
+ drivers/clk/bcm/clk-bcm2835.c | 54 +++++++++++++++++-----
+ 2 files changed, 54 insertions(+), 12 deletions(-)
+
+--- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
++++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
+@@ -16,7 +16,17 @@ Required properties:
+ - #clock-cells: Should be <1>. The permitted clock-specifier values can be
+ found in include/dt-bindings/clock/bcm2835.h
+ - reg: Specifies base physical address and size of the registers
+-- clocks: The external oscillator clock phandle
++- clocks: phandles to the parent clocks used as input to the module, in
++ the following order:
++
++ - External oscillator
++ - DSI1 byte clock
++ - DSI1 DDR2 clock
++ - DSI1 DDR clock
++
++ Only external oscillator is required. The DSI clocks may
++ not be present, in which case their children will be
++ unusable.
+
+ Example:
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -297,11 +297,29 @@
+ #define LOCK_TIMEOUT_NS 100000000
+ #define BCM2835_MAX_FB_RATE 1750000000u
+
++/*
++ * Names of clocks used within the driver that need to be replaced
++ * with an external parent's name. This array is in the order that
++ * the clocks node in the DT references external clocks.
++ */
++static const char *cprman_parent_names[] = {
++ "xosc",
++ "dsi1_byte",
++ "dsi1_ddr2",
++ "dsi1_ddr",
++};
++
+ struct bcm2835_cprman {
+ struct device *dev;
+ void __iomem *regs;
+ spinlock_t regs_lock; /* spinlock for all clocks */
+- const char *osc_name;
++
++ /*
++ * Real names of cprman clock parents looked up through
++ * of_clk_get_parent_name(), which will be used in the
++ * parent_names[] arrays for clock registration.
++ */
++ const char *real_parent_names[ARRAY_SIZE(cprman_parent_names)];
+
+ struct clk_onecell_data onecell;
+ struct clk *clks[];
+@@ -1168,7 +1186,7 @@ static struct clk *bcm2835_register_pll(
+ memset(&init, 0, sizeof(init));
+
+ /* All of the PLLs derive from the external oscillator. */
+- init.parent_names = &cprman->osc_name;
++ init.parent_names = &cprman->real_parent_names[0];
+ init.num_parents = 1;
+ init.name = data->name;
+ init.ops = &bcm2835_pll_clk_ops;
+@@ -1251,17 +1269,21 @@ static struct clk *bcm2835_register_cloc
+ struct bcm2835_clock *clock;
+ struct clk_init_data init;
+ const char *parents[1 << CM_SRC_BITS];
+- size_t i;
++ size_t i, j;
+
+ /*
+- * Replace our "xosc" references with the oscillator's
+- * actual name.
++ * Replace our strings referencing parent clocks with the
++ * actual clock-output-name of the parent.
+ */
+ for (i = 0; i < data->num_mux_parents; i++) {
+- if (strcmp(data->parents[i], "xosc") == 0)
+- parents[i] = cprman->osc_name;
+- else
+- parents[i] = data->parents[i];
++ parents[i] = data->parents[i];
++
++ for (j = 0; j < ARRAY_SIZE(cprman_parent_names); j++) {
++ if (strcmp(parents[i], cprman_parent_names[j]) == 0) {
++ parents[i] = cprman->real_parent_names[j];
++ break;
++ }
++ }
+ }
+
+ memset(&init, 0, sizeof(init));
+@@ -1883,8 +1905,18 @@ static int bcm2835_clk_probe(struct plat
+ if (IS_ERR(cprman->regs))
+ return PTR_ERR(cprman->regs);
+
+- cprman->osc_name = of_clk_get_parent_name(dev->of_node, 0);
+- if (!cprman->osc_name)
++ for (i = 0; i < ARRAY_SIZE(cprman_parent_names); i++) {
++ cprman->real_parent_names[i] =
++ of_clk_get_parent_name(dev->of_node, i);
++ }
++ /*
++ * Make sure the external oscillator has been registered.
++ *
++ * The other (DSI) clocks are not present on older device
++ * trees, which we still need to support for backwards
++ * compatibility.
++ */
++ if (!cprman->real_parent_names[0])
+ return -ENODEV;
+
+ platform_set_drvdata(pdev, cprman);
+++ /dev/null
-From 523bd5057f674fec3006af36a1aaca2480cb09c6 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 31 Mar 2016 12:51:04 -0700
-Subject: [PATCH] clk: bcm2835: Don't rate change PLLs on behalf of dividers.
-
-Our core PLLs are intended to be configured once and left alone. With
-the flag set, asking to set the PLLD_DSI1 clock rate would change PLLD
-just to get closer to the requested DSI clock, thus changing PLLD_PER,
-the UART and ethernet PHY clock rates downstream of it, and breaking
-ethernet.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -1209,7 +1209,7 @@ bcm2835_register_pll_divider(struct bcm2
- init.num_parents = 1;
- init.name = divider_name;
- init.ops = &bcm2835_pll_divider_clk_ops;
-- init.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED;
-+ init.flags = CLK_IGNORE_UNUSED;
-
- divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL);
- if (!divider)
--- /dev/null
+From 105aa2411add3d0d8bb815109e4a6fb6c778a1d2 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 14 Apr 2016 19:00:33 -0700
+Subject: [PATCH] clk: bcm2835: Add an enum for the DSI1 pixel clock.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/clk/bcm/clk-bcm2835.c | 39 +++++++++++++++++++++++++++++++++++--
+ include/dt-bindings/clock/bcm2835.h | 1 +
+ 2 files changed, 38 insertions(+), 2 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -934,6 +934,9 @@ static long bcm2835_clock_rate_from_divi
+ const struct bcm2835_clock_data *data = clock->data;
+ u64 temp;
+
++ if (data->int_bits == 0 && data->frac_bits == 0)
++ return parent_rate;
++
+ /*
+ * The divisor is a 12.12 fixed point field, but only some of
+ * the bits are populated in any given clock.
+@@ -957,7 +960,12 @@ static unsigned long bcm2835_clock_get_r
+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
+ struct bcm2835_cprman *cprman = clock->cprman;
+ const struct bcm2835_clock_data *data = clock->data;
+- u32 div = cprman_read(cprman, data->div_reg);
++ u32 div;
++
++ if (data->int_bits == 0 && data->frac_bits == 0)
++ return parent_rate;
++
++ div = cprman_read(cprman, data->div_reg);
+
+ return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
+ }
+@@ -1403,6 +1411,28 @@ static const char *const bcm2835_clock_v
+ __VA_ARGS__)
+
+ /*
++ * DSI1 parent clocks. The DSI1 byte clock comes from the DSI1 PHY,
++ * which in turn sources from plld_dsi1.
++ */
++static const char *const bcm2835_clock_dsi1_parents[] = {
++ "gnd",
++ "xosc",
++ "testdebug0",
++ "testdebug1",
++ "dsi1_ddr",
++ "dsi1_ddr_inv",
++ "dsi1_ddr2",
++ "dsi1_ddr2_inv",
++ "dsi1_byte",
++ "dsi1_byte_inv",
++};
++
++#define REGISTER_DSI1_CLK(...) REGISTER_CLK( \
++ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_dsi1_parents), \
++ .parents = bcm2835_clock_dsi1_parents, \
++ __VA_ARGS__)
++
++/*
+ * the real definition of all the pll, pll_dividers and clocks
+ * these make use of the above REGISTER_* macros
+ */
+@@ -1847,7 +1877,12 @@ static const struct bcm2835_clk_desc clk
+ .div_reg = CM_DSI1EDIV,
+ .int_bits = 4,
+ .frac_bits = 8),
+-
++ [BCM2835_CLOCK_DSI1P] = REGISTER_DSI1_CLK(
++ .name = "dsi1p",
++ .ctl_reg = CM_DSI1PCTL,
++ .div_reg = CM_DSI1PDIV,
++ .int_bits = 0,
++ .frac_bits = 0),
+ /* the gates */
+
+ /*
+--- a/include/dt-bindings/clock/bcm2835.h
++++ b/include/dt-bindings/clock/bcm2835.h
+@@ -64,3 +64,4 @@
+ #define BCM2835_CLOCK_CAM1 46
+ #define BCM2835_CLOCK_DSI0E 47
+ #define BCM2835_CLOCK_DSI1E 48
++#define BCM2835_CLOCK_DSI1P 49
+++ /dev/null
-From b0fde8ea889e47505e4112d89da4be9469a37775 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 14 Apr 2016 15:13:53 -0700
-Subject: [PATCH] clk: bcm2835: Do appropriate name lookups for DSI1's parents
- as well.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- .../bindings/clock/brcm,bcm2835-cprman.txt | 12 ++++-
- drivers/clk/bcm/clk-bcm2835.c | 54 +++++++++++++++++-----
- 2 files changed, 54 insertions(+), 12 deletions(-)
-
---- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
-+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt
-@@ -16,7 +16,17 @@ Required properties:
- - #clock-cells: Should be <1>. The permitted clock-specifier values can be
- found in include/dt-bindings/clock/bcm2835.h
- - reg: Specifies base physical address and size of the registers
--- clocks: The external oscillator clock phandle
-+- clocks: phandles to the parent clocks used as input to the module, in
-+ the following order:
-+
-+ - External oscillator
-+ - DSI1 byte clock
-+ - DSI1 DDR2 clock
-+ - DSI1 DDR clock
-+
-+ Only external oscillator is required. The DSI clocks may
-+ not be present, in which case their children will be
-+ unusable.
-
- Example:
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -297,11 +297,29 @@
- #define LOCK_TIMEOUT_NS 100000000
- #define BCM2835_MAX_FB_RATE 1750000000u
-
-+/*
-+ * Names of clocks used within the driver that need to be replaced
-+ * with an external parent's name. This array is in the order that
-+ * the clocks node in the DT references external clocks.
-+ */
-+static const char *cprman_parent_names[] = {
-+ "xosc",
-+ "dsi1_byte",
-+ "dsi1_ddr2",
-+ "dsi1_ddr",
-+};
-+
- struct bcm2835_cprman {
- struct device *dev;
- void __iomem *regs;
- spinlock_t regs_lock; /* spinlock for all clocks */
-- const char *osc_name;
-+
-+ /*
-+ * Real names of cprman clock parents looked up through
-+ * of_clk_get_parent_name(), which will be used in the
-+ * parent_names[] arrays for clock registration.
-+ */
-+ const char *real_parent_names[ARRAY_SIZE(cprman_parent_names)];
-
- struct clk_onecell_data onecell;
- struct clk *clks[];
-@@ -1168,7 +1186,7 @@ static struct clk *bcm2835_register_pll(
- memset(&init, 0, sizeof(init));
-
- /* All of the PLLs derive from the external oscillator. */
-- init.parent_names = &cprman->osc_name;
-+ init.parent_names = &cprman->real_parent_names[0];
- init.num_parents = 1;
- init.name = data->name;
- init.ops = &bcm2835_pll_clk_ops;
-@@ -1251,17 +1269,21 @@ static struct clk *bcm2835_register_cloc
- struct bcm2835_clock *clock;
- struct clk_init_data init;
- const char *parents[1 << CM_SRC_BITS];
-- size_t i;
-+ size_t i, j;
-
- /*
-- * Replace our "xosc" references with the oscillator's
-- * actual name.
-+ * Replace our strings referencing parent clocks with the
-+ * actual clock-output-name of the parent.
- */
- for (i = 0; i < data->num_mux_parents; i++) {
-- if (strcmp(data->parents[i], "xosc") == 0)
-- parents[i] = cprman->osc_name;
-- else
-- parents[i] = data->parents[i];
-+ parents[i] = data->parents[i];
-+
-+ for (j = 0; j < ARRAY_SIZE(cprman_parent_names); j++) {
-+ if (strcmp(parents[i], cprman_parent_names[j]) == 0) {
-+ parents[i] = cprman->real_parent_names[j];
-+ break;
-+ }
-+ }
- }
-
- memset(&init, 0, sizeof(init));
-@@ -1883,8 +1905,18 @@ static int bcm2835_clk_probe(struct plat
- if (IS_ERR(cprman->regs))
- return PTR_ERR(cprman->regs);
-
-- cprman->osc_name = of_clk_get_parent_name(dev->of_node, 0);
-- if (!cprman->osc_name)
-+ for (i = 0; i < ARRAY_SIZE(cprman_parent_names); i++) {
-+ cprman->real_parent_names[i] =
-+ of_clk_get_parent_name(dev->of_node, i);
-+ }
-+ /*
-+ * Make sure the external oscillator has been registered.
-+ *
-+ * The other (DSI) clocks are not present on older device
-+ * trees, which we still need to support for backwards
-+ * compatibility.
-+ */
-+ if (!cprman->real_parent_names[0])
- return -ENODEV;
-
- platform_set_drvdata(pdev, cprman);
+++ /dev/null
-From 719dcb9b9bc907dafeb20fbbf4895f928dafa353 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 14 Apr 2016 19:00:33 -0700
-Subject: [PATCH] clk: bcm2835: Add an enum for the DSI1 pixel clock.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/clk/bcm/clk-bcm2835.c | 39 +++++++++++++++++++++++++++++++++++--
- include/dt-bindings/clock/bcm2835.h | 1 +
- 2 files changed, 38 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/bcm/clk-bcm2835.c
-+++ b/drivers/clk/bcm/clk-bcm2835.c
-@@ -934,6 +934,9 @@ static long bcm2835_clock_rate_from_divi
- const struct bcm2835_clock_data *data = clock->data;
- u64 temp;
-
-+ if (data->int_bits == 0 && data->frac_bits == 0)
-+ return parent_rate;
-+
- /*
- * The divisor is a 12.12 fixed point field, but only some of
- * the bits are populated in any given clock.
-@@ -957,7 +960,12 @@ static unsigned long bcm2835_clock_get_r
- struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw);
- struct bcm2835_cprman *cprman = clock->cprman;
- const struct bcm2835_clock_data *data = clock->data;
-- u32 div = cprman_read(cprman, data->div_reg);
-+ u32 div;
-+
-+ if (data->int_bits == 0 && data->frac_bits == 0)
-+ return parent_rate;
-+
-+ div = cprman_read(cprman, data->div_reg);
-
- return bcm2835_clock_rate_from_divisor(clock, parent_rate, div);
- }
-@@ -1403,6 +1411,28 @@ static const char *const bcm2835_clock_v
- __VA_ARGS__)
-
- /*
-+ * DSI1 parent clocks. The DSI1 byte clock comes from the DSI1 PHY,
-+ * which in turn sources from plld_dsi1.
-+ */
-+static const char *const bcm2835_clock_dsi1_parents[] = {
-+ "gnd",
-+ "xosc",
-+ "testdebug0",
-+ "testdebug1",
-+ "dsi1_ddr",
-+ "dsi1_ddr_inv",
-+ "dsi1_ddr2",
-+ "dsi1_ddr2_inv",
-+ "dsi1_byte",
-+ "dsi1_byte_inv",
-+};
-+
-+#define REGISTER_DSI1_CLK(...) REGISTER_CLK( \
-+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_dsi1_parents), \
-+ .parents = bcm2835_clock_dsi1_parents, \
-+ __VA_ARGS__)
-+
-+/*
- * the real definition of all the pll, pll_dividers and clocks
- * these make use of the above REGISTER_* macros
- */
-@@ -1847,7 +1877,12 @@ static const struct bcm2835_clk_desc clk
- .div_reg = CM_DSI1EDIV,
- .int_bits = 4,
- .frac_bits = 8),
--
-+ [BCM2835_CLOCK_DSI1P] = REGISTER_DSI1_CLK(
-+ .name = "dsi1p",
-+ .ctl_reg = CM_DSI1PCTL,
-+ .div_reg = CM_DSI1PDIV,
-+ .int_bits = 0,
-+ .frac_bits = 0),
- /* the gates */
-
- /*
---- a/include/dt-bindings/clock/bcm2835.h
-+++ b/include/dt-bindings/clock/bcm2835.h
-@@ -64,3 +64,4 @@
- #define BCM2835_CLOCK_CAM1 46
- #define BCM2835_CLOCK_DSI0E 47
- #define BCM2835_CLOCK_DSI1E 48
-+#define BCM2835_CLOCK_DSI1P 49
--- /dev/null
+From f63b6059c6129d81d3fc85b02d9b83b85023c437 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@free-electrons.com>
+Date: Thu, 14 Jan 2016 16:24:56 +0100
+Subject: [PATCH] drm/fb_cma_helper: Remove implicit call to
+ disable_unused_functions
+
+The drm_fbdev_cma_init function always calls the
+drm_helper_disable_unused_functions. Since it's part of the usual probe
+process, all the drivers using that helper will end up having their encoder
+and CRTC disable functions called at probe if their device has not been
+reported as enabled.
+
+This could be fixed by reading out from the registers the current state of
+the device if it is enabled, but even that will not handle the case where
+the device is actually disabled.
+
+Moreover, the drivers using the atomic modesetting expect that their enable
+and disable callback to be called when the device is already enabled or
+disabled (respectively).
+
+We can however fix this issue by moving the call to
+drm_helper_disable_unused_functions out of drm_fbdev_cma_init and make the
+drivers needing it (all the drivers calling drm_fbdev_cma_init and not
+using the atomic modesetting) explicitly call it.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1452785109-6172-14-git-send-email-maxime.ripard@free-electrons.com
+Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+(cherry picked from commit 4314e19ef4ae0ba8872bd8610f6fef5e8743e236)
+---
+ drivers/gpu/drm/drm_fb_cma_helper.c | 3 ---
+ drivers/gpu/drm/imx/imx-drm-core.c | 1 +
+ drivers/gpu/drm/sti/sti_drv.c | 1 +
+ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 +
+ 4 files changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/drm_fb_cma_helper.c
++++ b/drivers/gpu/drm/drm_fb_cma_helper.c
+@@ -348,9 +348,6 @@ struct drm_fbdev_cma *drm_fbdev_cma_init
+
+ }
+
+- /* disable all the possible outputs/crtcs before entering KMS mode */
+- drm_helper_disable_unused_functions(dev);
+-
+ ret = drm_fb_helper_initial_config(helper, preferred_bpp);
+ if (ret < 0) {
+ dev_err(dev->dev, "Failed to set initial hw configuration.\n");
+--- a/drivers/gpu/drm/imx/imx-drm-core.c
++++ b/drivers/gpu/drm/imx/imx-drm-core.c
+@@ -313,6 +313,7 @@ static int imx_drm_driver_load(struct dr
+ dev_warn(drm->dev, "Invalid legacyfb_depth. Defaulting to 16bpp\n");
+ legacyfb_depth = 16;
+ }
++ drm_helper_disable_unused_functions(drm);
+ imxdrm->fbhelper = drm_fbdev_cma_init(drm, legacyfb_depth,
+ drm->mode_config.num_crtc, MAX_CRTC);
+ if (IS_ERR(imxdrm->fbhelper)) {
+--- a/drivers/gpu/drm/sti/sti_drv.c
++++ b/drivers/gpu/drm/sti/sti_drv.c
+@@ -160,6 +160,7 @@ static int sti_load(struct drm_device *d
+
+ drm_mode_config_reset(dev);
+
++ drm_helper_disable_unused_functions(dev);
+ drm_fbdev_cma_init(dev, 32,
+ dev->mode_config.num_crtc,
+ dev->mode_config.num_connector);
+--- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
++++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
+@@ -294,6 +294,7 @@ static int tilcdc_load(struct drm_device
+ break;
+ }
+
++ drm_helper_disable_unused_functions(dev);
+ priv->fbdev = drm_fbdev_cma_init(dev, bpp,
+ dev->mode_config.num_crtc,
+ dev->mode_config.num_connector);
+++ /dev/null
-From 64eb54a20a8624412ba45bf453b8588e7e6a2c53 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Thu, 14 Jan 2016 16:24:56 +0100
-Subject: [PATCH] drm/fb_cma_helper: Remove implicit call to
- disable_unused_functions
-
-The drm_fbdev_cma_init function always calls the
-drm_helper_disable_unused_functions. Since it's part of the usual probe
-process, all the drivers using that helper will end up having their encoder
-and CRTC disable functions called at probe if their device has not been
-reported as enabled.
-
-This could be fixed by reading out from the registers the current state of
-the device if it is enabled, but even that will not handle the case where
-the device is actually disabled.
-
-Moreover, the drivers using the atomic modesetting expect that their enable
-and disable callback to be called when the device is already enabled or
-disabled (respectively).
-
-We can however fix this issue by moving the call to
-drm_helper_disable_unused_functions out of drm_fbdev_cma_init and make the
-drivers needing it (all the drivers calling drm_fbdev_cma_init and not
-using the atomic modesetting) explicitly call it.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1452785109-6172-14-git-send-email-maxime.ripard@free-electrons.com
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4314e19ef4ae0ba8872bd8610f6fef5e8743e236)
----
- drivers/gpu/drm/drm_fb_cma_helper.c | 3 ---
- drivers/gpu/drm/imx/imx-drm-core.c | 1 +
- drivers/gpu/drm/sti/sti_drv.c | 1 +
- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 +
- 4 files changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/drm_fb_cma_helper.c
-+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
-@@ -348,9 +348,6 @@ struct drm_fbdev_cma *drm_fbdev_cma_init
-
- }
-
-- /* disable all the possible outputs/crtcs before entering KMS mode */
-- drm_helper_disable_unused_functions(dev);
--
- ret = drm_fb_helper_initial_config(helper, preferred_bpp);
- if (ret < 0) {
- dev_err(dev->dev, "Failed to set initial hw configuration.\n");
---- a/drivers/gpu/drm/imx/imx-drm-core.c
-+++ b/drivers/gpu/drm/imx/imx-drm-core.c
-@@ -313,6 +313,7 @@ static int imx_drm_driver_load(struct dr
- dev_warn(drm->dev, "Invalid legacyfb_depth. Defaulting to 16bpp\n");
- legacyfb_depth = 16;
- }
-+ drm_helper_disable_unused_functions(drm);
- imxdrm->fbhelper = drm_fbdev_cma_init(drm, legacyfb_depth,
- drm->mode_config.num_crtc, MAX_CRTC);
- if (IS_ERR(imxdrm->fbhelper)) {
---- a/drivers/gpu/drm/sti/sti_drv.c
-+++ b/drivers/gpu/drm/sti/sti_drv.c
-@@ -160,6 +160,7 @@ static int sti_load(struct drm_device *d
-
- drm_mode_config_reset(dev);
-
-+ drm_helper_disable_unused_functions(dev);
- drm_fbdev_cma_init(dev, 32,
- dev->mode_config.num_crtc,
- dev->mode_config.num_connector);
---- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-@@ -294,6 +294,7 @@ static int tilcdc_load(struct drm_device
- break;
- }
-
-+ drm_helper_disable_unused_functions(dev);
- priv->fbdev = drm_fbdev_cma_init(dev, bpp,
- dev->mode_config.num_crtc,
- dev->mode_config.num_connector);
--- /dev/null
+From c430f79020084981d8cfeaee85caa1ee243919b6 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Tue, 9 Aug 2016 21:51:41 +0100
+Subject: [PATCH] overlays: Add assert_falling_edge to pps-gpio overlay
+
+See: https://github.com/raspberrypi/linux/issues/1590
+---
+ arch/arm/boot/dts/overlays/README | 2 ++
+ arch/arm/boot/dts/overlays/pps-gpio-overlay.dts | 1 +
+ 2 files changed, 3 insertions(+)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -797,6 +797,8 @@ Name: pps-gpio
+ Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
+ Load: dtoverlay=pps-gpio,<param>=<val>
+ Params: gpiopin Input GPIO (default "18")
++ assert_falling_edge When present, assert is indicated by a falling
++ edge, rather than by a rising edge
+
+
+ Name: pwm
+--- a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
++++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
+@@ -30,5 +30,6 @@
+ __overrides__ {
+ gpiopin = <&pps>,"gpios:4",
+ <&pps_pins>,"brcm,pins:0";
++ assert_falling_edge = <&pps>,"assert-falling-edge?";
+ };
+ };
--- /dev/null
+From f9d8003717adf713eb2835deec560e51ae0b410e Mon Sep 17 00:00:00 2001
+From: Takashi Iwai <tiwai@suse.de>
+Date: Tue, 2 Aug 2016 14:16:42 +0200
+Subject: [PATCH] drm/mipi-dsi: Unregister bus at exit
+
+This is a preliminary patch for building drm-mipi-dsi as a module.
+Add the module exit callback to unregister the bus properly.
+
+Suggested-by: Thierry Reding <treding@nvidia.com>
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/drm_mipi_dsi.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/drm_mipi_dsi.c
++++ b/drivers/gpu/drm/drm_mipi_dsi.c
+@@ -928,6 +928,12 @@ static int __init mipi_dsi_bus_init(void
+ }
+ postcore_initcall(mipi_dsi_bus_init);
+
++static void __exit mipi_dsi_bus_exit(void)
++{
++ bus_unregister(&mipi_dsi_bus_type);
++}
++module_exit(mipi_dsi_bus_exit);
++
+ MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
+ MODULE_DESCRIPTION("MIPI DSI Bus");
+ MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-From b90a1393b3bdffa88c8e8dfbdc2bec650a5f885e Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Tue, 9 Aug 2016 21:51:41 +0100
-Subject: [PATCH] overlays: Add assert_falling_edge to pps-gpio overlay
-
-See: https://github.com/raspberrypi/linux/issues/1590
----
- arch/arm/boot/dts/overlays/README | 2 ++
- arch/arm/boot/dts/overlays/pps-gpio-overlay.dts | 1 +
- 2 files changed, 3 insertions(+)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -797,6 +797,8 @@ Name: pps-gpio
- Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
- Load: dtoverlay=pps-gpio,<param>=<val>
- Params: gpiopin Input GPIO (default "18")
-+ assert_falling_edge When present, assert is indicated by a falling
-+ edge, rather than by a rising edge
-
-
- Name: pwm
---- a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
-@@ -30,5 +30,6 @@
- __overrides__ {
- gpiopin = <&pps>,"gpios:4",
- <&pps_pins>,"brcm,pins:0";
-+ assert_falling_edge = <&pps>,"assert-falling-edge?";
- };
- };
--- /dev/null
+From 723b9cf9501336d1bd66c67f6955ce2f09b81846 Mon Sep 17 00:00:00 2001
+From: Takashi Iwai <tiwai@suse.de>
+Date: Tue, 2 Aug 2016 14:16:43 +0200
+Subject: [PATCH] drm/mipi-dsi: Allow to build drm-mipi-dsi as a module
+
+The drm-mipi-dsi driver has been only built-in although this isn't
+strictly required to be so. Since it's referred by lots of DRM
+drivers nowadays, most of distro kernels include the driver as
+built-in as a result, even though many systems don't need it at all.
+
+This patch fixes Kconfig to allow drm-mipi-dsi driver built as a
+module, so that we can save footprint on systems without such DRM
+drivers. The probe order is managed by the module dependency, and
+postcore_initcall() works just fine as a module init call.
+
+Signed-off-by: Takashi Iwai <tiwai@suse.de>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/Kconfig
++++ b/drivers/gpu/drm/Kconfig
+@@ -22,7 +22,7 @@ menuconfig DRM
+ (/dev/agpgart) support if it is available for your platform.
+
+ config DRM_MIPI_DSI
+- bool
++ tristate
+ depends on DRM
+
+ config DRM_KMS_HELPER
+++ /dev/null
-From 229ed4a50a90820a5288c7f839db1f089bed71c4 Mon Sep 17 00:00:00 2001
-From: Takashi Iwai <tiwai@suse.de>
-Date: Tue, 2 Aug 2016 14:16:42 +0200
-Subject: [PATCH] drm/mipi-dsi: Unregister bus at exit
-
-This is a preliminary patch for building drm-mipi-dsi as a module.
-Add the module exit callback to unregister the bus properly.
-
-Suggested-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Takashi Iwai <tiwai@suse.de>
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/drm_mipi_dsi.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/gpu/drm/drm_mipi_dsi.c
-+++ b/drivers/gpu/drm/drm_mipi_dsi.c
-@@ -928,6 +928,12 @@ static int __init mipi_dsi_bus_init(void
- }
- postcore_initcall(mipi_dsi_bus_init);
-
-+static void __exit mipi_dsi_bus_exit(void)
-+{
-+ bus_unregister(&mipi_dsi_bus_type);
-+}
-+module_exit(mipi_dsi_bus_exit);
-+
- MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
- MODULE_DESCRIPTION("MIPI DSI Bus");
- MODULE_LICENSE("GPL and additional rights");
+++ /dev/null
-From cee1a8a6610e7184a9df7975c67d7e64bb80ee27 Mon Sep 17 00:00:00 2001
-From: Takashi Iwai <tiwai@suse.de>
-Date: Tue, 2 Aug 2016 14:16:43 +0200
-Subject: [PATCH] drm/mipi-dsi: Allow to build drm-mipi-dsi as a module
-
-The drm-mipi-dsi driver has been only built-in although this isn't
-strictly required to be so. Since it's referred by lots of DRM
-drivers nowadays, most of distro kernels include the driver as
-built-in as a result, even though many systems don't need it at all.
-
-This patch fixes Kconfig to allow drm-mipi-dsi driver built as a
-module, so that we can save footprint on systems without such DRM
-drivers. The probe order is managed by the module dependency, and
-postcore_initcall() works just fine as a module init call.
-
-Signed-off-by: Takashi Iwai <tiwai@suse.de>
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -22,7 +22,7 @@ menuconfig DRM
- (/dev/agpgart) support if it is available for your platform.
-
- config DRM_MIPI_DSI
-- bool
-+ tristate
- depends on DRM
-
- config DRM_KMS_HELPER
--- /dev/null
+From d6bbcaf3c7706243fafc0d6ddf4136f9c83eb599 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 11 Feb 2016 12:29:45 -0800
+Subject: [PATCH] drm/vc4: Fix flipped HVS channels for DSI0/1.
+
+Empirically, DSI1 appears to be using HVS channel 0 on my Pi2.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -699,13 +699,13 @@ void vc4_cancel_page_flip(struct drm_crt
+ }
+
+ static const struct vc4_crtc_data pv0_data = {
+- .hvs_channel = 0,
++ .hvs_channel = 2,
+ .encoder0_type = VC4_ENCODER_TYPE_DSI0,
+ .encoder1_type = VC4_ENCODER_TYPE_DPI,
+ };
+
+ static const struct vc4_crtc_data pv1_data = {
+- .hvs_channel = 2,
++ .hvs_channel = 0,
+ .encoder0_type = VC4_ENCODER_TYPE_DSI1,
+ .encoder1_type = VC4_ENCODER_TYPE_SMI,
+ };
--- /dev/null
+From d41850b2bd8ad77636e344c5fed1ebda0d77a9bc Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 10 Feb 2016 16:17:29 -0800
+Subject: [PATCH] drm/vc4: Add support for feeding DSI encoders from the pixel
+ valve.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 30 +++++++++++++++++-------------
+ drivers/gpu/drm/vc4/vc4_regs.h | 2 ++
+ 2 files changed, 19 insertions(+), 13 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -210,38 +210,40 @@ static u32 vc4_get_fifo_full_level(u32 f
+ }
+
+ /*
+- * Returns the clock select bit for the connector attached to the
+- * CRTC.
++ * Returns the encoder attached to the CRTC.
++ *
++ * VC4 can only scan out to one encoder at a type, while the DRM core
++ * allows drivers to push pixels to more than one encoder from the
++ * same CRTC.
+ */
+-static int vc4_get_clock_select(struct drm_crtc *crtc)
++static struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc)
+ {
+ struct drm_connector *connector;
+
+ drm_for_each_connector(connector, crtc->dev) {
+ if (connector->state->crtc == crtc) {
+- struct drm_encoder *encoder = connector->encoder;
+- struct vc4_encoder *vc4_encoder =
+- to_vc4_encoder(encoder);
+-
+- return vc4_encoder->clock_select;
++ return connector->encoder;
+ }
+ }
+
+- return -1;
++ return NULL;
+ }
+
+ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
+ {
+ struct drm_device *dev = crtc->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
++ struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+ struct drm_crtc_state *state = crtc->state;
+ struct drm_display_mode *mode = &state->adjusted_mode;
+ bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE;
+ u32 vactive = (mode->vdisplay >> (interlace ? 1 : 0));
+- u32 format = PV_CONTROL_FORMAT_24;
+- bool debug_dump_regs = false;
+- int clock_select = vc4_get_clock_select(crtc);
++ bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
++ vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
++ u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
++ bool debug_dump_regs = true;
+
+ if (debug_dump_regs) {
+ DRM_INFO("CRTC %d regs before:\n", drm_crtc_index(crtc));
+@@ -289,6 +291,7 @@ static void vc4_crtc_mode_set_nofb(struc
+
+ CRTC_WRITE(PV_V_CONTROL,
+ PV_VCONTROL_CONTINUOUS |
++ (is_dsi ? PV_VCONTROL_DSI : 0) |
+ (interlace ? PV_VCONTROL_INTERLACE : 0));
+
+ CRTC_WRITE(PV_CONTROL,
+@@ -298,7 +301,8 @@ static void vc4_crtc_mode_set_nofb(struc
+ PV_CONTROL_CLR_AT_START |
+ PV_CONTROL_TRIGGER_UNDERFLOW |
+ PV_CONTROL_WAIT_HSTART |
+- VC4_SET_FIELD(clock_select, PV_CONTROL_CLK_SELECT) |
++ VC4_SET_FIELD(vc4_encoder->clock_select,
++ PV_CONTROL_CLK_SELECT) |
+ PV_CONTROL_FIFO_CLR |
+ PV_CONTROL_EN);
+
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -184,6 +184,8 @@
+
+ #define PV_V_CONTROL 0x04
+ # define PV_VCONTROL_INTERLACE BIT(4)
++# define PV_VCONTROL_DSI BIT(3)
++# define PV_VCONTROL_COMMAND BIT(2)
+ # define PV_VCONTROL_CONTINUOUS BIT(1)
+ # define PV_VCONTROL_VIDEN BIT(0)
+
+++ /dev/null
-From 3ecee79bedf0a2dbca94281674b7a86f3b82f522 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 11 Feb 2016 12:29:45 -0800
-Subject: [PATCH] drm/vc4: Fix flipped HVS channels for DSI0/1.
-
-Empirically, DSI1 appears to be using HVS channel 0 on my Pi2.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -699,13 +699,13 @@ void vc4_cancel_page_flip(struct drm_crt
- }
-
- static const struct vc4_crtc_data pv0_data = {
-- .hvs_channel = 0,
-+ .hvs_channel = 2,
- .encoder0_type = VC4_ENCODER_TYPE_DSI0,
- .encoder1_type = VC4_ENCODER_TYPE_DPI,
- };
-
- static const struct vc4_crtc_data pv1_data = {
-- .hvs_channel = 2,
-+ .hvs_channel = 0,
- .encoder0_type = VC4_ENCODER_TYPE_DSI1,
- .encoder1_type = VC4_ENCODER_TYPE_SMI,
- };
+++ /dev/null
-From c50d2b2fc772468306a8b30159924f19edab4901 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 10 Feb 2016 16:17:29 -0800
-Subject: [PATCH] drm/vc4: Add support for feeding DSI encoders from the pixel
- valve.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 30 +++++++++++++++++-------------
- drivers/gpu/drm/vc4/vc4_regs.h | 2 ++
- 2 files changed, 19 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -210,38 +210,40 @@ static u32 vc4_get_fifo_full_level(u32 f
- }
-
- /*
-- * Returns the clock select bit for the connector attached to the
-- * CRTC.
-+ * Returns the encoder attached to the CRTC.
-+ *
-+ * VC4 can only scan out to one encoder at a type, while the DRM core
-+ * allows drivers to push pixels to more than one encoder from the
-+ * same CRTC.
- */
--static int vc4_get_clock_select(struct drm_crtc *crtc)
-+static struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc)
- {
- struct drm_connector *connector;
-
- drm_for_each_connector(connector, crtc->dev) {
- if (connector->state->crtc == crtc) {
-- struct drm_encoder *encoder = connector->encoder;
-- struct vc4_encoder *vc4_encoder =
-- to_vc4_encoder(encoder);
--
-- return vc4_encoder->clock_select;
-+ return connector->encoder;
- }
- }
-
-- return -1;
-+ return NULL;
- }
-
- static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
- {
- struct drm_device *dev = crtc->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
-+ struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
- struct drm_crtc_state *state = crtc->state;
- struct drm_display_mode *mode = &state->adjusted_mode;
- bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE;
- u32 vactive = (mode->vdisplay >> (interlace ? 1 : 0));
-- u32 format = PV_CONTROL_FORMAT_24;
-- bool debug_dump_regs = false;
-- int clock_select = vc4_get_clock_select(crtc);
-+ bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
-+ vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
-+ u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
-+ bool debug_dump_regs = true;
-
- if (debug_dump_regs) {
- DRM_INFO("CRTC %d regs before:\n", drm_crtc_index(crtc));
-@@ -289,6 +291,7 @@ static void vc4_crtc_mode_set_nofb(struc
-
- CRTC_WRITE(PV_V_CONTROL,
- PV_VCONTROL_CONTINUOUS |
-+ (is_dsi ? PV_VCONTROL_DSI : 0) |
- (interlace ? PV_VCONTROL_INTERLACE : 0));
-
- CRTC_WRITE(PV_CONTROL,
-@@ -298,7 +301,8 @@ static void vc4_crtc_mode_set_nofb(struc
- PV_CONTROL_CLR_AT_START |
- PV_CONTROL_TRIGGER_UNDERFLOW |
- PV_CONTROL_WAIT_HSTART |
-- VC4_SET_FIELD(clock_select, PV_CONTROL_CLK_SELECT) |
-+ VC4_SET_FIELD(vc4_encoder->clock_select,
-+ PV_CONTROL_CLK_SELECT) |
- PV_CONTROL_FIFO_CLR |
- PV_CONTROL_EN);
-
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -184,6 +184,8 @@
-
- #define PV_V_CONTROL 0x04
- # define PV_VCONTROL_INTERLACE BIT(4)
-+# define PV_VCONTROL_DSI BIT(3)
-+# define PV_VCONTROL_COMMAND BIT(2)
- # define PV_VCONTROL_CONTINUOUS BIT(1)
- # define PV_VCONTROL_VIDEN BIT(0)
-
--- /dev/null
+From 65b36b9316eb06fa8fb7163206dc8878d36091ae Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 20 May 2016 16:24:47 -0700
+Subject: [PATCH] drm/vc4: Start switching to using debugfs_reg32 helpers for
+ debugfs.
+
+Every file was defining its own little struct and dumping for the
+regs, when there's a helper in debugfs for doing just this. However,
+instead of printing:
+
+PV_HORZA (0x000c): 0x00000000
+
+we now print:
+
+PV_HORZA = 0x00000000
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 48 ++++++++++++++++--------------------------
+ drivers/gpu/drm/vc4/vc4_drv.c | 13 ++++++++++++
+ drivers/gpu/drm/vc4/vc4_drv.h | 6 ++++++
+ 3 files changed, 37 insertions(+), 30 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -35,6 +35,7 @@
+ #include "drm_atomic_helper.h"
+ #include "drm_crtc_helper.h"
+ #include "linux/clk.h"
++#include "linux/debugfs.h"
+ #include "drm_fb_cma_helper.h"
+ #include "linux/component.h"
+ #include "linux/of_device.h"
+@@ -85,35 +86,25 @@ struct vc4_crtc_data {
+ #define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset))
+ #define CRTC_READ(offset) readl(vc4_crtc->regs + (offset))
+
+-#define CRTC_REG(reg) { reg, #reg }
+-static const struct {
+- u32 reg;
+- const char *name;
+-} crtc_regs[] = {
+- CRTC_REG(PV_CONTROL),
+- CRTC_REG(PV_V_CONTROL),
+- CRTC_REG(PV_VSYNCD_EVEN),
+- CRTC_REG(PV_HORZA),
+- CRTC_REG(PV_HORZB),
+- CRTC_REG(PV_VERTA),
+- CRTC_REG(PV_VERTB),
+- CRTC_REG(PV_VERTA_EVEN),
+- CRTC_REG(PV_VERTB_EVEN),
+- CRTC_REG(PV_INTEN),
+- CRTC_REG(PV_INTSTAT),
+- CRTC_REG(PV_STAT),
+- CRTC_REG(PV_HACT_ACT),
++static const struct debugfs_reg32 crtc_regs[] = {
++ VC4_DEBUG_REG(PV_CONTROL),
++ VC4_DEBUG_REG(PV_V_CONTROL),
++ VC4_DEBUG_REG(PV_VSYNCD_EVEN),
++ VC4_DEBUG_REG(PV_HORZA),
++ VC4_DEBUG_REG(PV_HORZB),
++ VC4_DEBUG_REG(PV_VERTA),
++ VC4_DEBUG_REG(PV_VERTB),
++ VC4_DEBUG_REG(PV_VERTA_EVEN),
++ VC4_DEBUG_REG(PV_VERTB_EVEN),
++ VC4_DEBUG_REG(PV_INTEN),
++ VC4_DEBUG_REG(PV_INTSTAT),
++ VC4_DEBUG_REG(PV_STAT),
++ VC4_DEBUG_REG(PV_HACT_ACT),
+ };
+
+ static void vc4_crtc_dump_regs(struct vc4_crtc *vc4_crtc)
+ {
+- int i;
+-
+- for (i = 0; i < ARRAY_SIZE(crtc_regs); i++) {
+- DRM_INFO("0x%04x (%s): 0x%08x\n",
+- crtc_regs[i].reg, crtc_regs[i].name,
+- CRTC_READ(crtc_regs[i].reg));
+- }
++ vc4_dump_regs32(crtc_regs, ARRAY_SIZE(crtc_regs), vc4_crtc->regs, "");
+ }
+
+ #ifdef CONFIG_DEBUG_FS
+@@ -136,11 +127,8 @@ int vc4_crtc_debugfs_regs(struct seq_fil
+ return 0;
+ vc4_crtc = to_vc4_crtc(crtc);
+
+- for (i = 0; i < ARRAY_SIZE(crtc_regs); i++) {
+- seq_printf(m, "%s (0x%04x): 0x%08x\n",
+- crtc_regs[i].name, crtc_regs[i].reg,
+- CRTC_READ(crtc_regs[i].reg));
+- }
++ debugfs_print_regs32(m, crtc_regs, ARRAY_SIZE(crtc_regs),
++ vc4_crtc->regs, "");
+
+ return 0;
+ }
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -9,6 +9,7 @@
+
+ #include <linux/clk.h>
+ #include <linux/component.h>
++#include <linux/debugfs.h>
+ #include <linux/device.h>
+ #include <linux/io.h>
+ #include <linux/module.h>
+@@ -52,6 +53,18 @@ static void vc4_drm_preclose(struct drm_
+ vc4_cancel_page_flip(crtc, file);
+ }
+
++void vc4_dump_regs32(const struct debugfs_reg32 *regs, unsigned int num_regs,
++ void __iomem *base, const char *prefix)
++{
++ unsigned int i;
++
++ for (i = 0; i < num_regs; i++) {
++ DRM_INFO("%s0x%04lx (%s): 0x%08x\n",
++ prefix, regs[i].offset, regs[i].name,
++ readl(base + regs[i].offset));
++ }
++}
++
+ static void vc4_lastclose(struct drm_device *dev)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -9,6 +9,8 @@
+ #include "drmP.h"
+ #include "drm_gem_cma_helper.h"
+
++struct debugfs_reg32;
++
+ struct vc4_dev {
+ struct drm_device *dev;
+
+@@ -207,6 +209,8 @@ to_vc4_encoder(struct drm_encoder *encod
+ #define HVS_READ(offset) readl(vc4->hvs->regs + offset)
+ #define HVS_WRITE(offset, val) writel(val, vc4->hvs->regs + offset)
+
++#define VC4_DEBUG_REG(reg) { .name = #reg, .offset = reg }
++
+ struct vc4_exec_info {
+ /* Sequence number for this bin/render job. */
+ uint64_t seqno;
+@@ -418,6 +422,8 @@ void vc4_debugfs_cleanup(struct drm_mino
+
+ /* vc4_drv.c */
+ void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index);
++void vc4_dump_regs32(const struct debugfs_reg32 *reg, unsigned int num_regs,
++ void __iomem *base, const char *prefix);
+
+ /* vc4_dpi.c */
+ extern struct platform_driver vc4_dpi_driver;
--- /dev/null
+From 24f4ee562dc5c54973955e91162a0848f2331c8b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 10 Feb 2016 11:42:32 -0800
+Subject: [PATCH] drm/vc4: Add DSI1 driver
+
+The DSI0 and DSI1 blocks on the 2835 are different but very similar
+hardware blocks. Some registers move around, and the featureset is
+slightly different, but they're clearly related. This doesn't enable
+DSI0, but some of the infrastructure is present.
+
+Also, this driver doesn't initialize the DSI successfully from
+poweron, so we currently require that the Raspberry Pi firmware enable
+it at boot time. From there, we just keep the same settings forever,
+and when poweroff is requested we just scan out black instead.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/Kconfig | 2 +
+ drivers/gpu/drm/vc4/Makefile | 1 +
+ drivers/gpu/drm/vc4/vc4_crtc.c | 41 +-
+ drivers/gpu/drm/vc4/vc4_debugfs.c | 2 +
+ drivers/gpu/drm/vc4/vc4_drv.c | 1 +
+ drivers/gpu/drm/vc4/vc4_drv.h | 8 +
+ drivers/gpu/drm/vc4/vc4_dsi.c | 1737 +++++++++++++++++++++++++++++++++++++
+ 7 files changed, 1780 insertions(+), 12 deletions(-)
+ create mode 100644 drivers/gpu/drm/vc4/vc4_dsi.c
+
+--- a/drivers/gpu/drm/vc4/Kconfig
++++ b/drivers/gpu/drm/vc4/Kconfig
+@@ -6,6 +6,8 @@ config DRM_VC4
+ select DRM_KMS_CMA_HELPER
+ select DRM_GEM_CMA_HELPER
+ select DRM_PANEL
++ select DRM_MIPI_DSI
++ select CLKSRC_OF
+ help
+ Choose this option if you have a system that has a Broadcom
+ VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835.
+--- a/drivers/gpu/drm/vc4/Makefile
++++ b/drivers/gpu/drm/vc4/Makefile
+@@ -8,6 +8,7 @@ vc4-y := \
+ vc4_crtc.o \
+ vc4_drv.o \
+ vc4_dpi.o \
++ vc4_dsi.o \
+ vc4_kms.o \
+ vc4_gem.o \
+ vc4_hdmi.o \
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -231,7 +231,7 @@ static void vc4_crtc_mode_set_nofb(struc
+ bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
+ vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
+ u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
+- bool debug_dump_regs = true;
++ bool debug_dump_regs = false;
+
+ if (debug_dump_regs) {
+ DRM_INFO("CRTC %d regs before:\n", drm_crtc_index(crtc));
+@@ -327,6 +327,19 @@ static void vc4_crtc_disable(struct drm_
+ int ret;
+ require_hvs_enabled(dev);
+
++ if (VC4_DSI_USE_FIRMWARE_SETUP &&
++ (CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_DSI)) {
++ /* Skip disabling the PV/HVS for the channel if it was
++ * connected to the DSI panel and we're using the
++ * firmware setup. Instead, just set it to stuff
++ * black in the composite output buffer.
++ */
++ HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
++ HVS_READ(SCALER_DISPBKGNDX(vc4_crtc->channel)) |
++ SCALER_DISPBKGND_FILL);
++ return;
++ }
++
+ CRTC_WRITE(PV_V_CONTROL,
+ CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
+ ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
+@@ -396,17 +409,19 @@ static int vc4_crtc_atomic_check(struct
+ if (drm_atomic_connectors_for_crtc(state->state, crtc) > 1)
+ return -EINVAL;
+
+- drm_atomic_crtc_state_for_each_plane(plane, state) {
+- struct drm_plane_state *plane_state =
+- state->state->plane_states[drm_plane_index(plane)];
+-
+- /* plane might not have changed, in which case take
+- * current state:
+- */
+- if (!plane_state)
+- plane_state = plane->state;
++ if (state->active) {
++ drm_atomic_crtc_state_for_each_plane(plane, state) {
++ struct drm_plane_state *plane_state =
++ state->state->plane_states[drm_plane_index(plane)];
++
++ /* plane might not have changed, in which case take
++ * current state:
++ */
++ if (!plane_state)
++ plane_state = plane->state;
+
+- dlist_count += vc4_plane_dlist_size(plane_state);
++ dlist_count += vc4_plane_dlist_size(plane_state);
++ }
+ }
+
+ dlist_count++; /* Account for SCALER_CTL0_END. */
+@@ -439,8 +454,10 @@ static void vc4_crtc_atomic_flush(struct
+ }
+
+ /* Copy all the active planes' dlist contents to the hardware dlist. */
+- drm_atomic_crtc_for_each_plane(plane, crtc) {
+- dlist_next += vc4_plane_write_dlist(plane, dlist_next);
++ if (crtc->state->active) {
++ drm_atomic_crtc_for_each_plane(plane, crtc) {
++ dlist_next += vc4_plane_write_dlist(plane, dlist_next);
++ }
+ }
+
+ writel(SCALER_CTL0_END, dlist_next);
+--- a/drivers/gpu/drm/vc4/vc4_debugfs.c
++++ b/drivers/gpu/drm/vc4/vc4_debugfs.c
+@@ -19,6 +19,8 @@ static const struct drm_info_list vc4_de
+ {"bo_stats", vc4_bo_stats_debugfs, 0},
+ {"dpi_regs", vc4_dpi_debugfs_regs, 0},
+ {"gem_exec", vc4_gem_exec_debugfs, 0},
++ {"dsi0_regs", vc4_dsi_debugfs_regs, 0, (void *)(uintptr_t)0},
++ {"dsi1_regs", vc4_dsi_debugfs_regs, 0, (void *)(uintptr_t)1},
+ {"hdmi_regs", vc4_hdmi_debugfs_regs, 0},
+ {"hvs_regs", vc4_hvs_debugfs_regs, 0},
+ {"crtc0_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)0},
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -294,6 +294,7 @@ static const struct component_master_ops
+ static struct platform_driver *const component_drivers[] = {
+ &vc4_hdmi_driver,
+ &vc4_dpi_driver,
++ &vc4_dsi_driver,
+ &vc4_crtc_driver,
+ &vc4_hvs_driver,
+ &vc4_v3d_driver,
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -19,6 +19,8 @@ struct vc4_dev {
+ struct vc4_crtc *crtc[3];
+ struct vc4_v3d *v3d;
+ struct vc4_dpi *dpi;
++ struct vc4_dsi *dsi0;
++ struct vc4_dsi *dsi1;
+
+ struct drm_fbdev_cma *fbdev;
+ struct rpi_firmware *firmware;
+@@ -192,6 +194,8 @@ enum vc4_encoder_type {
+ VC4_ENCODER_TYPE_DPI,
+ };
+
++#define VC4_DSI_USE_FIRMWARE_SETUP true
++
+ struct vc4_encoder {
+ struct drm_encoder base;
+ enum vc4_encoder_type type;
+@@ -429,6 +433,10 @@ void vc4_dump_regs32(const struct debugf
+ extern struct platform_driver vc4_dpi_driver;
+ int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused);
+
++/* vc4_dsi.c */
++extern struct platform_driver vc4_dsi_driver;
++int vc4_dsi_debugfs_regs(struct seq_file *m, void *unused);
++
+ /* vc4_gem.c */
+ void vc4_gem_init(struct drm_device *dev);
+ void vc4_gem_destroy(struct drm_device *dev);
+--- /dev/null
++++ b/drivers/gpu/drm/vc4/vc4_dsi.c
+@@ -0,0 +1,1737 @@
++ /*
++ * Copyright (C) 2016 Broadcom Limited
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but WITHOUT
++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
++ * more details.
++ *
++ * You should have received a copy of the GNU General Public License along with
++ * this program. If not, see <http://www.gnu.org/licenses/>.
++ */
++
++/**
++ * DOC: VC4 DSI0 module
++ */
++
++#include "drm_atomic_helper.h"
++#include "drm_crtc_helper.h"
++#include "drm_edid.h"
++#include "drm_mipi_dsi.h"
++#include "drm_panel.h"
++#include "linux/clk.h"
++#include "linux/clk-provider.h"
++#include "linux/completion.h"
++#include "linux/component.h"
++#include "linux/debugfs.h"
++#include "linux/dmaengine.h"
++#include "linux/i2c.h"
++#include "linux/of_address.h"
++#include "linux/of_gpio.h"
++#include "linux/of_platform.h"
++#include "vc4_drv.h"
++#include "vc4_regs.h"
++
++#define DSI_CMD_FIFO_DEPTH 16
++#define DSI_PIX_FIFO_DEPTH 256
++#define DSI_PIX_FIFO_WIDTH 4
++
++#define DSI0_CTRL 0x00
++
++/* Command packet control. */
++#define DSI0_TXPKT1C 0x04 /* AKA PKTC */
++#define DSI1_TXPKT1C 0x04
++# define DSI_TXPKT1C_TRIG_CMD_MASK VC4_MASK(31, 24)
++# define DSI_TXPKT1C_TRIG_CMD_SHIFT 24
++# define DSI_TXPKT1C_CMD_REPEAT_MASK VC4_MASK(23, 10)
++# define DSI_TXPKT1C_CMD_REPEAT_SHIFT 10
++
++# define DSI_TXPKT1C_DISPLAY_NO_MASK VC4_MASK(9, 8)
++# define DSI_TXPKT1C_DISPLAY_NO_SHIFT 8
++/* Short, trigger, BTA, or a long packet that fits all in CMDFIFO. */
++# define DSI_TXPKT1C_DISPLAY_NO_SHORT 0
++/* Primary display where cmdfifo provides part of the payload and
++ * pixelvalve the rest.
++ */
++# define DSI_TXPKT1C_DISPLAY_NO_PRIMARY 1
++/* Secondary display where cmdfifo provides part of the payload and
++ * pixfifo the rest.
++ */
++# define DSI_TXPKT1C_DISPLAY_NO_SECONDARY 2
++
++# define DSI_TXPKT1C_CMD_TX_TIME_MASK VC4_MASK(7, 6)
++# define DSI_TXPKT1C_CMD_TX_TIME_SHIFT 6
++# define DSI_TXPKT1C_CMD_CTRL_MASK VC4_MASK(5, 4)
++# define DSI_TXPKT1C_CMD_CTRL_SHIFT 4
++/* Command only. Uses TXPKT1H and DISPLAY_NO */
++# define DSI_TXPKT1C_CMD_CTRL_TX 0
++/* Command with BTA for either ack or read data. */
++# define DSI_TXPKT1C_CMD_CTRL_RX 1
++/* Trigger according to TRIG_CMD */
++# define DSI_TXPKT1C_CMD_CTRL_TRIG 2
++/* BTA alone for getting error status after a command, or a TE trigger
++ * without a previous command.
++ */
++# define DSI_TXPKT1C_CMD_CTRL_BTA 3
++
++# define DSI_TXPKT1C_CMD_MODE_LP BIT(3)
++# define DSI_TXPKT1C_CMD_TYPE_LONG BIT(2)
++# define DSI_TXPKT1C_CMD_TE_EN BIT(1)
++# define DSI_TXPKT1C_CMD_EN BIT(0)
++
++/* Command packet header. */
++#define DSI0_TXPKT1H 0x08 /* AKA PKTH */
++#define DSI1_TXPKT1H 0x08
++# define DSI_TXPKT1H_BC_CMDFIFO_MASK VC4_MASK(31, 24)
++# define DSI_TXPKT1H_BC_CMDFIFO_SHIFT 24
++# define DSI_TXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8)
++# define DSI_TXPKT1H_BC_PARAM_SHIFT 8
++# define DSI_TXPKT1H_BC_DT_MASK VC4_MASK(7, 0)
++# define DSI_TXPKT1H_BC_DT_SHIFT 0
++
++#define DSI0_RXPKT1H 0x0c /* AKA RX1_PKTH */
++#define DSI1_RXPKT1H 0x14
++# define DSI_RXPKT1H_CRC_ERR BIT(31)
++# define DSI_RXPKT1H_DET_ERR BIT(30)
++# define DSI_RXPKT1H_ECC_ERR BIT(29)
++# define DSI_RXPKT1H_COR_ERR BIT(28)
++# define DSI_RXPKT1H_INCOMP_PKT BIT(25)
++# define DSI_RXPKT1H_PKT_TYPE_LONG BIT(24)
++/* Byte count if DSI_RXPKT1H_PKT_TYPE_LONG */
++# define DSI_RXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8)
++# define DSI_RXPKT1H_BC_PARAM_SHIFT 8
++/* Short return bytes if !DSI_RXPKT1H_PKT_TYPE_LONG */
++# define DSI_RXPKT1H_SHORT_1_MASK VC4_MASK(23, 16)
++# define DSI_RXPKT1H_SHORT_1_SHIFT 16
++# define DSI_RXPKT1H_SHORT_0_MASK VC4_MASK(15, 8)
++# define DSI_RXPKT1H_SHORT_0_SHIFT 8
++# define DSI_RXPKT1H_DT_LP_CMD_MASK VC4_MASK(7, 0)
++# define DSI_RXPKT1H_DT_LP_CMD_SHIFT 0
++
++#define DSI0_RXPKT2H 0x10 /* AKA RX2_PKTH */
++#define DSI1_RXPKT2H 0x18
++# define DSI_RXPKT1H_DET_ERR BIT(30)
++# define DSI_RXPKT1H_ECC_ERR BIT(29)
++# define DSI_RXPKT1H_COR_ERR BIT(28)
++# define DSI_RXPKT1H_INCOMP_PKT BIT(25)
++# define DSI_RXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8)
++# define DSI_RXPKT1H_BC_PARAM_SHIFT 8
++# define DSI_RXPKT1H_DT_MASK VC4_MASK(7, 0)
++# define DSI_RXPKT1H_DT_SHIFT 0
++
++#define DSI0_TXPKT_CMD_FIFO 0x14 /* AKA CMD_DATAF */
++#define DSI1_TXPKT_CMD_FIFO 0x1c
++
++#define DSI0_DISP0_CTRL 0x18
++# define DSI_DISP0_PIX_CLK_DIV_MASK VC4_MASK(21, 13)
++# define DSI_DISP0_PIX_CLK_DIV_SHIFT 13
++# define DSI_DISP0_LP_STOP_CTRL_MASK VC4_MASK(12, 11)
++# define DSI_DISP0_LP_STOP_CTRL_SHIFT 11
++# define DSI_DISP0_LP_STOP_DISABLE 0
++# define DSI_DISP0_LP_STOP_PERLINE 1
++# define DSI_DISP0_LP_STOP_PERFRAME 2
++
++/* Transmit RGB pixels and null packets only during HACTIVE, instead
++ * of going to LP-STOP.
++ */
++# define DSI_DISP_HACTIVE_NULL BIT(10)
++/* Transmit blanking packet only during vblank, instead of allowing LP-STOP. */
++# define DSI_DISP_VBLP_CTRL BIT(9)
++/* Transmit blanking packet only during HFP, instead of allowing LP-STOP. */
++# define DSI_DISP_HFP_CTRL BIT(8)
++/* Transmit blanking packet only during HBP, instead of allowing LP-STOP. */
++# define DSI_DISP_HBP_CTRL BIT(7)
++# define DSI_DISP0_CHANNEL_MASK VC4_MASK(6, 5)
++# define DSI_DISP0_CHANNEL_SHIFT 5
++/* Enables and end events for HSYNC/VSYNC, not just start events. */
++# define DSI_DISP0_ST_END BIT(4)
++# define DSI_DISP0_PFORMAT_MASK VC4_MASK(3, 2)
++# define DSI_DISP0_PFORMAT_SHIFT 2
++# define DSI_PFORMAT_RGB565 0
++# define DSI_PFORMAT_RGB666_PACKED 1
++# define DSI_PFORMAT_RGB666 2
++# define DSI_PFORMAT_RGB888 3
++/* Default is VIDEO mode. */
++# define DSI_DISP0_COMMAND_MODE BIT(1)
++# define DSI_DISP0_ENABLE BIT(0)
++
++#define DSI0_DISP1_CTRL 0x1c
++#define DSI1_DISP1_CTRL 0x2c
++/* Format of the data written to TXPKT_PIX_FIFO. */
++# define DSI_DISP1_PFORMAT_MASK VC4_MASK(2, 1)
++# define DSI_DISP1_PFORMAT_SHIFT 1
++# define DSI_DISP1_PFORMAT_16BIT 0
++# define DSI_DISP1_PFORMAT_24BIT 1
++# define DSI_DISP1_PFORMAT_32BIT_LE 2
++# define DSI_DISP1_PFORMAT_32BIT_BE 3
++
++/* DISP1 is always command mode. */
++# define DSI_DISP1_ENABLE BIT(0)
++
++#define DSI0_TXPKT_PIX_FIFO 0x20 /* AKA PIX_FIFO */
++
++#define DSI0_INT_STAT 0x24
++#define DSI0_INT_EN 0x28
++# define DSI1_INT_PHY_D3_ULPS BIT(30)
++# define DSI1_INT_PHY_D3_STOP BIT(29)
++# define DSI1_INT_PHY_D2_ULPS BIT(28)
++# define DSI1_INT_PHY_D2_STOP BIT(27)
++# define DSI1_INT_PHY_D1_ULPS BIT(26)
++# define DSI1_INT_PHY_D1_STOP BIT(25)
++# define DSI1_INT_PHY_D0_ULPS BIT(24)
++# define DSI1_INT_PHY_D0_STOP BIT(23)
++# define DSI1_INT_FIFO_ERR BIT(22)
++# define DSI1_INT_PHY_DIR_RTF BIT(21)
++# define DSI1_INT_PHY_RXLPDT BIT(20)
++# define DSI1_INT_PHY_RXTRIG BIT(19)
++# define DSI1_INT_PHY_D0_LPDT BIT(18)
++# define DSI1_INT_PHY_DIR_FTR BIT(17)
++
++/* Signaled when the clock lane enters the given state. */
++# define DSI1_INT_PHY_CLOCK_ULPS BIT(16)
++# define DSI1_INT_PHY_CLOCK_HS BIT(15)
++# define DSI1_INT_PHY_CLOCK_STOP BIT(14)
++
++/* Signaled on timeouts */
++# define DSI1_INT_PR_TO BIT(13)
++# define DSI1_INT_TA_TO BIT(12)
++# define DSI1_INT_LPRX_TO BIT(11)
++# define DSI1_INT_HSTX_TO BIT(10)
++
++/* Contention on a line when trying to drive the line low */
++# define DSI1_INT_ERR_CONT_LP1 BIT(9)
++# define DSI1_INT_ERR_CONT_LP0 BIT(8)
++
++/* Control error: incorrect line state sequence on data lane 0. */
++# define DSI1_INT_ERR_CONTROL BIT(7)
++/* LPDT synchronization error (bits received not a multiple of 8. */
++
++# define DSI1_INT_ERR_SYNC_ESC BIT(6)
++/* Signaled after receiving an error packet from the display in
++ * response to a read.
++ */
++# define DSI1_INT_RXPKT2 BIT(5)
++/* Signaled after receiving a packet. The header and optional short
++ * response will be in RXPKT1H, and a long response will be in the
++ * RXPKT_FIFO.
++ */
++# define DSI1_INT_RXPKT1 BIT(4)
++# define DSI1_INT_TXPKT2_DONE BIT(3)
++# define DSI1_INT_TXPKT2_END BIT(2)
++/* Signaled after all repeats of TXPKT1 are transferred. */
++# define DSI1_INT_TXPKT1_DONE BIT(1)
++/* Signaled after each TXPKT1 repeat is scheduled. */
++# define DSI1_INT_TXPKT1_END BIT(0)
++
++#define DSI1_INTERRUPTS_ALWAYS_ENABLED (DSI1_INT_ERR_SYNC_ESC | \
++ DSI1_INT_ERR_CONTROL | \
++ DSI1_INT_ERR_CONT_LP0 | \
++ DSI1_INT_ERR_CONT_LP1 | \
++ DSI1_INT_HSTX_TO | \
++ DSI1_INT_LPRX_TO | \
++ DSI1_INT_TA_TO | \
++ DSI1_INT_PR_TO)
++
++#define DSI0_STAT 0x2c
++#define DSI0_HSTX_TO_CNT 0x30
++#define DSI0_LPRX_TO_CNT 0x34
++#define DSI0_TA_TO_CNT 0x38
++#define DSI0_PR_TO_CNT 0x3c
++#define DSI0_PHYC 0x40
++# define DSI1_PHYC_ESC_CLK_LPDT_MASK VC4_MASK(25, 20)
++# define DSI1_PHYC_ESC_CLK_LPDT_SHIFT 20
++# define DSI1_PHYC_HS_CLK_CONTINUOUS BIT(18)
++# define DSI1_PHYC_CLANE_ULPS BIT(17)
++# define DSI0_PHYC_ESC_CLK_LPDT_MASK VC4_MASK(17, 12)
++# define DSI0_PHYC_ESC_CLK_LPDT_SHIFT 12
++# define DSI1_PHYC_CLANE_ENABLE BIT(16)
++# define DSI_PHYC_DLANE3_ULPS BIT(13)
++# define DSI_PHYC_DLANE3_ENABLE BIT(12)
++# define DSI0_PHYC_HS_CLK_CONTINUOUS BIT(10)
++# define DSI0_PHYC_CLANE_ULPS BIT(9)
++# define DSI_PHYC_DLANE2_ULPS BIT(9)
++# define DSI0_PHYC_CLANE_ENABLE BIT(8)
++# define DSI_PHYC_DLANE2_ENABLE BIT(8)
++# define DSI_PHYC_DLANE1_ULPS BIT(5)
++# define DSI_PHYC_DLANE1_ENABLE BIT(4)
++# define DSI_PHYC_DLANE0_FORCE_STOP BIT(2)
++# define DSI_PHYC_DLANE0_ULPS BIT(1)
++# define DSI_PHYC_DLANE0_ENABLE BIT(0)
++
++#define DSI0_HS_CLT0 0x44
++#define DSI0_HS_CLT1 0x48
++#define DSI0_HS_CLT2 0x4c
++#define DSI0_HS_DLT3 0x50
++#define DSI0_HS_DLT4 0x54
++#define DSI0_HS_DLT5 0x58
++#define DSI0_HS_DLT6 0x5c
++#define DSI0_HS_DLT7 0x60
++
++#define DSI0_PHY_AFEC0 0x64
++# define DSI0_PHY_AFEC0_DDR2CLK_EN BIT(26)
++# define DSI0_PHY_AFEC0_DDRCLK_EN BIT(25)
++# define DSI0_PHY_AFEC0_LATCH_ULPS BIT(24)
++# define DSI1_PHY_AFEC0_IDR_DLANE3_MASK VC4_MASK(31, 29)
++# define DSI1_PHY_AFEC0_IDR_DLANE3_SHIFT 29
++# define DSI1_PHY_AFEC0_IDR_DLANE2_MASK VC4_MASK(28, 26)
++# define DSI1_PHY_AFEC0_IDR_DLANE2_SHIFT 26
++# define DSI1_PHY_AFEC0_IDR_DLANE1_MASK VC4_MASK(27, 23)
++# define DSI1_PHY_AFEC0_IDR_DLANE1_SHIFT 23
++# define DSI1_PHY_AFEC0_IDR_DLANE0_MASK VC4_MASK(22, 20)
++# define DSI1_PHY_AFEC0_IDR_DLANE0_SHIFT 20
++# define DSI1_PHY_AFEC0_IDR_CLANE_MASK VC4_MASK(19, 17)
++# define DSI1_PHY_AFEC0_IDR_CLANE_SHIFT 17
++# define DSI0_PHY_AFEC0_ACTRL_DLANE1_MASK VC4_MASK(23, 20)
++# define DSI0_PHY_AFEC0_ACTRL_DLANE1_SHIFT 20
++# define DSI0_PHY_AFEC0_ACTRL_DLANE0_MASK VC4_MASK(19, 16)
++# define DSI0_PHY_AFEC0_ACTRL_DLANE0_SHIFT 16
++# define DSI0_PHY_AFEC0_ACTRL_CLANE_MASK VC4_MASK(15, 12)
++# define DSI0_PHY_AFEC0_ACTRL_CLANE_SHIFT 12
++# define DSI1_PHY_AFEC0_DDR2CLK_EN BIT(16)
++# define DSI1_PHY_AFEC0_DDRCLK_EN BIT(15)
++# define DSI1_PHY_AFEC0_LATCH_ULPS BIT(14)
++# define DSI1_PHY_AFEC0_RESET BIT(13)
++# define DSI1_PHY_AFEC0_PD BIT(12)
++# define DSI0_PHY_AFEC0_RESET BIT(11)
++# define DSI1_PHY_AFEC0_PD_BG BIT(11)
++# define DSI0_PHY_AFEC0_PD BIT(10)
++# define DSI1_PHY_AFEC0_PD_DLANE3 BIT(10)
++# define DSI0_PHY_AFEC0_PD_BG BIT(9)
++# define DSI1_PHY_AFEC0_PD_DLANE2 BIT(9)
++# define DSI0_PHY_AFEC0_PD_DLANE1 BIT(8)
++# define DSI1_PHY_AFEC0_PD_DLANE1 BIT(8)
++# define DSI_PHY_AFEC0_PTATADJ_MASK VC4_MASK(7, 4)
++# define DSI_PHY_AFEC0_PTATADJ_SHIFT 4
++# define DSI_PHY_AFEC0_CTATADJ_MASK VC4_MASK(3, 0)
++# define DSI_PHY_AFEC0_CTATADJ_SHIFT 0
++
++#define DSI0_PHY_AFEC1 0x68
++# define DSI0_PHY_AFEC1_IDR_DLANE1_MASK VC4_MASK(10, 8)
++# define DSI0_PHY_AFEC1_IDR_DLANE1_SHIFT 8
++# define DSI0_PHY_AFEC1_IDR_DLANE0_MASK VC4_MASK(6, 4)
++# define DSI0_PHY_AFEC1_IDR_DLANE0_SHIFT 4
++# define DSI0_PHY_AFEC1_IDR_CLANE_MASK VC4_MASK(2, 0)
++# define DSI0_PHY_AFEC1_IDR_CLANE_SHIFT 0
++
++#define DSI0_TST_SEL 0x6c
++#define DSI0_TST_MON 0x70
++#define DSI0_ID 0x74
++# define DSI_ID_VALUE 0x00647369
++
++
++#define DSI1_CTRL 0x00
++# define DSI_CTRL_HS_CLKC_MASK VC4_MASK(15, 14)
++# define DSI_CTRL_HS_CLKC_SHIFT 14
++# define DSI_CTRL_HS_CLKC_BYTE 0
++# define DSI_CTRL_HS_CLKC_DDR2 1
++# define DSI_CTRL_HS_CLKC_DDR 2
++
++# define DSI_CTRL_RX_LPDT_EOT_DISABLE BIT(13)
++# define DSI_CTRL_LPDT_EOT_DISABLE BIT(12)
++# define DSI_CTRL_HSDT_EOT_DISABLE BIT(11)
++# define DSI_CTRL_SOFT_RESET_CFG BIT(10)
++# define DSI_CTRL_CAL_BYTE BIT(9)
++# define DSI_CTRL_INV_BYTE BIT(8)
++# define DSI_CTRL_CLR_LDF BIT(7)
++# define DSI0_CTRL_CLR_PBCF BIT(6)
++# define DSI1_CTRL_CLR_RXF BIT(6)
++# define DSI0_CTRL_CLR_CPBCF BIT(5)
++# define DSI1_CTRL_CLR_PDF BIT(5)
++# define DSI0_CTRL_CLR_PDF BIT(4)
++# define DSI1_CTRL_CLR_CDF BIT(4)
++# define DSI0_CTRL_CLR_CDF BIT(3)
++# define DSI0_CTRL_CTRL2 BIT(2)
++# define DSI1_CTRL_DISABLE_DISP_CRCC BIT(2)
++# define DSI0_CTRL_CTRL1 BIT(1)
++# define DSI1_CTRL_DISABLE_DISP_ECCC BIT(1)
++# define DSI0_CTRL_CTRL0 BIT(0)
++# define DSI1_CTRL_EN BIT(0)
++# define DSI0_CTRL_RESET_FIFOS (DSI_CTRL_CLR_LDF | \
++ DSI0_CTRL_CLR_PBCF | \
++ DSI0_CTRL_CLR_CPBCF | \
++ DSI0_CTRL_CLR_PDF | \
++ DSI0_CTRL_CLR_CDF)
++# define DSI1_CTRL_RESET_FIFOS (DSI_CTRL_CLR_LDF | \
++ DSI1_CTRL_CLR_RXF | \
++ DSI1_CTRL_CLR_PDF | \
++ DSI1_CTRL_CLR_CDF)
++
++#define DSI1_TXPKT2C 0x0c
++#define DSI1_TXPKT2H 0x10
++#define DSI1_TXPKT_PIX_FIFO 0x20
++#define DSI1_RXPKT_FIFO 0x24
++#define DSI1_DISP0_CTRL 0x28
++#define DSI1_INT_STAT 0x30
++#define DSI1_INT_EN 0x34
++
++/* State reporting bits. These mostly behave like INT_STAT, where
++ * writing a 1 clears the bit.
++ */
++#define DSI1_STAT 0x38
++# define DSI1_STAT_PHY_D3_ULPS BIT(31)
++# define DSI1_STAT_PHY_D3_STOP BIT(30)
++# define DSI1_STAT_PHY_D2_ULPS BIT(29)
++# define DSI1_STAT_PHY_D2_STOP BIT(28)
++# define DSI1_STAT_PHY_D1_ULPS BIT(27)
++# define DSI1_STAT_PHY_D1_STOP BIT(26)
++# define DSI1_STAT_PHY_D0_ULPS BIT(25)
++# define DSI1_STAT_PHY_D0_STOP BIT(24)
++# define DSI1_STAT_FIFO_ERR BIT(23)
++# define DSI1_STAT_PHY_RXLPDT BIT(22)
++# define DSI1_STAT_PHY_RXTRIG BIT(21)
++# define DSI1_STAT_PHY_D0_LPDT BIT(20)
++/* Set when in forward direction */
++# define DSI1_STAT_PHY_DIR BIT(19)
++# define DSI1_STAT_PHY_CLOCK_ULPS BIT(18)
++# define DSI1_STAT_PHY_CLOCK_HS BIT(17)
++# define DSI1_STAT_PHY_CLOCK_STOP BIT(16)
++# define DSI1_STAT_PR_TO BIT(15)
++# define DSI1_STAT_TA_TO BIT(14)
++# define DSI1_STAT_LPRX_TO BIT(13)
++# define DSI1_STAT_HSTX_TO BIT(12)
++# define DSI1_STAT_ERR_CONT_LP1 BIT(11)
++# define DSI1_STAT_ERR_CONT_LP0 BIT(10)
++# define DSI1_STAT_ERR_CONTROL BIT(9)
++# define DSI1_STAT_ERR_SYNC_ESC BIT(8)
++# define DSI1_STAT_RXPKT2 BIT(7)
++# define DSI1_STAT_RXPKT1 BIT(6)
++# define DSI1_STAT_TXPKT2_BUSY BIT(5)
++# define DSI1_STAT_TXPKT2_DONE BIT(4)
++# define DSI1_STAT_TXPKT2_END BIT(3)
++# define DSI1_STAT_TXPKT1_BUSY BIT(2)
++# define DSI1_STAT_TXPKT1_DONE BIT(1)
++# define DSI1_STAT_TXPKT1_END BIT(0)
++
++#define DSI1_HSTX_TO_CNT 0x3c
++#define DSI1_LPRX_TO_CNT 0x40
++#define DSI1_TA_TO_CNT 0x44
++#define DSI1_PR_TO_CNT 0x48
++#define DSI1_PHYC 0x4c
++
++#define DSI1_HS_CLT0 0x50
++# define DSI_HS_CLT0_CZERO_MASK VC4_MASK(26, 18)
++# define DSI_HS_CLT0_CZERO_SHIFT 18
++# define DSI_HS_CLT0_CPRE_MASK VC4_MASK(17, 9)
++# define DSI_HS_CLT0_CPRE_SHIFT 9
++# define DSI_HS_CLT0_CPREP_MASK VC4_MASK(8, 0)
++# define DSI_HS_CLT0_CPREP_SHIFT 0
++
++#define DSI1_HS_CLT1 0x54
++# define DSI_HS_CLT1_CTRAIL_MASK VC4_MASK(17, 9)
++# define DSI_HS_CLT1_CTRAIL_SHIFT 9
++# define DSI_HS_CLT1_CPOST_MASK VC4_MASK(8, 0)
++# define DSI_HS_CLT1_CPOST_SHIFT 0
++
++#define DSI1_HS_CLT2 0x58
++# define DSI_HS_CLT2_WUP_MASK VC4_MASK(23, 0)
++# define DSI_HS_CLT2_WUP_SHIFT 0
++
++#define DSI1_HS_DLT3 0x5c
++# define DSI_HS_DLT3_EXIT_MASK VC4_MASK(26, 18)
++# define DSI_HS_DLT3_EXIT_SHIFT 18
++# define DSI_HS_DLT3_ZERO_MASK VC4_MASK(17, 9)
++# define DSI_HS_DLT3_ZERO_SHIFT 9
++# define DSI_HS_DLT3_PRE_MASK VC4_MASK(8, 0)
++# define DSI_HS_DLT3_PRE_SHIFT 0
++
++#define DSI1_HS_DLT4 0x60
++# define DSI_HS_DLT4_ANLAT_MASK VC4_MASK(22, 18)
++# define DSI_HS_DLT4_ANLAT_SHIFT 18
++# define DSI_HS_DLT4_TRAIL_MASK VC4_MASK(17, 9)
++# define DSI_HS_DLT4_TRAIL_SHIFT 9
++# define DSI_HS_DLT4_LPX_MASK VC4_MASK(8, 0)
++# define DSI_HS_DLT4_LPX_SHIFT 0
++
++#define DSI1_HS_DLT5 0x64
++# define DSI_HS_DLT5_INIT_MASK VC4_MASK(23, 0)
++# define DSI_HS_DLT5_INIT_SHIFT 0
++
++#define DSI1_HS_DLT6 0x68
++# define DSI_HS_DLT6_TA_GET_MASK VC4_MASK(31, 24)
++# define DSI_HS_DLT6_TA_GET_SHIFT 24
++# define DSI_HS_DLT6_TA_SURE_MASK VC4_MASK(23, 16)
++# define DSI_HS_DLT6_TA_SURE_SHIFT 16
++# define DSI_HS_DLT6_TA_GO_MASK VC4_MASK(15, 8)
++# define DSI_HS_DLT6_TA_GO_SHIFT 8
++# define DSI_HS_DLT6_LP_LPX_MASK VC4_MASK(7, 0)
++# define DSI_HS_DLT6_LP_LPX_SHIFT 0
++
++#define DSI1_HS_DLT7 0x6c
++# define DSI_HS_DLT7_LP_WUP_MASK VC4_MASK(23, 0)
++# define DSI_HS_DLT7_LP_WUP_SHIFT 0
++
++#define DSI1_PHY_AFEC0 0x70
++
++#define DSI1_PHY_AFEC1 0x74
++# define DSI1_PHY_AFEC1_ACTRL_DLANE3_MASK VC4_MASK(19, 16)
++# define DSI1_PHY_AFEC1_ACTRL_DLANE3_SHIFT 16
++# define DSI1_PHY_AFEC1_ACTRL_DLANE2_MASK VC4_MASK(15, 12)
++# define DSI1_PHY_AFEC1_ACTRL_DLANE2_SHIFT 12
++# define DSI1_PHY_AFEC1_ACTRL_DLANE1_MASK VC4_MASK(11, 8)
++# define DSI1_PHY_AFEC1_ACTRL_DLANE1_SHIFT 8
++# define DSI1_PHY_AFEC1_ACTRL_DLANE0_MASK VC4_MASK(7, 4)
++# define DSI1_PHY_AFEC1_ACTRL_DLANE0_SHIFT 4
++# define DSI1_PHY_AFEC1_ACTRL_CLANE_MASK VC4_MASK(3, 0)
++# define DSI1_PHY_AFEC1_ACTRL_CLANE_SHIFT 0
++
++#define DSI1_TST_SEL 0x78
++#define DSI1_TST_MON 0x7c
++#define DSI1_PHY_TST1 0x80
++#define DSI1_PHY_TST2 0x84
++#define DSI1_PHY_FIFO_STAT 0x88
++/* Actually, all registers in the range that aren't otherwise claimed
++ * will return the ID.
++ */
++#define DSI1_ID 0x8c
++
++/* General DSI hardware state. */
++struct vc4_dsi {
++ struct platform_device *pdev;
++
++ struct mipi_dsi_host dsi_host;
++ struct drm_encoder *encoder;
++ struct drm_connector *connector;
++ struct drm_panel *panel;
++
++ void __iomem *regs;
++
++ struct dma_chan *reg_dma_chan;
++ dma_addr_t reg_dma_paddr;
++ u32 *reg_dma_mem;
++ dma_addr_t reg_paddr;
++
++ /* Whether we're on bcm2835's DSI0 or DSI1. */
++ int port;
++
++ /* DSI channel for the panel we're connected to. */
++ u32 channel;
++ u32 lanes;
++ enum mipi_dsi_pixel_format format;
++ u32 mode_flags;
++
++ /* Input clock to the PHY, for the DSI escape clock. */
++ struct clk *escape_clock;
++
++ /* Input clock to the PHY, used to generate the DSI bit
++ * clock.
++ */
++ struct clk *pll_phy_clock;
++
++ /* Byte clock generated within the DSI PHY. */
++ struct clk_hw phy_byte_clock;
++
++ struct clk_onecell_data clk_onecell;
++
++ /* Pixel clock output to the pixelvalve, generated from the
++ * byte clock.
++ */
++ struct clk *pixel_clock;
++
++ struct completion xfer_completion;
++ int xfer_result;
++
++ bool use_firmware_setup;
++};
++
++static inline void
++dsi_write(struct vc4_dsi *dsi, u32 offset, u32 val)
++{
++ struct dma_chan *chan = dsi->reg_dma_chan;
++ struct dma_async_tx_descriptor *tx;
++ dma_cookie_t cookie;
++ int ret;
++
++#if 0 /* XXX */
++ dev_info(&dsi->pdev->dev, "WRITE 0x%04x -> 0x%08x\n", offset, val);
++#endif
++
++ if (!chan) {
++ writel(val, dsi->regs + offset);
++ return;
++ }
++
++ *dsi->reg_dma_mem = val;
++
++ tx = chan->device->device_prep_dma_memcpy(chan,
++ dsi->reg_paddr + offset,
++ dsi->reg_dma_paddr,
++ 4, 0);
++ if (!tx) {
++ DRM_ERROR("Failed to set up DMA register write\n");
++ return;
++ }
++
++ cookie = tx->tx_submit(tx);
++ ret = dma_submit_error(cookie);
++ if (ret) {
++ DRM_ERROR("Failed to submit DMA: %d\n", ret);
++ return;
++ }
++ ret = dma_sync_wait(chan, cookie);
++ if (ret)
++ DRM_ERROR("Failed to wait for DMA: %d\n", ret);
++
++#if 0 /* XXX */
++ if (offset != DSI1_TXPKT_CMD_FIFO &&
++ offset != DSI1_TXPKT_PIX_FIFO) {
++ dev_info(&dsi->pdev->dev,
++ " -> 0x%08x\n",
++ readl(dsi->regs + (offset)));
++ }
++#endif
++}
++
++#define DSI_READ(offset) readl(dsi->regs + (offset))
++#define DSI_WRITE(offset, val) dsi_write(dsi, offset, val)
++#define DSI_PORT_READ(offset) \
++ DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset)
++#define DSI_PORT_WRITE(offset, val) \
++ DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val)
++#define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit)
++
++/* VC4 DSI encoder KMS struct */
++struct vc4_dsi_encoder {
++ struct vc4_encoder base;
++ struct vc4_dsi *dsi;
++};
++
++static inline struct vc4_dsi_encoder *
++to_vc4_dsi_encoder(struct drm_encoder *encoder)
++{
++ return container_of(encoder, struct vc4_dsi_encoder, base.base);
++}
++#define host_to_dsi(host) container_of(host, struct vc4_dsi, dsi_host)
++
++/* VC4 DSI connector KMS struct */
++struct vc4_dsi_connector {
++ struct drm_connector base;
++ struct vc4_dsi *dsi;
++
++ /* Since the connector is attached to just the one encoder,
++ * this is the reference to it so we can do the best_encoder()
++ * hook.
++ */
++ struct drm_encoder *encoder;
++};
++
++static inline struct vc4_dsi_connector *
++to_vc4_dsi_connector(struct drm_connector *connector)
++{
++ return container_of(connector, struct vc4_dsi_connector, base);
++}
++
++static const struct debugfs_reg32 dsi0_regs[] = {
++ VC4_DEBUG_REG(DSI0_CTRL),
++ VC4_DEBUG_REG(DSI0_STAT),
++ VC4_DEBUG_REG(DSI0_DISP0_CTRL),
++ VC4_DEBUG_REG(DSI0_DISP1_CTRL),
++ VC4_DEBUG_REG(DSI0_PHYC),
++ VC4_DEBUG_REG(DSI0_STAT),
++ VC4_DEBUG_REG(DSI0_HS_CLT0),
++ VC4_DEBUG_REG(DSI0_HS_CLT1),
++ VC4_DEBUG_REG(DSI0_HS_CLT2),
++ VC4_DEBUG_REG(DSI0_HS_DLT3),
++ VC4_DEBUG_REG(DSI0_HS_DLT4),
++ VC4_DEBUG_REG(DSI0_HS_DLT5),
++ VC4_DEBUG_REG(DSI0_HS_DLT6),
++ VC4_DEBUG_REG(DSI0_HS_DLT7),
++ VC4_DEBUG_REG(DSI0_PHY_AFEC0),
++ VC4_DEBUG_REG(DSI0_PHY_AFEC1),
++ VC4_DEBUG_REG(DSI0_ID),
++};
++
++static const struct debugfs_reg32 dsi1_regs[] = {
++ VC4_DEBUG_REG(DSI1_CTRL),
++ VC4_DEBUG_REG(DSI1_STAT),
++ VC4_DEBUG_REG(DSI1_DISP0_CTRL),
++ VC4_DEBUG_REG(DSI1_DISP1_CTRL),
++ VC4_DEBUG_REG(DSI1_PHYC),
++ VC4_DEBUG_REG(DSI1_STAT),
++ VC4_DEBUG_REG(DSI1_HS_CLT0),
++ VC4_DEBUG_REG(DSI1_HS_CLT1),
++ VC4_DEBUG_REG(DSI1_HS_CLT2),
++ VC4_DEBUG_REG(DSI1_HS_DLT3),
++ VC4_DEBUG_REG(DSI1_HS_DLT4),
++ VC4_DEBUG_REG(DSI1_HS_DLT5),
++ VC4_DEBUG_REG(DSI1_HS_DLT6),
++ VC4_DEBUG_REG(DSI1_HS_DLT7),
++ VC4_DEBUG_REG(DSI1_PHY_AFEC0),
++ VC4_DEBUG_REG(DSI1_PHY_AFEC1),
++ VC4_DEBUG_REG(DSI1_ID),
++};
++
++static void vc4_dsi_dump_regs(struct vc4_dsi *dsi, const char *prefix)
++{
++ if (dsi->port == 0) {
++ vc4_dump_regs32(dsi0_regs, ARRAY_SIZE(dsi0_regs), dsi->regs,
++ prefix);
++ } else {
++ vc4_dump_regs32(dsi1_regs, ARRAY_SIZE(dsi1_regs), dsi->regs,
++ prefix);
++ }
++}
++
++#ifdef CONFIG_DEBUG_FS
++int vc4_dsi_debugfs_regs(struct seq_file *m, void *number)
++{
++ struct drm_info_node *node = (struct drm_info_node *)m->private;
++ struct drm_device *dev = node->minor->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_dsi *dsi;
++ int port = (uintptr_t)number;
++
++ if (port == 0) {
++ dsi = vc4->dsi0;
++ debugfs_print_regs32(m, dsi0_regs, ARRAY_SIZE(dsi0_regs),
++ dsi->regs, "");
++ } else {
++ dsi = vc4->dsi1;
++ debugfs_print_regs32(m, dsi1_regs, ARRAY_SIZE(dsi1_regs),
++ dsi->regs, "");
++ }
++
++ return 0;
++}
++#endif
++
++static enum drm_connector_status
++vc4_dsi_connector_detect(struct drm_connector *connector, bool force)
++{
++ struct vc4_dsi_connector *vc4_connector =
++ to_vc4_dsi_connector(connector);
++ struct vc4_dsi *dsi = vc4_connector->dsi;
++
++ if (dsi->panel)
++ return connector_status_connected;
++ else
++ return connector_status_disconnected;
++}
++
++static void vc4_dsi_connector_destroy(struct drm_connector *connector)
++{
++ drm_connector_unregister(connector);
++ drm_connector_cleanup(connector);
++}
++
++static int vc4_dsi_connector_get_modes(struct drm_connector *connector)
++{
++ struct vc4_dsi_connector *vc4_connector =
++ to_vc4_dsi_connector(connector);
++ struct vc4_dsi *dsi = vc4_connector->dsi;
++
++ if (dsi->panel)
++ return drm_panel_get_modes(dsi->panel);
++
++ return 0;
++}
++
++static struct drm_encoder *
++vc4_dsi_connector_best_encoder(struct drm_connector *connector)
++{
++ struct vc4_dsi_connector *dsi_connector =
++ to_vc4_dsi_connector(connector);
++ return dsi_connector->encoder;
++}
++
++static const struct drm_connector_funcs vc4_dsi_connector_funcs = {
++ .dpms = drm_atomic_helper_connector_dpms,
++ .detect = vc4_dsi_connector_detect,
++ .fill_modes = drm_helper_probe_single_connector_modes,
++ .destroy = vc4_dsi_connector_destroy,
++ .reset = drm_atomic_helper_connector_reset,
++ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
++ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
++};
++
++static const struct drm_connector_helper_funcs vc4_dsi_connector_helper_funcs = {
++ .get_modes = vc4_dsi_connector_get_modes,
++ .best_encoder = vc4_dsi_connector_best_encoder,
++};
++
++static struct drm_connector *vc4_dsi_connector_init(struct drm_device *dev,
++ struct vc4_dsi *dsi)
++{
++ struct drm_connector *connector = NULL;
++ struct vc4_dsi_connector *dsi_connector;
++ int ret = 0;
++
++ dsi_connector = devm_kzalloc(dev->dev, sizeof(*dsi_connector),
++ GFP_KERNEL);
++ if (!dsi_connector) {
++ ret = -ENOMEM;
++ goto fail;
++ }
++ connector = &dsi_connector->base;
++
++ dsi_connector->encoder = dsi->encoder;
++ dsi_connector->dsi = dsi;
++
++ drm_connector_init(dev, connector, &vc4_dsi_connector_funcs,
++ DRM_MODE_CONNECTOR_DSI);
++ drm_connector_helper_add(connector, &vc4_dsi_connector_helper_funcs);
++
++ connector->polled = 0;
++ connector->interlace_allowed = 0;
++ connector->doublescan_allowed = 0;
++
++ drm_mode_connector_attach_encoder(connector, dsi->encoder);
++
++ return connector;
++
++ fail:
++ if (connector)
++ vc4_dsi_connector_destroy(connector);
++
++ return ERR_PTR(ret);
++}
++
++static void vc4_dsi_encoder_destroy(struct drm_encoder *encoder)
++{
++ drm_encoder_cleanup(encoder);
++}
++
++static const struct drm_encoder_funcs vc4_dsi_encoder_funcs = {
++ .destroy = vc4_dsi_encoder_destroy,
++};
++
++static void vc4_dsi_latch_ulps(struct vc4_dsi *dsi, bool latch)
++{
++ u32 afec0 = DSI_PORT_READ(PHY_AFEC0);
++
++ if (latch)
++ afec0 |= DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS);
++ else
++ afec0 &= ~DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS);
++
++ DSI_PORT_WRITE(PHY_AFEC0, afec0);
++}
++
++/* Enters or exits Ultra Low Power State. */
++static void vc4_dsi_ulps(struct vc4_dsi *dsi, bool ulps)
++{
++ u32 phyc_ulps = (DSI_PORT_BIT(PHYC_CLANE_ULPS) |
++ DSI_PHYC_DLANE0_ULPS |
++ (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) |
++ (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) |
++ (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0));
++ u32 stat_ulps = (DSI1_STAT_PHY_CLOCK_ULPS |
++ DSI1_STAT_PHY_D0_ULPS |
++ (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) |
++ (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) |
++ (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0));
++ u32 stat_stop = (DSI1_STAT_PHY_CLOCK_STOP |
++ DSI1_STAT_PHY_D0_STOP |
++ (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) |
++ (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) |
++ (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0));
++ int ret;
++
++ DSI_PORT_WRITE(STAT, stat_ulps);
++ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) | phyc_ulps);
++ ret = wait_for((DSI_PORT_READ(STAT) & stat_ulps) == stat_ulps, 20);
++ if (ret) {
++ dev_warn(&dsi->pdev->dev,
++ "Timeout waiting for DSI ULPS entry: STAT 0x%08x",
++ DSI_PORT_READ(STAT));
++ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
++ vc4_dsi_latch_ulps(dsi, false);
++ return;
++ }
++
++ /* The DSI module can't be disabled while the module is
++ * generating ULPS state. So, to be able to disable the
++ * module, we have the AFE latch the ULPS state and continue
++ * on to having the module enter STOP.
++ */
++ vc4_dsi_latch_ulps(dsi, ulps);
++
++ DSI_PORT_WRITE(STAT, stat_stop);
++ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
++ ret = wait_for((DSI_PORT_READ(STAT) & stat_stop) == stat_stop, 20);
++ if (ret) {
++ dev_warn(&dsi->pdev->dev,
++ "Timeout waiting for DSI STOP entry: STAT 0x%08x",
++ DSI_PORT_READ(STAT));
++ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
++ return;
++ }
++}
++
++static uint32_t
++dsi_hs_timing(u32 ui_ns, u32 ns, u32 ui)
++{
++ /* The HS timings have to be rounded up to a multiple of 8
++ * because we're using the byte clock.
++ */
++ return roundup(ui + DIV_ROUND_UP(ns, ui_ns), 8);
++}
++
++/* ESC always runs at 100Mhz. */
++#define ESC_TIME_NS 10
++
++static uint32_t
++dsi_esc_timing(u32 ns)
++{
++ return DIV_ROUND_UP(ns, ESC_TIME_NS);
++}
++
++static void vc4_dsi_encoder_disable(struct drm_encoder *encoder)
++{
++ struct vc4_dsi_encoder *vc4_encoder = to_vc4_dsi_encoder(encoder);
++ struct vc4_dsi *dsi = vc4_encoder->dsi;
++
++ drm_panel_disable(dsi->panel);
++
++ if (!dsi->use_firmware_setup)
++ vc4_dsi_ulps(dsi, true);
++
++ drm_panel_unprepare(dsi->panel);
++
++ if (dsi->use_firmware_setup) {
++ /* Since we're using the firmware setup and aren't
++ * communicating with the panel to bring the link
++ * down, we need to just keep the clocks and DSI
++ * module running.
++ */
++ } else {
++ clk_disable_unprepare(dsi->pll_phy_clock);
++ clk_disable_unprepare(dsi->escape_clock);
++ clk_disable_unprepare(dsi->pixel_clock);
++ }
++}
++
++static void vc4_dsi_encoder_enable(struct drm_encoder *encoder)
++{
++ struct drm_display_mode *mode = &encoder->crtc->mode;
++ struct vc4_dsi_encoder *vc4_encoder = to_vc4_dsi_encoder(encoder);
++ struct vc4_dsi *dsi = vc4_encoder->dsi;
++ struct device *dev = &dsi->pdev->dev;
++ uint32_t format = 0, divider = 0;
++ bool debug_dump_regs = false;
++ unsigned long hs_clock;
++ uint32_t ui_ns;
++ /* Minimum LP state duration in escape clock cycles. */
++ uint32_t lpx = dsi_esc_timing(60);
++ uint32_t phyc;
++ int ret;
++
++ ret = drm_panel_prepare(dsi->panel);
++ if (ret) {
++ DRM_ERROR("Panel failed to prepare\n");
++ return;
++ }
++
++ if (debug_dump_regs)
++ vc4_dsi_dump_regs(dsi, "DSI before: ");
++
++ /* XXX */
++ if (!dsi->use_firmware_setup) {
++ ret = clk_set_rate(dsi->pll_phy_clock, 2020000000 / 3);
++ if (ret)
++ dev_err(&dsi->pdev->dev, "Failed to set phy clock: %d\n", ret);
++ dev_info(&dsi->pdev->dev, "Tried to set clock to: %d\n", 2000000000 / 3);
++
++ ret = clk_prepare_enable(dsi->escape_clock);
++ if (ret) {
++ DRM_ERROR("Failed to turn on DSI escape clock: %d\n", ret);
++ return;
++ }
++
++ ret = clk_prepare_enable(dsi->pll_phy_clock);
++ if (ret) {
++ DRM_ERROR("Failed to turn on DSI PLL: %d\n", ret);
++ return;
++ }
++
++ ret = clk_set_rate(dsi->pixel_clock, mode->clock * 1000);
++ if (ret)
++ dev_err(dev, "Failed to set pixel clock: %d\n", ret);
++ dev_info(&dsi->pdev->dev, "Tried to set pixel clock to: %d\n", mode->clock * 1000);
++
++ ret = clk_prepare_enable(dsi->pixel_clock);
++ if (ret) {
++ DRM_ERROR("Failed to turn on DSI pixel clock: %d\n", ret);
++ return;
++ }
++ }
++
++ hs_clock = clk_get_rate(dsi->pll_phy_clock);
++
++ /* Reset the DSI and all its fifos. */
++ if (dsi->port == 0) {
++ DSI_PORT_WRITE(CTRL,
++ DSI_CTRL_SOFT_RESET_CFG |
++ DSI0_CTRL_RESET_FIFOS);
++ } else {
++ DSI_PORT_WRITE(CTRL,
++ DSI_CTRL_SOFT_RESET_CFG |
++ DSI1_CTRL_RESET_FIFOS);
++ }
++
++ DSI_PORT_WRITE(CTRL,
++ DSI_CTRL_HSDT_EOT_DISABLE |
++ DSI_CTRL_RX_LPDT_EOT_DISABLE);
++
++ switch (dsi->format) {
++ case MIPI_DSI_FMT_RGB888:
++ format = DSI_PFORMAT_RGB888;
++ divider = 24 / dsi->lanes;
++ break;
++ case MIPI_DSI_FMT_RGB666:
++ format = DSI_PFORMAT_RGB666;
++ divider = 24 / dsi->lanes;
++ break;
++ case MIPI_DSI_FMT_RGB666_PACKED:
++ format = DSI_PFORMAT_RGB666_PACKED;
++ divider = 18 / dsi->lanes;
++ break;
++ case MIPI_DSI_FMT_RGB565:
++ format = DSI_PFORMAT_RGB565;
++ divider = 16 / dsi->lanes;
++ break;
++ }
++
++ /* Set AFE CTR00/CTR1 to release powerdown of analog. */
++ if (dsi->port == 0) {
++ u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) |
++ VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ));
++
++ if (dsi->lanes < 2)
++ afec0 |= DSI0_PHY_AFEC0_PD_DLANE1;
++
++ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO))
++ afec0 |= DSI0_PHY_AFEC0_RESET;
++
++ DSI_PORT_WRITE(PHY_AFEC0, afec0);
++
++ DSI_PORT_WRITE(PHY_AFEC1,
++ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE1) |
++ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE0) |
++ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_CLANE));
++ } else {
++ u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) |
++ VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ) |
++ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_CLANE) |
++ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE0) |
++ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE1) |
++ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE2) |
++ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE3));
++
++ if (dsi->lanes < 4)
++ afec0 |= DSI1_PHY_AFEC0_PD_DLANE3;
++ if (dsi->lanes < 3)
++ afec0 |= DSI1_PHY_AFEC0_PD_DLANE2;
++ if (dsi->lanes < 2)
++ afec0 |= DSI1_PHY_AFEC0_PD_DLANE1;
++
++ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO))
++ afec0 |= DSI1_PHY_AFEC0_RESET;
++
++ DSI_PORT_WRITE(PHY_AFEC0, afec0);
++
++ DSI_PORT_WRITE(PHY_AFEC1, 0);
++ }
++
++ /* How many ns one DSI unit interval is. Note that the clock
++ * is DDR, so there's an extra divide by 2.
++ */
++ ui_ns = DIV_ROUND_UP(500000000, hs_clock);
++
++ DSI_PORT_WRITE(HS_CLT0,
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 262, 0),
++ DSI_HS_CLT0_CZERO) |
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 0, 8),
++ DSI_HS_CLT0_CPRE) |
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 38, 0),
++ DSI_HS_CLT0_CPREP));
++
++ DSI_PORT_WRITE(HS_CLT1,
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 0),
++ DSI_HS_CLT1_CTRAIL) |
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 52),
++ DSI_HS_CLT1_CPOST));
++
++ DSI_PORT_WRITE(HS_CLT2,
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000000, 0),
++ DSI_HS_CLT2_WUP));
++
++ DSI_PORT_WRITE(HS_DLT3,
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 100, 0),
++ DSI_HS_DLT3_EXIT) |
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 105, 6),
++ DSI_HS_DLT3_ZERO) |
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 40, 4),
++ DSI_HS_DLT3_PRE));
++
++ DSI_PORT_WRITE(HS_DLT4,
++ VC4_SET_FIELD(dsi_hs_timing(ui_ns, lpx * ESC_TIME_NS, 0),
++ DSI_HS_DLT4_LPX) |
++ VC4_SET_FIELD(max(dsi_hs_timing(ui_ns, 0, 8),
++ dsi_hs_timing(ui_ns, 60, 4)),
++ DSI_HS_DLT4_TRAIL) |
++ VC4_SET_FIELD(0, DSI_HS_DLT4_ANLAT));
++
++ DSI_PORT_WRITE(HS_DLT5, VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000, 5000),
++ DSI_HS_DLT5_INIT));
++
++ DSI_PORT_WRITE(HS_DLT6,
++ VC4_SET_FIELD(lpx * 5, DSI_HS_DLT6_TA_GET) |
++ VC4_SET_FIELD(lpx, DSI_HS_DLT6_TA_SURE) |
++ VC4_SET_FIELD(lpx * 4, DSI_HS_DLT6_TA_GO) |
++ VC4_SET_FIELD(lpx, DSI_HS_DLT6_LP_LPX));
++
++ DSI_PORT_WRITE(HS_DLT7,
++ VC4_SET_FIELD(dsi_esc_timing(1000000),
++ DSI_HS_DLT7_LP_WUP));
++
++ /* Define EOT PKT in EOT reg. */
++
++ phyc = (DSI_PHYC_DLANE0_ENABLE |
++ (dsi->lanes >= 2 ? DSI_PHYC_DLANE1_ENABLE : 0) |
++ (dsi->lanes >= 3 ? DSI_PHYC_DLANE2_ENABLE : 0) |
++ (dsi->lanes >= 4 ? DSI_PHYC_DLANE3_ENABLE : 0) |
++ (dsi->port == 0 ?
++ VC4_SET_FIELD(lpx - 1, DSI0_PHYC_ESC_CLK_LPDT) :
++ VC4_SET_FIELD(lpx - 1, DSI1_PHYC_ESC_CLK_LPDT)) |
++ DSI_PORT_BIT(PHYC_CLANE_ENABLE));
++
++ DSI_PORT_WRITE(CTRL,
++ DSI_PORT_READ(CTRL) |
++ DSI_CTRL_CAL_BYTE);
++
++ /* HS timeout in HS clock cycles: disabled. */
++ DSI_PORT_WRITE(HSTX_TO_CNT, 0);
++ /* LP receive timeout in HS clocks. */
++ DSI_PORT_WRITE(LPRX_TO_CNT, 0xffffff);
++ /* Bus turnaround timeout */
++ DSI_PORT_WRITE(TA_TO_CNT, 100000);
++ /* Display reset sequence timeout */
++ DSI_PORT_WRITE(TA_TO_CNT, 100000);
++
++ if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
++ DSI_PORT_WRITE(DISP0_CTRL,
++ VC4_SET_FIELD(divider, DSI_DISP0_PIX_CLK_DIV) |
++ VC4_SET_FIELD(format, DSI_DISP0_PFORMAT) |
++ VC4_SET_FIELD(DSI_DISP0_LP_STOP_PERFRAME,
++ DSI_DISP0_LP_STOP_CTRL) |
++ DSI_DISP0_ST_END |
++ DSI_DISP0_ENABLE);
++ } else {
++ DSI_PORT_WRITE(DISP0_CTRL,
++ DSI_DISP0_COMMAND_MODE |
++ DSI_DISP0_ENABLE);
++ }
++
++ /* Set up DISP1 for transferring long command payloads through
++ * the pixfifo.
++ */
++ DSI_PORT_WRITE(DISP1_CTRL,
++ VC4_SET_FIELD(DSI_DISP1_PFORMAT_32BIT_LE,
++ DSI_DISP1_PFORMAT) |
++ DSI_DISP1_ENABLE);
++
++ if (!(dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
++ phyc |= DSI_PORT_BIT(PHYC_HS_CLK_CONTINUOUS);
++
++ DSI_PORT_WRITE(PHYC, phyc);
++
++ /* Ungate the block. */
++ if (dsi->port == 0)
++ DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI0_CTRL_CTRL0);
++ else {
++ DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
++ }
++
++ if (!dsi->use_firmware_setup)
++ vc4_dsi_ulps(dsi, false);
++
++ if (debug_dump_regs)
++ vc4_dsi_dump_regs(dsi, "DSI after: ");
++
++ ret = drm_panel_enable(dsi->panel);
++ if (ret) {
++ DRM_ERROR("Panel failed to enable\n");
++ drm_panel_unprepare(dsi->panel);
++ return;
++ }
++}
++
++static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
++ const struct mipi_dsi_msg *msg)
++{
++ struct vc4_dsi *dsi = host_to_dsi(host);
++ struct mipi_dsi_packet packet;
++ u32 pkth = 0, pktc = 0;
++ int i, ret;
++ bool is_long = mipi_dsi_packet_format_is_long(msg->type);
++ u32 cmd_fifo_len = 0, pix_fifo_len = 0;
++
++ mipi_dsi_create_packet(&packet, msg);
++ pr_err("DSI host xfer %db, %s\n",
++ packet.payload_length,
++ is_long ? "long" : "short");
++
++ pkth |= VC4_SET_FIELD(packet.header[0], DSI_TXPKT1H_BC_DT);
++ pkth |= VC4_SET_FIELD(packet.header[1] |
++ (packet.header[2] << 8),
++ DSI_TXPKT1H_BC_PARAM);
++ if (is_long) {
++ /* Divide data across the various FIFOs we have available.
++ * The command FIFO takes byte-oriented data, but is of
++ * limited size. The pixel FIFO (never actually used for
++ * pixel data in reality) is word oriented, and substantially
++ * larger. So, we use the pixel FIFO for most of the data,
++ * sending the residual bytes in the command FIFO at the start.
++ *
++ * With this arrangement, the command FIFO will never get full.
++ */
++ cmd_fifo_len = packet.payload_length % DSI_PIX_FIFO_WIDTH;
++ pix_fifo_len = ((packet.payload_length - cmd_fifo_len) /
++ DSI_PIX_FIFO_WIDTH);
++
++ WARN_ON_ONCE(pix_fifo_len >= DSI_PIX_FIFO_DEPTH);
++
++ pkth |= VC4_SET_FIELD(cmd_fifo_len, DSI_TXPKT1H_BC_CMDFIFO);
++ }
++
++ if (msg->rx_len) {
++ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_CMD_CTRL_RX,
++ DSI_TXPKT1C_CMD_CTRL);
++ } else {
++ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_CMD_CTRL_TX,
++ DSI_TXPKT1C_CMD_CTRL);
++ }
++
++ dev_info(&dsi->pdev->dev, "FIFO setup: %d, %d\n",
++ cmd_fifo_len, pix_fifo_len);
++
++ for (i = 0; i < cmd_fifo_len; i++)
++ DSI_PORT_WRITE(TXPKT_CMD_FIFO, packet.payload[i]);
++ for (i = 0; i < pix_fifo_len; i++) {
++ const uint8_t *pix = packet.payload + cmd_fifo_len + i * 4;
++ DSI_PORT_WRITE(TXPKT_PIX_FIFO,
++ pix[0] |
++ pix[1] << 8 |
++ pix[2] << 16 |
++ pix[3] << 24);
++ }
++
++ if (msg->flags & MIPI_DSI_MSG_USE_LPM)
++ pktc |= DSI_TXPKT1C_CMD_MODE_LP;
++ if (is_long)
++ pktc |= DSI_TXPKT1C_CMD_TYPE_LONG;
++
++ /* Send one copy of the packet. Larger repeats are used for pixel
++ * data in command mode.
++ */
++ pktc |= VC4_SET_FIELD(1, DSI_TXPKT1C_CMD_REPEAT);
++
++ pktc |= DSI_TXPKT1C_CMD_EN;
++ if (pix_fifo_len) {
++ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_DISPLAY_NO_SECONDARY,
++ DSI_TXPKT1C_DISPLAY_NO);
++ } else {
++ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_DISPLAY_NO_SHORT,
++ DSI_TXPKT1C_DISPLAY_NO);
++ }
++
++ /* Enable the appropriate interrupt for the transfer completion. */
++ dsi->xfer_result = 0;
++ reinit_completion(&dsi->xfer_completion);
++ DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
++ if (msg->rx_len) {
++ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
++ DSI1_INT_PHY_DIR_RTF));
++ } else {
++ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
++ DSI1_INT_TXPKT1_DONE));
++ }
++
++ /* Send the packet. */
++ DSI_PORT_WRITE(TXPKT1H, pkth);
++ DSI_PORT_WRITE(TXPKT1C, pktc);
++
++ if (!wait_for_completion_timeout(&dsi->xfer_completion,
++ msecs_to_jiffies(100))) {
++ u32 stat = DSI_PORT_READ(STAT);
++
++ dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
++ dev_err(&dsi->pdev->dev, "INT_STAT: 0x%08x, STAT: 0x%08x\n",
++ DSI_PORT_READ(INT_STAT), stat);
++
++ if (stat & DSI1_STAT_TXPKT1_DONE) {
++ dev_info(&dsi->pdev->dev,
++ "STAT reports DONE, though.\n");
++ ret = 0;
++ } else {
++ ret = -ETIMEDOUT;
++ }
++ } else {
++ ret = dsi->xfer_result;
++ }
++
++ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
++ if (ret)
++ goto reset_fifo_and_return;
++
++ if (ret == 0 && msg->rx_len) {
++ u32 rxpkt1h = DSI_PORT_READ(RXPKT1H);
++ u8 *msg_rx = msg->rx_buf;
++
++ if (rxpkt1h & DSI_RXPKT1H_PKT_TYPE_LONG) {
++ u32 rxlen = VC4_GET_FIELD(rxpkt1h, DSI_RXPKT1H_BC_PARAM);
++
++ if (rxlen != msg->rx_len) {
++ DRM_ERROR("DSI returned %db, expecting %db\n",
++ rxlen, msg->rx_len);
++ ret = -ENXIO;
++ goto reset_fifo_and_return;
++ }
++
++ for (i = 0; i < msg->rx_len; i++)
++ msg_rx[i] = DSI_READ(DSI1_RXPKT_FIFO);
++ } else {
++ /* XXX: AWER */
++
++ msg_rx[0] = VC4_GET_FIELD(rxpkt1h,
++ DSI_RXPKT1H_SHORT_0);
++ if (msg->rx_len > 1) {
++ msg_rx[1] = VC4_GET_FIELD(rxpkt1h,
++ DSI_RXPKT1H_SHORT_1);
++ }
++ }
++ }
++
++ return ret;
++
++reset_fifo_and_return:
++ DRM_ERROR("DSI TRANSFER failed, resetting: %d\n", ret);
++
++ DSI_PORT_WRITE(TXPKT1C, DSI_PORT_READ(TXPKT1C) & ~DSI_TXPKT1C_CMD_EN);
++ udelay(1);
++ if (dsi->port == 0) {
++ DSI_PORT_WRITE(CTRL,
++ DSI_PORT_READ(CTRL) | DSI0_CTRL_RESET_FIFOS);
++ } else {
++ DSI_PORT_WRITE(CTRL,
++ DSI_PORT_READ(CTRL) | DSI1_CTRL_RESET_FIFOS);
++ }
++
++ DSI_PORT_WRITE(TXPKT1C, 0);
++ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
++
++
++ return ret;
++}
++
++static int vc4_dsi_host_attach(struct mipi_dsi_host *host,
++ struct mipi_dsi_device *device)
++{
++ struct vc4_dsi *dsi = host_to_dsi(host);
++
++ dsi->lanes = device->lanes;
++ dsi->channel = device->channel;
++ dsi->format = device->format;
++ dsi->mode_flags = device->mode_flags;
++
++ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO)) {
++ dev_err(&dsi->pdev->dev,
++ "Only VIDEO mode panels supported currently.\n");
++ return 0;
++ }
++
++ dsi->panel = of_drm_find_panel(device->dev.of_node);
++ if (dsi->panel)
++ return drm_panel_attach(dsi->panel, dsi->connector);
++
++ drm_helper_hpd_irq_event(dsi->connector->dev);
++
++ return 0;
++}
++
++static int vc4_dsi_host_detach(struct mipi_dsi_host *host,
++ struct mipi_dsi_device *device)
++{
++ struct vc4_dsi *dsi = host_to_dsi(host);
++
++ if (dsi->panel) {
++ int ret = drm_panel_detach(dsi->panel);
++ if (ret)
++ return ret;
++
++ dsi->panel = NULL;
++ }
++
++ drm_helper_hpd_irq_event(dsi->connector->dev);
++
++ return 0;
++}
++
++static const struct mipi_dsi_host_ops vc4_dsi_host_ops = {
++ .attach = vc4_dsi_host_attach,
++ .detach = vc4_dsi_host_detach,
++ .transfer = vc4_dsi_host_transfer,
++};
++
++static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = {
++ .disable = vc4_dsi_encoder_disable,
++ .enable = vc4_dsi_encoder_enable,
++};
++
++static const struct of_device_id vc4_dsi_dt_match[] = {
++ { .compatible = "brcm,bcm2835-dsi0", (void *)(uintptr_t)0 },
++ { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 },
++ {}
++};
++
++static long vc4_dsi_byte_clock_round_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long *parent_rate)
++{
++ return *parent_rate / 8;
++}
++
++static unsigned long vc4_dsi_byte_clock_get_rate(struct clk_hw *hw,
++ unsigned long parent_rate)
++{
++ return parent_rate / 8;
++}
++
++static int vc4_dsi_byte_clock_set_rate(struct clk_hw *hw,
++ unsigned long rate,
++ unsigned long parent_rate)
++{
++ return 0;
++}
++
++/* The byte clock has *no* ops filled. It's always running when the
++ * PHY is.
++ */
++static const struct clk_ops vc4_dsi_byte_clock_ops = {
++ .recalc_rate = vc4_dsi_byte_clock_get_rate,
++ .set_rate = vc4_dsi_byte_clock_set_rate,
++ .round_rate = vc4_dsi_byte_clock_round_rate,
++};
++
++static void dsi_handle_error(struct vc4_dsi *dsi,
++ irqreturn_t *ret, u32 stat, u32 bit,
++ const char *type)
++{
++ if (!(stat & bit))
++ return;
++
++ DRM_ERROR("DSI%d: %s error\n", dsi->port, type);
++ *ret = IRQ_HANDLED;
++}
++
++static irqreturn_t vc4_dsi_irq_handler(int irq, void *data)
++{
++ struct vc4_dsi *dsi = data;
++ u32 stat = DSI_PORT_READ(INT_STAT);
++ irqreturn_t ret = IRQ_NONE;
++
++ DSI_PORT_WRITE(INT_STAT, stat);
++
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_ERR_SYNC_ESC, "LPDT sync");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_ERR_CONTROL, "data lane 0 sequence");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_ERR_CONT_LP0, "LP0 contention");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_ERR_CONT_LP1, "LP1 contention");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_HSTX_TO, "HSTX timeout");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_LPRX_TO, "LPRX timeout");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_TA_TO, "turnaround timeout");
++ dsi_handle_error(dsi, &ret, stat,
++ DSI1_INT_PR_TO, "peripheral reset timeout");
++
++ if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) {
++ complete(&dsi->xfer_completion);
++ ret = IRQ_HANDLED;
++ } else if (stat & DSI1_INT_HSTX_TO) {
++ complete(&dsi->xfer_completion);
++ dsi->xfer_result = -ETIMEDOUT;
++ ret = IRQ_HANDLED;
++ }
++
++ return ret;
++}
++
++static int
++vc4_dsi_init_phy_byte_clock(struct vc4_dsi *dsi)
++{
++ struct device *dev = &dsi->pdev->dev;
++ const char *parent_name = __clk_get_name(dsi->pll_phy_clock);
++ struct clk_init_data init;
++ struct clk *clk;
++
++ memset(&init, 0, sizeof(init));
++ init.parent_names = &parent_name;
++ init.num_parents = 1;
++ if (dsi->port == 1)
++ init.name = "dsi1_byte";
++ else
++ init.name = "dsi0_byte";
++ init.ops = &vc4_dsi_byte_clock_ops;
++ init.flags = 0;
++
++ dsi->phy_byte_clock.init = &init;
++ clk = devm_clk_register(dev, &dsi->phy_byte_clock);
++ if (IS_ERR(clk))
++ return PTR_ERR(clk);
++
++ /* Use the onecell provider because we may need to expose the
++ * DDR and DDR2 clocks at some point, which we'd want to put
++ * in slots 1 and 2.
++ */
++ dsi->clk_onecell.clk_num = 1;
++ dsi->clk_onecell.clks = devm_kcalloc(dev,
++ dsi->clk_onecell.clk_num,
++ sizeof(*dsi->clk_onecell.clks),
++ GFP_KERNEL);
++ if (!dsi->clk_onecell.clks)
++ return -ENOMEM;
++
++ dsi->clk_onecell.clks[0] = clk;
++
++ return of_clk_add_provider(dev->of_node,
++ of_clk_src_onecell_get,
++ &dsi->clk_onecell);
++}
++
++static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct drm_device *drm = dev_get_drvdata(master);
++ struct vc4_dev *vc4 = to_vc4_dev(drm);
++ struct vc4_dsi *dsi;
++ struct vc4_dsi_encoder *vc4_dsi_encoder;
++ const struct of_device_id *match;
++ dma_cap_mask_t dma_mask;
++ int ret;
++
++ dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
++ if (!dsi)
++ return -ENOMEM;
++
++ match = of_match_device(vc4_dsi_dt_match, dev);
++ if (!match)
++ return -ENODEV;
++
++ dsi->port = (uintptr_t)match->data;
++
++ vc4_dsi_encoder = devm_kzalloc(dev, sizeof(*vc4_dsi_encoder),
++ GFP_KERNEL);
++ if (!vc4_dsi_encoder)
++ return -ENOMEM;
++ vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1;
++ vc4_dsi_encoder->dsi = dsi;
++ dsi->encoder = &vc4_dsi_encoder->base.base;
++
++ dsi->pdev = pdev;
++ dsi->regs = vc4_ioremap_regs(pdev, 0);
++ if (IS_ERR(dsi->regs))
++ return PTR_ERR(dsi->regs);
++
++ if (DSI_PORT_READ(ID) != DSI_ID_VALUE) {
++ dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
++ DSI_PORT_READ(ID), DSI_ID_VALUE);
++ return -ENODEV;
++ }
++
++ if (DSI_PORT_READ(CTRL) == 0) {
++ dev_info(dev, "DSI not set up by firmware.\n");
++ return 0;
++ }
++
++ /* Set this flag to indicate that we're relying on boot-time
++ * DSI state and can't successfully reconfigure DSI yet.
++ */
++ dsi->use_firmware_setup = VC4_DSI_USE_FIRMWARE_SETUP;
++
++ if (dsi->use_firmware_setup) {
++ /* Increment references to the various clocks so that
++ * they stay always enabled and the clock framework
++ * doesn't disable their parents.
++ */
++ ret = clk_prepare_enable(dsi->escape_clock);
++ if (ret) {
++ DRM_ERROR("Failed to refcount DSI escape clock: %d\n", ret);
++ return ret;
++ }
++
++ ret = clk_prepare_enable(dsi->pll_phy_clock);
++ if (ret) {
++ DRM_ERROR("Failed to refcount DSI PLL: %d\n", ret);
++ return ret;
++ }
++
++ ret = clk_prepare_enable(dsi->pixel_clock);
++ if (ret) {
++ DRM_ERROR("Failed to refcount pixel clock: %d\n", ret);
++ return ret;
++ }
++ }
++
++ /* DSI1 has a broken AXI slave that doesn't respond to writes
++ * from the ARM. It does handle writes from the DMA engine,
++ * so set up a channel for talking to it.
++ */
++ if (dsi->port == 1) {
++ dsi->reg_dma_mem = dma_alloc_coherent(dev, 4,
++ &dsi->reg_dma_paddr,
++ GFP_KERNEL);
++ if (!dsi->reg_dma_mem) {
++ DRM_ERROR("Failed to get DMA memory\n");
++ return -ENOMEM;
++ }
++
++ dma_cap_zero(dma_mask);
++ dma_cap_set(DMA_MEMCPY, dma_mask);
++ dsi->reg_dma_chan = dma_request_channel(dma_mask, NULL, NULL);
++ if (IS_ERR(dsi->reg_dma_chan)) {
++ ret = PTR_ERR(dsi->reg_dma_chan);
++ if (ret != -EPROBE_DEFER)
++ DRM_ERROR("Failed to get DMA channel: %d\n",
++ ret);
++ return ret;
++ }
++
++ /* Get the physical address of the device's registers. The
++ * struct resource for the regs gives us the bus address
++ * instead.
++ */
++ dsi->reg_paddr = be32_to_cpup(of_get_address(dev->of_node,
++ 0, NULL, NULL));
++ }
++
++ init_completion(&dsi->xfer_completion);
++ /* At startup enable error-reporting interrupts and nothing else. */
++ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
++ /* Clear any existing interrupt state. */
++ DSI_PORT_WRITE(INT_STAT, DSI_PORT_READ(INT_STAT));
++
++ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
++ vc4_dsi_irq_handler, 0, "vc4 dsi", dsi);
++ if (ret) {
++ if (ret != -EPROBE_DEFER)
++ dev_err(dev, "Failed to get interrupt: %d\n", ret);
++ return ret;
++ }
++
++ dsi->escape_clock = devm_clk_get(dev, "escape");
++ if (IS_ERR(dsi->escape_clock)) {
++ ret = PTR_ERR(dsi->escape_clock);
++ if (ret != -EPROBE_DEFER)
++ dev_err(dev, "Failed to get escape clock: %d\n", ret);
++ return ret;
++ }
++
++ dsi->pll_phy_clock = devm_clk_get(dev, "phy");
++ if (IS_ERR(dsi->pll_phy_clock)) {
++ ret = PTR_ERR(dsi->pll_phy_clock);
++ if (ret != -EPROBE_DEFER)
++ dev_err(dev, "Failed to get phy clock: %d\n", ret);
++ return ret;
++ }
++
++ dsi->pixel_clock = devm_clk_get(dev, "pixel");
++ if (IS_ERR(dsi->pixel_clock)) {
++ ret = PTR_ERR(dsi->pixel_clock);
++ if (ret != -EPROBE_DEFER)
++ dev_err(dev, "Failed to get pixel clock: %d\n", ret);
++ return ret;
++ }
++
++ /* The esc clock rate is supposed to always be 100Mhz. */
++ ret = clk_set_rate(dsi->escape_clock, 100 * 1000000);
++ if (ret) {
++ dev_err(dev, "Failed to set esc clock: %d\n", ret);
++ return ret;
++ }
++
++ ret = vc4_dsi_init_phy_byte_clock(dsi);
++ if (ret)
++ return ret;
++
++ if (dsi->port == 1)
++ vc4->dsi1 = dsi;
++
++ drm_encoder_init(drm, dsi->encoder, &vc4_dsi_encoder_funcs,
++ DRM_MODE_ENCODER_DSI);
++ drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
++
++ dsi->connector = vc4_dsi_connector_init(drm, dsi);
++ if (IS_ERR(dsi->connector)) {
++ ret = PTR_ERR(dsi->connector);
++ goto err_destroy_encoder;
++ }
++
++ dsi->dsi_host.ops = &vc4_dsi_host_ops;
++ dsi->dsi_host.dev = dev;
++
++ mipi_dsi_host_register(&dsi->dsi_host);
++
++ dev_set_drvdata(dev, dsi);
++
++ return 0;
++
++err_destroy_encoder:
++ vc4_dsi_encoder_destroy(dsi->encoder);
++
++ return ret;
++}
++
++static void vc4_dsi_unbind(struct device *dev, struct device *master,
++ void *data)
++{
++ struct drm_device *drm = dev_get_drvdata(master);
++ struct vc4_dev *vc4 = to_vc4_dev(drm);
++ struct vc4_dsi *dsi = dev_get_drvdata(dev);
++
++ vc4_dsi_connector_destroy(dsi->connector);
++ vc4_dsi_encoder_destroy(dsi->encoder);
++
++ mipi_dsi_host_unregister(&dsi->dsi_host);
++
++ if (!dsi->use_firmware_setup) {
++ clk_disable_unprepare(dsi->pll_phy_clock);
++ clk_disable_unprepare(dsi->escape_clock);
++ clk_disable_unprepare(dsi->pixel_clock);
++ }
++
++ if (dsi->port == 1)
++ vc4->dsi1 = NULL;
++}
++
++static const struct component_ops vc4_dsi_ops = {
++ .bind = vc4_dsi_bind,
++ .unbind = vc4_dsi_unbind,
++};
++
++static int vc4_dsi_dev_probe(struct platform_device *pdev)
++{
++ return component_add(&pdev->dev, &vc4_dsi_ops);
++}
++
++static int vc4_dsi_dev_remove(struct platform_device *pdev)
++{
++ component_del(&pdev->dev, &vc4_dsi_ops);
++ return 0;
++}
++
++struct platform_driver vc4_dsi_driver = {
++ .probe = vc4_dsi_dev_probe,
++ .remove = vc4_dsi_dev_remove,
++ .driver = {
++ .name = "vc4_dsi",
++ .of_match_table = vc4_dsi_dt_match,
++ },
++};
+++ /dev/null
-From e2934c6a46a8bfadced1866adea668cebbc698da Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 20 May 2016 16:24:47 -0700
-Subject: [PATCH] drm/vc4: Start switching to using debugfs_reg32 helpers for
- debugfs.
-
-Every file was defining its own little struct and dumping for the
-regs, when there's a helper in debugfs for doing just this. However,
-instead of printing:
-
-PV_HORZA (0x000c): 0x00000000
-
-we now print:
-
-PV_HORZA = 0x00000000
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 48 ++++++++++++++++--------------------------
- drivers/gpu/drm/vc4/vc4_drv.c | 13 ++++++++++++
- drivers/gpu/drm/vc4/vc4_drv.h | 6 ++++++
- 3 files changed, 37 insertions(+), 30 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -35,6 +35,7 @@
- #include "drm_atomic_helper.h"
- #include "drm_crtc_helper.h"
- #include "linux/clk.h"
-+#include "linux/debugfs.h"
- #include "drm_fb_cma_helper.h"
- #include "linux/component.h"
- #include "linux/of_device.h"
-@@ -85,35 +86,25 @@ struct vc4_crtc_data {
- #define CRTC_WRITE(offset, val) writel(val, vc4_crtc->regs + (offset))
- #define CRTC_READ(offset) readl(vc4_crtc->regs + (offset))
-
--#define CRTC_REG(reg) { reg, #reg }
--static const struct {
-- u32 reg;
-- const char *name;
--} crtc_regs[] = {
-- CRTC_REG(PV_CONTROL),
-- CRTC_REG(PV_V_CONTROL),
-- CRTC_REG(PV_VSYNCD_EVEN),
-- CRTC_REG(PV_HORZA),
-- CRTC_REG(PV_HORZB),
-- CRTC_REG(PV_VERTA),
-- CRTC_REG(PV_VERTB),
-- CRTC_REG(PV_VERTA_EVEN),
-- CRTC_REG(PV_VERTB_EVEN),
-- CRTC_REG(PV_INTEN),
-- CRTC_REG(PV_INTSTAT),
-- CRTC_REG(PV_STAT),
-- CRTC_REG(PV_HACT_ACT),
-+static const struct debugfs_reg32 crtc_regs[] = {
-+ VC4_DEBUG_REG(PV_CONTROL),
-+ VC4_DEBUG_REG(PV_V_CONTROL),
-+ VC4_DEBUG_REG(PV_VSYNCD_EVEN),
-+ VC4_DEBUG_REG(PV_HORZA),
-+ VC4_DEBUG_REG(PV_HORZB),
-+ VC4_DEBUG_REG(PV_VERTA),
-+ VC4_DEBUG_REG(PV_VERTB),
-+ VC4_DEBUG_REG(PV_VERTA_EVEN),
-+ VC4_DEBUG_REG(PV_VERTB_EVEN),
-+ VC4_DEBUG_REG(PV_INTEN),
-+ VC4_DEBUG_REG(PV_INTSTAT),
-+ VC4_DEBUG_REG(PV_STAT),
-+ VC4_DEBUG_REG(PV_HACT_ACT),
- };
-
- static void vc4_crtc_dump_regs(struct vc4_crtc *vc4_crtc)
- {
-- int i;
--
-- for (i = 0; i < ARRAY_SIZE(crtc_regs); i++) {
-- DRM_INFO("0x%04x (%s): 0x%08x\n",
-- crtc_regs[i].reg, crtc_regs[i].name,
-- CRTC_READ(crtc_regs[i].reg));
-- }
-+ vc4_dump_regs32(crtc_regs, ARRAY_SIZE(crtc_regs), vc4_crtc->regs, "");
- }
-
- #ifdef CONFIG_DEBUG_FS
-@@ -136,11 +127,8 @@ int vc4_crtc_debugfs_regs(struct seq_fil
- return 0;
- vc4_crtc = to_vc4_crtc(crtc);
-
-- for (i = 0; i < ARRAY_SIZE(crtc_regs); i++) {
-- seq_printf(m, "%s (0x%04x): 0x%08x\n",
-- crtc_regs[i].name, crtc_regs[i].reg,
-- CRTC_READ(crtc_regs[i].reg));
-- }
-+ debugfs_print_regs32(m, crtc_regs, ARRAY_SIZE(crtc_regs),
-+ vc4_crtc->regs, "");
-
- return 0;
- }
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -9,6 +9,7 @@
-
- #include <linux/clk.h>
- #include <linux/component.h>
-+#include <linux/debugfs.h>
- #include <linux/device.h>
- #include <linux/io.h>
- #include <linux/module.h>
-@@ -52,6 +53,18 @@ static void vc4_drm_preclose(struct drm_
- vc4_cancel_page_flip(crtc, file);
- }
-
-+void vc4_dump_regs32(const struct debugfs_reg32 *regs, unsigned int num_regs,
-+ void __iomem *base, const char *prefix)
-+{
-+ unsigned int i;
-+
-+ for (i = 0; i < num_regs; i++) {
-+ DRM_INFO("%s0x%04lx (%s): 0x%08x\n",
-+ prefix, regs[i].offset, regs[i].name,
-+ readl(base + regs[i].offset));
-+ }
-+}
-+
- static void vc4_lastclose(struct drm_device *dev)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -9,6 +9,8 @@
- #include "drmP.h"
- #include "drm_gem_cma_helper.h"
-
-+struct debugfs_reg32;
-+
- struct vc4_dev {
- struct drm_device *dev;
-
-@@ -207,6 +209,8 @@ to_vc4_encoder(struct drm_encoder *encod
- #define HVS_READ(offset) readl(vc4->hvs->regs + offset)
- #define HVS_WRITE(offset, val) writel(val, vc4->hvs->regs + offset)
-
-+#define VC4_DEBUG_REG(reg) { .name = #reg, .offset = reg }
-+
- struct vc4_exec_info {
- /* Sequence number for this bin/render job. */
- uint64_t seqno;
-@@ -418,6 +422,8 @@ void vc4_debugfs_cleanup(struct drm_mino
-
- /* vc4_drv.c */
- void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index);
-+void vc4_dump_regs32(const struct debugfs_reg32 *reg, unsigned int num_regs,
-+ void __iomem *base, const char *prefix);
-
- /* vc4_dpi.c */
- extern struct platform_driver vc4_dpi_driver;
--- /dev/null
+From 4da2b00d471f7fca0d770551afafa95e85ec9b89 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 26 Apr 2016 13:46:13 -0700
+Subject: [PATCH] drm/panel: Add support for the Raspberry Pi 7" Touchscreen.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/panel/Kconfig | 9 +
+ drivers/gpu/drm/panel/Makefile | 1 +
+ .../gpu/drm/panel/panel-raspberrypi-touchscreen.c | 347 +++++++++++++++++++++
+ 3 files changed, 357 insertions(+)
+ create mode 100644 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
+
+--- a/drivers/gpu/drm/panel/Kconfig
++++ b/drivers/gpu/drm/panel/Kconfig
+@@ -31,6 +31,15 @@ config DRM_PANEL_LG_LG4573
+ Say Y here if you want to enable support for LG4573 RGB panel.
+ To compile this driver as a module, choose M here.
+
++config DRM_PANEL_RASPBERRYPI_TOUCHSCREEN
++ tristate "Raspberry Pi 7-inch touchscreen panel"
++ depends on DRM_MIPI_DSI
++ depends on BACKLIGHT_CLASS_DEVICE
++ help
++ Say Y here if you want to enable support for the Raspberry
++ Pi 7" Touchscreen. To compile this driver as a module,
++ choose M here.
++
+ config DRM_PANEL_SAMSUNG_S6E8AA0
+ tristate "Samsung S6E8AA0 DSI video mode panel"
+ depends on OF
+--- a/drivers/gpu/drm/panel/Makefile
++++ b/drivers/gpu/drm/panel/Makefile
+@@ -1,5 +1,6 @@
+ obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
+ obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
++obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) += panel-raspberrypi-touchscreen.o
+ obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
+ obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o
+ obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o
+--- /dev/null
++++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
+@@ -0,0 +1,347 @@
++/*
++ * Copyright © 2016 Broadcom Limited
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Portions of this file (derived from panel-simple.c) are:
++ *
++ * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
++ *
++ * Permission is hereby granted, free of charge, to any person obtaining a
++ * copy of this software and associated documentation files (the "Software"),
++ * to deal in the Software without restriction, including without limitation
++ * the rights to use, copy, modify, merge, publish, distribute, sub license,
++ * and/or sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following conditions:
++ *
++ * The above copyright notice and this permission notice (including the
++ * next paragraph) shall be included in all copies or substantial portions
++ * of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
++ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
++ * DEALINGS IN THE SOFTWARE.
++ */
++
++/**
++ * DOC: Raspberry Pi 7" touchscreen panel driver.
++ *
++ * The 7" touchscreen consists of a DPI LCD panel, a Toshiba
++ * TC358762XBG DSI-DPI bridge, and an I2C-connected Atmel ATTINY88-MUR
++ * controlling power management, the LCD PWM, and the touchscreen.
++ *
++ * This driver presents this device as a MIPI DSI panel to the DRM
++ * driver, and should expose the touchscreen as a HID device.
++ */
++
++#include <linux/backlight.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/gpio.h>
++#include <linux/gpio/consumer.h>
++#include <linux/i2c.h>
++#include <linux/module.h>
++#include <linux/of.h>
++#include <linux/of_device.h>
++#include <linux/of_graph.h>
++#include <linux/pm.h>
++
++#include <drm/drm_panel.h>
++#include <drm/drmP.h>
++#include <drm/drm_crtc.h>
++#include <drm/drm_mipi_dsi.h>
++#include <drm/drm_panel.h>
++
++struct rpi_touchscreen {
++ struct drm_panel base;
++ struct mipi_dsi_device *dsi;
++ struct i2c_client *bridge_i2c;
++ struct backlight_device *backlight;
++
++ bool prepared;
++ bool enabled;
++
++ /* Version of the firmware on the bridge chip */
++ int atmel_ver;
++};
++
++static const struct drm_display_mode rpi_touchscreen_modes[] = {
++ {
++ /* This is assuming that we'll be running the DSI PLL
++ * at 2Ghz / 3 (since we only get integer dividers),
++ * so a pixel clock of 2Ghz / 3 / 8.
++ */
++ .clock = 83333,
++ .hdisplay = 800,
++ .hsync_start = 800 + 61,
++ .hsync_end = 800 + 61 + 2,
++ .htotal = 800 + 61 + 2 + 44,
++ .vdisplay = 480,
++ .vsync_start = 480 + 7,
++ .vsync_end = 480 + 7 + 2,
++ .vtotal = 480 + 7 + 2 + 21,
++ .vrefresh = 60,
++ },
++};
++
++static struct rpi_touchscreen *panel_to_ts(struct drm_panel *panel)
++{
++ return container_of(panel, struct rpi_touchscreen, base);
++}
++
++struct regdump {
++ const char *reg;
++ u32 offset;
++};
++
++#define REGDUMP(reg) { #reg, reg }
++
++static int rpi_touchscreen_disable(struct drm_panel *panel)
++{
++ struct rpi_touchscreen *ts = panel_to_ts(panel);
++ pr_err("disable\n");
++
++ if (!ts->enabled)
++ return 0;
++
++ if (ts->backlight) {
++ ts->backlight->props.power = FB_BLANK_POWERDOWN;
++ backlight_update_status(ts->backlight);
++ }
++
++ ts->enabled = false;
++
++ return 0;
++}
++
++static int rpi_touchscreen_unprepare(struct drm_panel *panel)
++{
++ struct rpi_touchscreen *ts = panel_to_ts(panel);
++
++ if (!ts->prepared)
++ return 0;
++
++ ts->prepared = false;
++
++ return 0;
++}
++
++static int rpi_touchscreen_prepare(struct drm_panel *panel)
++{
++ struct rpi_touchscreen *ts = panel_to_ts(panel);
++
++ if (ts->prepared)
++ return 0;
++
++ ts->prepared = true;
++
++ return 0;
++}
++
++/*
++ * Powers on the panel once the DSI link is up.
++ *
++ * The TC358762 is run in PLLOFF mode, where it usees the MIPI DSI
++ * byte clock instead of an external reference clock. This means that
++ * we need the DSI host to be on and transmitting before we start
++ * talking to it.
++ */
++static int rpi_touchscreen_enable(struct drm_panel *panel)
++{
++ struct rpi_touchscreen *ts = panel_to_ts(panel);
++
++ if (ts->enabled)
++ return 0;
++
++ if (ts->backlight) {
++ ts->backlight->props.power = FB_BLANK_UNBLANK;
++ backlight_update_status(ts->backlight);
++ }
++
++ ts->enabled = true;
++
++ return 0;
++}
++
++static int rpi_touchscreen_get_modes(struct drm_panel *panel)
++{
++ struct drm_connector *connector = panel->connector;
++ struct drm_device *drm = panel->drm;
++ unsigned int i, num = 0;
++
++ for (i = 0; i < ARRAY_SIZE(rpi_touchscreen_modes); i++) {
++ const struct drm_display_mode *m = &rpi_touchscreen_modes[i];
++ struct drm_display_mode *mode;
++
++ mode = drm_mode_duplicate(drm, m);
++ if (!mode) {
++ dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
++ m->hdisplay, m->vdisplay, m->vrefresh);
++ continue;
++ }
++
++ mode->type |= DRM_MODE_TYPE_DRIVER;
++
++ if (i == 0)
++ mode->type |= DRM_MODE_TYPE_PREFERRED;
++
++ drm_mode_set_name(mode);
++
++ drm_mode_probed_add(connector, mode);
++ num++;
++ }
++
++ connector->display_info.bpc = 8;
++ connector->display_info.width_mm = 217; /* XXX */
++ connector->display_info.height_mm = 136; /* XXX */
++
++ return num;
++}
++
++static int rpi_touchscreen_backlight_update(struct backlight_device *bl)
++{
++ int brightness = bl->props.brightness;
++
++ if (bl->props.power != FB_BLANK_UNBLANK ||
++ bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
++ brightness = 0;
++
++ return 0;
++}
++
++static const struct backlight_ops rpi_touchscreen_backlight_ops = {
++ .update_status = rpi_touchscreen_backlight_update,
++};
++
++static const struct drm_panel_funcs rpi_touchscreen_funcs = {
++ .disable = rpi_touchscreen_disable,
++ .unprepare = rpi_touchscreen_unprepare,
++ .prepare = rpi_touchscreen_prepare,
++ .enable = rpi_touchscreen_enable,
++ .get_modes = rpi_touchscreen_get_modes,
++};
++
++static struct i2c_client *rpi_touchscreen_get_i2c(struct device *dev,
++ const char *name)
++{
++ struct device_node *node;
++ struct i2c_client *client;
++
++ node = of_parse_phandle(dev->of_node, name, 0);
++ if (!node)
++ return ERR_PTR(-ENODEV);
++
++ client = of_find_i2c_device_by_node(node);
++
++ of_node_put(node);
++
++ return client;
++}
++
++static int rpi_touchscreen_dsi_probe(struct mipi_dsi_device *dsi)
++{
++ struct device *dev = &dsi->dev;
++ struct rpi_touchscreen *ts;
++ int ret;
++
++ ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);
++ if (!ts)
++ return -ENOMEM;
++
++ dev_set_drvdata(dev, ts);
++
++ ts->dsi = dsi;
++ dsi->mode_flags = (MIPI_DSI_MODE_VIDEO |
++ MIPI_DSI_MODE_VIDEO_SYNC_PULSE);
++ dsi->format = MIPI_DSI_FMT_RGB888;
++ dsi->lanes = 1;
++
++ ts->bridge_i2c =
++ rpi_touchscreen_get_i2c(dev, "raspberrypi,touchscreen-bridge");
++ if (!ts->bridge_i2c) {
++ ret = -EPROBE_DEFER;
++ return ret;
++ }
++
++#if 0
++ ts->backlight =
++ devm_backlight_device_register(dev,
++ "raspberrypi-touchscreen-backlight",
++ dev, ts,
++ &rpi_touchscreen_backlight_ops,
++ NULL);
++ if (IS_ERR(ts->backlight)) {
++ DRM_ERROR("failed to register backlight\n");
++ return PTR_ERR(ts->backlight);
++ }
++ ts->backlight->props.max_brightness = RPI_TOUCHSCREEN_MAX_BRIGHTNESS;
++ ts->backlight->props.brightness = RPI_TOUCHSCREEN_MAX_BRIGHTNESS;
++#endif
++
++ drm_panel_init(&ts->base);
++ ts->base.dev = dev;
++ ts->base.funcs = &rpi_touchscreen_funcs;
++
++ ret = drm_panel_add(&ts->base);
++ if (ret < 0)
++ goto err_release_bridge;
++
++ return mipi_dsi_attach(dsi);
++
++err_release_bridge:
++ put_device(&ts->bridge_i2c->dev);
++ return ret;
++}
++
++static int rpi_touchscreen_dsi_remove(struct mipi_dsi_device *dsi)
++{
++ struct device *dev = &dsi->dev;
++ struct rpi_touchscreen *ts = dev_get_drvdata(dev);
++ int ret;
++
++ ret = mipi_dsi_detach(dsi);
++ if (ret < 0) {
++ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
++ return ret;
++ }
++
++ drm_panel_detach(&ts->base);
++ drm_panel_remove(&ts->base);
++
++ put_device(&ts->bridge_i2c->dev);
++
++ return 0;
++}
++
++static void rpi_touchscreen_dsi_shutdown(struct mipi_dsi_device *dsi)
++{
++ /* XXX: poweroff */
++}
++
++static const struct of_device_id rpi_touchscreen_of_match[] = {
++ { .compatible = "raspberrypi,touchscreen" },
++ { } /* sentinel */
++};
++MODULE_DEVICE_TABLE(of, rpi_touchscreen_of_match);
++
++static struct mipi_dsi_driver rpi_touchscreen_driver = {
++ .driver = {
++ .name = "raspberrypi-touchscreen",
++ .of_match_table = rpi_touchscreen_of_match,
++ },
++ .probe = rpi_touchscreen_dsi_probe,
++ .remove = rpi_touchscreen_dsi_remove,
++ .shutdown = rpi_touchscreen_dsi_shutdown,
++};
++module_mipi_dsi_driver(rpi_touchscreen_driver);
++
++MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
++MODULE_DESCRIPTION("Raspberry Pi 7-inch touchscreen driver");
++MODULE_LICENSE("GPL v2");
+++ /dev/null
-From 7e409fcf8006642edc6f817b6832f27b66debc44 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Wed, 10 Feb 2016 11:42:32 -0800
-Subject: [PATCH] drm/vc4: Add DSI1 driver
-
-The DSI0 and DSI1 blocks on the 2835 are different but very similar
-hardware blocks. Some registers move around, and the featureset is
-slightly different, but they're clearly related. This doesn't enable
-DSI0, but some of the infrastructure is present.
-
-Also, this driver doesn't initialize the DSI successfully from
-poweron, so we currently require that the Raspberry Pi firmware enable
-it at boot time. From there, we just keep the same settings forever,
-and when poweroff is requested we just scan out black instead.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/Kconfig | 2 +
- drivers/gpu/drm/vc4/Makefile | 1 +
- drivers/gpu/drm/vc4/vc4_crtc.c | 41 +-
- drivers/gpu/drm/vc4/vc4_debugfs.c | 2 +
- drivers/gpu/drm/vc4/vc4_drv.c | 1 +
- drivers/gpu/drm/vc4/vc4_drv.h | 8 +
- drivers/gpu/drm/vc4/vc4_dsi.c | 1737 +++++++++++++++++++++++++++++++++++++
- 7 files changed, 1780 insertions(+), 12 deletions(-)
- create mode 100644 drivers/gpu/drm/vc4/vc4_dsi.c
-
---- a/drivers/gpu/drm/vc4/Kconfig
-+++ b/drivers/gpu/drm/vc4/Kconfig
-@@ -6,6 +6,8 @@ config DRM_VC4
- select DRM_KMS_CMA_HELPER
- select DRM_GEM_CMA_HELPER
- select DRM_PANEL
-+ select DRM_MIPI_DSI
-+ select CLKSRC_OF
- help
- Choose this option if you have a system that has a Broadcom
- VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835.
---- a/drivers/gpu/drm/vc4/Makefile
-+++ b/drivers/gpu/drm/vc4/Makefile
-@@ -8,6 +8,7 @@ vc4-y := \
- vc4_crtc.o \
- vc4_drv.o \
- vc4_dpi.o \
-+ vc4_dsi.o \
- vc4_kms.o \
- vc4_gem.o \
- vc4_hdmi.o \
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -231,7 +231,7 @@ static void vc4_crtc_mode_set_nofb(struc
- bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
- vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
- u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
-- bool debug_dump_regs = true;
-+ bool debug_dump_regs = false;
-
- if (debug_dump_regs) {
- DRM_INFO("CRTC %d regs before:\n", drm_crtc_index(crtc));
-@@ -327,6 +327,19 @@ static void vc4_crtc_disable(struct drm_
- int ret;
- require_hvs_enabled(dev);
-
-+ if (VC4_DSI_USE_FIRMWARE_SETUP &&
-+ (CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_DSI)) {
-+ /* Skip disabling the PV/HVS for the channel if it was
-+ * connected to the DSI panel and we're using the
-+ * firmware setup. Instead, just set it to stuff
-+ * black in the composite output buffer.
-+ */
-+ HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel),
-+ HVS_READ(SCALER_DISPBKGNDX(vc4_crtc->channel)) |
-+ SCALER_DISPBKGND_FILL);
-+ return;
-+ }
-+
- CRTC_WRITE(PV_V_CONTROL,
- CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
- ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
-@@ -396,17 +409,19 @@ static int vc4_crtc_atomic_check(struct
- if (drm_atomic_connectors_for_crtc(state->state, crtc) > 1)
- return -EINVAL;
-
-- drm_atomic_crtc_state_for_each_plane(plane, state) {
-- struct drm_plane_state *plane_state =
-- state->state->plane_states[drm_plane_index(plane)];
--
-- /* plane might not have changed, in which case take
-- * current state:
-- */
-- if (!plane_state)
-- plane_state = plane->state;
-+ if (state->active) {
-+ drm_atomic_crtc_state_for_each_plane(plane, state) {
-+ struct drm_plane_state *plane_state =
-+ state->state->plane_states[drm_plane_index(plane)];
-+
-+ /* plane might not have changed, in which case take
-+ * current state:
-+ */
-+ if (!plane_state)
-+ plane_state = plane->state;
-
-- dlist_count += vc4_plane_dlist_size(plane_state);
-+ dlist_count += vc4_plane_dlist_size(plane_state);
-+ }
- }
-
- dlist_count++; /* Account for SCALER_CTL0_END. */
-@@ -439,8 +454,10 @@ static void vc4_crtc_atomic_flush(struct
- }
-
- /* Copy all the active planes' dlist contents to the hardware dlist. */
-- drm_atomic_crtc_for_each_plane(plane, crtc) {
-- dlist_next += vc4_plane_write_dlist(plane, dlist_next);
-+ if (crtc->state->active) {
-+ drm_atomic_crtc_for_each_plane(plane, crtc) {
-+ dlist_next += vc4_plane_write_dlist(plane, dlist_next);
-+ }
- }
-
- writel(SCALER_CTL0_END, dlist_next);
---- a/drivers/gpu/drm/vc4/vc4_debugfs.c
-+++ b/drivers/gpu/drm/vc4/vc4_debugfs.c
-@@ -19,6 +19,8 @@ static const struct drm_info_list vc4_de
- {"bo_stats", vc4_bo_stats_debugfs, 0},
- {"dpi_regs", vc4_dpi_debugfs_regs, 0},
- {"gem_exec", vc4_gem_exec_debugfs, 0},
-+ {"dsi0_regs", vc4_dsi_debugfs_regs, 0, (void *)(uintptr_t)0},
-+ {"dsi1_regs", vc4_dsi_debugfs_regs, 0, (void *)(uintptr_t)1},
- {"hdmi_regs", vc4_hdmi_debugfs_regs, 0},
- {"hvs_regs", vc4_hvs_debugfs_regs, 0},
- {"crtc0_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)0},
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -294,6 +294,7 @@ static const struct component_master_ops
- static struct platform_driver *const component_drivers[] = {
- &vc4_hdmi_driver,
- &vc4_dpi_driver,
-+ &vc4_dsi_driver,
- &vc4_crtc_driver,
- &vc4_hvs_driver,
- &vc4_v3d_driver,
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -19,6 +19,8 @@ struct vc4_dev {
- struct vc4_crtc *crtc[3];
- struct vc4_v3d *v3d;
- struct vc4_dpi *dpi;
-+ struct vc4_dsi *dsi0;
-+ struct vc4_dsi *dsi1;
-
- struct drm_fbdev_cma *fbdev;
- struct rpi_firmware *firmware;
-@@ -192,6 +194,8 @@ enum vc4_encoder_type {
- VC4_ENCODER_TYPE_DPI,
- };
-
-+#define VC4_DSI_USE_FIRMWARE_SETUP true
-+
- struct vc4_encoder {
- struct drm_encoder base;
- enum vc4_encoder_type type;
-@@ -429,6 +433,10 @@ void vc4_dump_regs32(const struct debugf
- extern struct platform_driver vc4_dpi_driver;
- int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused);
-
-+/* vc4_dsi.c */
-+extern struct platform_driver vc4_dsi_driver;
-+int vc4_dsi_debugfs_regs(struct seq_file *m, void *unused);
-+
- /* vc4_gem.c */
- void vc4_gem_init(struct drm_device *dev);
- void vc4_gem_destroy(struct drm_device *dev);
---- /dev/null
-+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
-@@ -0,0 +1,1737 @@
-+ /*
-+ * Copyright (C) 2016 Broadcom Limited
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program. If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+/**
-+ * DOC: VC4 DSI0 module
-+ */
-+
-+#include "drm_atomic_helper.h"
-+#include "drm_crtc_helper.h"
-+#include "drm_edid.h"
-+#include "drm_mipi_dsi.h"
-+#include "drm_panel.h"
-+#include "linux/clk.h"
-+#include "linux/clk-provider.h"
-+#include "linux/completion.h"
-+#include "linux/component.h"
-+#include "linux/debugfs.h"
-+#include "linux/dmaengine.h"
-+#include "linux/i2c.h"
-+#include "linux/of_address.h"
-+#include "linux/of_gpio.h"
-+#include "linux/of_platform.h"
-+#include "vc4_drv.h"
-+#include "vc4_regs.h"
-+
-+#define DSI_CMD_FIFO_DEPTH 16
-+#define DSI_PIX_FIFO_DEPTH 256
-+#define DSI_PIX_FIFO_WIDTH 4
-+
-+#define DSI0_CTRL 0x00
-+
-+/* Command packet control. */
-+#define DSI0_TXPKT1C 0x04 /* AKA PKTC */
-+#define DSI1_TXPKT1C 0x04
-+# define DSI_TXPKT1C_TRIG_CMD_MASK VC4_MASK(31, 24)
-+# define DSI_TXPKT1C_TRIG_CMD_SHIFT 24
-+# define DSI_TXPKT1C_CMD_REPEAT_MASK VC4_MASK(23, 10)
-+# define DSI_TXPKT1C_CMD_REPEAT_SHIFT 10
-+
-+# define DSI_TXPKT1C_DISPLAY_NO_MASK VC4_MASK(9, 8)
-+# define DSI_TXPKT1C_DISPLAY_NO_SHIFT 8
-+/* Short, trigger, BTA, or a long packet that fits all in CMDFIFO. */
-+# define DSI_TXPKT1C_DISPLAY_NO_SHORT 0
-+/* Primary display where cmdfifo provides part of the payload and
-+ * pixelvalve the rest.
-+ */
-+# define DSI_TXPKT1C_DISPLAY_NO_PRIMARY 1
-+/* Secondary display where cmdfifo provides part of the payload and
-+ * pixfifo the rest.
-+ */
-+# define DSI_TXPKT1C_DISPLAY_NO_SECONDARY 2
-+
-+# define DSI_TXPKT1C_CMD_TX_TIME_MASK VC4_MASK(7, 6)
-+# define DSI_TXPKT1C_CMD_TX_TIME_SHIFT 6
-+# define DSI_TXPKT1C_CMD_CTRL_MASK VC4_MASK(5, 4)
-+# define DSI_TXPKT1C_CMD_CTRL_SHIFT 4
-+/* Command only. Uses TXPKT1H and DISPLAY_NO */
-+# define DSI_TXPKT1C_CMD_CTRL_TX 0
-+/* Command with BTA for either ack or read data. */
-+# define DSI_TXPKT1C_CMD_CTRL_RX 1
-+/* Trigger according to TRIG_CMD */
-+# define DSI_TXPKT1C_CMD_CTRL_TRIG 2
-+/* BTA alone for getting error status after a command, or a TE trigger
-+ * without a previous command.
-+ */
-+# define DSI_TXPKT1C_CMD_CTRL_BTA 3
-+
-+# define DSI_TXPKT1C_CMD_MODE_LP BIT(3)
-+# define DSI_TXPKT1C_CMD_TYPE_LONG BIT(2)
-+# define DSI_TXPKT1C_CMD_TE_EN BIT(1)
-+# define DSI_TXPKT1C_CMD_EN BIT(0)
-+
-+/* Command packet header. */
-+#define DSI0_TXPKT1H 0x08 /* AKA PKTH */
-+#define DSI1_TXPKT1H 0x08
-+# define DSI_TXPKT1H_BC_CMDFIFO_MASK VC4_MASK(31, 24)
-+# define DSI_TXPKT1H_BC_CMDFIFO_SHIFT 24
-+# define DSI_TXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8)
-+# define DSI_TXPKT1H_BC_PARAM_SHIFT 8
-+# define DSI_TXPKT1H_BC_DT_MASK VC4_MASK(7, 0)
-+# define DSI_TXPKT1H_BC_DT_SHIFT 0
-+
-+#define DSI0_RXPKT1H 0x0c /* AKA RX1_PKTH */
-+#define DSI1_RXPKT1H 0x14
-+# define DSI_RXPKT1H_CRC_ERR BIT(31)
-+# define DSI_RXPKT1H_DET_ERR BIT(30)
-+# define DSI_RXPKT1H_ECC_ERR BIT(29)
-+# define DSI_RXPKT1H_COR_ERR BIT(28)
-+# define DSI_RXPKT1H_INCOMP_PKT BIT(25)
-+# define DSI_RXPKT1H_PKT_TYPE_LONG BIT(24)
-+/* Byte count if DSI_RXPKT1H_PKT_TYPE_LONG */
-+# define DSI_RXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8)
-+# define DSI_RXPKT1H_BC_PARAM_SHIFT 8
-+/* Short return bytes if !DSI_RXPKT1H_PKT_TYPE_LONG */
-+# define DSI_RXPKT1H_SHORT_1_MASK VC4_MASK(23, 16)
-+# define DSI_RXPKT1H_SHORT_1_SHIFT 16
-+# define DSI_RXPKT1H_SHORT_0_MASK VC4_MASK(15, 8)
-+# define DSI_RXPKT1H_SHORT_0_SHIFT 8
-+# define DSI_RXPKT1H_DT_LP_CMD_MASK VC4_MASK(7, 0)
-+# define DSI_RXPKT1H_DT_LP_CMD_SHIFT 0
-+
-+#define DSI0_RXPKT2H 0x10 /* AKA RX2_PKTH */
-+#define DSI1_RXPKT2H 0x18
-+# define DSI_RXPKT1H_DET_ERR BIT(30)
-+# define DSI_RXPKT1H_ECC_ERR BIT(29)
-+# define DSI_RXPKT1H_COR_ERR BIT(28)
-+# define DSI_RXPKT1H_INCOMP_PKT BIT(25)
-+# define DSI_RXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8)
-+# define DSI_RXPKT1H_BC_PARAM_SHIFT 8
-+# define DSI_RXPKT1H_DT_MASK VC4_MASK(7, 0)
-+# define DSI_RXPKT1H_DT_SHIFT 0
-+
-+#define DSI0_TXPKT_CMD_FIFO 0x14 /* AKA CMD_DATAF */
-+#define DSI1_TXPKT_CMD_FIFO 0x1c
-+
-+#define DSI0_DISP0_CTRL 0x18
-+# define DSI_DISP0_PIX_CLK_DIV_MASK VC4_MASK(21, 13)
-+# define DSI_DISP0_PIX_CLK_DIV_SHIFT 13
-+# define DSI_DISP0_LP_STOP_CTRL_MASK VC4_MASK(12, 11)
-+# define DSI_DISP0_LP_STOP_CTRL_SHIFT 11
-+# define DSI_DISP0_LP_STOP_DISABLE 0
-+# define DSI_DISP0_LP_STOP_PERLINE 1
-+# define DSI_DISP0_LP_STOP_PERFRAME 2
-+
-+/* Transmit RGB pixels and null packets only during HACTIVE, instead
-+ * of going to LP-STOP.
-+ */
-+# define DSI_DISP_HACTIVE_NULL BIT(10)
-+/* Transmit blanking packet only during vblank, instead of allowing LP-STOP. */
-+# define DSI_DISP_VBLP_CTRL BIT(9)
-+/* Transmit blanking packet only during HFP, instead of allowing LP-STOP. */
-+# define DSI_DISP_HFP_CTRL BIT(8)
-+/* Transmit blanking packet only during HBP, instead of allowing LP-STOP. */
-+# define DSI_DISP_HBP_CTRL BIT(7)
-+# define DSI_DISP0_CHANNEL_MASK VC4_MASK(6, 5)
-+# define DSI_DISP0_CHANNEL_SHIFT 5
-+/* Enables and end events for HSYNC/VSYNC, not just start events. */
-+# define DSI_DISP0_ST_END BIT(4)
-+# define DSI_DISP0_PFORMAT_MASK VC4_MASK(3, 2)
-+# define DSI_DISP0_PFORMAT_SHIFT 2
-+# define DSI_PFORMAT_RGB565 0
-+# define DSI_PFORMAT_RGB666_PACKED 1
-+# define DSI_PFORMAT_RGB666 2
-+# define DSI_PFORMAT_RGB888 3
-+/* Default is VIDEO mode. */
-+# define DSI_DISP0_COMMAND_MODE BIT(1)
-+# define DSI_DISP0_ENABLE BIT(0)
-+
-+#define DSI0_DISP1_CTRL 0x1c
-+#define DSI1_DISP1_CTRL 0x2c
-+/* Format of the data written to TXPKT_PIX_FIFO. */
-+# define DSI_DISP1_PFORMAT_MASK VC4_MASK(2, 1)
-+# define DSI_DISP1_PFORMAT_SHIFT 1
-+# define DSI_DISP1_PFORMAT_16BIT 0
-+# define DSI_DISP1_PFORMAT_24BIT 1
-+# define DSI_DISP1_PFORMAT_32BIT_LE 2
-+# define DSI_DISP1_PFORMAT_32BIT_BE 3
-+
-+/* DISP1 is always command mode. */
-+# define DSI_DISP1_ENABLE BIT(0)
-+
-+#define DSI0_TXPKT_PIX_FIFO 0x20 /* AKA PIX_FIFO */
-+
-+#define DSI0_INT_STAT 0x24
-+#define DSI0_INT_EN 0x28
-+# define DSI1_INT_PHY_D3_ULPS BIT(30)
-+# define DSI1_INT_PHY_D3_STOP BIT(29)
-+# define DSI1_INT_PHY_D2_ULPS BIT(28)
-+# define DSI1_INT_PHY_D2_STOP BIT(27)
-+# define DSI1_INT_PHY_D1_ULPS BIT(26)
-+# define DSI1_INT_PHY_D1_STOP BIT(25)
-+# define DSI1_INT_PHY_D0_ULPS BIT(24)
-+# define DSI1_INT_PHY_D0_STOP BIT(23)
-+# define DSI1_INT_FIFO_ERR BIT(22)
-+# define DSI1_INT_PHY_DIR_RTF BIT(21)
-+# define DSI1_INT_PHY_RXLPDT BIT(20)
-+# define DSI1_INT_PHY_RXTRIG BIT(19)
-+# define DSI1_INT_PHY_D0_LPDT BIT(18)
-+# define DSI1_INT_PHY_DIR_FTR BIT(17)
-+
-+/* Signaled when the clock lane enters the given state. */
-+# define DSI1_INT_PHY_CLOCK_ULPS BIT(16)
-+# define DSI1_INT_PHY_CLOCK_HS BIT(15)
-+# define DSI1_INT_PHY_CLOCK_STOP BIT(14)
-+
-+/* Signaled on timeouts */
-+# define DSI1_INT_PR_TO BIT(13)
-+# define DSI1_INT_TA_TO BIT(12)
-+# define DSI1_INT_LPRX_TO BIT(11)
-+# define DSI1_INT_HSTX_TO BIT(10)
-+
-+/* Contention on a line when trying to drive the line low */
-+# define DSI1_INT_ERR_CONT_LP1 BIT(9)
-+# define DSI1_INT_ERR_CONT_LP0 BIT(8)
-+
-+/* Control error: incorrect line state sequence on data lane 0. */
-+# define DSI1_INT_ERR_CONTROL BIT(7)
-+/* LPDT synchronization error (bits received not a multiple of 8. */
-+
-+# define DSI1_INT_ERR_SYNC_ESC BIT(6)
-+/* Signaled after receiving an error packet from the display in
-+ * response to a read.
-+ */
-+# define DSI1_INT_RXPKT2 BIT(5)
-+/* Signaled after receiving a packet. The header and optional short
-+ * response will be in RXPKT1H, and a long response will be in the
-+ * RXPKT_FIFO.
-+ */
-+# define DSI1_INT_RXPKT1 BIT(4)
-+# define DSI1_INT_TXPKT2_DONE BIT(3)
-+# define DSI1_INT_TXPKT2_END BIT(2)
-+/* Signaled after all repeats of TXPKT1 are transferred. */
-+# define DSI1_INT_TXPKT1_DONE BIT(1)
-+/* Signaled after each TXPKT1 repeat is scheduled. */
-+# define DSI1_INT_TXPKT1_END BIT(0)
-+
-+#define DSI1_INTERRUPTS_ALWAYS_ENABLED (DSI1_INT_ERR_SYNC_ESC | \
-+ DSI1_INT_ERR_CONTROL | \
-+ DSI1_INT_ERR_CONT_LP0 | \
-+ DSI1_INT_ERR_CONT_LP1 | \
-+ DSI1_INT_HSTX_TO | \
-+ DSI1_INT_LPRX_TO | \
-+ DSI1_INT_TA_TO | \
-+ DSI1_INT_PR_TO)
-+
-+#define DSI0_STAT 0x2c
-+#define DSI0_HSTX_TO_CNT 0x30
-+#define DSI0_LPRX_TO_CNT 0x34
-+#define DSI0_TA_TO_CNT 0x38
-+#define DSI0_PR_TO_CNT 0x3c
-+#define DSI0_PHYC 0x40
-+# define DSI1_PHYC_ESC_CLK_LPDT_MASK VC4_MASK(25, 20)
-+# define DSI1_PHYC_ESC_CLK_LPDT_SHIFT 20
-+# define DSI1_PHYC_HS_CLK_CONTINUOUS BIT(18)
-+# define DSI1_PHYC_CLANE_ULPS BIT(17)
-+# define DSI0_PHYC_ESC_CLK_LPDT_MASK VC4_MASK(17, 12)
-+# define DSI0_PHYC_ESC_CLK_LPDT_SHIFT 12
-+# define DSI1_PHYC_CLANE_ENABLE BIT(16)
-+# define DSI_PHYC_DLANE3_ULPS BIT(13)
-+# define DSI_PHYC_DLANE3_ENABLE BIT(12)
-+# define DSI0_PHYC_HS_CLK_CONTINUOUS BIT(10)
-+# define DSI0_PHYC_CLANE_ULPS BIT(9)
-+# define DSI_PHYC_DLANE2_ULPS BIT(9)
-+# define DSI0_PHYC_CLANE_ENABLE BIT(8)
-+# define DSI_PHYC_DLANE2_ENABLE BIT(8)
-+# define DSI_PHYC_DLANE1_ULPS BIT(5)
-+# define DSI_PHYC_DLANE1_ENABLE BIT(4)
-+# define DSI_PHYC_DLANE0_FORCE_STOP BIT(2)
-+# define DSI_PHYC_DLANE0_ULPS BIT(1)
-+# define DSI_PHYC_DLANE0_ENABLE BIT(0)
-+
-+#define DSI0_HS_CLT0 0x44
-+#define DSI0_HS_CLT1 0x48
-+#define DSI0_HS_CLT2 0x4c
-+#define DSI0_HS_DLT3 0x50
-+#define DSI0_HS_DLT4 0x54
-+#define DSI0_HS_DLT5 0x58
-+#define DSI0_HS_DLT6 0x5c
-+#define DSI0_HS_DLT7 0x60
-+
-+#define DSI0_PHY_AFEC0 0x64
-+# define DSI0_PHY_AFEC0_DDR2CLK_EN BIT(26)
-+# define DSI0_PHY_AFEC0_DDRCLK_EN BIT(25)
-+# define DSI0_PHY_AFEC0_LATCH_ULPS BIT(24)
-+# define DSI1_PHY_AFEC0_IDR_DLANE3_MASK VC4_MASK(31, 29)
-+# define DSI1_PHY_AFEC0_IDR_DLANE3_SHIFT 29
-+# define DSI1_PHY_AFEC0_IDR_DLANE2_MASK VC4_MASK(28, 26)
-+# define DSI1_PHY_AFEC0_IDR_DLANE2_SHIFT 26
-+# define DSI1_PHY_AFEC0_IDR_DLANE1_MASK VC4_MASK(27, 23)
-+# define DSI1_PHY_AFEC0_IDR_DLANE1_SHIFT 23
-+# define DSI1_PHY_AFEC0_IDR_DLANE0_MASK VC4_MASK(22, 20)
-+# define DSI1_PHY_AFEC0_IDR_DLANE0_SHIFT 20
-+# define DSI1_PHY_AFEC0_IDR_CLANE_MASK VC4_MASK(19, 17)
-+# define DSI1_PHY_AFEC0_IDR_CLANE_SHIFT 17
-+# define DSI0_PHY_AFEC0_ACTRL_DLANE1_MASK VC4_MASK(23, 20)
-+# define DSI0_PHY_AFEC0_ACTRL_DLANE1_SHIFT 20
-+# define DSI0_PHY_AFEC0_ACTRL_DLANE0_MASK VC4_MASK(19, 16)
-+# define DSI0_PHY_AFEC0_ACTRL_DLANE0_SHIFT 16
-+# define DSI0_PHY_AFEC0_ACTRL_CLANE_MASK VC4_MASK(15, 12)
-+# define DSI0_PHY_AFEC0_ACTRL_CLANE_SHIFT 12
-+# define DSI1_PHY_AFEC0_DDR2CLK_EN BIT(16)
-+# define DSI1_PHY_AFEC0_DDRCLK_EN BIT(15)
-+# define DSI1_PHY_AFEC0_LATCH_ULPS BIT(14)
-+# define DSI1_PHY_AFEC0_RESET BIT(13)
-+# define DSI1_PHY_AFEC0_PD BIT(12)
-+# define DSI0_PHY_AFEC0_RESET BIT(11)
-+# define DSI1_PHY_AFEC0_PD_BG BIT(11)
-+# define DSI0_PHY_AFEC0_PD BIT(10)
-+# define DSI1_PHY_AFEC0_PD_DLANE3 BIT(10)
-+# define DSI0_PHY_AFEC0_PD_BG BIT(9)
-+# define DSI1_PHY_AFEC0_PD_DLANE2 BIT(9)
-+# define DSI0_PHY_AFEC0_PD_DLANE1 BIT(8)
-+# define DSI1_PHY_AFEC0_PD_DLANE1 BIT(8)
-+# define DSI_PHY_AFEC0_PTATADJ_MASK VC4_MASK(7, 4)
-+# define DSI_PHY_AFEC0_PTATADJ_SHIFT 4
-+# define DSI_PHY_AFEC0_CTATADJ_MASK VC4_MASK(3, 0)
-+# define DSI_PHY_AFEC0_CTATADJ_SHIFT 0
-+
-+#define DSI0_PHY_AFEC1 0x68
-+# define DSI0_PHY_AFEC1_IDR_DLANE1_MASK VC4_MASK(10, 8)
-+# define DSI0_PHY_AFEC1_IDR_DLANE1_SHIFT 8
-+# define DSI0_PHY_AFEC1_IDR_DLANE0_MASK VC4_MASK(6, 4)
-+# define DSI0_PHY_AFEC1_IDR_DLANE0_SHIFT 4
-+# define DSI0_PHY_AFEC1_IDR_CLANE_MASK VC4_MASK(2, 0)
-+# define DSI0_PHY_AFEC1_IDR_CLANE_SHIFT 0
-+
-+#define DSI0_TST_SEL 0x6c
-+#define DSI0_TST_MON 0x70
-+#define DSI0_ID 0x74
-+# define DSI_ID_VALUE 0x00647369
-+
-+
-+#define DSI1_CTRL 0x00
-+# define DSI_CTRL_HS_CLKC_MASK VC4_MASK(15, 14)
-+# define DSI_CTRL_HS_CLKC_SHIFT 14
-+# define DSI_CTRL_HS_CLKC_BYTE 0
-+# define DSI_CTRL_HS_CLKC_DDR2 1
-+# define DSI_CTRL_HS_CLKC_DDR 2
-+
-+# define DSI_CTRL_RX_LPDT_EOT_DISABLE BIT(13)
-+# define DSI_CTRL_LPDT_EOT_DISABLE BIT(12)
-+# define DSI_CTRL_HSDT_EOT_DISABLE BIT(11)
-+# define DSI_CTRL_SOFT_RESET_CFG BIT(10)
-+# define DSI_CTRL_CAL_BYTE BIT(9)
-+# define DSI_CTRL_INV_BYTE BIT(8)
-+# define DSI_CTRL_CLR_LDF BIT(7)
-+# define DSI0_CTRL_CLR_PBCF BIT(6)
-+# define DSI1_CTRL_CLR_RXF BIT(6)
-+# define DSI0_CTRL_CLR_CPBCF BIT(5)
-+# define DSI1_CTRL_CLR_PDF BIT(5)
-+# define DSI0_CTRL_CLR_PDF BIT(4)
-+# define DSI1_CTRL_CLR_CDF BIT(4)
-+# define DSI0_CTRL_CLR_CDF BIT(3)
-+# define DSI0_CTRL_CTRL2 BIT(2)
-+# define DSI1_CTRL_DISABLE_DISP_CRCC BIT(2)
-+# define DSI0_CTRL_CTRL1 BIT(1)
-+# define DSI1_CTRL_DISABLE_DISP_ECCC BIT(1)
-+# define DSI0_CTRL_CTRL0 BIT(0)
-+# define DSI1_CTRL_EN BIT(0)
-+# define DSI0_CTRL_RESET_FIFOS (DSI_CTRL_CLR_LDF | \
-+ DSI0_CTRL_CLR_PBCF | \
-+ DSI0_CTRL_CLR_CPBCF | \
-+ DSI0_CTRL_CLR_PDF | \
-+ DSI0_CTRL_CLR_CDF)
-+# define DSI1_CTRL_RESET_FIFOS (DSI_CTRL_CLR_LDF | \
-+ DSI1_CTRL_CLR_RXF | \
-+ DSI1_CTRL_CLR_PDF | \
-+ DSI1_CTRL_CLR_CDF)
-+
-+#define DSI1_TXPKT2C 0x0c
-+#define DSI1_TXPKT2H 0x10
-+#define DSI1_TXPKT_PIX_FIFO 0x20
-+#define DSI1_RXPKT_FIFO 0x24
-+#define DSI1_DISP0_CTRL 0x28
-+#define DSI1_INT_STAT 0x30
-+#define DSI1_INT_EN 0x34
-+
-+/* State reporting bits. These mostly behave like INT_STAT, where
-+ * writing a 1 clears the bit.
-+ */
-+#define DSI1_STAT 0x38
-+# define DSI1_STAT_PHY_D3_ULPS BIT(31)
-+# define DSI1_STAT_PHY_D3_STOP BIT(30)
-+# define DSI1_STAT_PHY_D2_ULPS BIT(29)
-+# define DSI1_STAT_PHY_D2_STOP BIT(28)
-+# define DSI1_STAT_PHY_D1_ULPS BIT(27)
-+# define DSI1_STAT_PHY_D1_STOP BIT(26)
-+# define DSI1_STAT_PHY_D0_ULPS BIT(25)
-+# define DSI1_STAT_PHY_D0_STOP BIT(24)
-+# define DSI1_STAT_FIFO_ERR BIT(23)
-+# define DSI1_STAT_PHY_RXLPDT BIT(22)
-+# define DSI1_STAT_PHY_RXTRIG BIT(21)
-+# define DSI1_STAT_PHY_D0_LPDT BIT(20)
-+/* Set when in forward direction */
-+# define DSI1_STAT_PHY_DIR BIT(19)
-+# define DSI1_STAT_PHY_CLOCK_ULPS BIT(18)
-+# define DSI1_STAT_PHY_CLOCK_HS BIT(17)
-+# define DSI1_STAT_PHY_CLOCK_STOP BIT(16)
-+# define DSI1_STAT_PR_TO BIT(15)
-+# define DSI1_STAT_TA_TO BIT(14)
-+# define DSI1_STAT_LPRX_TO BIT(13)
-+# define DSI1_STAT_HSTX_TO BIT(12)
-+# define DSI1_STAT_ERR_CONT_LP1 BIT(11)
-+# define DSI1_STAT_ERR_CONT_LP0 BIT(10)
-+# define DSI1_STAT_ERR_CONTROL BIT(9)
-+# define DSI1_STAT_ERR_SYNC_ESC BIT(8)
-+# define DSI1_STAT_RXPKT2 BIT(7)
-+# define DSI1_STAT_RXPKT1 BIT(6)
-+# define DSI1_STAT_TXPKT2_BUSY BIT(5)
-+# define DSI1_STAT_TXPKT2_DONE BIT(4)
-+# define DSI1_STAT_TXPKT2_END BIT(3)
-+# define DSI1_STAT_TXPKT1_BUSY BIT(2)
-+# define DSI1_STAT_TXPKT1_DONE BIT(1)
-+# define DSI1_STAT_TXPKT1_END BIT(0)
-+
-+#define DSI1_HSTX_TO_CNT 0x3c
-+#define DSI1_LPRX_TO_CNT 0x40
-+#define DSI1_TA_TO_CNT 0x44
-+#define DSI1_PR_TO_CNT 0x48
-+#define DSI1_PHYC 0x4c
-+
-+#define DSI1_HS_CLT0 0x50
-+# define DSI_HS_CLT0_CZERO_MASK VC4_MASK(26, 18)
-+# define DSI_HS_CLT0_CZERO_SHIFT 18
-+# define DSI_HS_CLT0_CPRE_MASK VC4_MASK(17, 9)
-+# define DSI_HS_CLT0_CPRE_SHIFT 9
-+# define DSI_HS_CLT0_CPREP_MASK VC4_MASK(8, 0)
-+# define DSI_HS_CLT0_CPREP_SHIFT 0
-+
-+#define DSI1_HS_CLT1 0x54
-+# define DSI_HS_CLT1_CTRAIL_MASK VC4_MASK(17, 9)
-+# define DSI_HS_CLT1_CTRAIL_SHIFT 9
-+# define DSI_HS_CLT1_CPOST_MASK VC4_MASK(8, 0)
-+# define DSI_HS_CLT1_CPOST_SHIFT 0
-+
-+#define DSI1_HS_CLT2 0x58
-+# define DSI_HS_CLT2_WUP_MASK VC4_MASK(23, 0)
-+# define DSI_HS_CLT2_WUP_SHIFT 0
-+
-+#define DSI1_HS_DLT3 0x5c
-+# define DSI_HS_DLT3_EXIT_MASK VC4_MASK(26, 18)
-+# define DSI_HS_DLT3_EXIT_SHIFT 18
-+# define DSI_HS_DLT3_ZERO_MASK VC4_MASK(17, 9)
-+# define DSI_HS_DLT3_ZERO_SHIFT 9
-+# define DSI_HS_DLT3_PRE_MASK VC4_MASK(8, 0)
-+# define DSI_HS_DLT3_PRE_SHIFT 0
-+
-+#define DSI1_HS_DLT4 0x60
-+# define DSI_HS_DLT4_ANLAT_MASK VC4_MASK(22, 18)
-+# define DSI_HS_DLT4_ANLAT_SHIFT 18
-+# define DSI_HS_DLT4_TRAIL_MASK VC4_MASK(17, 9)
-+# define DSI_HS_DLT4_TRAIL_SHIFT 9
-+# define DSI_HS_DLT4_LPX_MASK VC4_MASK(8, 0)
-+# define DSI_HS_DLT4_LPX_SHIFT 0
-+
-+#define DSI1_HS_DLT5 0x64
-+# define DSI_HS_DLT5_INIT_MASK VC4_MASK(23, 0)
-+# define DSI_HS_DLT5_INIT_SHIFT 0
-+
-+#define DSI1_HS_DLT6 0x68
-+# define DSI_HS_DLT6_TA_GET_MASK VC4_MASK(31, 24)
-+# define DSI_HS_DLT6_TA_GET_SHIFT 24
-+# define DSI_HS_DLT6_TA_SURE_MASK VC4_MASK(23, 16)
-+# define DSI_HS_DLT6_TA_SURE_SHIFT 16
-+# define DSI_HS_DLT6_TA_GO_MASK VC4_MASK(15, 8)
-+# define DSI_HS_DLT6_TA_GO_SHIFT 8
-+# define DSI_HS_DLT6_LP_LPX_MASK VC4_MASK(7, 0)
-+# define DSI_HS_DLT6_LP_LPX_SHIFT 0
-+
-+#define DSI1_HS_DLT7 0x6c
-+# define DSI_HS_DLT7_LP_WUP_MASK VC4_MASK(23, 0)
-+# define DSI_HS_DLT7_LP_WUP_SHIFT 0
-+
-+#define DSI1_PHY_AFEC0 0x70
-+
-+#define DSI1_PHY_AFEC1 0x74
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE3_MASK VC4_MASK(19, 16)
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE3_SHIFT 16
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE2_MASK VC4_MASK(15, 12)
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE2_SHIFT 12
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE1_MASK VC4_MASK(11, 8)
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE1_SHIFT 8
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE0_MASK VC4_MASK(7, 4)
-+# define DSI1_PHY_AFEC1_ACTRL_DLANE0_SHIFT 4
-+# define DSI1_PHY_AFEC1_ACTRL_CLANE_MASK VC4_MASK(3, 0)
-+# define DSI1_PHY_AFEC1_ACTRL_CLANE_SHIFT 0
-+
-+#define DSI1_TST_SEL 0x78
-+#define DSI1_TST_MON 0x7c
-+#define DSI1_PHY_TST1 0x80
-+#define DSI1_PHY_TST2 0x84
-+#define DSI1_PHY_FIFO_STAT 0x88
-+/* Actually, all registers in the range that aren't otherwise claimed
-+ * will return the ID.
-+ */
-+#define DSI1_ID 0x8c
-+
-+/* General DSI hardware state. */
-+struct vc4_dsi {
-+ struct platform_device *pdev;
-+
-+ struct mipi_dsi_host dsi_host;
-+ struct drm_encoder *encoder;
-+ struct drm_connector *connector;
-+ struct drm_panel *panel;
-+
-+ void __iomem *regs;
-+
-+ struct dma_chan *reg_dma_chan;
-+ dma_addr_t reg_dma_paddr;
-+ u32 *reg_dma_mem;
-+ dma_addr_t reg_paddr;
-+
-+ /* Whether we're on bcm2835's DSI0 or DSI1. */
-+ int port;
-+
-+ /* DSI channel for the panel we're connected to. */
-+ u32 channel;
-+ u32 lanes;
-+ enum mipi_dsi_pixel_format format;
-+ u32 mode_flags;
-+
-+ /* Input clock to the PHY, for the DSI escape clock. */
-+ struct clk *escape_clock;
-+
-+ /* Input clock to the PHY, used to generate the DSI bit
-+ * clock.
-+ */
-+ struct clk *pll_phy_clock;
-+
-+ /* Byte clock generated within the DSI PHY. */
-+ struct clk_hw phy_byte_clock;
-+
-+ struct clk_onecell_data clk_onecell;
-+
-+ /* Pixel clock output to the pixelvalve, generated from the
-+ * byte clock.
-+ */
-+ struct clk *pixel_clock;
-+
-+ struct completion xfer_completion;
-+ int xfer_result;
-+
-+ bool use_firmware_setup;
-+};
-+
-+static inline void
-+dsi_write(struct vc4_dsi *dsi, u32 offset, u32 val)
-+{
-+ struct dma_chan *chan = dsi->reg_dma_chan;
-+ struct dma_async_tx_descriptor *tx;
-+ dma_cookie_t cookie;
-+ int ret;
-+
-+#if 0 /* XXX */
-+ dev_info(&dsi->pdev->dev, "WRITE 0x%04x -> 0x%08x\n", offset, val);
-+#endif
-+
-+ if (!chan) {
-+ writel(val, dsi->regs + offset);
-+ return;
-+ }
-+
-+ *dsi->reg_dma_mem = val;
-+
-+ tx = chan->device->device_prep_dma_memcpy(chan,
-+ dsi->reg_paddr + offset,
-+ dsi->reg_dma_paddr,
-+ 4, 0);
-+ if (!tx) {
-+ DRM_ERROR("Failed to set up DMA register write\n");
-+ return;
-+ }
-+
-+ cookie = tx->tx_submit(tx);
-+ ret = dma_submit_error(cookie);
-+ if (ret) {
-+ DRM_ERROR("Failed to submit DMA: %d\n", ret);
-+ return;
-+ }
-+ ret = dma_sync_wait(chan, cookie);
-+ if (ret)
-+ DRM_ERROR("Failed to wait for DMA: %d\n", ret);
-+
-+#if 0 /* XXX */
-+ if (offset != DSI1_TXPKT_CMD_FIFO &&
-+ offset != DSI1_TXPKT_PIX_FIFO) {
-+ dev_info(&dsi->pdev->dev,
-+ " -> 0x%08x\n",
-+ readl(dsi->regs + (offset)));
-+ }
-+#endif
-+}
-+
-+#define DSI_READ(offset) readl(dsi->regs + (offset))
-+#define DSI_WRITE(offset, val) dsi_write(dsi, offset, val)
-+#define DSI_PORT_READ(offset) \
-+ DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset)
-+#define DSI_PORT_WRITE(offset, val) \
-+ DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val)
-+#define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit)
-+
-+/* VC4 DSI encoder KMS struct */
-+struct vc4_dsi_encoder {
-+ struct vc4_encoder base;
-+ struct vc4_dsi *dsi;
-+};
-+
-+static inline struct vc4_dsi_encoder *
-+to_vc4_dsi_encoder(struct drm_encoder *encoder)
-+{
-+ return container_of(encoder, struct vc4_dsi_encoder, base.base);
-+}
-+#define host_to_dsi(host) container_of(host, struct vc4_dsi, dsi_host)
-+
-+/* VC4 DSI connector KMS struct */
-+struct vc4_dsi_connector {
-+ struct drm_connector base;
-+ struct vc4_dsi *dsi;
-+
-+ /* Since the connector is attached to just the one encoder,
-+ * this is the reference to it so we can do the best_encoder()
-+ * hook.
-+ */
-+ struct drm_encoder *encoder;
-+};
-+
-+static inline struct vc4_dsi_connector *
-+to_vc4_dsi_connector(struct drm_connector *connector)
-+{
-+ return container_of(connector, struct vc4_dsi_connector, base);
-+}
-+
-+static const struct debugfs_reg32 dsi0_regs[] = {
-+ VC4_DEBUG_REG(DSI0_CTRL),
-+ VC4_DEBUG_REG(DSI0_STAT),
-+ VC4_DEBUG_REG(DSI0_DISP0_CTRL),
-+ VC4_DEBUG_REG(DSI0_DISP1_CTRL),
-+ VC4_DEBUG_REG(DSI0_PHYC),
-+ VC4_DEBUG_REG(DSI0_STAT),
-+ VC4_DEBUG_REG(DSI0_HS_CLT0),
-+ VC4_DEBUG_REG(DSI0_HS_CLT1),
-+ VC4_DEBUG_REG(DSI0_HS_CLT2),
-+ VC4_DEBUG_REG(DSI0_HS_DLT3),
-+ VC4_DEBUG_REG(DSI0_HS_DLT4),
-+ VC4_DEBUG_REG(DSI0_HS_DLT5),
-+ VC4_DEBUG_REG(DSI0_HS_DLT6),
-+ VC4_DEBUG_REG(DSI0_HS_DLT7),
-+ VC4_DEBUG_REG(DSI0_PHY_AFEC0),
-+ VC4_DEBUG_REG(DSI0_PHY_AFEC1),
-+ VC4_DEBUG_REG(DSI0_ID),
-+};
-+
-+static const struct debugfs_reg32 dsi1_regs[] = {
-+ VC4_DEBUG_REG(DSI1_CTRL),
-+ VC4_DEBUG_REG(DSI1_STAT),
-+ VC4_DEBUG_REG(DSI1_DISP0_CTRL),
-+ VC4_DEBUG_REG(DSI1_DISP1_CTRL),
-+ VC4_DEBUG_REG(DSI1_PHYC),
-+ VC4_DEBUG_REG(DSI1_STAT),
-+ VC4_DEBUG_REG(DSI1_HS_CLT0),
-+ VC4_DEBUG_REG(DSI1_HS_CLT1),
-+ VC4_DEBUG_REG(DSI1_HS_CLT2),
-+ VC4_DEBUG_REG(DSI1_HS_DLT3),
-+ VC4_DEBUG_REG(DSI1_HS_DLT4),
-+ VC4_DEBUG_REG(DSI1_HS_DLT5),
-+ VC4_DEBUG_REG(DSI1_HS_DLT6),
-+ VC4_DEBUG_REG(DSI1_HS_DLT7),
-+ VC4_DEBUG_REG(DSI1_PHY_AFEC0),
-+ VC4_DEBUG_REG(DSI1_PHY_AFEC1),
-+ VC4_DEBUG_REG(DSI1_ID),
-+};
-+
-+static void vc4_dsi_dump_regs(struct vc4_dsi *dsi, const char *prefix)
-+{
-+ if (dsi->port == 0) {
-+ vc4_dump_regs32(dsi0_regs, ARRAY_SIZE(dsi0_regs), dsi->regs,
-+ prefix);
-+ } else {
-+ vc4_dump_regs32(dsi1_regs, ARRAY_SIZE(dsi1_regs), dsi->regs,
-+ prefix);
-+ }
-+}
-+
-+#ifdef CONFIG_DEBUG_FS
-+int vc4_dsi_debugfs_regs(struct seq_file *m, void *number)
-+{
-+ struct drm_info_node *node = (struct drm_info_node *)m->private;
-+ struct drm_device *dev = node->minor->dev;
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_dsi *dsi;
-+ int port = (uintptr_t)number;
-+
-+ if (port == 0) {
-+ dsi = vc4->dsi0;
-+ debugfs_print_regs32(m, dsi0_regs, ARRAY_SIZE(dsi0_regs),
-+ dsi->regs, "");
-+ } else {
-+ dsi = vc4->dsi1;
-+ debugfs_print_regs32(m, dsi1_regs, ARRAY_SIZE(dsi1_regs),
-+ dsi->regs, "");
-+ }
-+
-+ return 0;
-+}
-+#endif
-+
-+static enum drm_connector_status
-+vc4_dsi_connector_detect(struct drm_connector *connector, bool force)
-+{
-+ struct vc4_dsi_connector *vc4_connector =
-+ to_vc4_dsi_connector(connector);
-+ struct vc4_dsi *dsi = vc4_connector->dsi;
-+
-+ if (dsi->panel)
-+ return connector_status_connected;
-+ else
-+ return connector_status_disconnected;
-+}
-+
-+static void vc4_dsi_connector_destroy(struct drm_connector *connector)
-+{
-+ drm_connector_unregister(connector);
-+ drm_connector_cleanup(connector);
-+}
-+
-+static int vc4_dsi_connector_get_modes(struct drm_connector *connector)
-+{
-+ struct vc4_dsi_connector *vc4_connector =
-+ to_vc4_dsi_connector(connector);
-+ struct vc4_dsi *dsi = vc4_connector->dsi;
-+
-+ if (dsi->panel)
-+ return drm_panel_get_modes(dsi->panel);
-+
-+ return 0;
-+}
-+
-+static struct drm_encoder *
-+vc4_dsi_connector_best_encoder(struct drm_connector *connector)
-+{
-+ struct vc4_dsi_connector *dsi_connector =
-+ to_vc4_dsi_connector(connector);
-+ return dsi_connector->encoder;
-+}
-+
-+static const struct drm_connector_funcs vc4_dsi_connector_funcs = {
-+ .dpms = drm_atomic_helper_connector_dpms,
-+ .detect = vc4_dsi_connector_detect,
-+ .fill_modes = drm_helper_probe_single_connector_modes,
-+ .destroy = vc4_dsi_connector_destroy,
-+ .reset = drm_atomic_helper_connector_reset,
-+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
-+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
-+};
-+
-+static const struct drm_connector_helper_funcs vc4_dsi_connector_helper_funcs = {
-+ .get_modes = vc4_dsi_connector_get_modes,
-+ .best_encoder = vc4_dsi_connector_best_encoder,
-+};
-+
-+static struct drm_connector *vc4_dsi_connector_init(struct drm_device *dev,
-+ struct vc4_dsi *dsi)
-+{
-+ struct drm_connector *connector = NULL;
-+ struct vc4_dsi_connector *dsi_connector;
-+ int ret = 0;
-+
-+ dsi_connector = devm_kzalloc(dev->dev, sizeof(*dsi_connector),
-+ GFP_KERNEL);
-+ if (!dsi_connector) {
-+ ret = -ENOMEM;
-+ goto fail;
-+ }
-+ connector = &dsi_connector->base;
-+
-+ dsi_connector->encoder = dsi->encoder;
-+ dsi_connector->dsi = dsi;
-+
-+ drm_connector_init(dev, connector, &vc4_dsi_connector_funcs,
-+ DRM_MODE_CONNECTOR_DSI);
-+ drm_connector_helper_add(connector, &vc4_dsi_connector_helper_funcs);
-+
-+ connector->polled = 0;
-+ connector->interlace_allowed = 0;
-+ connector->doublescan_allowed = 0;
-+
-+ drm_mode_connector_attach_encoder(connector, dsi->encoder);
-+
-+ return connector;
-+
-+ fail:
-+ if (connector)
-+ vc4_dsi_connector_destroy(connector);
-+
-+ return ERR_PTR(ret);
-+}
-+
-+static void vc4_dsi_encoder_destroy(struct drm_encoder *encoder)
-+{
-+ drm_encoder_cleanup(encoder);
-+}
-+
-+static const struct drm_encoder_funcs vc4_dsi_encoder_funcs = {
-+ .destroy = vc4_dsi_encoder_destroy,
-+};
-+
-+static void vc4_dsi_latch_ulps(struct vc4_dsi *dsi, bool latch)
-+{
-+ u32 afec0 = DSI_PORT_READ(PHY_AFEC0);
-+
-+ if (latch)
-+ afec0 |= DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS);
-+ else
-+ afec0 &= ~DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS);
-+
-+ DSI_PORT_WRITE(PHY_AFEC0, afec0);
-+}
-+
-+/* Enters or exits Ultra Low Power State. */
-+static void vc4_dsi_ulps(struct vc4_dsi *dsi, bool ulps)
-+{
-+ u32 phyc_ulps = (DSI_PORT_BIT(PHYC_CLANE_ULPS) |
-+ DSI_PHYC_DLANE0_ULPS |
-+ (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) |
-+ (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) |
-+ (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0));
-+ u32 stat_ulps = (DSI1_STAT_PHY_CLOCK_ULPS |
-+ DSI1_STAT_PHY_D0_ULPS |
-+ (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) |
-+ (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) |
-+ (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0));
-+ u32 stat_stop = (DSI1_STAT_PHY_CLOCK_STOP |
-+ DSI1_STAT_PHY_D0_STOP |
-+ (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) |
-+ (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) |
-+ (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0));
-+ int ret;
-+
-+ DSI_PORT_WRITE(STAT, stat_ulps);
-+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) | phyc_ulps);
-+ ret = wait_for((DSI_PORT_READ(STAT) & stat_ulps) == stat_ulps, 20);
-+ if (ret) {
-+ dev_warn(&dsi->pdev->dev,
-+ "Timeout waiting for DSI ULPS entry: STAT 0x%08x",
-+ DSI_PORT_READ(STAT));
-+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
-+ vc4_dsi_latch_ulps(dsi, false);
-+ return;
-+ }
-+
-+ /* The DSI module can't be disabled while the module is
-+ * generating ULPS state. So, to be able to disable the
-+ * module, we have the AFE latch the ULPS state and continue
-+ * on to having the module enter STOP.
-+ */
-+ vc4_dsi_latch_ulps(dsi, ulps);
-+
-+ DSI_PORT_WRITE(STAT, stat_stop);
-+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
-+ ret = wait_for((DSI_PORT_READ(STAT) & stat_stop) == stat_stop, 20);
-+ if (ret) {
-+ dev_warn(&dsi->pdev->dev,
-+ "Timeout waiting for DSI STOP entry: STAT 0x%08x",
-+ DSI_PORT_READ(STAT));
-+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps);
-+ return;
-+ }
-+}
-+
-+static uint32_t
-+dsi_hs_timing(u32 ui_ns, u32 ns, u32 ui)
-+{
-+ /* The HS timings have to be rounded up to a multiple of 8
-+ * because we're using the byte clock.
-+ */
-+ return roundup(ui + DIV_ROUND_UP(ns, ui_ns), 8);
-+}
-+
-+/* ESC always runs at 100Mhz. */
-+#define ESC_TIME_NS 10
-+
-+static uint32_t
-+dsi_esc_timing(u32 ns)
-+{
-+ return DIV_ROUND_UP(ns, ESC_TIME_NS);
-+}
-+
-+static void vc4_dsi_encoder_disable(struct drm_encoder *encoder)
-+{
-+ struct vc4_dsi_encoder *vc4_encoder = to_vc4_dsi_encoder(encoder);
-+ struct vc4_dsi *dsi = vc4_encoder->dsi;
-+
-+ drm_panel_disable(dsi->panel);
-+
-+ if (!dsi->use_firmware_setup)
-+ vc4_dsi_ulps(dsi, true);
-+
-+ drm_panel_unprepare(dsi->panel);
-+
-+ if (dsi->use_firmware_setup) {
-+ /* Since we're using the firmware setup and aren't
-+ * communicating with the panel to bring the link
-+ * down, we need to just keep the clocks and DSI
-+ * module running.
-+ */
-+ } else {
-+ clk_disable_unprepare(dsi->pll_phy_clock);
-+ clk_disable_unprepare(dsi->escape_clock);
-+ clk_disable_unprepare(dsi->pixel_clock);
-+ }
-+}
-+
-+static void vc4_dsi_encoder_enable(struct drm_encoder *encoder)
-+{
-+ struct drm_display_mode *mode = &encoder->crtc->mode;
-+ struct vc4_dsi_encoder *vc4_encoder = to_vc4_dsi_encoder(encoder);
-+ struct vc4_dsi *dsi = vc4_encoder->dsi;
-+ struct device *dev = &dsi->pdev->dev;
-+ uint32_t format = 0, divider = 0;
-+ bool debug_dump_regs = false;
-+ unsigned long hs_clock;
-+ uint32_t ui_ns;
-+ /* Minimum LP state duration in escape clock cycles. */
-+ uint32_t lpx = dsi_esc_timing(60);
-+ uint32_t phyc;
-+ int ret;
-+
-+ ret = drm_panel_prepare(dsi->panel);
-+ if (ret) {
-+ DRM_ERROR("Panel failed to prepare\n");
-+ return;
-+ }
-+
-+ if (debug_dump_regs)
-+ vc4_dsi_dump_regs(dsi, "DSI before: ");
-+
-+ /* XXX */
-+ if (!dsi->use_firmware_setup) {
-+ ret = clk_set_rate(dsi->pll_phy_clock, 2020000000 / 3);
-+ if (ret)
-+ dev_err(&dsi->pdev->dev, "Failed to set phy clock: %d\n", ret);
-+ dev_info(&dsi->pdev->dev, "Tried to set clock to: %d\n", 2000000000 / 3);
-+
-+ ret = clk_prepare_enable(dsi->escape_clock);
-+ if (ret) {
-+ DRM_ERROR("Failed to turn on DSI escape clock: %d\n", ret);
-+ return;
-+ }
-+
-+ ret = clk_prepare_enable(dsi->pll_phy_clock);
-+ if (ret) {
-+ DRM_ERROR("Failed to turn on DSI PLL: %d\n", ret);
-+ return;
-+ }
-+
-+ ret = clk_set_rate(dsi->pixel_clock, mode->clock * 1000);
-+ if (ret)
-+ dev_err(dev, "Failed to set pixel clock: %d\n", ret);
-+ dev_info(&dsi->pdev->dev, "Tried to set pixel clock to: %d\n", mode->clock * 1000);
-+
-+ ret = clk_prepare_enable(dsi->pixel_clock);
-+ if (ret) {
-+ DRM_ERROR("Failed to turn on DSI pixel clock: %d\n", ret);
-+ return;
-+ }
-+ }
-+
-+ hs_clock = clk_get_rate(dsi->pll_phy_clock);
-+
-+ /* Reset the DSI and all its fifos. */
-+ if (dsi->port == 0) {
-+ DSI_PORT_WRITE(CTRL,
-+ DSI_CTRL_SOFT_RESET_CFG |
-+ DSI0_CTRL_RESET_FIFOS);
-+ } else {
-+ DSI_PORT_WRITE(CTRL,
-+ DSI_CTRL_SOFT_RESET_CFG |
-+ DSI1_CTRL_RESET_FIFOS);
-+ }
-+
-+ DSI_PORT_WRITE(CTRL,
-+ DSI_CTRL_HSDT_EOT_DISABLE |
-+ DSI_CTRL_RX_LPDT_EOT_DISABLE);
-+
-+ switch (dsi->format) {
-+ case MIPI_DSI_FMT_RGB888:
-+ format = DSI_PFORMAT_RGB888;
-+ divider = 24 / dsi->lanes;
-+ break;
-+ case MIPI_DSI_FMT_RGB666:
-+ format = DSI_PFORMAT_RGB666;
-+ divider = 24 / dsi->lanes;
-+ break;
-+ case MIPI_DSI_FMT_RGB666_PACKED:
-+ format = DSI_PFORMAT_RGB666_PACKED;
-+ divider = 18 / dsi->lanes;
-+ break;
-+ case MIPI_DSI_FMT_RGB565:
-+ format = DSI_PFORMAT_RGB565;
-+ divider = 16 / dsi->lanes;
-+ break;
-+ }
-+
-+ /* Set AFE CTR00/CTR1 to release powerdown of analog. */
-+ if (dsi->port == 0) {
-+ u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) |
-+ VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ));
-+
-+ if (dsi->lanes < 2)
-+ afec0 |= DSI0_PHY_AFEC0_PD_DLANE1;
-+
-+ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO))
-+ afec0 |= DSI0_PHY_AFEC0_RESET;
-+
-+ DSI_PORT_WRITE(PHY_AFEC0, afec0);
-+
-+ DSI_PORT_WRITE(PHY_AFEC1,
-+ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE1) |
-+ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE0) |
-+ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_CLANE));
-+ } else {
-+ u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) |
-+ VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ) |
-+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_CLANE) |
-+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE0) |
-+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE1) |
-+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE2) |
-+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE3));
-+
-+ if (dsi->lanes < 4)
-+ afec0 |= DSI1_PHY_AFEC0_PD_DLANE3;
-+ if (dsi->lanes < 3)
-+ afec0 |= DSI1_PHY_AFEC0_PD_DLANE2;
-+ if (dsi->lanes < 2)
-+ afec0 |= DSI1_PHY_AFEC0_PD_DLANE1;
-+
-+ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO))
-+ afec0 |= DSI1_PHY_AFEC0_RESET;
-+
-+ DSI_PORT_WRITE(PHY_AFEC0, afec0);
-+
-+ DSI_PORT_WRITE(PHY_AFEC1, 0);
-+ }
-+
-+ /* How many ns one DSI unit interval is. Note that the clock
-+ * is DDR, so there's an extra divide by 2.
-+ */
-+ ui_ns = DIV_ROUND_UP(500000000, hs_clock);
-+
-+ DSI_PORT_WRITE(HS_CLT0,
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 262, 0),
-+ DSI_HS_CLT0_CZERO) |
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 0, 8),
-+ DSI_HS_CLT0_CPRE) |
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 38, 0),
-+ DSI_HS_CLT0_CPREP));
-+
-+ DSI_PORT_WRITE(HS_CLT1,
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 0),
-+ DSI_HS_CLT1_CTRAIL) |
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 52),
-+ DSI_HS_CLT1_CPOST));
-+
-+ DSI_PORT_WRITE(HS_CLT2,
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000000, 0),
-+ DSI_HS_CLT2_WUP));
-+
-+ DSI_PORT_WRITE(HS_DLT3,
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 100, 0),
-+ DSI_HS_DLT3_EXIT) |
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 105, 6),
-+ DSI_HS_DLT3_ZERO) |
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 40, 4),
-+ DSI_HS_DLT3_PRE));
-+
-+ DSI_PORT_WRITE(HS_DLT4,
-+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, lpx * ESC_TIME_NS, 0),
-+ DSI_HS_DLT4_LPX) |
-+ VC4_SET_FIELD(max(dsi_hs_timing(ui_ns, 0, 8),
-+ dsi_hs_timing(ui_ns, 60, 4)),
-+ DSI_HS_DLT4_TRAIL) |
-+ VC4_SET_FIELD(0, DSI_HS_DLT4_ANLAT));
-+
-+ DSI_PORT_WRITE(HS_DLT5, VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000, 5000),
-+ DSI_HS_DLT5_INIT));
-+
-+ DSI_PORT_WRITE(HS_DLT6,
-+ VC4_SET_FIELD(lpx * 5, DSI_HS_DLT6_TA_GET) |
-+ VC4_SET_FIELD(lpx, DSI_HS_DLT6_TA_SURE) |
-+ VC4_SET_FIELD(lpx * 4, DSI_HS_DLT6_TA_GO) |
-+ VC4_SET_FIELD(lpx, DSI_HS_DLT6_LP_LPX));
-+
-+ DSI_PORT_WRITE(HS_DLT7,
-+ VC4_SET_FIELD(dsi_esc_timing(1000000),
-+ DSI_HS_DLT7_LP_WUP));
-+
-+ /* Define EOT PKT in EOT reg. */
-+
-+ phyc = (DSI_PHYC_DLANE0_ENABLE |
-+ (dsi->lanes >= 2 ? DSI_PHYC_DLANE1_ENABLE : 0) |
-+ (dsi->lanes >= 3 ? DSI_PHYC_DLANE2_ENABLE : 0) |
-+ (dsi->lanes >= 4 ? DSI_PHYC_DLANE3_ENABLE : 0) |
-+ (dsi->port == 0 ?
-+ VC4_SET_FIELD(lpx - 1, DSI0_PHYC_ESC_CLK_LPDT) :
-+ VC4_SET_FIELD(lpx - 1, DSI1_PHYC_ESC_CLK_LPDT)) |
-+ DSI_PORT_BIT(PHYC_CLANE_ENABLE));
-+
-+ DSI_PORT_WRITE(CTRL,
-+ DSI_PORT_READ(CTRL) |
-+ DSI_CTRL_CAL_BYTE);
-+
-+ /* HS timeout in HS clock cycles: disabled. */
-+ DSI_PORT_WRITE(HSTX_TO_CNT, 0);
-+ /* LP receive timeout in HS clocks. */
-+ DSI_PORT_WRITE(LPRX_TO_CNT, 0xffffff);
-+ /* Bus turnaround timeout */
-+ DSI_PORT_WRITE(TA_TO_CNT, 100000);
-+ /* Display reset sequence timeout */
-+ DSI_PORT_WRITE(TA_TO_CNT, 100000);
-+
-+ if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
-+ DSI_PORT_WRITE(DISP0_CTRL,
-+ VC4_SET_FIELD(divider, DSI_DISP0_PIX_CLK_DIV) |
-+ VC4_SET_FIELD(format, DSI_DISP0_PFORMAT) |
-+ VC4_SET_FIELD(DSI_DISP0_LP_STOP_PERFRAME,
-+ DSI_DISP0_LP_STOP_CTRL) |
-+ DSI_DISP0_ST_END |
-+ DSI_DISP0_ENABLE);
-+ } else {
-+ DSI_PORT_WRITE(DISP0_CTRL,
-+ DSI_DISP0_COMMAND_MODE |
-+ DSI_DISP0_ENABLE);
-+ }
-+
-+ /* Set up DISP1 for transferring long command payloads through
-+ * the pixfifo.
-+ */
-+ DSI_PORT_WRITE(DISP1_CTRL,
-+ VC4_SET_FIELD(DSI_DISP1_PFORMAT_32BIT_LE,
-+ DSI_DISP1_PFORMAT) |
-+ DSI_DISP1_ENABLE);
-+
-+ if (!(dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
-+ phyc |= DSI_PORT_BIT(PHYC_HS_CLK_CONTINUOUS);
-+
-+ DSI_PORT_WRITE(PHYC, phyc);
-+
-+ /* Ungate the block. */
-+ if (dsi->port == 0)
-+ DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI0_CTRL_CTRL0);
-+ else {
-+ DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN);
-+ }
-+
-+ if (!dsi->use_firmware_setup)
-+ vc4_dsi_ulps(dsi, false);
-+
-+ if (debug_dump_regs)
-+ vc4_dsi_dump_regs(dsi, "DSI after: ");
-+
-+ ret = drm_panel_enable(dsi->panel);
-+ if (ret) {
-+ DRM_ERROR("Panel failed to enable\n");
-+ drm_panel_unprepare(dsi->panel);
-+ return;
-+ }
-+}
-+
-+static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host,
-+ const struct mipi_dsi_msg *msg)
-+{
-+ struct vc4_dsi *dsi = host_to_dsi(host);
-+ struct mipi_dsi_packet packet;
-+ u32 pkth = 0, pktc = 0;
-+ int i, ret;
-+ bool is_long = mipi_dsi_packet_format_is_long(msg->type);
-+ u32 cmd_fifo_len = 0, pix_fifo_len = 0;
-+
-+ mipi_dsi_create_packet(&packet, msg);
-+ pr_err("DSI host xfer %db, %s\n",
-+ packet.payload_length,
-+ is_long ? "long" : "short");
-+
-+ pkth |= VC4_SET_FIELD(packet.header[0], DSI_TXPKT1H_BC_DT);
-+ pkth |= VC4_SET_FIELD(packet.header[1] |
-+ (packet.header[2] << 8),
-+ DSI_TXPKT1H_BC_PARAM);
-+ if (is_long) {
-+ /* Divide data across the various FIFOs we have available.
-+ * The command FIFO takes byte-oriented data, but is of
-+ * limited size. The pixel FIFO (never actually used for
-+ * pixel data in reality) is word oriented, and substantially
-+ * larger. So, we use the pixel FIFO for most of the data,
-+ * sending the residual bytes in the command FIFO at the start.
-+ *
-+ * With this arrangement, the command FIFO will never get full.
-+ */
-+ cmd_fifo_len = packet.payload_length % DSI_PIX_FIFO_WIDTH;
-+ pix_fifo_len = ((packet.payload_length - cmd_fifo_len) /
-+ DSI_PIX_FIFO_WIDTH);
-+
-+ WARN_ON_ONCE(pix_fifo_len >= DSI_PIX_FIFO_DEPTH);
-+
-+ pkth |= VC4_SET_FIELD(cmd_fifo_len, DSI_TXPKT1H_BC_CMDFIFO);
-+ }
-+
-+ if (msg->rx_len) {
-+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_CMD_CTRL_RX,
-+ DSI_TXPKT1C_CMD_CTRL);
-+ } else {
-+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_CMD_CTRL_TX,
-+ DSI_TXPKT1C_CMD_CTRL);
-+ }
-+
-+ dev_info(&dsi->pdev->dev, "FIFO setup: %d, %d\n",
-+ cmd_fifo_len, pix_fifo_len);
-+
-+ for (i = 0; i < cmd_fifo_len; i++)
-+ DSI_PORT_WRITE(TXPKT_CMD_FIFO, packet.payload[i]);
-+ for (i = 0; i < pix_fifo_len; i++) {
-+ const uint8_t *pix = packet.payload + cmd_fifo_len + i * 4;
-+ DSI_PORT_WRITE(TXPKT_PIX_FIFO,
-+ pix[0] |
-+ pix[1] << 8 |
-+ pix[2] << 16 |
-+ pix[3] << 24);
-+ }
-+
-+ if (msg->flags & MIPI_DSI_MSG_USE_LPM)
-+ pktc |= DSI_TXPKT1C_CMD_MODE_LP;
-+ if (is_long)
-+ pktc |= DSI_TXPKT1C_CMD_TYPE_LONG;
-+
-+ /* Send one copy of the packet. Larger repeats are used for pixel
-+ * data in command mode.
-+ */
-+ pktc |= VC4_SET_FIELD(1, DSI_TXPKT1C_CMD_REPEAT);
-+
-+ pktc |= DSI_TXPKT1C_CMD_EN;
-+ if (pix_fifo_len) {
-+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_DISPLAY_NO_SECONDARY,
-+ DSI_TXPKT1C_DISPLAY_NO);
-+ } else {
-+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_DISPLAY_NO_SHORT,
-+ DSI_TXPKT1C_DISPLAY_NO);
-+ }
-+
-+ /* Enable the appropriate interrupt for the transfer completion. */
-+ dsi->xfer_result = 0;
-+ reinit_completion(&dsi->xfer_completion);
-+ DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF);
-+ if (msg->rx_len) {
-+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI1_INT_PHY_DIR_RTF));
-+ } else {
-+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED |
-+ DSI1_INT_TXPKT1_DONE));
-+ }
-+
-+ /* Send the packet. */
-+ DSI_PORT_WRITE(TXPKT1H, pkth);
-+ DSI_PORT_WRITE(TXPKT1C, pktc);
-+
-+ if (!wait_for_completion_timeout(&dsi->xfer_completion,
-+ msecs_to_jiffies(100))) {
-+ u32 stat = DSI_PORT_READ(STAT);
-+
-+ dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout");
-+ dev_err(&dsi->pdev->dev, "INT_STAT: 0x%08x, STAT: 0x%08x\n",
-+ DSI_PORT_READ(INT_STAT), stat);
-+
-+ if (stat & DSI1_STAT_TXPKT1_DONE) {
-+ dev_info(&dsi->pdev->dev,
-+ "STAT reports DONE, though.\n");
-+ ret = 0;
-+ } else {
-+ ret = -ETIMEDOUT;
-+ }
-+ } else {
-+ ret = dsi->xfer_result;
-+ }
-+
-+ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+ if (ret)
-+ goto reset_fifo_and_return;
-+
-+ if (ret == 0 && msg->rx_len) {
-+ u32 rxpkt1h = DSI_PORT_READ(RXPKT1H);
-+ u8 *msg_rx = msg->rx_buf;
-+
-+ if (rxpkt1h & DSI_RXPKT1H_PKT_TYPE_LONG) {
-+ u32 rxlen = VC4_GET_FIELD(rxpkt1h, DSI_RXPKT1H_BC_PARAM);
-+
-+ if (rxlen != msg->rx_len) {
-+ DRM_ERROR("DSI returned %db, expecting %db\n",
-+ rxlen, msg->rx_len);
-+ ret = -ENXIO;
-+ goto reset_fifo_and_return;
-+ }
-+
-+ for (i = 0; i < msg->rx_len; i++)
-+ msg_rx[i] = DSI_READ(DSI1_RXPKT_FIFO);
-+ } else {
-+ /* XXX: AWER */
-+
-+ msg_rx[0] = VC4_GET_FIELD(rxpkt1h,
-+ DSI_RXPKT1H_SHORT_0);
-+ if (msg->rx_len > 1) {
-+ msg_rx[1] = VC4_GET_FIELD(rxpkt1h,
-+ DSI_RXPKT1H_SHORT_1);
-+ }
-+ }
-+ }
-+
-+ return ret;
-+
-+reset_fifo_and_return:
-+ DRM_ERROR("DSI TRANSFER failed, resetting: %d\n", ret);
-+
-+ DSI_PORT_WRITE(TXPKT1C, DSI_PORT_READ(TXPKT1C) & ~DSI_TXPKT1C_CMD_EN);
-+ udelay(1);
-+ if (dsi->port == 0) {
-+ DSI_PORT_WRITE(CTRL,
-+ DSI_PORT_READ(CTRL) | DSI0_CTRL_RESET_FIFOS);
-+ } else {
-+ DSI_PORT_WRITE(CTRL,
-+ DSI_PORT_READ(CTRL) | DSI1_CTRL_RESET_FIFOS);
-+ }
-+
-+ DSI_PORT_WRITE(TXPKT1C, 0);
-+ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+
-+
-+ return ret;
-+}
-+
-+static int vc4_dsi_host_attach(struct mipi_dsi_host *host,
-+ struct mipi_dsi_device *device)
-+{
-+ struct vc4_dsi *dsi = host_to_dsi(host);
-+
-+ dsi->lanes = device->lanes;
-+ dsi->channel = device->channel;
-+ dsi->format = device->format;
-+ dsi->mode_flags = device->mode_flags;
-+
-+ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO)) {
-+ dev_err(&dsi->pdev->dev,
-+ "Only VIDEO mode panels supported currently.\n");
-+ return 0;
-+ }
-+
-+ dsi->panel = of_drm_find_panel(device->dev.of_node);
-+ if (dsi->panel)
-+ return drm_panel_attach(dsi->panel, dsi->connector);
-+
-+ drm_helper_hpd_irq_event(dsi->connector->dev);
-+
-+ return 0;
-+}
-+
-+static int vc4_dsi_host_detach(struct mipi_dsi_host *host,
-+ struct mipi_dsi_device *device)
-+{
-+ struct vc4_dsi *dsi = host_to_dsi(host);
-+
-+ if (dsi->panel) {
-+ int ret = drm_panel_detach(dsi->panel);
-+ if (ret)
-+ return ret;
-+
-+ dsi->panel = NULL;
-+ }
-+
-+ drm_helper_hpd_irq_event(dsi->connector->dev);
-+
-+ return 0;
-+}
-+
-+static const struct mipi_dsi_host_ops vc4_dsi_host_ops = {
-+ .attach = vc4_dsi_host_attach,
-+ .detach = vc4_dsi_host_detach,
-+ .transfer = vc4_dsi_host_transfer,
-+};
-+
-+static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = {
-+ .disable = vc4_dsi_encoder_disable,
-+ .enable = vc4_dsi_encoder_enable,
-+};
-+
-+static const struct of_device_id vc4_dsi_dt_match[] = {
-+ { .compatible = "brcm,bcm2835-dsi0", (void *)(uintptr_t)0 },
-+ { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 },
-+ {}
-+};
-+
-+static long vc4_dsi_byte_clock_round_rate(struct clk_hw *hw, unsigned long rate,
-+ unsigned long *parent_rate)
-+{
-+ return *parent_rate / 8;
-+}
-+
-+static unsigned long vc4_dsi_byte_clock_get_rate(struct clk_hw *hw,
-+ unsigned long parent_rate)
-+{
-+ return parent_rate / 8;
-+}
-+
-+static int vc4_dsi_byte_clock_set_rate(struct clk_hw *hw,
-+ unsigned long rate,
-+ unsigned long parent_rate)
-+{
-+ return 0;
-+}
-+
-+/* The byte clock has *no* ops filled. It's always running when the
-+ * PHY is.
-+ */
-+static const struct clk_ops vc4_dsi_byte_clock_ops = {
-+ .recalc_rate = vc4_dsi_byte_clock_get_rate,
-+ .set_rate = vc4_dsi_byte_clock_set_rate,
-+ .round_rate = vc4_dsi_byte_clock_round_rate,
-+};
-+
-+static void dsi_handle_error(struct vc4_dsi *dsi,
-+ irqreturn_t *ret, u32 stat, u32 bit,
-+ const char *type)
-+{
-+ if (!(stat & bit))
-+ return;
-+
-+ DRM_ERROR("DSI%d: %s error\n", dsi->port, type);
-+ *ret = IRQ_HANDLED;
-+}
-+
-+static irqreturn_t vc4_dsi_irq_handler(int irq, void *data)
-+{
-+ struct vc4_dsi *dsi = data;
-+ u32 stat = DSI_PORT_READ(INT_STAT);
-+ irqreturn_t ret = IRQ_NONE;
-+
-+ DSI_PORT_WRITE(INT_STAT, stat);
-+
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_ERR_SYNC_ESC, "LPDT sync");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_ERR_CONTROL, "data lane 0 sequence");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_ERR_CONT_LP0, "LP0 contention");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_ERR_CONT_LP1, "LP1 contention");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_HSTX_TO, "HSTX timeout");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_LPRX_TO, "LPRX timeout");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_TA_TO, "turnaround timeout");
-+ dsi_handle_error(dsi, &ret, stat,
-+ DSI1_INT_PR_TO, "peripheral reset timeout");
-+
-+ if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) {
-+ complete(&dsi->xfer_completion);
-+ ret = IRQ_HANDLED;
-+ } else if (stat & DSI1_INT_HSTX_TO) {
-+ complete(&dsi->xfer_completion);
-+ dsi->xfer_result = -ETIMEDOUT;
-+ ret = IRQ_HANDLED;
-+ }
-+
-+ return ret;
-+}
-+
-+static int
-+vc4_dsi_init_phy_byte_clock(struct vc4_dsi *dsi)
-+{
-+ struct device *dev = &dsi->pdev->dev;
-+ const char *parent_name = __clk_get_name(dsi->pll_phy_clock);
-+ struct clk_init_data init;
-+ struct clk *clk;
-+
-+ memset(&init, 0, sizeof(init));
-+ init.parent_names = &parent_name;
-+ init.num_parents = 1;
-+ if (dsi->port == 1)
-+ init.name = "dsi1_byte";
-+ else
-+ init.name = "dsi0_byte";
-+ init.ops = &vc4_dsi_byte_clock_ops;
-+ init.flags = 0;
-+
-+ dsi->phy_byte_clock.init = &init;
-+ clk = devm_clk_register(dev, &dsi->phy_byte_clock);
-+ if (IS_ERR(clk))
-+ return PTR_ERR(clk);
-+
-+ /* Use the onecell provider because we may need to expose the
-+ * DDR and DDR2 clocks at some point, which we'd want to put
-+ * in slots 1 and 2.
-+ */
-+ dsi->clk_onecell.clk_num = 1;
-+ dsi->clk_onecell.clks = devm_kcalloc(dev,
-+ dsi->clk_onecell.clk_num,
-+ sizeof(*dsi->clk_onecell.clks),
-+ GFP_KERNEL);
-+ if (!dsi->clk_onecell.clks)
-+ return -ENOMEM;
-+
-+ dsi->clk_onecell.clks[0] = clk;
-+
-+ return of_clk_add_provider(dev->of_node,
-+ of_clk_src_onecell_get,
-+ &dsi->clk_onecell);
-+}
-+
-+static int vc4_dsi_bind(struct device *dev, struct device *master, void *data)
-+{
-+ struct platform_device *pdev = to_platform_device(dev);
-+ struct drm_device *drm = dev_get_drvdata(master);
-+ struct vc4_dev *vc4 = to_vc4_dev(drm);
-+ struct vc4_dsi *dsi;
-+ struct vc4_dsi_encoder *vc4_dsi_encoder;
-+ const struct of_device_id *match;
-+ dma_cap_mask_t dma_mask;
-+ int ret;
-+
-+ dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL);
-+ if (!dsi)
-+ return -ENOMEM;
-+
-+ match = of_match_device(vc4_dsi_dt_match, dev);
-+ if (!match)
-+ return -ENODEV;
-+
-+ dsi->port = (uintptr_t)match->data;
-+
-+ vc4_dsi_encoder = devm_kzalloc(dev, sizeof(*vc4_dsi_encoder),
-+ GFP_KERNEL);
-+ if (!vc4_dsi_encoder)
-+ return -ENOMEM;
-+ vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1;
-+ vc4_dsi_encoder->dsi = dsi;
-+ dsi->encoder = &vc4_dsi_encoder->base.base;
-+
-+ dsi->pdev = pdev;
-+ dsi->regs = vc4_ioremap_regs(pdev, 0);
-+ if (IS_ERR(dsi->regs))
-+ return PTR_ERR(dsi->regs);
-+
-+ if (DSI_PORT_READ(ID) != DSI_ID_VALUE) {
-+ dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
-+ DSI_PORT_READ(ID), DSI_ID_VALUE);
-+ return -ENODEV;
-+ }
-+
-+ if (DSI_PORT_READ(CTRL) == 0) {
-+ dev_info(dev, "DSI not set up by firmware.\n");
-+ return 0;
-+ }
-+
-+ /* Set this flag to indicate that we're relying on boot-time
-+ * DSI state and can't successfully reconfigure DSI yet.
-+ */
-+ dsi->use_firmware_setup = VC4_DSI_USE_FIRMWARE_SETUP;
-+
-+ if (dsi->use_firmware_setup) {
-+ /* Increment references to the various clocks so that
-+ * they stay always enabled and the clock framework
-+ * doesn't disable their parents.
-+ */
-+ ret = clk_prepare_enable(dsi->escape_clock);
-+ if (ret) {
-+ DRM_ERROR("Failed to refcount DSI escape clock: %d\n", ret);
-+ return ret;
-+ }
-+
-+ ret = clk_prepare_enable(dsi->pll_phy_clock);
-+ if (ret) {
-+ DRM_ERROR("Failed to refcount DSI PLL: %d\n", ret);
-+ return ret;
-+ }
-+
-+ ret = clk_prepare_enable(dsi->pixel_clock);
-+ if (ret) {
-+ DRM_ERROR("Failed to refcount pixel clock: %d\n", ret);
-+ return ret;
-+ }
-+ }
-+
-+ /* DSI1 has a broken AXI slave that doesn't respond to writes
-+ * from the ARM. It does handle writes from the DMA engine,
-+ * so set up a channel for talking to it.
-+ */
-+ if (dsi->port == 1) {
-+ dsi->reg_dma_mem = dma_alloc_coherent(dev, 4,
-+ &dsi->reg_dma_paddr,
-+ GFP_KERNEL);
-+ if (!dsi->reg_dma_mem) {
-+ DRM_ERROR("Failed to get DMA memory\n");
-+ return -ENOMEM;
-+ }
-+
-+ dma_cap_zero(dma_mask);
-+ dma_cap_set(DMA_MEMCPY, dma_mask);
-+ dsi->reg_dma_chan = dma_request_channel(dma_mask, NULL, NULL);
-+ if (IS_ERR(dsi->reg_dma_chan)) {
-+ ret = PTR_ERR(dsi->reg_dma_chan);
-+ if (ret != -EPROBE_DEFER)
-+ DRM_ERROR("Failed to get DMA channel: %d\n",
-+ ret);
-+ return ret;
-+ }
-+
-+ /* Get the physical address of the device's registers. The
-+ * struct resource for the regs gives us the bus address
-+ * instead.
-+ */
-+ dsi->reg_paddr = be32_to_cpup(of_get_address(dev->of_node,
-+ 0, NULL, NULL));
-+ }
-+
-+ init_completion(&dsi->xfer_completion);
-+ /* At startup enable error-reporting interrupts and nothing else. */
-+ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED);
-+ /* Clear any existing interrupt state. */
-+ DSI_PORT_WRITE(INT_STAT, DSI_PORT_READ(INT_STAT));
-+
-+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
-+ vc4_dsi_irq_handler, 0, "vc4 dsi", dsi);
-+ if (ret) {
-+ if (ret != -EPROBE_DEFER)
-+ dev_err(dev, "Failed to get interrupt: %d\n", ret);
-+ return ret;
-+ }
-+
-+ dsi->escape_clock = devm_clk_get(dev, "escape");
-+ if (IS_ERR(dsi->escape_clock)) {
-+ ret = PTR_ERR(dsi->escape_clock);
-+ if (ret != -EPROBE_DEFER)
-+ dev_err(dev, "Failed to get escape clock: %d\n", ret);
-+ return ret;
-+ }
-+
-+ dsi->pll_phy_clock = devm_clk_get(dev, "phy");
-+ if (IS_ERR(dsi->pll_phy_clock)) {
-+ ret = PTR_ERR(dsi->pll_phy_clock);
-+ if (ret != -EPROBE_DEFER)
-+ dev_err(dev, "Failed to get phy clock: %d\n", ret);
-+ return ret;
-+ }
-+
-+ dsi->pixel_clock = devm_clk_get(dev, "pixel");
-+ if (IS_ERR(dsi->pixel_clock)) {
-+ ret = PTR_ERR(dsi->pixel_clock);
-+ if (ret != -EPROBE_DEFER)
-+ dev_err(dev, "Failed to get pixel clock: %d\n", ret);
-+ return ret;
-+ }
-+
-+ /* The esc clock rate is supposed to always be 100Mhz. */
-+ ret = clk_set_rate(dsi->escape_clock, 100 * 1000000);
-+ if (ret) {
-+ dev_err(dev, "Failed to set esc clock: %d\n", ret);
-+ return ret;
-+ }
-+
-+ ret = vc4_dsi_init_phy_byte_clock(dsi);
-+ if (ret)
-+ return ret;
-+
-+ if (dsi->port == 1)
-+ vc4->dsi1 = dsi;
-+
-+ drm_encoder_init(drm, dsi->encoder, &vc4_dsi_encoder_funcs,
-+ DRM_MODE_ENCODER_DSI);
-+ drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs);
-+
-+ dsi->connector = vc4_dsi_connector_init(drm, dsi);
-+ if (IS_ERR(dsi->connector)) {
-+ ret = PTR_ERR(dsi->connector);
-+ goto err_destroy_encoder;
-+ }
-+
-+ dsi->dsi_host.ops = &vc4_dsi_host_ops;
-+ dsi->dsi_host.dev = dev;
-+
-+ mipi_dsi_host_register(&dsi->dsi_host);
-+
-+ dev_set_drvdata(dev, dsi);
-+
-+ return 0;
-+
-+err_destroy_encoder:
-+ vc4_dsi_encoder_destroy(dsi->encoder);
-+
-+ return ret;
-+}
-+
-+static void vc4_dsi_unbind(struct device *dev, struct device *master,
-+ void *data)
-+{
-+ struct drm_device *drm = dev_get_drvdata(master);
-+ struct vc4_dev *vc4 = to_vc4_dev(drm);
-+ struct vc4_dsi *dsi = dev_get_drvdata(dev);
-+
-+ vc4_dsi_connector_destroy(dsi->connector);
-+ vc4_dsi_encoder_destroy(dsi->encoder);
-+
-+ mipi_dsi_host_unregister(&dsi->dsi_host);
-+
-+ if (!dsi->use_firmware_setup) {
-+ clk_disable_unprepare(dsi->pll_phy_clock);
-+ clk_disable_unprepare(dsi->escape_clock);
-+ clk_disable_unprepare(dsi->pixel_clock);
-+ }
-+
-+ if (dsi->port == 1)
-+ vc4->dsi1 = NULL;
-+}
-+
-+static const struct component_ops vc4_dsi_ops = {
-+ .bind = vc4_dsi_bind,
-+ .unbind = vc4_dsi_unbind,
-+};
-+
-+static int vc4_dsi_dev_probe(struct platform_device *pdev)
-+{
-+ return component_add(&pdev->dev, &vc4_dsi_ops);
-+}
-+
-+static int vc4_dsi_dev_remove(struct platform_device *pdev)
-+{
-+ component_del(&pdev->dev, &vc4_dsi_ops);
-+ return 0;
-+}
-+
-+struct platform_driver vc4_dsi_driver = {
-+ .probe = vc4_dsi_dev_probe,
-+ .remove = vc4_dsi_dev_remove,
-+ .driver = {
-+ .name = "vc4_dsi",
-+ .of_match_table = vc4_dsi_dt_match,
-+ },
-+};
--- /dev/null
+From fa1bc6f79bf98e9a3342c783412c40284b2ee01a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 2 Jun 2016 12:29:45 -0700
+Subject: [PATCH] BCM270X: Add the DSI panel to the defconfig.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -822,6 +822,7 @@ CONFIG_DRM=m
+ CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_PANEL_SIMPLE=m
++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+ CONFIG_FB_BCM2708=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -814,6 +814,7 @@ CONFIG_DRM=m
+ CONFIG_DRM_LOAD_EDID_FIRMWARE=y
+ CONFIG_DRM_UDL=m
+ CONFIG_DRM_PANEL_SIMPLE=m
++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
+ CONFIG_DRM_VC4=m
+ CONFIG_FB=y
+ CONFIG_FB_BCM2708=y
+++ /dev/null
-From 4557de6d23737cf44fa5ddf1379be59d4bca2df7 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 26 Apr 2016 13:46:13 -0700
-Subject: [PATCH] drm/panel: Add support for the Raspberry Pi 7" Touchscreen.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/panel/Kconfig | 9 +
- drivers/gpu/drm/panel/Makefile | 1 +
- .../gpu/drm/panel/panel-raspberrypi-touchscreen.c | 347 +++++++++++++++++++++
- 3 files changed, 357 insertions(+)
- create mode 100644 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
-
---- a/drivers/gpu/drm/panel/Kconfig
-+++ b/drivers/gpu/drm/panel/Kconfig
-@@ -31,6 +31,15 @@ config DRM_PANEL_LG_LG4573
- Say Y here if you want to enable support for LG4573 RGB panel.
- To compile this driver as a module, choose M here.
-
-+config DRM_PANEL_RASPBERRYPI_TOUCHSCREEN
-+ tristate "Raspberry Pi 7-inch touchscreen panel"
-+ depends on DRM_MIPI_DSI
-+ depends on BACKLIGHT_CLASS_DEVICE
-+ help
-+ Say Y here if you want to enable support for the Raspberry
-+ Pi 7" Touchscreen. To compile this driver as a module,
-+ choose M here.
-+
- config DRM_PANEL_SAMSUNG_S6E8AA0
- tristate "Samsung S6E8AA0 DSI video mode panel"
- depends on OF
---- a/drivers/gpu/drm/panel/Makefile
-+++ b/drivers/gpu/drm/panel/Makefile
-@@ -1,5 +1,6 @@
- obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
- obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o
-+obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) += panel-raspberrypi-touchscreen.o
- obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o
- obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o
- obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o
---- /dev/null
-+++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
-@@ -0,0 +1,347 @@
-+/*
-+ * Copyright © 2016 Broadcom Limited
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ * Portions of this file (derived from panel-simple.c) are:
-+ *
-+ * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the
-+ * next paragraph) shall be included in all copies or substantial portions
-+ * of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/**
-+ * DOC: Raspberry Pi 7" touchscreen panel driver.
-+ *
-+ * The 7" touchscreen consists of a DPI LCD panel, a Toshiba
-+ * TC358762XBG DSI-DPI bridge, and an I2C-connected Atmel ATTINY88-MUR
-+ * controlling power management, the LCD PWM, and the touchscreen.
-+ *
-+ * This driver presents this device as a MIPI DSI panel to the DRM
-+ * driver, and should expose the touchscreen as a HID device.
-+ */
-+
-+#include <linux/backlight.h>
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/fb.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/consumer.h>
-+#include <linux/i2c.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
-+#include <linux/of_graph.h>
-+#include <linux/pm.h>
-+
-+#include <drm/drm_panel.h>
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_mipi_dsi.h>
-+#include <drm/drm_panel.h>
-+
-+struct rpi_touchscreen {
-+ struct drm_panel base;
-+ struct mipi_dsi_device *dsi;
-+ struct i2c_client *bridge_i2c;
-+ struct backlight_device *backlight;
-+
-+ bool prepared;
-+ bool enabled;
-+
-+ /* Version of the firmware on the bridge chip */
-+ int atmel_ver;
-+};
-+
-+static const struct drm_display_mode rpi_touchscreen_modes[] = {
-+ {
-+ /* This is assuming that we'll be running the DSI PLL
-+ * at 2Ghz / 3 (since we only get integer dividers),
-+ * so a pixel clock of 2Ghz / 3 / 8.
-+ */
-+ .clock = 83333,
-+ .hdisplay = 800,
-+ .hsync_start = 800 + 61,
-+ .hsync_end = 800 + 61 + 2,
-+ .htotal = 800 + 61 + 2 + 44,
-+ .vdisplay = 480,
-+ .vsync_start = 480 + 7,
-+ .vsync_end = 480 + 7 + 2,
-+ .vtotal = 480 + 7 + 2 + 21,
-+ .vrefresh = 60,
-+ },
-+};
-+
-+static struct rpi_touchscreen *panel_to_ts(struct drm_panel *panel)
-+{
-+ return container_of(panel, struct rpi_touchscreen, base);
-+}
-+
-+struct regdump {
-+ const char *reg;
-+ u32 offset;
-+};
-+
-+#define REGDUMP(reg) { #reg, reg }
-+
-+static int rpi_touchscreen_disable(struct drm_panel *panel)
-+{
-+ struct rpi_touchscreen *ts = panel_to_ts(panel);
-+ pr_err("disable\n");
-+
-+ if (!ts->enabled)
-+ return 0;
-+
-+ if (ts->backlight) {
-+ ts->backlight->props.power = FB_BLANK_POWERDOWN;
-+ backlight_update_status(ts->backlight);
-+ }
-+
-+ ts->enabled = false;
-+
-+ return 0;
-+}
-+
-+static int rpi_touchscreen_unprepare(struct drm_panel *panel)
-+{
-+ struct rpi_touchscreen *ts = panel_to_ts(panel);
-+
-+ if (!ts->prepared)
-+ return 0;
-+
-+ ts->prepared = false;
-+
-+ return 0;
-+}
-+
-+static int rpi_touchscreen_prepare(struct drm_panel *panel)
-+{
-+ struct rpi_touchscreen *ts = panel_to_ts(panel);
-+
-+ if (ts->prepared)
-+ return 0;
-+
-+ ts->prepared = true;
-+
-+ return 0;
-+}
-+
-+/*
-+ * Powers on the panel once the DSI link is up.
-+ *
-+ * The TC358762 is run in PLLOFF mode, where it usees the MIPI DSI
-+ * byte clock instead of an external reference clock. This means that
-+ * we need the DSI host to be on and transmitting before we start
-+ * talking to it.
-+ */
-+static int rpi_touchscreen_enable(struct drm_panel *panel)
-+{
-+ struct rpi_touchscreen *ts = panel_to_ts(panel);
-+
-+ if (ts->enabled)
-+ return 0;
-+
-+ if (ts->backlight) {
-+ ts->backlight->props.power = FB_BLANK_UNBLANK;
-+ backlight_update_status(ts->backlight);
-+ }
-+
-+ ts->enabled = true;
-+
-+ return 0;
-+}
-+
-+static int rpi_touchscreen_get_modes(struct drm_panel *panel)
-+{
-+ struct drm_connector *connector = panel->connector;
-+ struct drm_device *drm = panel->drm;
-+ unsigned int i, num = 0;
-+
-+ for (i = 0; i < ARRAY_SIZE(rpi_touchscreen_modes); i++) {
-+ const struct drm_display_mode *m = &rpi_touchscreen_modes[i];
-+ struct drm_display_mode *mode;
-+
-+ mode = drm_mode_duplicate(drm, m);
-+ if (!mode) {
-+ dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
-+ m->hdisplay, m->vdisplay, m->vrefresh);
-+ continue;
-+ }
-+
-+ mode->type |= DRM_MODE_TYPE_DRIVER;
-+
-+ if (i == 0)
-+ mode->type |= DRM_MODE_TYPE_PREFERRED;
-+
-+ drm_mode_set_name(mode);
-+
-+ drm_mode_probed_add(connector, mode);
-+ num++;
-+ }
-+
-+ connector->display_info.bpc = 8;
-+ connector->display_info.width_mm = 217; /* XXX */
-+ connector->display_info.height_mm = 136; /* XXX */
-+
-+ return num;
-+}
-+
-+static int rpi_touchscreen_backlight_update(struct backlight_device *bl)
-+{
-+ int brightness = bl->props.brightness;
-+
-+ if (bl->props.power != FB_BLANK_UNBLANK ||
-+ bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
-+ brightness = 0;
-+
-+ return 0;
-+}
-+
-+static const struct backlight_ops rpi_touchscreen_backlight_ops = {
-+ .update_status = rpi_touchscreen_backlight_update,
-+};
-+
-+static const struct drm_panel_funcs rpi_touchscreen_funcs = {
-+ .disable = rpi_touchscreen_disable,
-+ .unprepare = rpi_touchscreen_unprepare,
-+ .prepare = rpi_touchscreen_prepare,
-+ .enable = rpi_touchscreen_enable,
-+ .get_modes = rpi_touchscreen_get_modes,
-+};
-+
-+static struct i2c_client *rpi_touchscreen_get_i2c(struct device *dev,
-+ const char *name)
-+{
-+ struct device_node *node;
-+ struct i2c_client *client;
-+
-+ node = of_parse_phandle(dev->of_node, name, 0);
-+ if (!node)
-+ return ERR_PTR(-ENODEV);
-+
-+ client = of_find_i2c_device_by_node(node);
-+
-+ of_node_put(node);
-+
-+ return client;
-+}
-+
-+static int rpi_touchscreen_dsi_probe(struct mipi_dsi_device *dsi)
-+{
-+ struct device *dev = &dsi->dev;
-+ struct rpi_touchscreen *ts;
-+ int ret;
-+
-+ ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);
-+ if (!ts)
-+ return -ENOMEM;
-+
-+ dev_set_drvdata(dev, ts);
-+
-+ ts->dsi = dsi;
-+ dsi->mode_flags = (MIPI_DSI_MODE_VIDEO |
-+ MIPI_DSI_MODE_VIDEO_SYNC_PULSE);
-+ dsi->format = MIPI_DSI_FMT_RGB888;
-+ dsi->lanes = 1;
-+
-+ ts->bridge_i2c =
-+ rpi_touchscreen_get_i2c(dev, "raspberrypi,touchscreen-bridge");
-+ if (!ts->bridge_i2c) {
-+ ret = -EPROBE_DEFER;
-+ return ret;
-+ }
-+
-+#if 0
-+ ts->backlight =
-+ devm_backlight_device_register(dev,
-+ "raspberrypi-touchscreen-backlight",
-+ dev, ts,
-+ &rpi_touchscreen_backlight_ops,
-+ NULL);
-+ if (IS_ERR(ts->backlight)) {
-+ DRM_ERROR("failed to register backlight\n");
-+ return PTR_ERR(ts->backlight);
-+ }
-+ ts->backlight->props.max_brightness = RPI_TOUCHSCREEN_MAX_BRIGHTNESS;
-+ ts->backlight->props.brightness = RPI_TOUCHSCREEN_MAX_BRIGHTNESS;
-+#endif
-+
-+ drm_panel_init(&ts->base);
-+ ts->base.dev = dev;
-+ ts->base.funcs = &rpi_touchscreen_funcs;
-+
-+ ret = drm_panel_add(&ts->base);
-+ if (ret < 0)
-+ goto err_release_bridge;
-+
-+ return mipi_dsi_attach(dsi);
-+
-+err_release_bridge:
-+ put_device(&ts->bridge_i2c->dev);
-+ return ret;
-+}
-+
-+static int rpi_touchscreen_dsi_remove(struct mipi_dsi_device *dsi)
-+{
-+ struct device *dev = &dsi->dev;
-+ struct rpi_touchscreen *ts = dev_get_drvdata(dev);
-+ int ret;
-+
-+ ret = mipi_dsi_detach(dsi);
-+ if (ret < 0) {
-+ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
-+ return ret;
-+ }
-+
-+ drm_panel_detach(&ts->base);
-+ drm_panel_remove(&ts->base);
-+
-+ put_device(&ts->bridge_i2c->dev);
-+
-+ return 0;
-+}
-+
-+static void rpi_touchscreen_dsi_shutdown(struct mipi_dsi_device *dsi)
-+{
-+ /* XXX: poweroff */
-+}
-+
-+static const struct of_device_id rpi_touchscreen_of_match[] = {
-+ { .compatible = "raspberrypi,touchscreen" },
-+ { } /* sentinel */
-+};
-+MODULE_DEVICE_TABLE(of, rpi_touchscreen_of_match);
-+
-+static struct mipi_dsi_driver rpi_touchscreen_driver = {
-+ .driver = {
-+ .name = "raspberrypi-touchscreen",
-+ .of_match_table = rpi_touchscreen_of_match,
-+ },
-+ .probe = rpi_touchscreen_dsi_probe,
-+ .remove = rpi_touchscreen_dsi_remove,
-+ .shutdown = rpi_touchscreen_dsi_shutdown,
-+};
-+module_mipi_dsi_driver(rpi_touchscreen_driver);
-+
-+MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
-+MODULE_DESCRIPTION("Raspberry Pi 7-inch touchscreen driver");
-+MODULE_LICENSE("GPL v2");
--- /dev/null
+From a5957ee5e1e3605c97c1282c21a0e799f81b49a1 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 2 Jun 2016 15:09:35 -0700
+Subject: [PATCH] BCM270X: Add the DSI and DSI panel nodes to the VC4 overlay.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 24 ++++++++++++++++++++--
+ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 16 +++++++++++++++
+ 2 files changed, 38 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -2,6 +2,7 @@
+ #include <dt-bindings/clock/bcm2835-aux.h>
+ #include "dt-bindings/power/raspberrypi-power.h"
+ #include "dt-bindings/gpio/gpio.h"
++#include "dt-bindings/pinctrl/bcm2835.h"
+ #include "skeleton.dtsi"
+
+ / {
+@@ -110,9 +111,10 @@
+ reg = <0x7e101000 0x2000>;
+
+ /* CPRMAN derives everything from the platform's
+- * oscillator.
++ * oscillator except for a few clocks that may
++ * derive from something else derived from CPRMAN..
+ */
+- clocks = <&clk_osc>;
++ clocks = <&clk_osc>, <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
+ status = "disabled";
+ };
+
+@@ -282,6 +284,24 @@
+ status = "disabled";
+ };
+
++ dsi1: dsi@7e700000 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ #clock-cells = <1>;
++
++ compatible = "brcm,bcm2835-dsi1";
++ reg = <0x7e700000 0x8c>;
++ interrupts = <2 12>;
++
++ clocks = <&cprman BCM2835_PLLD_DSI1>,
++ <&cprman BCM2835_CLOCK_DSI1E>,
++ <&cprman BCM2835_CLOCK_DSI1P>;
++ clock-names = "phy", "escape", "pixel";
++ clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";
++ status = "disabled";
++ power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
++ };
++
+ i2c1: i2c@7e804000 {
+ compatible = "brcm,bcm2708-i2c";
+ reg = <0x7e804000 0x1000>;
+--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
+@@ -126,6 +126,22 @@
+ };
+ };
+
++ fragment@16 {
++ target = <&dsi1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ brcm,panel = <&pitouchscreen>;
++
++ pitouchscreen: panel {
++ compatible = "raspberrypi,touchscreen";
++ reg = <0>;
++ };
++ };
++ };
++
+ __overrides__ {
+ cma-256 = <0>,"+0-1-2-3-4";
+ cma-192 = <0>,"-0+1-2-3-4";
+++ /dev/null
-From 42c5b9d02e0076ce2b198a6364215ca46bec6e29 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 2 Jun 2016 12:29:45 -0700
-Subject: [PATCH] BCM270X: Add the DSI panel to the defconfig.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -822,6 +822,7 @@ CONFIG_DRM=m
- CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_PANEL_SIMPLE=m
-+CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
- CONFIG_FB_BCM2708=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -814,6 +814,7 @@ CONFIG_DRM=m
- CONFIG_DRM_LOAD_EDID_FIRMWARE=y
- CONFIG_DRM_UDL=m
- CONFIG_DRM_PANEL_SIMPLE=m
-+CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m
- CONFIG_DRM_VC4=m
- CONFIG_FB=y
- CONFIG_FB_BCM2708=y
+++ /dev/null
-From 64871d96e1d387437fa52d8398f2212722890bcd Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 2 Jun 2016 15:09:35 -0700
-Subject: [PATCH] BCM270X: Add the DSI and DSI panel nodes to the VC4 overlay.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 24 ++++++++++++++++++++--
- arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 16 +++++++++++++++
- 2 files changed, 38 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -2,6 +2,7 @@
- #include <dt-bindings/clock/bcm2835-aux.h>
- #include "dt-bindings/power/raspberrypi-power.h"
- #include "dt-bindings/gpio/gpio.h"
-+#include "dt-bindings/pinctrl/bcm2835.h"
- #include "skeleton.dtsi"
-
- / {
-@@ -110,9 +111,10 @@
- reg = <0x7e101000 0x2000>;
-
- /* CPRMAN derives everything from the platform's
-- * oscillator.
-+ * oscillator except for a few clocks that may
-+ * derive from something else derived from CPRMAN..
- */
-- clocks = <&clk_osc>;
-+ clocks = <&clk_osc>, <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
- status = "disabled";
- };
-
-@@ -282,6 +284,24 @@
- status = "disabled";
- };
-
-+ dsi1: dsi@7e700000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ #clock-cells = <1>;
-+
-+ compatible = "brcm,bcm2835-dsi1";
-+ reg = <0x7e700000 0x8c>;
-+ interrupts = <2 12>;
-+
-+ clocks = <&cprman BCM2835_PLLD_DSI1>,
-+ <&cprman BCM2835_CLOCK_DSI1E>,
-+ <&cprman BCM2835_CLOCK_DSI1P>;
-+ clock-names = "phy", "escape", "pixel";
-+ clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";
-+ status = "disabled";
-+ power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
-+ };
-+
- i2c1: i2c@7e804000 {
- compatible = "brcm,bcm2708-i2c";
- reg = <0x7e804000 0x1000>;
---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
-@@ -126,6 +126,22 @@
- };
- };
-
-+ fragment@16 {
-+ target = <&dsi1>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ brcm,panel = <&pitouchscreen>;
-+
-+ pitouchscreen: panel {
-+ compatible = "raspberrypi,touchscreen";
-+ reg = <0>;
-+ };
-+ };
-+ };
-+
- __overrides__ {
- cma-256 = <0>,"+0-1-2-3-4";
- cma-192 = <0>,"-0+1-2-3-4";
--- /dev/null
+From 6245131c0c328d2ed876d87cc20b176e2f24a769 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 9 Aug 2016 15:12:06 -0700
+Subject: [PATCH] of: Export of_device_uevent_modalias for DRM_MIPI_DSI.
+
+In order to make DSI panel modules able to load automatically, we need
+to emit the OF modalias uevent so that their MODULE_DEVICE_TABLE(of,
+...) can match against it.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/of/device.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/of/device.c
++++ b/drivers/of/device.c
+@@ -287,3 +287,4 @@ int of_device_uevent_modalias(struct dev
+
+ return 0;
+ }
++EXPORT_SYMBOL(of_device_uevent_modalias);
--- /dev/null
+From b948504b2bfdcb24e774c8801ee6d118e5e3ca90 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 9 Aug 2016 15:13:33 -0700
+Subject: [PATCH] drm: Emit modalias uevents for the DSI devices we create.
+
+This gets the Raspberry Pi panel module to automatically load at boot
+time.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/drm_mipi_dsi.c | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/drivers/gpu/drm/drm_mipi_dsi.c
++++ b/drivers/gpu/drm/drm_mipi_dsi.c
+@@ -50,6 +50,24 @@ static int mipi_dsi_device_match(struct
+ return of_driver_match_device(dev, drv);
+ }
+
++/**
++ * Send modalias events when devices are created on the bus, so that
++ * modules can load automatically.
++ */
++static int mipi_dsi_uevent(struct device *dev, struct kobj_uevent_env *env)
++{
++ int rc;
++
++ /* Just do the OF uevent, which emits the compatible string so
++ * that a MODULE_DEVICE_TABLE(of, ...) works.
++ */
++ rc = of_device_uevent_modalias(dev, env);
++ if (rc != -ENODEV)
++ return rc;
++
++ return 0;
++}
++
+ static const struct dev_pm_ops mipi_dsi_device_pm_ops = {
+ .runtime_suspend = pm_generic_runtime_suspend,
+ .runtime_resume = pm_generic_runtime_resume,
+@@ -65,6 +83,7 @@ static struct bus_type mipi_dsi_bus_type
+ .name = "mipi-dsi",
+ .match = mipi_dsi_device_match,
+ .pm = &mipi_dsi_device_pm_ops,
++ .uevent = mipi_dsi_uevent,
+ };
+
+ static int of_device_match(struct device *dev, void *data)
+++ /dev/null
-From e294a4775d033ed4d0850f841786ec9358facf69 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 9 Aug 2016 15:12:06 -0700
-Subject: [PATCH] of: Export of_device_uevent_modalias for DRM_MIPI_DSI.
-
-In order to make DSI panel modules able to load automatically, we need
-to emit the OF modalias uevent so that their MODULE_DEVICE_TABLE(of,
-...) can match against it.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/of/device.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/of/device.c
-+++ b/drivers/of/device.c
-@@ -287,3 +287,4 @@ int of_device_uevent_modalias(struct dev
-
- return 0;
- }
-+EXPORT_SYMBOL(of_device_uevent_modalias);
+++ /dev/null
-From e46450e232a96665344b825557bacf1d37842174 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 9 Aug 2016 15:13:33 -0700
-Subject: [PATCH] drm: Emit modalias uevents for the DSI devices we create.
-
-This gets the Raspberry Pi panel module to automatically load at boot
-time.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/drm_mipi_dsi.c | 19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
-
---- a/drivers/gpu/drm/drm_mipi_dsi.c
-+++ b/drivers/gpu/drm/drm_mipi_dsi.c
-@@ -50,6 +50,24 @@ static int mipi_dsi_device_match(struct
- return of_driver_match_device(dev, drv);
- }
-
-+/**
-+ * Send modalias events when devices are created on the bus, so that
-+ * modules can load automatically.
-+ */
-+static int mipi_dsi_uevent(struct device *dev, struct kobj_uevent_env *env)
-+{
-+ int rc;
-+
-+ /* Just do the OF uevent, which emits the compatible string so
-+ * that a MODULE_DEVICE_TABLE(of, ...) works.
-+ */
-+ rc = of_device_uevent_modalias(dev, env);
-+ if (rc != -ENODEV)
-+ return rc;
-+
-+ return 0;
-+}
-+
- static const struct dev_pm_ops mipi_dsi_device_pm_ops = {
- .runtime_suspend = pm_generic_runtime_suspend,
- .runtime_resume = pm_generic_runtime_resume,
-@@ -65,6 +83,7 @@ static struct bus_type mipi_dsi_bus_type
- .name = "mipi-dsi",
- .match = mipi_dsi_device_match,
- .pm = &mipi_dsi_device_pm_ops,
-+ .uevent = mipi_dsi_uevent,
- };
-
- static int of_device_match(struct device *dev, void *data)
--- /dev/null
+From 46c6aaecefb953f629a7dddd2cb1eb70d3d6c954 Mon Sep 17 00:00:00 2001
+From: Peter Chen <peter.chen@nxp.com>
+Date: Tue, 5 Jul 2016 10:04:54 +0800
+Subject: [PATCH] gpu: drm: vc4_hdmi: add missing of_node_put after calling
+ of_parse_phandle
+
+of_node_put needs to be called when the device node which is got
+from of_parse_phandle has finished using.
+
+Signed-off-by: Peter Chen <peter.chen@nxp.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 027a697677b0d5ff211773596d96f84078ceda80)
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 13 +++++++------
+ 1 file changed, 7 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -467,12 +467,6 @@ static int vc4_hdmi_bind(struct device *
+ if (IS_ERR(hdmi->hd_regs))
+ return PTR_ERR(hdmi->hd_regs);
+
+- ddc_node = of_parse_phandle(dev->of_node, "ddc", 0);
+- if (!ddc_node) {
+- DRM_ERROR("Failed to find ddc node in device tree\n");
+- return -ENODEV;
+- }
+-
+ hdmi->pixel_clock = devm_clk_get(dev, "pixel");
+ if (IS_ERR(hdmi->pixel_clock)) {
+ DRM_ERROR("Failed to get pixel clock\n");
+@@ -484,7 +478,14 @@ static int vc4_hdmi_bind(struct device *
+ return PTR_ERR(hdmi->hsm_clock);
+ }
+
++ ddc_node = of_parse_phandle(dev->of_node, "ddc", 0);
++ if (!ddc_node) {
++ DRM_ERROR("Failed to find ddc node in device tree\n");
++ return -ENODEV;
++ }
++
+ hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node);
++ of_node_put(ddc_node);
+ if (!hdmi->ddc) {
+ DRM_DEBUG("Failed to get ddc i2c adapter by node\n");
+ return -EPROBE_DEFER;
--- /dev/null
+From 99f969c1fb2f9986973fe485528ca16556d0b1a1 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Thu, 2 Jun 2016 00:06:28 +0200
+Subject: [PATCH] drm/vc4: Use for_each_plane_in_state
+
+We want to hide drm_atomic_stat internals a bit better.
+
+Cc: Eric Anholt <eric@anholt.net>
+Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1464818821-5736-6-git-send-email-daniel.vetter@ffwll.ch
+(cherry picked from commit 833cd78adbc236db684f19e93121d4bf6659a8af)
+---
+ drivers/gpu/drm/vc4/vc4_kms.c | 10 +++-------
+ 1 file changed, 3 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -111,6 +111,8 @@ static int vc4_atomic_commit(struct drm_
+ int i;
+ uint64_t wait_seqno = 0;
+ struct vc4_commit *c;
++ struct drm_plane *plane;
++ struct drm_plane_state *new_state;
+
+ c = commit_init(state);
+ if (!c)
+@@ -130,13 +132,7 @@ static int vc4_atomic_commit(struct drm_
+ return ret;
+ }
+
+- for (i = 0; i < dev->mode_config.num_total_plane; i++) {
+- struct drm_plane *plane = state->planes[i];
+- struct drm_plane_state *new_state = state->plane_states[i];
+-
+- if (!plane)
+- continue;
+-
++ for_each_plane_in_state(state, plane, new_state, i) {
+ if ((plane->state->fb != new_state->fb) && new_state->fb) {
+ struct drm_gem_cma_object *cma_bo =
+ drm_fb_cma_get_gem_obj(new_state->fb, 0);
+++ /dev/null
-From cededb2870ab15fcf79f063a83f5f37421e5bdfc Mon Sep 17 00:00:00 2001
-From: Peter Chen <peter.chen@nxp.com>
-Date: Tue, 5 Jul 2016 10:04:54 +0800
-Subject: [PATCH] gpu: drm: vc4_hdmi: add missing of_node_put after calling
- of_parse_phandle
-
-of_node_put needs to be called when the device node which is got
-from of_parse_phandle has finished using.
-
-Signed-off-by: Peter Chen <peter.chen@nxp.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 027a697677b0d5ff211773596d96f84078ceda80)
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 13 +++++++------
- 1 file changed, 7 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -467,12 +467,6 @@ static int vc4_hdmi_bind(struct device *
- if (IS_ERR(hdmi->hd_regs))
- return PTR_ERR(hdmi->hd_regs);
-
-- ddc_node = of_parse_phandle(dev->of_node, "ddc", 0);
-- if (!ddc_node) {
-- DRM_ERROR("Failed to find ddc node in device tree\n");
-- return -ENODEV;
-- }
--
- hdmi->pixel_clock = devm_clk_get(dev, "pixel");
- if (IS_ERR(hdmi->pixel_clock)) {
- DRM_ERROR("Failed to get pixel clock\n");
-@@ -484,7 +478,14 @@ static int vc4_hdmi_bind(struct device *
- return PTR_ERR(hdmi->hsm_clock);
- }
-
-+ ddc_node = of_parse_phandle(dev->of_node, "ddc", 0);
-+ if (!ddc_node) {
-+ DRM_ERROR("Failed to find ddc node in device tree\n");
-+ return -ENODEV;
-+ }
-+
- hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node);
-+ of_node_put(ddc_node);
- if (!hdmi->ddc) {
- DRM_DEBUG("Failed to get ddc i2c adapter by node\n");
- return -EPROBE_DEFER;
--- /dev/null
+From 590e54b9ca38b0700b1b61cdd414205cdc3eef8b Mon Sep 17 00:00:00 2001
+From: Herve Jourdain <herve.jourdain@neuf.fr>
+Date: Wed, 1 Jun 2016 02:24:46 +0800
+Subject: [PATCH] drm/vc4: Fix ioctl permissions for render nodes.
+
+Contrary to other flags to DRM_IOCTL_DEF_DRV(), which restrict usage,
+the flag for render node is an enabler (the IOCTL can't be used from
+render node if it's not present). So DRM_RENDER_ALLOW needs to be
+added to all the flags that were previously 0.
+
+Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Fixes: 0cd3e2747662 ("drm/vc4: Add missing render node support")
+(cherry picked from commit b10c22e5f9902a329450c2027e9291b71e9f1602)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -88,12 +88,12 @@ static const struct file_operations vc4_
+ };
+
+ static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
+- DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, 0),
+- DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, 0),
+- DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, 0),
+- DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, 0),
+- DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, 0),
+- DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, 0),
++ DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW),
++ DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW),
++ DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW),
++ DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW),
++ DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW),
++ DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
+ DRM_ROOT_ONLY),
+ };
+++ /dev/null
-From fa8b827fb90719d981a8fa292064958219c8ed10 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 2 Jun 2016 00:06:28 +0200
-Subject: [PATCH] drm/vc4: Use for_each_plane_in_state
-
-We want to hide drm_atomic_stat internals a bit better.
-
-Cc: Eric Anholt <eric@anholt.net>
-Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
-Link: http://patchwork.freedesktop.org/patch/msgid/1464818821-5736-6-git-send-email-daniel.vetter@ffwll.ch
-(cherry picked from commit 833cd78adbc236db684f19e93121d4bf6659a8af)
----
- drivers/gpu/drm/vc4/vc4_kms.c | 10 +++-------
- 1 file changed, 3 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_kms.c
-+++ b/drivers/gpu/drm/vc4/vc4_kms.c
-@@ -111,6 +111,8 @@ static int vc4_atomic_commit(struct drm_
- int i;
- uint64_t wait_seqno = 0;
- struct vc4_commit *c;
-+ struct drm_plane *plane;
-+ struct drm_plane_state *new_state;
-
- c = commit_init(state);
- if (!c)
-@@ -130,13 +132,7 @@ static int vc4_atomic_commit(struct drm_
- return ret;
- }
-
-- for (i = 0; i < dev->mode_config.num_total_plane; i++) {
-- struct drm_plane *plane = state->planes[i];
-- struct drm_plane_state *new_state = state->plane_states[i];
--
-- if (!plane)
-- continue;
--
-+ for_each_plane_in_state(state, plane, new_state, i) {
- if ((plane->state->fb != new_state->fb) && new_state->fb) {
- struct drm_gem_cma_object *cma_bo =
- drm_fb_cma_get_gem_obj(new_state->fb, 0);
+++ /dev/null
-From cd24c4594b21f3a9dec5780d06dacbaf59415225 Mon Sep 17 00:00:00 2001
-From: Herve Jourdain <herve.jourdain@neuf.fr>
-Date: Wed, 1 Jun 2016 02:24:46 +0800
-Subject: [PATCH] drm/vc4: Fix ioctl permissions for render nodes.
-
-Contrary to other flags to DRM_IOCTL_DEF_DRV(), which restrict usage,
-the flag for render node is an enabler (the IOCTL can't be used from
-render node if it's not present). So DRM_RENDER_ALLOW needs to be
-added to all the flags that were previously 0.
-
-Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Fixes: 0cd3e2747662 ("drm/vc4: Add missing render node support")
-(cherry picked from commit b10c22e5f9902a329450c2027e9291b71e9f1602)
----
- drivers/gpu/drm/vc4/vc4_drv.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -88,12 +88,12 @@ static const struct file_operations vc4_
- };
-
- static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
-- DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, 0),
-- DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, 0),
-- DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, 0),
-- DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, 0),
-- DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, 0),
-- DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, 0),
-+ DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW),
-+ DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW),
-+ DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW),
-+ DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW),
-+ DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW),
-+ DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
- DRM_ROOT_ONLY),
- };
--- /dev/null
+From 83b8a95e047475cd43016426288f5072067ea369 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Wed, 18 May 2016 14:02:46 +0200
+Subject: [PATCH] drm/vc4: Make pageflip completion handling more robust.
+
+Protect both the setup of the pageflip event and the
+latching of the new requested displaylist head pointer
+by the event lock, so we can't get into a situation
+where vc4_atomic_flush latches the new display list via
+HVS_WRITE, then immediately gets preempted before queueing
+the pageflip event, then the page-flip completes in hw and
+the vc4_crtc_handle_page_flip() runs and no-ops due to
+lack of a pending pageflip event, then vc4_atomic_flush
+continues and only then queues the pageflip event - after
+the page flip handling already no-oped. This would cause
+flip completion handling only at the next vblank - one
+frame too late.
+
+In vc4_crtc_handle_page_flip() check the actual DL head
+pointer in SCALER_DISPLACTX against the requested pointer
+for page flip to make sure that the flip actually really
+completed in the current vblank and doesn't get deferred
+to the next one because the DL head pointer was written
+a bit too late into SCALER_DISPLISTX, after start of
+vblank, and missed the boat. This avoids handling a
+pageflip completion too early - one frame too early.
+
+According to Eric, DL head pointer updates which were
+written into the HVS DISPLISTX reg get committed to hardware
+at the last pixel of active scanout. Our vblank interrupt
+handler, as triggered by PV_INT_VFP_START irq, gets to run
+earliest at the first pixel of HBLANK at the end of the
+last scanline of active scanout, ie. vblank irq handling
+runs at least 1 pixel duration after a potential pageflip
+completion happened in hardware.
+
+This ordering of events in the hardware, together with the
+lock protection and SCALER_DISPLACTX sampling of this patch,
+guarantees that pageflip completion handling only runs at
+exactly the vblank irq of actual pageflip completion in all
+cases.
+
+Background info from Eric about the relative timing of
+HVS, PV's and trigger points for interrupts, DL updates:
+
+https://lists.freedesktop.org/archives/dri-devel/2016-May/107510.html
+
+Tested on RPi 2B with hardware timing measurement equipment
+and shown to no longer complete flips too early or too late.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 56d1fe0979dc9b73c1c12ee07722ac380d42a0c4)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 28 ++++++++++++++++++----------
+ drivers/gpu/drm/vc4/vc4_regs.h | 4 ++++
+ 2 files changed, 22 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -465,14 +465,6 @@ static void vc4_crtc_atomic_flush(struct
+
+ WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
+
+- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+- vc4_state->mm.start);
+-
+- if (debug_dump_regs) {
+- DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
+- vc4_hvs_dump_state(dev);
+- }
+-
+ if (crtc->state->event) {
+ unsigned long flags;
+
+@@ -482,8 +474,20 @@ static void vc4_crtc_atomic_flush(struct
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+ vc4_crtc->event = crtc->state->event;
+- spin_unlock_irqrestore(&dev->event_lock, flags);
+ crtc->state->event = NULL;
++
++ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
++ vc4_state->mm.start);
++
++ spin_unlock_irqrestore(&dev->event_lock, flags);
++ } else {
++ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
++ vc4_state->mm.start);
++ }
++
++ if (debug_dump_regs) {
++ DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
++ vc4_hvs_dump_state(dev);
+ }
+ }
+
+@@ -509,10 +513,14 @@ static void vc4_crtc_handle_page_flip(st
+ {
+ struct drm_crtc *crtc = &vc4_crtc->base;
+ struct drm_device *dev = crtc->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
++ u32 chan = vc4_crtc->channel;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev->event_lock, flags);
+- if (vc4_crtc->event) {
++ if (vc4_crtc->event &&
++ (vc4_state->mm.start == HVS_READ(SCALER_DISPLACTX(chan)))) {
+ drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
+ vc4_crtc->event = NULL;
+ drm_crtc_vblank_put(crtc);
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -343,6 +343,10 @@
+ #define SCALER_DISPLACT0 0x00000030
+ #define SCALER_DISPLACT1 0x00000034
+ #define SCALER_DISPLACT2 0x00000038
++#define SCALER_DISPLACTX(x) (SCALER_DISPLACT0 + \
++ (x) * (SCALER_DISPLACT1 - \
++ SCALER_DISPLACT0))
++
+ #define SCALER_DISPCTRL0 0x00000040
+ # define SCALER_DISPCTRLX_ENABLE BIT(31)
+ # define SCALER_DISPCTRLX_RESET BIT(30)
+++ /dev/null
-From cb182bb6180c57b28636669a613861023fd8f03d Mon Sep 17 00:00:00 2001
-From: Mario Kleiner <mario.kleiner.de@gmail.com>
-Date: Wed, 18 May 2016 14:02:46 +0200
-Subject: [PATCH] drm/vc4: Make pageflip completion handling more robust.
-
-Protect both the setup of the pageflip event and the
-latching of the new requested displaylist head pointer
-by the event lock, so we can't get into a situation
-where vc4_atomic_flush latches the new display list via
-HVS_WRITE, then immediately gets preempted before queueing
-the pageflip event, then the page-flip completes in hw and
-the vc4_crtc_handle_page_flip() runs and no-ops due to
-lack of a pending pageflip event, then vc4_atomic_flush
-continues and only then queues the pageflip event - after
-the page flip handling already no-oped. This would cause
-flip completion handling only at the next vblank - one
-frame too late.
-
-In vc4_crtc_handle_page_flip() check the actual DL head
-pointer in SCALER_DISPLACTX against the requested pointer
-for page flip to make sure that the flip actually really
-completed in the current vblank and doesn't get deferred
-to the next one because the DL head pointer was written
-a bit too late into SCALER_DISPLISTX, after start of
-vblank, and missed the boat. This avoids handling a
-pageflip completion too early - one frame too early.
-
-According to Eric, DL head pointer updates which were
-written into the HVS DISPLISTX reg get committed to hardware
-at the last pixel of active scanout. Our vblank interrupt
-handler, as triggered by PV_INT_VFP_START irq, gets to run
-earliest at the first pixel of HBLANK at the end of the
-last scanline of active scanout, ie. vblank irq handling
-runs at least 1 pixel duration after a potential pageflip
-completion happened in hardware.
-
-This ordering of events in the hardware, together with the
-lock protection and SCALER_DISPLACTX sampling of this patch,
-guarantees that pageflip completion handling only runs at
-exactly the vblank irq of actual pageflip completion in all
-cases.
-
-Background info from Eric about the relative timing of
-HVS, PV's and trigger points for interrupts, DL updates:
-
-https://lists.freedesktop.org/archives/dri-devel/2016-May/107510.html
-
-Tested on RPi 2B with hardware timing measurement equipment
-and shown to no longer complete flips too early or too late.
-
-Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 56d1fe0979dc9b73c1c12ee07722ac380d42a0c4)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 28 ++++++++++++++++++----------
- drivers/gpu/drm/vc4/vc4_regs.h | 4 ++++
- 2 files changed, 22 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -465,14 +465,6 @@ static void vc4_crtc_atomic_flush(struct
-
- WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
-
-- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-- vc4_state->mm.start);
--
-- if (debug_dump_regs) {
-- DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
-- vc4_hvs_dump_state(dev);
-- }
--
- if (crtc->state->event) {
- unsigned long flags;
-
-@@ -482,8 +474,20 @@ static void vc4_crtc_atomic_flush(struct
-
- spin_lock_irqsave(&dev->event_lock, flags);
- vc4_crtc->event = crtc->state->event;
-- spin_unlock_irqrestore(&dev->event_lock, flags);
- crtc->state->event = NULL;
-+
-+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-+ vc4_state->mm.start);
-+
-+ spin_unlock_irqrestore(&dev->event_lock, flags);
-+ } else {
-+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-+ vc4_state->mm.start);
-+ }
-+
-+ if (debug_dump_regs) {
-+ DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
-+ vc4_hvs_dump_state(dev);
- }
- }
-
-@@ -509,10 +513,14 @@ static void vc4_crtc_handle_page_flip(st
- {
- struct drm_crtc *crtc = &vc4_crtc->base;
- struct drm_device *dev = crtc->dev;
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
-+ u32 chan = vc4_crtc->channel;
- unsigned long flags;
-
- spin_lock_irqsave(&dev->event_lock, flags);
-- if (vc4_crtc->event) {
-+ if (vc4_crtc->event &&
-+ (vc4_state->mm.start == HVS_READ(SCALER_DISPLACTX(chan)))) {
- drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
- vc4_crtc->event = NULL;
- drm_crtc_vblank_put(crtc);
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -343,6 +343,10 @@
- #define SCALER_DISPLACT0 0x00000030
- #define SCALER_DISPLACT1 0x00000034
- #define SCALER_DISPLACT2 0x00000038
-+#define SCALER_DISPLACTX(x) (SCALER_DISPLACT0 + \
-+ (x) * (SCALER_DISPLACT1 - \
-+ SCALER_DISPLACT0))
-+
- #define SCALER_DISPCTRL0 0x00000040
- # define SCALER_DISPCTRLX_ENABLE BIT(31)
- # define SCALER_DISPCTRLX_RESET BIT(30)
--- /dev/null
+From f594ac854025bc377a8b2095e9be41af96eed278 Mon Sep 17 00:00:00 2001
+From: Colin Ian King <colin.king@canonical.com>
+Date: Thu, 2 Jun 2016 10:38:29 +0100
+Subject: [PATCH] drm/vc4: clean up error exit path on failed dpi_connector
+ allocation
+
+There is redundant code in the clean up exit path when dpi_connector
+fails to be allocated. The current code checks if connector is NULL
+before destroying it, in fact, connector is NULL at this point so
+the check is redundant and can be removed. The final clean up is
+that we can remove the goto fail with a simple return and the unused
+variable ret.
+
+Signed-off-by: Colin Ian King <colin.king@canonical.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit a9402dfe17bddeee5c72943385eaa13c39f106f7)
+---
+ drivers/gpu/drm/vc4/vc4_dpi.c | 14 +++-----------
+ 1 file changed, 3 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_dpi.c
++++ b/drivers/gpu/drm/vc4/vc4_dpi.c
+@@ -236,14 +236,12 @@ static struct drm_connector *vc4_dpi_con
+ {
+ struct drm_connector *connector = NULL;
+ struct vc4_dpi_connector *dpi_connector;
+- int ret = 0;
+
+ dpi_connector = devm_kzalloc(dev->dev, sizeof(*dpi_connector),
+ GFP_KERNEL);
+- if (!dpi_connector) {
+- ret = -ENOMEM;
+- goto fail;
+- }
++ if (!dpi_connector)
++ return ERR_PTR(-ENOMEM);
++
+ connector = &dpi_connector->base;
+
+ dpi_connector->encoder = dpi->encoder;
+@@ -260,12 +258,6 @@ static struct drm_connector *vc4_dpi_con
+ drm_mode_connector_attach_encoder(connector, dpi->encoder);
+
+ return connector;
+-
+- fail:
+- if (connector)
+- vc4_dpi_connector_destroy(connector);
+-
+- return ERR_PTR(ret);
+ }
+
+ static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
+++ /dev/null
-From 2092b669dd8d4c87cbbf107fd63fe2050ec5b4aa Mon Sep 17 00:00:00 2001
-From: Colin Ian King <colin.king@canonical.com>
-Date: Thu, 2 Jun 2016 10:38:29 +0100
-Subject: [PATCH] drm/vc4: clean up error exit path on failed dpi_connector
- allocation
-
-There is redundant code in the clean up exit path when dpi_connector
-fails to be allocated. The current code checks if connector is NULL
-before destroying it, in fact, connector is NULL at this point so
-the check is redundant and can be removed. The final clean up is
-that we can remove the goto fail with a simple return and the unused
-variable ret.
-
-Signed-off-by: Colin Ian King <colin.king@canonical.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit a9402dfe17bddeee5c72943385eaa13c39f106f7)
----
- drivers/gpu/drm/vc4/vc4_dpi.c | 14 +++-----------
- 1 file changed, 3 insertions(+), 11 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_dpi.c
-+++ b/drivers/gpu/drm/vc4/vc4_dpi.c
-@@ -236,14 +236,12 @@ static struct drm_connector *vc4_dpi_con
- {
- struct drm_connector *connector = NULL;
- struct vc4_dpi_connector *dpi_connector;
-- int ret = 0;
-
- dpi_connector = devm_kzalloc(dev->dev, sizeof(*dpi_connector),
- GFP_KERNEL);
-- if (!dpi_connector) {
-- ret = -ENOMEM;
-- goto fail;
-- }
-+ if (!dpi_connector)
-+ return ERR_PTR(-ENOMEM);
-+
- connector = &dpi_connector->base;
-
- dpi_connector->encoder = dpi->encoder;
-@@ -260,12 +258,6 @@ static struct drm_connector *vc4_dpi_con
- drm_mode_connector_attach_encoder(connector, dpi->encoder);
-
- return connector;
--
-- fail:
-- if (connector)
-- vc4_dpi_connector_destroy(connector);
--
-- return ERR_PTR(ret);
- }
-
- static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
--- /dev/null
+From 6771102fcd8bf6a7e1638807b78f35df4fece9a6 Mon Sep 17 00:00:00 2001
+From: Rob Herring <robh@kernel.org>
+Date: Thu, 9 Jun 2016 16:19:25 -0500
+Subject: [PATCH] drm: vc4: enable XBGR8888 and ABGR8888 pixel formats
+
+DRM_FORMAT_XBGR8888 and DRM_FORMAT_ABGR8888 are 2 of the native formats
+used in Android, so enable them for VC4. There seems to be no logic behind
+HVS_PIXEL_ORDER_xxxx naming, but HVS_PIXEL_ORDER_ARGB seems to work
+correctly.
+
+Signed-off-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 93977767f092fbf0787e5d2a0bf2e0a3fc6f6ced)
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -94,6 +94,14 @@ static const struct hvs_format {
+ .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
+ },
+ {
++ .drm = DRM_FORMAT_ABGR8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
++ .pixel_order = HVS_PIXEL_ORDER_ARGB, .has_alpha = true,
++ },
++ {
++ .drm = DRM_FORMAT_XBGR8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
++ .pixel_order = HVS_PIXEL_ORDER_ARGB, .has_alpha = false,
++ },
++ {
+ .drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565,
+ .pixel_order = HVS_PIXEL_ORDER_XRGB, .has_alpha = false,
+ },
--- /dev/null
+From 883112e5caaefcb620248e9f63426e82349033e0 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 8 Jul 2016 11:25:09 -0700
+Subject: [PATCH] drm/vc4: Bind the HVS before we bind the individual CRTCs.
+
+We need to be able to look at the CRTC's registers in the HVS as part
+of initialization, while the HVS doesn't need to look at the PV
+registers.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-and-tested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+(cherry picked from commit 7a100969f30b77761901c05a5c810bcaea65df44)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -295,8 +295,8 @@ static struct platform_driver *const com
+ &vc4_hdmi_driver,
+ &vc4_dpi_driver,
+ &vc4_dsi_driver,
+- &vc4_crtc_driver,
+ &vc4_hvs_driver,
++ &vc4_crtc_driver,
+ &vc4_v3d_driver,
+ };
+
+++ /dev/null
-From 1a5b389a95cc5e468477b183d3e7312caf2ea2f4 Mon Sep 17 00:00:00 2001
-From: Rob Herring <robh@kernel.org>
-Date: Thu, 9 Jun 2016 16:19:25 -0500
-Subject: [PATCH] drm: vc4: enable XBGR8888 and ABGR8888 pixel formats
-
-DRM_FORMAT_XBGR8888 and DRM_FORMAT_ABGR8888 are 2 of the native formats
-used in Android, so enable them for VC4. There seems to be no logic behind
-HVS_PIXEL_ORDER_xxxx naming, but HVS_PIXEL_ORDER_ARGB seems to work
-correctly.
-
-Signed-off-by: Rob Herring <robh@kernel.org>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 93977767f092fbf0787e5d2a0bf2e0a3fc6f6ced)
----
- drivers/gpu/drm/vc4/vc4_plane.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_plane.c
-+++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -94,6 +94,14 @@ static const struct hvs_format {
- .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
- },
- {
-+ .drm = DRM_FORMAT_ABGR8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
-+ .pixel_order = HVS_PIXEL_ORDER_ARGB, .has_alpha = true,
-+ },
-+ {
-+ .drm = DRM_FORMAT_XBGR8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
-+ .pixel_order = HVS_PIXEL_ORDER_ARGB, .has_alpha = false,
-+ },
-+ {
- .drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565,
- .pixel_order = HVS_PIXEL_ORDER_XRGB, .has_alpha = false,
- },
+++ /dev/null
-From 4bdd6172dbf4ea9d9ae85b6a3214bdb787f16778 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 8 Jul 2016 11:25:09 -0700
-Subject: [PATCH] drm/vc4: Bind the HVS before we bind the individual CRTCs.
-
-We need to be able to look at the CRTC's registers in the HVS as part
-of initialization, while the HVS doesn't need to look at the PV
-registers.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-and-tested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
-(cherry picked from commit 7a100969f30b77761901c05a5c810bcaea65df44)
----
- drivers/gpu/drm/vc4/vc4_drv.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -295,8 +295,8 @@ static struct platform_driver *const com
- &vc4_hdmi_driver,
- &vc4_dpi_driver,
- &vc4_dsi_driver,
-- &vc4_crtc_driver,
- &vc4_hvs_driver,
-+ &vc4_crtc_driver,
- &vc4_v3d_driver,
- };
-
--- /dev/null
+From 50cb4c343d766b0a3efa441a2c62fb890f0b3e45 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Thu, 23 Jun 2016 08:17:50 +0200
+Subject: [PATCH] drm/vc4: Implement precise vblank timestamping.
+
+Precise vblank timestamping is implemented via the
+usual scanout position based method. On VC4 the
+pixelvalves PV do not have a scanout position
+register. Only the hardware video scaler HVS has a
+similar register which describes which scanline for
+the output is currently composited and stored in the
+HVS fifo for later consumption by the PV.
+
+This causes a problem in that the HVS runs at a much
+faster clock (system clock / audio gate) than the PV
+which runs at video mode dot clock, so the unless the
+fifo between HVS and PV is full, the HVS will progress
+faster in its observable read line position than video
+scan rate, so the HVS position reading can't be directly
+translated into a scanout position for timestamp correction.
+
+Additionally when the PV is in vblank, it doesn't consume
+from the fifo, so the fifo gets full very quickly and then
+the HVS stops compositing until the PV enters active scanout
+and starts consuming scanlines from the fifo again, making
+new space for the HVS to composite.
+
+Therefore a simple translation of HVS read position into
+elapsed time since (or to) start of active scanout does
+not work, but for the most interesting cases we can still
+get useful and sufficiently accurate results:
+
+1. The PV enters active scanout of a new frame with the
+ fifo of the HVS completely full, and the HVS can refill
+ any fifo line which gets consumed and thereby freed up by
+ the PV during active scanout very quickly. Therefore the
+ PV and HVS work effectively in lock-step during active
+ scanout with the fifo never having more than 1 scanline
+ freed up by the PV before it gets refilled. The PV's
+ real scanout position is therefore trailing the HVS
+ compositing position as scanoutpos = hvspos - fifosize
+ and we can get the true scanoutpos as HVS readpos minus
+ fifo size, so precise timestamping works while in active
+ scanout, except for the last few scanlines of the frame,
+ when the HVS reaches end of frame, stops compositing and
+ the PV catches up and drains the fifo. This special case
+ would only introduce minor errors though.
+
+2. If we are in vblank, then we can only guess something
+ reasonable. If called from vblank irq, we assume the irq is
+ usually dispatched with minimum delay, so we can take a
+ timestamp taken at entry into the vblank irq handler as a
+ baseline and then add a full vblank duration until the
+ guessed start of active scanout. As irq dispatch is usually
+ pretty low latency this works with relatively low jitter and
+ good results.
+
+ If we aren't called from vblank then we could be anywhere
+ within the vblank interval, so we return a neutral result,
+ simply the current system timestamp, and hope for the best.
+
+Measurement shows the generated timestamps to be rather precise,
+and at least never off more than 1 vblank duration worst-case.
+
+Limitations: Doesn't work well yet for interlaced video modes,
+ therefore disabled in interlaced mode for now.
+
+v2: Use the DISPBASE registers to determine the FIFO size (changes
+ by anholt)
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Reviewed-and-tested-by: Mario Kleiner <mario.kleiner.de@gmail.com> (v2)
+(cherry picked from commit 1bf59f1dcbe25272f6b5d870054647e58a8a9c55)
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 162 +++++++++++++++++++++++++++++++++++++++++
+ drivers/gpu/drm/vc4/vc4_drv.c | 2 +
+ drivers/gpu/drm/vc4/vc4_drv.h | 7 ++
+ drivers/gpu/drm/vc4/vc4_regs.h | 22 +++++-
+ 4 files changed, 192 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -47,12 +47,17 @@ struct vc4_crtc {
+ const struct vc4_crtc_data *data;
+ void __iomem *regs;
+
++ /* Timestamp at start of vblank irq - unaffected by lock delays. */
++ ktime_t t_vblank;
++
+ /* Which HVS channel we're using for our CRTC. */
+ int channel;
+
+ u8 lut_r[256];
+ u8 lut_g[256];
+ u8 lut_b[256];
++ /* Size in pixels of the COB memory allocated to this CRTC. */
++ u32 cob_size;
+
+ struct drm_pending_vblank_event *event;
+ };
+@@ -134,6 +139,144 @@ int vc4_crtc_debugfs_regs(struct seq_fil
+ }
+ #endif
+
++int vc4_crtc_get_scanoutpos(struct drm_device *dev, unsigned int crtc_id,
++ unsigned int flags, int *vpos, int *hpos,
++ ktime_t *stime, ktime_t *etime,
++ const struct drm_display_mode *mode)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id];
++ u32 val;
++ int fifo_lines;
++ int vblank_lines;
++ int ret = 0;
++
++ /*
++ * XXX Doesn't work well in interlaced mode yet, partially due
++ * to problems in vc4 kms or drm core interlaced mode handling,
++ * so disable for now in interlaced mode.
++ */
++ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
++ return ret;
++
++ /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
++
++ /* Get optional system timestamp before query. */
++ if (stime)
++ *stime = ktime_get();
++
++ /*
++ * Read vertical scanline which is currently composed for our
++ * pixelvalve by the HVS, and also the scaler status.
++ */
++ val = HVS_READ(SCALER_DISPSTATX(vc4_crtc->channel));
++
++ /* Get optional system timestamp after query. */
++ if (etime)
++ *etime = ktime_get();
++
++ /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
++
++ /* Vertical position of hvs composed scanline. */
++ *vpos = VC4_GET_FIELD(val, SCALER_DISPSTATX_LINE);
++
++ /* No hpos info available. */
++ if (hpos)
++ *hpos = 0;
++
++ /* This is the offset we need for translating hvs -> pv scanout pos. */
++ fifo_lines = vc4_crtc->cob_size / mode->crtc_hdisplay;
++
++ if (fifo_lines > 0)
++ ret |= DRM_SCANOUTPOS_VALID;
++
++ /* HVS more than fifo_lines into frame for compositing? */
++ if (*vpos > fifo_lines) {
++ /*
++ * We are in active scanout and can get some meaningful results
++ * from HVS. The actual PV scanout can not trail behind more
++ * than fifo_lines as that is the fifo's capacity. Assume that
++ * in active scanout the HVS and PV work in lockstep wrt. HVS
++ * refilling the fifo and PV consuming from the fifo, ie.
++ * whenever the PV consumes and frees up a scanline in the
++ * fifo, the HVS will immediately refill it, therefore
++ * incrementing vpos. Therefore we choose HVS read position -
++ * fifo size in scanlines as a estimate of the real scanout
++ * position of the PV.
++ */
++ *vpos -= fifo_lines + 1;
++ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
++ *vpos /= 2;
++
++ ret |= DRM_SCANOUTPOS_ACCURATE;
++ return ret;
++ }
++
++ /*
++ * Less: This happens when we are in vblank and the HVS, after getting
++ * the VSTART restart signal from the PV, just started refilling its
++ * fifo with new lines from the top-most lines of the new framebuffers.
++ * The PV does not scan out in vblank, so does not remove lines from
++ * the fifo, so the fifo will be full quickly and the HVS has to pause.
++ * We can't get meaningful readings wrt. scanline position of the PV
++ * and need to make things up in a approximative but consistent way.
++ */
++ ret |= DRM_SCANOUTPOS_IN_VBLANK;
++ vblank_lines = mode->crtc_vtotal - mode->crtc_vdisplay;
++
++ if (flags & DRM_CALLED_FROM_VBLIRQ) {
++ /*
++ * Assume the irq handler got called close to first
++ * line of vblank, so PV has about a full vblank
++ * scanlines to go, and as a base timestamp use the
++ * one taken at entry into vblank irq handler, so it
++ * is not affected by random delays due to lock
++ * contention on event_lock or vblank_time lock in
++ * the core.
++ */
++ *vpos = -vblank_lines;
++
++ if (stime)
++ *stime = vc4_crtc->t_vblank;
++ if (etime)
++ *etime = vc4_crtc->t_vblank;
++
++ /*
++ * If the HVS fifo is not yet full then we know for certain
++ * we are at the very beginning of vblank, as the hvs just
++ * started refilling, and the stime and etime timestamps
++ * truly correspond to start of vblank.
++ */
++ if ((val & SCALER_DISPSTATX_FULL) != SCALER_DISPSTATX_FULL)
++ ret |= DRM_SCANOUTPOS_ACCURATE;
++ } else {
++ /*
++ * No clue where we are inside vblank. Return a vpos of zero,
++ * which will cause calling code to just return the etime
++ * timestamp uncorrected. At least this is no worse than the
++ * standard fallback.
++ */
++ *vpos = 0;
++ }
++
++ return ret;
++}
++
++int vc4_crtc_get_vblank_timestamp(struct drm_device *dev, unsigned int crtc_id,
++ int *max_error, struct timeval *vblank_time,
++ unsigned flags)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id];
++ struct drm_crtc *crtc = &vc4_crtc->base;
++ struct drm_crtc_state *state = crtc->state;
++
++ /* Helper routine in DRM core does all the work: */
++ return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc_id, max_error,
++ vblank_time, flags,
++ &state->adjusted_mode);
++}
++
+ static void vc4_crtc_destroy(struct drm_crtc *crtc)
+ {
+ drm_crtc_cleanup(crtc);
+@@ -535,6 +678,7 @@ static irqreturn_t vc4_crtc_irq_handler(
+ irqreturn_t ret = IRQ_NONE;
+
+ if (stat & PV_INT_VFP_START) {
++ vc4_crtc->t_vblank = ktime_get();
+ CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
+ drm_crtc_handle_vblank(&vc4_crtc->base);
+ vc4_crtc_handle_page_flip(vc4_crtc);
+@@ -759,6 +903,22 @@ static void vc4_set_crtc_possible_masks(
+ }
+ }
+
++static void
++vc4_crtc_get_cob_allocation(struct vc4_crtc *vc4_crtc)
++{
++ struct drm_device *drm = vc4_crtc->base.dev;
++ struct vc4_dev *vc4 = to_vc4_dev(drm);
++ u32 dispbase = HVS_READ(SCALER_DISPBASEX(vc4_crtc->channel));
++ /* Top/base are supposed to be 4-pixel aligned, but the
++ * Raspberry Pi firmware fills the low bits (which are
++ * presumably ignored).
++ */
++ u32 top = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_TOP) & ~3;
++ u32 base = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_BASE) & ~3;
++
++ vc4_crtc->cob_size = top - base + 4;
++}
++
+ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
+ {
+ struct platform_device *pdev = to_platform_device(dev);
+@@ -835,6 +995,8 @@ static int vc4_crtc_bind(struct device *
+ crtc->cursor = cursor_plane;
+ }
+
++ vc4_crtc_get_cob_allocation(vc4_crtc);
++
+ CRTC_WRITE(PV_INTEN, 0);
+ CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -116,6 +116,8 @@ static struct drm_driver vc4_drm_driver
+ .enable_vblank = vc4_enable_vblank,
+ .disable_vblank = vc4_disable_vblank,
+ .get_vblank_counter = drm_vblank_no_hw_counter,
++ .get_scanout_position = vc4_crtc_get_scanoutpos,
++ .get_vblank_timestamp = vc4_crtc_get_vblank_timestamp,
+
+ #if defined(CONFIG_DEBUG_FS)
+ .debugfs_init = vc4_debugfs_init,
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -419,6 +419,13 @@ int vc4_enable_vblank(struct drm_device
+ void vc4_disable_vblank(struct drm_device *dev, unsigned int crtc_id);
+ void vc4_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
+ int vc4_crtc_debugfs_regs(struct seq_file *m, void *arg);
++int vc4_crtc_get_scanoutpos(struct drm_device *dev, unsigned int crtc_id,
++ unsigned int flags, int *vpos, int *hpos,
++ ktime_t *stime, ktime_t *etime,
++ const struct drm_display_mode *mode);
++int vc4_crtc_get_vblank_timestamp(struct drm_device *dev, unsigned int crtc_id,
++ int *max_error, struct timeval *vblank_time,
++ unsigned flags);
+
+ /* vc4_debugfs.c */
+ int vc4_debugfs_init(struct drm_minor *minor);
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -368,7 +368,6 @@
+ # define SCALER_DISPBKGND_FILL BIT(24)
+
+ #define SCALER_DISPSTAT0 0x00000048
+-#define SCALER_DISPBASE0 0x0000004c
+ # define SCALER_DISPSTATX_MODE_MASK VC4_MASK(31, 30)
+ # define SCALER_DISPSTATX_MODE_SHIFT 30
+ # define SCALER_DISPSTATX_MODE_DISABLED 0
+@@ -377,6 +376,24 @@
+ # define SCALER_DISPSTATX_MODE_EOF 3
+ # define SCALER_DISPSTATX_FULL BIT(29)
+ # define SCALER_DISPSTATX_EMPTY BIT(28)
++# define SCALER_DISPSTATX_FRAME_COUNT_MASK VC4_MASK(17, 12)
++# define SCALER_DISPSTATX_FRAME_COUNT_SHIFT 12
++# define SCALER_DISPSTATX_LINE_MASK VC4_MASK(11, 0)
++# define SCALER_DISPSTATX_LINE_SHIFT 0
++
++#define SCALER_DISPBASE0 0x0000004c
++/* Last pixel in the COB (display FIFO memory) allocated to this HVS
++ * channel. Must be 4-pixel aligned (and thus 4 pixels less than the
++ * next COB base).
++ */
++# define SCALER_DISPBASEX_TOP_MASK VC4_MASK(31, 16)
++# define SCALER_DISPBASEX_TOP_SHIFT 16
++/* First pixel in the COB (display FIFO memory) allocated to this HVS
++ * channel. Must be 4-pixel aligned.
++ */
++# define SCALER_DISPBASEX_BASE_MASK VC4_MASK(15, 0)
++# define SCALER_DISPBASEX_BASE_SHIFT 0
++
+ #define SCALER_DISPCTRL1 0x00000050
+ #define SCALER_DISPBKGND1 0x00000054
+ #define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \
+@@ -387,6 +404,9 @@
+ (x) * (SCALER_DISPSTAT1 - \
+ SCALER_DISPSTAT0))
+ #define SCALER_DISPBASE1 0x0000005c
++#define SCALER_DISPBASEX(x) (SCALER_DISPBASE0 + \
++ (x) * (SCALER_DISPBASE1 - \
++ SCALER_DISPBASE0))
+ #define SCALER_DISPCTRL2 0x00000060
+ #define SCALER_DISPCTRLX(x) (SCALER_DISPCTRL0 + \
+ (x) * (SCALER_DISPCTRL1 - \
+++ /dev/null
-From d1a9a03cbe1110756a63d4a3747e22eb8417f75e Mon Sep 17 00:00:00 2001
-From: Mario Kleiner <mario.kleiner.de@gmail.com>
-Date: Thu, 23 Jun 2016 08:17:50 +0200
-Subject: [PATCH] drm/vc4: Implement precise vblank timestamping.
-
-Precise vblank timestamping is implemented via the
-usual scanout position based method. On VC4 the
-pixelvalves PV do not have a scanout position
-register. Only the hardware video scaler HVS has a
-similar register which describes which scanline for
-the output is currently composited and stored in the
-HVS fifo for later consumption by the PV.
-
-This causes a problem in that the HVS runs at a much
-faster clock (system clock / audio gate) than the PV
-which runs at video mode dot clock, so the unless the
-fifo between HVS and PV is full, the HVS will progress
-faster in its observable read line position than video
-scan rate, so the HVS position reading can't be directly
-translated into a scanout position for timestamp correction.
-
-Additionally when the PV is in vblank, it doesn't consume
-from the fifo, so the fifo gets full very quickly and then
-the HVS stops compositing until the PV enters active scanout
-and starts consuming scanlines from the fifo again, making
-new space for the HVS to composite.
-
-Therefore a simple translation of HVS read position into
-elapsed time since (or to) start of active scanout does
-not work, but for the most interesting cases we can still
-get useful and sufficiently accurate results:
-
-1. The PV enters active scanout of a new frame with the
- fifo of the HVS completely full, and the HVS can refill
- any fifo line which gets consumed and thereby freed up by
- the PV during active scanout very quickly. Therefore the
- PV and HVS work effectively in lock-step during active
- scanout with the fifo never having more than 1 scanline
- freed up by the PV before it gets refilled. The PV's
- real scanout position is therefore trailing the HVS
- compositing position as scanoutpos = hvspos - fifosize
- and we can get the true scanoutpos as HVS readpos minus
- fifo size, so precise timestamping works while in active
- scanout, except for the last few scanlines of the frame,
- when the HVS reaches end of frame, stops compositing and
- the PV catches up and drains the fifo. This special case
- would only introduce minor errors though.
-
-2. If we are in vblank, then we can only guess something
- reasonable. If called from vblank irq, we assume the irq is
- usually dispatched with minimum delay, so we can take a
- timestamp taken at entry into the vblank irq handler as a
- baseline and then add a full vblank duration until the
- guessed start of active scanout. As irq dispatch is usually
- pretty low latency this works with relatively low jitter and
- good results.
-
- If we aren't called from vblank then we could be anywhere
- within the vblank interval, so we return a neutral result,
- simply the current system timestamp, and hope for the best.
-
-Measurement shows the generated timestamps to be rather precise,
-and at least never off more than 1 vblank duration worst-case.
-
-Limitations: Doesn't work well yet for interlaced video modes,
- therefore disabled in interlaced mode for now.
-
-v2: Use the DISPBASE registers to determine the FIFO size (changes
- by anholt)
-
-Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Reviewed-and-tested-by: Mario Kleiner <mario.kleiner.de@gmail.com> (v2)
-(cherry picked from commit 1bf59f1dcbe25272f6b5d870054647e58a8a9c55)
----
- drivers/gpu/drm/vc4/vc4_crtc.c | 162 +++++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/vc4/vc4_drv.c | 2 +
- drivers/gpu/drm/vc4/vc4_drv.h | 7 ++
- drivers/gpu/drm/vc4/vc4_regs.h | 22 +++++-
- 4 files changed, 192 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_crtc.c
-+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
-@@ -47,12 +47,17 @@ struct vc4_crtc {
- const struct vc4_crtc_data *data;
- void __iomem *regs;
-
-+ /* Timestamp at start of vblank irq - unaffected by lock delays. */
-+ ktime_t t_vblank;
-+
- /* Which HVS channel we're using for our CRTC. */
- int channel;
-
- u8 lut_r[256];
- u8 lut_g[256];
- u8 lut_b[256];
-+ /* Size in pixels of the COB memory allocated to this CRTC. */
-+ u32 cob_size;
-
- struct drm_pending_vblank_event *event;
- };
-@@ -134,6 +139,144 @@ int vc4_crtc_debugfs_regs(struct seq_fil
- }
- #endif
-
-+int vc4_crtc_get_scanoutpos(struct drm_device *dev, unsigned int crtc_id,
-+ unsigned int flags, int *vpos, int *hpos,
-+ ktime_t *stime, ktime_t *etime,
-+ const struct drm_display_mode *mode)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id];
-+ u32 val;
-+ int fifo_lines;
-+ int vblank_lines;
-+ int ret = 0;
-+
-+ /*
-+ * XXX Doesn't work well in interlaced mode yet, partially due
-+ * to problems in vc4 kms or drm core interlaced mode handling,
-+ * so disable for now in interlaced mode.
-+ */
-+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
-+ return ret;
-+
-+ /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
-+
-+ /* Get optional system timestamp before query. */
-+ if (stime)
-+ *stime = ktime_get();
-+
-+ /*
-+ * Read vertical scanline which is currently composed for our
-+ * pixelvalve by the HVS, and also the scaler status.
-+ */
-+ val = HVS_READ(SCALER_DISPSTATX(vc4_crtc->channel));
-+
-+ /* Get optional system timestamp after query. */
-+ if (etime)
-+ *etime = ktime_get();
-+
-+ /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
-+
-+ /* Vertical position of hvs composed scanline. */
-+ *vpos = VC4_GET_FIELD(val, SCALER_DISPSTATX_LINE);
-+
-+ /* No hpos info available. */
-+ if (hpos)
-+ *hpos = 0;
-+
-+ /* This is the offset we need for translating hvs -> pv scanout pos. */
-+ fifo_lines = vc4_crtc->cob_size / mode->crtc_hdisplay;
-+
-+ if (fifo_lines > 0)
-+ ret |= DRM_SCANOUTPOS_VALID;
-+
-+ /* HVS more than fifo_lines into frame for compositing? */
-+ if (*vpos > fifo_lines) {
-+ /*
-+ * We are in active scanout and can get some meaningful results
-+ * from HVS. The actual PV scanout can not trail behind more
-+ * than fifo_lines as that is the fifo's capacity. Assume that
-+ * in active scanout the HVS and PV work in lockstep wrt. HVS
-+ * refilling the fifo and PV consuming from the fifo, ie.
-+ * whenever the PV consumes and frees up a scanline in the
-+ * fifo, the HVS will immediately refill it, therefore
-+ * incrementing vpos. Therefore we choose HVS read position -
-+ * fifo size in scanlines as a estimate of the real scanout
-+ * position of the PV.
-+ */
-+ *vpos -= fifo_lines + 1;
-+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
-+ *vpos /= 2;
-+
-+ ret |= DRM_SCANOUTPOS_ACCURATE;
-+ return ret;
-+ }
-+
-+ /*
-+ * Less: This happens when we are in vblank and the HVS, after getting
-+ * the VSTART restart signal from the PV, just started refilling its
-+ * fifo with new lines from the top-most lines of the new framebuffers.
-+ * The PV does not scan out in vblank, so does not remove lines from
-+ * the fifo, so the fifo will be full quickly and the HVS has to pause.
-+ * We can't get meaningful readings wrt. scanline position of the PV
-+ * and need to make things up in a approximative but consistent way.
-+ */
-+ ret |= DRM_SCANOUTPOS_IN_VBLANK;
-+ vblank_lines = mode->crtc_vtotal - mode->crtc_vdisplay;
-+
-+ if (flags & DRM_CALLED_FROM_VBLIRQ) {
-+ /*
-+ * Assume the irq handler got called close to first
-+ * line of vblank, so PV has about a full vblank
-+ * scanlines to go, and as a base timestamp use the
-+ * one taken at entry into vblank irq handler, so it
-+ * is not affected by random delays due to lock
-+ * contention on event_lock or vblank_time lock in
-+ * the core.
-+ */
-+ *vpos = -vblank_lines;
-+
-+ if (stime)
-+ *stime = vc4_crtc->t_vblank;
-+ if (etime)
-+ *etime = vc4_crtc->t_vblank;
-+
-+ /*
-+ * If the HVS fifo is not yet full then we know for certain
-+ * we are at the very beginning of vblank, as the hvs just
-+ * started refilling, and the stime and etime timestamps
-+ * truly correspond to start of vblank.
-+ */
-+ if ((val & SCALER_DISPSTATX_FULL) != SCALER_DISPSTATX_FULL)
-+ ret |= DRM_SCANOUTPOS_ACCURATE;
-+ } else {
-+ /*
-+ * No clue where we are inside vblank. Return a vpos of zero,
-+ * which will cause calling code to just return the etime
-+ * timestamp uncorrected. At least this is no worse than the
-+ * standard fallback.
-+ */
-+ *vpos = 0;
-+ }
-+
-+ return ret;
-+}
-+
-+int vc4_crtc_get_vblank_timestamp(struct drm_device *dev, unsigned int crtc_id,
-+ int *max_error, struct timeval *vblank_time,
-+ unsigned flags)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id];
-+ struct drm_crtc *crtc = &vc4_crtc->base;
-+ struct drm_crtc_state *state = crtc->state;
-+
-+ /* Helper routine in DRM core does all the work: */
-+ return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc_id, max_error,
-+ vblank_time, flags,
-+ &state->adjusted_mode);
-+}
-+
- static void vc4_crtc_destroy(struct drm_crtc *crtc)
- {
- drm_crtc_cleanup(crtc);
-@@ -535,6 +678,7 @@ static irqreturn_t vc4_crtc_irq_handler(
- irqreturn_t ret = IRQ_NONE;
-
- if (stat & PV_INT_VFP_START) {
-+ vc4_crtc->t_vblank = ktime_get();
- CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
- drm_crtc_handle_vblank(&vc4_crtc->base);
- vc4_crtc_handle_page_flip(vc4_crtc);
-@@ -759,6 +903,22 @@ static void vc4_set_crtc_possible_masks(
- }
- }
-
-+static void
-+vc4_crtc_get_cob_allocation(struct vc4_crtc *vc4_crtc)
-+{
-+ struct drm_device *drm = vc4_crtc->base.dev;
-+ struct vc4_dev *vc4 = to_vc4_dev(drm);
-+ u32 dispbase = HVS_READ(SCALER_DISPBASEX(vc4_crtc->channel));
-+ /* Top/base are supposed to be 4-pixel aligned, but the
-+ * Raspberry Pi firmware fills the low bits (which are
-+ * presumably ignored).
-+ */
-+ u32 top = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_TOP) & ~3;
-+ u32 base = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_BASE) & ~3;
-+
-+ vc4_crtc->cob_size = top - base + 4;
-+}
-+
- static int vc4_crtc_bind(struct device *dev, struct device *master, void *data)
- {
- struct platform_device *pdev = to_platform_device(dev);
-@@ -835,6 +995,8 @@ static int vc4_crtc_bind(struct device *
- crtc->cursor = cursor_plane;
- }
-
-+ vc4_crtc_get_cob_allocation(vc4_crtc);
-+
- CRTC_WRITE(PV_INTEN, 0);
- CRTC_WRITE(PV_INTSTAT, PV_INT_VFP_START);
- ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -116,6 +116,8 @@ static struct drm_driver vc4_drm_driver
- .enable_vblank = vc4_enable_vblank,
- .disable_vblank = vc4_disable_vblank,
- .get_vblank_counter = drm_vblank_no_hw_counter,
-+ .get_scanout_position = vc4_crtc_get_scanoutpos,
-+ .get_vblank_timestamp = vc4_crtc_get_vblank_timestamp,
-
- #if defined(CONFIG_DEBUG_FS)
- .debugfs_init = vc4_debugfs_init,
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -419,6 +419,13 @@ int vc4_enable_vblank(struct drm_device
- void vc4_disable_vblank(struct drm_device *dev, unsigned int crtc_id);
- void vc4_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
- int vc4_crtc_debugfs_regs(struct seq_file *m, void *arg);
-+int vc4_crtc_get_scanoutpos(struct drm_device *dev, unsigned int crtc_id,
-+ unsigned int flags, int *vpos, int *hpos,
-+ ktime_t *stime, ktime_t *etime,
-+ const struct drm_display_mode *mode);
-+int vc4_crtc_get_vblank_timestamp(struct drm_device *dev, unsigned int crtc_id,
-+ int *max_error, struct timeval *vblank_time,
-+ unsigned flags);
-
- /* vc4_debugfs.c */
- int vc4_debugfs_init(struct drm_minor *minor);
---- a/drivers/gpu/drm/vc4/vc4_regs.h
-+++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -368,7 +368,6 @@
- # define SCALER_DISPBKGND_FILL BIT(24)
-
- #define SCALER_DISPSTAT0 0x00000048
--#define SCALER_DISPBASE0 0x0000004c
- # define SCALER_DISPSTATX_MODE_MASK VC4_MASK(31, 30)
- # define SCALER_DISPSTATX_MODE_SHIFT 30
- # define SCALER_DISPSTATX_MODE_DISABLED 0
-@@ -377,6 +376,24 @@
- # define SCALER_DISPSTATX_MODE_EOF 3
- # define SCALER_DISPSTATX_FULL BIT(29)
- # define SCALER_DISPSTATX_EMPTY BIT(28)
-+# define SCALER_DISPSTATX_FRAME_COUNT_MASK VC4_MASK(17, 12)
-+# define SCALER_DISPSTATX_FRAME_COUNT_SHIFT 12
-+# define SCALER_DISPSTATX_LINE_MASK VC4_MASK(11, 0)
-+# define SCALER_DISPSTATX_LINE_SHIFT 0
-+
-+#define SCALER_DISPBASE0 0x0000004c
-+/* Last pixel in the COB (display FIFO memory) allocated to this HVS
-+ * channel. Must be 4-pixel aligned (and thus 4 pixels less than the
-+ * next COB base).
-+ */
-+# define SCALER_DISPBASEX_TOP_MASK VC4_MASK(31, 16)
-+# define SCALER_DISPBASEX_TOP_SHIFT 16
-+/* First pixel in the COB (display FIFO memory) allocated to this HVS
-+ * channel. Must be 4-pixel aligned.
-+ */
-+# define SCALER_DISPBASEX_BASE_MASK VC4_MASK(15, 0)
-+# define SCALER_DISPBASEX_BASE_SHIFT 0
-+
- #define SCALER_DISPCTRL1 0x00000050
- #define SCALER_DISPBKGND1 0x00000054
- #define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \
-@@ -387,6 +404,9 @@
- (x) * (SCALER_DISPSTAT1 - \
- SCALER_DISPSTAT0))
- #define SCALER_DISPBASE1 0x0000005c
-+#define SCALER_DISPBASEX(x) (SCALER_DISPBASE0 + \
-+ (x) * (SCALER_DISPBASE1 - \
-+ SCALER_DISPBASE0))
- #define SCALER_DISPCTRL2 0x00000060
- #define SCALER_DISPCTRLX(x) (SCALER_DISPCTRL0 + \
- (x) * (SCALER_DISPCTRL1 - \
--- /dev/null
+From 6c69e9ba4802bc0240a930ebacf171ddcf2f3d95 Mon Sep 17 00:00:00 2001
+From: Colin Ian King <colin.king@canonical.com>
+Date: Sat, 9 Jul 2016 23:26:03 +0100
+Subject: [PATCH] drm/vc4: remove redundant ret status check
+
+At the current point where ret is being checked for non-zero it has
+not changed since it was initialized to zero, hence the check and the
+label unref are redundant and can be removed.
+
+Signed-off-by: Colin Ian King <colin.king@canonical.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit deb4765db386db67626ffd075d8b5eb5fdf9c4f6)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 3 ---
+ 1 file changed, 3 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -233,8 +233,6 @@ static int vc4_drm_bind(struct device *d
+ vc4_bo_cache_init(drm);
+
+ drm_mode_config_init(drm);
+- if (ret)
+- goto unref;
+
+ vc4_gem_init(drm);
+
+@@ -268,7 +266,6 @@ unbind_all:
+ component_unbind_all(dev, drm);
+ gem_destroy:
+ vc4_gem_destroy(drm);
+-unref:
+ drm_dev_unref(drm);
+ vc4_bo_cache_destroy(drm);
+ return ret;
--- /dev/null
+From 48b941386dcff591dd0ab086f548fa20b047e84e Mon Sep 17 00:00:00 2001
+From: Emil Velikov <emil.l.velikov@gmail.com>
+Date: Thu, 7 Apr 2016 19:36:57 +0100
+Subject: [PATCH] drm/vc4: add extern C guard for the UAPI header
+
+Cc: Eric Anholt <eric@anholt.net>
+Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
+(cherry picked from commit 6a982350f892c286c645a6fe0e1da1f869a0c43f)
+---
+ include/uapi/drm/vc4_drm.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/include/uapi/drm/vc4_drm.h
++++ b/include/uapi/drm/vc4_drm.h
+@@ -26,6 +26,10 @@
+
+ #include "drm.h"
+
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
+ #define DRM_VC4_SUBMIT_CL 0x00
+ #define DRM_VC4_WAIT_SEQNO 0x01
+ #define DRM_VC4_WAIT_BO 0x02
+@@ -276,4 +280,8 @@ struct drm_vc4_get_hang_state {
+ __u32 pad[16];
+ };
+
++#if defined(__cplusplus)
++}
++#endif
++
+ #endif /* _UAPI_VC4_DRM_H_ */
+++ /dev/null
-From 2b643111b81df8724f317507471499660f4fc6f6 Mon Sep 17 00:00:00 2001
-From: Colin Ian King <colin.king@canonical.com>
-Date: Sat, 9 Jul 2016 23:26:03 +0100
-Subject: [PATCH] drm/vc4: remove redundant ret status check
-
-At the current point where ret is being checked for non-zero it has
-not changed since it was initialized to zero, hence the check and the
-label unref are redundant and can be removed.
-
-Signed-off-by: Colin Ian King <colin.king@canonical.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit deb4765db386db67626ffd075d8b5eb5fdf9c4f6)
----
- drivers/gpu/drm/vc4/vc4_drv.c | 3 ---
- 1 file changed, 3 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -233,8 +233,6 @@ static int vc4_drm_bind(struct device *d
- vc4_bo_cache_init(drm);
-
- drm_mode_config_init(drm);
-- if (ret)
-- goto unref;
-
- vc4_gem_init(drm);
-
-@@ -268,7 +266,6 @@ unbind_all:
- component_unbind_all(dev, drm);
- gem_destroy:
- vc4_gem_destroy(drm);
--unref:
- drm_dev_unref(drm);
- vc4_bo_cache_destroy(drm);
- return ret;
--- /dev/null
+From 1f7b4f4c4b7c103a836cb5b94a1e12a51213d04c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 4 Jul 2016 12:59:18 -0700
+Subject: [PATCH] drm/vc4: Fix definition of QPU_R_MS_REV_FLAGS
+
+We don't use it in shader validation currently, so it had no effect,
+but best to fix it anyway in case we do some day.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 20e48fd6a9252e21528c7e39b874c8fdca97f25a)
+---
+ drivers/gpu/drm/vc4/vc4_qpu_defines.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_qpu_defines.h
++++ b/drivers/gpu/drm/vc4/vc4_qpu_defines.h
+@@ -70,7 +70,7 @@ enum qpu_raddr {
+ QPU_R_ELEM_QPU = 38,
+ QPU_R_NOP,
+ QPU_R_XY_PIXEL_COORD = 41,
+- QPU_R_MS_REV_FLAGS = 41,
++ QPU_R_MS_REV_FLAGS = 42,
+ QPU_R_VPM = 48,
+ QPU_R_VPM_LD_BUSY,
+ QPU_R_VPM_LD_WAIT,
+++ /dev/null
-From 2f037770b9fedc29f75847a8323ffca49244e140 Mon Sep 17 00:00:00 2001
-From: Emil Velikov <emil.l.velikov@gmail.com>
-Date: Thu, 7 Apr 2016 19:36:57 +0100
-Subject: [PATCH] drm/vc4: add extern C guard for the UAPI header
-
-Cc: Eric Anholt <eric@anholt.net>
-Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
-(cherry picked from commit 6a982350f892c286c645a6fe0e1da1f869a0c43f)
----
- include/uapi/drm/vc4_drm.h | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/include/uapi/drm/vc4_drm.h
-+++ b/include/uapi/drm/vc4_drm.h
-@@ -26,6 +26,10 @@
-
- #include "drm.h"
-
-+#if defined(__cplusplus)
-+extern "C" {
-+#endif
-+
- #define DRM_VC4_SUBMIT_CL 0x00
- #define DRM_VC4_WAIT_SEQNO 0x01
- #define DRM_VC4_WAIT_BO 0x02
-@@ -276,4 +280,8 @@ struct drm_vc4_get_hang_state {
- __u32 pad[16];
- };
-
-+#if defined(__cplusplus)
-+}
-+#endif
-+
- #endif /* _UAPI_VC4_DRM_H_ */
--- /dev/null
+From 2ea806f591f60f022514aeb4963e6d483dc5f934 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Sat, 2 Jul 2016 09:58:41 -0700
+Subject: [PATCH] drm/vc4: Fix a "the the" typo in a comment.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit a20d5fa61c32a0c94d237da642326db2ef3c7433)
+---
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -162,7 +162,7 @@ check_tmu_write(uint64_t inst,
+ return false;
+ }
+
+- /* We assert that the the clamped address is the first
++ /* We assert that the clamped address is the first
+ * argument, and the UBO base address is the second argument.
+ * This is arbitrary, but simpler than supporting flipping the
+ * two either way.
+++ /dev/null
-From ad6f4991e27d60b8939b8a1421166342355db503 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 4 Jul 2016 12:59:18 -0700
-Subject: [PATCH] drm/vc4: Fix definition of QPU_R_MS_REV_FLAGS
-
-We don't use it in shader validation currently, so it had no effect,
-but best to fix it anyway in case we do some day.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 20e48fd6a9252e21528c7e39b874c8fdca97f25a)
----
- drivers/gpu/drm/vc4/vc4_qpu_defines.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_qpu_defines.h
-+++ b/drivers/gpu/drm/vc4/vc4_qpu_defines.h
-@@ -70,7 +70,7 @@ enum qpu_raddr {
- QPU_R_ELEM_QPU = 38,
- QPU_R_NOP,
- QPU_R_XY_PIXEL_COORD = 41,
-- QPU_R_MS_REV_FLAGS = 41,
-+ QPU_R_MS_REV_FLAGS = 42,
- QPU_R_VPM = 48,
- QPU_R_VPM_LD_BUSY,
- QPU_R_VPM_LD_WAIT,
+++ /dev/null
-From 18b45d780c43af635c4ed343ef99738bbfd07e26 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Sat, 2 Jul 2016 09:58:41 -0700
-Subject: [PATCH] drm/vc4: Fix a "the the" typo in a comment.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit a20d5fa61c32a0c94d237da642326db2ef3c7433)
----
- drivers/gpu/drm/vc4/vc4_validate_shaders.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-@@ -162,7 +162,7 @@ check_tmu_write(uint64_t inst,
- return false;
- }
-
-- /* We assert that the the clamped address is the first
-+ /* We assert that the clamped address is the first
- * argument, and the UBO base address is the second argument.
- * This is arbitrary, but simpler than supporting flipping the
- * two either way.
--- /dev/null
+From 78dd826ec156f24ee345f58cb6ba2b0efe478595 Mon Sep 17 00:00:00 2001
+From: Robert Foss <robert.foss@collabora.com>
+Date: Tue, 3 May 2016 13:48:20 -0400
+Subject: [PATCH] drm/vc4: Return -EBUSY if there's already a pending flip
+ event.
+
+As per the documentation in drm_crtc.h, atomic_commit should return
+-EBUSY if an asynchronous update is requested and there is an earlier
+update pending.
+
+v2: Rebase on the s/async/nonblock/ change.
+
+Signed-off-by: Robert Foss <robert.foss@collabora.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit e7c31f6f25b84fed961dc0dce6248878527693ae)
+---
+ drivers/gpu/drm/vc4/vc4_kms.c | 16 ++++++++++++----
+ 1 file changed, 12 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_kms.c
++++ b/drivers/gpu/drm/vc4/vc4_kms.c
+@@ -119,10 +119,18 @@ static int vc4_atomic_commit(struct drm_
+ return -ENOMEM;
+
+ /* Make sure that any outstanding modesets have finished. */
+- ret = down_interruptible(&vc4->async_modeset);
+- if (ret) {
+- kfree(c);
+- return ret;
++ if (nonblock) {
++ ret = down_trylock(&vc4->async_modeset);
++ if (ret) {
++ kfree(c);
++ return -EBUSY;
++ }
++ } else {
++ ret = down_interruptible(&vc4->async_modeset);
++ if (ret) {
++ kfree(c);
++ return ret;
++ }
+ }
+
+ ret = drm_atomic_helper_prepare_planes(dev, state);
--- /dev/null
+From 154e97d4ee2d45bcfada0b3c0c52e9530a7ec96b Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 12 Aug 2016 17:12:32 +0100
+Subject: [PATCH] config: Enable SENSORS_LM75
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -642,6 +642,7 @@ CONFIG_BATTERY_DS2760=m
+ CONFIG_POWER_RESET=y
+ CONFIG_POWER_RESET_GPIO=y
+ CONFIG_HWMON=m
++CONFIG_SENSORS_LM75=m
+ CONFIG_SENSORS_SHT21=m
+ CONFIG_SENSORS_SHTC1=m
+ CONFIG_THERMAL=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -634,6 +634,7 @@ CONFIG_BATTERY_DS2760=m
+ CONFIG_POWER_RESET=y
+ CONFIG_POWER_RESET_GPIO=y
+ CONFIG_HWMON=m
++CONFIG_SENSORS_LM75=m
+ CONFIG_SENSORS_SHT21=m
+ CONFIG_SENSORS_SHTC1=m
+ CONFIG_THERMAL=y
+++ /dev/null
-From bc27882bfefac9a1596aaed387ac01a844765e6c Mon Sep 17 00:00:00 2001
-From: Robert Foss <robert.foss@collabora.com>
-Date: Tue, 3 May 2016 13:48:20 -0400
-Subject: [PATCH] drm/vc4: Return -EBUSY if there's already a pending flip
- event.
-
-As per the documentation in drm_crtc.h, atomic_commit should return
--EBUSY if an asynchronous update is requested and there is an earlier
-update pending.
-
-v2: Rebase on the s/async/nonblock/ change.
-
-Signed-off-by: Robert Foss <robert.foss@collabora.com>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit e7c31f6f25b84fed961dc0dce6248878527693ae)
----
- drivers/gpu/drm/vc4/vc4_kms.c | 16 ++++++++++++----
- 1 file changed, 12 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_kms.c
-+++ b/drivers/gpu/drm/vc4/vc4_kms.c
-@@ -119,10 +119,18 @@ static int vc4_atomic_commit(struct drm_
- return -ENOMEM;
-
- /* Make sure that any outstanding modesets have finished. */
-- ret = down_interruptible(&vc4->async_modeset);
-- if (ret) {
-- kfree(c);
-- return ret;
-+ if (nonblock) {
-+ ret = down_trylock(&vc4->async_modeset);
-+ if (ret) {
-+ kfree(c);
-+ return -EBUSY;
-+ }
-+ } else {
-+ ret = down_interruptible(&vc4->async_modeset);
-+ if (ret) {
-+ kfree(c);
-+ return ret;
-+ }
- }
-
- ret = drm_atomic_helper_prepare_planes(dev, state);
+++ /dev/null
-From a770137c882b00d89888e007cd1f0a44475c2b60 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 12 Aug 2016 17:12:32 +0100
-Subject: [PATCH] config: Enable SENSORS_LM75
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -642,6 +642,7 @@ CONFIG_BATTERY_DS2760=m
- CONFIG_POWER_RESET=y
- CONFIG_POWER_RESET_GPIO=y
- CONFIG_HWMON=m
-+CONFIG_SENSORS_LM75=m
- CONFIG_SENSORS_SHT21=m
- CONFIG_SENSORS_SHTC1=m
- CONFIG_THERMAL=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -634,6 +634,7 @@ CONFIG_BATTERY_DS2760=m
- CONFIG_POWER_RESET=y
- CONFIG_POWER_RESET_GPIO=y
- CONFIG_HWMON=m
-+CONFIG_SENSORS_LM75=m
- CONFIG_SENSORS_SHT21=m
- CONFIG_SENSORS_SHTC1=m
- CONFIG_THERMAL=y
--- /dev/null
+From 13b2f5f451a4660a1a2bd788ac60381296db81fc Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 12 Aug 2016 17:00:18 +0100
+Subject: [PATCH] config: Enable SERIAL_SC16IS7XX
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -600,6 +600,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=0
+ CONFIG_SERIAL_AMBA_PL011=y
+ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+ CONFIG_SERIAL_OF_PLATFORM=y
++CONFIG_SERIAL_SC16IS7XX=m
+ CONFIG_TTY_PRINTK=y
+ CONFIG_HW_RANDOM=y
+ CONFIG_RAW_DRIVER=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -593,6 +593,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=0
+ CONFIG_SERIAL_AMBA_PL011=y
+ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+ CONFIG_SERIAL_OF_PLATFORM=y
++CONFIG_SERIAL_SC16IS7XX=m
+ CONFIG_TTY_PRINTK=y
+ CONFIG_HW_RANDOM=y
+ CONFIG_RAW_DRIVER=y
+++ /dev/null
-From d64a1deaa6da4663cbd148e9a047f069d99c14f5 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 12 Aug 2016 17:00:18 +0100
-Subject: [PATCH] config: Enable SERIAL_SC16IS7XX
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -600,6 +600,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=0
- CONFIG_SERIAL_AMBA_PL011=y
- CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
- CONFIG_SERIAL_OF_PLATFORM=y
-+CONFIG_SERIAL_SC16IS7XX=m
- CONFIG_TTY_PRINTK=y
- CONFIG_HW_RANDOM=y
- CONFIG_RAW_DRIVER=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -593,6 +593,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=0
- CONFIG_SERIAL_AMBA_PL011=y
- CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
- CONFIG_SERIAL_OF_PLATFORM=y
-+CONFIG_SERIAL_SC16IS7XX=m
- CONFIG_TTY_PRINTK=y
- CONFIG_HW_RANDOM=y
- CONFIG_RAW_DRIVER=y
--- /dev/null
+From f491fbf4315a1d4a7210450f835a6fe93880cd5b Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 12 Aug 2016 15:46:21 +0100
+Subject: [PATCH] snd-bcm2835: Don't allow responses from VC to be interrupted
+ by user signals
+
+There should always be a response, and retry after a signal interruption is not handled, so don't report
+we are interruptible.
+
+See: https://github.com/raspberrypi/linux/issues/1560
+---
+ sound/arm/bcm2835-vchiq.c | 25 ++++++-------------------
+ 1 file changed, 6 insertions(+), 19 deletions(-)
+
+--- a/sound/arm/bcm2835-vchiq.c
++++ b/sound/arm/bcm2835-vchiq.c
+@@ -511,12 +511,7 @@ static int bcm2835_audio_set_ctls_chan(b
+ }
+
+ /* We are expecting a reply from the videocore */
+- ret = wait_for_completion_interruptible(&instance->msg_avail_comp);
+- if (ret) {
+- LOG_DBG("%s: failed on waiting for event (status=%d)\n",
+- __func__, success);
+- goto unlock;
+- }
++ wait_for_completion(&instance->msg_avail_comp);
+
+ if (instance->result != 0) {
+ LOG_ERR("%s: result=%d\n", __func__, instance->result);
+@@ -615,12 +610,7 @@ int bcm2835_audio_set_params(bcm2835_als
+ }
+
+ /* We are expecting a reply from the videocore */
+- ret = wait_for_completion_interruptible(&instance->msg_avail_comp);
+- if (ret) {
+- LOG_DBG("%s: failed on waiting for event (status=%d)\n",
+- __func__, success);
+- goto unlock;
+- }
++ wait_for_completion(&instance->msg_avail_comp);
+
+ if (instance->result != 0) {
+ LOG_ERR("%s: result=%d", __func__, instance->result);
+@@ -761,14 +751,11 @@ int bcm2835_audio_close(bcm2835_alsa_str
+ goto unlock;
+ }
+
+- ret = wait_for_completion_interruptible(&instance->msg_avail_comp);
+- if (ret) {
+- LOG_DBG("%s: failed on waiting for event (status=%d)\n",
+- __func__, success);
+- goto unlock;
+- }
++ /* We are expecting a reply from the videocore */
++ wait_for_completion(&instance->msg_avail_comp);
++
+ if (instance->result != 0) {
+- LOG_ERR("%s: failed result (status=%d)\n",
++ LOG_ERR("%s: failed result (result=%d)\n",
+ __func__, instance->result);
+
+ ret = -1;
--- /dev/null
+From 1a2dbddc5d2792170b1788f6a30aede54c409f72 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Aug 2016 10:15:34 -0700
+Subject: [PATCH] BCM270X: Connect V3D to its power domain.
+
+We were doing this with manual firmware calls before, but to backport
+runtime PM we want to be using a proper power domain.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -366,6 +366,7 @@
+ v3d: v3d@7ec00000 {
+ compatible = "brcm,vc4-v3d";
+ reg = <0x7ec00000 0x1000>;
++ power-domains = <&power RPI_POWER_DOMAIN_V3D>;
+ status = "disabled";
+ };
+
+++ /dev/null
-From 385eb363335dfe4120643ea72f3060fce745b5b7 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 12 Aug 2016 15:46:21 +0100
-Subject: [PATCH] snd-bcm2835: Don't allow responses from VC to be interrupted
- by user signals
-
-There should always be a response, and retry after a signal interruption is not handled, so don't report
-we are interruptible.
-
-See: https://github.com/raspberrypi/linux/issues/1560
----
- sound/arm/bcm2835-vchiq.c | 25 ++++++-------------------
- 1 file changed, 6 insertions(+), 19 deletions(-)
-
---- a/sound/arm/bcm2835-vchiq.c
-+++ b/sound/arm/bcm2835-vchiq.c
-@@ -511,12 +511,7 @@ static int bcm2835_audio_set_ctls_chan(b
- }
-
- /* We are expecting a reply from the videocore */
-- ret = wait_for_completion_interruptible(&instance->msg_avail_comp);
-- if (ret) {
-- LOG_DBG("%s: failed on waiting for event (status=%d)\n",
-- __func__, success);
-- goto unlock;
-- }
-+ wait_for_completion(&instance->msg_avail_comp);
-
- if (instance->result != 0) {
- LOG_ERR("%s: result=%d\n", __func__, instance->result);
-@@ -615,12 +610,7 @@ int bcm2835_audio_set_params(bcm2835_als
- }
-
- /* We are expecting a reply from the videocore */
-- ret = wait_for_completion_interruptible(&instance->msg_avail_comp);
-- if (ret) {
-- LOG_DBG("%s: failed on waiting for event (status=%d)\n",
-- __func__, success);
-- goto unlock;
-- }
-+ wait_for_completion(&instance->msg_avail_comp);
-
- if (instance->result != 0) {
- LOG_ERR("%s: result=%d", __func__, instance->result);
-@@ -761,14 +751,11 @@ int bcm2835_audio_close(bcm2835_alsa_str
- goto unlock;
- }
-
-- ret = wait_for_completion_interruptible(&instance->msg_avail_comp);
-- if (ret) {
-- LOG_DBG("%s: failed on waiting for event (status=%d)\n",
-- __func__, success);
-- goto unlock;
-- }
-+ /* We are expecting a reply from the videocore */
-+ wait_for_completion(&instance->msg_avail_comp);
-+
- if (instance->result != 0) {
-- LOG_ERR("%s: failed result (status=%d)\n",
-+ LOG_ERR("%s: failed result (result=%d)\n",
- __func__, instance->result);
-
- ret = -1;
+++ /dev/null
-From 1337324cc06c008a9d65b15328a96b21ab675113 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Aug 2016 10:15:34 -0700
-Subject: [PATCH] BCM270X: Connect V3D to its power domain.
-
-We were doing this with manual firmware calls before, but to backport
-runtime PM we want to be using a proper power domain.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -366,6 +366,7 @@
- v3d: v3d@7ec00000 {
- compatible = "brcm,vc4-v3d";
- reg = <0x7ec00000 0x1000>;
-+ power-domains = <&power RPI_POWER_DOMAIN_V3D>;
- status = "disabled";
- };
-
--- /dev/null
+From 70eecf52df7082d1b3bcc698de2de1b6ce31be08 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 5 Feb 2016 17:41:49 -0800
+Subject: [PATCH] drm/vc4: Enable runtime PM.
+
+This may actually get us a feature that the closed driver didn't have:
+turning off the GPU in between rendering jobs, while the V3D device is
+still opened by the client.
+
+There may be some tuning to be applied here to use autosuspend so that
+we don't bounce the device's power so much, but in steady-state
+GPU-bound rendering we keep the power on (since we keep multiple jobs
+outstanding) and even if we power cycle on every job we can still
+manage at least 680 fps.
+
+More importantly, though, runtime PM will allow us to power off the
+device to do a GPU reset.
+
+v2: Switch #ifdef to CONFIG_PM not CONFIG_PM_SLEEP (caught by kbuild
+ test robot)
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 001bdb55d9eb72a9e2d5b623bacfc52da74ae03e)
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 1 +
+ drivers/gpu/drm/vc4/vc4_gem.c | 10 ++++++++
+ drivers/gpu/drm/vc4/vc4_v3d.c | 59 ++++++++++++++++++++++++++-----------------
+ 3 files changed, 47 insertions(+), 23 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -155,6 +155,7 @@ struct vc4_seqno_cb {
+ };
+
+ struct vc4_v3d {
++ struct vc4_dev *vc4;
+ struct platform_device *pdev;
+ void __iomem *regs;
+ };
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -23,6 +23,7 @@
+
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
+ #include <linux/device.h>
+ #include <linux/io.h>
+
+@@ -689,6 +690,7 @@ fail:
+ static void
+ vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec)
+ {
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ unsigned i;
+
+ /* Need the struct lock for drm_gem_object_unreference(). */
+@@ -707,6 +709,8 @@ vc4_complete_exec(struct drm_device *dev
+ }
+ mutex_unlock(&dev->struct_mutex);
+
++ pm_runtime_put(&vc4->v3d->pdev->dev);
++
+ kfree(exec);
+ }
+
+@@ -860,6 +864,12 @@ vc4_submit_cl_ioctl(struct drm_device *d
+ return -ENOMEM;
+ }
+
++ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ if (ret < 0) {
++ kfree(exec);
++ return ret;
++ }
++
+ exec->args = args;
+ INIT_LIST_HEAD(&exec->unref_list);
+
+--- a/drivers/gpu/drm/vc4/vc4_v3d.c
++++ b/drivers/gpu/drm/vc4/vc4_v3d.c
+@@ -17,7 +17,7 @@
+ */
+
+ #include "linux/component.h"
+-#include "soc/bcm2835/raspberrypi-firmware.h"
++#include "linux/pm_runtime.h"
+ #include "vc4_drv.h"
+ #include "vc4_regs.h"
+
+@@ -145,22 +145,6 @@ int vc4_v3d_debugfs_ident(struct seq_fil
+ }
+ #endif /* CONFIG_DEBUG_FS */
+
+-/*
+- * Asks the firmware to turn on power to the V3D engine.
+- *
+- * This may be doable with just the clocks interface, though this
+- * packet does some other register setup from the firmware, too.
+- */
+-int
+-vc4_v3d_set_power(struct vc4_dev *vc4, bool on)
+-{
+- u32 packet = on;
+-
+- return rpi_firmware_property(vc4->firmware,
+- RPI_FIRMWARE_SET_ENABLE_QPU,
+- &packet, sizeof(packet));
+-}
+-
+ static void vc4_v3d_init_hw(struct drm_device *dev)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+@@ -172,6 +156,29 @@ static void vc4_v3d_init_hw(struct drm_d
+ V3D_WRITE(V3D_VPMBASE, 0);
+ }
+
++#ifdef CONFIG_PM
++static int vc4_v3d_runtime_suspend(struct device *dev)
++{
++ struct vc4_v3d *v3d = dev_get_drvdata(dev);
++ struct vc4_dev *vc4 = v3d->vc4;
++
++ vc4_irq_uninstall(vc4->dev);
++
++ return 0;
++}
++
++static int vc4_v3d_runtime_resume(struct device *dev)
++{
++ struct vc4_v3d *v3d = dev_get_drvdata(dev);
++ struct vc4_dev *vc4 = v3d->vc4;
++
++ vc4_v3d_init_hw(vc4->dev);
++ vc4_irq_postinstall(vc4->dev);
++
++ return 0;
++}
++#endif
++
+ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
+ {
+ struct platform_device *pdev = to_platform_device(dev);
+@@ -184,6 +191,8 @@ static int vc4_v3d_bind(struct device *d
+ if (!v3d)
+ return -ENOMEM;
+
++ dev_set_drvdata(dev, v3d);
++
+ v3d->pdev = pdev;
+
+ v3d->regs = vc4_ioremap_regs(pdev, 0);
+@@ -191,10 +200,7 @@ static int vc4_v3d_bind(struct device *d
+ return PTR_ERR(v3d->regs);
+
+ vc4->v3d = v3d;
+-
+- ret = vc4_v3d_set_power(vc4, true);
+- if (ret)
+- return ret;
++ v3d->vc4 = vc4;
+
+ if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) {
+ DRM_ERROR("V3D_IDENT0 read 0x%08x instead of 0x%08x\n",
+@@ -216,6 +222,8 @@ static int vc4_v3d_bind(struct device *d
+ return ret;
+ }
+
++ pm_runtime_enable(dev);
++
+ return 0;
+ }
+
+@@ -225,6 +233,8 @@ static void vc4_v3d_unbind(struct device
+ struct drm_device *drm = dev_get_drvdata(master);
+ struct vc4_dev *vc4 = to_vc4_dev(drm);
+
++ pm_runtime_disable(dev);
++
+ drm_irq_uninstall(drm);
+
+ /* Disable the binner's overflow memory address, so the next
+@@ -234,11 +244,13 @@ static void vc4_v3d_unbind(struct device
+ V3D_WRITE(V3D_BPOA, 0);
+ V3D_WRITE(V3D_BPOS, 0);
+
+- vc4_v3d_set_power(vc4, false);
+-
+ vc4->v3d = NULL;
+ }
+
++static const struct dev_pm_ops vc4_v3d_pm_ops = {
++ SET_RUNTIME_PM_OPS(vc4_v3d_runtime_suspend, vc4_v3d_runtime_resume, NULL)
++};
++
+ static const struct component_ops vc4_v3d_ops = {
+ .bind = vc4_v3d_bind,
+ .unbind = vc4_v3d_unbind,
+@@ -267,5 +279,6 @@ struct platform_driver vc4_v3d_driver =
+ .driver = {
+ .name = "vc4_v3d",
+ .of_match_table = vc4_v3d_dt_match,
++ .pm = &vc4_v3d_pm_ops,
+ },
+ };
--- /dev/null
+From 264c236d49fb92d3d1e47a2a246f92c94be8a9c7 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Aug 2016 10:45:04 -0700
+Subject: [PATCH] drm/vc4: Drop firmware node getting now that we use the power
+ domain.
+
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 10 ----------
+ drivers/gpu/drm/vc4/vc4_drv.h | 1 -
+ 2 files changed, 11 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -15,7 +15,6 @@
+ #include <linux/module.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+-#include <soc/bcm2835/raspberrypi-firmware.h>
+ #include "drm_fb_cma_helper.h"
+
+ #include "uapi/drm/vc4_drm.h"
+@@ -204,7 +203,6 @@ static int vc4_drm_bind(struct device *d
+ struct drm_device *drm;
+ struct drm_connector *connector;
+ struct vc4_dev *vc4;
+- struct device_node *firmware_node;
+ int ret = 0;
+
+ dev->coherent_dma_mask = DMA_BIT_MASK(32);
+@@ -213,14 +211,6 @@ static int vc4_drm_bind(struct device *d
+ if (!vc4)
+ return -ENOMEM;
+
+- firmware_node = of_parse_phandle(dev->of_node, "firmware", 0);
+- vc4->firmware = rpi_firmware_get(firmware_node);
+- if (!vc4->firmware) {
+- DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n");
+- return -EPROBE_DEFER;
+- }
+- of_node_put(firmware_node);
+-
+ drm = drm_dev_alloc(&vc4_drm_driver, dev);
+ if (!drm)
+ return -ENOMEM;
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -23,7 +23,6 @@ struct vc4_dev {
+ struct vc4_dsi *dsi1;
+
+ struct drm_fbdev_cma *fbdev;
+- struct rpi_firmware *firmware;
+
+ struct vc4_hang_state *hang_state;
+
+++ /dev/null
-From 02a0346c7f8159cb0930ff153bf2cb3b1f1a7a79 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 5 Feb 2016 17:41:49 -0800
-Subject: [PATCH] drm/vc4: Enable runtime PM.
-
-This may actually get us a feature that the closed driver didn't have:
-turning off the GPU in between rendering jobs, while the V3D device is
-still opened by the client.
-
-There may be some tuning to be applied here to use autosuspend so that
-we don't bounce the device's power so much, but in steady-state
-GPU-bound rendering we keep the power on (since we keep multiple jobs
-outstanding) and even if we power cycle on every job we can still
-manage at least 680 fps.
-
-More importantly, though, runtime PM will allow us to power off the
-device to do a GPU reset.
-
-v2: Switch #ifdef to CONFIG_PM not CONFIG_PM_SLEEP (caught by kbuild
- test robot)
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 001bdb55d9eb72a9e2d5b623bacfc52da74ae03e)
----
- drivers/gpu/drm/vc4/vc4_drv.h | 1 +
- drivers/gpu/drm/vc4/vc4_gem.c | 10 ++++++++
- drivers/gpu/drm/vc4/vc4_v3d.c | 59 ++++++++++++++++++++++++++-----------------
- 3 files changed, 47 insertions(+), 23 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -155,6 +155,7 @@ struct vc4_seqno_cb {
- };
-
- struct vc4_v3d {
-+ struct vc4_dev *vc4;
- struct platform_device *pdev;
- void __iomem *regs;
- };
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -23,6 +23,7 @@
-
- #include <linux/module.h>
- #include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
- #include <linux/device.h>
- #include <linux/io.h>
-
-@@ -689,6 +690,7 @@ fail:
- static void
- vc4_complete_exec(struct drm_device *dev, struct vc4_exec_info *exec)
- {
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
- unsigned i;
-
- /* Need the struct lock for drm_gem_object_unreference(). */
-@@ -707,6 +709,8 @@ vc4_complete_exec(struct drm_device *dev
- }
- mutex_unlock(&dev->struct_mutex);
-
-+ pm_runtime_put(&vc4->v3d->pdev->dev);
-+
- kfree(exec);
- }
-
-@@ -860,6 +864,12 @@ vc4_submit_cl_ioctl(struct drm_device *d
- return -ENOMEM;
- }
-
-+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ if (ret < 0) {
-+ kfree(exec);
-+ return ret;
-+ }
-+
- exec->args = args;
- INIT_LIST_HEAD(&exec->unref_list);
-
---- a/drivers/gpu/drm/vc4/vc4_v3d.c
-+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
-@@ -17,7 +17,7 @@
- */
-
- #include "linux/component.h"
--#include "soc/bcm2835/raspberrypi-firmware.h"
-+#include "linux/pm_runtime.h"
- #include "vc4_drv.h"
- #include "vc4_regs.h"
-
-@@ -145,22 +145,6 @@ int vc4_v3d_debugfs_ident(struct seq_fil
- }
- #endif /* CONFIG_DEBUG_FS */
-
--/*
-- * Asks the firmware to turn on power to the V3D engine.
-- *
-- * This may be doable with just the clocks interface, though this
-- * packet does some other register setup from the firmware, too.
-- */
--int
--vc4_v3d_set_power(struct vc4_dev *vc4, bool on)
--{
-- u32 packet = on;
--
-- return rpi_firmware_property(vc4->firmware,
-- RPI_FIRMWARE_SET_ENABLE_QPU,
-- &packet, sizeof(packet));
--}
--
- static void vc4_v3d_init_hw(struct drm_device *dev)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-@@ -172,6 +156,29 @@ static void vc4_v3d_init_hw(struct drm_d
- V3D_WRITE(V3D_VPMBASE, 0);
- }
-
-+#ifdef CONFIG_PM
-+static int vc4_v3d_runtime_suspend(struct device *dev)
-+{
-+ struct vc4_v3d *v3d = dev_get_drvdata(dev);
-+ struct vc4_dev *vc4 = v3d->vc4;
-+
-+ vc4_irq_uninstall(vc4->dev);
-+
-+ return 0;
-+}
-+
-+static int vc4_v3d_runtime_resume(struct device *dev)
-+{
-+ struct vc4_v3d *v3d = dev_get_drvdata(dev);
-+ struct vc4_dev *vc4 = v3d->vc4;
-+
-+ vc4_v3d_init_hw(vc4->dev);
-+ vc4_irq_postinstall(vc4->dev);
-+
-+ return 0;
-+}
-+#endif
-+
- static int vc4_v3d_bind(struct device *dev, struct device *master, void *data)
- {
- struct platform_device *pdev = to_platform_device(dev);
-@@ -184,6 +191,8 @@ static int vc4_v3d_bind(struct device *d
- if (!v3d)
- return -ENOMEM;
-
-+ dev_set_drvdata(dev, v3d);
-+
- v3d->pdev = pdev;
-
- v3d->regs = vc4_ioremap_regs(pdev, 0);
-@@ -191,10 +200,7 @@ static int vc4_v3d_bind(struct device *d
- return PTR_ERR(v3d->regs);
-
- vc4->v3d = v3d;
--
-- ret = vc4_v3d_set_power(vc4, true);
-- if (ret)
-- return ret;
-+ v3d->vc4 = vc4;
-
- if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) {
- DRM_ERROR("V3D_IDENT0 read 0x%08x instead of 0x%08x\n",
-@@ -216,6 +222,8 @@ static int vc4_v3d_bind(struct device *d
- return ret;
- }
-
-+ pm_runtime_enable(dev);
-+
- return 0;
- }
-
-@@ -225,6 +233,8 @@ static void vc4_v3d_unbind(struct device
- struct drm_device *drm = dev_get_drvdata(master);
- struct vc4_dev *vc4 = to_vc4_dev(drm);
-
-+ pm_runtime_disable(dev);
-+
- drm_irq_uninstall(drm);
-
- /* Disable the binner's overflow memory address, so the next
-@@ -234,11 +244,13 @@ static void vc4_v3d_unbind(struct device
- V3D_WRITE(V3D_BPOA, 0);
- V3D_WRITE(V3D_BPOS, 0);
-
-- vc4_v3d_set_power(vc4, false);
--
- vc4->v3d = NULL;
- }
-
-+static const struct dev_pm_ops vc4_v3d_pm_ops = {
-+ SET_RUNTIME_PM_OPS(vc4_v3d_runtime_suspend, vc4_v3d_runtime_resume, NULL)
-+};
-+
- static const struct component_ops vc4_v3d_ops = {
- .bind = vc4_v3d_bind,
- .unbind = vc4_v3d_unbind,
-@@ -267,5 +279,6 @@ struct platform_driver vc4_v3d_driver =
- .driver = {
- .name = "vc4_v3d",
- .of_match_table = vc4_v3d_dt_match,
-+ .pm = &vc4_v3d_pm_ops,
- },
- };
+++ /dev/null
-From f83b96d75cab6d19376dcb9f49ebd870a8f73b69 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Aug 2016 10:45:04 -0700
-Subject: [PATCH] drm/vc4: Drop firmware node getting now that we use the power
- domain.
-
----
- drivers/gpu/drm/vc4/vc4_drv.c | 10 ----------
- drivers/gpu/drm/vc4/vc4_drv.h | 1 -
- 2 files changed, 11 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -15,7 +15,6 @@
- #include <linux/module.h>
- #include <linux/of_platform.h>
- #include <linux/platform_device.h>
--#include <soc/bcm2835/raspberrypi-firmware.h>
- #include "drm_fb_cma_helper.h"
-
- #include "uapi/drm/vc4_drm.h"
-@@ -204,7 +203,6 @@ static int vc4_drm_bind(struct device *d
- struct drm_device *drm;
- struct drm_connector *connector;
- struct vc4_dev *vc4;
-- struct device_node *firmware_node;
- int ret = 0;
-
- dev->coherent_dma_mask = DMA_BIT_MASK(32);
-@@ -213,14 +211,6 @@ static int vc4_drm_bind(struct device *d
- if (!vc4)
- return -ENOMEM;
-
-- firmware_node = of_parse_phandle(dev->of_node, "firmware", 0);
-- vc4->firmware = rpi_firmware_get(firmware_node);
-- if (!vc4->firmware) {
-- DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n");
-- return -EPROBE_DEFER;
-- }
-- of_node_put(firmware_node);
--
- drm = drm_dev_alloc(&vc4_drm_driver, dev);
- if (!drm)
- return -ENOMEM;
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -23,7 +23,6 @@ struct vc4_dev {
- struct vc4_dsi *dsi1;
-
- struct drm_fbdev_cma *fbdev;
-- struct rpi_firmware *firmware;
-
- struct vc4_hang_state *hang_state;
-
--- /dev/null
+From 7aa7785c89ccb0203b5eb9a3b26d5358cb2543c0 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 8 Feb 2016 12:59:02 -0800
+Subject: [PATCH] drm/vc4: Use runtime PM to power cycle the device when the
+ GPU hangs.
+
+This gets us functional GPU reset again, like we had until a refactor
+at merge time. Tested with a little patch to stuff in a broken binner
+job every 100 frames.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 36cb6253f9383fd9a59ee7b8458c6232ef48577c)
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 6 +++++-
+ drivers/gpu/drm/vc4/vc4_gem.c | 26 +++++++++++++++++++++-----
+ 2 files changed, 26 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -104,6 +104,11 @@ struct vc4_dev {
+ struct vc4_bo *overflow_mem;
+ struct work_struct overflow_mem_work;
+
++ int power_refcount;
++
++ /* Mutex controlling the power refcount. */
++ struct mutex power_lock;
++
+ struct {
+ struct timer_list timer;
+ struct work_struct reset_work;
+@@ -495,7 +500,6 @@ void vc4_plane_async_set_fb(struct drm_p
+ extern struct platform_driver vc4_v3d_driver;
+ int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused);
+ int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused);
+-int vc4_v3d_set_power(struct vc4_dev *vc4, bool on);
+
+ /* vc4_validate.c */
+ int
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -261,8 +261,16 @@ vc4_reset(struct drm_device *dev)
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
+ DRM_INFO("Resetting GPU.\n");
+- vc4_v3d_set_power(vc4, false);
+- vc4_v3d_set_power(vc4, true);
++
++ mutex_lock(&vc4->power_lock);
++ if (vc4->power_refcount) {
++ /* Power the device off and back on the by dropping the
++ * reference on runtime PM.
++ */
++ pm_runtime_put_sync_suspend(&vc4->v3d->pdev->dev);
++ pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ }
++ mutex_unlock(&vc4->power_lock);
+
+ vc4_irq_reset(dev);
+
+@@ -709,7 +717,10 @@ vc4_complete_exec(struct drm_device *dev
+ }
+ mutex_unlock(&dev->struct_mutex);
+
+- pm_runtime_put(&vc4->v3d->pdev->dev);
++ mutex_lock(&vc4->power_lock);
++ if (--vc4->power_refcount == 0)
++ pm_runtime_put(&vc4->v3d->pdev->dev);
++ mutex_unlock(&vc4->power_lock);
+
+ kfree(exec);
+ }
+@@ -851,7 +862,7 @@ vc4_submit_cl_ioctl(struct drm_device *d
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct drm_vc4_submit_cl *args = data;
+ struct vc4_exec_info *exec;
+- int ret;
++ int ret = 0;
+
+ if ((args->flags & ~VC4_SUBMIT_CL_USE_CLEAR_COLOR) != 0) {
+ DRM_ERROR("Unknown flags: 0x%02x\n", args->flags);
+@@ -864,7 +875,10 @@ vc4_submit_cl_ioctl(struct drm_device *d
+ return -ENOMEM;
+ }
+
+- ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ mutex_lock(&vc4->power_lock);
++ if (vc4->power_refcount++ == 0)
++ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ mutex_unlock(&vc4->power_lock);
+ if (ret < 0) {
+ kfree(exec);
+ return ret;
+@@ -925,6 +939,8 @@ vc4_gem_init(struct drm_device *dev)
+ (unsigned long)dev);
+
+ INIT_WORK(&vc4->job_done_work, vc4_job_done_work);
++
++ mutex_init(&vc4->power_lock);
+ }
+
+ void
--- /dev/null
+From 0b79cabd8b947db3b60904d6516776660af4247b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Aug 2016 10:55:53 -0700
+Subject: [PATCH] drm/panel: Drop debug printf from the Raspberry Pi
+ touchscreen.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
++++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
+@@ -106,7 +106,6 @@ struct regdump {
+ static int rpi_touchscreen_disable(struct drm_panel *panel)
+ {
+ struct rpi_touchscreen *ts = panel_to_ts(panel);
+- pr_err("disable\n");
+
+ if (!ts->enabled)
+ return 0;
+++ /dev/null
-From e70d1a5fdbb7277490c273533ce535977326c6a5 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 8 Feb 2016 12:59:02 -0800
-Subject: [PATCH] drm/vc4: Use runtime PM to power cycle the device when the
- GPU hangs.
-
-This gets us functional GPU reset again, like we had until a refactor
-at merge time. Tested with a little patch to stuff in a broken binner
-job every 100 frames.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 36cb6253f9383fd9a59ee7b8458c6232ef48577c)
----
- drivers/gpu/drm/vc4/vc4_drv.h | 6 +++++-
- drivers/gpu/drm/vc4/vc4_gem.c | 26 +++++++++++++++++++++-----
- 2 files changed, 26 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -104,6 +104,11 @@ struct vc4_dev {
- struct vc4_bo *overflow_mem;
- struct work_struct overflow_mem_work;
-
-+ int power_refcount;
-+
-+ /* Mutex controlling the power refcount. */
-+ struct mutex power_lock;
-+
- struct {
- struct timer_list timer;
- struct work_struct reset_work;
-@@ -495,7 +500,6 @@ void vc4_plane_async_set_fb(struct drm_p
- extern struct platform_driver vc4_v3d_driver;
- int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused);
- int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused);
--int vc4_v3d_set_power(struct vc4_dev *vc4, bool on);
-
- /* vc4_validate.c */
- int
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -261,8 +261,16 @@ vc4_reset(struct drm_device *dev)
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-
- DRM_INFO("Resetting GPU.\n");
-- vc4_v3d_set_power(vc4, false);
-- vc4_v3d_set_power(vc4, true);
-+
-+ mutex_lock(&vc4->power_lock);
-+ if (vc4->power_refcount) {
-+ /* Power the device off and back on the by dropping the
-+ * reference on runtime PM.
-+ */
-+ pm_runtime_put_sync_suspend(&vc4->v3d->pdev->dev);
-+ pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ }
-+ mutex_unlock(&vc4->power_lock);
-
- vc4_irq_reset(dev);
-
-@@ -709,7 +717,10 @@ vc4_complete_exec(struct drm_device *dev
- }
- mutex_unlock(&dev->struct_mutex);
-
-- pm_runtime_put(&vc4->v3d->pdev->dev);
-+ mutex_lock(&vc4->power_lock);
-+ if (--vc4->power_refcount == 0)
-+ pm_runtime_put(&vc4->v3d->pdev->dev);
-+ mutex_unlock(&vc4->power_lock);
-
- kfree(exec);
- }
-@@ -851,7 +862,7 @@ vc4_submit_cl_ioctl(struct drm_device *d
- struct vc4_dev *vc4 = to_vc4_dev(dev);
- struct drm_vc4_submit_cl *args = data;
- struct vc4_exec_info *exec;
-- int ret;
-+ int ret = 0;
-
- if ((args->flags & ~VC4_SUBMIT_CL_USE_CLEAR_COLOR) != 0) {
- DRM_ERROR("Unknown flags: 0x%02x\n", args->flags);
-@@ -864,7 +875,10 @@ vc4_submit_cl_ioctl(struct drm_device *d
- return -ENOMEM;
- }
-
-- ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ mutex_lock(&vc4->power_lock);
-+ if (vc4->power_refcount++ == 0)
-+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ mutex_unlock(&vc4->power_lock);
- if (ret < 0) {
- kfree(exec);
- return ret;
-@@ -925,6 +939,8 @@ vc4_gem_init(struct drm_device *dev)
- (unsigned long)dev);
-
- INIT_WORK(&vc4->job_done_work, vc4_job_done_work);
-+
-+ mutex_init(&vc4->power_lock);
- }
-
- void
+++ /dev/null
-From 7cac96392a51584d864291e08aeda97f9ee3e384 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Aug 2016 10:55:53 -0700
-Subject: [PATCH] drm/panel: Drop debug printf from the Raspberry Pi
- touchscreen.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
-+++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
-@@ -106,7 +106,6 @@ struct regdump {
- static int rpi_touchscreen_disable(struct drm_panel *panel)
- {
- struct rpi_touchscreen *ts = panel_to_ts(panel);
-- pr_err("disable\n");
-
- if (!ts->enabled)
- return 0;
--- /dev/null
+From 2a12837fa5ce42d748662fe8fcfd486df98a3513 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Aug 2016 10:57:41 -0700
+Subject: [PATCH] drm/vc4: Replace HDMI force-connected with an EDID probe.
+
+The force-connected started out because I didn't know how to read the
+HPD pin successfully, which required the hpd_active_low check and
+getting the correct active level into the DTs. It stayed because we
+don't have the Pi3's HPD line exposed to Linux, so this was the only
+way to bring up graphics on it.
+
+However, with the DSI panel support now present, users want to be able
+to run DSI-only systems, and forcing HDMI on is interfering with
+default screen configurations. Work around the Pi3's missing HPD by
+probing the DDC on I2C and see if it's present at all.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -166,8 +166,6 @@ vc4_hdmi_connector_detect(struct drm_con
+ struct drm_device *dev = connector->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
+- return connector_status_connected;
+-
+ if (vc4->hdmi->hpd_gpio) {
+ if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
+ vc4->hdmi->hpd_active_low)
+@@ -176,6 +174,9 @@ vc4_hdmi_connector_detect(struct drm_con
+ return connector_status_disconnected;
+ }
+
++ if (drm_probe_ddc(vc4->hdmi->ddc))
++ return connector_status_connected;
++
+ if (HDMI_READ(VC4_HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED)
+ return connector_status_connected;
+ else
+++ /dev/null
-From 05352a2959d8924a6333726cd15144245d7c98fa Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Aug 2016 10:57:41 -0700
-Subject: [PATCH] drm/vc4: Replace HDMI force-connected with an EDID probe.
-
-The force-connected started out because I didn't know how to read the
-HPD pin successfully, which required the hpd_active_low check and
-getting the correct active level into the DTs. It stayed because we
-don't have the Pi3's HPD line exposed to Linux, so this was the only
-way to bring up graphics on it.
-
-However, with the DSI panel support now present, users want to be able
-to run DSI-only systems, and forcing HDMI on is interfering with
-default screen configurations. Work around the Pi3's missing HPD by
-probing the DDC on I2C and see if it's present at all.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_hdmi.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_hdmi.c
-+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -166,8 +166,6 @@ vc4_hdmi_connector_detect(struct drm_con
- struct drm_device *dev = connector->dev;
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-
-- return connector_status_connected;
--
- if (vc4->hdmi->hpd_gpio) {
- if (gpio_get_value_cansleep(vc4->hdmi->hpd_gpio) ^
- vc4->hdmi->hpd_active_low)
-@@ -176,6 +174,9 @@ vc4_hdmi_connector_detect(struct drm_con
- return connector_status_disconnected;
- }
-
-+ if (drm_probe_ddc(vc4->hdmi->ddc))
-+ return connector_status_connected;
-+
- if (HDMI_READ(VC4_HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED)
- return connector_status_connected;
- else
--- /dev/null
+From 4f4509e88313b05862de58f529712bc20a164871 Mon Sep 17 00:00:00 2001
+From: Michael Heimpold <mhei@heimpold.de>
+Date: Thu, 28 Apr 2016 22:06:15 +0200
+Subject: [PATCH] net: ethernet: enc28j60: add device tree support
+
+(Upstream commit 2dd355a007e44960ec049c75920ddb6778fec9ee)
+
+The following patch adds the required match table for device tree support
+(and while at, fix the indent). It's also possible to specify the
+MAC address in the DT blob.
+
+Also add the corresponding binding documentation file.
+
+Signed-off-by: Michael Heimpold <mhei@heimpold.de>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ .../devicetree/bindings/net/microchip,enc28j60.txt | 59 ++++++++++++++++++++++
+ drivers/net/ethernet/microchip/enc28j60.c | 21 +++++---
+ 2 files changed, 73 insertions(+), 7 deletions(-)
+ create mode 100644 Documentation/devicetree/bindings/net/microchip,enc28j60.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
+@@ -0,0 +1,59 @@
++* Microchip ENC28J60
++
++This is a standalone 10 MBit ethernet controller with SPI interface.
++
++For each device connected to a SPI bus, define a child node within
++the SPI master node.
++
++Required properties:
++- compatible: Should be "microchip,enc28j60"
++- reg: Specify the SPI chip select the ENC28J60 is wired to
++- interrupt-parent: Specify the phandle of the source interrupt, see interrupt
++ binding documentation for details. Usually this is the GPIO bank
++ the interrupt line is wired to.
++- interrupts: Specify the interrupt index within the interrupt controller (referred
++ to above in interrupt-parent) and interrupt type. The ENC28J60 natively
++ generates falling edge interrupts, however, additional board logic
++ might invert the signal.
++- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
++- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
++ see also generic and your platform specific pinctrl binding
++ documentation.
++
++Optional properties:
++- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
++ According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
++ board designs may need to limit this value.
++- local-mac-address: See ethernet.txt in the same directory.
++
++
++Example (for NXP i.MX28 with pin control stuff for GPIO irq):
++
++ ssp2: ssp@80014000 {
++ compatible = "fsl,imx28-spi";
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
++ status = "okay";
++
++ enc28j60: ethernet@0 {
++ compatible = "microchip,enc28j60";
++ pinctrl-names = "default";
++ pinctrl-0 = <&enc28j60_pins>;
++ reg = <0>;
++ interrupt-parent = <&gpio3>;
++ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++ spi-max-frequency = <12000000>;
++ };
++ };
++
++ pinctrl@80018000 {
++ enc28j60_pins: enc28j60_pins@0 {
++ reg = <0>;
++ fsl,pinmux-ids = <
++ MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
++ >;
++ fsl,drive-strength = <MXS_DRIVE_4mA>;
++ fsl,voltage = <MXS_VOLTAGE_HIGH>;
++ fsl,pull-up = <MXS_PULL_DISABLE>;
++ };
++ };
+--- a/drivers/net/ethernet/microchip/enc28j60.c
++++ b/drivers/net/ethernet/microchip/enc28j60.c
+@@ -28,11 +28,12 @@
+ #include <linux/skbuff.h>
+ #include <linux/delay.h>
+ #include <linux/spi/spi.h>
++#include <linux/of_net.h>
+
+ #include "enc28j60_hw.h"
+
+ #define DRV_NAME "enc28j60"
+-#define DRV_VERSION "1.01"
++#define DRV_VERSION "1.02"
+
+ #define SPI_OPLEN 1
+
+@@ -1544,6 +1545,7 @@ static int enc28j60_probe(struct spi_dev
+ {
+ struct net_device *dev;
+ struct enc28j60_net *priv;
++ const void *macaddr;
+ int ret = 0;
+
+ if (netif_msg_drv(&debug))
+@@ -1575,7 +1577,12 @@ static int enc28j60_probe(struct spi_dev
+ ret = -EIO;
+ goto error_irq;
+ }
+- eth_hw_addr_random(dev);
++
++ macaddr = of_get_mac_address(spi->dev.of_node);
++ if (macaddr)
++ ether_addr_copy(dev->dev_addr, macaddr);
++ else
++ eth_hw_addr_random(dev);
+ enc28j60_set_hw_macaddr(dev);
+
+ /* Board setup must set the relevant edge trigger type;
+@@ -1630,16 +1637,16 @@ static int enc28j60_remove(struct spi_de
+ return 0;
+ }
+
+-static const struct of_device_id enc28j60_of_match[] = {
+- { .compatible = "microchip,enc28j60", },
++static const struct of_device_id enc28j60_dt_ids[] = {
++ { .compatible = "microchip,enc28j60" },
+ { /* sentinel */ }
+ };
+-MODULE_DEVICE_TABLE(of, enc28j60_of_match);
++MODULE_DEVICE_TABLE(of, enc28j60_dt_ids);
+
+ static struct spi_driver enc28j60_driver = {
+ .driver = {
+- .name = DRV_NAME,
+- .of_match_table = enc28j60_of_match,
++ .name = DRV_NAME,
++ .of_match_table = enc28j60_dt_ids,
+ },
+ .probe = enc28j60_probe,
+ .remove = enc28j60_remove,
--- /dev/null
+From edfa1131e425e0dafe9561fee792a0d319fa734e Mon Sep 17 00:00:00 2001
+From: Sergio Valverde <sergio.valverde@hpe.com>
+Date: Fri, 1 Jul 2016 11:44:30 -0600
+Subject: [PATCH] enc28j60: Fix race condition in enc28j60 driver
+
+(Upstream commit 373819ec391de0d11f63b10b2fb69ef2854236ca)
+
+The interrupt worker code for the enc28j60 relies only on the TXIF flag to
+determinate if the packet transmission was completed. However the datasheet
+specifies in section 12.1.3 that TXERIF will clear the TXRTS after a
+transmit abort. Also in section 12.1.4 that TXIF will be set
+when TXRTS transitions from '1' to '0'. Therefore the TXIF flag is enabled
+during transmission errors.
+
+This causes a race condition, since the worker code will invoke
+enc28j60_tx_clear() -> netif_wake_queue(), potentially invoking the
+ndo_start_xmit function to send a new packet. The enc28j60_send_packet function
+uses a workqueue that invokes enc28j60_hw_tx(). In between this function is
+called, the worker from the interrupt handler will enter the path for error
+handler because of the TXERIF flag, causing to invoke enc28j60_tx_clear() again
+and releasing the packet scheduled for transmission, causing a kernel crash with
+due a NULL pointer.
+
+These crashes due a NULL pointer were observed under stress conditions of the
+device. A BUG_ON() sequence was used to validate the issue was fixed, and has
+been running without problems for 2 years now.
+
+Signed-off-by: Diego Dompe <dompe@hpe.com>
+Acked-by: Sergio Valverde <sergio.valverde@hpe.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/microchip/enc28j60.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/ethernet/microchip/enc28j60.c
++++ b/drivers/net/ethernet/microchip/enc28j60.c
+@@ -1147,7 +1147,8 @@ static void enc28j60_irq_work_handler(st
+ enc28j60_phy_read(priv, PHIR);
+ }
+ /* TX complete handler */
+- if ((intflags & EIR_TXIF) != 0) {
++ if (((intflags & EIR_TXIF) != 0) &&
++ ((intflags & EIR_TXERIF) == 0)) {
+ bool err = false;
+ loop++;
+ if (netif_msg_intr(priv))
+@@ -1199,7 +1200,7 @@ static void enc28j60_irq_work_handler(st
+ enc28j60_tx_clear(ndev, true);
+ } else
+ enc28j60_tx_clear(ndev, true);
+- locked_reg_bfclr(priv, EIR, EIR_TXERIF);
++ locked_reg_bfclr(priv, EIR, EIR_TXERIF | EIR_TXIF);
+ }
+ /* RX Error handler */
+ if ((intflags & EIR_RXERIF) != 0) {
+@@ -1234,6 +1235,8 @@ static void enc28j60_irq_work_handler(st
+ */
+ static void enc28j60_hw_tx(struct enc28j60_net *priv)
+ {
++ BUG_ON(!priv->tx_skb);
++
+ if (netif_msg_tx_queued(priv))
+ printk(KERN_DEBUG DRV_NAME
+ ": Tx Packet Len:%d\n", priv->tx_skb->len);
+++ /dev/null
-From 55d0ce46f962a768dd358ca26158c8c195988645 Mon Sep 17 00:00:00 2001
-From: Michael Heimpold <mhei@heimpold.de>
-Date: Thu, 28 Apr 2016 22:06:15 +0200
-Subject: [PATCH] net: ethernet: enc28j60: add device tree support
-
-(Upstream commit 2dd355a007e44960ec049c75920ddb6778fec9ee)
-
-The following patch adds the required match table for device tree support
-(and while at, fix the indent). It's also possible to specify the
-MAC address in the DT blob.
-
-Also add the corresponding binding documentation file.
-
-Signed-off-by: Michael Heimpold <mhei@heimpold.de>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- .../devicetree/bindings/net/microchip,enc28j60.txt | 59 ++++++++++++++++++++++
- drivers/net/ethernet/microchip/enc28j60.c | 21 +++++---
- 2 files changed, 73 insertions(+), 7 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/net/microchip,enc28j60.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
-@@ -0,0 +1,59 @@
-+* Microchip ENC28J60
-+
-+This is a standalone 10 MBit ethernet controller with SPI interface.
-+
-+For each device connected to a SPI bus, define a child node within
-+the SPI master node.
-+
-+Required properties:
-+- compatible: Should be "microchip,enc28j60"
-+- reg: Specify the SPI chip select the ENC28J60 is wired to
-+- interrupt-parent: Specify the phandle of the source interrupt, see interrupt
-+ binding documentation for details. Usually this is the GPIO bank
-+ the interrupt line is wired to.
-+- interrupts: Specify the interrupt index within the interrupt controller (referred
-+ to above in interrupt-parent) and interrupt type. The ENC28J60 natively
-+ generates falling edge interrupts, however, additional board logic
-+ might invert the signal.
-+- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
-+- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
-+ see also generic and your platform specific pinctrl binding
-+ documentation.
-+
-+Optional properties:
-+- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
-+ According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
-+ board designs may need to limit this value.
-+- local-mac-address: See ethernet.txt in the same directory.
-+
-+
-+Example (for NXP i.MX28 with pin control stuff for GPIO irq):
-+
-+ ssp2: ssp@80014000 {
-+ compatible = "fsl,imx28-spi";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
-+ status = "okay";
-+
-+ enc28j60: ethernet@0 {
-+ compatible = "microchip,enc28j60";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&enc28j60_pins>;
-+ reg = <0>;
-+ interrupt-parent = <&gpio3>;
-+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+ spi-max-frequency = <12000000>;
-+ };
-+ };
-+
-+ pinctrl@80018000 {
-+ enc28j60_pins: enc28j60_pins@0 {
-+ reg = <0>;
-+ fsl,pinmux-ids = <
-+ MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
-+ >;
-+ fsl,drive-strength = <MXS_DRIVE_4mA>;
-+ fsl,voltage = <MXS_VOLTAGE_HIGH>;
-+ fsl,pull-up = <MXS_PULL_DISABLE>;
-+ };
-+ };
---- a/drivers/net/ethernet/microchip/enc28j60.c
-+++ b/drivers/net/ethernet/microchip/enc28j60.c
-@@ -28,11 +28,12 @@
- #include <linux/skbuff.h>
- #include <linux/delay.h>
- #include <linux/spi/spi.h>
-+#include <linux/of_net.h>
-
- #include "enc28j60_hw.h"
-
- #define DRV_NAME "enc28j60"
--#define DRV_VERSION "1.01"
-+#define DRV_VERSION "1.02"
-
- #define SPI_OPLEN 1
-
-@@ -1544,6 +1545,7 @@ static int enc28j60_probe(struct spi_dev
- {
- struct net_device *dev;
- struct enc28j60_net *priv;
-+ const void *macaddr;
- int ret = 0;
-
- if (netif_msg_drv(&debug))
-@@ -1575,7 +1577,12 @@ static int enc28j60_probe(struct spi_dev
- ret = -EIO;
- goto error_irq;
- }
-- eth_hw_addr_random(dev);
-+
-+ macaddr = of_get_mac_address(spi->dev.of_node);
-+ if (macaddr)
-+ ether_addr_copy(dev->dev_addr, macaddr);
-+ else
-+ eth_hw_addr_random(dev);
- enc28j60_set_hw_macaddr(dev);
-
- /* Board setup must set the relevant edge trigger type;
-@@ -1630,16 +1637,16 @@ static int enc28j60_remove(struct spi_de
- return 0;
- }
-
--static const struct of_device_id enc28j60_of_match[] = {
-- { .compatible = "microchip,enc28j60", },
-+static const struct of_device_id enc28j60_dt_ids[] = {
-+ { .compatible = "microchip,enc28j60" },
- { /* sentinel */ }
- };
--MODULE_DEVICE_TABLE(of, enc28j60_of_match);
-+MODULE_DEVICE_TABLE(of, enc28j60_dt_ids);
-
- static struct spi_driver enc28j60_driver = {
- .driver = {
-- .name = DRV_NAME,
-- .of_match_table = enc28j60_of_match,
-+ .name = DRV_NAME,
-+ .of_match_table = enc28j60_dt_ids,
- },
- .probe = enc28j60_probe,
- .remove = enc28j60_remove,
--- /dev/null
+From 06ccc9945b198d9d1daeda7a7c09825c084ad6f1 Mon Sep 17 00:00:00 2001
+From: James Adams <james@raspberrypi.org>
+Date: Fri, 12 Aug 2016 14:35:00 +0100
+Subject: [PATCH] Add cm3 dts file
+
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 176 ++++++++++++++++++++++++++++++++++
+ 2 files changed, 177 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rp
+ dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb
+ dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb
+ dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
++dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-cm3.dtb
+
+ # Raspberry Pi
+ ifeq ($(CONFIG_ARCH_BCM2708),y)
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
+@@ -0,0 +1,176 @@
++/dts-v1/;
++
++#include "bcm2710.dtsi"
++
++/ {
++ compatible = "brcm,bcm2710","brcm,bcm2709";
++ model = "Raspberry Pi Compute Module 3";
++};
++
++&gpio {
++
++ mmc_pins: mmc_pins {
++ brcm,pins = <48 49 50 51 52 53>;
++ brcm,function = <7>; /* alt3 */
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ uart0_pins: uart0_pins {
++ brcm,pins;
++ brcm,function;
++ brcm,pull = <0 2>;
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins;
++ brcm,function;
++ };
++};
++
++&mmc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&mmc_pins>;
++ non-removable;
++ bus-width = <4>;
++ status = "okay";
++ brcm,overclock-50 = <0>;
++};
++
++&soc {
++ virtgpio: virtgpio {
++ compatible = "brcm,bcm2835-virtgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++};
++
++&fb {
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins>;
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev@0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <500000>;
++ };
++
++ spidev1: spidev@1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <500000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ #sound-dai-cells = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&random {
++ status = "okay";
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&virtgpio 0 0>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ uart0 = <&uart0>,"status";
++ uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
++ uart1 = <&uart1>,"status";
++ i2s = <&i2s>,"status";
++ spi = <&spi0>,"status";
++ i2c0 = <&i2c0>,"status";
++ i2c1 = <&i2c1>,"status";
++ i2c2_iknowwhatimdoing = <&i2c2>,"status";
++ i2c0_baudrate = <&i2c0>,"clock-frequency:0";
++ i2c1_baudrate = <&i2c1>,"clock-frequency:0";
++ i2c2_baudrate = <&i2c2>,"clock-frequency:0";
++ core_freq = <&clk_core>,"clock-frequency:0";
++
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++
++ audio = <&audio>,"status";
++ watchdog = <&watchdog>,"status";
++ random = <&random>,"status";
++ sd_overclock = <&sdhost>,"brcm,overclock-50:0";
++ sd_force_pio = <&sdhost>,"brcm,force-pio?";
++ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
++ sd_debug = <&sdhost>,"brcm,debug";
++ };
++};
+++ /dev/null
-From 2f1038fb16442e7285c6a4da47c56d1967ab05da Mon Sep 17 00:00:00 2001
-From: Sergio Valverde <sergio.valverde@hpe.com>
-Date: Fri, 1 Jul 2016 11:44:30 -0600
-Subject: [PATCH] enc28j60: Fix race condition in enc28j60 driver
-
-(Upstream commit 373819ec391de0d11f63b10b2fb69ef2854236ca)
-
-The interrupt worker code for the enc28j60 relies only on the TXIF flag to
-determinate if the packet transmission was completed. However the datasheet
-specifies in section 12.1.3 that TXERIF will clear the TXRTS after a
-transmit abort. Also in section 12.1.4 that TXIF will be set
-when TXRTS transitions from '1' to '0'. Therefore the TXIF flag is enabled
-during transmission errors.
-
-This causes a race condition, since the worker code will invoke
-enc28j60_tx_clear() -> netif_wake_queue(), potentially invoking the
-ndo_start_xmit function to send a new packet. The enc28j60_send_packet function
-uses a workqueue that invokes enc28j60_hw_tx(). In between this function is
-called, the worker from the interrupt handler will enter the path for error
-handler because of the TXERIF flag, causing to invoke enc28j60_tx_clear() again
-and releasing the packet scheduled for transmission, causing a kernel crash with
-due a NULL pointer.
-
-These crashes due a NULL pointer were observed under stress conditions of the
-device. A BUG_ON() sequence was used to validate the issue was fixed, and has
-been running without problems for 2 years now.
-
-Signed-off-by: Diego Dompe <dompe@hpe.com>
-Acked-by: Sergio Valverde <sergio.valverde@hpe.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/microchip/enc28j60.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/microchip/enc28j60.c
-+++ b/drivers/net/ethernet/microchip/enc28j60.c
-@@ -1147,7 +1147,8 @@ static void enc28j60_irq_work_handler(st
- enc28j60_phy_read(priv, PHIR);
- }
- /* TX complete handler */
-- if ((intflags & EIR_TXIF) != 0) {
-+ if (((intflags & EIR_TXIF) != 0) &&
-+ ((intflags & EIR_TXERIF) == 0)) {
- bool err = false;
- loop++;
- if (netif_msg_intr(priv))
-@@ -1199,7 +1200,7 @@ static void enc28j60_irq_work_handler(st
- enc28j60_tx_clear(ndev, true);
- } else
- enc28j60_tx_clear(ndev, true);
-- locked_reg_bfclr(priv, EIR, EIR_TXERIF);
-+ locked_reg_bfclr(priv, EIR, EIR_TXERIF | EIR_TXIF);
- }
- /* RX Error handler */
- if ((intflags & EIR_RXERIF) != 0) {
-@@ -1234,6 +1235,8 @@ static void enc28j60_irq_work_handler(st
- */
- static void enc28j60_hw_tx(struct enc28j60_net *priv)
- {
-+ BUG_ON(!priv->tx_skb);
-+
- if (netif_msg_tx_queued(priv))
- printk(KERN_DEBUG DRV_NAME
- ": Tx Packet Len:%d\n", priv->tx_skb->len);
+++ /dev/null
-From 22af0da1539b63a5dc49cc03d28a726027e2d688 Mon Sep 17 00:00:00 2001
-From: James Adams <james@raspberrypi.org>
-Date: Fri, 12 Aug 2016 14:35:00 +0100
-Subject: [PATCH] Add cm3 dts file
-
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 176 ++++++++++++++++++++++++++++++++++
- 2 files changed, 177 insertions(+)
- create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rp
- dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb
- dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb
- dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
-+dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-cm3.dtb
-
- # Raspberry Pi
- ifeq ($(CONFIG_ARCH_BCM2708),y)
---- /dev/null
-+++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
-@@ -0,0 +1,176 @@
-+/dts-v1/;
-+
-+#include "bcm2710.dtsi"
-+
-+/ {
-+ compatible = "brcm,bcm2710","brcm,bcm2709";
-+ model = "Raspberry Pi Compute Module 3";
-+};
-+
-+&gpio {
-+
-+ mmc_pins: mmc_pins {
-+ brcm,pins = <48 49 50 51 52 53>;
-+ brcm,function = <7>; /* alt3 */
-+ brcm,pull = <0 2 2 2 2 2>;
-+ };
-+
-+ spi0_pins: spi0_pins {
-+ brcm,pins = <9 10 11>;
-+ brcm,function = <4>; /* alt0 */
-+ };
-+
-+ spi0_cs_pins: spi0_cs_pins {
-+ brcm,pins = <8 7>;
-+ brcm,function = <1>; /* output */
-+ };
-+
-+ i2c0_pins: i2c0 {
-+ brcm,pins = <0 1>;
-+ brcm,function = <4>;
-+ };
-+
-+ i2c1_pins: i2c1 {
-+ brcm,pins = <2 3>;
-+ brcm,function = <4>;
-+ };
-+
-+ i2s_pins: i2s {
-+ brcm,pins = <18 19 20 21>;
-+ brcm,function = <4>; /* alt0 */
-+ };
-+
-+ uart0_pins: uart0_pins {
-+ brcm,pins;
-+ brcm,function;
-+ brcm,pull = <0 2>;
-+ };
-+
-+ audio_pins: audio_pins {
-+ brcm,pins;
-+ brcm,function;
-+ };
-+};
-+
-+&mmc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc_pins>;
-+ non-removable;
-+ bus-width = <4>;
-+ status = "okay";
-+ brcm,overclock-50 = <0>;
-+};
-+
-+&soc {
-+ virtgpio: virtgpio {
-+ compatible = "brcm,bcm2835-virtgpio";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ firmware = <&firmware>;
-+ status = "okay";
-+ };
-+};
-+
-+&fb {
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins>;
-+ status = "okay";
-+};
-+
-+&spi0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
-+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
-+
-+ spidev0: spidev@0{
-+ compatible = "spidev";
-+ reg = <0>; /* CE0 */
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ spi-max-frequency = <500000>;
-+ };
-+
-+ spidev1: spidev@1{
-+ compatible = "spidev";
-+ reg = <1>; /* CE1 */
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ spi-max-frequency = <500000>;
-+ };
-+};
-+
-+&i2c0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c0_pins>;
-+ clock-frequency = <100000>;
-+};
-+
-+&i2c1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2c1_pins>;
-+ clock-frequency = <100000>;
-+};
-+
-+&i2c2 {
-+ clock-frequency = <100000>;
-+};
-+
-+&i2s {
-+ #sound-dai-cells = <0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&i2s_pins>;
-+};
-+
-+&random {
-+ status = "okay";
-+};
-+
-+&leds {
-+ act_led: act {
-+ label = "led0";
-+ linux,default-trigger = "mmc0";
-+ gpios = <&virtgpio 0 0>;
-+ };
-+};
-+
-+&hdmi {
-+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
-+};
-+
-+&audio {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&audio_pins>;
-+};
-+
-+/ {
-+ __overrides__ {
-+ uart0 = <&uart0>,"status";
-+ uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
-+ uart1 = <&uart1>,"status";
-+ i2s = <&i2s>,"status";
-+ spi = <&spi0>,"status";
-+ i2c0 = <&i2c0>,"status";
-+ i2c1 = <&i2c1>,"status";
-+ i2c2_iknowwhatimdoing = <&i2c2>,"status";
-+ i2c0_baudrate = <&i2c0>,"clock-frequency:0";
-+ i2c1_baudrate = <&i2c1>,"clock-frequency:0";
-+ i2c2_baudrate = <&i2c2>,"clock-frequency:0";
-+ core_freq = <&clk_core>,"clock-frequency:0";
-+
-+ act_led_gpio = <&act_led>,"gpios:4";
-+ act_led_activelow = <&act_led>,"gpios:8";
-+ act_led_trigger = <&act_led>,"linux,default-trigger";
-+
-+ audio = <&audio>,"status";
-+ watchdog = <&watchdog>,"status";
-+ random = <&random>,"status";
-+ sd_overclock = <&sdhost>,"brcm,overclock-50:0";
-+ sd_force_pio = <&sdhost>,"brcm,force-pio?";
-+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
-+ sd_debug = <&sdhost>,"brcm,debug";
-+ };
-+};
--- /dev/null
+From 9b01aef9d4187db3f256f349e6d148bbf1aad28b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 15 Aug 2016 10:08:58 -0700
+Subject: [PATCH] BCM270X: Drop HPD setting from the common dtsi.
+
+The HPD is quite board-specific, so we need to set it in the per-board
+DT.
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -347,7 +347,6 @@
+ reg = <0x7e902000 0x600>,
+ <0x7e808000 0x100>;
+ ddc = <&i2c2>;
+- hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
+ clocks = <&cprman BCM2835_PLLH_PIX>,
+ <&cprman BCM2835_CLOCK_HSM>;
+ clock-names = "pixel", "hdmi";
+++ /dev/null
-From 8f7b6b3db2ffcec68137e671c158c705241e1009 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 15 Aug 2016 10:08:58 -0700
-Subject: [PATCH] BCM270X: Drop HPD setting from the common dtsi.
-
-The HPD is quite board-specific, so we need to set it in the per-board
-DT.
----
- arch/arm/boot/dts/bcm2708_common.dtsi | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/arch/arm/boot/dts/bcm2708_common.dtsi
-+++ b/arch/arm/boot/dts/bcm2708_common.dtsi
-@@ -347,7 +347,6 @@
- reg = <0x7e902000 0x600>,
- <0x7e808000 0x100>;
- ddc = <&i2c2>;
-- hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
- clocks = <&cprman BCM2835_PLLH_PIX>,
- <&cprman BCM2835_CLOCK_HSM>;
- clock-names = "pixel", "hdmi";
--- /dev/null
+From a2cf6abba42a5b95cda76929c8681d18e97152a0 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 12 Aug 2016 11:02:14 -0700
+Subject: [PATCH] BCM2710: Drop incorrect HDMI HPD line from the DT.
+
+It's actually off on the GPIO expander, which I don't think we have
+access to.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
+@@ -166,10 +166,6 @@
+ };
+ };
+
+-&hdmi {
+- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+-};
+-
+ &audio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&audio_pins>;
+++ /dev/null
-From 5bdac7f7f6e6d9938da0d6bd0d58a136cf29515b Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 12 Aug 2016 11:02:14 -0700
-Subject: [PATCH] BCM2710: Drop incorrect HDMI HPD line from the DT.
-
-It's actually off on the GPIO expander, which I don't think we have
-access to.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 4 ----
- 1 file changed, 4 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
-+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
-@@ -166,10 +166,6 @@
- };
- };
-
--&hdmi {
-- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
--};
--
- &audio {
- pinctrl-names = "default";
- pinctrl-0 = <&audio_pins>;
--- /dev/null
+From 03f4e4a6e625306671266db609b4f4d488b6cf6d Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 1 Jul 2016 13:10:38 -0700
+Subject: [PATCH] drm/vc4: Add a getparam ioctl for getting the V3D identity
+ regs.
+
+As I extend the driver to support different V3D revisions, userspace
+needs to know what version it's targeting. This is most easily
+detected using the V3D identity registers.
+
+v2: Make sure V3D is runtime PM on when reading the registers.
+v3: Switch to a 64-bit param value (suggested by Rob Clark in review)
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v2)
+Reviewed-by: Rob Clark <robdclark@gmail.com> (v3, over irc)
+(cherry picked from commit af713795c59fea36161a7debf97dbc10bf652cf7)
+
+v4: Squashed in "drm/vc4: Fix handling of a pm_runtime_get_sync() success case."
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 42 ++++++++++++++++++++++++++++++++++++++++++
+ include/uapi/drm/vc4_drm.h | 12 ++++++++++++
+ 2 files changed, 54 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -15,6 +15,7 @@
+ #include <linux/module.h>
+ #include <linux/of_platform.h>
+ #include <linux/platform_device.h>
++#include <linux/pm_runtime.h>
+ #include "drm_fb_cma_helper.h"
+
+ #include "uapi/drm/vc4_drm.h"
+@@ -64,6 +65,46 @@ void vc4_dump_regs32(const struct debugf
+ }
+ }
+
++static int vc4_get_param_ioctl(struct drm_device *dev, void *data,
++ struct drm_file *file_priv)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ struct drm_vc4_get_param *args = data;
++ int ret;
++
++ if (args->pad != 0)
++ return -EINVAL;
++
++ switch (args->param) {
++ case DRM_VC4_PARAM_V3D_IDENT0:
++ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ if (ret < 0)
++ return ret;
++ args->value = V3D_READ(V3D_IDENT0);
++ pm_runtime_put(&vc4->v3d->pdev->dev);
++ break;
++ case DRM_VC4_PARAM_V3D_IDENT1:
++ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ if (ret < 0)
++ return ret;
++ args->value = V3D_READ(V3D_IDENT1);
++ pm_runtime_put(&vc4->v3d->pdev->dev);
++ break;
++ case DRM_VC4_PARAM_V3D_IDENT2:
++ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
++ if (ret < 0)
++ return ret;
++ args->value = V3D_READ(V3D_IDENT2);
++ pm_runtime_put(&vc4->v3d->pdev->dev);
++ break;
++ default:
++ DRM_DEBUG("Unknown parameter %d\n", args->param);
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
+ static void vc4_lastclose(struct drm_device *dev)
+ {
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+@@ -95,6 +136,7 @@ static const struct drm_ioctl_desc vc4_d
+ DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
+ DRM_ROOT_ONLY),
++ DRM_IOCTL_DEF_DRV(VC4_GET_PARAM, vc4_get_param_ioctl, DRM_RENDER_ALLOW),
+ };
+
+ static struct drm_driver vc4_drm_driver = {
+--- a/include/uapi/drm/vc4_drm.h
++++ b/include/uapi/drm/vc4_drm.h
+@@ -37,6 +37,7 @@ extern "C" {
+ #define DRM_VC4_MMAP_BO 0x04
+ #define DRM_VC4_CREATE_SHADER_BO 0x05
+ #define DRM_VC4_GET_HANG_STATE 0x06
++#define DRM_VC4_GET_PARAM 0x07
+
+ #define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
+ #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
+@@ -45,6 +46,7 @@ extern "C" {
+ #define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo)
+ #define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo)
+ #define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state)
++#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param)
+
+ struct drm_vc4_submit_rcl_surface {
+ __u32 hindex; /* Handle index, or ~0 if not present. */
+@@ -280,6 +282,16 @@ struct drm_vc4_get_hang_state {
+ __u32 pad[16];
+ };
+
++#define DRM_VC4_PARAM_V3D_IDENT0 0
++#define DRM_VC4_PARAM_V3D_IDENT1 1
++#define DRM_VC4_PARAM_V3D_IDENT2 2
++
++struct drm_vc4_get_param {
++ __u32 param;
++ __u32 pad;
++ __u64 value;
++};
++
+ #if defined(__cplusplus)
+ }
+ #endif
+++ /dev/null
-From 35d17fc64d8612bfc019a9a6078647886fae783f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Fri, 1 Jul 2016 13:10:38 -0700
-Subject: [PATCH] drm/vc4: Add a getparam ioctl for getting the V3D identity
- regs.
-
-As I extend the driver to support different V3D revisions, userspace
-needs to know what version it's targeting. This is most easily
-detected using the V3D identity registers.
-
-v2: Make sure V3D is runtime PM on when reading the registers.
-v3: Switch to a 64-bit param value (suggested by Rob Clark in review)
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v2)
-Reviewed-by: Rob Clark <robdclark@gmail.com> (v3, over irc)
-(cherry picked from commit af713795c59fea36161a7debf97dbc10bf652cf7)
-
-v4: Squashed in "drm/vc4: Fix handling of a pm_runtime_get_sync() success case."
----
- drivers/gpu/drm/vc4/vc4_drv.c | 42 ++++++++++++++++++++++++++++++++++++++++++
- include/uapi/drm/vc4_drm.h | 12 ++++++++++++
- 2 files changed, 54 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -15,6 +15,7 @@
- #include <linux/module.h>
- #include <linux/of_platform.h>
- #include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
- #include "drm_fb_cma_helper.h"
-
- #include "uapi/drm/vc4_drm.h"
-@@ -64,6 +65,46 @@ void vc4_dump_regs32(const struct debugf
- }
- }
-
-+static int vc4_get_param_ioctl(struct drm_device *dev, void *data,
-+ struct drm_file *file_priv)
-+{
-+ struct vc4_dev *vc4 = to_vc4_dev(dev);
-+ struct drm_vc4_get_param *args = data;
-+ int ret;
-+
-+ if (args->pad != 0)
-+ return -EINVAL;
-+
-+ switch (args->param) {
-+ case DRM_VC4_PARAM_V3D_IDENT0:
-+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ if (ret < 0)
-+ return ret;
-+ args->value = V3D_READ(V3D_IDENT0);
-+ pm_runtime_put(&vc4->v3d->pdev->dev);
-+ break;
-+ case DRM_VC4_PARAM_V3D_IDENT1:
-+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ if (ret < 0)
-+ return ret;
-+ args->value = V3D_READ(V3D_IDENT1);
-+ pm_runtime_put(&vc4->v3d->pdev->dev);
-+ break;
-+ case DRM_VC4_PARAM_V3D_IDENT2:
-+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
-+ if (ret < 0)
-+ return ret;
-+ args->value = V3D_READ(V3D_IDENT2);
-+ pm_runtime_put(&vc4->v3d->pdev->dev);
-+ break;
-+ default:
-+ DRM_DEBUG("Unknown parameter %d\n", args->param);
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
- static void vc4_lastclose(struct drm_device *dev)
- {
- struct vc4_dev *vc4 = to_vc4_dev(dev);
-@@ -95,6 +136,7 @@ static const struct drm_ioctl_desc vc4_d
- DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
- DRM_ROOT_ONLY),
-+ DRM_IOCTL_DEF_DRV(VC4_GET_PARAM, vc4_get_param_ioctl, DRM_RENDER_ALLOW),
- };
-
- static struct drm_driver vc4_drm_driver = {
---- a/include/uapi/drm/vc4_drm.h
-+++ b/include/uapi/drm/vc4_drm.h
-@@ -37,6 +37,7 @@ extern "C" {
- #define DRM_VC4_MMAP_BO 0x04
- #define DRM_VC4_CREATE_SHADER_BO 0x05
- #define DRM_VC4_GET_HANG_STATE 0x06
-+#define DRM_VC4_GET_PARAM 0x07
-
- #define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
- #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
-@@ -45,6 +46,7 @@ extern "C" {
- #define DRM_IOCTL_VC4_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_MMAP_BO, struct drm_vc4_mmap_bo)
- #define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo)
- #define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state)
-+#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param)
-
- struct drm_vc4_submit_rcl_surface {
- __u32 hindex; /* Handle index, or ~0 if not present. */
-@@ -280,6 +282,16 @@ struct drm_vc4_get_hang_state {
- __u32 pad[16];
- };
-
-+#define DRM_VC4_PARAM_V3D_IDENT0 0
-+#define DRM_VC4_PARAM_V3D_IDENT1 1
-+#define DRM_VC4_PARAM_V3D_IDENT2 2
-+
-+struct drm_vc4_get_param {
-+ __u32 param;
-+ __u32 pad;
-+ __u64 value;
-+};
-+
- #if defined(__cplusplus)
- }
- #endif
--- /dev/null
+From 6af02628d1704bf16359696593246bbb78222363 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Sat, 2 Jul 2016 09:57:07 -0700
+Subject: [PATCH] drm/vc4: Move validation's current/max ip into the validation
+ struct.
+
+Reduces the argument count for some of the functions, and will be used
+more with the upcoming looping support.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit d0566c2a2f2baacefe1eb75be8a001fdd6fe84a3)
+---
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 54 +++++++++++++++++-------------
+ 1 file changed, 30 insertions(+), 24 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -40,6 +40,14 @@
+ #include "vc4_qpu_defines.h"
+
+ struct vc4_shader_validation_state {
++ /* Current IP being validated. */
++ uint32_t ip;
++
++ /* IP at the end of the BO, do not read shader[max_ip] */
++ uint32_t max_ip;
++
++ uint64_t *shader;
++
+ struct vc4_texture_sample_info tmu_setup[2];
+ int tmu_write_count[2];
+
+@@ -129,11 +137,11 @@ record_texture_sample(struct vc4_validat
+ }
+
+ static bool
+-check_tmu_write(uint64_t inst,
+- struct vc4_validated_shader_info *validated_shader,
++check_tmu_write(struct vc4_validated_shader_info *validated_shader,
+ struct vc4_shader_validation_state *validation_state,
+ bool is_mul)
+ {
++ uint64_t inst = validation_state->shader[validation_state->ip];
+ uint32_t waddr = (is_mul ?
+ QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
+ QPU_GET_FIELD(inst, QPU_WADDR_ADD));
+@@ -228,11 +236,11 @@ check_tmu_write(uint64_t inst,
+ }
+
+ static bool
+-check_reg_write(uint64_t inst,
+- struct vc4_validated_shader_info *validated_shader,
++check_reg_write(struct vc4_validated_shader_info *validated_shader,
+ struct vc4_shader_validation_state *validation_state,
+ bool is_mul)
+ {
++ uint64_t inst = validation_state->shader[validation_state->ip];
+ uint32_t waddr = (is_mul ?
+ QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
+ QPU_GET_FIELD(inst, QPU_WADDR_ADD));
+@@ -261,7 +269,7 @@ check_reg_write(uint64_t inst,
+ case QPU_W_TMU1_T:
+ case QPU_W_TMU1_R:
+ case QPU_W_TMU1_B:
+- return check_tmu_write(inst, validated_shader, validation_state,
++ return check_tmu_write(validated_shader, validation_state,
+ is_mul);
+
+ case QPU_W_HOST_INT:
+@@ -294,10 +302,10 @@ check_reg_write(uint64_t inst,
+ }
+
+ static void
+-track_live_clamps(uint64_t inst,
+- struct vc4_validated_shader_info *validated_shader,
++track_live_clamps(struct vc4_validated_shader_info *validated_shader,
+ struct vc4_shader_validation_state *validation_state)
+ {
++ uint64_t inst = validation_state->shader[validation_state->ip];
+ uint32_t op_add = QPU_GET_FIELD(inst, QPU_OP_ADD);
+ uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
+ uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
+@@ -369,10 +377,10 @@ track_live_clamps(uint64_t inst,
+ }
+
+ static bool
+-check_instruction_writes(uint64_t inst,
+- struct vc4_validated_shader_info *validated_shader,
++check_instruction_writes(struct vc4_validated_shader_info *validated_shader,
+ struct vc4_shader_validation_state *validation_state)
+ {
++ uint64_t inst = validation_state->shader[validation_state->ip];
+ uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
+ uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
+ bool ok;
+@@ -382,12 +390,10 @@ check_instruction_writes(uint64_t inst,
+ return false;
+ }
+
+- ok = (check_reg_write(inst, validated_shader, validation_state,
+- false) &&
+- check_reg_write(inst, validated_shader, validation_state,
+- true));
++ ok = (check_reg_write(validated_shader, validation_state, false) &&
++ check_reg_write(validated_shader, validation_state, true));
+
+- track_live_clamps(inst, validated_shader, validation_state);
++ track_live_clamps(validated_shader, validation_state);
+
+ return ok;
+ }
+@@ -417,30 +423,30 @@ vc4_validate_shader(struct drm_gem_cma_o
+ {
+ bool found_shader_end = false;
+ int shader_end_ip = 0;
+- uint32_t ip, max_ip;
+- uint64_t *shader;
++ uint32_t ip;
+ struct vc4_validated_shader_info *validated_shader;
+ struct vc4_shader_validation_state validation_state;
+ int i;
+
+ memset(&validation_state, 0, sizeof(validation_state));
++ validation_state.shader = shader_obj->vaddr;
++ validation_state.max_ip = shader_obj->base.size / sizeof(uint64_t);
+
+ for (i = 0; i < 8; i++)
+ validation_state.tmu_setup[i / 4].p_offset[i % 4] = ~0;
+ for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++)
+ validation_state.live_min_clamp_offsets[i] = ~0;
+
+- shader = shader_obj->vaddr;
+- max_ip = shader_obj->base.size / sizeof(uint64_t);
+-
+ validated_shader = kcalloc(1, sizeof(*validated_shader), GFP_KERNEL);
+ if (!validated_shader)
+ return NULL;
+
+- for (ip = 0; ip < max_ip; ip++) {
+- uint64_t inst = shader[ip];
++ for (ip = 0; ip < validation_state.max_ip; ip++) {
++ uint64_t inst = validation_state.shader[ip];
+ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
+
++ validation_state.ip = ip;
++
+ switch (sig) {
+ case QPU_SIG_NONE:
+ case QPU_SIG_WAIT_FOR_SCOREBOARD:
+@@ -450,7 +456,7 @@ vc4_validate_shader(struct drm_gem_cma_o
+ case QPU_SIG_LOAD_TMU1:
+ case QPU_SIG_PROG_END:
+ case QPU_SIG_SMALL_IMM:
+- if (!check_instruction_writes(inst, validated_shader,
++ if (!check_instruction_writes(validated_shader,
+ &validation_state)) {
+ DRM_ERROR("Bad write at ip %d\n", ip);
+ goto fail;
+@@ -467,7 +473,7 @@ vc4_validate_shader(struct drm_gem_cma_o
+ break;
+
+ case QPU_SIG_LOAD_IMM:
+- if (!check_instruction_writes(inst, validated_shader,
++ if (!check_instruction_writes(validated_shader,
+ &validation_state)) {
+ DRM_ERROR("Bad LOAD_IMM write at ip %d\n", ip);
+ goto fail;
+@@ -487,7 +493,7 @@ vc4_validate_shader(struct drm_gem_cma_o
+ break;
+ }
+
+- if (ip == max_ip) {
++ if (ip == validation_state.max_ip) {
+ DRM_ERROR("shader failed to terminate before "
+ "shader BO end at %zd\n",
+ shader_obj->base.size);
--- /dev/null
+From a2be1b8d84ab4ad9a1721fd67824f1e164d5862b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Sat, 2 Jul 2016 10:10:24 -0700
+Subject: [PATCH] drm/vc4: Add a bitmap of branch targets during shader
+ validation.
+
+This isn't used yet, it's just a first step toward loop validation.
+During the main parsing of instructions, we need to know when we hit a
+new basic block so that we can reset validated state.
+
+v2: Fix a stray semicolon after an if block. (caught by kbuild test).
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 93aa9ae3e5523e49e4e5abacd4dbee0e4ab2d931)
+---
+ drivers/gpu/drm/vc4/vc4_qpu_defines.h | 12 +++
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 114 ++++++++++++++++++++++++++++-
+ 2 files changed, 124 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_qpu_defines.h
++++ b/drivers/gpu/drm/vc4/vc4_qpu_defines.h
+@@ -230,6 +230,15 @@ enum qpu_unpack_r4 {
+ #define QPU_COND_MUL_SHIFT 46
+ #define QPU_COND_MUL_MASK QPU_MASK(48, 46)
+
++#define QPU_BRANCH_COND_SHIFT 52
++#define QPU_BRANCH_COND_MASK QPU_MASK(55, 52)
++
++#define QPU_BRANCH_REL ((uint64_t)1 << 51)
++#define QPU_BRANCH_REG ((uint64_t)1 << 50)
++
++#define QPU_BRANCH_RADDR_A_SHIFT 45
++#define QPU_BRANCH_RADDR_A_MASK QPU_MASK(49, 45)
++
+ #define QPU_SF ((uint64_t)1 << 45)
+
+ #define QPU_WADDR_ADD_SHIFT 38
+@@ -261,4 +270,7 @@ enum qpu_unpack_r4 {
+ #define QPU_OP_ADD_SHIFT 24
+ #define QPU_OP_ADD_MASK QPU_MASK(28, 24)
+
++#define QPU_BRANCH_TARGET_SHIFT 0
++#define QPU_BRANCH_TARGET_MASK QPU_MASK(31, 0)
++
+ #endif /* VC4_QPU_DEFINES_H */
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -59,6 +59,13 @@ struct vc4_shader_validation_state {
+ */
+ uint32_t live_min_clamp_offsets[32 + 32 + 4];
+ bool live_max_clamp_regs[32 + 32 + 4];
++
++ /* Bitfield of which IPs are used as branch targets.
++ *
++ * Used for validation that the uniform stream is updated at the right
++ * points and clearing the texturing/clamping state.
++ */
++ unsigned long *branch_targets;
+ };
+
+ static uint32_t
+@@ -418,13 +425,104 @@ check_instruction_reads(uint64_t inst,
+ return true;
+ }
+
++/* Make sure that all branches are absolute and point within the shader, and
++ * note their targets for later.
++ */
++static bool
++vc4_validate_branches(struct vc4_shader_validation_state *validation_state)
++{
++ uint32_t max_branch_target = 0;
++ bool found_shader_end = false;
++ int ip;
++ int shader_end_ip = 0;
++ int last_branch = -2;
++
++ for (ip = 0; ip < validation_state->max_ip; ip++) {
++ uint64_t inst = validation_state->shader[ip];
++ int32_t branch_imm = QPU_GET_FIELD(inst, QPU_BRANCH_TARGET);
++ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
++ uint32_t after_delay_ip = ip + 4;
++ uint32_t branch_target_ip;
++
++ if (sig == QPU_SIG_PROG_END) {
++ shader_end_ip = ip;
++ found_shader_end = true;
++ continue;
++ }
++
++ if (sig != QPU_SIG_BRANCH)
++ continue;
++
++ if (ip - last_branch < 4) {
++ DRM_ERROR("Branch at %d during delay slots\n", ip);
++ return false;
++ }
++ last_branch = ip;
++
++ if (inst & QPU_BRANCH_REG) {
++ DRM_ERROR("branching from register relative "
++ "not supported\n");
++ return false;
++ }
++
++ if (!(inst & QPU_BRANCH_REL)) {
++ DRM_ERROR("relative branching required\n");
++ return false;
++ }
++
++ /* The actual branch target is the instruction after the delay
++ * slots, plus whatever byte offset is in the low 32 bits of
++ * the instruction. Make sure we're not branching beyond the
++ * end of the shader object.
++ */
++ if (branch_imm % sizeof(inst) != 0) {
++ DRM_ERROR("branch target not aligned\n");
++ return false;
++ }
++
++ branch_target_ip = after_delay_ip + (branch_imm >> 3);
++ if (branch_target_ip >= validation_state->max_ip) {
++ DRM_ERROR("Branch at %d outside of shader (ip %d/%d)\n",
++ ip, branch_target_ip,
++ validation_state->max_ip);
++ return false;
++ }
++ set_bit(branch_target_ip, validation_state->branch_targets);
++
++ /* Make sure that the non-branching path is also not outside
++ * the shader.
++ */
++ if (after_delay_ip >= validation_state->max_ip) {
++ DRM_ERROR("Branch at %d continues past shader end "
++ "(%d/%d)\n",
++ ip, after_delay_ip, validation_state->max_ip);
++ return false;
++ }
++ set_bit(after_delay_ip, validation_state->branch_targets);
++ max_branch_target = max(max_branch_target, after_delay_ip);
++
++ /* There are two delay slots after program end is signaled
++ * that are still executed, then we're finished.
++ */
++ if (found_shader_end && ip == shader_end_ip + 2)
++ break;
++ }
++
++ if (max_branch_target > shader_end_ip) {
++ DRM_ERROR("Branch landed after QPU_SIG_PROG_END");
++ return false;
++ }
++
++ return true;
++}
++
+ struct vc4_validated_shader_info *
+ vc4_validate_shader(struct drm_gem_cma_object *shader_obj)
+ {
+ bool found_shader_end = false;
+ int shader_end_ip = 0;
+ uint32_t ip;
+- struct vc4_validated_shader_info *validated_shader;
++ struct vc4_validated_shader_info *validated_shader = NULL;
+ struct vc4_shader_validation_state validation_state;
+ int i;
+
+@@ -437,9 +535,18 @@ vc4_validate_shader(struct drm_gem_cma_o
+ for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++)
+ validation_state.live_min_clamp_offsets[i] = ~0;
+
++ validation_state.branch_targets =
++ kcalloc(BITS_TO_LONGS(validation_state.max_ip),
++ sizeof(unsigned long), GFP_KERNEL);
++ if (!validation_state.branch_targets)
++ goto fail;
++
+ validated_shader = kcalloc(1, sizeof(*validated_shader), GFP_KERNEL);
+ if (!validated_shader)
+- return NULL;
++ goto fail;
++
++ if (!vc4_validate_branches(&validation_state))
++ goto fail;
+
+ for (ip = 0; ip < validation_state.max_ip; ip++) {
+ uint64_t inst = validation_state.shader[ip];
+@@ -508,9 +615,12 @@ vc4_validate_shader(struct drm_gem_cma_o
+ (validated_shader->uniforms_size +
+ 4 * validated_shader->num_texture_samples);
+
++ kfree(validation_state.branch_targets);
++
+ return validated_shader;
+
+ fail:
++ kfree(validation_state.branch_targets);
+ if (validated_shader) {
+ kfree(validated_shader->texture_samples);
+ kfree(validated_shader);
+++ /dev/null
-From 71f1e833c8f76504921b3913d5a8da310318934f Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Sat, 2 Jul 2016 09:57:07 -0700
-Subject: [PATCH] drm/vc4: Move validation's current/max ip into the validation
- struct.
-
-Reduces the argument count for some of the functions, and will be used
-more with the upcoming looping support.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit d0566c2a2f2baacefe1eb75be8a001fdd6fe84a3)
----
- drivers/gpu/drm/vc4/vc4_validate_shaders.c | 54 +++++++++++++++++-------------
- 1 file changed, 30 insertions(+), 24 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-@@ -40,6 +40,14 @@
- #include "vc4_qpu_defines.h"
-
- struct vc4_shader_validation_state {
-+ /* Current IP being validated. */
-+ uint32_t ip;
-+
-+ /* IP at the end of the BO, do not read shader[max_ip] */
-+ uint32_t max_ip;
-+
-+ uint64_t *shader;
-+
- struct vc4_texture_sample_info tmu_setup[2];
- int tmu_write_count[2];
-
-@@ -129,11 +137,11 @@ record_texture_sample(struct vc4_validat
- }
-
- static bool
--check_tmu_write(uint64_t inst,
-- struct vc4_validated_shader_info *validated_shader,
-+check_tmu_write(struct vc4_validated_shader_info *validated_shader,
- struct vc4_shader_validation_state *validation_state,
- bool is_mul)
- {
-+ uint64_t inst = validation_state->shader[validation_state->ip];
- uint32_t waddr = (is_mul ?
- QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
- QPU_GET_FIELD(inst, QPU_WADDR_ADD));
-@@ -228,11 +236,11 @@ check_tmu_write(uint64_t inst,
- }
-
- static bool
--check_reg_write(uint64_t inst,
-- struct vc4_validated_shader_info *validated_shader,
-+check_reg_write(struct vc4_validated_shader_info *validated_shader,
- struct vc4_shader_validation_state *validation_state,
- bool is_mul)
- {
-+ uint64_t inst = validation_state->shader[validation_state->ip];
- uint32_t waddr = (is_mul ?
- QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
- QPU_GET_FIELD(inst, QPU_WADDR_ADD));
-@@ -261,7 +269,7 @@ check_reg_write(uint64_t inst,
- case QPU_W_TMU1_T:
- case QPU_W_TMU1_R:
- case QPU_W_TMU1_B:
-- return check_tmu_write(inst, validated_shader, validation_state,
-+ return check_tmu_write(validated_shader, validation_state,
- is_mul);
-
- case QPU_W_HOST_INT:
-@@ -294,10 +302,10 @@ check_reg_write(uint64_t inst,
- }
-
- static void
--track_live_clamps(uint64_t inst,
-- struct vc4_validated_shader_info *validated_shader,
-+track_live_clamps(struct vc4_validated_shader_info *validated_shader,
- struct vc4_shader_validation_state *validation_state)
- {
-+ uint64_t inst = validation_state->shader[validation_state->ip];
- uint32_t op_add = QPU_GET_FIELD(inst, QPU_OP_ADD);
- uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
- uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
-@@ -369,10 +377,10 @@ track_live_clamps(uint64_t inst,
- }
-
- static bool
--check_instruction_writes(uint64_t inst,
-- struct vc4_validated_shader_info *validated_shader,
-+check_instruction_writes(struct vc4_validated_shader_info *validated_shader,
- struct vc4_shader_validation_state *validation_state)
- {
-+ uint64_t inst = validation_state->shader[validation_state->ip];
- uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
- uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
- bool ok;
-@@ -382,12 +390,10 @@ check_instruction_writes(uint64_t inst,
- return false;
- }
-
-- ok = (check_reg_write(inst, validated_shader, validation_state,
-- false) &&
-- check_reg_write(inst, validated_shader, validation_state,
-- true));
-+ ok = (check_reg_write(validated_shader, validation_state, false) &&
-+ check_reg_write(validated_shader, validation_state, true));
-
-- track_live_clamps(inst, validated_shader, validation_state);
-+ track_live_clamps(validated_shader, validation_state);
-
- return ok;
- }
-@@ -417,30 +423,30 @@ vc4_validate_shader(struct drm_gem_cma_o
- {
- bool found_shader_end = false;
- int shader_end_ip = 0;
-- uint32_t ip, max_ip;
-- uint64_t *shader;
-+ uint32_t ip;
- struct vc4_validated_shader_info *validated_shader;
- struct vc4_shader_validation_state validation_state;
- int i;
-
- memset(&validation_state, 0, sizeof(validation_state));
-+ validation_state.shader = shader_obj->vaddr;
-+ validation_state.max_ip = shader_obj->base.size / sizeof(uint64_t);
-
- for (i = 0; i < 8; i++)
- validation_state.tmu_setup[i / 4].p_offset[i % 4] = ~0;
- for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++)
- validation_state.live_min_clamp_offsets[i] = ~0;
-
-- shader = shader_obj->vaddr;
-- max_ip = shader_obj->base.size / sizeof(uint64_t);
--
- validated_shader = kcalloc(1, sizeof(*validated_shader), GFP_KERNEL);
- if (!validated_shader)
- return NULL;
-
-- for (ip = 0; ip < max_ip; ip++) {
-- uint64_t inst = shader[ip];
-+ for (ip = 0; ip < validation_state.max_ip; ip++) {
-+ uint64_t inst = validation_state.shader[ip];
- uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
-
-+ validation_state.ip = ip;
-+
- switch (sig) {
- case QPU_SIG_NONE:
- case QPU_SIG_WAIT_FOR_SCOREBOARD:
-@@ -450,7 +456,7 @@ vc4_validate_shader(struct drm_gem_cma_o
- case QPU_SIG_LOAD_TMU1:
- case QPU_SIG_PROG_END:
- case QPU_SIG_SMALL_IMM:
-- if (!check_instruction_writes(inst, validated_shader,
-+ if (!check_instruction_writes(validated_shader,
- &validation_state)) {
- DRM_ERROR("Bad write at ip %d\n", ip);
- goto fail;
-@@ -467,7 +473,7 @@ vc4_validate_shader(struct drm_gem_cma_o
- break;
-
- case QPU_SIG_LOAD_IMM:
-- if (!check_instruction_writes(inst, validated_shader,
-+ if (!check_instruction_writes(validated_shader,
- &validation_state)) {
- DRM_ERROR("Bad LOAD_IMM write at ip %d\n", ip);
- goto fail;
-@@ -487,7 +493,7 @@ vc4_validate_shader(struct drm_gem_cma_o
- break;
- }
-
-- if (ip == max_ip) {
-+ if (ip == validation_state.max_ip) {
- DRM_ERROR("shader failed to terminate before "
- "shader BO end at %zd\n",
- shader_obj->base.size);
+++ /dev/null
-From ba3aa9ce57cb933203cb0ebaa7c00ef756e5f84e Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Sat, 2 Jul 2016 10:10:24 -0700
-Subject: [PATCH] drm/vc4: Add a bitmap of branch targets during shader
- validation.
-
-This isn't used yet, it's just a first step toward loop validation.
-During the main parsing of instructions, we need to know when we hit a
-new basic block so that we can reset validated state.
-
-v2: Fix a stray semicolon after an if block. (caught by kbuild test).
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 93aa9ae3e5523e49e4e5abacd4dbee0e4ab2d931)
----
- drivers/gpu/drm/vc4/vc4_qpu_defines.h | 12 +++
- drivers/gpu/drm/vc4/vc4_validate_shaders.c | 114 ++++++++++++++++++++++++++++-
- 2 files changed, 124 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_qpu_defines.h
-+++ b/drivers/gpu/drm/vc4/vc4_qpu_defines.h
-@@ -230,6 +230,15 @@ enum qpu_unpack_r4 {
- #define QPU_COND_MUL_SHIFT 46
- #define QPU_COND_MUL_MASK QPU_MASK(48, 46)
-
-+#define QPU_BRANCH_COND_SHIFT 52
-+#define QPU_BRANCH_COND_MASK QPU_MASK(55, 52)
-+
-+#define QPU_BRANCH_REL ((uint64_t)1 << 51)
-+#define QPU_BRANCH_REG ((uint64_t)1 << 50)
-+
-+#define QPU_BRANCH_RADDR_A_SHIFT 45
-+#define QPU_BRANCH_RADDR_A_MASK QPU_MASK(49, 45)
-+
- #define QPU_SF ((uint64_t)1 << 45)
-
- #define QPU_WADDR_ADD_SHIFT 38
-@@ -261,4 +270,7 @@ enum qpu_unpack_r4 {
- #define QPU_OP_ADD_SHIFT 24
- #define QPU_OP_ADD_MASK QPU_MASK(28, 24)
-
-+#define QPU_BRANCH_TARGET_SHIFT 0
-+#define QPU_BRANCH_TARGET_MASK QPU_MASK(31, 0)
-+
- #endif /* VC4_QPU_DEFINES_H */
---- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-@@ -59,6 +59,13 @@ struct vc4_shader_validation_state {
- */
- uint32_t live_min_clamp_offsets[32 + 32 + 4];
- bool live_max_clamp_regs[32 + 32 + 4];
-+
-+ /* Bitfield of which IPs are used as branch targets.
-+ *
-+ * Used for validation that the uniform stream is updated at the right
-+ * points and clearing the texturing/clamping state.
-+ */
-+ unsigned long *branch_targets;
- };
-
- static uint32_t
-@@ -418,13 +425,104 @@ check_instruction_reads(uint64_t inst,
- return true;
- }
-
-+/* Make sure that all branches are absolute and point within the shader, and
-+ * note their targets for later.
-+ */
-+static bool
-+vc4_validate_branches(struct vc4_shader_validation_state *validation_state)
-+{
-+ uint32_t max_branch_target = 0;
-+ bool found_shader_end = false;
-+ int ip;
-+ int shader_end_ip = 0;
-+ int last_branch = -2;
-+
-+ for (ip = 0; ip < validation_state->max_ip; ip++) {
-+ uint64_t inst = validation_state->shader[ip];
-+ int32_t branch_imm = QPU_GET_FIELD(inst, QPU_BRANCH_TARGET);
-+ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
-+ uint32_t after_delay_ip = ip + 4;
-+ uint32_t branch_target_ip;
-+
-+ if (sig == QPU_SIG_PROG_END) {
-+ shader_end_ip = ip;
-+ found_shader_end = true;
-+ continue;
-+ }
-+
-+ if (sig != QPU_SIG_BRANCH)
-+ continue;
-+
-+ if (ip - last_branch < 4) {
-+ DRM_ERROR("Branch at %d during delay slots\n", ip);
-+ return false;
-+ }
-+ last_branch = ip;
-+
-+ if (inst & QPU_BRANCH_REG) {
-+ DRM_ERROR("branching from register relative "
-+ "not supported\n");
-+ return false;
-+ }
-+
-+ if (!(inst & QPU_BRANCH_REL)) {
-+ DRM_ERROR("relative branching required\n");
-+ return false;
-+ }
-+
-+ /* The actual branch target is the instruction after the delay
-+ * slots, plus whatever byte offset is in the low 32 bits of
-+ * the instruction. Make sure we're not branching beyond the
-+ * end of the shader object.
-+ */
-+ if (branch_imm % sizeof(inst) != 0) {
-+ DRM_ERROR("branch target not aligned\n");
-+ return false;
-+ }
-+
-+ branch_target_ip = after_delay_ip + (branch_imm >> 3);
-+ if (branch_target_ip >= validation_state->max_ip) {
-+ DRM_ERROR("Branch at %d outside of shader (ip %d/%d)\n",
-+ ip, branch_target_ip,
-+ validation_state->max_ip);
-+ return false;
-+ }
-+ set_bit(branch_target_ip, validation_state->branch_targets);
-+
-+ /* Make sure that the non-branching path is also not outside
-+ * the shader.
-+ */
-+ if (after_delay_ip >= validation_state->max_ip) {
-+ DRM_ERROR("Branch at %d continues past shader end "
-+ "(%d/%d)\n",
-+ ip, after_delay_ip, validation_state->max_ip);
-+ return false;
-+ }
-+ set_bit(after_delay_ip, validation_state->branch_targets);
-+ max_branch_target = max(max_branch_target, after_delay_ip);
-+
-+ /* There are two delay slots after program end is signaled
-+ * that are still executed, then we're finished.
-+ */
-+ if (found_shader_end && ip == shader_end_ip + 2)
-+ break;
-+ }
-+
-+ if (max_branch_target > shader_end_ip) {
-+ DRM_ERROR("Branch landed after QPU_SIG_PROG_END");
-+ return false;
-+ }
-+
-+ return true;
-+}
-+
- struct vc4_validated_shader_info *
- vc4_validate_shader(struct drm_gem_cma_object *shader_obj)
- {
- bool found_shader_end = false;
- int shader_end_ip = 0;
- uint32_t ip;
-- struct vc4_validated_shader_info *validated_shader;
-+ struct vc4_validated_shader_info *validated_shader = NULL;
- struct vc4_shader_validation_state validation_state;
- int i;
-
-@@ -437,9 +535,18 @@ vc4_validate_shader(struct drm_gem_cma_o
- for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++)
- validation_state.live_min_clamp_offsets[i] = ~0;
-
-+ validation_state.branch_targets =
-+ kcalloc(BITS_TO_LONGS(validation_state.max_ip),
-+ sizeof(unsigned long), GFP_KERNEL);
-+ if (!validation_state.branch_targets)
-+ goto fail;
-+
- validated_shader = kcalloc(1, sizeof(*validated_shader), GFP_KERNEL);
- if (!validated_shader)
-- return NULL;
-+ goto fail;
-+
-+ if (!vc4_validate_branches(&validation_state))
-+ goto fail;
-
- for (ip = 0; ip < validation_state.max_ip; ip++) {
- uint64_t inst = validation_state.shader[ip];
-@@ -508,9 +615,12 @@ vc4_validate_shader(struct drm_gem_cma_o
- (validated_shader->uniforms_size +
- 4 * validated_shader->num_texture_samples);
-
-+ kfree(validation_state.branch_targets);
-+
- return validated_shader;
-
- fail:
-+ kfree(validation_state.branch_targets);
- if (validated_shader) {
- kfree(validated_shader->texture_samples);
- kfree(validated_shader);
--- /dev/null
+From f2ba2314600620134530571d3b8b22de2ad5745b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Sat, 2 Jul 2016 12:17:10 -0700
+Subject: [PATCH] drm/vc4: Add support for branching in shader validation.
+
+We're already checking that branch instructions are between the start
+of the shader and the proper PROG_END sequence. The other thing we
+need to make branching safe is to verify that the shader doesn't read
+past the end of the uniforms stream.
+
+To do that, we require that at any basic block reading uniforms have
+the following instructions:
+
+load_imm temp, <next offset within uniform stream>
+add unif_addr, temp, unif
+
+The instructions are generated by userspace, and the kernel verifies
+that the load_imm is of the expected offset, and that the add adds it
+to a uniform. We track which uniform in the stream that is, and at
+draw call time fix up the uniform stream to have the address of the
+start of the shader's uniforms at that location.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 6d45c81d229d71da54d374143e7d6abad4c0cf31)
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 3 +
+ drivers/gpu/drm/vc4/vc4_qpu_defines.h | 3 +
+ drivers/gpu/drm/vc4/vc4_validate.c | 13 +-
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 281 +++++++++++++++++++++++++++--
+ 4 files changed, 283 insertions(+), 17 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -363,6 +363,9 @@ struct vc4_validated_shader_info {
+ uint32_t uniforms_src_size;
+ uint32_t num_texture_samples;
+ struct vc4_texture_sample_info *texture_samples;
++
++ uint32_t num_uniform_addr_offsets;
++ uint32_t *uniform_addr_offsets;
+ };
+
+ /**
+--- a/drivers/gpu/drm/vc4/vc4_qpu_defines.h
++++ b/drivers/gpu/drm/vc4/vc4_qpu_defines.h
+@@ -270,6 +270,9 @@ enum qpu_unpack_r4 {
+ #define QPU_OP_ADD_SHIFT 24
+ #define QPU_OP_ADD_MASK QPU_MASK(28, 24)
+
++#define QPU_LOAD_IMM_SHIFT 0
++#define QPU_LOAD_IMM_MASK QPU_MASK(31, 0)
++
+ #define QPU_BRANCH_TARGET_SHIFT 0
+ #define QPU_BRANCH_TARGET_MASK QPU_MASK(31, 0)
+
+--- a/drivers/gpu/drm/vc4/vc4_validate.c
++++ b/drivers/gpu/drm/vc4/vc4_validate.c
+@@ -802,7 +802,7 @@ validate_gl_shader_rec(struct drm_device
+ uint32_t src_offset = *(uint32_t *)(pkt_u + o);
+ uint32_t *texture_handles_u;
+ void *uniform_data_u;
+- uint32_t tex;
++ uint32_t tex, uni;
+
+ *(uint32_t *)(pkt_v + o) = bo[i]->paddr + src_offset;
+
+@@ -840,6 +840,17 @@ validate_gl_shader_rec(struct drm_device
+ }
+ }
+
++ /* Fill in the uniform slots that need this shader's
++ * start-of-uniforms address (used for resetting the uniform
++ * stream in the presence of control flow).
++ */
++ for (uni = 0;
++ uni < validated_shader->num_uniform_addr_offsets;
++ uni++) {
++ uint32_t o = validated_shader->uniform_addr_offsets[uni];
++ ((uint32_t *)exec->uniforms_v)[o] = exec->uniforms_p;
++ }
++
+ *(uint32_t *)(pkt_v + o + 4) = exec->uniforms_p;
+
+ exec->uniforms_u += validated_shader->uniforms_src_size;
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -39,6 +39,8 @@
+ #include "vc4_drv.h"
+ #include "vc4_qpu_defines.h"
+
++#define LIVE_REG_COUNT (32 + 32 + 4)
++
+ struct vc4_shader_validation_state {
+ /* Current IP being validated. */
+ uint32_t ip;
+@@ -57,8 +59,9 @@ struct vc4_shader_validation_state {
+ *
+ * This is used for the validation of direct address memory reads.
+ */
+- uint32_t live_min_clamp_offsets[32 + 32 + 4];
+- bool live_max_clamp_regs[32 + 32 + 4];
++ uint32_t live_min_clamp_offsets[LIVE_REG_COUNT];
++ bool live_max_clamp_regs[LIVE_REG_COUNT];
++ uint32_t live_immediates[LIVE_REG_COUNT];
+
+ /* Bitfield of which IPs are used as branch targets.
+ *
+@@ -66,6 +69,20 @@ struct vc4_shader_validation_state {
+ * points and clearing the texturing/clamping state.
+ */
+ unsigned long *branch_targets;
++
++ /* Set when entering a basic block, and cleared when the uniform
++ * address update is found. This is used to make sure that we don't
++ * read uniforms when the address is undefined.
++ */
++ bool needs_uniform_address_update;
++
++ /* Set when we find a backwards branch. If the branch is backwards,
++ * the taraget is probably doing an address reset to read uniforms,
++ * and so we need to be sure that a uniforms address is present in the
++ * stream, even if the shader didn't need to read uniforms in later
++ * basic blocks.
++ */
++ bool needs_uniform_address_for_loop;
+ };
+
+ static uint32_t
+@@ -227,8 +244,14 @@ check_tmu_write(struct vc4_validated_sha
+ /* Since direct uses a RADDR uniform reference, it will get counted in
+ * check_instruction_reads()
+ */
+- if (!is_direct)
++ if (!is_direct) {
++ if (validation_state->needs_uniform_address_update) {
++ DRM_ERROR("Texturing with undefined uniform address\n");
++ return false;
++ }
++
+ validated_shader->uniforms_size += 4;
++ }
+
+ if (submit) {
+ if (!record_texture_sample(validated_shader,
+@@ -242,6 +265,98 @@ check_tmu_write(struct vc4_validated_sha
+ return true;
+ }
+
++static bool require_uniform_address_uniform(struct vc4_validated_shader_info *validated_shader)
++{
++ uint32_t o = validated_shader->num_uniform_addr_offsets;
++ uint32_t num_uniforms = validated_shader->uniforms_size / 4;
++
++ validated_shader->uniform_addr_offsets =
++ krealloc(validated_shader->uniform_addr_offsets,
++ (o + 1) *
++ sizeof(*validated_shader->uniform_addr_offsets),
++ GFP_KERNEL);
++ if (!validated_shader->uniform_addr_offsets)
++ return false;
++
++ validated_shader->uniform_addr_offsets[o] = num_uniforms;
++ validated_shader->num_uniform_addr_offsets++;
++
++ return true;
++}
++
++static bool
++validate_uniform_address_write(struct vc4_validated_shader_info *validated_shader,
++ struct vc4_shader_validation_state *validation_state,
++ bool is_mul)
++{
++ uint64_t inst = validation_state->shader[validation_state->ip];
++ u32 add_b = QPU_GET_FIELD(inst, QPU_ADD_B);
++ u32 raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
++ u32 raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
++ u32 add_lri = raddr_add_a_to_live_reg_index(inst);
++ /* We want our reset to be pointing at whatever uniform follows the
++ * uniforms base address.
++ */
++ u32 expected_offset = validated_shader->uniforms_size + 4;
++
++ /* We only support absolute uniform address changes, and we
++ * require that they be in the current basic block before any
++ * of its uniform reads.
++ *
++ * One could potentially emit more efficient QPU code, by
++ * noticing that (say) an if statement does uniform control
++ * flow for all threads and that the if reads the same number
++ * of uniforms on each side. However, this scheme is easy to
++ * validate so it's all we allow for now.
++ */
++
++ if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_NONE) {
++ DRM_ERROR("uniforms address change must be "
++ "normal math\n");
++ return false;
++ }
++
++ if (is_mul || QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_ADD) {
++ DRM_ERROR("Uniform address reset must be an ADD.\n");
++ return false;
++ }
++
++ if (QPU_GET_FIELD(inst, QPU_COND_ADD) != QPU_COND_ALWAYS) {
++ DRM_ERROR("Uniform address reset must be unconditional.\n");
++ return false;
++ }
++
++ if (QPU_GET_FIELD(inst, QPU_PACK) != QPU_PACK_A_NOP &&
++ !(inst & QPU_PM)) {
++ DRM_ERROR("No packing allowed on uniforms reset\n");
++ return false;
++ }
++
++ if (add_lri == -1) {
++ DRM_ERROR("First argument of uniform address write must be "
++ "an immediate value.\n");
++ return false;
++ }
++
++ if (validation_state->live_immediates[add_lri] != expected_offset) {
++ DRM_ERROR("Resetting uniforms with offset %db instead of %db\n",
++ validation_state->live_immediates[add_lri],
++ expected_offset);
++ return false;
++ }
++
++ if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) &&
++ !(add_b == QPU_MUX_B && raddr_b == QPU_R_UNIF)) {
++ DRM_ERROR("Second argument of uniform address write must be "
++ "a uniform.\n");
++ return false;
++ }
++
++ validation_state->needs_uniform_address_update = false;
++ validation_state->needs_uniform_address_for_loop = false;
++ return require_uniform_address_uniform(validated_shader);
++}
++
+ static bool
+ check_reg_write(struct vc4_validated_shader_info *validated_shader,
+ struct vc4_shader_validation_state *validation_state,
+@@ -251,14 +366,37 @@ check_reg_write(struct vc4_validated_sha
+ uint32_t waddr = (is_mul ?
+ QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
+ QPU_GET_FIELD(inst, QPU_WADDR_ADD));
++ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
++ bool ws = inst & QPU_WS;
++ bool is_b = is_mul ^ ws;
++ u32 lri = waddr_to_live_reg_index(waddr, is_b);
++
++ if (lri != -1) {
++ uint32_t cond_add = QPU_GET_FIELD(inst, QPU_COND_ADD);
++ uint32_t cond_mul = QPU_GET_FIELD(inst, QPU_COND_MUL);
++
++ if (sig == QPU_SIG_LOAD_IMM &&
++ QPU_GET_FIELD(inst, QPU_PACK) == QPU_PACK_A_NOP &&
++ ((is_mul && cond_mul == QPU_COND_ALWAYS) ||
++ (!is_mul && cond_add == QPU_COND_ALWAYS))) {
++ validation_state->live_immediates[lri] =
++ QPU_GET_FIELD(inst, QPU_LOAD_IMM);
++ } else {
++ validation_state->live_immediates[lri] = ~0;
++ }
++ }
+
+ switch (waddr) {
+ case QPU_W_UNIFORMS_ADDRESS:
+- /* XXX: We'll probably need to support this for reladdr, but
+- * it's definitely a security-related one.
+- */
+- DRM_ERROR("uniforms address load unsupported\n");
+- return false;
++ if (is_b) {
++ DRM_ERROR("relative uniforms address change "
++ "unsupported\n");
++ return false;
++ }
++
++ return validate_uniform_address_write(validated_shader,
++ validation_state,
++ is_mul);
+
+ case QPU_W_TLB_COLOR_MS:
+ case QPU_W_TLB_COLOR_ALL:
+@@ -406,9 +544,35 @@ check_instruction_writes(struct vc4_vali
+ }
+
+ static bool
+-check_instruction_reads(uint64_t inst,
+- struct vc4_validated_shader_info *validated_shader)
++check_branch(uint64_t inst,
++ struct vc4_validated_shader_info *validated_shader,
++ struct vc4_shader_validation_state *validation_state,
++ int ip)
+ {
++ int32_t branch_imm = QPU_GET_FIELD(inst, QPU_BRANCH_TARGET);
++ uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
++ uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
++
++ if ((int)branch_imm < 0)
++ validation_state->needs_uniform_address_for_loop = true;
++
++ /* We don't want to have to worry about validation of this, and
++ * there's no need for it.
++ */
++ if (waddr_add != QPU_W_NOP || waddr_mul != QPU_W_NOP) {
++ DRM_ERROR("branch instruction at %d wrote a register.\n",
++ validation_state->ip);
++ return false;
++ }
++
++ return true;
++}
++
++static bool
++check_instruction_reads(struct vc4_validated_shader_info *validated_shader,
++ struct vc4_shader_validation_state *validation_state)
++{
++ uint64_t inst = validation_state->shader[validation_state->ip];
+ uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
+ uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
+ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
+@@ -420,6 +584,12 @@ check_instruction_reads(uint64_t inst,
+ * already be OOM.
+ */
+ validated_shader->uniforms_size += 4;
++
++ if (validation_state->needs_uniform_address_update) {
++ DRM_ERROR("Uniform read with undefined uniform "
++ "address\n");
++ return false;
++ }
+ }
+
+ return true;
+@@ -516,6 +686,65 @@ vc4_validate_branches(struct vc4_shader_
+ return true;
+ }
+
++/* Resets any known state for the shader, used when we may be branched to from
++ * multiple locations in the program (or at shader start).
++ */
++static void
++reset_validation_state(struct vc4_shader_validation_state *validation_state)
++{
++ int i;
++
++ for (i = 0; i < 8; i++)
++ validation_state->tmu_setup[i / 4].p_offset[i % 4] = ~0;
++
++ for (i = 0; i < LIVE_REG_COUNT; i++) {
++ validation_state->live_min_clamp_offsets[i] = ~0;
++ validation_state->live_max_clamp_regs[i] = false;
++ validation_state->live_immediates[i] = ~0;
++ }
++}
++
++static bool
++texturing_in_progress(struct vc4_shader_validation_state *validation_state)
++{
++ return (validation_state->tmu_write_count[0] != 0 ||
++ validation_state->tmu_write_count[1] != 0);
++}
++
++static bool
++vc4_handle_branch_target(struct vc4_shader_validation_state *validation_state)
++{
++ uint32_t ip = validation_state->ip;
++
++ if (!test_bit(ip, validation_state->branch_targets))
++ return true;
++
++ if (texturing_in_progress(validation_state)) {
++ DRM_ERROR("Branch target landed during TMU setup\n");
++ return false;
++ }
++
++ /* Reset our live values tracking, since this instruction may have
++ * multiple predecessors.
++ *
++ * One could potentially do analysis to determine that, for
++ * example, all predecessors have a live max clamp in the same
++ * register, but we don't bother with that.
++ */
++ reset_validation_state(validation_state);
++
++ /* Since we've entered a basic block from potentially multiple
++ * predecessors, we need the uniforms address to be updated before any
++ * unforms are read. We require that after any branch point, the next
++ * uniform to be loaded is a uniform address offset. That uniform's
++ * offset will be marked by the uniform address register write
++ * validation, or a one-off the end-of-program check.
++ */
++ validation_state->needs_uniform_address_update = true;
++
++ return true;
++}
++
+ struct vc4_validated_shader_info *
+ vc4_validate_shader(struct drm_gem_cma_object *shader_obj)
+ {
+@@ -524,16 +753,12 @@ vc4_validate_shader(struct drm_gem_cma_o
+ uint32_t ip;
+ struct vc4_validated_shader_info *validated_shader = NULL;
+ struct vc4_shader_validation_state validation_state;
+- int i;
+
+ memset(&validation_state, 0, sizeof(validation_state));
+ validation_state.shader = shader_obj->vaddr;
+ validation_state.max_ip = shader_obj->base.size / sizeof(uint64_t);
+
+- for (i = 0; i < 8; i++)
+- validation_state.tmu_setup[i / 4].p_offset[i % 4] = ~0;
+- for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++)
+- validation_state.live_min_clamp_offsets[i] = ~0;
++ reset_validation_state(&validation_state);
+
+ validation_state.branch_targets =
+ kcalloc(BITS_TO_LONGS(validation_state.max_ip),
+@@ -554,6 +779,9 @@ vc4_validate_shader(struct drm_gem_cma_o
+
+ validation_state.ip = ip;
+
++ if (!vc4_handle_branch_target(&validation_state))
++ goto fail;
++
+ switch (sig) {
+ case QPU_SIG_NONE:
+ case QPU_SIG_WAIT_FOR_SCOREBOARD:
+@@ -569,7 +797,8 @@ vc4_validate_shader(struct drm_gem_cma_o
+ goto fail;
+ }
+
+- if (!check_instruction_reads(inst, validated_shader))
++ if (!check_instruction_reads(validated_shader,
++ &validation_state))
+ goto fail;
+
+ if (sig == QPU_SIG_PROG_END) {
+@@ -587,6 +816,11 @@ vc4_validate_shader(struct drm_gem_cma_o
+ }
+ break;
+
++ case QPU_SIG_BRANCH:
++ if (!check_branch(inst, validated_shader,
++ &validation_state, ip))
++ goto fail;
++ break;
+ default:
+ DRM_ERROR("Unsupported QPU signal %d at "
+ "instruction %d\n", sig, ip);
+@@ -607,6 +841,21 @@ vc4_validate_shader(struct drm_gem_cma_o
+ goto fail;
+ }
+
++ /* If we did a backwards branch and we haven't emitted a uniforms
++ * reset since then, we still need the uniforms stream to have the
++ * uniforms address available so that the backwards branch can do its
++ * uniforms reset.
++ *
++ * We could potentially prove that the backwards branch doesn't
++ * contain any uses of uniforms until program exit, but that doesn't
++ * seem to be worth the trouble.
++ */
++ if (validation_state.needs_uniform_address_for_loop) {
++ if (!require_uniform_address_uniform(validated_shader))
++ goto fail;
++ validated_shader->uniforms_size += 4;
++ }
++
+ /* Again, no chance of integer overflow here because the worst case
+ * scenario is 8 bytes of uniforms plus handles per 8-byte
+ * instruction.
--- /dev/null
+From 79c9521559f8c8249bf1062353bfd3b710d939c4 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Sat, 2 Jul 2016 14:14:27 -0700
+Subject: [PATCH] drm/vc4: Add a getparam to signal support for branches.
+
+Userspace needs to know if it can create shaders that do branching.
+Otherwise, for backwards compatibility with old kernels it needs to
+lower if statements to conditional assignments.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 7363cee5b467c31dc3af2ac98df0634bb8bbc668)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 3 +++
+ include/uapi/drm/vc4_drm.h | 1 +
+ 2 files changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -97,6 +97,9 @@ static int vc4_get_param_ioctl(struct dr
+ args->value = V3D_READ(V3D_IDENT2);
+ pm_runtime_put(&vc4->v3d->pdev->dev);
+ break;
++ case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
++ args->value = true;
++ break;
+ default:
+ DRM_DEBUG("Unknown parameter %d\n", args->param);
+ return -EINVAL;
+--- a/include/uapi/drm/vc4_drm.h
++++ b/include/uapi/drm/vc4_drm.h
+@@ -285,6 +285,7 @@ struct drm_vc4_get_hang_state {
+ #define DRM_VC4_PARAM_V3D_IDENT0 0
+ #define DRM_VC4_PARAM_V3D_IDENT1 1
+ #define DRM_VC4_PARAM_V3D_IDENT2 2
++#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
+
+ struct drm_vc4_get_param {
+ __u32 param;
+++ /dev/null
-From f9cd25fae900b1251e14ec894849846e0a2a7cb3 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Sat, 2 Jul 2016 12:17:10 -0700
-Subject: [PATCH] drm/vc4: Add support for branching in shader validation.
-
-We're already checking that branch instructions are between the start
-of the shader and the proper PROG_END sequence. The other thing we
-need to make branching safe is to verify that the shader doesn't read
-past the end of the uniforms stream.
-
-To do that, we require that at any basic block reading uniforms have
-the following instructions:
-
-load_imm temp, <next offset within uniform stream>
-add unif_addr, temp, unif
-
-The instructions are generated by userspace, and the kernel verifies
-that the load_imm is of the expected offset, and that the add adds it
-to a uniform. We track which uniform in the stream that is, and at
-draw call time fix up the uniform stream to have the address of the
-start of the shader's uniforms at that location.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 6d45c81d229d71da54d374143e7d6abad4c0cf31)
----
- drivers/gpu/drm/vc4/vc4_drv.h | 3 +
- drivers/gpu/drm/vc4/vc4_qpu_defines.h | 3 +
- drivers/gpu/drm/vc4/vc4_validate.c | 13 +-
- drivers/gpu/drm/vc4/vc4_validate_shaders.c | 281 +++++++++++++++++++++++++++--
- 4 files changed, 283 insertions(+), 17 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -363,6 +363,9 @@ struct vc4_validated_shader_info {
- uint32_t uniforms_src_size;
- uint32_t num_texture_samples;
- struct vc4_texture_sample_info *texture_samples;
-+
-+ uint32_t num_uniform_addr_offsets;
-+ uint32_t *uniform_addr_offsets;
- };
-
- /**
---- a/drivers/gpu/drm/vc4/vc4_qpu_defines.h
-+++ b/drivers/gpu/drm/vc4/vc4_qpu_defines.h
-@@ -270,6 +270,9 @@ enum qpu_unpack_r4 {
- #define QPU_OP_ADD_SHIFT 24
- #define QPU_OP_ADD_MASK QPU_MASK(28, 24)
-
-+#define QPU_LOAD_IMM_SHIFT 0
-+#define QPU_LOAD_IMM_MASK QPU_MASK(31, 0)
-+
- #define QPU_BRANCH_TARGET_SHIFT 0
- #define QPU_BRANCH_TARGET_MASK QPU_MASK(31, 0)
-
---- a/drivers/gpu/drm/vc4/vc4_validate.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate.c
-@@ -802,7 +802,7 @@ validate_gl_shader_rec(struct drm_device
- uint32_t src_offset = *(uint32_t *)(pkt_u + o);
- uint32_t *texture_handles_u;
- void *uniform_data_u;
-- uint32_t tex;
-+ uint32_t tex, uni;
-
- *(uint32_t *)(pkt_v + o) = bo[i]->paddr + src_offset;
-
-@@ -840,6 +840,17 @@ validate_gl_shader_rec(struct drm_device
- }
- }
-
-+ /* Fill in the uniform slots that need this shader's
-+ * start-of-uniforms address (used for resetting the uniform
-+ * stream in the presence of control flow).
-+ */
-+ for (uni = 0;
-+ uni < validated_shader->num_uniform_addr_offsets;
-+ uni++) {
-+ uint32_t o = validated_shader->uniform_addr_offsets[uni];
-+ ((uint32_t *)exec->uniforms_v)[o] = exec->uniforms_p;
-+ }
-+
- *(uint32_t *)(pkt_v + o + 4) = exec->uniforms_p;
-
- exec->uniforms_u += validated_shader->uniforms_src_size;
---- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
-@@ -39,6 +39,8 @@
- #include "vc4_drv.h"
- #include "vc4_qpu_defines.h"
-
-+#define LIVE_REG_COUNT (32 + 32 + 4)
-+
- struct vc4_shader_validation_state {
- /* Current IP being validated. */
- uint32_t ip;
-@@ -57,8 +59,9 @@ struct vc4_shader_validation_state {
- *
- * This is used for the validation of direct address memory reads.
- */
-- uint32_t live_min_clamp_offsets[32 + 32 + 4];
-- bool live_max_clamp_regs[32 + 32 + 4];
-+ uint32_t live_min_clamp_offsets[LIVE_REG_COUNT];
-+ bool live_max_clamp_regs[LIVE_REG_COUNT];
-+ uint32_t live_immediates[LIVE_REG_COUNT];
-
- /* Bitfield of which IPs are used as branch targets.
- *
-@@ -66,6 +69,20 @@ struct vc4_shader_validation_state {
- * points and clearing the texturing/clamping state.
- */
- unsigned long *branch_targets;
-+
-+ /* Set when entering a basic block, and cleared when the uniform
-+ * address update is found. This is used to make sure that we don't
-+ * read uniforms when the address is undefined.
-+ */
-+ bool needs_uniform_address_update;
-+
-+ /* Set when we find a backwards branch. If the branch is backwards,
-+ * the taraget is probably doing an address reset to read uniforms,
-+ * and so we need to be sure that a uniforms address is present in the
-+ * stream, even if the shader didn't need to read uniforms in later
-+ * basic blocks.
-+ */
-+ bool needs_uniform_address_for_loop;
- };
-
- static uint32_t
-@@ -227,8 +244,14 @@ check_tmu_write(struct vc4_validated_sha
- /* Since direct uses a RADDR uniform reference, it will get counted in
- * check_instruction_reads()
- */
-- if (!is_direct)
-+ if (!is_direct) {
-+ if (validation_state->needs_uniform_address_update) {
-+ DRM_ERROR("Texturing with undefined uniform address\n");
-+ return false;
-+ }
-+
- validated_shader->uniforms_size += 4;
-+ }
-
- if (submit) {
- if (!record_texture_sample(validated_shader,
-@@ -242,6 +265,98 @@ check_tmu_write(struct vc4_validated_sha
- return true;
- }
-
-+static bool require_uniform_address_uniform(struct vc4_validated_shader_info *validated_shader)
-+{
-+ uint32_t o = validated_shader->num_uniform_addr_offsets;
-+ uint32_t num_uniforms = validated_shader->uniforms_size / 4;
-+
-+ validated_shader->uniform_addr_offsets =
-+ krealloc(validated_shader->uniform_addr_offsets,
-+ (o + 1) *
-+ sizeof(*validated_shader->uniform_addr_offsets),
-+ GFP_KERNEL);
-+ if (!validated_shader->uniform_addr_offsets)
-+ return false;
-+
-+ validated_shader->uniform_addr_offsets[o] = num_uniforms;
-+ validated_shader->num_uniform_addr_offsets++;
-+
-+ return true;
-+}
-+
-+static bool
-+validate_uniform_address_write(struct vc4_validated_shader_info *validated_shader,
-+ struct vc4_shader_validation_state *validation_state,
-+ bool is_mul)
-+{
-+ uint64_t inst = validation_state->shader[validation_state->ip];
-+ u32 add_b = QPU_GET_FIELD(inst, QPU_ADD_B);
-+ u32 raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
-+ u32 raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
-+ u32 add_lri = raddr_add_a_to_live_reg_index(inst);
-+ /* We want our reset to be pointing at whatever uniform follows the
-+ * uniforms base address.
-+ */
-+ u32 expected_offset = validated_shader->uniforms_size + 4;
-+
-+ /* We only support absolute uniform address changes, and we
-+ * require that they be in the current basic block before any
-+ * of its uniform reads.
-+ *
-+ * One could potentially emit more efficient QPU code, by
-+ * noticing that (say) an if statement does uniform control
-+ * flow for all threads and that the if reads the same number
-+ * of uniforms on each side. However, this scheme is easy to
-+ * validate so it's all we allow for now.
-+ */
-+
-+ if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_NONE) {
-+ DRM_ERROR("uniforms address change must be "
-+ "normal math\n");
-+ return false;
-+ }
-+
-+ if (is_mul || QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_ADD) {
-+ DRM_ERROR("Uniform address reset must be an ADD.\n");
-+ return false;
-+ }
-+
-+ if (QPU_GET_FIELD(inst, QPU_COND_ADD) != QPU_COND_ALWAYS) {
-+ DRM_ERROR("Uniform address reset must be unconditional.\n");
-+ return false;
-+ }
-+
-+ if (QPU_GET_FIELD(inst, QPU_PACK) != QPU_PACK_A_NOP &&
-+ !(inst & QPU_PM)) {
-+ DRM_ERROR("No packing allowed on uniforms reset\n");
-+ return false;
-+ }
-+
-+ if (add_lri == -1) {
-+ DRM_ERROR("First argument of uniform address write must be "
-+ "an immediate value.\n");
-+ return false;
-+ }
-+
-+ if (validation_state->live_immediates[add_lri] != expected_offset) {
-+ DRM_ERROR("Resetting uniforms with offset %db instead of %db\n",
-+ validation_state->live_immediates[add_lri],
-+ expected_offset);
-+ return false;
-+ }
-+
-+ if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) &&
-+ !(add_b == QPU_MUX_B && raddr_b == QPU_R_UNIF)) {
-+ DRM_ERROR("Second argument of uniform address write must be "
-+ "a uniform.\n");
-+ return false;
-+ }
-+
-+ validation_state->needs_uniform_address_update = false;
-+ validation_state->needs_uniform_address_for_loop = false;
-+ return require_uniform_address_uniform(validated_shader);
-+}
-+
- static bool
- check_reg_write(struct vc4_validated_shader_info *validated_shader,
- struct vc4_shader_validation_state *validation_state,
-@@ -251,14 +366,37 @@ check_reg_write(struct vc4_validated_sha
- uint32_t waddr = (is_mul ?
- QPU_GET_FIELD(inst, QPU_WADDR_MUL) :
- QPU_GET_FIELD(inst, QPU_WADDR_ADD));
-+ uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
-+ bool ws = inst & QPU_WS;
-+ bool is_b = is_mul ^ ws;
-+ u32 lri = waddr_to_live_reg_index(waddr, is_b);
-+
-+ if (lri != -1) {
-+ uint32_t cond_add = QPU_GET_FIELD(inst, QPU_COND_ADD);
-+ uint32_t cond_mul = QPU_GET_FIELD(inst, QPU_COND_MUL);
-+
-+ if (sig == QPU_SIG_LOAD_IMM &&
-+ QPU_GET_FIELD(inst, QPU_PACK) == QPU_PACK_A_NOP &&
-+ ((is_mul && cond_mul == QPU_COND_ALWAYS) ||
-+ (!is_mul && cond_add == QPU_COND_ALWAYS))) {
-+ validation_state->live_immediates[lri] =
-+ QPU_GET_FIELD(inst, QPU_LOAD_IMM);
-+ } else {
-+ validation_state->live_immediates[lri] = ~0;
-+ }
-+ }
-
- switch (waddr) {
- case QPU_W_UNIFORMS_ADDRESS:
-- /* XXX: We'll probably need to support this for reladdr, but
-- * it's definitely a security-related one.
-- */
-- DRM_ERROR("uniforms address load unsupported\n");
-- return false;
-+ if (is_b) {
-+ DRM_ERROR("relative uniforms address change "
-+ "unsupported\n");
-+ return false;
-+ }
-+
-+ return validate_uniform_address_write(validated_shader,
-+ validation_state,
-+ is_mul);
-
- case QPU_W_TLB_COLOR_MS:
- case QPU_W_TLB_COLOR_ALL:
-@@ -406,9 +544,35 @@ check_instruction_writes(struct vc4_vali
- }
-
- static bool
--check_instruction_reads(uint64_t inst,
-- struct vc4_validated_shader_info *validated_shader)
-+check_branch(uint64_t inst,
-+ struct vc4_validated_shader_info *validated_shader,
-+ struct vc4_shader_validation_state *validation_state,
-+ int ip)
- {
-+ int32_t branch_imm = QPU_GET_FIELD(inst, QPU_BRANCH_TARGET);
-+ uint32_t waddr_add = QPU_GET_FIELD(inst, QPU_WADDR_ADD);
-+ uint32_t waddr_mul = QPU_GET_FIELD(inst, QPU_WADDR_MUL);
-+
-+ if ((int)branch_imm < 0)
-+ validation_state->needs_uniform_address_for_loop = true;
-+
-+ /* We don't want to have to worry about validation of this, and
-+ * there's no need for it.
-+ */
-+ if (waddr_add != QPU_W_NOP || waddr_mul != QPU_W_NOP) {
-+ DRM_ERROR("branch instruction at %d wrote a register.\n",
-+ validation_state->ip);
-+ return false;
-+ }
-+
-+ return true;
-+}
-+
-+static bool
-+check_instruction_reads(struct vc4_validated_shader_info *validated_shader,
-+ struct vc4_shader_validation_state *validation_state)
-+{
-+ uint64_t inst = validation_state->shader[validation_state->ip];
- uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A);
- uint32_t raddr_b = QPU_GET_FIELD(inst, QPU_RADDR_B);
- uint32_t sig = QPU_GET_FIELD(inst, QPU_SIG);
-@@ -420,6 +584,12 @@ check_instruction_reads(uint64_t inst,
- * already be OOM.
- */
- validated_shader->uniforms_size += 4;
-+
-+ if (validation_state->needs_uniform_address_update) {
-+ DRM_ERROR("Uniform read with undefined uniform "
-+ "address\n");
-+ return false;
-+ }
- }
-
- return true;
-@@ -516,6 +686,65 @@ vc4_validate_branches(struct vc4_shader_
- return true;
- }
-
-+/* Resets any known state for the shader, used when we may be branched to from
-+ * multiple locations in the program (or at shader start).
-+ */
-+static void
-+reset_validation_state(struct vc4_shader_validation_state *validation_state)
-+{
-+ int i;
-+
-+ for (i = 0; i < 8; i++)
-+ validation_state->tmu_setup[i / 4].p_offset[i % 4] = ~0;
-+
-+ for (i = 0; i < LIVE_REG_COUNT; i++) {
-+ validation_state->live_min_clamp_offsets[i] = ~0;
-+ validation_state->live_max_clamp_regs[i] = false;
-+ validation_state->live_immediates[i] = ~0;
-+ }
-+}
-+
-+static bool
-+texturing_in_progress(struct vc4_shader_validation_state *validation_state)
-+{
-+ return (validation_state->tmu_write_count[0] != 0 ||
-+ validation_state->tmu_write_count[1] != 0);
-+}
-+
-+static bool
-+vc4_handle_branch_target(struct vc4_shader_validation_state *validation_state)
-+{
-+ uint32_t ip = validation_state->ip;
-+
-+ if (!test_bit(ip, validation_state->branch_targets))
-+ return true;
-+
-+ if (texturing_in_progress(validation_state)) {
-+ DRM_ERROR("Branch target landed during TMU setup\n");
-+ return false;
-+ }
-+
-+ /* Reset our live values tracking, since this instruction may have
-+ * multiple predecessors.
-+ *
-+ * One could potentially do analysis to determine that, for
-+ * example, all predecessors have a live max clamp in the same
-+ * register, but we don't bother with that.
-+ */
-+ reset_validation_state(validation_state);
-+
-+ /* Since we've entered a basic block from potentially multiple
-+ * predecessors, we need the uniforms address to be updated before any
-+ * unforms are read. We require that after any branch point, the next
-+ * uniform to be loaded is a uniform address offset. That uniform's
-+ * offset will be marked by the uniform address register write
-+ * validation, or a one-off the end-of-program check.
-+ */
-+ validation_state->needs_uniform_address_update = true;
-+
-+ return true;
-+}
-+
- struct vc4_validated_shader_info *
- vc4_validate_shader(struct drm_gem_cma_object *shader_obj)
- {
-@@ -524,16 +753,12 @@ vc4_validate_shader(struct drm_gem_cma_o
- uint32_t ip;
- struct vc4_validated_shader_info *validated_shader = NULL;
- struct vc4_shader_validation_state validation_state;
-- int i;
-
- memset(&validation_state, 0, sizeof(validation_state));
- validation_state.shader = shader_obj->vaddr;
- validation_state.max_ip = shader_obj->base.size / sizeof(uint64_t);
-
-- for (i = 0; i < 8; i++)
-- validation_state.tmu_setup[i / 4].p_offset[i % 4] = ~0;
-- for (i = 0; i < ARRAY_SIZE(validation_state.live_min_clamp_offsets); i++)
-- validation_state.live_min_clamp_offsets[i] = ~0;
-+ reset_validation_state(&validation_state);
-
- validation_state.branch_targets =
- kcalloc(BITS_TO_LONGS(validation_state.max_ip),
-@@ -554,6 +779,9 @@ vc4_validate_shader(struct drm_gem_cma_o
-
- validation_state.ip = ip;
-
-+ if (!vc4_handle_branch_target(&validation_state))
-+ goto fail;
-+
- switch (sig) {
- case QPU_SIG_NONE:
- case QPU_SIG_WAIT_FOR_SCOREBOARD:
-@@ -569,7 +797,8 @@ vc4_validate_shader(struct drm_gem_cma_o
- goto fail;
- }
-
-- if (!check_instruction_reads(inst, validated_shader))
-+ if (!check_instruction_reads(validated_shader,
-+ &validation_state))
- goto fail;
-
- if (sig == QPU_SIG_PROG_END) {
-@@ -587,6 +816,11 @@ vc4_validate_shader(struct drm_gem_cma_o
- }
- break;
-
-+ case QPU_SIG_BRANCH:
-+ if (!check_branch(inst, validated_shader,
-+ &validation_state, ip))
-+ goto fail;
-+ break;
- default:
- DRM_ERROR("Unsupported QPU signal %d at "
- "instruction %d\n", sig, ip);
-@@ -607,6 +841,21 @@ vc4_validate_shader(struct drm_gem_cma_o
- goto fail;
- }
-
-+ /* If we did a backwards branch and we haven't emitted a uniforms
-+ * reset since then, we still need the uniforms stream to have the
-+ * uniforms address available so that the backwards branch can do its
-+ * uniforms reset.
-+ *
-+ * We could potentially prove that the backwards branch doesn't
-+ * contain any uses of uniforms until program exit, but that doesn't
-+ * seem to be worth the trouble.
-+ */
-+ if (validation_state.needs_uniform_address_for_loop) {
-+ if (!require_uniform_address_uniform(validated_shader))
-+ goto fail;
-+ validated_shader->uniforms_size += 4;
-+ }
-+
- /* Again, no chance of integer overflow here because the worst case
- * scenario is 8 bytes of uniforms plus handles per 8-byte
- * instruction.
+++ /dev/null
-From f6b1410aedc0c8d04363a930fd70509e30e23eeb Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Sat, 2 Jul 2016 14:14:27 -0700
-Subject: [PATCH] drm/vc4: Add a getparam to signal support for branches.
-
-Userspace needs to know if it can create shaders that do branching.
-Otherwise, for backwards compatibility with old kernels it needs to
-lower if statements to conditional assignments.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 7363cee5b467c31dc3af2ac98df0634bb8bbc668)
----
- drivers/gpu/drm/vc4/vc4_drv.c | 3 +++
- include/uapi/drm/vc4_drm.h | 1 +
- 2 files changed, 4 insertions(+)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.c
-+++ b/drivers/gpu/drm/vc4/vc4_drv.c
-@@ -97,6 +97,9 @@ static int vc4_get_param_ioctl(struct dr
- args->value = V3D_READ(V3D_IDENT2);
- pm_runtime_put(&vc4->v3d->pdev->dev);
- break;
-+ case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
-+ args->value = true;
-+ break;
- default:
- DRM_DEBUG("Unknown parameter %d\n", args->param);
- return -EINVAL;
---- a/include/uapi/drm/vc4_drm.h
-+++ b/include/uapi/drm/vc4_drm.h
-@@ -285,6 +285,7 @@ struct drm_vc4_get_hang_state {
- #define DRM_VC4_PARAM_V3D_IDENT0 0
- #define DRM_VC4_PARAM_V3D_IDENT1 1
- #define DRM_VC4_PARAM_V3D_IDENT2 2
-+#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
-
- struct drm_vc4_get_param {
- __u32 param;
--- /dev/null
+From 05f81ea4c1f661703b4b2e59839a518c088e8824 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 2 Aug 2016 17:17:52 -0700
+Subject: [PATCH] drm/vc4: Don't force new binner overflow allocation per draw.
+
+This came from the initial bringup code, which always idled the GPU
+and always reset the overflow. That massively increases the size of
+the working set when you're doing lots of small draws, though, as is
+common on X desktops or piglit.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -435,10 +435,6 @@ again:
+
+ vc4_flush_caches(dev);
+
+- /* Disable the binner's pre-loaded overflow memory address */
+- V3D_WRITE(V3D_BPOA, 0);
+- V3D_WRITE(V3D_BPOS, 0);
+-
+ /* Either put the job in the binner if it uses the binner, or
+ * immediately move it to the to-be-rendered queue.
+ */
+++ /dev/null
-From 033049599046df7c51b605b24224bbce6d60c762 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 2 Aug 2016 17:17:52 -0700
-Subject: [PATCH] drm/vc4: Don't force new binner overflow allocation per draw.
-
-This came from the initial bringup code, which always idled the GPU
-and always reset the overflow. That massively increases the size of
-the working set when you're doing lots of small draws, though, as is
-common on X desktops or piglit.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
----
- drivers/gpu/drm/vc4/vc4_gem.c | 4 ----
- 1 file changed, 4 deletions(-)
-
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -435,10 +435,6 @@ again:
-
- vc4_flush_caches(dev);
-
-- /* Disable the binner's pre-loaded overflow memory address */
-- V3D_WRITE(V3D_BPOA, 0);
-- V3D_WRITE(V3D_BPOS, 0);
--
- /* Either put the job in the binner if it uses the binner, or
- * immediately move it to the to-be-rendered queue.
- */
--- /dev/null
+From dd5e781b91b431e19cba0f0763a2821a60277a7b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Jul 2016 11:31:19 -0700
+Subject: [PATCH] drm/vc4: Use drm_free_large() on handles to match its
+ allocation.
+
+If you managed to exceed the limit to switch to vmalloc, we'd use the
+wrong free.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
+Cc: stable@vger.kernel.org
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -584,7 +584,7 @@ vc4_cl_lookup_bos(struct drm_device *dev
+ spin_unlock(&file_priv->table_lock);
+
+ fail:
+- kfree(handles);
++ drm_free_large(handles);
+ return 0;
+ }
+
--- /dev/null
+From c13643e0da4736d029d6323207a0c0bc49815a9a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 25 Jul 2016 16:10:04 -0700
+Subject: [PATCH] drm/vc4: Fix oops when userspace hands in a bad BO.
+
+We'd end up NULL pointer dereferencing because we didn't take the
+error path out in the parent. Fixes igt vc4_lookup_fail test.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
+Cc: stable@vger.kernel.org
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -585,7 +585,7 @@ vc4_cl_lookup_bos(struct drm_device *dev
+
+ fail:
+ drm_free_large(handles);
+- return 0;
++ return ret;
+ }
+
+ static int
+++ /dev/null
-From 60db7ffd6d4ace445eb56659c6e700ee9494b846 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Tue, 19 Jul 2016 11:31:19 -0700
-Subject: [PATCH] drm/vc4: Use drm_free_large() on handles to match its
- allocation.
-
-If you managed to exceed the limit to switch to vmalloc, we'd use the
-wrong free.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
-Cc: stable@vger.kernel.org
----
- drivers/gpu/drm/vc4/vc4_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -584,7 +584,7 @@ vc4_cl_lookup_bos(struct drm_device *dev
- spin_unlock(&file_priv->table_lock);
-
- fail:
-- kfree(handles);
-+ drm_free_large(handles);
- return 0;
- }
-
+++ /dev/null
-From 6d3d23c57b33d76f0b4f01221593182c0de34ef4 Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Mon, 25 Jul 2016 16:10:04 -0700
-Subject: [PATCH] drm/vc4: Fix oops when userspace hands in a bad BO.
-
-We'd end up NULL pointer dereferencing because we didn't take the
-error path out in the parent. Fixes igt vc4_lookup_fail test.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
-Cc: stable@vger.kernel.org
----
- drivers/gpu/drm/vc4/vc4_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_gem.c
-+++ b/drivers/gpu/drm/vc4/vc4_gem.c
-@@ -585,7 +585,7 @@ vc4_cl_lookup_bos(struct drm_device *dev
-
- fail:
- drm_free_large(handles);
-- return 0;
-+ return ret;
- }
-
- static int
--- /dev/null
+From 45d87c13cbba1dc247108ef485e4449ba2be1672 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 21 Jul 2016 13:39:11 -0700
+Subject: [PATCH] drm/vc4: Fix overflow mem unreferencing when the binner runs
+ dry.
+
+Overflow memory handling is tricky: While it's still referenced by the
+BPO registers, we want to keep it from being freed. When we are
+putting a new set of overflow memory in the registers, we need to
+assign the old one to the last rendering job using it.
+
+We were looking at "what's currently running in the binner", but since
+the bin/render submission split, we may end up with the binner
+completing and having no new job while the renderer is still
+processing. So, if we don't find a bin job at all, look at the
+highest-seqno (last) render job to attach our overflow to.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs")
+Cc: stable@vger.kernel.org
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 9 +++++++++
+ drivers/gpu/drm/vc4/vc4_irq.c | 4 +++-
+ 2 files changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -329,6 +329,15 @@ vc4_first_render_job(struct vc4_dev *vc4
+ struct vc4_exec_info, head);
+ }
+
++static inline struct vc4_exec_info *
++vc4_last_render_job(struct vc4_dev *vc4)
++{
++ if (list_empty(&vc4->render_job_list))
++ return NULL;
++ return list_last_entry(&vc4->render_job_list,
++ struct vc4_exec_info, head);
++}
++
+ /**
+ * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
+ * setup parameters.
+--- a/drivers/gpu/drm/vc4/vc4_irq.c
++++ b/drivers/gpu/drm/vc4/vc4_irq.c
+@@ -83,8 +83,10 @@ vc4_overflow_mem_work(struct work_struct
+
+ spin_lock_irqsave(&vc4->job_lock, irqflags);
+ current_exec = vc4_first_bin_job(vc4);
++ if (!current_exec)
++ current_exec = vc4_last_render_job(vc4);
+ if (current_exec) {
+- vc4->overflow_mem->seqno = vc4->finished_seqno + 1;
++ vc4->overflow_mem->seqno = current_exec->seqno;
+ list_add_tail(&vc4->overflow_mem->unref_head,
+ ¤t_exec->unref_list);
+ vc4->overflow_mem = NULL;
--- /dev/null
+From a64be1e10c388d83ba98d8c9b737cf3064193690 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Thu, 18 Aug 2016 17:36:39 +0100
+Subject: [PATCH] config: Enable SERIAL_SC16IS7XX_SPI
+
+Previously only the I2C mode was supported.
+
+See: https://github.com/raspberrypi/linux/issues/1594
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -601,6 +601,7 @@ CONFIG_SERIAL_AMBA_PL011=y
+ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+ CONFIG_SERIAL_OF_PLATFORM=y
+ CONFIG_SERIAL_SC16IS7XX=m
++CONFIG_SERIAL_SC16IS7XX_SPI=y
+ CONFIG_TTY_PRINTK=y
+ CONFIG_HW_RANDOM=y
+ CONFIG_RAW_DRIVER=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -594,6 +594,7 @@ CONFIG_SERIAL_AMBA_PL011=y
+ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+ CONFIG_SERIAL_OF_PLATFORM=y
+ CONFIG_SERIAL_SC16IS7XX=m
++CONFIG_SERIAL_SC16IS7XX_SPI=y
+ CONFIG_TTY_PRINTK=y
+ CONFIG_HW_RANDOM=y
+ CONFIG_RAW_DRIVER=y
+++ /dev/null
-From 379b5d818939dc58742278f744b60241a577568d Mon Sep 17 00:00:00 2001
-From: Eric Anholt <eric@anholt.net>
-Date: Thu, 21 Jul 2016 13:39:11 -0700
-Subject: [PATCH] drm/vc4: Fix overflow mem unreferencing when the binner runs
- dry.
-
-Overflow memory handling is tricky: While it's still referenced by the
-BPO registers, we want to keep it from being freed. When we are
-putting a new set of overflow memory in the registers, we need to
-assign the old one to the last rendering job using it.
-
-We were looking at "what's currently running in the binner", but since
-the bin/render submission split, we may end up with the binner
-completing and having no new job while the renderer is still
-processing. So, if we don't find a bin job at all, look at the
-highest-seqno (last) render job to attach our overflow to.
-
-Signed-off-by: Eric Anholt <eric@anholt.net>
-Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs")
-Cc: stable@vger.kernel.org
----
- drivers/gpu/drm/vc4/vc4_drv.h | 9 +++++++++
- drivers/gpu/drm/vc4/vc4_irq.c | 4 +++-
- 2 files changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/vc4/vc4_drv.h
-+++ b/drivers/gpu/drm/vc4/vc4_drv.h
-@@ -329,6 +329,15 @@ vc4_first_render_job(struct vc4_dev *vc4
- struct vc4_exec_info, head);
- }
-
-+static inline struct vc4_exec_info *
-+vc4_last_render_job(struct vc4_dev *vc4)
-+{
-+ if (list_empty(&vc4->render_job_list))
-+ return NULL;
-+ return list_last_entry(&vc4->render_job_list,
-+ struct vc4_exec_info, head);
-+}
-+
- /**
- * struct vc4_texture_sample_info - saves the offsets into the UBO for texture
- * setup parameters.
---- a/drivers/gpu/drm/vc4/vc4_irq.c
-+++ b/drivers/gpu/drm/vc4/vc4_irq.c
-@@ -83,8 +83,10 @@ vc4_overflow_mem_work(struct work_struct
-
- spin_lock_irqsave(&vc4->job_lock, irqflags);
- current_exec = vc4_first_bin_job(vc4);
-+ if (!current_exec)
-+ current_exec = vc4_last_render_job(vc4);
- if (current_exec) {
-- vc4->overflow_mem->seqno = vc4->finished_seqno + 1;
-+ vc4->overflow_mem->seqno = current_exec->seqno;
- list_add_tail(&vc4->overflow_mem->unref_head,
- ¤t_exec->unref_list);
- vc4->overflow_mem = NULL;
--- /dev/null
+From 4b90ef9ce4197f9d7c58290d2b13a7a3d06679c5 Mon Sep 17 00:00:00 2001
+From: wavelet2 <a3d35232@btinternet.com>
+Date: Fri, 19 Aug 2016 09:32:53 +0100
+Subject: [PATCH] Overlay for Microchip MCP23S08/17 SPI gpio expanders (#1566)
+
+Added Overlay for Microchip MCP23S08/17 SPI gpio expanders
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 24 +
+ arch/arm/boot/dts/overlays/mcp23s17-overlay.dts | 732 ++++++++++++++++++++++++
+ 3 files changed, 757 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -49,6 +49,7 @@ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.
+ dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += mcp23s17.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -628,6 +628,30 @@ Params: gpiopin Gpio pin
+ addr I2C address of the MCP23017 (default: 0x20)
+
+
++Name: mcp23s17
++Info: Configures the MCP23S08/17 SPI GPIO expanders.
++ If devices are present on SPI1 or SPI2, those interfaces must be enabled
++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++ If interrupts are enabled for a device on a given CS# on a SPI bus, that
++ device must be the only one present on that SPI bus/CS#.
++Load: dtoverlay=mcp23s17,<param>=<val>
++Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
++ devices present on SPI<n>, CS#<m>
++
++ s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
++ devices present on SPI<n>, CS#<m>
++
++ s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
++ MCP23S08 device on SPI<n>, CS#<m>, specifies
++ the GPIO pin to which INT output of MCP23S08
++ is connected.
++
++ s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
++ single MCP23S17 device on SPI<n>, CS#<m>,
++ specifies the GPIO pin to which either INTA
++ or INTB output of MCP23S17 is connected.
++
++
+ Name: mcp2515-can0
+ Info: Configures the MCP2515 CAN controller on spi0.0
+ Load: dtoverlay=mcp2515-can0,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
+@@ -0,0 +1,732 @@
++// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
++
++// dtparams:
++// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
++// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
++// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
++// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
++//
++// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
++// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
++//
++// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
++// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
++//
++// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
++// dtoverlay=spi1-2cs
++// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ // disable spi-dev on spi0.0
++ fragment@0 {
++ target = <&spidev0>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi0.1
++ fragment@1 {
++ target = <&spidev1>;
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.0
++ fragment@2 {
++ target-path = "spi1/spidev@0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.1
++ fragment@3 {
++ target-path = "spi1/spidev@1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi1.2
++ fragment@4 {
++ target-path = "spi1/spidev@2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.0
++ fragment@5 {
++ target-path = "spi2/spidev@0";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.1
++ fragment@6 {
++ target-path = "spi2/spidev@1";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // disable spi-dev on spi2.2
++ fragment@7 {
++ target-path = "spi2/spidev@2";
++ __dormant__ {
++ status = "disabled";
++ };
++ };
++
++ // enable one or more mcp23s08s on spi0.0
++ fragment@8 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_00: mcp23s08@0 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi0.1
++ fragment@9 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_01: mcp23s08@1 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi1.0
++ fragment@10 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_10: mcp23s08@0 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi1.1
++ fragment@11 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_11: mcp23s08@1 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi1.2
++ fragment@12 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_12: mcp23s08@2 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi2.0
++ fragment@13 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_20: mcp23s08@0 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi2.1
++ fragment@14 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_21: mcp23s08@1 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s08s on spi2.2
++ fragment@15 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s08_22: mcp23s08@2 {
++ compatible = "microchip,mcp23s08";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi0.0
++ fragment@16 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_00: mcp23s17@0 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi0.1
++ fragment@17 {
++ target = <&spi0>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_01: mcp23s17@1 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi1.0
++ fragment@18 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_10: mcp23s17@0 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi1.1
++ fragment@19 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_11: mcp23s17@1 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi1.2
++ fragment@20 {
++ target = <&spi1>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_12: mcp23s17@2 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi2.0
++ fragment@21 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_20: mcp23s17@0 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
++ reg = <0>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi2.1
++ fragment@22 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_21: mcp23s17@1 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
++ reg = <1>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
++ };
++ };
++ };
++
++ // enable one or more mcp23s17s on spi2.2
++ fragment@23 {
++ target = <&spi2>;
++ __dormant__ {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ mcp23s17_22: mcp23s17@2 {
++ compatible = "microchip,mcp23s17";
++ gpio-controller;
++ #gpio-cells = <2>;
++ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
++ reg = <2>;
++ spi-max-frequency = <500000>;
++ status = "okay";
++ #interrupt-cells=<2>;
++ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
++ fragment@24 {
++ target = <&gpio>;
++ __dormant__ {
++ spi0_0_int_pins: spi0_0_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
++ fragment@25 {
++ target = <&gpio>;
++ __dormant__ {
++ spi0_1_int_pins: spi0_1_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
++ fragment@26 {
++ target = <&gpio>;
++ __dormant__ {
++ spi1_0_int_pins: spi1_0_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
++ fragment@27 {
++ target = <&gpio>;
++ __dormant__ {
++ spi1_1_int_pins: spi1_1_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
++ fragment@28 {
++ target = <&gpio>;
++ __dormant__ {
++ spi1_2_int_pins: spi1_2_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
++ fragment@29 {
++ target = <&gpio>;
++ __dormant__ {
++ spi2_0_int_pins: spi2_0_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
++ fragment@30 {
++ target = <&gpio>;
++ __dormant__ {
++ spi2_1_int_pins: spi2_1_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
++ fragment@31 {
++ target = <&gpio>;
++ __dormant__ {
++ spi2_2_int_pins: spi2_2_int_pins {
++ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
++ brcm,function = <0>;
++ brcm,pull = <0>;
++ };
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi0.0.
++ // Use default active low interrupt signalling.
++ fragment@32 {
++ target = <&mcp23s08_00>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi0.1.
++ // Use default active low interrupt signalling.
++ fragment@33 {
++ target = <&mcp23s08_01>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi1.0.
++ // Use default active low interrupt signalling.
++ fragment@34 {
++ target = <&mcp23s08_10>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi1.1.
++ // Use default active low interrupt signalling.
++ fragment@35 {
++ target = <&mcp23s08_11>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi1.2.
++ // Use default active low interrupt signalling.
++ fragment@36 {
++ target = <&mcp23s08_12>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi2.0.
++ // Use default active low interrupt signalling.
++ fragment@37 {
++ target = <&mcp23s08_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi2.1.
++ // Use default active low interrupt signalling.
++ fragment@38 {
++ target = <&mcp23s08_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s08 on spi2.2.
++ // Use default active low interrupt signalling.
++ fragment@39 {
++ target = <&mcp23s08_22>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi0.0.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Use default active low interrupt signalling.
++ fragment@40 {
++ target = <&mcp23s17_00>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi0.1.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@41 {
++ target = <&mcp23s17_01>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi1.0.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@42 {
++ target = <&mcp23s17_10>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi1.1.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@43 {
++ target = <&mcp23s17_11>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi1.2.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@44 {
++ target = <&mcp23s17_12>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi2.0.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@45 {
++ target = <&mcp23s17_20>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi2.1.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@46 {
++ target = <&mcp23s17_21>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ // Enable interrupts for a mcp23s17 on spi2.2.
++ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
++ // Configure INTA/B outputs of mcp23s08/17 as active low.
++ fragment@47 {
++ target = <&mcp23s17_22>;
++ __dormant__ {
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++ microchip,irq-mirror;
++ };
++ };
++
++ __overrides__ {
++ s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
++ s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
++ s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
++ s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
++ s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
++ s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
++ s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
++ s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
++ s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
++ s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
++ s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
++ s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
++ s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
++ s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
++ s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
++ s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
++ s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
++ s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
++ s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
++ s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
++ s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
++ s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
++ s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
++ s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
++ s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
++ s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
++ s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
++ s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
++ s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
++ s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
++ s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
++ s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
++ };
++};
++
+++ /dev/null
-From 6032b4e7060993a3a32b2e2a26c62ce0dd79a7fb Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Thu, 18 Aug 2016 17:36:39 +0100
-Subject: [PATCH] config: Enable SERIAL_SC16IS7XX_SPI
-
-Previously only the I2C mode was supported.
-
-See: https://github.com/raspberrypi/linux/issues/1594
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -601,6 +601,7 @@ CONFIG_SERIAL_AMBA_PL011=y
- CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
- CONFIG_SERIAL_OF_PLATFORM=y
- CONFIG_SERIAL_SC16IS7XX=m
-+CONFIG_SERIAL_SC16IS7XX_SPI=y
- CONFIG_TTY_PRINTK=y
- CONFIG_HW_RANDOM=y
- CONFIG_RAW_DRIVER=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -594,6 +594,7 @@ CONFIG_SERIAL_AMBA_PL011=y
- CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
- CONFIG_SERIAL_OF_PLATFORM=y
- CONFIG_SERIAL_SC16IS7XX=m
-+CONFIG_SERIAL_SC16IS7XX_SPI=y
- CONFIG_TTY_PRINTK=y
- CONFIG_HW_RANDOM=y
- CONFIG_RAW_DRIVER=y
--- /dev/null
+From 79b1ef832e3e73af4ec6c506ce01f8666d4c92bb Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 19 Aug 2016 11:12:28 +0100
+Subject: [PATCH] BCM270X_DT: Add audio_pins to CM dtb
+
+Bring the CM .dtb in line with other others.
+---
+ arch/arm/boot/dts/bcm2708-rpi-cm.dts | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts
++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
+@@ -35,6 +35,11 @@
+ brcm,pins = <18 19 20 21>;
+ brcm,function = <4>; /* alt0 */
+ };
++
++ audio_pins: audio_pins {
++ brcm,pins;
++ brcm,function;
++ };
+ };
+
+ &spi0 {
+++ /dev/null
-From bd7c2eac2ada8f60058768b00935cdfe010720a5 Mon Sep 17 00:00:00 2001
-From: wavelet2 <a3d35232@btinternet.com>
-Date: Fri, 19 Aug 2016 09:32:53 +0100
-Subject: [PATCH] Overlay for Microchip MCP23S08/17 SPI gpio expanders (#1566)
-
-Added Overlay for Microchip MCP23S08/17 SPI gpio expanders
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 24 +
- arch/arm/boot/dts/overlays/mcp23s17-overlay.dts | 732 ++++++++++++++++++++++++
- 3 files changed, 757 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -49,6 +49,7 @@ dtbo-$(RPI_DT_OVERLAYS) += justboom-dac.
- dtbo-$(RPI_DT_OVERLAYS) += justboom-digi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += lirc-rpi.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp23017.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += mcp23s17.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can0.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mcp2515-can1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += mmc.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -628,6 +628,30 @@ Params: gpiopin Gpio pin
- addr I2C address of the MCP23017 (default: 0x20)
-
-
-+Name: mcp23s17
-+Info: Configures the MCP23S08/17 SPI GPIO expanders.
-+ If devices are present on SPI1 or SPI2, those interfaces must be enabled
-+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
-+ If interrupts are enabled for a device on a given CS# on a SPI bus, that
-+ device must be the only one present on that SPI bus/CS#.
-+Load: dtoverlay=mcp23s17,<param>=<val>
-+Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
-+ devices present on SPI<n>, CS#<m>
-+
-+ s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
-+ devices present on SPI<n>, CS#<m>
-+
-+ s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
-+ MCP23S08 device on SPI<n>, CS#<m>, specifies
-+ the GPIO pin to which INT output of MCP23S08
-+ is connected.
-+
-+ s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
-+ single MCP23S17 device on SPI<n>, CS#<m>,
-+ specifies the GPIO pin to which either INTA
-+ or INTB output of MCP23S17 is connected.
-+
-+
- Name: mcp2515-can0
- Info: Configures the MCP2515 CAN controller on spi0.0
- Load: dtoverlay=mcp2515-can0,<param>=<val>
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
-@@ -0,0 +1,732 @@
-+// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
-+
-+// dtparams:
-+// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
-+// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
-+// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
-+// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
-+//
-+// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
-+// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
-+//
-+// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
-+// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
-+//
-+// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
-+// dtoverlay=spi1-2cs
-+// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
-+
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ // disable spi-dev on spi0.0
-+ fragment@0 {
-+ target = <&spidev0>;
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi0.1
-+ fragment@1 {
-+ target = <&spidev1>;
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi1.0
-+ fragment@2 {
-+ target-path = "spi1/spidev@0";
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi1.1
-+ fragment@3 {
-+ target-path = "spi1/spidev@1";
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi1.2
-+ fragment@4 {
-+ target-path = "spi1/spidev@2";
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi2.0
-+ fragment@5 {
-+ target-path = "spi2/spidev@0";
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi2.1
-+ fragment@6 {
-+ target-path = "spi2/spidev@1";
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // disable spi-dev on spi2.2
-+ fragment@7 {
-+ target-path = "spi2/spidev@2";
-+ __dormant__ {
-+ status = "disabled";
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi0.0
-+ fragment@8 {
-+ target = <&spi0>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_00: mcp23s08@0 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
-+ reg = <0>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi0.1
-+ fragment@9 {
-+ target = <&spi0>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_01: mcp23s08@1 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
-+ reg = <1>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi1.0
-+ fragment@10 {
-+ target = <&spi1>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_10: mcp23s08@0 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
-+ reg = <0>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi1.1
-+ fragment@11 {
-+ target = <&spi1>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_11: mcp23s08@1 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
-+ reg = <1>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi1.2
-+ fragment@12 {
-+ target = <&spi1>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_12: mcp23s08@2 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
-+ reg = <2>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi2.0
-+ fragment@13 {
-+ target = <&spi2>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_20: mcp23s08@0 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
-+ reg = <0>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi2.1
-+ fragment@14 {
-+ target = <&spi2>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_21: mcp23s08@1 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
-+ reg = <1>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s08s on spi2.2
-+ fragment@15 {
-+ target = <&spi2>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s08_22: mcp23s08@2 {
-+ compatible = "microchip,mcp23s08";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
-+ reg = <2>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi0.0
-+ fragment@16 {
-+ target = <&spi0>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_00: mcp23s17@0 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
-+ reg = <0>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi0.1
-+ fragment@17 {
-+ target = <&spi0>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_01: mcp23s17@1 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
-+ reg = <1>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi1.0
-+ fragment@18 {
-+ target = <&spi1>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_10: mcp23s17@0 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
-+ reg = <0>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi1.1
-+ fragment@19 {
-+ target = <&spi1>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_11: mcp23s17@1 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
-+ reg = <1>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi1.2
-+ fragment@20 {
-+ target = <&spi1>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_12: mcp23s17@2 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
-+ reg = <2>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi2.0
-+ fragment@21 {
-+ target = <&spi2>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_20: mcp23s17@0 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
-+ reg = <0>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi2.1
-+ fragment@22 {
-+ target = <&spi2>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_21: mcp23s17@1 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
-+ reg = <1>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // enable one or more mcp23s17s on spi2.2
-+ fragment@23 {
-+ target = <&spi2>;
-+ __dormant__ {
-+ status = "okay";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ mcp23s17_22: mcp23s17@2 {
-+ compatible = "microchip,mcp23s17";
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
-+ reg = <2>;
-+ spi-max-frequency = <500000>;
-+ status = "okay";
-+ #interrupt-cells=<2>;
-+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
-+ fragment@24 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi0_0_int_pins: spi0_0_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
-+ fragment@25 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi0_1_int_pins: spi0_1_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
-+ fragment@26 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi1_0_int_pins: spi1_0_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
-+ fragment@27 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi1_1_int_pins: spi1_1_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
-+ fragment@28 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi1_2_int_pins: spi1_2_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
-+ fragment@29 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi2_0_int_pins: spi2_0_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
-+ fragment@30 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi2_1_int_pins: spi2_1_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
-+ fragment@31 {
-+ target = <&gpio>;
-+ __dormant__ {
-+ spi2_2_int_pins: spi2_2_int_pins {
-+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
-+ brcm,function = <0>;
-+ brcm,pull = <0>;
-+ };
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi0.0.
-+ // Use default active low interrupt signalling.
-+ fragment@32 {
-+ target = <&mcp23s08_00>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi0.1.
-+ // Use default active low interrupt signalling.
-+ fragment@33 {
-+ target = <&mcp23s08_01>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi1.0.
-+ // Use default active low interrupt signalling.
-+ fragment@34 {
-+ target = <&mcp23s08_10>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi1.1.
-+ // Use default active low interrupt signalling.
-+ fragment@35 {
-+ target = <&mcp23s08_11>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi1.2.
-+ // Use default active low interrupt signalling.
-+ fragment@36 {
-+ target = <&mcp23s08_12>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi2.0.
-+ // Use default active low interrupt signalling.
-+ fragment@37 {
-+ target = <&mcp23s08_20>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi2.1.
-+ // Use default active low interrupt signalling.
-+ fragment@38 {
-+ target = <&mcp23s08_21>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s08 on spi2.2.
-+ // Use default active low interrupt signalling.
-+ fragment@39 {
-+ target = <&mcp23s08_22>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi0.0.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Use default active low interrupt signalling.
-+ fragment@40 {
-+ target = <&mcp23s17_00>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi0.1.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@41 {
-+ target = <&mcp23s17_01>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi1.0.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@42 {
-+ target = <&mcp23s17_10>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi1.1.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@43 {
-+ target = <&mcp23s17_11>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi1.2.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@44 {
-+ target = <&mcp23s17_12>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi2.0.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@45 {
-+ target = <&mcp23s17_20>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi2.1.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@46 {
-+ target = <&mcp23s17_21>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ // Enable interrupts for a mcp23s17 on spi2.2.
-+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
-+ // Configure INTA/B outputs of mcp23s08/17 as active low.
-+ fragment@47 {
-+ target = <&mcp23s17_22>;
-+ __dormant__ {
-+ interrupt-parent = <&gpio>;
-+ interrupt-controller;
-+ microchip,irq-mirror;
-+ };
-+ };
-+
-+ __overrides__ {
-+ s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
-+ s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
-+ s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
-+ s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
-+ s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
-+ s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
-+ s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
-+ s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
-+ s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
-+ s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
-+ s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
-+ s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
-+ s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
-+ s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
-+ s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
-+ s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
-+ s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
-+ s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
-+ s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
-+ s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
-+ s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
-+ s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
-+ s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
-+ s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
-+ s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
-+ s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
-+ s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
-+ s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
-+ s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
-+ s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
-+ s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
-+ s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
-+ };
-+};
-+
+++ /dev/null
-From e34eb065a125fae5814256d77c03226a46083f87 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 19 Aug 2016 11:12:28 +0100
-Subject: [PATCH] BCM270X_DT: Add audio_pins to CM dtb
-
-Bring the CM .dtb in line with other others.
----
- arch/arm/boot/dts/bcm2708-rpi-cm.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts
-+++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
-@@ -35,6 +35,11 @@
- brcm,pins = <18 19 20 21>;
- brcm,function = <4>; /* alt0 */
- };
-+
-+ audio_pins: audio_pins {
-+ brcm,pins;
-+ brcm,function;
-+ };
- };
-
- &spi0 {
--- /dev/null
+From 7315db2c16ae18cfc3678da9da8b023c1d2492a8 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 19 Aug 2016 11:19:02 +0100
+Subject: [PATCH] BCM270X_DT: Don't enable UART0 in CM3 dtb
+
+---
+ arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 12 ------------
+ 1 file changed, 12 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
+@@ -40,12 +40,6 @@
+ brcm,function = <4>; /* alt0 */
+ };
+
+- uart0_pins: uart0_pins {
+- brcm,pins;
+- brcm,function;
+- brcm,pull = <0 2>;
+- };
+-
+ audio_pins: audio_pins {
+ brcm,pins;
+ brcm,function;
+@@ -75,12 +69,6 @@
+ status = "okay";
+ };
+
+-&uart0 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&uart0_pins>;
+- status = "okay";
+-};
+-
+ &spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
+++ /dev/null
-From ec662a26071a7aa2d7617ac366ce91beebaf2ad1 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 19 Aug 2016 11:19:02 +0100
-Subject: [PATCH] BCM270X_DT: Don't enable UART0 in CM3 dtb
-
----
- arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 12 ------------
- 1 file changed, 12 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
-+++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
-@@ -40,12 +40,6 @@
- brcm,function = <4>; /* alt0 */
- };
-
-- uart0_pins: uart0_pins {
-- brcm,pins;
-- brcm,function;
-- brcm,pull = <0 2>;
-- };
--
- audio_pins: audio_pins {
- brcm,pins;
- brcm,function;
-@@ -75,12 +69,6 @@
- status = "okay";
- };
-
--&uart0 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&uart0_pins>;
-- status = "okay";
--};
--
- &spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
--- /dev/null
+From 7a2796d02bb044340fabbdc1c4a13c6f381155ac Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 19 Aug 2016 11:26:57 +0100
+Subject: [PATCH] overlays: Add audremap overlay
+
+The audremap overlay switches the PWM audio outputs to GPIO pins
+12 (L) and 13 (R).
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 ++++++
+ arch/arm/boot/dts/overlays/audremap-overlay.dts | 14 ++++++++++++++
+ 3 files changed, 21 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -18,6 +18,7 @@ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += audremap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dionaudio-loco.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -253,6 +253,12 @@ Load: dtoverlay=audioinjector-wm8731-a
+ Params: <None>
+
+
++Name: audremap
++Info: Switches PWM sound output to pins 12 & 13
++Load: dtoverlay=audremap
++Params: <None>
++
++
+ Name: bmp085_i2c-sensor
+ Info: Configures the BMP085/BMP180 digital barometric pressure and temperature
+ sensors from Bosch Sensortec
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
+@@ -0,0 +1,14 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&audio_pins>;
++ __overlay__ {
++ brcm,pins = < 12 13 >;
++ brcm,function = < 4 >; /* alt0 alt0 */
++ };
++ };
++};
+++ /dev/null
-From 612d9be3d6aa73b018005a182bd55a551abfc271 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 19 Aug 2016 11:26:57 +0100
-Subject: [PATCH] overlays: Add audremap overlay
-
-The audremap overlay switches the PWM audio outputs to GPIO pins
-12 (L) and 13 (R).
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 6 ++++++
- arch/arm/boot/dts/overlays/audremap-overlay.dts | 14 ++++++++++++++
- 3 files changed, 21 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -18,6 +18,7 @@ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += audremap.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += dionaudio-loco.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -253,6 +253,12 @@ Load: dtoverlay=audioinjector-wm8731-a
- Params: <None>
-
-
-+Name: audremap
-+Info: Switches PWM sound output to pins 12 & 13
-+Load: dtoverlay=audremap
-+Params: <None>
-+
-+
- Name: bmp085_i2c-sensor
- Info: Configures the BMP085/BMP180 digital barometric pressure and temperature
- sensors from Bosch Sensortec
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
-@@ -0,0 +1,14 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2708";
-+
-+ fragment@0 {
-+ target = <&audio_pins>;
-+ __overlay__ {
-+ brcm,pins = < 12 13 >;
-+ brcm,function = < 4 >; /* alt0 alt0 */
-+ };
-+ };
-+};
--- /dev/null
+From 88e9625826d782595ae6b2acf7b8214f5d05726b Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 19 Aug 2016 15:39:01 +0100
+Subject: [PATCH] overlays: Add swap_lr and enable_jack to audremap
+
+swap_lr causes the channels to be reversed, and enable_jack prevents the
+headphone output from being disabled.
+
+See: https://github.com/raspberrypi/linux/issues/1473
+---
+ arch/arm/boot/dts/overlays/README | 9 ++++++---
+ arch/arm/boot/dts/overlays/audremap-overlay.dts | 7 ++++++-
+ 2 files changed, 12 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -254,9 +254,12 @@ Params: <None>
+
+
+ Name: audremap
+-Info: Switches PWM sound output to pins 12 & 13
+-Load: dtoverlay=audremap
+-Params: <None>
++Info: Switches PWM sound output to pins 12 (Right) & 13 (Left)
++Load: dtoverlay=audremap,<param>=<val>
++Params: swap_lr Reverse the channel allocation, which will also
++ swap the audio jack outputs (default off)
++ enable_jack Don't switch off the audio jack output
++ (default off)
+
+
+ Name: bmp085_i2c-sensor
+--- a/arch/arm/boot/dts/overlays/audremap-overlay.dts
++++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
+@@ -6,9 +6,14 @@
+
+ fragment@0 {
+ target = <&audio_pins>;
+- __overlay__ {
++ frag0: __overlay__ {
+ brcm,pins = < 12 13 >;
+ brcm,function = < 4 >; /* alt0 alt0 */
+ };
+ };
++
++ __overrides__ {
++ swap_lr = <&frag0>, "swap_lr?";
++ enable_jack = <&frag0>, "enable_jack?";
++ };
+ };
+++ /dev/null
-From f8e026145de28acf5e36183f5c8b489bf172e9c8 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 19 Aug 2016 15:39:01 +0100
-Subject: [PATCH] overlays: Add swap_lr and enable_jack to audremap
-
-swap_lr causes the channels to be reversed, and enable_jack prevents the
-headphone output from being disabled.
-
-See: https://github.com/raspberrypi/linux/issues/1473
----
- arch/arm/boot/dts/overlays/README | 9 ++++++---
- arch/arm/boot/dts/overlays/audremap-overlay.dts | 7 ++++++-
- 2 files changed, 12 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -254,9 +254,12 @@ Params: <None>
-
-
- Name: audremap
--Info: Switches PWM sound output to pins 12 & 13
--Load: dtoverlay=audremap
--Params: <None>
-+Info: Switches PWM sound output to pins 12 (Right) & 13 (Left)
-+Load: dtoverlay=audremap,<param>=<val>
-+Params: swap_lr Reverse the channel allocation, which will also
-+ swap the audio jack outputs (default off)
-+ enable_jack Don't switch off the audio jack output
-+ (default off)
-
-
- Name: bmp085_i2c-sensor
---- a/arch/arm/boot/dts/overlays/audremap-overlay.dts
-+++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
-@@ -6,9 +6,14 @@
-
- fragment@0 {
- target = <&audio_pins>;
-- __overlay__ {
-+ frag0: __overlay__ {
- brcm,pins = < 12 13 >;
- brcm,function = < 4 >; /* alt0 alt0 */
- };
- };
-+
-+ __overrides__ {
-+ swap_lr = <&frag0>, "swap_lr?";
-+ enable_jack = <&frag0>, "enable_jack?";
-+ };
- };
--- /dev/null
+From a8fe903c1e5c6655795cdef8dfe0977018adc99b Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 22 Aug 2016 11:56:04 +0100
+Subject: [PATCH] overlays: Clarify gpio-poweroff semantics in README
+
+1) GPIO pin is signalled on poweroff, not reboot.
+2) In RPi kernels, halt is equivalent to poweroff.
+
+See: https://github.com/raspberrypi/linux/issues/1600
+---
+ arch/arm/boot/dts/overlays/README | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -340,7 +340,7 @@ Params: gpio_pin Input pi
+
+
+ Name: gpio-poweroff
+-Info: Drives a GPIO high or low on reboot
++Info: Drives a GPIO high or low on poweroff (including halt)
+ Load: dtoverlay=gpio-poweroff,<param>=<val>
+ Params: gpiopin GPIO for signalling (default 26)
+
+++ /dev/null
-From 5b3a11f39bb1b0f9b43044c8109bd6a19b92cebe Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Mon, 22 Aug 2016 11:56:04 +0100
-Subject: [PATCH] overlays: Clarify gpio-poweroff semantics in README
-
-1) GPIO pin is signalled on poweroff, not reboot.
-2) In RPi kernels, halt is equivalent to poweroff.
-
-See: https://github.com/raspberrypi/linux/issues/1600
----
- arch/arm/boot/dts/overlays/README | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -340,7 +340,7 @@ Params: gpio_pin Input pi
-
-
- Name: gpio-poweroff
--Info: Drives a GPIO high or low on reboot
-+Info: Drives a GPIO high or low on poweroff (including halt)
- Load: dtoverlay=gpio-poweroff,<param>=<val>
- Params: gpiopin GPIO for signalling (default 26)
-
--- /dev/null
+From 0f34b495557223c0d129bf97a1fb89990cfd83ed Mon Sep 17 00:00:00 2001
+From: Georgii Staroselskii <gosha371@gmail.com>
+Date: Tue, 23 Aug 2016 17:40:05 +0400
+Subject: [PATCH] overlays: added sc16is750 UART over I2C (#1617)
+
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 10 ++++++
+ .../boot/dts/overlays/sc16is750-i2c-overlay.dts | 37 ++++++++++++++++++++++
+ 3 files changed, 48 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -75,6 +75,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += sc16is750-i2c.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -935,6 +935,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
+ Params: <None>
+
+
++Name: sc16is750-i2c
++Info: Overlay for the NXP SC16IS750 UART with I2C Interface
++ Enables the chip on I2C1 at 0x48. To select another address,
++ please refer to table 10 in reference manual.
++
++Load: dtoverlay=sc16is750-i2c,<param>=<val>
++Params: int_pin GPIO used for IRQ (default 24)
++ addr Address (default 0x48)
++
++
+ Name: sc16is752-spi1
+ Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
+ Enables the chip on SPI1.
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
+@@ -0,0 +1,37 @@
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&i2c_arm>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ sc16is750: sc16is750@48 {
++ compatible = "nxp,sc16is750";
++ reg = <0x48>; /* address */
++ clocks = <&sc16is750_clk>;
++ interrupt-parent = <&gpio>;
++ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
++ #gpio-cells = <2>;
++
++ sc16is750_clk: sc16is750_clk {
++ compatible = "fixed-clock";
++ #clock-cells = <0>;
++ clock-frequency = <14745600>;
++ };
++ };
++ };
++ };
++
++
++ __overrides__ {
++ int_pin = <&sc16is750>,"interrupts:0";
++ addr = <&sc16is750>,"reg:0";
++ };
++
++};
--- /dev/null
+From 4f740b73749a855452f283909401139692633600 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Amadeusz=20S=C5=82awi=C5=84ski?=
+ <amadeusz.slawinski@tieto.com>
+Date: Thu, 14 Jul 2016 10:50:23 +0200
+Subject: [PATCH] Bluetooth: Fix l2cap_sock_setsockopt() with optname BT_RCVMTU
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+commit 23bc6ab0a0912146fd674a0becc758c3162baabc upstream.
+
+When we retrieve imtu value from userspace we should use 16 bit pointer
+cast instead of 32 as it's defined that way in headers. Fixes setsockopt
+calls on big-endian platforms.
+
+Signed-off-by: Amadeusz Sławiński <amadeusz.slawinski@tieto.com>
+Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ net/bluetooth/l2cap_sock.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/net/bluetooth/l2cap_sock.c
++++ b/net/bluetooth/l2cap_sock.c
+@@ -817,7 +817,7 @@ static int l2cap_sock_setsockopt(struct
+ break;
+ }
+
+- if (get_user(opt, (u32 __user *) optval)) {
++ if (get_user(opt, (u16 __user *) optval)) {
+ err = -EFAULT;
+ break;
+ }
+++ /dev/null
-From 2de4b29019b167f079ea48e30d641f7d0370bf08 Mon Sep 17 00:00:00 2001
-From: Georgii Staroselskii <gosha371@gmail.com>
-Date: Tue, 23 Aug 2016 17:40:05 +0400
-Subject: [PATCH] overlays: added sc16is750 UART over I2C (#1617)
-
----
- arch/arm/boot/dts/overlays/Makefile | 1 +
- arch/arm/boot/dts/overlays/README | 10 ++++++
- .../boot/dts/overlays/sc16is750-i2c-overlay.dts | 37 ++++++++++++++++++++++
- 3 files changed, 48 insertions(+)
- create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
-
---- a/arch/arm/boot/dts/overlays/Makefile
-+++ b/arch/arm/boot/dts/overlays/Makefile
-@@ -75,6 +75,7 @@ dtbo-$(RPI_DT_OVERLAYS) += rpi-ft5406.dt
- dtbo-$(RPI_DT_OVERLAYS) += rpi-proto.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rpi-sense.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += rra-digidac1-wm8741-audio.dtbo
-+dtbo-$(RPI_DT_OVERLAYS) += sc16is750-i2c.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sc16is752-spi1.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdhost.dtbo
- dtbo-$(RPI_DT_OVERLAYS) += sdio.dtbo
---- a/arch/arm/boot/dts/overlays/README
-+++ b/arch/arm/boot/dts/overlays/README
-@@ -935,6 +935,16 @@ Load: dtoverlay=rra-digidac1-wm8741-au
- Params: <None>
-
-
-+Name: sc16is750-i2c
-+Info: Overlay for the NXP SC16IS750 UART with I2C Interface
-+ Enables the chip on I2C1 at 0x48. To select another address,
-+ please refer to table 10 in reference manual.
-+
-+Load: dtoverlay=sc16is750-i2c,<param>=<val>
-+Params: int_pin GPIO used for IRQ (default 24)
-+ addr Address (default 0x48)
-+
-+
- Name: sc16is752-spi1
- Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
- Enables the chip on SPI1.
---- /dev/null
-+++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
-@@ -0,0 +1,37 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
-+
-+ fragment@0 {
-+ target = <&i2c_arm>;
-+ __overlay__ {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "okay";
-+
-+ sc16is750: sc16is750@48 {
-+ compatible = "nxp,sc16is750";
-+ reg = <0x48>; /* address */
-+ clocks = <&sc16is750_clk>;
-+ interrupt-parent = <&gpio>;
-+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
-+ #gpio-cells = <2>;
-+
-+ sc16is750_clk: sc16is750_clk {
-+ compatible = "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <14745600>;
-+ };
-+ };
-+ };
-+ };
-+
-+
-+ __overrides__ {
-+ int_pin = <&sc16is750>,"interrupts:0";
-+ addr = <&sc16is750>,"reg:0";
-+ };
-+
-+};
+++ /dev/null
-From 2b3cf031dfcef6f4fc803ae451364c70482404a8 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Amadeusz=20S=C5=82awi=C5=84ski?=
- <amadeusz.slawinski@tieto.com>
-Date: Thu, 14 Jul 2016 10:50:23 +0200
-Subject: [PATCH] Bluetooth: Fix l2cap_sock_setsockopt() with optname BT_RCVMTU
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-commit 23bc6ab0a0912146fd674a0becc758c3162baabc upstream.
-
-When we retrieve imtu value from userspace we should use 16 bit pointer
-cast instead of 32 as it's defined that way in headers. Fixes setsockopt
-calls on big-endian platforms.
-
-Signed-off-by: Amadeusz Sławiński <amadeusz.slawinski@tieto.com>
-Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
----
- net/bluetooth/l2cap_sock.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/net/bluetooth/l2cap_sock.c
-+++ b/net/bluetooth/l2cap_sock.c
-@@ -817,7 +817,7 @@ static int l2cap_sock_setsockopt(struct
- break;
- }
-
-- if (get_user(opt, (u32 __user *) optval)) {
-+ if (get_user(opt, (u16 __user *) optval)) {
- err = -EFAULT;
- break;
- }
--- /dev/null
+From a64c4779cd96af992937ff2e9a13dc6b93d0a6fe Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 23 Aug 2016 14:07:29 +0100
+Subject: [PATCH] config: Add CONFIG_IPVLAN module
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -448,6 +448,7 @@ CONFIG_BONDING=m
+ CONFIG_DUMMY=m
+ CONFIG_IFB=m
+ CONFIG_MACVLAN=m
++CONFIG_IPVLAN=m
+ CONFIG_NETCONSOLE=m
+ CONFIG_TUN=m
+ CONFIG_VETH=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -441,6 +441,7 @@ CONFIG_BONDING=m
+ CONFIG_DUMMY=m
+ CONFIG_IFB=m
+ CONFIG_MACVLAN=m
++CONFIG_IPVLAN=m
+ CONFIG_NETCONSOLE=m
+ CONFIG_TUN=m
+ CONFIG_VETH=m
+++ /dev/null
-From 0ae26a9c13742759f83f94678e23a4b1ff87c92e Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Tue, 23 Aug 2016 14:07:29 +0100
-Subject: [PATCH] config: Add CONFIG_IPVLAN module
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -448,6 +448,7 @@ CONFIG_BONDING=m
- CONFIG_DUMMY=m
- CONFIG_IFB=m
- CONFIG_MACVLAN=m
-+CONFIG_IPVLAN=m
- CONFIG_NETCONSOLE=m
- CONFIG_TUN=m
- CONFIG_VETH=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -441,6 +441,7 @@ CONFIG_BONDING=m
- CONFIG_DUMMY=m
- CONFIG_IFB=m
- CONFIG_MACVLAN=m
-+CONFIG_IPVLAN=m
- CONFIG_NETCONSOLE=m
- CONFIG_TUN=m
- CONFIG_VETH=m
--- /dev/null
+From c757e1201aee161e47b735b13cb2929a05e77c10 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 23 Aug 2016 14:08:55 +0100
+Subject: [PATCH] config: Add CONFIG_VXLAN module
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -449,6 +449,7 @@ CONFIG_DUMMY=m
+ CONFIG_IFB=m
+ CONFIG_MACVLAN=m
+ CONFIG_IPVLAN=m
++CONFIG_VXLAN=m
+ CONFIG_NETCONSOLE=m
+ CONFIG_TUN=m
+ CONFIG_VETH=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -442,6 +442,7 @@ CONFIG_DUMMY=m
+ CONFIG_IFB=m
+ CONFIG_MACVLAN=m
+ CONFIG_IPVLAN=m
++CONFIG_VXLAN=m
+ CONFIG_NETCONSOLE=m
+ CONFIG_TUN=m
+ CONFIG_VETH=m
--- /dev/null
+From 1bb11b1cfccb209ca841878ec650538e972a34ab Mon Sep 17 00:00:00 2001
+From: Simon Maes <simonn.maes@gmail.com>
+Date: Mon, 29 Aug 2016 21:11:01 +0200
+Subject: [PATCH] Fixes i2c_bcm2708: Write to FIFO correctly - v2 (#1574)
+
+* i2c: fix i2c_bcm2708: Clear FIFO before sending data
+
+Make sure FIFO gets cleared before trying to send
+data in case of a repeated start (COMBINED=Y).
+
+* i2c: fix i2c_bcm2708: Only write to FIFO when not full
+
+Check if FIFO can accept data before writing.
+To avoid a peripheral read on the last iteration of a loop,
+both bcm2708_bsc_fifo_fill and ~drain are changed as well.
+---
+ drivers/i2c/busses/i2c-bcm2708.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/i2c/busses/i2c-bcm2708.c
++++ b/drivers/i2c/busses/i2c-bcm2708.c
+@@ -115,13 +115,13 @@ static inline void bcm2708_bsc_reset(str
+
+ static inline void bcm2708_bsc_fifo_drain(struct bcm2708_i2c *bi)
+ {
+- while ((bcm2708_rd(bi, BSC_S) & BSC_S_RXD) && (bi->pos < bi->msg->len))
++ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_RXD))
+ bi->msg->buf[bi->pos++] = bcm2708_rd(bi, BSC_FIFO);
+ }
+
+ static inline void bcm2708_bsc_fifo_fill(struct bcm2708_i2c *bi)
+ {
+- while ((bcm2708_rd(bi, BSC_S) & BSC_S_TXD) && (bi->pos < bi->msg->len))
++ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_TXD))
+ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
+ }
+
+@@ -155,6 +155,10 @@ static inline int bcm2708_bsc_setup(stru
+ if ( (bi->nmsgs > 1) &&
+ !(bi->msg[0].flags & I2C_M_RD) && (bi->msg[1].flags & I2C_M_RD) &&
+ (bi->msg[0].addr == bi->msg[1].addr) && (bi->msg[0].len <= 16)) {
++
++ /* Clear FIFO */
++ bcm2708_wr(bi, BSC_C, BSC_C_CLEAR_1);
++
+ /* Fill FIFO with entire write message (16 byte FIFO) */
+ while (bi->pos < bi->msg->len) {
+ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
+++ /dev/null
-From 77861bfabc7b84513c6ccbbd2efbeaaca8e7e022 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Tue, 23 Aug 2016 14:08:55 +0100
-Subject: [PATCH] config: Add CONFIG_VXLAN module
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -449,6 +449,7 @@ CONFIG_DUMMY=m
- CONFIG_IFB=m
- CONFIG_MACVLAN=m
- CONFIG_IPVLAN=m
-+CONFIG_VXLAN=m
- CONFIG_NETCONSOLE=m
- CONFIG_TUN=m
- CONFIG_VETH=m
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -442,6 +442,7 @@ CONFIG_DUMMY=m
- CONFIG_IFB=m
- CONFIG_MACVLAN=m
- CONFIG_IPVLAN=m
-+CONFIG_VXLAN=m
- CONFIG_NETCONSOLE=m
- CONFIG_TUN=m
- CONFIG_VETH=m
+++ /dev/null
-From 1b6ee2ac8f1d55cb7ceeaa606e3d4868cfde363d Mon Sep 17 00:00:00 2001
-From: Simon Maes <simonn.maes@gmail.com>
-Date: Mon, 29 Aug 2016 21:11:01 +0200
-Subject: [PATCH] Fixes i2c_bcm2708: Write to FIFO correctly - v2 (#1574)
-
-* i2c: fix i2c_bcm2708: Clear FIFO before sending data
-
-Make sure FIFO gets cleared before trying to send
-data in case of a repeated start (COMBINED=Y).
-
-* i2c: fix i2c_bcm2708: Only write to FIFO when not full
-
-Check if FIFO can accept data before writing.
-To avoid a peripheral read on the last iteration of a loop,
-both bcm2708_bsc_fifo_fill and ~drain are changed as well.
----
- drivers/i2c/busses/i2c-bcm2708.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
---- a/drivers/i2c/busses/i2c-bcm2708.c
-+++ b/drivers/i2c/busses/i2c-bcm2708.c
-@@ -115,13 +115,13 @@ static inline void bcm2708_bsc_reset(str
-
- static inline void bcm2708_bsc_fifo_drain(struct bcm2708_i2c *bi)
- {
-- while ((bcm2708_rd(bi, BSC_S) & BSC_S_RXD) && (bi->pos < bi->msg->len))
-+ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_RXD))
- bi->msg->buf[bi->pos++] = bcm2708_rd(bi, BSC_FIFO);
- }
-
- static inline void bcm2708_bsc_fifo_fill(struct bcm2708_i2c *bi)
- {
-- while ((bcm2708_rd(bi, BSC_S) & BSC_S_TXD) && (bi->pos < bi->msg->len))
-+ while ((bi->pos < bi->msg->len) && (bcm2708_rd(bi, BSC_S) & BSC_S_TXD))
- bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
- }
-
-@@ -155,6 +155,10 @@ static inline int bcm2708_bsc_setup(stru
- if ( (bi->nmsgs > 1) &&
- !(bi->msg[0].flags & I2C_M_RD) && (bi->msg[1].flags & I2C_M_RD) &&
- (bi->msg[0].addr == bi->msg[1].addr) && (bi->msg[0].len <= 16)) {
-+
-+ /* Clear FIFO */
-+ bcm2708_wr(bi, BSC_C, BSC_C_CLEAR_1);
-+
- /* Fill FIFO with entire write message (16 byte FIFO) */
- while (bi->pos < bi->msg->len) {
- bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]);
--- /dev/null
+From e14a11520223fbb5d011a83f3de60cd56f3afad5 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 2 Sep 2016 17:21:42 +0100
+Subject: [PATCH] bcm2835-sdhost: Don't exit cmd wait loop on error
+
+The FAIL flag can be set in the CMD register before command processing
+is complete, leading to spurious "failed to complete" errors. This has
+the effect of promoting harmless CRC7 errors during CMD1 processing
+into errors that can delay and even prevent booting.
+
+Also:
+1) Convert the last KERN_ERROR message in the register dumping to
+ KERN_INFO.
+2) Remove an unnecessary reset call from bcm2835_sdhost_add_host.
+
+See: https://github.com/raspberrypi/linux/pull/1492
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ drivers/mmc/host/bcm2835-sdhost.c | 10 +++-------
+ 1 file changed, 3 insertions(+), 7 deletions(-)
+
+--- a/drivers/mmc/host/bcm2835-sdhost.c
++++ b/drivers/mmc/host/bcm2835-sdhost.c
+@@ -373,7 +373,7 @@ static void bcm2835_sdhost_dumpregs(stru
+ pr_info("%s: SDRSP2 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP2));
+- pr_err("%s: SDRSP3 0x%08x\n",
++ pr_info("%s: SDRSP3 0x%08x\n",
+ mmc_hostname(host->mmc),
+ bcm2835_sdhost_read(host, SDRSP3));
+ pr_info("%s: SDHSTS 0x%08x\n",
+@@ -1183,9 +1183,8 @@ static void bcm2835_sdhost_finish_comman
+ retries = 1; // We've already waited long enough this time
+ }
+
+- retries = host->cmd_quick_poll_retries;
+ for (sdcmd = bcm2835_sdhost_read(host, SDCMD);
+- (sdcmd & SDCMD_NEW_FLAG) && !(sdcmd & SDCMD_FAIL_FLAG) && retries;
++ (sdcmd & SDCMD_NEW_FLAG) && retries;
+ retries--) {
+ cpu_relax();
+ sdcmd = bcm2835_sdhost_read(host, SDCMD);
+@@ -1208,8 +1207,7 @@ static void bcm2835_sdhost_finish_comman
+ usleep_range(1, 10);
+ spin_lock_irqsave(&host->lock, *irq_flags);
+ sdcmd = bcm2835_sdhost_read(host, SDCMD);
+- if (!(sdcmd & SDCMD_NEW_FLAG) ||
+- (sdcmd & SDCMD_FAIL_FLAG))
++ if (!(sdcmd & SDCMD_NEW_FLAG))
+ break;
+ }
+ }
+@@ -1892,8 +1890,6 @@ int bcm2835_sdhost_add_host(struct bcm28
+
+ mmc = host->mmc;
+
+- bcm2835_sdhost_reset_internal(host);
+-
+ mmc->f_max = host->max_clk;
+ mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV;
+
--- /dev/null
+From e69474ab771cd527c98a546bc0afc84d13662c04 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 2 Sep 2016 14:35:37 +0100
+Subject: [PATCH] BCM270X_DT: Use bcm2835-sdhost on Compute Module
+
+With the preceding commit:
+
+ bcm2835-sdhost: Don't exit cmd wait loop on error
+
+it is safe to use the bcm2835-sdhost driver on the Compute Module.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
+@@ -23,9 +23,9 @@
+ };
+
+
+-&mmc {
++&sdhost {
+ pinctrl-names = "default";
+- pinctrl-0 = <&mmc_pins>;
++ pinctrl-0 = <&sdhost_pins>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+++ /dev/null
-From 0ca1a9040cff3ace3d7fce5cdd83f1cbaa8da50c Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 2 Sep 2016 17:21:42 +0100
-Subject: [PATCH] bcm2835-sdhost: Don't exit cmd wait loop on error
-
-The FAIL flag can be set in the CMD register before command processing
-is complete, leading to spurious "failed to complete" errors. This has
-the effect of promoting harmless CRC7 errors during CMD1 processing
-into errors that can delay and even prevent booting.
-
-Also:
-1) Convert the last KERN_ERROR message in the register dumping to
- KERN_INFO.
-2) Remove an unnecessary reset call from bcm2835_sdhost_add_host.
-
-See: https://github.com/raspberrypi/linux/pull/1492
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- drivers/mmc/host/bcm2835-sdhost.c | 10 +++-------
- 1 file changed, 3 insertions(+), 7 deletions(-)
-
---- a/drivers/mmc/host/bcm2835-sdhost.c
-+++ b/drivers/mmc/host/bcm2835-sdhost.c
-@@ -373,7 +373,7 @@ static void bcm2835_sdhost_dumpregs(stru
- pr_info("%s: SDRSP2 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDRSP2));
-- pr_err("%s: SDRSP3 0x%08x\n",
-+ pr_info("%s: SDRSP3 0x%08x\n",
- mmc_hostname(host->mmc),
- bcm2835_sdhost_read(host, SDRSP3));
- pr_info("%s: SDHSTS 0x%08x\n",
-@@ -1183,9 +1183,8 @@ static void bcm2835_sdhost_finish_comman
- retries = 1; // We've already waited long enough this time
- }
-
-- retries = host->cmd_quick_poll_retries;
- for (sdcmd = bcm2835_sdhost_read(host, SDCMD);
-- (sdcmd & SDCMD_NEW_FLAG) && !(sdcmd & SDCMD_FAIL_FLAG) && retries;
-+ (sdcmd & SDCMD_NEW_FLAG) && retries;
- retries--) {
- cpu_relax();
- sdcmd = bcm2835_sdhost_read(host, SDCMD);
-@@ -1208,8 +1207,7 @@ static void bcm2835_sdhost_finish_comman
- usleep_range(1, 10);
- spin_lock_irqsave(&host->lock, *irq_flags);
- sdcmd = bcm2835_sdhost_read(host, SDCMD);
-- if (!(sdcmd & SDCMD_NEW_FLAG) ||
-- (sdcmd & SDCMD_FAIL_FLAG))
-+ if (!(sdcmd & SDCMD_NEW_FLAG))
- break;
- }
- }
-@@ -1892,8 +1890,6 @@ int bcm2835_sdhost_add_host(struct bcm28
-
- mmc = host->mmc;
-
-- bcm2835_sdhost_reset_internal(host);
--
- mmc->f_max = host->max_clk;
- mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV;
-
+++ /dev/null
-From 6288d4a7b700cbb8c1c72210c9b2017cf8bc7dd2 Mon Sep 17 00:00:00 2001
-From: Phil Elwell <phil@raspberrypi.org>
-Date: Fri, 2 Sep 2016 14:35:37 +0100
-Subject: [PATCH] BCM270X_DT: Use bcm2835-sdhost on Compute Module
-
-With the preceding commit:
-
- bcm2835-sdhost: Don't exit cmd wait loop on error
-
-it is safe to use the bcm2835-sdhost driver on the Compute Module.
-
-Signed-off-by: Phil Elwell <phil@raspberrypi.org>
----
- arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
-+++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
-@@ -23,9 +23,9 @@
- };
-
-
--&mmc {
-+&sdhost {
- pinctrl-names = "default";
-- pinctrl-0 = <&mmc_pins>;
-+ pinctrl-0 = <&sdhost_pins>;
- non-removable;
- bus-width = <4>;
- status = "okay";
--- /dev/null
+From b5dd047d429d99a2e9a567d29df581e21e7ba071 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Wed, 7 Sep 2016 16:57:59 +0100
+Subject: [PATCH] fbmem: Ensure that parameters are properly checked within
+ fb_copyarea_user
+
+---
+ drivers/video/fbdev/core/fbmem.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/video/fbdev/core/fbmem.c
++++ b/drivers/video/fbdev/core/fbmem.c
+@@ -1090,7 +1090,13 @@ static int fb_copyarea_user(struct fb_in
+ int ret = 0;
+ if (!lock_fb_info(info))
+ return -ENODEV;
+- if (copy->dx + copy->width > info->var.xres ||
++ if (copy->dx >= info->var.xres ||
++ copy->sx >= info->var.xres ||
++ copy->width > info->var.xres ||
++ copy->dy >= info->var.yres ||
++ copy->sy >= info->var.yres ||
++ copy->height > info->var.yres ||
++ copy->dx + copy->width > info->var.xres ||
+ copy->sx + copy->width > info->var.xres ||
+ copy->dy + copy->height > info->var.yres ||
+ copy->sy + copy->height > info->var.yres) {
--- /dev/null
+From f9235a23a6a38f7c2ef6851113874a340781f84a Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 9 Sep 2016 19:35:13 +0100
+Subject: [PATCH] config: Enabled SENSORS_INA2XX module
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -649,6 +649,7 @@ CONFIG_HWMON=m
+ CONFIG_SENSORS_LM75=m
+ CONFIG_SENSORS_SHT21=m
+ CONFIG_SENSORS_SHTC1=m
++CONFIG_SENSORS_INA2XX=m
+ CONFIG_THERMAL=y
+ CONFIG_THERMAL_BCM2835=y
+ CONFIG_WATCHDOG=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -641,6 +641,7 @@ CONFIG_HWMON=m
+ CONFIG_SENSORS_LM75=m
+ CONFIG_SENSORS_SHT21=m
+ CONFIG_SENSORS_SHTC1=m
++CONFIG_SENSORS_INA2XX=m
+ CONFIG_THERMAL=y
+ CONFIG_THERMAL_BCM2835=y
+ CONFIG_WATCHDOG=y
+++ /dev/null
-From 7c8c6f113e1169690dbfbfc486360d10452e5a85 Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Wed, 7 Sep 2016 16:57:59 +0100
-Subject: [PATCH] fbmem: Ensure that parameters are properly checked within
- fb_copyarea_user
-
----
- drivers/video/fbdev/core/fbmem.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
---- a/drivers/video/fbdev/core/fbmem.c
-+++ b/drivers/video/fbdev/core/fbmem.c
-@@ -1090,7 +1090,13 @@ static int fb_copyarea_user(struct fb_in
- int ret = 0;
- if (!lock_fb_info(info))
- return -ENODEV;
-- if (copy->dx + copy->width > info->var.xres ||
-+ if (copy->dx >= info->var.xres ||
-+ copy->sx >= info->var.xres ||
-+ copy->width > info->var.xres ||
-+ copy->dy >= info->var.yres ||
-+ copy->sy >= info->var.yres ||
-+ copy->height > info->var.yres ||
-+ copy->dx + copy->width > info->var.xres ||
- copy->sx + copy->width > info->var.xres ||
- copy->dy + copy->height > info->var.yres ||
- copy->sy + copy->height > info->var.yres) {
+++ /dev/null
-From a2aac70ca118d0a4cc7321cfcc4bf7884dd4208c Mon Sep 17 00:00:00 2001
-From: popcornmix <popcornmix@gmail.com>
-Date: Fri, 9 Sep 2016 19:35:13 +0100
-Subject: [PATCH] config: Enabled SENSORS_INA2XX module
-
----
- arch/arm/configs/bcm2709_defconfig | 1 +
- arch/arm/configs/bcmrpi_defconfig | 1 +
- 2 files changed, 2 insertions(+)
-
---- a/arch/arm/configs/bcm2709_defconfig
-+++ b/arch/arm/configs/bcm2709_defconfig
-@@ -649,6 +649,7 @@ CONFIG_HWMON=m
- CONFIG_SENSORS_LM75=m
- CONFIG_SENSORS_SHT21=m
- CONFIG_SENSORS_SHTC1=m
-+CONFIG_SENSORS_INA2XX=m
- CONFIG_THERMAL=y
- CONFIG_THERMAL_BCM2835=y
- CONFIG_WATCHDOG=y
---- a/arch/arm/configs/bcmrpi_defconfig
-+++ b/arch/arm/configs/bcmrpi_defconfig
-@@ -641,6 +641,7 @@ CONFIG_HWMON=m
- CONFIG_SENSORS_LM75=m
- CONFIG_SENSORS_SHT21=m
- CONFIG_SENSORS_SHTC1=m
-+CONFIG_SENSORS_INA2XX=m
- CONFIG_THERMAL=y
- CONFIG_THERMAL_BCM2835=y
- CONFIG_WATCHDOG=y
--- /dev/null
+From 654ea8a724a4abaf000841788cec8f90756682a7 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <pelwell@users.noreply.github.com>
+Date: Mon, 12 Sep 2016 13:46:56 +0100
+Subject: [PATCH] overlays: Add dpi18 overlay (#1634)
+
+Add support for 18-bit DPI displays. Although the dpi24 overlay could
+be used, this overlay leaves GPIOs 22-27 free for other uses.
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 8 +++++++
+ arch/arm/boot/dts/overlays/dpi18-overlay.dts | 31 ++++++++++++++++++++++++++++
+ 3 files changed, 40 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -22,6 +22,7 @@ dtbo-$(RPI_DT_OVERLAYS) += audremap.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += bmp085_i2c-sensor.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dht11.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dionaudio-loco.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += dpi18.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -283,6 +283,14 @@ Load: dtoverlay=dionaudio-loco
+ Params: <None>
+
+
++Name: dpi18
++Info: Overlay for a generic 18-bit DPI display
++ This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
++ 2-3 seconds after the kernel has started.
++Load: dtoverlay=dpi18
++Params: <None>
++
++
+ Name: dpi24
+ Info: Overlay for a generic 24-bit DPI display
+ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
+@@ -0,0 +1,31 @@
++/dts-v1/;
++/plugin/;
++
++/{
++ compatible = "brcm,bcm2708";
++
++ // There is no DPI driver module, but we need a platform device
++ // node (that doesn't already use pinctrl) to hang the pinctrl
++ // reference on - leds will do
++
++ fragment@0 {
++ target = <&leds>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&dpi18_pins>;
++ };
++ };
++
++ fragment@1 {
++ target = <&gpio>;
++ __overlay__ {
++ dpi18_pins: dpi18_pins {
++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
++ 12 13 14 15 16 17 18 19 20
++ 21>;
++ brcm,function = <6>; /* alt2 */
++ brcm,pull = <0>; /* no pull */
++ };
++ };
++ };
++};
--- /dev/null
+From 5c0d836a77af123123d7a4144d5069c2d675a23d Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 30 Aug 2016 13:57:38 -0700
+Subject: [PATCH] drm/vc4: Allow some more signals to be packed with uniform
+ resets.
+
+The intent was to make sure people don't sneak in a small immediate or
+something to change the interpretation of the uniform update args, but
+these signals are just fine.
+
+Fixes a validation failure in the current X server on some Render
+operation.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 313a61d30761217ce4383018de1cc0d5d503a376)
+---
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -309,8 +309,14 @@ validate_uniform_address_write(struct vc
+ * of uniforms on each side. However, this scheme is easy to
+ * validate so it's all we allow for now.
+ */
+-
+- if (QPU_GET_FIELD(inst, QPU_SIG) != QPU_SIG_NONE) {
++ switch (QPU_GET_FIELD(inst, QPU_SIG)) {
++ case QPU_SIG_NONE:
++ case QPU_SIG_SCOREBOARD_UNLOCK:
++ case QPU_SIG_COLOR_LOAD:
++ case QPU_SIG_LOAD_TMU0:
++ case QPU_SIG_LOAD_TMU1:
++ break;
++ default:
+ DRM_ERROR("uniforms address change must be "
+ "normal math\n");
+ return false;
--- /dev/null
+From d80f8d5336690bb4b8ee3b5b374d63062ca2a1cc Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 14 Sep 2016 09:16:19 +0100
+Subject: [PATCH] raspberrypi-firmware: Export the general transaction
+ function.
+
+The vc4-firmware-kms module is going to be doing the MBOX FB call.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/firmware/raspberrypi.c | 3 ++-
+ include/soc/bcm2835/raspberrypi-firmware.h | 1 +
+ 2 files changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/firmware/raspberrypi.c
++++ b/drivers/firmware/raspberrypi.c
+@@ -42,7 +42,7 @@ static void response_callback(struct mbo
+ * Sends a request to the firmware through the BCM2835 mailbox driver,
+ * and synchronously waits for the reply.
+ */
+-static int
++int
+ rpi_firmware_transaction(struct rpi_firmware *fw, u32 chan, u32 data)
+ {
+ u32 message = MBOX_MSG(chan, data);
+@@ -63,6 +63,7 @@ rpi_firmware_transaction(struct rpi_firm
+
+ return ret;
+ }
++EXPORT_SYMBOL_GPL(rpi_firmware_transaction);
+
+ /**
+ * rpi_firmware_property_list - Submit firmware property list
+--- a/include/soc/bcm2835/raspberrypi-firmware.h
++++ b/include/soc/bcm2835/raspberrypi-firmware.h
+@@ -129,5 +129,6 @@ int rpi_firmware_property(struct rpi_fir
+ int rpi_firmware_property_list(struct rpi_firmware *fw,
+ void *data, size_t tag_size);
+ struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node);
++int rpi_firmware_transaction(struct rpi_firmware *fw, u32 chan, u32 data);
+
+ #endif /* __SOC_RASPBERRY_FIRMWARE_H__ */
--- /dev/null
+From 1d8a5891026bb0c8202a62174377b0e8b34a96e2 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 14 Sep 2016 09:18:09 +0100
+Subject: [PATCH] raspberrypi-firmware: Define the MBOX channel in the header.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ include/soc/bcm2835/raspberrypi-firmware.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/include/soc/bcm2835/raspberrypi-firmware.h
++++ b/include/soc/bcm2835/raspberrypi-firmware.h
+@@ -12,6 +12,8 @@
+ #include <linux/types.h>
+ #include <linux/of_device.h>
+
++#define RPI_FIRMWARE_CHAN_FB 1
++
+ struct rpi_firmware;
+
+ enum rpi_firmware_property_status {
--- /dev/null
+From ceb205fa42f950c74172f9bbce65f1df3fdfdb34 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 14 Sep 2016 08:39:33 +0100
+Subject: [PATCH] drm/vc4: Add a mode for using the closed firmware for
+ display.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/Makefile | 1 +
+ drivers/gpu/drm/vc4/vc4_crtc.c | 13 +
+ drivers/gpu/drm/vc4/vc4_drv.c | 10 +-
+ drivers/gpu/drm/vc4/vc4_drv.h | 7 +
+ drivers/gpu/drm/vc4/vc4_firmware_kms.c | 660 +++++++++++++++++++++++++++++++++
+ 5 files changed, 689 insertions(+), 2 deletions(-)
+ create mode 100644 drivers/gpu/drm/vc4/vc4_firmware_kms.c
+
+--- a/drivers/gpu/drm/vc4/Makefile
++++ b/drivers/gpu/drm/vc4/Makefile
+@@ -9,6 +9,7 @@ vc4-y := \
+ vc4_drv.o \
+ vc4_dpi.o \
+ vc4_dsi.o \
++ vc4_firmware_kms.o \
+ vc4_kms.o \
+ vc4_gem.o \
+ vc4_hdmi.o \
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -151,6 +151,9 @@ int vc4_crtc_get_scanoutpos(struct drm_d
+ int vblank_lines;
+ int ret = 0;
+
++ if (vc4->firmware_kms)
++ return 0;
++
+ /*
+ * XXX Doesn't work well in interlaced mode yet, partially due
+ * to problems in vc4 kms or drm core interlaced mode handling,
+@@ -639,6 +642,11 @@ int vc4_enable_vblank(struct drm_device
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id];
+
++ if (vc4->firmware_kms) {
++ /* XXX: Can we mask the SMI interrupt? */
++ return 0;
++ }
++
+ CRTC_WRITE(PV_INTEN, PV_INT_VFP_START);
+
+ return 0;
+@@ -649,6 +657,11 @@ void vc4_disable_vblank(struct drm_devic
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id];
+
++ if (vc4->firmware_kms) {
++ /* XXX: Can we mask the SMI interrupt? */
++ return;
++ }
++
+ CRTC_WRITE(PV_INTEN, 0);
+ }
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -47,10 +47,15 @@ void __iomem *vc4_ioremap_regs(struct pl
+
+ static void vc4_drm_preclose(struct drm_device *dev, struct drm_file *file)
+ {
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ struct drm_crtc *crtc;
+
+- list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
+- vc4_cancel_page_flip(crtc, file);
++ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
++ if (vc4->firmware_kms)
++ vc4_fkms_cancel_page_flip(crtc, file);
++ else
++ vc4_cancel_page_flip(crtc, file);
++ }
+ }
+
+ void vc4_dump_regs32(const struct debugfs_reg32 *regs, unsigned int num_regs,
+@@ -331,6 +336,7 @@ static struct platform_driver *const com
+ &vc4_dsi_driver,
+ &vc4_hvs_driver,
+ &vc4_crtc_driver,
++ &vc4_firmware_kms_driver,
+ &vc4_v3d_driver,
+ };
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -14,6 +14,9 @@ struct debugfs_reg32;
+ struct vc4_dev {
+ struct drm_device *dev;
+
++ bool firmware_kms;
++ struct rpi_firmware *firmware;
++
+ struct vc4_hdmi *hdmi;
+ struct vc4_hvs *hvs;
+ struct vc4_crtc *crtc[3];
+@@ -461,6 +464,10 @@ int vc4_dpi_debugfs_regs(struct seq_file
+ extern struct platform_driver vc4_dsi_driver;
+ int vc4_dsi_debugfs_regs(struct seq_file *m, void *unused);
+
++/* vc4_firmware_kms.c */
++extern struct platform_driver vc4_firmware_kms_driver;
++void vc4_fkms_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
++
+ /* vc4_gem.c */
+ void vc4_gem_init(struct drm_device *dev);
+ void vc4_gem_destroy(struct drm_device *dev);
+--- /dev/null
++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c
+@@ -0,0 +1,660 @@
++/*
++ * Copyright (C) 2016 Broadcom
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++/**
++ * DOC: VC4 firmware KMS module.
++ *
++ * As a hack to get us from the current closed source driver world
++ * toward a totally open stack, implement KMS on top of the Raspberry
++ * Pi's firmware display stack.
++ */
++
++#include "drm_atomic.h"
++#include "drm_atomic_helper.h"
++#include "drm_plane_helper.h"
++#include "drm_crtc_helper.h"
++#include "linux/clk.h"
++#include "linux/debugfs.h"
++#include "drm_fb_cma_helper.h"
++#include "linux/component.h"
++#include "linux/of_device.h"
++#include "vc4_drv.h"
++#include "vc4_regs.h"
++#include <soc/bcm2835/raspberrypi-firmware.h>
++
++/* The firmware delivers a vblank interrupt to us through the SMI
++ * hardware, which has only this one register.
++ */
++#define SMICS 0x0
++#define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11))
++
++struct vc4_crtc {
++ struct drm_crtc base;
++ struct drm_encoder *encoder;
++ struct drm_connector *connector;
++ void __iomem *regs;
++
++ struct drm_pending_vblank_event *event;
++};
++
++static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc)
++{
++ return container_of(crtc, struct vc4_crtc, base);
++}
++
++struct vc4_fkms_encoder {
++ struct drm_encoder base;
++};
++
++static inline struct vc4_fkms_encoder *
++to_vc4_fkms_encoder(struct drm_encoder *encoder)
++{
++ return container_of(encoder, struct vc4_fkms_encoder, base);
++}
++
++/* VC4 FKMS connector KMS struct */
++struct vc4_fkms_connector {
++ struct drm_connector base;
++
++ /* Since the connector is attached to just the one encoder,
++ * this is the reference to it so we can do the best_encoder()
++ * hook.
++ */
++ struct drm_encoder *encoder;
++};
++
++static inline struct vc4_fkms_connector *
++to_vc4_fkms_connector(struct drm_connector *connector)
++{
++ return container_of(connector, struct vc4_fkms_connector, base);
++}
++
++/* Firmware's structure for making an FB mbox call. */
++struct fbinfo_s {
++ u32 xres, yres, xres_virtual, yres_virtual;
++ u32 pitch, bpp;
++ u32 xoffset, yoffset;
++ u32 base;
++ u32 screen_size;
++ u16 cmap[256];
++};
++
++struct vc4_fkms_plane {
++ struct drm_plane base;
++ struct fbinfo_s *fbinfo;
++ dma_addr_t fbinfo_bus_addr;
++ u32 pitch;
++};
++
++static inline struct vc4_fkms_plane *to_vc4_fkms_plane(struct drm_plane *plane)
++{
++ return (struct vc4_fkms_plane *)plane;
++}
++
++/* Turns the display on/off. */
++static int vc4_plane_set_primary_blank(struct drm_plane *plane, bool blank)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
++
++ u32 packet = blank;
++ return rpi_firmware_property(vc4->firmware,
++ RPI_FIRMWARE_FRAMEBUFFER_BLANK,
++ &packet, sizeof(packet));
++}
++
++static void vc4_primary_plane_atomic_update(struct drm_plane *plane,
++ struct drm_plane_state *old_state)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
++ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane);
++ struct drm_plane_state *state = plane->state;
++ struct drm_framebuffer *fb = state->fb;
++ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
++ volatile struct fbinfo_s *fbinfo = vc4_plane->fbinfo;
++ u32 bpp = 32;
++ int ret;
++
++ vc4_plane_set_primary_blank(plane, false);
++
++ fbinfo->xres = state->crtc_w;
++ fbinfo->yres = state->crtc_h;
++ fbinfo->xres_virtual = state->crtc_w;
++ fbinfo->yres_virtual = state->crtc_h;
++ fbinfo->bpp = bpp;
++ fbinfo->xoffset = state->crtc_x;
++ fbinfo->yoffset = state->crtc_y;
++ fbinfo->base = bo->paddr + fb->offsets[0];
++ fbinfo->pitch = fb->pitches[0];
++ /* A bug in the firmware makes it so that if the fb->base is
++ * set to nonzero, the configured pitch gets overwritten with
++ * the previous pitch. So, to get the configured pitch
++ * recomputed, we have to make it allocate itself a new buffer
++ * in VC memory, first.
++ */
++ if (vc4_plane->pitch != fb->pitches[0]) {
++ u32 saved_base = fbinfo->base;
++ fbinfo->base = 0;
++
++ ret = rpi_firmware_transaction(vc4->firmware,
++ RPI_FIRMWARE_CHAN_FB,
++ vc4_plane->fbinfo_bus_addr);
++ fbinfo->base = saved_base;
++
++ vc4_plane->pitch = fbinfo->pitch;
++ WARN_ON_ONCE(vc4_plane->pitch != fb->pitches[0]);
++ }
++
++ ret = rpi_firmware_transaction(vc4->firmware,
++ RPI_FIRMWARE_CHAN_FB,
++ vc4_plane->fbinfo_bus_addr);
++ WARN_ON_ONCE(fbinfo->pitch != fb->pitches[0]);
++ WARN_ON_ONCE(fbinfo->base != bo->paddr + fb->offsets[0]);
++}
++
++static void vc4_primary_plane_atomic_disable(struct drm_plane *plane,
++ struct drm_plane_state *old_state)
++{
++ vc4_plane_set_primary_blank(plane, true);
++}
++
++static void vc4_cursor_plane_atomic_update(struct drm_plane *plane,
++ struct drm_plane_state *old_state)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
++ struct drm_plane_state *state = plane->state;
++ struct drm_framebuffer *fb = state->fb;
++ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
++ int ret;
++ u32 packet_state[] = { true, state->crtc_x, state->crtc_y, 0 };
++ u32 packet_info[] = { state->crtc_w, state->crtc_h,
++ 0, /* unused */
++ bo->paddr + fb->offsets[0],
++ 0, 0, /* hotx, hoty */};
++ WARN_ON_ONCE(fb->pitches[0] != state->crtc_w * 4);
++ WARN_ON_ONCE(fb->bits_per_pixel != 32);
++
++ ret = rpi_firmware_property(vc4->firmware,
++ RPI_FIRMWARE_SET_CURSOR_STATE,
++ &packet_state,
++ sizeof(packet_state));
++ if (ret || packet_state[0] != 0)
++ DRM_ERROR("Failed to set cursor state: 0x%08x\n", packet_state[0]);
++
++ ret = rpi_firmware_property(vc4->firmware,
++ RPI_FIRMWARE_SET_CURSOR_INFO,
++ &packet_info,
++ sizeof(packet_info));
++ if (ret || packet_info[0] != 0)
++ DRM_ERROR("Failed to set cursor info: 0x%08x\n", packet_info[0]);
++}
++
++static void vc4_cursor_plane_atomic_disable(struct drm_plane *plane,
++ struct drm_plane_state *old_state)
++{
++ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
++ u32 packet_state[] = { false, 0, 0, 0 };
++ int ret;
++
++ ret = rpi_firmware_property(vc4->firmware,
++ RPI_FIRMWARE_SET_CURSOR_STATE,
++ &packet_state,
++ sizeof(packet_state));
++ if (ret || packet_state[0] != 0)
++ DRM_ERROR("Failed to set cursor state: 0x%08x\n", packet_state[0]);
++}
++
++static int vc4_plane_atomic_check(struct drm_plane *plane,
++ struct drm_plane_state *state)
++{
++ return 0;
++}
++
++static void vc4_plane_destroy(struct drm_plane *plane)
++{
++ drm_plane_helper_disable(plane);
++ drm_plane_cleanup(plane);
++}
++
++static const struct drm_plane_funcs vc4_plane_funcs = {
++ .update_plane = drm_atomic_helper_update_plane,
++ .disable_plane = drm_atomic_helper_disable_plane,
++ .destroy = vc4_plane_destroy,
++ .set_property = NULL,
++ .reset = drm_atomic_helper_plane_reset,
++ .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
++ .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
++};
++
++static const struct drm_plane_helper_funcs vc4_primary_plane_helper_funcs = {
++ .prepare_fb = NULL,
++ .cleanup_fb = NULL,
++ .atomic_check = vc4_plane_atomic_check,
++ .atomic_update = vc4_primary_plane_atomic_update,
++ .atomic_disable = vc4_primary_plane_atomic_disable,
++};
++
++static const struct drm_plane_helper_funcs vc4_cursor_plane_helper_funcs = {
++ .prepare_fb = NULL,
++ .cleanup_fb = NULL,
++ .atomic_check = vc4_plane_atomic_check,
++ .atomic_update = vc4_cursor_plane_atomic_update,
++ .atomic_disable = vc4_cursor_plane_atomic_disable,
++};
++
++static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev,
++ enum drm_plane_type type)
++{
++ struct drm_plane *plane = NULL;
++ struct vc4_fkms_plane *vc4_plane;
++ u32 xrgb8888 = DRM_FORMAT_XRGB8888;
++ u32 argb8888 = DRM_FORMAT_ARGB8888;
++ int ret = 0;
++ bool primary = (type == DRM_PLANE_TYPE_PRIMARY);
++
++ vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane),
++ GFP_KERNEL);
++ if (!vc4_plane) {
++ ret = -ENOMEM;
++ goto fail;
++ }
++
++ plane = &vc4_plane->base;
++ ret = drm_universal_plane_init(dev, plane, 0xff,
++ &vc4_plane_funcs,
++ primary ? &xrgb8888 : &argb8888, 1,
++ type);
++
++ if (type == DRM_PLANE_TYPE_PRIMARY) {
++ vc4_plane->fbinfo =
++ dma_alloc_coherent(dev->dev,
++ sizeof(*vc4_plane->fbinfo),
++ &vc4_plane->fbinfo_bus_addr,
++ GFP_KERNEL);
++ memset(vc4_plane->fbinfo, 0, sizeof(*vc4_plane->fbinfo));
++
++ drm_plane_helper_add(plane, &vc4_primary_plane_helper_funcs);
++ } else {
++ drm_plane_helper_add(plane, &vc4_cursor_plane_helper_funcs);
++ }
++
++ return plane;
++fail:
++ if (plane)
++ vc4_plane_destroy(plane);
++
++ return ERR_PTR(ret);
++}
++
++static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
++{
++ /* Everyting is handled in the planes. */
++}
++
++static void vc4_crtc_disable(struct drm_crtc *crtc)
++{
++}
++
++static void vc4_crtc_enable(struct drm_crtc *crtc)
++{
++}
++
++static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
++ struct drm_crtc_state *state)
++{
++ return 0;
++}
++
++static void vc4_crtc_atomic_flush(struct drm_crtc *crtc,
++ struct drm_crtc_state *old_state)
++{
++}
++
++static void vc4_crtc_handle_page_flip(struct vc4_crtc *vc4_crtc)
++{
++ struct drm_crtc *crtc = &vc4_crtc->base;
++ struct drm_device *dev = crtc->dev;
++ unsigned long flags;
++
++ spin_lock_irqsave(&dev->event_lock, flags);
++ if (vc4_crtc->event) {
++ drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
++ vc4_crtc->event = NULL;
++ drm_crtc_vblank_put(crtc);
++ }
++ spin_unlock_irqrestore(&dev->event_lock, flags);
++}
++
++static irqreturn_t vc4_crtc_irq_handler(int irq, void *data)
++{
++ struct vc4_crtc *vc4_crtc = data;
++ u32 stat = readl(vc4_crtc->regs + SMICS);
++ irqreturn_t ret = IRQ_NONE;
++
++ if (stat & SMICS_INTERRUPTS) {
++ writel(0, vc4_crtc->regs + SMICS);
++ drm_crtc_handle_vblank(&vc4_crtc->base);
++ vc4_crtc_handle_page_flip(vc4_crtc);
++ ret = IRQ_HANDLED;
++ }
++
++ return ret;
++}
++
++static int vc4_page_flip(struct drm_crtc *crtc,
++ struct drm_framebuffer *fb,
++ struct drm_pending_vblank_event *event,
++ uint32_t flags)
++{
++ if (flags & DRM_MODE_PAGE_FLIP_ASYNC) {
++ DRM_ERROR("Async flips aren't allowed\n");
++ return -EINVAL;
++ }
++
++ return drm_atomic_helper_page_flip(crtc, fb, event, flags);
++}
++
++static const struct drm_crtc_funcs vc4_crtc_funcs = {
++ .set_config = drm_atomic_helper_set_config,
++ .destroy = drm_crtc_cleanup,
++ .page_flip = vc4_page_flip,
++ .set_property = NULL,
++ .cursor_set = NULL, /* handled by drm_mode_cursor_universal */
++ .cursor_move = NULL, /* handled by drm_mode_cursor_universal */
++ .reset = drm_atomic_helper_crtc_reset,
++ .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
++ .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
++};
++
++static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = {
++ .mode_set_nofb = vc4_crtc_mode_set_nofb,
++ .disable = vc4_crtc_disable,
++ .enable = vc4_crtc_enable,
++ .atomic_check = vc4_crtc_atomic_check,
++ .atomic_flush = vc4_crtc_atomic_flush,
++};
++
++/* Frees the page flip event when the DRM device is closed with the
++ * event still outstanding.
++ */
++void vc4_fkms_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file)
++{
++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
++ struct drm_device *dev = crtc->dev;
++ unsigned long flags;
++
++ spin_lock_irqsave(&dev->event_lock, flags);
++
++ if (vc4_crtc->event && vc4_crtc->event->base.file_priv == file) {
++ vc4_crtc->event->base.destroy(&vc4_crtc->event->base);
++ drm_crtc_vblank_put(crtc);
++ vc4_crtc->event = NULL;
++ }
++
++ spin_unlock_irqrestore(&dev->event_lock, flags);
++}
++
++static const struct of_device_id vc4_firmware_kms_dt_match[] = {
++ { .compatible = "raspberrypi,rpi-firmware-kms" },
++ {}
++};
++
++static enum drm_connector_status
++vc4_fkms_connector_detect(struct drm_connector *connector, bool force)
++{
++ return connector_status_connected;
++}
++
++static int vc4_fkms_connector_get_modes(struct drm_connector *connector)
++{
++ struct drm_device *dev = connector->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ u32 wh[2] = {0, 0};
++ int ret;
++ struct drm_display_mode *mode;
++
++ ret = rpi_firmware_property(vc4->firmware,
++ RPI_FIRMWARE_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT,
++ &wh, sizeof(wh));
++ if (ret) {
++ DRM_ERROR("Failed to get screen size: %d (0x%08x 0x%08x)\n",
++ ret, wh[0], wh[1]);
++ return 0;
++ }
++
++ mode = drm_cvt_mode(dev, wh[0], wh[1], 60 /* vrefresh */,
++ 0, 0, false);
++ drm_mode_probed_add(connector, mode);
++
++ return 1;
++}
++
++static struct drm_encoder *
++vc4_fkms_connector_best_encoder(struct drm_connector *connector)
++{
++ struct vc4_fkms_connector *fkms_connector =
++ to_vc4_fkms_connector(connector);
++ return fkms_connector->encoder;
++}
++
++static void vc4_fkms_connector_destroy(struct drm_connector *connector)
++{
++ drm_connector_unregister(connector);
++ drm_connector_cleanup(connector);
++}
++
++static const struct drm_connector_funcs vc4_fkms_connector_funcs = {
++ .dpms = drm_atomic_helper_connector_dpms,
++ .detect = vc4_fkms_connector_detect,
++ .fill_modes = drm_helper_probe_single_connector_modes,
++ .destroy = vc4_fkms_connector_destroy,
++ .reset = drm_atomic_helper_connector_reset,
++ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
++ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
++};
++
++static const struct drm_connector_helper_funcs vc4_fkms_connector_helper_funcs = {
++ .get_modes = vc4_fkms_connector_get_modes,
++ .best_encoder = vc4_fkms_connector_best_encoder,
++};
++
++static struct drm_connector *vc4_fkms_connector_init(struct drm_device *dev,
++ struct drm_encoder *encoder)
++{
++ struct drm_connector *connector = NULL;
++ struct vc4_fkms_connector *fkms_connector;
++ int ret = 0;
++
++ fkms_connector = devm_kzalloc(dev->dev, sizeof(*fkms_connector),
++ GFP_KERNEL);
++ if (!fkms_connector) {
++ ret = -ENOMEM;
++ goto fail;
++ }
++ connector = &fkms_connector->base;
++
++ fkms_connector->encoder = encoder;
++
++ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs,
++ DRM_MODE_CONNECTOR_HDMIA);
++ drm_connector_helper_add(connector, &vc4_fkms_connector_helper_funcs);
++
++ connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
++ DRM_CONNECTOR_POLL_DISCONNECT);
++
++ connector->interlace_allowed = 0;
++ connector->doublescan_allowed = 0;
++
++ drm_mode_connector_attach_encoder(connector, encoder);
++
++ return connector;
++
++ fail:
++ if (connector)
++ vc4_fkms_connector_destroy(connector);
++
++ return ERR_PTR(ret);
++}
++
++static void vc4_fkms_encoder_destroy(struct drm_encoder *encoder)
++{
++ drm_encoder_cleanup(encoder);
++}
++
++static const struct drm_encoder_funcs vc4_fkms_encoder_funcs = {
++ .destroy = vc4_fkms_encoder_destroy,
++};
++
++static void vc4_fkms_encoder_enable(struct drm_encoder *encoder)
++{
++}
++
++static void vc4_fkms_encoder_disable(struct drm_encoder *encoder)
++{
++}
++
++static const struct drm_encoder_helper_funcs vc4_fkms_encoder_helper_funcs = {
++ .enable = vc4_fkms_encoder_enable,
++ .disable = vc4_fkms_encoder_disable,
++};
++
++static int vc4_fkms_bind(struct device *dev, struct device *master, void *data)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct drm_device *drm = dev_get_drvdata(master);
++ struct vc4_dev *vc4 = to_vc4_dev(drm);
++ struct vc4_crtc *vc4_crtc;
++ struct vc4_fkms_encoder *vc4_encoder;
++ struct drm_crtc *crtc;
++ struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp;
++ struct device_node *firmware_node;
++ int ret;
++
++ vc4->firmware_kms = true;
++
++ vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL);
++ if (!vc4_crtc)
++ return -ENOMEM;
++ crtc = &vc4_crtc->base;
++
++ firmware_node = of_parse_phandle(dev->of_node, "brcm,firmware", 0);
++ vc4->firmware = rpi_firmware_get(firmware_node);
++ if (!vc4->firmware) {
++ DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n");
++ return -EPROBE_DEFER;
++ }
++ of_node_put(firmware_node);
++
++ /* Map the SMI interrupt reg */
++ vc4_crtc->regs = vc4_ioremap_regs(pdev, 0);
++ if (IS_ERR(vc4_crtc->regs))
++ return PTR_ERR(vc4_crtc->regs);
++
++ /* For now, we create just the primary and the legacy cursor
++ * planes. We should be able to stack more planes on easily,
++ * but to do that we would need to compute the bandwidth
++ * requirement of the plane configuration, and reject ones
++ * that will take too much.
++ */
++ primary_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_PRIMARY);
++ if (IS_ERR(primary_plane)) {
++ dev_err(dev, "failed to construct primary plane\n");
++ ret = PTR_ERR(primary_plane);
++ goto err;
++ }
++
++ cursor_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
++ if (IS_ERR(cursor_plane)) {
++ dev_err(dev, "failed to construct cursor plane\n");
++ ret = PTR_ERR(cursor_plane);
++ goto err;
++ }
++
++ drm_crtc_init_with_planes(drm, crtc, primary_plane, cursor_plane,
++ &vc4_crtc_funcs);
++ drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs);
++ primary_plane->crtc = crtc;
++ cursor_plane->crtc = crtc;
++ vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc;
++
++ vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL);
++ if (!vc4_encoder)
++ return -ENOMEM;
++ vc4_crtc->encoder = &vc4_encoder->base;
++ vc4_encoder->base.possible_crtcs |= drm_crtc_mask(crtc) ;
++ drm_encoder_init(drm, &vc4_encoder->base, &vc4_fkms_encoder_funcs,
++ DRM_MODE_ENCODER_TMDS);
++ drm_encoder_helper_add(&vc4_encoder->base,
++ &vc4_fkms_encoder_helper_funcs);
++
++ vc4_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base);
++ if (IS_ERR(vc4_crtc->connector)) {
++ ret = PTR_ERR(vc4_crtc->connector);
++ goto err_destroy_encoder;
++ }
++
++ writel(0, vc4_crtc->regs + SMICS);
++ ret = devm_request_irq(dev, platform_get_irq(pdev, 0),
++ vc4_crtc_irq_handler, 0, "vc4 firmware kms",
++ vc4_crtc);
++ if (ret)
++ goto err_destroy_connector;
++
++ platform_set_drvdata(pdev, vc4_crtc);
++
++ return 0;
++
++err_destroy_connector:
++ vc4_fkms_connector_destroy(vc4_crtc->connector);
++err_destroy_encoder:
++ vc4_fkms_encoder_destroy(vc4_crtc->encoder);
++ list_for_each_entry_safe(destroy_plane, temp,
++ &drm->mode_config.plane_list, head) {
++ if (destroy_plane->possible_crtcs == 1 << drm_crtc_index(crtc))
++ destroy_plane->funcs->destroy(destroy_plane);
++ }
++err:
++ return ret;
++}
++
++static void vc4_fkms_unbind(struct device *dev, struct device *master,
++ void *data)
++{
++ struct platform_device *pdev = to_platform_device(dev);
++ struct vc4_crtc *vc4_crtc = dev_get_drvdata(dev);
++
++ vc4_fkms_connector_destroy(vc4_crtc->connector);
++ vc4_fkms_encoder_destroy(vc4_crtc->encoder);
++ drm_crtc_cleanup(&vc4_crtc->base);
++
++ platform_set_drvdata(pdev, NULL);
++}
++
++static const struct component_ops vc4_fkms_ops = {
++ .bind = vc4_fkms_bind,
++ .unbind = vc4_fkms_unbind,
++};
++
++static int vc4_fkms_probe(struct platform_device *pdev)
++{
++ return component_add(&pdev->dev, &vc4_fkms_ops);
++}
++
++static int vc4_fkms_remove(struct platform_device *pdev)
++{
++ component_del(&pdev->dev, &vc4_fkms_ops);
++ return 0;
++}
++
++struct platform_driver vc4_firmware_kms_driver = {
++ .probe = vc4_fkms_probe,
++ .remove = vc4_fkms_remove,
++ .driver = {
++ .name = "vc4_firmware_kms",
++ .of_match_table = vc4_firmware_kms_dt_match,
++ },
++};
--- /dev/null
+From 5395497a794d793f9657e3317634ad8e5003277f Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 14 Sep 2016 08:52:26 +0100
+Subject: [PATCH] BCM270X: Add an overlay for enabling the vc4 driver in
+ firmware-KMS mode.
+
+This gets us normal 3D support on top of the existing firmware display
+stack. There's no real modesetting support, no async pageflips
+(hurting performance), etc., but it means that the desktop can at
+least run until we get full native modesetting.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 31 +++++---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 11 +++
+ .../arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts | 89 ++++++++++++++++++++++
+ 4 files changed, 121 insertions(+), 11 deletions(-)
+ create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -284,6 +284,26 @@
+ status = "disabled";
+ };
+
++ firmwarekms: firmwarekms@7e600000 {
++ compatible = "raspberrypi,rpi-firmware-kms";
++ /* SMI interrupt reg */
++ reg = <0x7e600000 0x100>;
++ interrupts = <2 16>;
++ brcm,firmware = <&firmware>;
++ status = "disabled";
++ };
++
++ smi: smi@7e600000 {
++ compatible = "brcm,bcm2835-smi";
++ reg = <0x7e600000 0x44>, <0x7e1010b0 0x8>;
++ interrupts = <2 16>;
++ brcm,smi-clock-source = <6>;
++ brcm,smi-clock-divisor = <4>;
++ dmas = <&dma 4>;
++ dma-names = "rx-tx";
++ status = "disabled";
++ };
++
+ dsi1: dsi@7e700000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -325,17 +345,6 @@
+ status = "disabled";
+ };
+
+- smi: smi@7e600000 {
+- compatible = "brcm,bcm2835-smi";
+- reg = <0x7e600000 0x44>, <0x7e1010b0 0x8>;
+- interrupts = <2 16>;
+- brcm,smi-clock-source = <6>;
+- brcm,smi-clock-divisor = <4>;
+- dmas = <&dma 4>;
+- dma-names = "rx-tx";
+- status = "disabled";
+- };
+-
+ pixelvalve2: pixelvalve@7e807000 {
+ compatible = "brcm,bcm2835-pixelvalve2";
+ reg = <0x7e807000 0x100>;
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -96,6 +96,7 @@ dtbo-$(RPI_DT_OVERLAYS) += spi2-2cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += spi2-3cs.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += tinylcd35.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += uart1.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += vc4-fkms-v3d.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += vc4-kms-v3d.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += vga666.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += w1-gpio.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -1215,6 +1215,17 @@ Params: txd1_pin GPIO pin
+ rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
+
+
++Name: vc4-fkms-v3d
++Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
++ display stack.
++Load: dtoverlay=vc4-fkms-v3d,<param>
++Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB)
++ cma-192 CMA is 192MB, 256MB-aligned (needs 1GB)
++ cma-128 CMA is 128MB, 128MB-aligned
++ cma-96 CMA is 96MB, 128MB-aligned
++ cma-64 CMA is 64MB, 64MB-aligned
++
++
+ Name: vc4-kms-v3d
+ Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or
+ booting to GUI while this overlay is in use will cause interesting
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
+@@ -0,0 +1,89 @@
++/*
++ * vc4-fkms-v3d-overlay.dts
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target-path = "/chosen";
++ __overlay__ {
++ bootargs = "cma=256M@256M";
++ };
++ };
++
++ fragment@1 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=192M@256M";
++ };
++ };
++
++ fragment@2 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=128M@128M";
++ };
++ };
++
++ fragment@3 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=96M@128M";
++ };
++ };
++
++ fragment@4 {
++ target-path = "/chosen";
++ __dormant__ {
++ bootargs = "cma=64M@64M";
++ };
++ };
++
++ fragment@5 {
++ target = <&fb>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment@6 {
++ target = <&firmwarekms>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@7 {
++ target = <&v3d>;
++ __overlay__ {
++ interrupts = <1 10>;
++ status = "okay";
++ };
++ };
++
++ fragment@8 {
++ target = <&gpu>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@9 {
++ target-path = "/soc/dma";
++ __overlay__ {
++ brcm,dma-channel-mask = <0x7f35>;
++ };
++ };
++
++ __overrides__ {
++ cma-256 = <0>,"+0-1-2-3-4";
++ cma-192 = <0>,"-0+1-2-3-4";
++ cma-128 = <0>,"-0-1+2-3-4";
++ cma-96 = <0>,"-0-1-2+3-4";
++ cma-64 = <0>,"-0-1-2-3+4";
++ };
++};
--- /dev/null
+From 655114c25214675520d742f5e86cdd8dd534e6c7 Mon Sep 17 00:00:00 2001
+From: Clive Messer <clive.m.messer@gmail.com>
+Date: Mon, 19 Sep 2016 14:01:04 +0100
+Subject: [PATCH] Allo Piano DAC boards: Initial 2 channel (stereo) support
+ (#1645)
+
+Add initial 2 channel (stereo) support for Allo Piano DAC (2.0/2.1) boards,
+using allo-piano-dac-pcm512x-audio overlay and allo-piano-dac ALSA ASoC
+machine driver.
+
+NB. The initial support is 2 channel (stereo) ONLY!
+(The Piano DAC 2.1 will only support 2 channel (stereo) left/right output,
+ pending an update to the upstream pcm512x codec driver, which will have
+ to be submitted via upstream. With the initial downstream support,
+ provided by this patch, the Piano DAC 2.1 subwoofer outputs will
+ not function.)
+
+Signed-off-by: Baswaraj K <jaikumar@cem-solutions.net>
+Signed-off-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
+Tested-by: Clive Messer <clive.messer@digitaldreamtime.co.uk>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 20 +++
+ .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 ++++++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 7 +
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/allo-piano-dac.c | 144 +++++++++++++++++++++
+ 8 files changed, 230 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
+ create mode 100644 sound/soc/bcm/allo-piano-dac.c
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -16,6 +16,7 @@ dtbo-$(RPI_DT_OVERLAYS) += adau1977-adc.
+ dtbo-$(RPI_DT_OVERLAYS) += ads1015.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += ads7846.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += akkordion-iqdacplus.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += allo-piano-dac-pcm512x-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += at86rf233.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audioinjector-wm8731-audio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += audremap.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -235,6 +235,26 @@ Params: 24db_digital_gain Allow ga
+ that does not result in clipping/distortion!)
+
+
++Name: allo-piano-dac-pcm512x-audio
++Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
++ (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
++ The subwoofer outputs on the Piano 2.1 are not currently supported!)
++Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
++ Digital volume control.
++ (The default behaviour is that the Digital
++ volume control is limited to a maximum of
++ 0dB. ie. it can attenuate but not provide
++ gain. For most users, this will be desired
++ as it will prevent clipping. By appending
++ the 24db_digital_gain parameter, the Digital
++ volume control will allow up to 24dB of
++ gain. If this parameter is enabled, it is the
++ responsibility of the user to ensure that
++ the Digital volume control is set to a value
++ that does not result in clipping/distortion!)
++
++
+ Name: at86rf233
+ Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
+ connected to spi0.0
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
+@@ -0,0 +1,54 @@
++/*
++ * Definitions for Allo Piano DAC (2.0/2.1) boards
++ *
++ * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
++ * (left/right) and the other provides a subwoofer output, using DSP on the
++ * chip for digital high/low pass crossover.
++ * The initial support for this hardware, that doesn't require any codec driver
++ * modifications, uses only one DAC chip for stereo (left/right) output, the
++ * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&i2c1>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "okay";
++
++ pcm5142@4c {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5142";
++ reg = <0x4c>;
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&sound>;
++ piano_dac: __overlay__ {
++ compatible = "allo,piano-dac";
++ i2s-controller = <&i2s>;
++ status = "okay";
++ };
++ };
++
++ __overrides__ {
++ 24db_digital_gain =
++ <&piano_dac>,"allo,24db_digital_gain?";
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -879,6 +879,7 @@ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -871,6 +871,7 @@ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m
+ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -114,3 +114,10 @@ config SND_BCM2708_SOC_DIONAUDIO_LOCO
+ select SND_SOC_PCM5102a
+ help
+ Say Y or M if you want to add support for Dion Audio LOCO.
++
++config SND_BCM2708_SOC_ALLO_PIANO_DAC
++ tristate "Support for Allo Piano DAC"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ select SND_SOC_PCM512x_I2C
++ help
++ Say Y or M if you want to add support for Allo Piano DAC.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -19,6 +19,7 @@ snd-soc-raspidac3-objs := raspidac3.o
+ snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o
+ snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
+ snd-soc-dionaudio-loco-objs := dionaudio_loco.o
++snd-soc-allo-piano-dac-objs := allo-piano-dac.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -35,3 +36,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3)
+ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o
+ obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+ obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o
++obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o
+--- /dev/null
++++ b/sound/soc/bcm/allo-piano-dac.c
+@@ -0,0 +1,144 @@
++/*
++ * ALSA ASoC Machine Driver for Allo Piano DAC
++ *
++ * Author: Baswaraj K <jaikumar@cem-solutions.net>
++ * Copyright 2016
++ * based on code by Daniel Matuschek <info@crazy-audio.com>
++ * based on code by Florian Meier <florian.meier@koalo.de>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ * General Public License for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++
++static bool digital_gain_0db_limit = true;
++
++static int snd_allo_piano_dac_init(struct snd_soc_pcm_runtime *rtd)
++{
++ if (digital_gain_0db_limit) {
++ int ret;
++ struct snd_soc_card *card = rtd->card;
++
++ ret = snd_soc_limit_volume(card, "Digital Playback Volume",
++ 207);
++ if (ret < 0)
++ dev_warn(card->dev, "Failed to set volume limit: %d\n",
++ ret);
++ }
++
++ return 0;
++}
++
++static int snd_allo_piano_dac_hw_params(
++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
++
++ unsigned int sample_bits =
++ snd_pcm_format_physical_width(params_format(params));
++
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2);
++}
++
++/* machine stream operations */
++static struct snd_soc_ops snd_allo_piano_dac_ops = {
++ .hw_params = snd_allo_piano_dac_hw_params,
++};
++
++static struct snd_soc_dai_link snd_allo_piano_dac_dai[] = {
++{
++ .name = "Piano DAC",
++ .stream_name = "Piano DAC HiFi",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "pcm512x-hifi",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "pcm512x.1-004c",
++ .dai_fmt = SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBS_CFS,
++ .ops = &snd_allo_piano_dac_ops,
++ .init = snd_allo_piano_dac_init,
++},
++};
++
++/* audio machine driver */
++static struct snd_soc_card snd_allo_piano_dac = {
++ .name = "PianoDAC",
++ .owner = THIS_MODULE,
++ .dai_link = snd_allo_piano_dac_dai,
++ .num_links = ARRAY_SIZE(snd_allo_piano_dac_dai),
++};
++
++static int snd_allo_piano_dac_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++
++ snd_allo_piano_dac.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++ struct snd_soc_dai_link *dai;
++
++ dai = &snd_allo_piano_dac_dai[0];
++ i2s_node = of_parse_phandle(pdev->dev.of_node,
++ "i2s-controller", 0);
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ }
++
++ digital_gain_0db_limit = !of_property_read_bool(
++ pdev->dev.of_node, "allo,24db_digital_gain");
++ }
++
++ ret = snd_soc_register_card(&snd_allo_piano_dac);
++ if (ret)
++ dev_err(&pdev->dev,
++ "snd_soc_register_card() failed: %d\n", ret);
++
++ return ret;
++}
++
++static int snd_allo_piano_dac_remove(struct platform_device *pdev)
++{
++ return snd_soc_unregister_card(&snd_allo_piano_dac);
++}
++
++static const struct of_device_id snd_allo_piano_dac_of_match[] = {
++ { .compatible = "allo,piano-dac", },
++ { /* sentinel */ },
++};
++MODULE_DEVICE_TABLE(of, snd_allo_piano_dac_of_match);
++
++static struct platform_driver snd_allo_piano_dac_driver = {
++ .driver = {
++ .name = "snd-allo-piano-dac",
++ .owner = THIS_MODULE,
++ .of_match_table = snd_allo_piano_dac_of_match,
++ },
++ .probe = snd_allo_piano_dac_probe,
++ .remove = snd_allo_piano_dac_remove,
++};
++
++module_platform_driver(snd_allo_piano_dac_driver);
++
++MODULE_AUTHOR("Baswaraj K <jaikumar@cem-solutions.net>");
++MODULE_DESCRIPTION("ALSA ASoC Machine Driver for Allo Piano DAC");
++MODULE_LICENSE("GPL v2");
--- /dev/null
+From b80f025ee532fb183a1ebbf81fd1c5ceb386a019 Mon Sep 17 00:00:00 2001
+From: Blogs14 <masterwhite445@googlemail.com>
+Date: Fri, 23 Sep 2016 11:02:56 +0100
+Subject: [PATCH] Correct typos in spi-gpio35-39-overlay.dts (#1651)
+
+bcrm,pins corrected to brcm,pins
+---
+ arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
++++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
+@@ -18,14 +18,14 @@
+ fragment@1 {
+ target = <&spi0_cs_pins>;
+ __overlay__ {
+- bcrm,pins = <36 35>;
++ brcm,pins = <36 35>;
+ };
+ };
+
+ fragment@2 {
+ target = <&spi0_pins>;
+ __overlay__ {
+- bcrm,pins = <37 38 39>;
++ brcm,pins = <37 38 39>;
+ };
+ };
+ };
--- /dev/null
+From 330916bb64ca043ad03993aa4041edc99f68cf8f Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 15 Sep 2016 17:52:17 +0100
+Subject: [PATCH] drm/vc4: Enable limited range RGB output with CEA modes.
+
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 28 ++++++++++++++++++++++++++--
+ drivers/gpu/drm/vc4/vc4_regs.h | 9 ++++++++-
+ 2 files changed, 34 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -285,6 +285,7 @@ static void vc4_hdmi_encoder_mode_set(st
+ struct drm_display_mode *unadjusted_mode,
+ struct drm_display_mode *mode)
+ {
++ struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
+ struct drm_device *dev = encoder->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ bool debug_dump_regs = false;
+@@ -300,6 +301,7 @@ static void vc4_hdmi_encoder_mode_set(st
+ u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
+ VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
+ VC4_HDMI_VERTB_VBP));
++ u32 csc_ctl;
+
+ if (debug_dump_regs) {
+ DRM_INFO("HDMI regs before:\n");
+@@ -338,9 +340,31 @@ static void vc4_hdmi_encoder_mode_set(st
+ (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
+ (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
+
++ csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
++ VC4_HD_CSC_CTL_ORDER);
++
++ if (vc4_encoder->hdmi_monitor && drm_match_cea_mode(mode) != 0) {
++ /* Enable limited range RGB output. This matrix is:
++ * [ 0 0 0.8594 16]
++ * [ 0 0.8594 0 16]
++ * [ 0.8594 0 0 16]
++ * [ 0 0 0 1]
++ */
++ csc_ctl |= VC4_HD_CSC_CTL_ENABLE;
++ csc_ctl |= VC4_HD_CSC_CTL_RGB2YCC;
++ csc_ctl |= VC4_SET_FIELD(VC4_HD_CSC_CTL_MODE_CUSTOM,
++ VC4_HD_CSC_CTL_MODE);
++
++ HD_WRITE(VC4_HD_CSC_12_11, (0x000 << 16) | 0x000);
++ HD_WRITE(VC4_HD_CSC_14_13, (0x100 << 16) | 0x6e0);
++ HD_WRITE(VC4_HD_CSC_22_21, (0x6e0 << 16) | 0x000);
++ HD_WRITE(VC4_HD_CSC_24_23, (0x100 << 16) | 0x000);
++ HD_WRITE(VC4_HD_CSC_32_31, (0x000 << 16) | 0x6e0);
++ HD_WRITE(VC4_HD_CSC_34_33, (0x100 << 16) | 0x000);
++ }
++
+ /* The RGB order applies even when CSC is disabled. */
+- HD_WRITE(VC4_HD_CSC_CTL, VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
+- VC4_HD_CSC_CTL_ORDER));
++ HD_WRITE(VC4_HD_CSC_CTL, csc_ctl);
+
+ HDMI_WRITE(VC4_HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
+
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -530,10 +530,17 @@
+ # define VC4_HD_CSC_CTL_MODE_SHIFT 2
+ # define VC4_HD_CSC_CTL_MODE_RGB_TO_SD_YPRPB 0
+ # define VC4_HD_CSC_CTL_MODE_RGB_TO_HD_YPRPB 1
+-# define VC4_HD_CSC_CTL_MODE_CUSTOM 2
++# define VC4_HD_CSC_CTL_MODE_CUSTOM 3
+ # define VC4_HD_CSC_CTL_RGB2YCC BIT(1)
+ # define VC4_HD_CSC_CTL_ENABLE BIT(0)
+
++#define VC4_HD_CSC_12_11 0x044
++#define VC4_HD_CSC_14_13 0x048
++#define VC4_HD_CSC_22_21 0x04c
++#define VC4_HD_CSC_24_23 0x050
++#define VC4_HD_CSC_32_31 0x054
++#define VC4_HD_CSC_34_33 0x058
++
+ #define VC4_HD_FRAME_COUNT 0x068
+
+ /* HVS display list information. */
--- /dev/null
+From 877d2ad66da4c7aba2db0ecb394a07a19ac2e374 Mon Sep 17 00:00:00 2001
+From: Scott Ellis <scott@jumpnowtek.com>
+Date: Tue, 27 Sep 2016 04:29:00 -0400
+Subject: [PATCH] Add Adafruit pitft35 touchscreen support (#1657)
+
+The dts comes from the Adafruit repository
+
+ https://github.com/adafruit/Adafruit-Pi-Kernel-o-Matic/blob/pitft/pitft35r-overlay.dts
+
+Reformatted slightly to match conventions in the pitft28-resistive-overlay.
+
+Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
+---
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 12 ++
+ .../dts/overlays/pitft35-resistive-overlay.dts | 121 +++++++++++++++++++++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 5 files changed, 136 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
+
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -65,6 +65,7 @@ dtbo-$(RPI_DT_OVERLAYS) += piscreen2r.dt
+ dtbo-$(RPI_DT_OVERLAYS) += pitft22.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft28-capacitive.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft28-resistive.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += pitft35-resistive.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pps-gpio.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pwm.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pwm-2chan.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -854,6 +854,18 @@ Params: speed Display
+ debug Debug output level {0-7}
+
+
++Name: pitft35-resistive
++Info: Adafruit PiTFT 3.5" resistive touch screen
++Load: dtoverlay=pitft35-resistive,<param>=<val>
++Params: speed Display SPI bus speed
++
++ rotate Display rotation {0,90,180,270}
++
++ fps Delay between frame updates
++
++ debug Debug output level {0-7}
++
++
+ Name: pps-gpio
+ Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
+ Load: dtoverlay=pps-gpio,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
+@@ -0,0 +1,121 @@
++/*
++ * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
++ *
++ */
++
++/dts-v1/;
++/plugin/;
++
++/ {
++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
++
++ fragment@0 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@1 {
++ target = <&spidev0>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment@2 {
++ target = <&spidev1>;
++ __overlay__ {
++ status = "disabled";
++ };
++ };
++
++ fragment@3 {
++ target = <&gpio>;
++ __overlay__ {
++ pitft_pins: pitft_pins {
++ brcm,pins = <24 25>;
++ brcm,function = <0 1>; /* in out */
++ brcm,pull = <2 0>; /* pullup none */
++ };
++ };
++ };
++
++ fragment@4 {
++ target = <&spi0>;
++ __overlay__ {
++ /* needed to avoid dtc warning */
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pitft: pitft@0{
++ compatible = "himax,hx8357d";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pitft_pins>;
++
++ spi-max-frequency = <32000000>;
++ rotate = <90>;
++ fps = <25>;
++ bgr;
++ buswidth = <8>;
++ dc-gpios = <&gpio 25 0>;
++ debug = <0>;
++ };
++
++ pitft_ts@1 {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ compatible = "st,stmpe610";
++ reg = <1>;
++
++ spi-max-frequency = <500000>;
++ irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
++ interrupts = <24 2>; /* high-to-low edge triggered */
++ interrupt-parent = <&gpio>;
++ interrupt-controller;
++
++ stmpe_touchscreen {
++ compatible = "st,stmpe-ts";
++ st,sample-time = <4>;
++ st,mod-12b = <1>;
++ st,ref-sel = <0>;
++ st,adc-freq = <2>;
++ st,ave-ctrl = <3>;
++ st,touch-det-delay = <4>;
++ st,settling = <2>;
++ st,fraction-z = <7>;
++ st,i-drive = <0>;
++ };
++
++ stmpe_gpio: stmpe_gpio {
++ #gpio-cells = <2>;
++ compatible = "st,stmpe-gpio";
++ /*
++ * only GPIO2 is wired/available
++ * and it is wired to the backlight
++ */
++ st,norequest-mask = <0x7b>;
++ };
++ };
++ };
++ };
++
++ fragment@5 {
++ target-path = "/soc";
++ __overlay__ {
++ backlight {
++ compatible = "gpio-backlight";
++ gpios = <&stmpe_gpio 2 0>;
++ default-on;
++ };
++ };
++ };
++
++ __overrides__ {
++ speed = <&pitft>,"spi-max-frequency:0";
++ rotate = <&pitft>,"rotate:0";
++ fps = <&pitft>,"fps:0";
++ debug = <&pitft>,"debug:0";
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -1116,6 +1116,7 @@ CONFIG_FB_TFT_BD663474=m
+ CONFIG_FB_TFT_HX8340BN=m
+ CONFIG_FB_TFT_HX8347D=m
+ CONFIG_FB_TFT_HX8353D=m
++CONFIG_FB_TFT_HX8357D=m
+ CONFIG_FB_TFT_ILI9163=m
+ CONFIG_FB_TFT_ILI9320=m
+ CONFIG_FB_TFT_ILI9325=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -1123,6 +1123,7 @@ CONFIG_FB_TFT_BD663474=m
+ CONFIG_FB_TFT_HX8340BN=m
+ CONFIG_FB_TFT_HX8347D=m
+ CONFIG_FB_TFT_HX8353D=m
++CONFIG_FB_TFT_HX8357D=m
+ CONFIG_FB_TFT_ILI9163=m
+ CONFIG_FB_TFT_ILI9320=m
+ CONFIG_FB_TFT_ILI9325=m
--- /dev/null
+From 057da8ee92db7c8caece571aa20f478f5cae1318 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 27 Sep 2016 09:03:13 -0700
+Subject: [PATCH] drm/vc4: Fix races when the CS reads from render targets.
+
+With the introduction of bin/render pipelining, the previous job may
+not be completed when we start binning the next one. If the previous
+job wrote our VBO, IB, or CS textures, then the binning stage might
+get stale or uninitialized results.
+
+Fixes the major rendering failure in glmark2 -b terrain.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: ca26d28bbaa3 ("drm/vc4: improve throughput by pipelining binning and rendering jobs")
+Cc: stable@vger.kernel.org
+---
+ drivers/gpu/drm/vc4/vc4_drv.h | 19 ++++++++++++++++++-
+ drivers/gpu/drm/vc4/vc4_gem.c | 13 +++++++++++++
+ drivers/gpu/drm/vc4/vc4_render_cl.c | 21 +++++++++++++++++----
+ drivers/gpu/drm/vc4/vc4_validate.c | 17 ++++++++++++++---
+ 4 files changed, 62 insertions(+), 8 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -129,9 +129,16 @@ to_vc4_dev(struct drm_device *dev)
+ struct vc4_bo {
+ struct drm_gem_cma_object base;
+
+- /* seqno of the last job to render to this BO. */
++ /* seqno of the last job to render using this BO. */
+ uint64_t seqno;
+
++ /* seqno of the last job to use the RCL to write to this BO.
++ *
++ * Note that this doesn't include binner overflow memory
++ * writes.
++ */
++ uint64_t write_seqno;
++
+ /* List entry for the BO's position in either
+ * vc4_exec_info->unref_list or vc4_dev->bo_cache.time_list
+ */
+@@ -227,6 +234,9 @@ struct vc4_exec_info {
+ /* Sequence number for this bin/render job. */
+ uint64_t seqno;
+
++ /* Latest write_seqno of any BO that binning depends on. */
++ uint64_t bin_dep_seqno;
++
+ /* Last current addresses the hardware was processing when the
+ * hangcheck timer checked on us.
+ */
+@@ -241,6 +251,13 @@ struct vc4_exec_info {
+ struct drm_gem_cma_object **bo;
+ uint32_t bo_count;
+
++ /* List of BOs that are being written by the RCL. Other than
++ * the binner temporary storage, this is all the BOs written
++ * by the job.
++ */
++ struct drm_gem_cma_object *rcl_write_bo[4];
++ uint32_t rcl_write_bo_count;
++
+ /* Pointers for our position in vc4->job_list */
+ struct list_head head;
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -483,6 +483,11 @@ vc4_update_bo_seqnos(struct vc4_exec_inf
+ list_for_each_entry(bo, &exec->unref_list, unref_head) {
+ bo->seqno = seqno;
+ }
++
++ for (i = 0; i < exec->rcl_write_bo_count; i++) {
++ bo = to_vc4_bo(&exec->rcl_write_bo[i]->base);
++ bo->write_seqno = seqno;
++ }
+ }
+
+ /* Queues a struct vc4_exec_info for execution. If no job is
+@@ -685,6 +690,14 @@ vc4_get_bcl(struct drm_device *dev, stru
+ goto fail;
+
+ ret = vc4_validate_shader_recs(dev, exec);
++ if (ret)
++ goto fail;
++
++ /* Block waiting on any previous rendering into the CS's VBO,
++ * IB, or textures, so that pixels are actually written by the
++ * time we try to read them.
++ */
++ ret = vc4_wait_for_seqno(dev, exec->bin_dep_seqno, ~0ull, true);
+
+ fail:
+ kfree(temp);
+--- a/drivers/gpu/drm/vc4/vc4_render_cl.c
++++ b/drivers/gpu/drm/vc4/vc4_render_cl.c
+@@ -45,6 +45,8 @@ struct vc4_rcl_setup {
+
+ struct drm_gem_cma_object *rcl;
+ u32 next_offset;
++
++ u32 next_write_bo_index;
+ };
+
+ static inline void rcl_u8(struct vc4_rcl_setup *setup, u8 val)
+@@ -407,6 +409,8 @@ static int vc4_rcl_msaa_surface_setup(st
+ if (!*obj)
+ return -EINVAL;
+
++ exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj;
++
+ if (surf->offset & 0xf) {
+ DRM_ERROR("MSAA write must be 16b aligned.\n");
+ return -EINVAL;
+@@ -417,7 +421,8 @@ static int vc4_rcl_msaa_surface_setup(st
+
+ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec,
+ struct drm_gem_cma_object **obj,
+- struct drm_vc4_submit_rcl_surface *surf)
++ struct drm_vc4_submit_rcl_surface *surf,
++ bool is_write)
+ {
+ uint8_t tiling = VC4_GET_FIELD(surf->bits,
+ VC4_LOADSTORE_TILE_BUFFER_TILING);
+@@ -440,6 +445,9 @@ static int vc4_rcl_surface_setup(struct
+ if (!*obj)
+ return -EINVAL;
+
++ if (is_write)
++ exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj;
++
+ if (surf->flags & VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) {
+ if (surf == &exec->args->zs_write) {
+ DRM_ERROR("general zs write may not be a full-res.\n");
+@@ -542,6 +550,8 @@ vc4_rcl_render_config_surface_setup(stru
+ if (!*obj)
+ return -EINVAL;
+
++ exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj;
++
+ if (tiling > VC4_TILING_FORMAT_LT) {
+ DRM_ERROR("Bad tiling format\n");
+ return -EINVAL;
+@@ -599,15 +609,18 @@ int vc4_get_rcl(struct drm_device *dev,
+ if (ret)
+ return ret;
+
+- ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read);
++ ret = vc4_rcl_surface_setup(exec, &setup.color_read, &args->color_read,
++ false);
+ if (ret)
+ return ret;
+
+- ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read);
++ ret = vc4_rcl_surface_setup(exec, &setup.zs_read, &args->zs_read,
++ false);
+ if (ret)
+ return ret;
+
+- ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write);
++ ret = vc4_rcl_surface_setup(exec, &setup.zs_write, &args->zs_write,
++ true);
+ if (ret)
+ return ret;
+
+--- a/drivers/gpu/drm/vc4/vc4_validate.c
++++ b/drivers/gpu/drm/vc4/vc4_validate.c
+@@ -267,6 +267,9 @@ validate_indexed_prim_list(VALIDATE_ARGS
+ if (!ib)
+ return -EINVAL;
+
++ exec->bin_dep_seqno = max(exec->bin_dep_seqno,
++ to_vc4_bo(&ib->base)->write_seqno);
++
+ if (offset > ib->base.size ||
+ (ib->base.size - offset) / index_size < length) {
+ DRM_ERROR("IB access overflow (%d + %d*%d > %zd)\n",
+@@ -555,8 +558,7 @@ static bool
+ reloc_tex(struct vc4_exec_info *exec,
+ void *uniform_data_u,
+ struct vc4_texture_sample_info *sample,
+- uint32_t texture_handle_index)
+-
++ uint32_t texture_handle_index, bool is_cs)
+ {
+ struct drm_gem_cma_object *tex;
+ uint32_t p0 = *(uint32_t *)(uniform_data_u + sample->p_offset[0]);
+@@ -714,6 +716,11 @@ reloc_tex(struct vc4_exec_info *exec,
+
+ *validated_p0 = tex->paddr + p0;
+
++ if (is_cs) {
++ exec->bin_dep_seqno = max(exec->bin_dep_seqno,
++ to_vc4_bo(&tex->base)->write_seqno);
++ }
++
+ return true;
+ fail:
+ DRM_INFO("Texture p0 at %d: 0x%08x\n", sample->p_offset[0], p0);
+@@ -835,7 +842,8 @@ validate_gl_shader_rec(struct drm_device
+ if (!reloc_tex(exec,
+ uniform_data_u,
+ &validated_shader->texture_samples[tex],
+- texture_handles_u[tex])) {
++ texture_handles_u[tex],
++ i == 2)) {
+ return -EINVAL;
+ }
+ }
+@@ -867,6 +875,9 @@ validate_gl_shader_rec(struct drm_device
+ uint32_t stride = *(uint8_t *)(pkt_u + o + 5);
+ uint32_t max_index;
+
++ exec->bin_dep_seqno = max(exec->bin_dep_seqno,
++ to_vc4_bo(&vbo->base)->write_seqno);
++
+ if (state->addr & 0x8)
+ stride |= (*(uint32_t *)(pkt_u + 100 + i * 4)) & ~0xff;
+
--- /dev/null
+From b66013edab6e2149beb55eb1021926fd7ea26da7 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 15 Sep 2016 17:52:17 +0100
+Subject: [PATCH] drm/vc4: Fix up the limited range RGB output commit.
+
+CEA mode #1 is the only one that doesn't do limited range, thus the
+strange pattern in other drivers.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -343,8 +343,11 @@ static void vc4_hdmi_encoder_mode_set(st
+ csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
+ VC4_HD_CSC_CTL_ORDER);
+
+- if (vc4_encoder->hdmi_monitor && drm_match_cea_mode(mode) != 0) {
+- /* Enable limited range RGB output. This matrix is:
++ if (vc4_encoder->hdmi_monitor && drm_match_cea_mode(mode) > 1) {
++ /* CEA VICs other than #1 requre limited range RGB
++ * output. Apply a colorspace conversion to squash
++ * 0-255 down to 16-235. The matrix here is:
++ *
+ * [ 0 0 0.8594 16]
+ * [ 0 0.8594 0 16]
+ * [ 0.8594 0 0 16]
--- /dev/null
+From 4fe0280a07dea7997dd8a789c704f69b5620cdd2 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 28 Sep 2016 17:21:05 -0700
+Subject: [PATCH] drm/vc4: Increase timeout for HDMI_SCHEDULER_CONTROL changes.
+
+Fixes occasional debug spew at boot when connected directly through
+HDMI, and probably confusing the HDMI state machine when we go trying
+to poke registers for the enable sequence too soon.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -408,7 +408,7 @@ static void vc4_hdmi_encoder_enable(stru
+ VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
+
+ ret = wait_for(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) &
+- VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE, 1);
++ VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE, 1000);
+ WARN_ONCE(ret, "Timeout waiting for "
+ "VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n");
+ } else {
+@@ -420,7 +420,7 @@ static void vc4_hdmi_encoder_enable(stru
+ ~VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
+
+ ret = wait_for(!(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) &
+- VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE), 1);
++ VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE), 1000);
+ WARN_ONCE(ret, "Timeout waiting for "
+ "!VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n");
+ }
--- /dev/null
+From 069acde1ae77a0807062df0b009a51809cb3aa2a Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Tue, 19 Jul 2016 20:58:57 +0200
+Subject: [PATCH] drm/vc4: Disallow interlaced modes on DPI.
+
+We already don't expose such modes to userspace, but make
+sure userspace can't sneak some interlaced mode in.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_dpi.c | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_dpi.c
++++ b/drivers/gpu/drm/vc4/vc4_dpi.c
+@@ -349,9 +349,20 @@ static void vc4_dpi_encoder_enable(struc
+ }
+ }
+
++static bool vc4_dpi_encoder_mode_fixup(struct drm_encoder *encoder,
++ const struct drm_display_mode *mode,
++ struct drm_display_mode *adjusted_mode)
++{
++ if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
++ return false;
++
++ return true;
++}
++
+ static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
+ .disable = vc4_dpi_encoder_disable,
+ .enable = vc4_dpi_encoder_enable,
++ .mode_fixup = vc4_dpi_encoder_mode_fixup,
+ };
+
+ static const struct of_device_id vc4_dpi_dt_match[] = {
--- /dev/null
+From fa69b17facd1a2fd3e430b78f65b60b4a087b53d Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Tue, 19 Jul 2016 20:58:58 +0200
+Subject: [PATCH] drm/vc4: Fix handling of interlaced video modes.
+
+We must not apply CRTC_INTERLACE_HALVE_V to interlaced modes during
+mode enumeration, as drm_helper_probe_single_connector_modes
+does, so wrap it and reset the effect of CRTC_INTERLACE_HALVE_V
+on affected interlaced modes.
+
+Also mode_fixup interlaced modes passed in from user space.
+
+This fixes the vblank timestamping constants and entries in
+the mode->crtc_xxx fields needed for precise vblank timestamping.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 18 ++++++++++++++++++
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 29 +++++++++++++++++++++++++++--
+ 2 files changed, 45 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -538,6 +538,23 @@ static void vc4_crtc_enable(struct drm_c
+ CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN);
+ }
+
++static bool vc4_crtc_mode_fixup(struct drm_crtc *crtc,
++ const struct drm_display_mode *mode,
++ struct drm_display_mode *adjusted_mode)
++{
++ /*
++ * Interlaced video modes got CRTC_INTERLACE_HALVE_V applied when
++ * coming from user space. We don't want this, as it screws up
++ * vblank timestamping, so fix it up.
++ */
++ drm_mode_set_crtcinfo(adjusted_mode, 0);
++
++ DRM_DEBUG_KMS("[CRTC:%d] adjusted_mode :\n", crtc->base.id);
++ drm_mode_debug_printmodeline(adjusted_mode);
++
++ return true;
++}
++
+ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
+ {
+@@ -848,6 +865,7 @@ static const struct drm_crtc_helper_func
+ .mode_set_nofb = vc4_crtc_mode_set_nofb,
+ .disable = vc4_crtc_disable,
+ .enable = vc4_crtc_enable,
++ .mode_fixup = vc4_crtc_mode_fixup,
+ .atomic_check = vc4_crtc_atomic_check,
+ .atomic_flush = vc4_crtc_atomic_flush,
+ };
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -219,10 +219,35 @@ vc4_hdmi_connector_best_encoder(struct d
+ return hdmi_connector->encoder;
+ }
+
++/*
++ * drm_helper_probe_single_connector_modes() applies drm_mode_set_crtcinfo to
++ * all modes with flag CRTC_INTERLACE_HALVE_V. We don't want this, as it
++ * screws up vblank timestamping for interlaced modes, so fix it up.
++ */
++static int vc4_hdmi_connector_probe_modes(struct drm_connector *connector,
++ uint32_t maxX, uint32_t maxY)
++{
++ struct drm_display_mode *mode;
++ int count;
++
++ count = drm_helper_probe_single_connector_modes(connector, maxX, maxY);
++ if (count == 0)
++ return 0;
++
++ DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed adapted modes :\n",
++ connector->base.id, connector->name);
++ list_for_each_entry(mode, &connector->modes, head) {
++ drm_mode_set_crtcinfo(mode, 0);
++ drm_mode_debug_printmodeline(mode);
++ }
++
++ return count;
++}
++
+ static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .detect = vc4_hdmi_connector_detect,
+- .fill_modes = drm_helper_probe_single_connector_modes,
++ .fill_modes = vc4_hdmi_connector_probe_modes,
+ .destroy = vc4_hdmi_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+@@ -258,7 +283,7 @@ static struct drm_connector *vc4_hdmi_co
+ connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
+ DRM_CONNECTOR_POLL_DISCONNECT);
+
+- connector->interlace_allowed = 0;
++ connector->interlace_allowed = 1;
+ connector->doublescan_allowed = 0;
+
+ drm_mode_connector_attach_encoder(connector, encoder);
--- /dev/null
+From 30f69de2c6e1dedc4d071a24a0690e81118421d9 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Tue, 19 Jul 2016 20:58:59 +0200
+Subject: [PATCH] drm/vc4: Reject doublescan modes.
+
+We can't handle doublescan modes at the moment, so if
+userspace tries to set one, reject the mode set.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -542,6 +542,13 @@ static bool vc4_crtc_mode_fixup(struct d
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+ {
++ /* Do not allow doublescan modes from user space */
++ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) {
++ DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n",
++ crtc->base.id);
++ return false;
++ }
++
+ /*
+ * Interlaced video modes got CRTC_INTERLACE_HALVE_V applied when
+ * coming from user space. We don't want this, as it screws up
--- /dev/null
+From f2494f314f8c71e41ddd6798315685ecb6fc7814 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Tue, 19 Jul 2016 20:59:00 +0200
+Subject: [PATCH] drm/vc4: Enable precise vblank timestamping for interlaced
+ modes.
+
+On top of the interlaced video mode fix and with some additional
+adjustments, this now works well. It has almost the same accuracy
+as on regular progressive scan modes.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 21 ++++++++-------------
+ 1 file changed, 8 insertions(+), 13 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -154,14 +154,6 @@ int vc4_crtc_get_scanoutpos(struct drm_d
+ if (vc4->firmware_kms)
+ return 0;
+
+- /*
+- * XXX Doesn't work well in interlaced mode yet, partially due
+- * to problems in vc4 kms or drm core interlaced mode handling,
+- * so disable for now in interlaced mode.
+- */
+- if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+- return ret;
+-
+ /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
+
+ /* Get optional system timestamp before query. */
+@@ -182,10 +174,15 @@ int vc4_crtc_get_scanoutpos(struct drm_d
+
+ /* Vertical position of hvs composed scanline. */
+ *vpos = VC4_GET_FIELD(val, SCALER_DISPSTATX_LINE);
++ *hpos = 0;
++
++ if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
++ *vpos /= 2;
+
+- /* No hpos info available. */
+- if (hpos)
+- *hpos = 0;
++ /* Use hpos to correct for field offset in interlaced mode. */
++ if (VC4_GET_FIELD(val, SCALER_DISPSTATX_FRAME_COUNT) % 2)
++ *hpos += mode->crtc_htotal / 2;
++ }
+
+ /* This is the offset we need for translating hvs -> pv scanout pos. */
+ fifo_lines = vc4_crtc->cob_size / mode->crtc_hdisplay;
+@@ -208,8 +205,6 @@ int vc4_crtc_get_scanoutpos(struct drm_d
+ * position of the PV.
+ */
+ *vpos -= fifo_lines + 1;
+- if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+- *vpos /= 2;
+
+ ret |= DRM_SCANOUTPOS_ACCURATE;
+ return ret;
--- /dev/null
+From c4bd9665b145cacfdf9cbd5f3d83ed0961080236 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Tue, 19 Jul 2016 20:59:01 +0200
+Subject: [PATCH] drm/vc4: Enable/Disable vblanks properly in crtc en/disable.
+
+Add missing drm_crtc_vblank_on/off() calls so vblank irq
+handling/updating/timestamping never runs with a crtc shut down
+or during its shutdown/startup, as that causes large jumps in
+vblank count and trouble for compositors.
+
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -468,6 +468,9 @@ static void vc4_crtc_disable(struct drm_
+ int ret;
+ require_hvs_enabled(dev);
+
++ /* Disable vblank irq handling before crtc is disabled. */
++ drm_crtc_vblank_off(crtc);
++
+ if (VC4_DSI_USE_FIRMWARE_SETUP &&
+ (CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_DSI)) {
+ /* Skip disabling the PV/HVS for the channel if it was
+@@ -531,6 +534,9 @@ static void vc4_crtc_enable(struct drm_c
+ /* Turn on the pixel valve, which will emit the vstart signal. */
+ CRTC_WRITE(PV_V_CONTROL,
+ CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN);
++
++ /* Enable vblank irq handling after crtc is started. */
++ drm_crtc_vblank_on(crtc);
+ }
+
+ static bool vc4_crtc_mode_fixup(struct drm_crtc *crtc,
--- /dev/null
+From 6e6624aeedaa97f1b81636e0be4a7478ccb22d69 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 28 Sep 2016 17:30:25 -0700
+Subject: [PATCH] drm/vc4: Fix support for interlaced modes on HDMI.
+
+We really do need to be using the halved V fields. I had been
+confused by the code I was using as a reference because it stored
+halved vsync fields but not halved vdisplay, so it looked like I only
+needed to divide vdisplay by 2.
+
+This reverts part of Mario's timestamping fixes that prevented
+CRTC_HALVE_V from applying, and instead adjusts the timestamping code
+to not use the crtc field in that case.
+
+Fixes locking of 1920x1080x60i on my Dell 2408WFP. There are black
+bars on the top and bottom, but I suspect that might be an
+under/overscan flags problem as opposed to video timings.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 54 +++++++++++++++++++++++-------------------
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 45 ++++++++++-------------------------
+ drivers/gpu/drm/vc4/vc4_regs.h | 3 +++
+ 3 files changed, 44 insertions(+), 58 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -220,7 +220,7 @@ int vc4_crtc_get_scanoutpos(struct drm_d
+ * and need to make things up in a approximative but consistent way.
+ */
+ ret |= DRM_SCANOUTPOS_IN_VBLANK;
+- vblank_lines = mode->crtc_vtotal - mode->crtc_vdisplay;
++ vblank_lines = mode->vtotal - mode->vdisplay;
+
+ if (flags & DRM_CALLED_FROM_VBLIRQ) {
+ /*
+@@ -368,7 +368,6 @@ static void vc4_crtc_mode_set_nofb(struc
+ struct drm_crtc_state *state = crtc->state;
+ struct drm_display_mode *mode = &state->adjusted_mode;
+ bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE;
+- u32 vactive = (mode->vdisplay >> (interlace ? 1 : 0));
+ bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
+ vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
+ u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
+@@ -395,34 +394,49 @@ static void vc4_crtc_mode_set_nofb(struc
+ VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE));
+
+ CRTC_WRITE(PV_VERTA,
+- VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
++ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
+ PV_VERTA_VBP) |
+- VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
++ VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
+ PV_VERTA_VSYNC));
+ CRTC_WRITE(PV_VERTB,
+- VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
++ VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay,
+ PV_VERTB_VFP) |
+- VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE));
++ VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE));
+
+ if (interlace) {
+ CRTC_WRITE(PV_VERTA_EVEN,
+- VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1,
++ VC4_SET_FIELD(mode->crtc_vtotal -
++ mode->crtc_vsync_end - 1,
+ PV_VERTA_VBP) |
+- VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
++ VC4_SET_FIELD(mode->crtc_vsync_end -
++ mode->crtc_vsync_start,
+ PV_VERTA_VSYNC));
+ CRTC_WRITE(PV_VERTB_EVEN,
+- VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
++ VC4_SET_FIELD(mode->crtc_vsync_start -
++ mode->crtc_vdisplay,
+ PV_VERTB_VFP) |
+- VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE));
++ VC4_SET_FIELD(mode->crtc_vdisplay, PV_VERTB_VACTIVE));
++
++ /* We set up first field even mode for HDMI. VEC's
++ * NTSC mode would want first field odd instead, once
++ * we support it (to do so, set ODD_FIRST and put the
++ * delay in VSYNCD_EVEN instead).
++ */
++ CRTC_WRITE(PV_V_CONTROL,
++ PV_VCONTROL_CONTINUOUS |
++ (is_dsi ? PV_VCONTROL_DSI : 0) |
++ PV_VCONTROL_INTERLACE |
++ VC4_SET_FIELD(mode->htotal / 2,
++ PV_VCONTROL_ODD_DELAY));
++ CRTC_WRITE(PV_VSYNCD_EVEN, 0);
++ } else {
++ CRTC_WRITE(PV_V_CONTROL,
++ PV_VCONTROL_CONTINUOUS |
++ (is_dsi ? PV_VCONTROL_DSI : 0));
+ }
+
+ CRTC_WRITE(PV_HACT_ACT, mode->hdisplay);
+
+- CRTC_WRITE(PV_V_CONTROL,
+- PV_VCONTROL_CONTINUOUS |
+- (is_dsi ? PV_VCONTROL_DSI : 0) |
+- (interlace ? PV_VCONTROL_INTERLACE : 0));
+-
+ CRTC_WRITE(PV_CONTROL,
+ VC4_SET_FIELD(format, PV_CONTROL_FORMAT) |
+ VC4_SET_FIELD(vc4_get_fifo_full_level(format),
+@@ -550,16 +564,6 @@ static bool vc4_crtc_mode_fixup(struct d
+ return false;
+ }
+
+- /*
+- * Interlaced video modes got CRTC_INTERLACE_HALVE_V applied when
+- * coming from user space. We don't want this, as it screws up
+- * vblank timestamping, so fix it up.
+- */
+- drm_mode_set_crtcinfo(adjusted_mode, 0);
+-
+- DRM_DEBUG_KMS("[CRTC:%d] adjusted_mode :\n", crtc->base.id);
+- drm_mode_debug_printmodeline(adjusted_mode);
+-
+ return true;
+ }
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -219,35 +219,10 @@ vc4_hdmi_connector_best_encoder(struct d
+ return hdmi_connector->encoder;
+ }
+
+-/*
+- * drm_helper_probe_single_connector_modes() applies drm_mode_set_crtcinfo to
+- * all modes with flag CRTC_INTERLACE_HALVE_V. We don't want this, as it
+- * screws up vblank timestamping for interlaced modes, so fix it up.
+- */
+-static int vc4_hdmi_connector_probe_modes(struct drm_connector *connector,
+- uint32_t maxX, uint32_t maxY)
+-{
+- struct drm_display_mode *mode;
+- int count;
+-
+- count = drm_helper_probe_single_connector_modes(connector, maxX, maxY);
+- if (count == 0)
+- return 0;
+-
+- DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed adapted modes :\n",
+- connector->base.id, connector->name);
+- list_for_each_entry(mode, &connector->modes, head) {
+- drm_mode_set_crtcinfo(mode, 0);
+- drm_mode_debug_printmodeline(mode);
+- }
+-
+- return count;
+-}
+-
+ static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .detect = vc4_hdmi_connector_detect,
+- .fill_modes = vc4_hdmi_connector_probe_modes,
++ .fill_modes = drm_helper_probe_single_connector_modes,
+ .destroy = vc4_hdmi_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+@@ -316,16 +291,20 @@ static void vc4_hdmi_encoder_mode_set(st
+ bool debug_dump_regs = false;
+ bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
+ bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
+- u32 vactive = (mode->vdisplay >>
+- ((mode->flags & DRM_MODE_FLAG_INTERLACE) ? 1 : 0));
+- u32 verta = (VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
++ bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
++ u32 verta = (VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
+ VC4_HDMI_VERTA_VSP) |
+- VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
++ VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay,
+ VC4_HDMI_VERTA_VFP) |
+- VC4_SET_FIELD(vactive, VC4_HDMI_VERTA_VAL));
++ VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL));
+ u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
+- VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
++ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
+ VC4_HDMI_VERTB_VBP));
++ u32 vertb_even = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
++ VC4_SET_FIELD(mode->crtc_vtotal -
++ mode->crtc_vsync_end -
++ interlaced,
++ VC4_HDMI_VERTB_VBP));
+ u32 csc_ctl;
+
+ if (debug_dump_regs) {
+@@ -358,7 +337,7 @@ static void vc4_hdmi_encoder_mode_set(st
+ HDMI_WRITE(VC4_HDMI_VERTA0, verta);
+ HDMI_WRITE(VC4_HDMI_VERTA1, verta);
+
+- HDMI_WRITE(VC4_HDMI_VERTB0, vertb);
++ HDMI_WRITE(VC4_HDMI_VERTB0, vertb_even);
+ HDMI_WRITE(VC4_HDMI_VERTB1, vertb);
+
+ HD_WRITE(VC4_HD_VID_CTL,
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -183,6 +183,9 @@
+ # define PV_CONTROL_EN BIT(0)
+
+ #define PV_V_CONTROL 0x04
++# define PV_VCONTROL_ODD_DELAY_MASK VC4_MASK(22, 6)
++# define PV_VCONTROL_ODD_DELAY_SHIFT 6
++# define PV_VCONTROL_ODD_FIRST BIT(5)
+ # define PV_VCONTROL_INTERLACE BIT(4)
+ # define PV_VCONTROL_DSI BIT(3)
+ # define PV_VCONTROL_COMMAND BIT(2)
--- /dev/null
+From 4d372013a839ae71582004fbc1aa1905c73d1497 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 28 Sep 2016 17:58:52 -0700
+Subject: [PATCH] clk: bcm2835: Clamp the PLL's requested rate to the hardware
+ limits.
+
+Fixes setting low-resolution video modes on HDMI. Now the PLLH_PIX
+divider adjusts itself until the PLLH is within bounds.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/clk/bcm/clk-bcm2835.c | 11 ++++-------
+ 1 file changed, 4 insertions(+), 7 deletions(-)
+
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -523,8 +523,12 @@ static long bcm2835_pll_rate_from_diviso
+ static long bcm2835_pll_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *parent_rate)
+ {
++ struct bcm2835_pll *pll = container_of(hw, struct bcm2835_pll, hw);
++ const struct bcm2835_pll_data *data = pll->data;
+ u32 ndiv, fdiv;
+
++ rate = clamp(rate, data->min_rate, data->max_rate);
++
+ bcm2835_pll_choose_ndiv_and_fdiv(rate, *parent_rate, &ndiv, &fdiv);
+
+ return bcm2835_pll_rate_from_divisors(*parent_rate, ndiv, fdiv, 1);
+@@ -629,13 +633,6 @@ static int bcm2835_pll_set_rate(struct c
+ u32 ana[4];
+ int i;
+
+- if (rate < data->min_rate || rate > data->max_rate) {
+- dev_err(cprman->dev, "%s: rate out of spec: %lu vs (%lu, %lu)\n",
+- clk_hw_get_name(hw), rate,
+- data->min_rate, data->max_rate);
+- return -EINVAL;
+- }
+-
+ if (rate > data->max_fb_rate) {
+ use_fb_prediv = true;
+ rate /= 2;
--- /dev/null
+From 76359522fa9c449fb715d1933523c153cc1871f3 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 29 Sep 2016 10:34:21 -0700
+Subject: [PATCH] drm/vc4: Set up the AVI and SPD infoframes.
+
+Fixes a purple bar on the left side of the screen with my Dell
+2408WFP. It will also be required for supporting the double-clocked
+video modes.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 136 +++++++++++++++++++++++++++++++++++++++--
+ drivers/gpu/drm/vc4/vc4_regs.h | 5 ++
+ 2 files changed, 136 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -62,6 +62,8 @@ struct vc4_hdmi {
+ struct vc4_hdmi_encoder {
+ struct vc4_encoder base;
+ bool hdmi_monitor;
++ bool limited_rgb_range;
++ bool rgb_range_selectable;
+ };
+
+ static inline struct vc4_hdmi_encoder *
+@@ -205,6 +207,12 @@ static int vc4_hdmi_connector_get_modes(
+ return -ENODEV;
+
+ vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid);
++
++ if (edid && edid->input & DRM_EDID_INPUT_DIGITAL) {
++ vc4_encoder->rgb_range_selectable =
++ drm_rgb_quant_range_selectable(edid);
++ }
++
+ drm_mode_connector_update_edid_property(connector, edid);
+ ret = drm_add_edid_modes(connector, edid);
+
+@@ -281,6 +289,117 @@ static const struct drm_encoder_funcs vc
+ .destroy = vc4_hdmi_encoder_destroy,
+ };
+
++static int vc4_hdmi_stop_packet(struct drm_encoder *encoder,
++ enum hdmi_infoframe_type type)
++{
++ struct drm_device *dev = encoder->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ u32 packet_id = type - 0x80;
++
++ HDMI_WRITE(VC4_HDMI_RAM_PACKET_CONFIG,
++ HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) & ~BIT(packet_id));
++
++ return wait_for(!(HDMI_READ(VC4_HDMI_RAM_PACKET_STATUS) &
++ BIT(packet_id)), 100);
++}
++
++static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder,
++ union hdmi_infoframe *frame)
++{
++ struct drm_device *dev = encoder->dev;
++ struct vc4_dev *vc4 = to_vc4_dev(dev);
++ u32 packet_id = frame->any.type - 0x80;
++ u32 packet_reg = VC4_HDMI_GCP_0 + VC4_HDMI_PACKET_STRIDE * packet_id;
++ uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
++ ssize_t len, i;
++ int ret;
++
++ WARN_ONCE(!(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) &
++ VC4_HDMI_RAM_PACKET_ENABLE),
++ "Packet RAM has to be on to store the packet.");
++
++ len = hdmi_infoframe_pack(frame, buffer, sizeof(buffer));
++ if (len < 0)
++ return;
++
++ ret = vc4_hdmi_stop_packet(encoder, frame->any.type);
++ if (ret) {
++ DRM_ERROR("Failed to wait for infoframe to go idle: %d\n", ret);
++ return;
++ }
++
++ for (i = 0; i < len; i += 7) {
++ HDMI_WRITE(packet_reg,
++ buffer[i + 0] << 0 |
++ buffer[i + 1] << 8 |
++ buffer[i + 2] << 16);
++ packet_reg += 4;
++
++ HDMI_WRITE(packet_reg,
++ buffer[i + 3] << 0 |
++ buffer[i + 4] << 8 |
++ buffer[i + 5] << 16 |
++ buffer[i + 6] << 24);
++ packet_reg += 4;
++ }
++
++ HDMI_WRITE(VC4_HDMI_RAM_PACKET_CONFIG,
++ HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) | BIT(packet_id));
++ ret = wait_for((HDMI_READ(VC4_HDMI_RAM_PACKET_STATUS) &
++ BIT(packet_id)), 100);
++ if (ret)
++ DRM_ERROR("Failed to wait for infoframe to start: %d\n", ret);
++}
++
++static void vc4_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
++{
++ struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
++ struct drm_crtc *crtc = encoder->crtc;
++ const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
++ union hdmi_infoframe frame;
++ int ret;
++
++ ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode);
++ if (ret < 0) {
++ DRM_ERROR("couldn't fill AVI infoframe\n");
++ return;
++ }
++
++ if (vc4_encoder->rgb_range_selectable) {
++ if (vc4_encoder->limited_rgb_range) {
++ frame.avi.quantization_range =
++ HDMI_QUANTIZATION_RANGE_LIMITED;
++ } else {
++ frame.avi.quantization_range =
++ HDMI_QUANTIZATION_RANGE_FULL;
++ }
++ }
++
++ vc4_hdmi_write_infoframe(encoder, &frame);
++}
++
++static void vc4_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
++{
++ union hdmi_infoframe frame;
++ int ret;
++
++ ret = hdmi_spd_infoframe_init(&frame.spd, "Broadcom", "Videocore");
++ if (ret < 0) {
++ DRM_ERROR("couldn't fill SPD infoframe\n");
++ return;
++ }
++
++ frame.spd.sdi = HDMI_SPD_SDI_PC;
++
++ vc4_hdmi_write_infoframe(encoder, &frame);
++}
++
++static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder)
++{
++ vc4_hdmi_set_avi_infoframe(encoder);
++ vc4_hdmi_set_spd_infoframe(encoder);
++}
++
+ static void vc4_hdmi_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *unadjusted_mode,
+ struct drm_display_mode *mode)
+@@ -349,8 +468,9 @@ static void vc4_hdmi_encoder_mode_set(st
+
+ if (vc4_encoder->hdmi_monitor && drm_match_cea_mode(mode) > 1) {
+ /* CEA VICs other than #1 requre limited range RGB
+- * output. Apply a colorspace conversion to squash
+- * 0-255 down to 16-235. The matrix here is:
++ * output unless overridden by an AVI infoframe.
++ * Apply a colorspace conversion to squash 0-255 down
++ * to 16-235. The matrix here is:
+ *
+ * [ 0 0 0.8594 16]
+ * [ 0 0.8594 0 16]
+@@ -368,6 +488,9 @@ static void vc4_hdmi_encoder_mode_set(st
+ HD_WRITE(VC4_HD_CSC_24_23, (0x100 << 16) | 0x000);
+ HD_WRITE(VC4_HD_CSC_32_31, (0x000 << 16) | 0x6e0);
+ HD_WRITE(VC4_HD_CSC_34_33, (0x100 << 16) | 0x000);
++ vc4_encoder->limited_rgb_range = true;
++ } else {
++ vc4_encoder->limited_rgb_range = false;
+ }
+
+ /* The RGB order applies even when CSC is disabled. */
+@@ -386,6 +509,8 @@ static void vc4_hdmi_encoder_disable(str
+ struct drm_device *dev = encoder->dev;
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+
++ HDMI_WRITE(VC4_HDMI_RAM_PACKET_CONFIG, 0);
++
+ HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16);
+ HD_WRITE(VC4_HD_VID_CTL,
+ HD_READ(VC4_HD_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
+@@ -438,9 +563,10 @@ static void vc4_hdmi_encoder_enable(stru
+ HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) |
+ VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT);
+
+- /* XXX: Set HDMI_RAM_PACKET_CONFIG (1 << 16) and set
+- * up the infoframe.
+- */
++ HDMI_WRITE(VC4_HDMI_RAM_PACKET_CONFIG,
++ VC4_HDMI_RAM_PACKET_ENABLE);
++
++ vc4_hdmi_set_infoframes(encoder);
+
+ drift = HDMI_READ(VC4_HDMI_FIFO_CTL);
+ drift &= VC4_HDMI_FIFO_VALID_WRITE_MASK;
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -443,6 +443,8 @@
+ #define VC4_HDMI_RAM_PACKET_CONFIG 0x0a0
+ # define VC4_HDMI_RAM_PACKET_ENABLE BIT(16)
+
++#define VC4_HDMI_RAM_PACKET_STATUS 0x0a4
++
+ #define VC4_HDMI_HORZA 0x0c4
+ # define VC4_HDMI_HORZA_VPOS BIT(14)
+ # define VC4_HDMI_HORZA_HPOS BIT(13)
+@@ -504,6 +506,9 @@
+
+ #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0
+
++#define VC4_HDMI_GCP_0 0x400
++#define VC4_HDMI_PACKET_STRIDE 0x24
++
+ #define VC4_HD_M_CTL 0x00c
+ # define VC4_HD_M_REGISTER_FILE_STANDBY (3 << 6)
+ # define VC4_HD_M_RAM_STANDBY (3 << 4)
--- /dev/null
+From 184580ac95b7fa05eaf5ee16393ddd6103493d0a Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Wed, 28 Sep 2016 19:01:48 -0700
+Subject: [PATCH] drm/vc4: Add support for double-clocked modes.
+
+Now that we have infoframes to report the pixel repeat flag, we can
+start using it. Fixes locking the 720x480i and 720x576i modes on my
+Dell 2408WFP. Like the 1920x1080i case, they don't fit properly on
+the screen, though.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 17 +++++++++++------
+ drivers/gpu/drm/vc4/vc4_hdmi.c | 16 +++++++++++-----
+ drivers/gpu/drm/vc4/vc4_regs.h | 2 ++
+ 3 files changed, 24 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -371,6 +371,7 @@ static void vc4_crtc_mode_set_nofb(struc
+ bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 ||
+ vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
+ u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
++ u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
+ bool debug_dump_regs = false;
+
+ if (debug_dump_regs) {
+@@ -384,14 +385,17 @@ static void vc4_crtc_mode_set_nofb(struc
+ CRTC_WRITE(PV_CONTROL, 0);
+
+ CRTC_WRITE(PV_HORZA,
+- VC4_SET_FIELD(mode->htotal - mode->hsync_end,
++ VC4_SET_FIELD((mode->htotal -
++ mode->hsync_end) * pixel_rep,
+ PV_HORZA_HBP) |
+- VC4_SET_FIELD(mode->hsync_end - mode->hsync_start,
++ VC4_SET_FIELD((mode->hsync_end -
++ mode->hsync_start) * pixel_rep,
+ PV_HORZA_HSYNC));
+ CRTC_WRITE(PV_HORZB,
+- VC4_SET_FIELD(mode->hsync_start - mode->hdisplay,
++ VC4_SET_FIELD((mode->hsync_start -
++ mode->hdisplay) * pixel_rep,
+ PV_HORZB_HFP) |
+- VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE));
++ VC4_SET_FIELD(mode->hdisplay * pixel_rep, PV_HORZB_HACTIVE));
+
+ CRTC_WRITE(PV_VERTA,
+ VC4_SET_FIELD(mode->crtc_vtotal - mode->crtc_vsync_end,
+@@ -426,7 +430,7 @@ static void vc4_crtc_mode_set_nofb(struc
+ PV_VCONTROL_CONTINUOUS |
+ (is_dsi ? PV_VCONTROL_DSI : 0) |
+ PV_VCONTROL_INTERLACE |
+- VC4_SET_FIELD(mode->htotal / 2,
++ VC4_SET_FIELD(mode->htotal * pixel_rep / 2,
+ PV_VCONTROL_ODD_DELAY));
+ CRTC_WRITE(PV_VSYNCD_EVEN, 0);
+ } else {
+@@ -435,12 +439,13 @@ static void vc4_crtc_mode_set_nofb(struc
+ (is_dsi ? PV_VCONTROL_DSI : 0));
+ }
+
+- CRTC_WRITE(PV_HACT_ACT, mode->hdisplay);
++ CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep);
+
+ CRTC_WRITE(PV_CONTROL,
+ VC4_SET_FIELD(format, PV_CONTROL_FORMAT) |
+ VC4_SET_FIELD(vc4_get_fifo_full_level(format),
+ PV_CONTROL_FIFO_LEVEL) |
++ VC4_SET_FIELD(pixel_rep - 1, PV_CONTROL_PIXEL_REP) |
+ PV_CONTROL_CLR_AT_START |
+ PV_CONTROL_TRIGGER_UNDERFLOW |
+ PV_CONTROL_WAIT_HSTART |
+--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
++++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
+@@ -411,6 +411,7 @@ static void vc4_hdmi_encoder_mode_set(st
+ bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
+ bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
+ bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
++ u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1;
+ u32 verta = (VC4_SET_FIELD(mode->crtc_vsync_end - mode->crtc_vsync_start,
+ VC4_HDMI_VERTA_VSP) |
+ VC4_SET_FIELD(mode->crtc_vsync_start - mode->crtc_vdisplay,
+@@ -433,7 +434,8 @@ static void vc4_hdmi_encoder_mode_set(st
+
+ HD_WRITE(VC4_HD_VID_CTL, 0);
+
+- clk_set_rate(vc4->hdmi->pixel_clock, mode->clock * 1000);
++ clk_set_rate(vc4->hdmi->pixel_clock, mode->clock * 1000 *
++ ((mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1));
+
+ HDMI_WRITE(VC4_HDMI_SCHEDULER_CONTROL,
+ HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) |
+@@ -443,14 +445,18 @@ static void vc4_hdmi_encoder_mode_set(st
+ HDMI_WRITE(VC4_HDMI_HORZA,
+ (vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
+ (hsync_pos ? VC4_HDMI_HORZA_HPOS : 0) |
+- VC4_SET_FIELD(mode->hdisplay, VC4_HDMI_HORZA_HAP));
++ VC4_SET_FIELD(mode->hdisplay * pixel_rep,
++ VC4_HDMI_HORZA_HAP));
+
+ HDMI_WRITE(VC4_HDMI_HORZB,
+- VC4_SET_FIELD(mode->htotal - mode->hsync_end,
++ VC4_SET_FIELD((mode->htotal -
++ mode->hsync_end) * pixel_rep,
+ VC4_HDMI_HORZB_HBP) |
+- VC4_SET_FIELD(mode->hsync_end - mode->hsync_start,
++ VC4_SET_FIELD((mode->hsync_end -
++ mode->hsync_start) * pixel_rep,
+ VC4_HDMI_HORZB_HSP) |
+- VC4_SET_FIELD(mode->hsync_start - mode->hdisplay,
++ VC4_SET_FIELD((mode->hsync_start -
++ mode->hdisplay) * pixel_rep,
+ VC4_HDMI_HORZB_HFP));
+
+ HDMI_WRITE(VC4_HDMI_VERTA0, verta);
+--- a/drivers/gpu/drm/vc4/vc4_regs.h
++++ b/drivers/gpu/drm/vc4/vc4_regs.h
+@@ -175,6 +175,8 @@
+ # define PV_CONTROL_CLR_AT_START BIT(14)
+ # define PV_CONTROL_TRIGGER_UNDERFLOW BIT(13)
+ # define PV_CONTROL_WAIT_HSTART BIT(12)
++# define PV_CONTROL_PIXEL_REP_MASK VC4_MASK(5, 4)
++# define PV_CONTROL_PIXEL_REP_SHIFT 4
+ # define PV_CONTROL_CLK_SELECT_DSI_VEC 0
+ # define PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI 1
+ # define PV_CONTROL_CLK_SELECT_MASK VC4_MASK(3, 2)
--- /dev/null
+From 9e4059062b23b8f220d3f5d2c317d7a96697d355 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Mon, 10 Oct 2016 15:06:20 +0100
+Subject: [PATCH] BCM270X_DT: Update CM3 to use sdhost interface
+
+---
+ arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
+@@ -8,10 +8,9 @@
+ };
+
+ &gpio {
+-
+- mmc_pins: mmc_pins {
++ sdhost_pins: sdhost_pins {
+ brcm,pins = <48 49 50 51 52 53>;
+- brcm,function = <7>; /* alt3 */
++ brcm,function = <4>; /* alt0 */
+ brcm,pull = <0 2 2 2 2 2>;
+ };
+
+@@ -46,9 +45,9 @@
+ };
+ };
+
+-&mmc {
++&sdhost {
+ pinctrl-names = "default";
+- pinctrl-0 = <&mmc_pins>;
++ pinctrl-0 = <&sdhost_pins>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
--- /dev/null
+From c0b690ea72068de3cc9e48e99efa1d2cc72a9d0c Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 10 Oct 2016 09:44:06 -0700
+Subject: [PATCH] drm/vc4: Fix memory leak of the CRTC state.
+
+The underscores variant frees the pointers inside, while the
+no-underscores variant calls underscores and then frees the struct.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: d8dbf44f13b9 ("drm/vc4: Make the CRTCs cooperate on allocating display lists.")
+Cc: stable@vger.kernel.org
+---
+ drivers/gpu/drm/vc4/vc4_crtc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_crtc.c
++++ b/drivers/gpu/drm/vc4/vc4_crtc.c
+@@ -862,7 +862,7 @@ static void vc4_crtc_destroy_state(struc
+
+ }
+
+- __drm_atomic_helper_crtc_destroy_state(crtc, state);
++ drm_atomic_helper_crtc_destroy_state(crtc, state);
+ }
+
+ static const struct drm_crtc_funcs vc4_crtc_funcs = {
--- /dev/null
+From be7d40bc3716ddaaff3cc085f0bdd90b26b72aeb Mon Sep 17 00:00:00 2001
+From: Dan Williams <dan.j.williams@intel.com>
+Date: Wed, 21 Sep 2016 12:50:45 -0700
+Subject: [PATCH] x86/boot: Fix kdump, cleanup aborted E820_PRAM max_pfn
+ manipulation
+
+commit 917db484dc6a69969d317b3e57add4208a8d9d42 upstream.
+
+In commit:
+
+ ec776ef6bbe1 ("x86/mm: Add support for the non-standard protected e820 type")
+
+Christoph references the original patch I wrote implementing pmem support.
+The intent of the 'max_pfn' changes in that commit were to enable persistent
+memory ranges to be covered by the struct page memmap by default.
+
+However, that approach was abandoned when Christoph ported the patches [1], and
+that functionality has since been replaced by devm_memremap_pages().
+
+In the meantime, this max_pfn manipulation is confusing kdump [2] that
+assumes that everything covered by the max_pfn is "System RAM". This
+results in kdump hanging or crashing.
+
+ [1]: https://lists.01.org/pipermail/linux-nvdimm/2015-March/000348.html
+ [2]: https://bugzilla.redhat.com/show_bug.cgi?id=1351098
+
+So fix it.
+
+Reported-by: Zhang Yi <yizhan@redhat.com>
+Reported-by: Jeff Moyer <jmoyer@redhat.com>
+Tested-by: Zhang Yi <yizhan@redhat.com>
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+Reviewed-by: Jeff Moyer <jmoyer@redhat.com>
+Cc: Andrew Morton <akpm@linux-foundation.org>
+Cc: Boaz Harrosh <boaz@plexistor.com>
+Cc: Christoph Hellwig <hch@lst.de>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Ross Zwisler <ross.zwisler@linux.intel.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: linux-nvdimm@lists.01.org
+Fixes: ec776ef6bbe1 ("x86/mm: Add support for the non-standard protected e820 type")
+Link: http://lkml.kernel.org/r/147448744538.34910.11287693517367139607.stgit@dwillia2-desk3.amr.corp.intel.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/e820.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/e820.c
++++ b/arch/x86/kernel/e820.c
+@@ -347,7 +347,7 @@ int __init sanitize_e820_map(struct e820
+ * continue building up new bios map based on this
+ * information
+ */
+- if (current_type != last_type || current_type == E820_PRAM) {
++ if (current_type != last_type) {
+ if (last_type != 0) {
+ new_bios[new_bios_entry].size =
+ change_point[chgidx]->addr - last_addr;
--- /dev/null
+From 1c20ff1871ce0edc2d4c71a1eb4591cb4e8912e9 Mon Sep 17 00:00:00 2001
+From: gtrainavicius <gtrainavicius@users.noreply.github.com>
+Date: Sun, 23 Oct 2016 12:06:53 +0300
+Subject: [PATCH] Support for Blokas Labs pisound board
+
+---
+ .../devicetree/bindings/vendor-prefixes.txt | 1 +
+ arch/arm/boot/dts/overlays/Makefile | 1 +
+ arch/arm/boot/dts/overlays/README | 6 +
+ arch/arm/boot/dts/overlays/pisound-overlay.dts | 114 +++
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ sound/soc/bcm/Kconfig | 6 +
+ sound/soc/bcm/Makefile | 2 +
+ sound/soc/bcm/pisound.c | 987 +++++++++++++++++++++
+ 9 files changed, 1119 insertions(+)
+ create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
+ create mode 100644 sound/soc/bcm/pisound.c
+
+--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
++++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
+@@ -33,6 +33,7 @@ auo AU Optronics Corporation
+ avago Avago Technologies
+ avic Shanghai AVIC Optoelectronics Co., Ltd.
+ axis Axis Communications AB
++blokaslabs Vilniaus Blokas UAB
+ bosch Bosch Sensortec GmbH
+ boundary Boundary Devices Inc.
+ brcm Broadcom Corporation
+--- a/arch/arm/boot/dts/overlays/Makefile
++++ b/arch/arm/boot/dts/overlays/Makefile
+@@ -62,6 +62,7 @@ dtbo-$(RPI_DT_OVERLAYS) += pi3-disable-b
+ dtbo-$(RPI_DT_OVERLAYS) += pi3-miniuart-bt.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += piscreen.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += piscreen2r.dtbo
++dtbo-$(RPI_DT_OVERLAYS) += pisound.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft22.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft28-capacitive.dtbo
+ dtbo-$(RPI_DT_OVERLAYS) += pitft28-resistive.dtbo
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -808,6 +808,12 @@ Params: speed Display
+ xohms Touchpanel sensitivity (X-plate resistance)
+
+
++Name: pisound
++Info: Configures the Blokas Labs pisound card
++Load: dtoverlay=pisound
++Params: <None>
++
++
+ Name: pitft22
+ Info: Adafruit PiTFT 2.2" screen
+ Load: dtoverlay=pitft22,<param>=<val>
+--- /dev/null
++++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
+@@ -0,0 +1,114 @@
++/*
++ * pisound Linux kernel module.
++ * Copyright (C) 2016 Vilniaus Blokas UAB, http://blokas.io/pisound
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; version 2 of the
++ * License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ compatible = "brcm,bcm2708";
++
++ fragment@0 {
++ target = <&sound>;
++ __overlay__ {
++ compatible = "blokaslabs,pisound";
++ i2s-controller = <&i2s>;
++ status = "okay";
++
++ pinctrl-0 = <&pisound_button_pins>;
++
++ osr-gpios =
++ <&gpio 13 GPIO_ACTIVE_HIGH>,
++ <&gpio 26 GPIO_ACTIVE_HIGH>,
++ <&gpio 16 GPIO_ACTIVE_HIGH>;
++
++ reset-gpios =
++ <&gpio 12 GPIO_ACTIVE_HIGH>,
++ <&gpio 24 GPIO_ACTIVE_HIGH>;
++
++ data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
++
++ button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
++ };
++ };
++
++ fragment@1 {
++ target = <&gpio>;
++ __overlay__ {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pisound_button_pins>;
++
++ pisound_button_pins: pisound_button_pins {
++ brcm,pins = <17>;
++ brcm,function = <0>; // Input
++ brcm,pull = <2>; // Pull-Up
++ };
++ };
++ };
++
++ fragment@2 {
++ target = <&i2s>;
++ __overlay__ {
++ status = "okay";
++ };
++ };
++
++ fragment@3 {
++ target-path = "/";
++ __overlay__ {
++ pcm5102a-codec {
++ #sound-dai-cells = <0>;
++ compatible = "ti,pcm5102a";
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@4 {
++ target = <&spi0>;
++ __overlay__ {
++ status = "okay";
++
++ spidev@0{
++ status = "disabled";
++ };
++
++ spidev@1{
++ status = "okay";
++ };
++ };
++ };
++
++ fragment@5 {
++ target = <&spi0>;
++ __overlay__ {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ pisound_spi: pisound_spi@0{
++ compatible = "blokaslabs,pisound-spi";
++ reg = <0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins>;
++ spi-max-frequency = <1000000>;
++ };
++ };
++ };
++};
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -880,6 +880,7 @@ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
++CONFIG_SND_PISOUND=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -872,6 +872,7 @@ CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m
+ CONFIG_SND_DIGIDAC1_SOUNDCARD=m
+ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
++CONFIG_SND_PISOUND=m
+ CONFIG_SND_SOC_ADAU1701=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+--- a/sound/soc/bcm/Kconfig
++++ b/sound/soc/bcm/Kconfig
+@@ -121,3 +121,9 @@ config SND_BCM2708_SOC_ALLO_PIANO_DAC
+ select SND_SOC_PCM512x_I2C
+ help
+ Say Y or M if you want to add support for Allo Piano DAC.
++
++config SND_PISOUND
++ tristate "Support for Blokas Labs pisound"
++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S
++ help
++ Say Y or M if you want to add support for Blokas Labs pisound.
+--- a/sound/soc/bcm/Makefile
++++ b/sound/soc/bcm/Makefile
+@@ -20,6 +20,7 @@ snd-soc-audioinjector-pi-soundcard-objs
+ snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o
+ snd-soc-dionaudio-loco-objs := dionaudio_loco.o
+ snd-soc-allo-piano-dac-objs := allo-piano-dac.o
++snd-soc-pisound-objs := pisound.o
+
+ obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o
+ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o
+@@ -37,3 +38,4 @@ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDC
+ obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o
+ obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o
+ obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o
++obj-$(CONFIG_SND_PISOUND) += snd-soc-pisound.o
+--- /dev/null
++++ b/sound/soc/bcm/pisound.c
+@@ -0,0 +1,987 @@
++/*
++ * pisound Linux kernel module.
++ * Copyright (C) 2016 Vilniaus Blokas UAB, http://blokas.io/pisound
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; version 2 of the
++ * License.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++ * MA 02110-1301, USA.
++ */
++
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/gpio.h>
++#include <linux/kobject.h>
++#include <linux/sysfs.h>
++#include <linux/delay.h>
++#include <linux/spi/spi.h>
++#include <linux/interrupt.h>
++#include <linux/kfifo.h>
++
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/jack.h>
++#include <sound/rawmidi.h>
++#include <sound/asequencer.h>
++
++static int pisnd_spi_init(struct device *dev);
++static void pisnd_spi_uninit(void);
++
++static void pisnd_spi_send(uint8_t val);
++static uint8_t pisnd_spi_recv(uint8_t *buffer, uint8_t length);
++
++typedef void (*pisnd_spi_recv_cb)(void *data);
++static void pisnd_spi_set_callback(pisnd_spi_recv_cb cb, void *data);
++
++static const char *pisnd_spi_get_serial(void);
++static const char *pisnd_spi_get_id(void);
++static const char *pisnd_spi_get_version(void);
++
++static int pisnd_midi_init(struct snd_card *card);
++static void pisnd_midi_uninit(void);
++
++#define PISOUND_LOG_PREFIX "pisound: "
++
++#ifdef DEBUG
++# define printd(...) pr_alert(PISOUND_LOG_PREFIX __VA_ARGS__)
++#else
++# define printd(...) do {} while (0)
++#endif
++
++#define printe(...) pr_err(PISOUND_LOG_PREFIX __VA_ARGS__)
++#define printi(...) pr_info(PISOUND_LOG_PREFIX __VA_ARGS__)
++
++static int pisnd_output_open(struct snd_rawmidi_substream *substream)
++{
++ return 0;
++}
++
++static int pisnd_output_close(struct snd_rawmidi_substream *substream)
++{
++ return 0;
++}
++
++static void pisnd_output_trigger(
++ struct snd_rawmidi_substream *substream,
++ int up
++ )
++{
++ uint8_t data;
++
++ if (!up)
++ return;
++
++ while (snd_rawmidi_transmit_peek(substream, &data, 1)) {
++ pisnd_spi_send(data);
++ snd_rawmidi_transmit_ack(substream, 1);
++ }
++}
++
++static void pisnd_output_drain(struct snd_rawmidi_substream *substream)
++{
++ uint8_t data;
++
++ while (snd_rawmidi_transmit_peek(substream, &data, 1)) {
++ pisnd_spi_send(data);
++
++ snd_rawmidi_transmit_ack(substream, 1);
++ }
++}
++
++static int pisnd_input_open(struct snd_rawmidi_substream *substream)
++{
++ return 0;
++}
++
++static int pisnd_input_close(struct snd_rawmidi_substream *substream)
++{
++ return 0;
++}
++
++static void pisnd_midi_recv_callback(void *substream)
++{
++ uint8_t data[128];
++ uint8_t n = 0;
++
++ while ((n = pisnd_spi_recv(data, sizeof(data)))) {
++ int res = snd_rawmidi_receive(substream, data, n);
++ (void)res;
++ printd("midi recv 0x%02x, res = %d\n", data, res);
++ }
++}
++
++static void pisnd_input_trigger(struct snd_rawmidi_substream *substream, int up)
++{
++ if (up) {
++ pisnd_spi_set_callback(pisnd_midi_recv_callback, substream);
++ pisnd_midi_recv_callback(substream);
++ } else {
++ pisnd_spi_set_callback(NULL, NULL);
++ }
++}
++
++static struct snd_rawmidi *g_rmidi;
++
++static struct snd_rawmidi_ops pisnd_output_ops = {
++ .open = pisnd_output_open,
++ .close = pisnd_output_close,
++ .trigger = pisnd_output_trigger,
++ .drain = pisnd_output_drain,
++};
++
++static struct snd_rawmidi_ops pisnd_input_ops = {
++ .open = pisnd_input_open,
++ .close = pisnd_input_close,
++ .trigger = pisnd_input_trigger,
++};
++
++static void pisnd_get_port_info(
++ struct snd_rawmidi *rmidi,
++ int number,
++ struct snd_seq_port_info *seq_port_info
++ )
++{
++ seq_port_info->type =
++ SNDRV_SEQ_PORT_TYPE_MIDI_GENERIC |
++ SNDRV_SEQ_PORT_TYPE_HARDWARE |
++ SNDRV_SEQ_PORT_TYPE_PORT;
++ seq_port_info->midi_voices = 0;
++}
++
++static struct snd_rawmidi_global_ops pisnd_global_ops = {
++ .get_port_info = pisnd_get_port_info,
++};
++
++static int pisnd_midi_init(struct snd_card *card)
++{
++ int err = snd_rawmidi_new(card, "pisound MIDI", 0, 1, 1, &g_rmidi);
++
++ if (err < 0) {
++ printe("snd_rawmidi_new failed: %d\n", err);
++ return err;
++ }
++
++ strcpy(g_rmidi->name, "pisound MIDI ");
++ strcat(g_rmidi->name, pisnd_spi_get_serial());
++
++ g_rmidi->info_flags =
++ SNDRV_RAWMIDI_INFO_OUTPUT |
++ SNDRV_RAWMIDI_INFO_INPUT |
++ SNDRV_RAWMIDI_INFO_DUPLEX;
++
++ g_rmidi->ops = &pisnd_global_ops;
++
++ g_rmidi->private_data = (void *)0;
++
++ snd_rawmidi_set_ops(
++ g_rmidi,
++ SNDRV_RAWMIDI_STREAM_OUTPUT,
++ &pisnd_output_ops
++ );
++
++ snd_rawmidi_set_ops(
++ g_rmidi,
++ SNDRV_RAWMIDI_STREAM_INPUT,
++ &pisnd_input_ops
++ );
++
++ return 0;
++}
++
++static void pisnd_midi_uninit(void)
++{
++}
++
++static void *g_recvData;
++static pisnd_spi_recv_cb g_recvCallback;
++
++#define FIFO_SIZE 512
++
++static char g_serial_num[11];
++static char g_id[25];
++static char g_version[5];
++
++DEFINE_KFIFO(spi_fifo_in, uint8_t, FIFO_SIZE);
++DEFINE_KFIFO(spi_fifo_out, uint8_t, FIFO_SIZE);
++
++static struct gpio_desc *data_available;
++static struct gpio_desc *spi_reset;
++
++static struct spi_device *pisnd_spi_device;
++
++static struct workqueue_struct *pisnd_workqueue;
++static struct work_struct pisnd_work_process;
++
++static void pisnd_work_handler(struct work_struct *work);
++
++static uint16_t spi_transfer16(uint16_t val);
++
++static int pisnd_init_workqueues(void)
++{
++ pisnd_workqueue = create_singlethread_workqueue("pisnd_workqueue");
++ INIT_WORK(&pisnd_work_process, pisnd_work_handler);
++
++ return 0;
++}
++
++static void pisnd_uninit_workqueues(void)
++{
++ flush_workqueue(pisnd_workqueue);
++ destroy_workqueue(pisnd_workqueue);
++
++ pisnd_workqueue = NULL;
++}
++
++static bool pisnd_spi_has_more(void)
++{
++ return gpiod_get_value(data_available);
++}
++
++enum task_e {
++ TASK_PROCESS = 0,
++};
++
++static void pisnd_schedule_process(enum task_e task)
++{
++ if (pisnd_spi_device != NULL &&
++ pisnd_workqueue != NULL &&
++ !work_pending(&pisnd_work_process)
++ ) {
++ printd("schedule: has more = %d\n", pisnd_spi_has_more());
++ if (task == TASK_PROCESS)
++ queue_work(pisnd_workqueue, &pisnd_work_process);
++ }
++}
++
++static irqreturn_t data_available_interrupt_handler(int irq, void *dev_id)
++{
++ if (irq == gpiod_to_irq(data_available) && pisnd_spi_has_more()) {
++ printd("schedule from irq\n");
++ pisnd_schedule_process(TASK_PROCESS);
++ }
++
++ return IRQ_HANDLED;
++}
++
++static DEFINE_SPINLOCK(spilock);
++static unsigned long spilockflags;
++
++static uint16_t spi_transfer16(uint16_t val)
++{
++ int err;
++ struct spi_transfer transfer;
++ struct spi_message msg;
++ uint8_t txbuf[2];
++ uint8_t rxbuf[2];
++
++ if (!pisnd_spi_device) {
++ printe("pisnd_spi_device null, returning\n");
++ return 0;
++ }
++
++ spi_message_init(&msg);
++
++ memset(&transfer, 0, sizeof(transfer));
++ memset(&rxbuf, 0, sizeof(rxbuf));
++
++ txbuf[0] = val >> 8;
++ txbuf[1] = val & 0xff;
++
++ transfer.tx_buf = &txbuf;
++ transfer.rx_buf = &rxbuf;
++ transfer.len = sizeof(txbuf);
++ transfer.speed_hz = 125000;
++ transfer.delay_usecs = 100;
++ spi_message_add_tail(&transfer, &msg);
++
++ spin_lock_irqsave(&spilock, spilockflags);
++ err = spi_sync(pisnd_spi_device, &msg);
++ spin_unlock_irqrestore(&spilock, spilockflags);
++
++ if (err < 0) {
++ printe("spi_sync error %d\n", err);
++ return 0;
++ }
++
++ printd("received: %02x%02x\n", rxbuf[0], rxbuf[1]);
++ printd("hasMore %d\n", pisnd_spi_has_more());
++
++ return (rxbuf[0] << 8) | rxbuf[1];
++}
++
++static int spi_read_bytes(char *dst, size_t length, uint8_t *bytesRead)
++{
++ uint16_t rx;
++ uint8_t size;
++ uint8_t i;
++
++ memset(dst, 0, length);
++ *bytesRead = 0;
++
++ rx = spi_transfer16(0);
++ if (!(rx >> 8))
++ return -EINVAL;
++
++ size = rx & 0xff;
++
++ if (size > length)
++ return -EINVAL;
++
++ for (i = 0; i < size; ++i) {
++ rx = spi_transfer16(0);
++ if (!(rx >> 8))
++ return -EINVAL;
++
++ dst[i] = rx & 0xff;
++ }
++
++ *bytesRead = i;
++
++ return 0;
++}
++
++static int spi_device_match(struct device *dev, void *data)
++{
++ struct spi_device *spi = container_of(dev, struct spi_device, dev);
++
++ printd(" %s %s %dkHz %d bits mode=0x%02X\n",
++ spi->modalias, dev_name(dev), spi->max_speed_hz/1000,
++ spi->bits_per_word, spi->mode);
++
++ if (strcmp("pisound-spi", spi->modalias) == 0) {
++ printi("\tFound!\n");
++ return 1;
++ }
++
++ printe("\tNot found!\n");
++ return 0;
++}
++
++static struct spi_device *pisnd_spi_find_device(void)
++{
++ struct device *dev;
++
++ printi("Searching for spi device...\n");
++ dev = bus_find_device(&spi_bus_type, NULL, NULL, spi_device_match);
++ if (dev != NULL)
++ return container_of(dev, struct spi_device, dev);
++ else
++ return NULL;
++}
++
++static void pisnd_work_handler(struct work_struct *work)
++{
++ uint16_t rx;
++ uint16_t tx;
++ uint8_t val;
++
++ if (work == &pisnd_work_process) {
++ if (pisnd_spi_device == NULL)
++ return;
++
++ do {
++ val = 0;
++ tx = 0;
++
++ if (kfifo_get(&spi_fifo_out, &val))
++ tx = 0x0f00 | val;
++
++ rx = spi_transfer16(tx);
++
++ if (rx & 0xff00) {
++ kfifo_put(&spi_fifo_in, rx & 0xff);
++ if (kfifo_len(&spi_fifo_in) > 16
++ && g_recvCallback)
++ g_recvCallback(g_recvData);
++ }
++ } while (rx != 0
++ || !kfifo_is_empty(&spi_fifo_out)
++ || pisnd_spi_has_more()
++ );
++
++ if (!kfifo_is_empty(&spi_fifo_in) && g_recvCallback)
++ g_recvCallback(g_recvData);
++ }
++}
++
++static int pisnd_spi_gpio_init(struct device *dev)
++{
++ spi_reset = gpiod_get_index(dev, "reset", 1, GPIOD_ASIS);
++ data_available = gpiod_get_index(dev, "data_available", 0, GPIOD_ASIS);
++
++ gpiod_direction_output(spi_reset, 1);
++ gpiod_direction_input(data_available);
++
++ /* Reset the slave. */
++ gpiod_set_value(spi_reset, false);
++ mdelay(1);
++ gpiod_set_value(spi_reset, true);
++
++ /* Give time for spi slave to start. */
++ mdelay(64);
++
++ return 0;
++}
++
++static void pisnd_spi_gpio_uninit(void)
++{
++ gpiod_set_value(spi_reset, false);
++ gpiod_put(spi_reset);
++ spi_reset = NULL;
++
++ gpiod_put(data_available);
++ data_available = NULL;
++}
++
++static int pisnd_spi_gpio_irq_init(struct device *dev)
++{
++ return request_irq(
++ gpiod_to_irq(data_available),
++ data_available_interrupt_handler,
++ IRQF_TIMER | IRQF_TRIGGER_RISING,
++ "data_available_int",
++ NULL
++ );
++}
++
++static void pisnd_spi_gpio_irq_uninit(void)
++{
++ free_irq(gpiod_to_irq(data_available), NULL);
++}
++
++static int spi_read_info(void)
++{
++ uint16_t tmp;
++ uint8_t count;
++ uint8_t n;
++ uint8_t i;
++ uint8_t j;
++ char buffer[257];
++ int ret;
++ char *p;
++
++ memset(g_serial_num, 0, sizeof(g_serial_num));
++ memset(g_version, 0, sizeof(g_version));
++ memset(g_id, 0, sizeof(g_id));
++
++ tmp = spi_transfer16(0);
++
++ if (!(tmp >> 8))
++ return -EINVAL;
++
++ count = tmp & 0xff;
++
++ for (i = 0; i < count; ++i) {
++ memset(buffer, 0, sizeof(buffer));
++ ret = spi_read_bytes(buffer, sizeof(buffer)-1, &n);
++
++ if (ret < 0)
++ return ret;
++
++ switch (i) {
++ case 0:
++ if (n != 2)
++ return -EINVAL;
++
++ snprintf(
++ g_version,
++ sizeof(g_version),
++ "%x.%02x",
++ buffer[0],
++ buffer[1]
++ );
++ break;
++ case 1:
++ if (n >= sizeof(g_serial_num))
++ return -EINVAL;
++
++ memcpy(g_serial_num, buffer, sizeof(g_serial_num));
++ break;
++ case 2:
++ {
++ if (n >= sizeof(g_id))
++ return -EINVAL;
++
++ p = g_id;
++ for (j = 0; j < n; ++j)
++ p += sprintf(p, "%02x", buffer[j]);
++ }
++ break;
++ default:
++ break;
++ }
++ }
++
++ return 0;
++}
++
++static int pisnd_spi_init(struct device *dev)
++{
++ int ret;
++ struct spi_device *spi;
++
++ memset(g_serial_num, 0, sizeof(g_serial_num));
++ memset(g_id, 0, sizeof(g_id));
++ memset(g_version, 0, sizeof(g_version));
++
++ spi = pisnd_spi_find_device();
++
++ if (spi != NULL) {
++ printd("initializing spi!\n");
++ pisnd_spi_device = spi;
++ ret = spi_setup(pisnd_spi_device);
++ } else {
++ printe("SPI device not found, deferring!\n");
++ return -EPROBE_DEFER;
++ }
++
++ ret = pisnd_spi_gpio_init(dev);
++
++ if (ret < 0) {
++ printe("SPI GPIO init failed: %d\n", ret);
++ spi_dev_put(pisnd_spi_device);
++ pisnd_spi_device = NULL;
++ pisnd_spi_gpio_uninit();
++ return ret;
++ }
++
++ ret = spi_read_info();
++
++ if (ret < 0) {
++ printe("Reading card info failed: %d\n", ret);
++ spi_dev_put(pisnd_spi_device);
++ pisnd_spi_device = NULL;
++ pisnd_spi_gpio_uninit();
++ return ret;
++ }
++
++ /* Flash the LEDs. */
++ spi_transfer16(0xf000);
++
++ ret = pisnd_spi_gpio_irq_init(dev);
++ if (ret < 0) {
++ printe("SPI irq request failed: %d\n", ret);
++ spi_dev_put(pisnd_spi_device);
++ pisnd_spi_device = NULL;
++ pisnd_spi_gpio_irq_uninit();
++ pisnd_spi_gpio_uninit();
++ }
++
++ ret = pisnd_init_workqueues();
++ if (ret != 0) {
++ printe("Workqueue initialization failed: %d\n", ret);
++ spi_dev_put(pisnd_spi_device);
++ pisnd_spi_device = NULL;
++ pisnd_spi_gpio_irq_uninit();
++ pisnd_spi_gpio_uninit();
++ pisnd_uninit_workqueues();
++ return ret;
++ }
++
++ if (pisnd_spi_has_more()) {
++ printd("data is available, scheduling from init\n");
++ pisnd_schedule_process(TASK_PROCESS);
++ }
++
++ return 0;
++}
++
++static void pisnd_spi_uninit(void)
++{
++ pisnd_uninit_workqueues();
++
++ spi_dev_put(pisnd_spi_device);
++ pisnd_spi_device = NULL;
++
++ pisnd_spi_gpio_irq_uninit();
++ pisnd_spi_gpio_uninit();
++}
++
++static void pisnd_spi_send(uint8_t val)
++{
++ kfifo_put(&spi_fifo_out, val);
++ printd("schedule from spi_send\n");
++ pisnd_schedule_process(TASK_PROCESS);
++}
++
++static uint8_t pisnd_spi_recv(uint8_t *buffer, uint8_t length)
++{
++ return kfifo_out(&spi_fifo_in, buffer, length);
++}
++
++static void pisnd_spi_set_callback(pisnd_spi_recv_cb cb, void *data)
++{
++ g_recvData = data;
++ g_recvCallback = cb;
++}
++
++static const char *pisnd_spi_get_serial(void)
++{
++ if (strlen(g_serial_num))
++ return g_serial_num;
++
++ return "";
++}
++
++static const char *pisnd_spi_get_id(void)
++{
++ if (strlen(g_id))
++ return g_id;
++
++ return "";
++}
++
++static const char *pisnd_spi_get_version(void)
++{
++ if (strlen(g_version))
++ return g_version;
++
++ return "";
++}
++
++static const struct of_device_id pisound_of_match[] = {
++ { .compatible = "blokaslabs,pisound", },
++ { .compatible = "blokaslabs,pisound-spi", },
++ {},
++};
++
++static struct gpio_desc *osr0, *osr1, *osr2;
++static struct gpio_desc *reset;
++static struct gpio_desc *button;
++
++static int pisnd_hw_params(
++ struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params
++ )
++{
++ printd("rate = %d\n", params_rate(params));
++ printd("ch = %d\n", params_channels(params));
++ printd("bits = %u\n",
++ snd_pcm_format_physical_width(params_format(params)));
++ printd("format = %d\n", params_format(params));
++
++ gpiod_set_value(reset, false);
++
++ switch (params_rate(params)) {
++ case 48000:
++ gpiod_set_value(osr0, true);
++ gpiod_set_value(osr1, false);
++ gpiod_set_value(osr2, false);
++ break;
++ case 96000:
++ gpiod_set_value(osr0, true);
++ gpiod_set_value(osr1, true);
++ gpiod_set_value(osr2, false);
++ break;
++ case 192000:
++ gpiod_set_value(osr0, true);
++ gpiod_set_value(osr1, true);
++ gpiod_set_value(osr2, true);
++ break;
++ default:
++ printe("Unsupported rate %u!\n", params_rate(params));
++ return -EINVAL;
++ }
++
++ gpiod_set_value(reset, true);
++
++ return 0;
++}
++
++static unsigned int rates[3] = {
++ 48000, 96000, 192000
++};
++
++static struct snd_pcm_hw_constraint_list constraints_rates = {
++ .count = ARRAY_SIZE(rates),
++ .list = rates,
++ .mask = 0,
++};
++
++static unsigned int sample_bits[] = {
++ 24, 32
++};
++
++static struct snd_pcm_hw_constraint_list constraints_sample_bits = {
++ .count = ARRAY_SIZE(sample_bits),
++ .list = sample_bits,
++ .mask = 0,
++};
++
++static int pisnd_startup(struct snd_pcm_substream *substream)
++{
++ int err = snd_pcm_hw_constraint_list(
++ substream->runtime,
++ 0,
++ SNDRV_PCM_HW_PARAM_RATE,
++ &constraints_rates
++ );
++
++ if (err < 0)
++ return err;
++
++ err = snd_pcm_hw_constraint_list(
++ substream->runtime,
++ 0,
++ SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
++ &constraints_sample_bits
++ );
++
++ if (err < 0)
++ return err;
++
++ return 0;
++}
++
++static struct snd_soc_ops pisnd_ops = {
++ .startup = pisnd_startup,
++ .hw_params = pisnd_hw_params,
++};
++
++static struct snd_soc_dai_link pisnd_dai[] = {
++ {
++ .name = "pisound",
++ .stream_name = "pisound",
++ .cpu_dai_name = "bcm2708-i2s.0",
++ .codec_dai_name = "snd-soc-dummy-dai",
++ .platform_name = "bcm2708-i2s.0",
++ .codec_name = "snd-soc-dummy",
++ .dai_fmt =
++ SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF |
++ SND_SOC_DAIFMT_CBM_CFM,
++ .ops = &pisnd_ops,
++ },
++};
++
++static int pisnd_card_probe(struct snd_soc_card *card)
++{
++ int err = pisnd_midi_init(card->snd_card);
++
++ if (err < 0)
++ printe("pisnd_midi_init failed: %d\n", err);
++
++ return err;
++}
++
++static int pisnd_card_remove(struct snd_soc_card *card)
++{
++ pisnd_midi_uninit();
++ return 0;
++}
++
++static struct snd_soc_card pisnd_card = {
++ .name = "pisound",
++ .owner = THIS_MODULE,
++ .dai_link = pisnd_dai,
++ .num_links = ARRAY_SIZE(pisnd_dai),
++ .probe = pisnd_card_probe,
++ .remove = pisnd_card_remove,
++};
++
++static int pisnd_init_gpio(struct device *dev)
++{
++ osr0 = gpiod_get_index(dev, "osr", 0, GPIOD_ASIS);
++ osr1 = gpiod_get_index(dev, "osr", 1, GPIOD_ASIS);
++ osr2 = gpiod_get_index(dev, "osr", 2, GPIOD_ASIS);
++
++ reset = gpiod_get_index(dev, "reset", 0, GPIOD_ASIS);
++
++ button = gpiod_get_index(dev, "button", 0, GPIOD_ASIS);
++
++ gpiod_direction_output(osr0, 1);
++ gpiod_direction_output(osr1, 1);
++ gpiod_direction_output(osr2, 1);
++ gpiod_direction_output(reset, 1);
++
++ gpiod_set_value(reset, false);
++ gpiod_set_value(osr0, true);
++ gpiod_set_value(osr1, false);
++ gpiod_set_value(osr2, false);
++ gpiod_set_value(reset, true);
++
++ gpiod_export(button, false);
++
++ return 0;
++}
++
++static int pisnd_uninit_gpio(void)
++{
++ int i;
++
++ struct gpio_desc **gpios[] = {
++ &osr0, &osr1, &osr2, &reset, &button,
++ };
++
++ gpiod_unexport(button);
++
++ for (i = 0; i < ARRAY_SIZE(gpios); ++i) {
++ if (*gpios[i] == NULL) {
++ printd("weird, GPIO[%d] is NULL already\n", i);
++ continue;
++ }
++
++ gpiod_put(*gpios[i]);
++ *gpios[i] = NULL;
++ }
++
++ return 0;
++}
++
++static struct kobject *pisnd_kobj;
++
++static ssize_t pisnd_serial_show(
++ struct kobject *kobj,
++ struct kobj_attribute *attr,
++ char *buf
++ )
++{
++ return sprintf(buf, "%s\n", pisnd_spi_get_serial());
++}
++
++static ssize_t pisnd_id_show(
++ struct kobject *kobj,
++ struct kobj_attribute *attr,
++ char *buf
++ )
++{
++ return sprintf(buf, "%s\n", pisnd_spi_get_id());
++}
++
++static ssize_t pisnd_version_show(
++ struct kobject *kobj,
++ struct kobj_attribute *attr,
++ char *buf
++ )
++{
++ return sprintf(buf, "%s\n", pisnd_spi_get_version());
++}
++
++static struct kobj_attribute pisnd_serial_attribute =
++ __ATTR(serial, 0644, pisnd_serial_show, NULL);
++static struct kobj_attribute pisnd_id_attribute =
++ __ATTR(id, 0644, pisnd_id_show, NULL);
++static struct kobj_attribute pisnd_version_attribute =
++ __ATTR(version, 0644, pisnd_version_show, NULL);
++
++static struct attribute *attrs[] = {
++ &pisnd_serial_attribute.attr,
++ &pisnd_id_attribute.attr,
++ &pisnd_version_attribute.attr,
++ NULL
++};
++
++static struct attribute_group attr_group = { .attrs = attrs };
++
++static int pisnd_probe(struct platform_device *pdev)
++{
++ int ret = 0;
++ int i;
++
++ ret = pisnd_spi_init(&pdev->dev);
++ if (ret < 0) {
++ printe("pisnd_spi_init failed: %d\n", ret);
++ return ret;
++ }
++
++ printi("Detected pisound card:\n");
++ printi("\tSerial: %s\n", pisnd_spi_get_serial());
++ printi("\tVersion: %s\n", pisnd_spi_get_version());
++ printi("\tId: %s\n", pisnd_spi_get_id());
++
++ pisnd_kobj = kobject_create_and_add("pisound", kernel_kobj);
++ if (!pisnd_kobj) {
++ pisnd_spi_uninit();
++ return -ENOMEM;
++ }
++
++ ret = sysfs_create_group(pisnd_kobj, &attr_group);
++ if (ret < 0) {
++ pisnd_spi_uninit();
++ kobject_put(pisnd_kobj);
++ return -ENOMEM;
++ }
++
++ pisnd_init_gpio(&pdev->dev);
++ pisnd_card.dev = &pdev->dev;
++
++ if (pdev->dev.of_node) {
++ struct device_node *i2s_node;
++
++ i2s_node = of_parse_phandle(
++ pdev->dev.of_node,
++ "i2s-controller",
++ 0
++ );
++
++ for (i = 0; i < pisnd_card.num_links; ++i) {
++ struct snd_soc_dai_link *dai = &pisnd_dai[i];
++
++ if (i2s_node) {
++ dai->cpu_dai_name = NULL;
++ dai->cpu_of_node = i2s_node;
++ dai->platform_name = NULL;
++ dai->platform_of_node = i2s_node;
++ dai->stream_name = pisnd_spi_get_serial();
++ }
++ }
++ }
++
++ ret = snd_soc_register_card(&pisnd_card);
++
++ if (ret < 0) {
++ printe("snd_soc_register_card() failed: %d\n", ret);
++ pisnd_uninit_gpio();
++ kobject_put(pisnd_kobj);
++ pisnd_spi_uninit();
++ }
++
++ return ret;
++}
++
++static int pisnd_remove(struct platform_device *pdev)
++{
++ if (pisnd_kobj) {
++ kobject_put(pisnd_kobj);
++ pisnd_kobj = NULL;
++ }
++
++ pisnd_spi_uninit();
++
++ /* Turn off */
++ gpiod_set_value(reset, false);
++ pisnd_uninit_gpio();
++
++ return snd_soc_unregister_card(&pisnd_card);
++}
++
++MODULE_DEVICE_TABLE(of, pisound_of_match);
++
++static struct platform_driver pisnd_driver = {
++ .driver = {
++ .name = "snd-rpi-pisound",
++ .owner = THIS_MODULE,
++ .of_match_table = pisound_of_match,
++ },
++ .probe = pisnd_probe,
++ .remove = pisnd_remove,
++};
++
++module_platform_driver(pisnd_driver);
++
++MODULE_AUTHOR("Giedrius Trainavicius <giedrius@blokas.io>");
++MODULE_DESCRIPTION("ASoC Driver for pisound, http://blokas.io/pisound");
++MODULE_LICENSE("GPL v2");
--- /dev/null
+From 84835c07b7cdf960db7cb9e8cf13363e2d8c99b0 Mon Sep 17 00:00:00 2001
+From: Giedrius Trainavicius <giedrius@blokas.io>
+Date: Tue, 25 Oct 2016 01:47:20 +0300
+Subject: [PATCH] pisound: Fix a warning in DEBUG builds
+
+Also change a macro that enables debug level printing from DEBUG to
+PISOUND_DEBUG.
+---
+ sound/soc/bcm/pisound.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/sound/soc/bcm/pisound.c
++++ b/sound/soc/bcm/pisound.c
+@@ -55,7 +55,7 @@ static void pisnd_midi_uninit(void);
+
+ #define PISOUND_LOG_PREFIX "pisound: "
+
+-#ifdef DEBUG
++#ifdef PISOUND_DEBUG
+ # define printd(...) pr_alert(PISOUND_LOG_PREFIX __VA_ARGS__)
+ #else
+ # define printd(...) do {} while (0)
+@@ -119,7 +119,7 @@ static void pisnd_midi_recv_callback(voi
+ while ((n = pisnd_spi_recv(data, sizeof(data)))) {
+ int res = snd_rawmidi_receive(substream, data, n);
+ (void)res;
+- printd("midi recv 0x%02x, res = %d\n", data, res);
++ printd("midi recv %u bytes, res = %d\n", n, res);
+ }
+ }
+
--- /dev/null
+From 0444a6ca389812c715a59bb4c3ec4def409340ef Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Tue, 1 Nov 2016 13:10:05 +0000
+Subject: [PATCH] config: Add CONFIG_HTU21 module
+
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -1154,6 +1154,7 @@ CONFIG_IIO_KFIFO_BUF=m
+ CONFIG_MCP320X=m
+ CONFIG_MCP3422=m
+ CONFIG_DHT11=m
++CONFIG_HTU21=m
+ CONFIG_PWM_BCM2835=m
+ CONFIG_PWM_PCA9685=m
+ CONFIG_RASPBERRYPI_FIRMWARE=y
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -1161,6 +1161,7 @@ CONFIG_IIO_KFIFO_BUF=m
+ CONFIG_MCP320X=m
+ CONFIG_MCP3422=m
+ CONFIG_DHT11=m
++CONFIG_HTU21=m
+ CONFIG_PWM_BCM2835=m
+ CONFIG_PWM_PCA9685=m
+ CONFIG_RASPBERRYPI_FIRMWARE=y
--- /dev/null
+From c78b3b917d305e617ad11d147c9668b1df338208 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Tue, 8 Nov 2016 21:35:38 +0000
+Subject: [PATCH] spi-bcm2835: Remove unused code
+
+---
+ drivers/spi/spi-bcm2835.c | 66 -----------------------------------------------
+ 1 file changed, 66 deletions(-)
+
+--- a/drivers/spi/spi-bcm2835.c
++++ b/drivers/spi/spi-bcm2835.c
+@@ -679,17 +679,8 @@ static void bcm2835_spi_set_cs(struct sp
+ bcm2835_wr(bs, BCM2835_SPI_CS, cs);
+ }
+
+-static int chip_match_name(struct gpio_chip *chip, void *data)
+-{
+- return !strcmp(chip->label, data);
+-}
+-
+ static int bcm2835_spi_setup(struct spi_device *spi)
+ {
+- int err;
+- struct gpio_chip *chip;
+- struct device_node *pins;
+- u32 pingroup_index;
+ /*
+ * sanity checking the native-chipselects
+ */
+@@ -707,63 +698,6 @@ static int bcm2835_spi_setup(struct spi_
+ return -EINVAL;
+ }
+
+-#if 0
+- /* now translate native cs to GPIO */
+- /* first look for chip select pins in the devices pin groups */
+- for (pingroup_index = 0;
+- (pins = of_parse_phandle(spi->master->dev.of_node,
+- "pinctrl-0",
+- pingroup_index)) != 0;
+- pingroup_index++) {
+- u32 pin;
+- u32 pin_index;
+- for (pin_index = 0;
+- of_property_read_u32_index(pins,
+- "brcm,pins",
+- pin_index,
+- &pin) == 0;
+- pin_index++) {
+- if (((spi->chip_select == 0) &&
+- ((pin == 8) || (pin == 36) || (pin == 46))) ||
+- ((spi->chip_select == 1) &&
+- ((pin == 7) || (pin == 35)))) {
+- spi->cs_gpio = pin;
+- break;
+- }
+- }
+- of_node_put(pins);
+- }
+- /* if that fails, assume GPIOs 7-11 are used */
+- if (!gpio_is_valid(spi->cs_gpio) ) {
+- /* get the gpio chip for the base */
+- chip = gpiochip_find("pinctrl-bcm2835", chip_match_name);
+- if (!chip)
+- return 0;
+-
+- /* and calculate the real CS */
+- spi->cs_gpio = chip->base + 8 - spi->chip_select;
+- }
+-
+- /* and set up the "mode" and level */
+- dev_info(&spi->dev, "setting up native-CS%i as GPIO %i\n",
+- spi->chip_select, spi->cs_gpio);
+-
+- /* set up GPIO as output and pull to the correct level */
+- err = gpio_direction_output(spi->cs_gpio,
+- (spi->mode & SPI_CS_HIGH) ? 0 : 1);
+- if (err) {
+- dev_err(&spi->dev,
+- "could not set CS%i gpio %i as output: %i",
+- spi->chip_select, spi->cs_gpio, err);
+- return err;
+- }
+- /* the implementation of pinctrl-bcm2835 currently does not
+- * set the GPIO value when using gpio_direction_output
+- * so we are setting it here explicitly
+- */
+- gpio_set_value(spi->cs_gpio, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
+-#endif
+-
+ return 0;
+ }
+
--- /dev/null
+From 26a7e2d3d11c23acc6f87414da736c07a3b9cc52 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Sat, 5 Nov 2016 14:14:43 +0000
+Subject: [PATCH] bcm2708_fb: Add ioctl for reading gpu memory through dma
+
+---
+ drivers/video/fbdev/bcm2708_fb.c | 109 +++++++++++++++++++++++++++++++++++++++
+ include/uapi/linux/fb.h | 7 +++
+ 2 files changed, 116 insertions(+)
+
+--- a/drivers/video/fbdev/bcm2708_fb.c
++++ b/drivers/video/fbdev/bcm2708_fb.c
+@@ -31,8 +31,10 @@
+ #include <linux/console.h>
+ #include <linux/debugfs.h>
+ #include <asm/sizes.h>
++#include <asm/uaccess.h>
+ #include <linux/io.h>
+ #include <linux/dma-mapping.h>
++#include <linux/cred.h>
+ #include <soc/bcm2835/raspberrypi-firmware.h>
+
+ //#define BCM2708_FB_DEBUG
+@@ -429,6 +431,110 @@ static int bcm2708_fb_pan_display(struct
+ return result;
+ }
+
++static void dma_memcpy(struct bcm2708_fb *fb, dma_addr_t dst, dma_addr_t src, int size)
++{
++ int burst_size = (fb->dma_chan == 0) ? 8 : 2;
++ struct bcm2708_dma_cb *cb = fb->cb_base;
++
++ cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH |
++ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
++ BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE;
++ cb->dst = dst;
++ cb->src = src;
++ cb->length = size;
++ cb->stride = 0;
++ cb->pad[0] = 0;
++ cb->pad[1] = 0;
++ cb->next = 0;
++
++ if (size < dma_busy_wait_threshold) {
++ bcm_dma_start(fb->dma_chan_base, fb->cb_handle);
++ bcm_dma_wait_idle(fb->dma_chan_base);
++ } else {
++ void __iomem *dma_chan = fb->dma_chan_base;
++ cb->info |= BCM2708_DMA_INT_EN;
++ bcm_dma_start(fb->dma_chan_base, fb->cb_handle);
++ while (bcm_dma_is_busy(dma_chan)) {
++ wait_event_interruptible(
++ fb->dma_waitq,
++ !bcm_dma_is_busy(dma_chan));
++ }
++ fb->stats.dma_irqs++;
++ }
++ fb->stats.dma_copies++;
++}
++
++#define INTALIAS_NORMAL(x) ((x)&~0xc0000000) // address with no aliases
++#define INTALIAS_L1L2_NONALLOCATING(x) (((x)&~0xc0000000)|0x80000000) // cache coherent but non-allocating in L1 and L2
++
++static long vc_mem_copy(struct bcm2708_fb *fb, unsigned long arg)
++{
++ struct fb_dmacopy ioparam;
++ size_t size = PAGE_SIZE;
++ u32 *buf = NULL;
++ dma_addr_t bus_addr;
++ long rc = 0;
++ size_t offset;
++ struct { u32 base, length; } gpu = {};
++
++ /* restrict this to root user */
++ if (!uid_eq(current_euid(), GLOBAL_ROOT_UID))
++ {
++ rc = -EFAULT;
++ goto out;
++ }
++
++ /* Get the parameter data.
++ */
++ if (copy_from_user
++ (&ioparam, (void *)arg, sizeof(ioparam)) != 0) {
++ pr_err("[%s]: failed to copy-from-user\n",
++ __func__);
++ rc = -EFAULT;
++ goto out;
++ }
++
++ rc = rpi_firmware_property(fb->fw,
++ RPI_FIRMWARE_GET_VC_MEMORY,
++ &gpu, sizeof(gpu));
++ if (rc != 0 || gpu.base == 0 || gpu.length == 0) {
++ pr_err("[%s]: Unable to determine gpu memory %ld,%x,%x)\n", __func__, rc, gpu.base, gpu.length);
++ return -EFAULT;
++ }
++
++ if (INTALIAS_NORMAL(ioparam.src) < gpu.base || INTALIAS_NORMAL(ioparam.src) >= gpu.base + gpu.length) {
++ pr_err("[%s]: Invalid memory access %x (%x-%x)", __func__, INTALIAS_NORMAL(ioparam.src), gpu.base, gpu.base + gpu.length);
++ return -EFAULT;
++ }
++
++ buf = dma_alloc_coherent(NULL, PAGE_ALIGN(size), &bus_addr,
++ GFP_ATOMIC);
++ if (!buf) {
++ pr_err("[%s]: failed to dma_alloc_coherent(%d)\n",
++ __func__, size);
++ rc = -ENOMEM;
++ goto out;
++ }
++
++ for (offset = 0; offset < ioparam.length; offset += size) {
++ size_t remaining = ioparam.length - offset;
++ size_t s = min(size, remaining);
++ unsigned char *p = (unsigned char *)ioparam.src + offset;
++ unsigned char *q = (unsigned char *)ioparam.dst + offset;
++ dma_memcpy(fb, (dma_addr_t)buf, INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size);
++ if (copy_to_user(q, buf, s) != 0) {
++ pr_err("[%s]: failed to copy-to-user\n",
++ __func__);
++ rc = -EFAULT;
++ goto out;
++ }
++ }
++out:
++ if (buf)
++ dma_free_coherent(NULL, PAGE_ALIGN(size), buf, bus_addr);
++ return rc;
++}
++
+ static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
+ {
+ struct bcm2708_fb *fb = to_bcm2708(info);
+@@ -441,6 +547,9 @@ static int bcm2708_ioctl(struct fb_info
+ RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC,
+ &dummy, sizeof(dummy));
+ break;
++ case FBIODMACOPY:
++ ret = vc_mem_copy(fb, arg);
++ break;
+ default:
+ dev_dbg(info->device, "Unknown ioctl 0x%x\n", cmd);
+ return -ENOTTY;
+--- a/include/uapi/linux/fb.h
++++ b/include/uapi/linux/fb.h
+@@ -39,6 +39,7 @@
+ * be concurrently added to the mainline kernel
+ */
+ #define FBIOCOPYAREA _IOW('z', 0x21, struct fb_copyarea)
++#define FBIODMACOPY _IOW('z', 0x22, struct fb_dmacopy)
+
+ #define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */
+ #define FB_TYPE_PLANES 1 /* Non interleaved planes */
+@@ -351,6 +352,12 @@ struct fb_copyarea {
+ __u32 sy;
+ };
+
++struct fb_dmacopy {
++ dma_addr_t dst;
++ dma_addr_t src;
++ __u32 length;
++};
++
+ struct fb_fillrect {
+ __u32 dx; /* screen-relative */
+ __u32 dy;
--- /dev/null
+From bfc9d5f243f9202b699a2716b528be866039d6a4 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Fri, 11 Nov 2016 19:32:54 +0000
+Subject: [PATCH] rpi-ft5406: Create coherent buffer and push to firmware
+
+---
+ drivers/input/touchscreen/rpi-ft5406.c | 152 +++++++++++++++++++----------
+ include/soc/bcm2835/raspberrypi-firmware.h | 1 +
+ 2 files changed, 101 insertions(+), 52 deletions(-)
+
+--- a/drivers/input/touchscreen/rpi-ft5406.c
++++ b/drivers/input/touchscreen/rpi-ft5406.c
+@@ -21,6 +21,7 @@
+ #include <linux/kthread.h>
+ #include <linux/platform_device.h>
+ #include <asm/io.h>
++#include <linux/dma-mapping.h>
+ #include <soc/bcm2835/raspberrypi-firmware.h>
+
+ #define MAXIMUM_SUPPORTED_POINTS 10
+@@ -45,6 +46,7 @@ struct ft5406 {
+ struct platform_device * pdev;
+ struct input_dev * input_dev;
+ void __iomem * ts_base;
++ dma_addr_t bus_addr;
+ struct ft5406_regs * regs;
+ struct task_struct * thread;
+ };
+@@ -117,18 +119,19 @@ static int ft5406_thread(void *arg)
+
+ static int ft5406_probe(struct platform_device *pdev)
+ {
+- int ret;
+- struct input_dev * input_dev = input_allocate_device();
++ int err = 0;
++ struct device *dev = &pdev->dev;
++ struct device_node *np = dev->of_node;
+ struct ft5406 * ts;
+ struct device_node *fw_node;
+ struct rpi_firmware *fw;
+ u32 touchbuf;
+
+- dev_info(&pdev->dev, "Probing device\n");
++ dev_info(dev, "Probing device\n");
+
+- fw_node = of_parse_phandle(pdev->dev.of_node, "firmware", 0);
++ fw_node = of_parse_phandle(np, "firmware", 0);
+ if (!fw_node) {
+- dev_err(&pdev->dev, "Missing firmware node\n");
++ dev_err(dev, "Missing firmware node\n");
+ return -ENOENT;
+ }
+
+@@ -136,62 +139,88 @@ static int ft5406_probe(struct platform_
+ if (!fw)
+ return -EPROBE_DEFER;
+
+- ret = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF,
+- &touchbuf, sizeof(touchbuf));
+- if (ret) {
+- dev_err(&pdev->dev, "Failed to get touch buffer\n");
+- return ret;
++ ts = devm_kzalloc(dev, sizeof(struct ft5406), GFP_KERNEL);
++ if (!ts) {
++ dev_err(dev, "Failed to allocate memory\n");
++ return -ENOMEM;
+ }
+
+- if (!touchbuf) {
+- dev_err(&pdev->dev, "Touchscreen not detected\n");
+- return -ENODEV;
++ ts->input_dev = input_allocate_device();
++ if (!ts->input_dev) {
++ dev_err(dev, "Failed to allocate input device\n");
++ return -ENOMEM;
+ }
+
+- dev_dbg(&pdev->dev, "Got TS buffer 0x%x\n", touchbuf);
++ ts->ts_base = dma_zalloc_coherent(NULL, PAGE_SIZE, &ts->bus_addr, GFP_KERNEL);
++ if (!ts->ts_base) {
++ pr_err("[%s]: failed to dma_alloc_coherent(%ld)\n",
++ __func__, PAGE_SIZE);
++ err = -ENOMEM;
++ goto out;
++ }
+
+- ts = kzalloc(sizeof(struct ft5406), GFP_KERNEL);
++ touchbuf = (u32)ts->bus_addr;
++ err = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF,
++ &touchbuf, sizeof(touchbuf));
+
+- if (!ts || !input_dev) {
+- ret = -ENOMEM;
+- dev_err(&pdev->dev, "Failed to allocate memory\n");
+- return ret;
++ if (err || touchbuf != 0) {
++ dev_warn(dev, "Failed to set touchbuf, trying to get err:%x\n", err);
++ dma_free_coherent(NULL, PAGE_SIZE, ts->ts_base, ts->bus_addr);
++ ts->ts_base = 0;
++ ts->bus_addr = 0;
++ }
++
++ if (!ts->ts_base) {
++ dev_warn(dev, "set failed, trying get (err:%d touchbuf:%x virt:%p bus:%x)\n", err, touchbuf, ts->ts_base, ts->bus_addr);
++
++ err = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF,
++ &touchbuf, sizeof(touchbuf));
++ if (err) {
++ dev_err(dev, "Failed to get touch buffer\n");
++ goto out;
++ }
++
++ if (!touchbuf) {
++ dev_err(dev, "Touchscreen not detected\n");
++ err = -ENODEV;
++ goto out;
++ }
++
++ dev_dbg(dev, "Got TS buffer 0x%x\n", touchbuf);
++
++ // mmap the physical memory
++ touchbuf &= ~0xc0000000;
++ ts->ts_base = ioremap(touchbuf, sizeof(*ts->regs));
++ if (ts->ts_base == NULL)
++ {
++ dev_err(dev, "Failed to map physical address\n");
++ err = -ENOMEM;
++ goto out;
++ }
+ }
+- ts->input_dev = input_dev;
+ platform_set_drvdata(pdev, ts);
+ ts->pdev = pdev;
+
+- input_dev->name = "FT5406 memory based driver";
++ ts->input_dev->name = "FT5406 memory based driver";
+
+- __set_bit(EV_KEY, input_dev->evbit);
+- __set_bit(EV_SYN, input_dev->evbit);
+- __set_bit(EV_ABS, input_dev->evbit);
++ __set_bit(EV_KEY, ts->input_dev->evbit);
++ __set_bit(EV_SYN, ts->input_dev->evbit);
++ __set_bit(EV_ABS, ts->input_dev->evbit);
+
+- input_set_abs_params(input_dev, ABS_MT_POSITION_X, 0,
++ input_set_abs_params(ts->input_dev, ABS_MT_POSITION_X, 0,
+ SCREEN_WIDTH, 0, 0);
+- input_set_abs_params(input_dev, ABS_MT_POSITION_Y, 0,
++ input_set_abs_params(ts->input_dev, ABS_MT_POSITION_Y, 0,
+ SCREEN_HEIGHT, 0, 0);
+
+- input_mt_init_slots(input_dev, MAXIMUM_SUPPORTED_POINTS, INPUT_MT_DIRECT);
++ input_mt_init_slots(ts->input_dev, MAXIMUM_SUPPORTED_POINTS, INPUT_MT_DIRECT);
+
+- input_set_drvdata(input_dev, ts);
++ input_set_drvdata(ts->input_dev, ts);
+
+- ret = input_register_device(input_dev);
+- if (ret) {
+- dev_err(&pdev->dev, "could not register input device, %d\n",
+- ret);
+- return ret;
+- }
+-
+- // mmap the physical memory
+- touchbuf &= ~0xc0000000;
+- ts->ts_base = ioremap(touchbuf, sizeof(*ts->regs));
+- if(ts->ts_base == NULL)
+- {
+- dev_err(&pdev->dev, "Failed to map physical address\n");
+- input_unregister_device(input_dev);
+- kzfree(ts);
+- return -ENOMEM;
++ err = input_register_device(ts->input_dev);
++ if (err) {
++ dev_err(dev, "could not register input device, %d\n",
++ err);
++ goto out;
+ }
+
+ ts->regs = (struct ft5406_regs *) ts->ts_base;
+@@ -200,25 +229,44 @@ static int ft5406_probe(struct platform_
+ ts->thread = kthread_run(ft5406_thread, ts, "ft5406");
+ if(ts->thread == NULL)
+ {
+- dev_err(&pdev->dev, "Failed to create kernel thread");
+- iounmap(ts->ts_base);
+- input_unregister_device(input_dev);
+- kzfree(ts);
++ dev_err(dev, "Failed to create kernel thread");
++ err = -ENOMEM;
++ goto out;
+ }
+
+ return 0;
++
++out:
++ if (ts->bus_addr) {
++ dma_free_coherent(NULL, PAGE_SIZE, ts->ts_base, ts->bus_addr);
++ ts->bus_addr = 0;
++ ts->ts_base = NULL;
++ } else if (ts->ts_base) {
++ iounmap(ts->ts_base);
++ ts->ts_base = NULL;
++ }
++ if (ts->input_dev) {
++ input_unregister_device(ts->input_dev);
++ ts->input_dev = NULL;
++ }
++ return err;
+ }
+
+ static int ft5406_remove(struct platform_device *pdev)
+ {
++ struct device *dev = &pdev->dev;
+ struct ft5406 *ts = (struct ft5406 *) platform_get_drvdata(pdev);
+
+- dev_info(&pdev->dev, "Removing rpi-ft5406\n");
++ dev_info(dev, "Removing rpi-ft5406\n");
+
+ kthread_stop(ts->thread);
+- iounmap(ts->ts_base);
+- input_unregister_device(ts->input_dev);
+- kzfree(ts);
++
++ if (ts->bus_addr)
++ dma_free_coherent(dev, PAGE_SIZE, ts->ts_base, ts->bus_addr);
++ else if (ts->ts_base)
++ iounmap(ts->ts_base);
++ if (ts->input_dev)
++ input_unregister_device(ts->input_dev);
+
+ return 0;
+ }
+--- a/include/soc/bcm2835/raspberrypi-firmware.h
++++ b/include/soc/bcm2835/raspberrypi-firmware.h
+@@ -117,6 +117,7 @@ enum rpi_firmware_property_tag {
+ RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b,
++ RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f,
+
--- /dev/null
+From 07afae52a73991a3ea948aab5d0303a5a9805b41 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Wed, 9 Nov 2016 22:42:39 +0000
+Subject: [PATCH] brcmvirt_gpio: Create coherent buffer and push to firmware
+
+---
+ drivers/gpio/gpio-bcm-virt.c | 88 +++++++++++++++++++++---------
+ include/soc/bcm2835/raspberrypi-firmware.h | 1 +
+ 2 files changed, 62 insertions(+), 27 deletions(-)
+
+--- a/drivers/gpio/gpio-bcm-virt.c
++++ b/drivers/gpio/gpio-bcm-virt.c
+@@ -15,6 +15,7 @@
+ #include <linux/module.h>
+ #include <linux/basic_mmio_gpio.h>
+ #include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
+ #include <soc/bcm2835/raspberrypi-firmware.h>
+
+ #define MODULE_NAME "brcmvirt-gpio"
+@@ -26,6 +27,7 @@ struct brcmvirt_gpio {
+ /* two packed 16-bit counts of enabled and disables
+ Allows host to detect a brief enable that was missed */
+ u32 enables_disables[NUM_GPIO];
++ dma_addr_t bus_addr;
+ };
+
+ static int brcmvirt_gpio_dir_in(struct gpio_chip *gc, unsigned off)
+@@ -76,13 +78,13 @@ static void brcmvirt_gpio_set(struct gpi
+
+ static int brcmvirt_gpio_probe(struct platform_device *pdev)
+ {
++ int err = 0;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct device_node *fw_node;
+ struct rpi_firmware *fw;
+ struct brcmvirt_gpio *ucb;
+ u32 gpiovirtbuf;
+- int err = 0;
+
+ fw_node = of_parse_phandle(np, "firmware", 0);
+ if (!fw_node) {
+@@ -94,35 +96,56 @@ static int brcmvirt_gpio_probe(struct pl
+ if (!fw)
+ return -EPROBE_DEFER;
+
+- err = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF,
+- &gpiovirtbuf, sizeof(gpiovirtbuf));
+-
+- if (err) {
+- dev_err(dev, "Failed to get gpiovirtbuf\n");
+- goto err;
+- }
+-
+- if (!gpiovirtbuf) {
+- dev_err(dev, "No virtgpio buffer\n");
+- err = -ENOENT;
+- goto err;
+- }
+-
+ ucb = devm_kzalloc(dev, sizeof *ucb, GFP_KERNEL);
+ if (!ucb) {
+ err = -EINVAL;
+- goto err;
++ goto out;
+ }
+
+- // mmap the physical memory
+- gpiovirtbuf &= ~0xc0000000;
+- ucb->ts_base = ioremap(gpiovirtbuf, 4096);
+- if (ucb->ts_base == NULL) {
+- dev_err(dev, "Failed to map physical address\n");
+- err = -ENOENT;
+- goto err;
++ ucb->ts_base = dma_zalloc_coherent(NULL, PAGE_SIZE, &ucb->bus_addr, GFP_KERNEL);
++ if (!ucb->ts_base) {
++ pr_err("[%s]: failed to dma_alloc_coherent(%ld)\n",
++ __func__, PAGE_SIZE);
++ err = -ENOMEM;
++ goto out;
+ }
+
++ gpiovirtbuf = (u32)ucb->bus_addr;
++ err = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF,
++ &gpiovirtbuf, sizeof(gpiovirtbuf));
++
++ if (err || gpiovirtbuf != 0) {
++ dev_warn(dev, "Failed to set gpiovirtbuf, trying to get err:%x\n", err);
++ dma_free_coherent(NULL, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
++ ucb->ts_base = 0;
++ ucb->bus_addr = 0;
++ }
++
++ if (!ucb->ts_base) {
++ err = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF,
++ &gpiovirtbuf, sizeof(gpiovirtbuf));
++
++ if (err) {
++ dev_err(dev, "Failed to get gpiovirtbuf\n");
++ goto out;
++ }
++
++ if (!gpiovirtbuf) {
++ dev_err(dev, "No virtgpio buffer\n");
++ err = -ENOENT;
++ goto out;
++ }
++
++ // mmap the physical memory
++ gpiovirtbuf &= ~0xc0000000;
++ ucb->ts_base = ioremap(gpiovirtbuf, 4096);
++ if (ucb->ts_base == NULL) {
++ dev_err(dev, "Failed to map physical address\n");
++ err = -ENOENT;
++ goto out;
++ }
++ ucb->bus_addr = 0;
++ }
+ ucb->gc.label = MODULE_NAME;
+ ucb->gc.owner = THIS_MODULE;
+ ucb->gc.dev = dev;
+@@ -138,13 +161,21 @@ static int brcmvirt_gpio_probe(struct pl
+
+ err = gpiochip_add(&ucb->gc);
+ if (err)
+- goto err;
++ goto out;
+
+ platform_set_drvdata(pdev, ucb);
+
+-err:
++ return 0;
++out:
++ if (ucb->bus_addr) {
++ dma_free_coherent(NULL, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
++ ucb->bus_addr = 0;
++ ucb->ts_base = NULL;
++ } else if (ucb->ts_base) {
++ iounmap(ucb->ts_base);
++ ucb->ts_base = NULL;
++ }
+ return err;
+-
+ }
+
+ static int brcmvirt_gpio_remove(struct platform_device *pdev)
+@@ -153,7 +184,10 @@ static int brcmvirt_gpio_remove(struct p
+ struct brcmvirt_gpio *ucb = platform_get_drvdata(pdev);
+
+ gpiochip_remove(&ucb->gc);
+- iounmap(ucb->ts_base);
++ if (ucb->bus_addr)
++ dma_free_coherent(NULL, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
++ else if (ucb->ts_base)
++ iounmap(ucb->ts_base);
+ return err;
+ }
+
+--- a/include/soc/bcm2835/raspberrypi-firmware.h
++++ b/include/soc/bcm2835/raspberrypi-firmware.h
+@@ -118,6 +118,7 @@ enum rpi_firmware_property_tag {
+ RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f,
++ RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e,
+ RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f,
+
--- /dev/null
+From 4b40f23d8afba2fe227e515d0c793e95530350b2 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 14 Nov 2016 17:46:54 +0000
+Subject: [PATCH] brcmvirt_gpio: Pass device structure into dma_zalloc_coherent
+
+---
+ drivers/gpio/gpio-bcm-virt.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpio/gpio-bcm-virt.c
++++ b/drivers/gpio/gpio-bcm-virt.c
+@@ -102,7 +102,7 @@ static int brcmvirt_gpio_probe(struct pl
+ goto out;
+ }
+
+- ucb->ts_base = dma_zalloc_coherent(NULL, PAGE_SIZE, &ucb->bus_addr, GFP_KERNEL);
++ ucb->ts_base = dma_zalloc_coherent(dev, PAGE_SIZE, &ucb->bus_addr, GFP_KERNEL);
+ if (!ucb->ts_base) {
+ pr_err("[%s]: failed to dma_alloc_coherent(%ld)\n",
+ __func__, PAGE_SIZE);
+@@ -116,7 +116,7 @@ static int brcmvirt_gpio_probe(struct pl
+
+ if (err || gpiovirtbuf != 0) {
+ dev_warn(dev, "Failed to set gpiovirtbuf, trying to get err:%x\n", err);
+- dma_free_coherent(NULL, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
++ dma_free_coherent(dev, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
+ ucb->ts_base = 0;
+ ucb->bus_addr = 0;
+ }
+@@ -168,7 +168,7 @@ static int brcmvirt_gpio_probe(struct pl
+ return 0;
+ out:
+ if (ucb->bus_addr) {
+- dma_free_coherent(NULL, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
++ dma_free_coherent(dev, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
+ ucb->bus_addr = 0;
+ ucb->ts_base = NULL;
+ } else if (ucb->ts_base) {
+@@ -180,12 +180,13 @@ out:
+
+ static int brcmvirt_gpio_remove(struct platform_device *pdev)
+ {
++ struct device *dev = &pdev->dev;
+ int err = 0;
+ struct brcmvirt_gpio *ucb = platform_get_drvdata(pdev);
+
+ gpiochip_remove(&ucb->gc);
+ if (ucb->bus_addr)
+- dma_free_coherent(NULL, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
++ dma_free_coherent(dev, PAGE_SIZE, ucb->ts_base, ucb->bus_addr);
+ else if (ucb->ts_base)
+ iounmap(ucb->ts_base);
+ return err;
--- /dev/null
+From caae57f942bb200e8bf32db60e124e7a2ce798e0 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 14 Nov 2016 20:14:21 +0000
+Subject: [PATCH] rpi-ft5406: Pass device structure into dma_zalloc_coherent
+
+---
+ drivers/input/touchscreen/rpi-ft5406.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/input/touchscreen/rpi-ft5406.c
++++ b/drivers/input/touchscreen/rpi-ft5406.c
+@@ -151,7 +151,7 @@ static int ft5406_probe(struct platform_
+ return -ENOMEM;
+ }
+
+- ts->ts_base = dma_zalloc_coherent(NULL, PAGE_SIZE, &ts->bus_addr, GFP_KERNEL);
++ ts->ts_base = dma_zalloc_coherent(dev, PAGE_SIZE, &ts->bus_addr, GFP_KERNEL);
+ if (!ts->ts_base) {
+ pr_err("[%s]: failed to dma_alloc_coherent(%ld)\n",
+ __func__, PAGE_SIZE);
+@@ -165,7 +165,7 @@ static int ft5406_probe(struct platform_
+
+ if (err || touchbuf != 0) {
+ dev_warn(dev, "Failed to set touchbuf, trying to get err:%x\n", err);
+- dma_free_coherent(NULL, PAGE_SIZE, ts->ts_base, ts->bus_addr);
++ dma_free_coherent(dev, PAGE_SIZE, ts->ts_base, ts->bus_addr);
+ ts->ts_base = 0;
+ ts->bus_addr = 0;
+ }
+@@ -238,7 +238,7 @@ static int ft5406_probe(struct platform_
+
+ out:
+ if (ts->bus_addr) {
+- dma_free_coherent(NULL, PAGE_SIZE, ts->ts_base, ts->bus_addr);
++ dma_free_coherent(dev, PAGE_SIZE, ts->ts_base, ts->bus_addr);
+ ts->bus_addr = 0;
+ ts->ts_base = NULL;
+ } else if (ts->ts_base) {
--- /dev/null
+From 4c41f90e1f84c4a5c080eca03b07a0116297593b Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Thu, 13 Oct 2016 11:54:31 +0300
+Subject: [PATCH] drm/vc4: Fix a couple error codes in vc4_cl_lookup_bos()
+
+If the allocation fails the current code returns success. If
+copy_from_user() fails it returns the number of bytes remaining instead
+of -EFAULT.
+
+Fixes: d5b1a78a772f ("drm/vc4: Add support for drawing 3D frames.")
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit b2cdeb19f16ad984eb5bb9193f793d05a8101511)
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -560,14 +560,15 @@ vc4_cl_lookup_bos(struct drm_device *dev
+
+ handles = drm_malloc_ab(exec->bo_count, sizeof(uint32_t));
+ if (!handles) {
++ ret = -ENOMEM;
+ DRM_ERROR("Failed to allocate incoming GEM handles\n");
+ goto fail;
+ }
+
+- ret = copy_from_user(handles,
+- (void __user *)(uintptr_t)args->bo_handles,
+- exec->bo_count * sizeof(uint32_t));
+- if (ret) {
++ if (copy_from_user(handles,
++ (void __user *)(uintptr_t)args->bo_handles,
++ exec->bo_count * sizeof(uint32_t))) {
++ ret = -EFAULT;
+ DRM_ERROR("Failed to copy in GEM handles\n");
+ goto fail;
+ }
--- /dev/null
+From 1f42fbc79dea3529dd919249ee6e58f157704aaf Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 20 Oct 2016 16:48:12 -0700
+Subject: [PATCH] drm/vc4: Fix termination of the initial scan for branch
+ targets.
+
+The loop is scanning until the original max_ip (size of the BO), but
+we want to not examine any code after the PROG_END's delay slots.
+There was a block trying to do that, except that we had some early
+continue statements if the signal wasn't a PROG_END or a BRANCH.
+
+The failure mode would be that a valid shader is rejected because some
+undefined memory after the PROG_END slots is parsed as a branch and
+the rest of its setup is illegal. I haven't seen this in the wild,
+but valgrind was complaining when about this up in the userland
+simulator mode.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 457e67a728696c4f8e6423c64e93def50530db9a)
+---
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 19 ++++++++-----------
+ 1 file changed, 8 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -608,9 +608,7 @@ static bool
+ vc4_validate_branches(struct vc4_shader_validation_state *validation_state)
+ {
+ uint32_t max_branch_target = 0;
+- bool found_shader_end = false;
+ int ip;
+- int shader_end_ip = 0;
+ int last_branch = -2;
+
+ for (ip = 0; ip < validation_state->max_ip; ip++) {
+@@ -621,8 +619,13 @@ vc4_validate_branches(struct vc4_shader_
+ uint32_t branch_target_ip;
+
+ if (sig == QPU_SIG_PROG_END) {
+- shader_end_ip = ip;
+- found_shader_end = true;
++ /* There are two delay slots after program end is
++ * signaled that are still executed, then we're
++ * finished. validation_state->max_ip is the
++ * instruction after the last valid instruction in the
++ * program.
++ */
++ validation_state->max_ip = ip + 3;
+ continue;
+ }
+
+@@ -676,15 +679,9 @@ vc4_validate_branches(struct vc4_shader_
+ }
+ set_bit(after_delay_ip, validation_state->branch_targets);
+ max_branch_target = max(max_branch_target, after_delay_ip);
+-
+- /* There are two delay slots after program end is signaled
+- * that are still executed, then we're finished.
+- */
+- if (found_shader_end && ip == shader_end_ip + 2)
+- break;
+ }
+
+- if (max_branch_target > shader_end_ip) {
++ if (max_branch_target > validation_state->max_ip - 3) {
+ DRM_ERROR("Branch landed after QPU_SIG_PROG_END");
+ return false;
+ }
--- /dev/null
+From 466102927ee6a21eb58d0f5f98b85155e7ee8e5b Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Thu, 3 Nov 2016 18:53:10 -0700
+Subject: [PATCH] drm/vc4: Add support for rendering with ETC1 textures.
+
+The validation for it ends up being quite simple, but I hadn't got
+around to it before merging the driver. For backwards compatibility,
+we also need to add a flag so that the userspace GL driver can easily
+tell if the kernel will allow ETC1 textures (on an old kernel, it will
+continue to convert to RGBA8)
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 7154d76fedf549607afbc0d13db9aaf02da5cebf)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 1 +
+ drivers/gpu/drm/vc4/vc4_validate.c | 7 +++++++
+ include/uapi/drm/vc4_drm.h | 1 +
+ 3 files changed, 9 insertions(+)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -103,6 +103,7 @@ static int vc4_get_param_ioctl(struct dr
+ pm_runtime_put(&vc4->v3d->pdev->dev);
+ break;
+ case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
++ case DRM_VC4_PARAM_SUPPORTS_ETC1:
+ args->value = true;
+ break;
+ default:
+--- a/drivers/gpu/drm/vc4/vc4_validate.c
++++ b/drivers/gpu/drm/vc4/vc4_validate.c
+@@ -644,6 +644,13 @@ reloc_tex(struct vc4_exec_info *exec,
+ cpp = 1;
+ break;
+ case VC4_TEXTURE_TYPE_ETC1:
++ /* ETC1 is arranged as 64-bit blocks, where each block is 4x4
++ * pixels.
++ */
++ cpp = 8;
++ width = (width + 3) >> 2;
++ height = (height + 3) >> 2;
++ break;
+ case VC4_TEXTURE_TYPE_BW1:
+ case VC4_TEXTURE_TYPE_A4:
+ case VC4_TEXTURE_TYPE_A1:
+--- a/include/uapi/drm/vc4_drm.h
++++ b/include/uapi/drm/vc4_drm.h
+@@ -286,6 +286,7 @@ struct drm_vc4_get_hang_state {
+ #define DRM_VC4_PARAM_V3D_IDENT1 1
+ #define DRM_VC4_PARAM_V3D_IDENT2 2
+ #define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
++#define DRM_VC4_PARAM_SUPPORTS_ETC1 4
+
+ struct drm_vc4_get_param {
+ __u32 param;
--- /dev/null
+From 5163dcd743642b47a6f82ced6dd110a669984359 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Fri, 4 Nov 2016 15:58:38 -0700
+Subject: [PATCH] drm/vc4: Use runtime autosuspend to avoid thrashing V3D power
+ state.
+
+The pm_runtime_put() we were using immediately released power on the
+device, which meant that we were generally turning the device off and
+on once per frame. In many profiles I've looked at, that added up to
+about 1% of CPU time, but this could get worse in the case of frequent
+rendering and readback (as may happen in X rendering). By keeping the
+device on until we've been idle for a couple of frames, we drop the
+overhead of runtime PM down to sub-.1%.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit 3a62234680d86efa0239665ed8a0e908f1aef147)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 9 ++++++---
+ drivers/gpu/drm/vc4/vc4_gem.c | 6 ++++--
+ drivers/gpu/drm/vc4/vc4_v3d.c | 2 ++
+ 3 files changed, 12 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -86,21 +86,24 @@ static int vc4_get_param_ioctl(struct dr
+ if (ret < 0)
+ return ret;
+ args->value = V3D_READ(V3D_IDENT0);
+- pm_runtime_put(&vc4->v3d->pdev->dev);
++ pm_runtime_mark_last_busy(&vc4->v3d->pdev->dev);
++ pm_runtime_put_autosuspend(&vc4->v3d->pdev->dev);
+ break;
+ case DRM_VC4_PARAM_V3D_IDENT1:
+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
+ if (ret < 0)
+ return ret;
+ args->value = V3D_READ(V3D_IDENT1);
+- pm_runtime_put(&vc4->v3d->pdev->dev);
++ pm_runtime_mark_last_busy(&vc4->v3d->pdev->dev);
++ pm_runtime_put_autosuspend(&vc4->v3d->pdev->dev);
+ break;
+ case DRM_VC4_PARAM_V3D_IDENT2:
+ ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev);
+ if (ret < 0)
+ return ret;
+ args->value = V3D_READ(V3D_IDENT2);
+- pm_runtime_put(&vc4->v3d->pdev->dev);
++ pm_runtime_mark_last_busy(&vc4->v3d->pdev->dev);
++ pm_runtime_put_autosuspend(&vc4->v3d->pdev->dev);
+ break;
+ case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
+ case DRM_VC4_PARAM_SUPPORTS_ETC1:
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -728,8 +728,10 @@ vc4_complete_exec(struct drm_device *dev
+ mutex_unlock(&dev->struct_mutex);
+
+ mutex_lock(&vc4->power_lock);
+- if (--vc4->power_refcount == 0)
+- pm_runtime_put(&vc4->v3d->pdev->dev);
++ if (--vc4->power_refcount == 0) {
++ pm_runtime_mark_last_busy(&vc4->v3d->pdev->dev);
++ pm_runtime_put_autosuspend(&vc4->v3d->pdev->dev);
++ }
+ mutex_unlock(&vc4->power_lock);
+
+ kfree(exec);
+--- a/drivers/gpu/drm/vc4/vc4_v3d.c
++++ b/drivers/gpu/drm/vc4/vc4_v3d.c
+@@ -222,6 +222,8 @@ static int vc4_v3d_bind(struct device *d
+ return ret;
+ }
+
++ pm_runtime_use_autosuspend(dev);
++ pm_runtime_set_autosuspend_delay(dev, 40); /* a little over 2 frames. */
+ pm_runtime_enable(dev);
+
+ return 0;
--- /dev/null
+From 180aed47cc2cc41b8669e9e6c61f79bf1b018fed Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Mon, 30 May 2016 19:53:06 +0200
+Subject: [PATCH] drm/vc4: Use drm_gem_object_unreference_unlocked
+
+Since my last struct_mutex crusade someone escaped!
+
+This already has the advantage that for the common case when someone
+else holds a ref the unref won't even acquire dev->struct_mutex. And
+I'm working on code to allow drivers to completely opt-out of any and
+all dev->struct_mutex usage, but that only works if they use the
+_unlocked variants everywhere.
+
+v2: Drop comment too.
+
+v3: Drop the other comment too.
+
+Cc: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
+Link: http://patchwork.freedesktop.org/patch/msgid/1464630800-30786-15-git-send-email-daniel.vetter@ffwll.ch
+(cherry picked from commit db3697295cf4da1356e3ec86761d464d6d013b48)
+---
+ drivers/gpu/drm/vc4/vc4_bo.c | 2 --
+ drivers/gpu/drm/vc4/vc4_gem.c | 11 +++--------
+ 2 files changed, 3 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_bo.c
++++ b/drivers/gpu/drm/vc4/vc4_bo.c
+@@ -311,8 +311,6 @@ static void vc4_bo_cache_free_old(struct
+
+ /* Called on the last userspace/kernel unreference of the BO. Returns
+ * it to the BO cache if possible, otherwise frees it.
+- *
+- * Note that this is called with the struct_mutex held.
+ */
+ void vc4_free_object(struct drm_gem_object *gem_bo)
+ {
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -67,10 +67,8 @@ vc4_free_hang_state(struct drm_device *d
+ {
+ unsigned int i;
+
+- mutex_lock(&dev->struct_mutex);
+ for (i = 0; i < state->user_state.bo_count; i++)
+- drm_gem_object_unreference(state->bo[i]);
+- mutex_unlock(&dev->struct_mutex);
++ drm_gem_object_unreference_unlocked(state->bo[i]);
+
+ kfree(state);
+ }
+@@ -711,11 +709,9 @@ vc4_complete_exec(struct drm_device *dev
+ struct vc4_dev *vc4 = to_vc4_dev(dev);
+ unsigned i;
+
+- /* Need the struct lock for drm_gem_object_unreference(). */
+- mutex_lock(&dev->struct_mutex);
+ if (exec->bo) {
+ for (i = 0; i < exec->bo_count; i++)
+- drm_gem_object_unreference(&exec->bo[i]->base);
++ drm_gem_object_unreference_unlocked(&exec->bo[i]->base);
+ kfree(exec->bo);
+ }
+
+@@ -723,9 +719,8 @@ vc4_complete_exec(struct drm_device *dev
+ struct vc4_bo *bo = list_first_entry(&exec->unref_list,
+ struct vc4_bo, unref_head);
+ list_del(&bo->unref_head);
+- drm_gem_object_unreference(&bo->base.base);
++ drm_gem_object_unreference_unlocked(&bo->base.base);
+ }
+- mutex_unlock(&dev->struct_mutex);
+
+ mutex_lock(&vc4->power_lock);
+ if (--vc4->power_refcount == 0) {
--- /dev/null
+From ed5a62d83a6a9bd2b318f0ed9bf9b3d28376f8f7 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 19 Jul 2016 11:32:44 -0700
+Subject: [PATCH] drm/vc4: Use drm_malloc_ab to fix large rendering jobs.
+
+If you exceeded the size that kmalloc would return, you'd get a dmesg
+warning and a return from the job submit. We can handle much
+allocations with vmalloc, and drm_malloc_ab makes that decision.
+
+Fixes failure in piglit's scissor-many.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit ece7267dccf0e9e08cb6e8dc6b7ad2be9c4eb444)
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -549,8 +549,8 @@ vc4_cl_lookup_bos(struct drm_device *dev
+ return -EINVAL;
+ }
+
+- exec->bo = kcalloc(exec->bo_count, sizeof(struct drm_gem_cma_object *),
+- GFP_KERNEL);
++ exec->bo = drm_calloc_large(exec->bo_count,
++ sizeof(struct drm_gem_cma_object *));
+ if (!exec->bo) {
+ DRM_ERROR("Failed to allocate validated BO pointers\n");
+ return -ENOMEM;
+@@ -624,7 +624,7 @@ vc4_get_bcl(struct drm_device *dev, stru
+ * read the contents back for validation, and I think the
+ * bo->vaddr is uncached access.
+ */
+- temp = kmalloc(temp_size, GFP_KERNEL);
++ temp = drm_malloc_ab(temp_size, 1);
+ if (!temp) {
+ DRM_ERROR("Failed to allocate storage for copying "
+ "in bin/render CLs.\n");
+@@ -699,7 +699,7 @@ vc4_get_bcl(struct drm_device *dev, stru
+ ret = vc4_wait_for_seqno(dev, exec->bin_dep_seqno, ~0ull, true);
+
+ fail:
+- kfree(temp);
++ drm_free_large(temp);
+ return ret;
+ }
+
+@@ -712,7 +712,7 @@ vc4_complete_exec(struct drm_device *dev
+ if (exec->bo) {
+ for (i = 0; i < exec->bo_count; i++)
+ drm_gem_object_unreference_unlocked(&exec->bo[i]->base);
+- kfree(exec->bo);
++ drm_free_large(exec->bo);
+ }
+
+ while (!list_empty(&exec->unref_list)) {
--- /dev/null
+From 12588d06f8dca8bfdffae3d7e9c181160c2fbf6e Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Tue, 26 Jul 2016 13:47:13 -0700
+Subject: [PATCH] drm/vc4: Free hang state before destroying BO cache.
+
+The BO cache will complain if BOs are still allocated when we try to
+destroy it (since freeing those BOs would try to hit the cache). You
+could hit this if you were to unload the module after a GPU hang.
+
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Fixes: 214613656b51 ("drm/vc4: Add an interface for capturing the GPU state after a hang.")
+(cherry picked from commit def96527707e1978a0c88e75d13b082f51460d5c)
+---
+ drivers/gpu/drm/vc4/vc4_gem.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_gem.c
++++ b/drivers/gpu/drm/vc4/vc4_gem.c
+@@ -968,8 +968,8 @@ vc4_gem_destroy(struct drm_device *dev)
+ vc4->overflow_mem = NULL;
+ }
+
+- vc4_bo_cache_destroy(dev);
+-
+ if (vc4->hang_state)
+ vc4_free_hang_state(dev, vc4->hang_state);
++
++ vc4_bo_cache_destroy(dev);
+ }
--- /dev/null
+From ab3d72ab3a895ece2820f6de879472eafb157c39 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Mon, 14 Nov 2016 22:05:30 +0000
+Subject: [PATCH] fixup: fb: Use basic types for dma addresses as these are
+ also included from user code
+
+---
+ include/uapi/linux/fb.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/include/uapi/linux/fb.h
++++ b/include/uapi/linux/fb.h
+@@ -353,8 +353,8 @@ struct fb_copyarea {
+ };
+
+ struct fb_dmacopy {
+- dma_addr_t dst;
+- dma_addr_t src;
++ void *dst;
++ __u32 src;
+ __u32 length;
+ };
+
--- /dev/null
+From 02baa554c7768e20668a466b35e479e8454d2d61 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Wed, 16 Nov 2016 21:17:27 +0000
+Subject: [PATCH] fb: Use correct bus address for dest of dma memcpy
+
+---
+ drivers/video/fbdev/bcm2708_fb.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/video/fbdev/bcm2708_fb.c
++++ b/drivers/video/fbdev/bcm2708_fb.c
+@@ -438,7 +438,7 @@ static void dma_memcpy(struct bcm2708_fb
+
+ cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH |
+ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH |
+- BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE;
++ BCM2708_DMA_D_INC;
+ cb->dst = dst;
+ cb->src = src;
+ cb->length = size;
+@@ -521,7 +521,7 @@ static long vc_mem_copy(struct bcm2708_f
+ size_t s = min(size, remaining);
+ unsigned char *p = (unsigned char *)ioparam.src + offset;
+ unsigned char *q = (unsigned char *)ioparam.dst + offset;
+- dma_memcpy(fb, (dma_addr_t)buf, INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size);
++ dma_memcpy(fb, bus_addr, INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size);
+ if (copy_to_user(q, buf, s) != 0) {
+ pr_err("[%s]: failed to copy-to-user\n",
+ __func__);
--- /dev/null
+From 9bb867075fc4b0b7efc1640dc4cdd5b70b482ff1 Mon Sep 17 00:00:00 2001
+From: Jonas Pfeil <pfeiljonas@gmx.de>
+Date: Tue, 8 Nov 2016 00:18:39 +0100
+Subject: [PATCH] drm/vc4: Add fragment shader threading support
+
+FS threading brings performance improvements of 0-20% in glmark2.
+
+The validation code checks for thread switch signals and ensures that
+the registers of the other thread are not touched, and that our clamps
+are not live across thread switches. It also checks that the
+threading and branching instructions do not interfere.
+
+(Original patch by Jonas, changes by anholt for style cleanup,
+removing validation the kernel doesn't need to do, and adding the flag
+for userspace).
+
+v2: Minor style fixes from checkpatch.
+
+Signed-off-by: Jonas Pfeil <pfeiljonas@gmx.de>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+(cherry picked from commit c778cc5df944291dcdb1ca7a6bb781fbc22550c5)
+---
+ drivers/gpu/drm/vc4/vc4_drv.c | 1 +
+ drivers/gpu/drm/vc4/vc4_drv.h | 2 +
+ drivers/gpu/drm/vc4/vc4_validate.c | 17 +++++---
+ drivers/gpu/drm/vc4/vc4_validate_shaders.c | 63 ++++++++++++++++++++++++++++++
+ include/uapi/drm/vc4_drm.h | 1 +
+ 5 files changed, 79 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_drv.c
++++ b/drivers/gpu/drm/vc4/vc4_drv.c
+@@ -107,6 +107,7 @@ static int vc4_get_param_ioctl(struct dr
+ break;
+ case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
+ case DRM_VC4_PARAM_SUPPORTS_ETC1:
++ case DRM_VC4_PARAM_SUPPORTS_THREADED_FS:
+ args->value = true;
+ break;
+ default:
+--- a/drivers/gpu/drm/vc4/vc4_drv.h
++++ b/drivers/gpu/drm/vc4/vc4_drv.h
+@@ -395,6 +395,8 @@ struct vc4_validated_shader_info {
+
+ uint32_t num_uniform_addr_offsets;
+ uint32_t *uniform_addr_offsets;
++
++ bool is_threaded;
+ };
+
+ /**
+--- a/drivers/gpu/drm/vc4/vc4_validate.c
++++ b/drivers/gpu/drm/vc4/vc4_validate.c
+@@ -789,11 +789,6 @@ validate_gl_shader_rec(struct drm_device
+ exec->shader_rec_v += roundup(packet_size, 16);
+ exec->shader_rec_size -= packet_size;
+
+- if (!(*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD)) {
+- DRM_ERROR("Multi-threaded fragment shaders not supported.\n");
+- return -EINVAL;
+- }
+-
+ for (i = 0; i < shader_reloc_count; i++) {
+ if (src_handles[i] > exec->bo_count) {
+ DRM_ERROR("Shader handle %d too big\n", src_handles[i]);
+@@ -810,6 +805,18 @@ validate_gl_shader_rec(struct drm_device
+ return -EINVAL;
+ }
+
++ if (((*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD) == 0) !=
++ to_vc4_bo(&bo[0]->base)->validated_shader->is_threaded) {
++ DRM_ERROR("Thread mode of CL and FS do not match\n");
++ return -EINVAL;
++ }
++
++ if (to_vc4_bo(&bo[1]->base)->validated_shader->is_threaded ||
++ to_vc4_bo(&bo[2]->base)->validated_shader->is_threaded) {
++ DRM_ERROR("cs and vs cannot be threaded\n");
++ return -EINVAL;
++ }
++
+ for (i = 0; i < shader_reloc_count; i++) {
+ struct vc4_validated_shader_info *validated_shader;
+ uint32_t o = shader_reloc_offsets[i];
+--- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c
++++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c
+@@ -83,6 +83,13 @@ struct vc4_shader_validation_state {
+ * basic blocks.
+ */
+ bool needs_uniform_address_for_loop;
++
++ /* Set when we find an instruction writing the top half of the
++ * register files. If we allowed writing the unusable regs in
++ * a threaded shader, then the other shader running on our
++ * QPU's clamp validation would be invalid.
++ */
++ bool all_registers_used;
+ };
+
+ static uint32_t
+@@ -119,6 +126,13 @@ raddr_add_a_to_live_reg_index(uint64_t i
+ }
+
+ static bool
++live_reg_is_upper_half(uint32_t lri)
++{
++ return (lri >= 16 && lri < 32) ||
++ (lri >= 32 + 16 && lri < 32 + 32);
++}
++
++static bool
+ is_tmu_submit(uint32_t waddr)
+ {
+ return (waddr == QPU_W_TMU0_S ||
+@@ -390,6 +404,9 @@ check_reg_write(struct vc4_validated_sha
+ } else {
+ validation_state->live_immediates[lri] = ~0;
+ }
++
++ if (live_reg_is_upper_half(lri))
++ validation_state->all_registers_used = true;
+ }
+
+ switch (waddr) {
+@@ -598,6 +615,11 @@ check_instruction_reads(struct vc4_valid
+ }
+ }
+
++ if ((raddr_a >= 16 && raddr_a < 32) ||
++ (raddr_b >= 16 && raddr_b < 32 && sig != QPU_SIG_SMALL_IMM)) {
++ validation_state->all_registers_used = true;
++ }
++
+ return true;
+ }
+
+@@ -753,6 +775,7 @@ vc4_validate_shader(struct drm_gem_cma_o
+ {
+ bool found_shader_end = false;
+ int shader_end_ip = 0;
++ uint32_t last_thread_switch_ip = -3;
+ uint32_t ip;
+ struct vc4_validated_shader_info *validated_shader = NULL;
+ struct vc4_shader_validation_state validation_state;
+@@ -785,6 +808,17 @@ vc4_validate_shader(struct drm_gem_cma_o
+ if (!vc4_handle_branch_target(&validation_state))
+ goto fail;
+
++ if (ip == last_thread_switch_ip + 3) {
++ /* Reset r0-r3 live clamp data */
++ int i;
++
++ for (i = 64; i < LIVE_REG_COUNT; i++) {
++ validation_state.live_min_clamp_offsets[i] = ~0;
++ validation_state.live_max_clamp_regs[i] = false;
++ validation_state.live_immediates[i] = ~0;
++ }
++ }
++
+ switch (sig) {
+ case QPU_SIG_NONE:
+ case QPU_SIG_WAIT_FOR_SCOREBOARD:
+@@ -794,6 +828,8 @@ vc4_validate_shader(struct drm_gem_cma_o
+ case QPU_SIG_LOAD_TMU1:
+ case QPU_SIG_PROG_END:
+ case QPU_SIG_SMALL_IMM:
++ case QPU_SIG_THREAD_SWITCH:
++ case QPU_SIG_LAST_THREAD_SWITCH:
+ if (!check_instruction_writes(validated_shader,
+ &validation_state)) {
+ DRM_ERROR("Bad write at ip %d\n", ip);
+@@ -809,6 +845,18 @@ vc4_validate_shader(struct drm_gem_cma_o
+ shader_end_ip = ip;
+ }
+
++ if (sig == QPU_SIG_THREAD_SWITCH ||
++ sig == QPU_SIG_LAST_THREAD_SWITCH) {
++ validated_shader->is_threaded = true;
++
++ if (ip < last_thread_switch_ip + 3) {
++ DRM_ERROR("Thread switch too soon after "
++ "last switch at ip %d\n", ip);
++ goto fail;
++ }
++ last_thread_switch_ip = ip;
++ }
++
+ break;
+
+ case QPU_SIG_LOAD_IMM:
+@@ -823,6 +871,13 @@ vc4_validate_shader(struct drm_gem_cma_o
+ if (!check_branch(inst, validated_shader,
+ &validation_state, ip))
+ goto fail;
++
++ if (ip < last_thread_switch_ip + 3) {
++ DRM_ERROR("Branch in thread switch at ip %d",
++ ip);
++ goto fail;
++ }
++
+ break;
+ default:
+ DRM_ERROR("Unsupported QPU signal %d at "
+@@ -844,6 +899,14 @@ vc4_validate_shader(struct drm_gem_cma_o
+ goto fail;
+ }
+
++ /* Might corrupt other thread */
++ if (validated_shader->is_threaded &&
++ validation_state.all_registers_used) {
++ DRM_ERROR("Shader uses threading, but uses the upper "
++ "half of the registers, too\n");
++ goto fail;
++ }
++
+ /* If we did a backwards branch and we haven't emitted a uniforms
+ * reset since then, we still need the uniforms stream to have the
+ * uniforms address available so that the backwards branch can do its
+--- a/include/uapi/drm/vc4_drm.h
++++ b/include/uapi/drm/vc4_drm.h
+@@ -287,6 +287,7 @@ struct drm_vc4_get_hang_state {
+ #define DRM_VC4_PARAM_V3D_IDENT2 2
+ #define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
+ #define DRM_VC4_PARAM_SUPPORTS_ETC1 4
++#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5
+
+ struct drm_vc4_get_param {
+ __u32 param;
--- /dev/null
+From aeef7a1c42f363b30a5a4c48f12301a5b46d8427 Mon Sep 17 00:00:00 2001
+From: popcornmix <popcornmix@gmail.com>
+Date: Thu, 17 Nov 2016 16:49:33 +0000
+Subject: [PATCH] fb: Use struct device for dma_alloc_coherent
+
+---
+ drivers/video/fbdev/bcm2708_fb.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/video/fbdev/bcm2708_fb.c
++++ b/drivers/video/fbdev/bcm2708_fb.c
+@@ -507,7 +507,7 @@ static long vc_mem_copy(struct bcm2708_f
+ return -EFAULT;
+ }
+
+- buf = dma_alloc_coherent(NULL, PAGE_ALIGN(size), &bus_addr,
++ buf = dma_alloc_coherent(fb->fb.device, PAGE_ALIGN(size), &bus_addr,
+ GFP_ATOMIC);
+ if (!buf) {
+ pr_err("[%s]: failed to dma_alloc_coherent(%d)\n",
+@@ -531,7 +531,7 @@ static long vc_mem_copy(struct bcm2708_f
+ }
+ out:
+ if (buf)
+- dma_free_coherent(NULL, PAGE_ALIGN(size), buf, bus_addr);
++ dma_free_coherent(fb->fb.device, PAGE_ALIGN(size), buf, bus_addr);
+ return rc;
+ }
+
--- /dev/null
+From 2e743a4c2f496667937b899770b4329788f0a0a0 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 18 Nov 2016 10:52:49 +0000
+Subject: [PATCH] ARM: dts: Visit overlays subdir unconditionally
+
+make clean processing occurs without loading the configuration, so the
+overlays subdir must be added unconditionally.
+
+See: https://github.com/raspberrypi/linux/issues/1723
+---
+ arch/arm/boot/dts/Makefile | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -18,9 +18,6 @@ endif
+ ifeq ($(CONFIG_ARCH_BCM2835),y)
+ RPI_DT_OVERLAYS=y
+ endif
+-ifeq ($(RPI_DT_OVERLAYS),y)
+- dts-dirs += overlays
+-endif
+
+ dtb-$(CONFIG_ARCH_ALPINE) += \
+ alpine-db.dtb
+@@ -809,7 +806,7 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-subdir-y := $(dts-dirs)
++subdir-y := $(dts-dirs) overlays
+ clean-files := *.dtb
+
+ # Enable fixups to support overlays on BCM2708 platforms
--- /dev/null
+From 80531f433182a0db5da749045a6e3f48bf4277db Mon Sep 17 00:00:00 2001
+From: Matt Flax <flatmax@flatmax.org>
+Date: Sun, 20 Nov 2016 19:15:24 +1100
+Subject: [PATCH] [Audioinjector] Fix bit offsets for equal volume and add 8
+ kHz operation (#1727)
+
+Applying to the audioinjector sound card only. This patch offsets channel
+2 correctly from the LR clock. This ensures that channel 2 doesn't loose
+any bits during capture. It also results in both channels 1 and 2 having
+the same volume. This commit also adds 8 kHz operation.
+
+Signed-off-by: Matt Flax <flatmax@flatmax.org>
+---
+ sound/soc/bcm/audioinjector-pi-soundcard.c | 16 +++++++++-------
+ 1 file changed, 9 insertions(+), 7 deletions(-)
+
+--- a/sound/soc/bcm/audioinjector-pi-soundcard.c
++++ b/sound/soc/bcm/audioinjector-pi-soundcard.c
+@@ -30,7 +30,7 @@
+ #include "../codecs/wm8731.h"
+
+ static const unsigned int bcm2835_rates_12000000[] = {
+- 32000, 44100, 48000, 96000, 88200,
++ 8000, 16000, 32000, 44100, 48000, 96000, 88200,
+ };
+
+ static struct snd_pcm_hw_constraint_list bcm2835_constraints_12000000 = {
+@@ -55,19 +55,21 @@ static int snd_audioinjector_pi_soundcar
+
+ switch (params_rate(params)){
+ case 8000:
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, 1508);
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 1);
++ case 16000:
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 750);
+ case 32000:
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, 378);
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 375);
+ case 44100:
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, 274);
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 272);
+ case 48000:
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, 252);
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 250);
+ case 88200:
+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 136);
+ case 96000:
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 125);
+ default:
+- return snd_soc_dai_set_bclk_ratio(cpu_dai, 126);
++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 125);
+ }
+ }
+
--- /dev/null
+From da62b2064a19346529bf827e8d7fbbd76e5e7ead Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Wed, 23 Nov 2016 14:19:40 +0000
+Subject: [PATCH] config: Add ABX80X RTC driver and overlay
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/overlays/README | 12 ++++++++++--
+ arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 12 +++++++++++-
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 4 files changed, 23 insertions(+), 3 deletions(-)
+
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -498,7 +498,11 @@ Params: addr I2C addr
+ Name: i2c-rtc
+ Info: Adds support for a number of I2C Real Time Clock devices
+ Load: dtoverlay=i2c-rtc,<param>=<val>
+-Params: ds1307 Select the DS1307 device
++Params: abx80x Select one of the ABx80x family:
++ AB0801, AB0803, AB0804, AB0805,
++ AB1801, AB1803, AB1804, AB1805
++
++ ds1307 Select the DS1307 device
+
+ ds1339 Select the DS1339 device
+
+@@ -514,7 +518,11 @@ Params: ds1307 Select t
+
+ pcf8563 Select the PCF8563 device
+
+- trickle-resistor-ohms Resistor value for trickle charge (DS1339-only)
++ trickle-diode-type Diode type for trickle charge - "standard" or
++ "schottky" (ABx80x only)
++
++ trickle-resistor-ohms Resistor value for trickle charge (DS1339,
++ ABx80x)
+
+ wakeup-source Specify that the RTC can be used as a wakeup
+ source
+--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
+@@ -12,6 +12,13 @@
+ #size-cells = <0>;
+ status = "okay";
+
++ abx80x: abx80x@69 {
++ compatible = "abracon,abx80x";
++ reg = <0x69>;
++ abracon,tc-diode = "standard";
++ abracon,tc-resistor = <0>;
++ status = "disable";
++ };
+ ds1307: ds1307@68 {
+ compatible = "maxim,ds1307";
+ reg = <0x68>;
+@@ -56,6 +63,7 @@
+ };
+ };
+ __overrides__ {
++ abx80x = <&abx80x>,"status";
+ ds1307 = <&ds1307>,"status";
+ ds1339 = <&ds1339>,"status";
+ ds3231 = <&ds3231>,"status";
+@@ -64,7 +72,9 @@
+ pcf2127 = <&pcf2127>,"status";
+ pcf8523 = <&pcf8523>,"status";
+ pcf8563 = <&pcf8563>,"status";
+- trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0";
++ trickle-diode-type = <&abx80x>,"abracon,tc-diode";
++ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
++ <&abx80x>,"abracon,tc-resistor";
+ wakeup-source = <&ds1339>,"wakeup-source?",
+ <&ds3231>,"wakeup-source?",
+ <&mcp7940x>,"wakeup-source?",
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -1060,6 +1060,7 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
+ CONFIG_LEDS_TRIGGER_INPUT=y
+ CONFIG_RTC_CLASS=y
+ # CONFIG_RTC_HCTOSYS is not set
++CONFIG_RTC_DRV_ABX80X=m
+ CONFIG_RTC_DRV_DS1307=m
+ CONFIG_RTC_DRV_DS1374=m
+ CONFIG_RTC_DRV_DS1672=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -1067,6 +1067,7 @@ CONFIG_LEDS_TRIGGER_CAMERA=m
+ CONFIG_LEDS_TRIGGER_INPUT=y
+ CONFIG_RTC_CLASS=y
+ # CONFIG_RTC_HCTOSYS is not set
++CONFIG_RTC_DRV_ABX80X=m
+ CONFIG_RTC_DRV_DS1307=m
+ CONFIG_RTC_DRV_DS1374=m
+ CONFIG_RTC_DRV_DS1672=m
--- /dev/null
+From a7f724223d487c66b25627519d2cf344e95460ff Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 25 Nov 2016 15:01:15 +0000
+Subject: [PATCH] config: Add AK4554 audio codec driver
+
+See: https://github.com/raspberrypi/linux/issues/1730
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/configs/bcm2709_defconfig | 1 +
+ arch/arm/configs/bcmrpi_defconfig | 1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/arm/configs/bcm2709_defconfig
++++ b/arch/arm/configs/bcm2709_defconfig
+@@ -882,6 +882,7 @@ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
+ CONFIG_SND_PISOUND=m
+ CONFIG_SND_SOC_ADAU1701=m
++CONFIG_SND_SOC_AK4554=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+ CONFIG_SOUND_PRIME=m
+--- a/arch/arm/configs/bcmrpi_defconfig
++++ b/arch/arm/configs/bcmrpi_defconfig
+@@ -874,6 +874,7 @@ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m
+ CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m
+ CONFIG_SND_PISOUND=m
+ CONFIG_SND_SOC_ADAU1701=m
++CONFIG_SND_SOC_AK4554=m
+ CONFIG_SND_SOC_WM8804_I2C=m
+ CONFIG_SND_SIMPLE_CARD=m
+ CONFIG_SOUND_PRIME=m
--- /dev/null
+From 49b92b33aa6681e75f579b7369f34a53e9376e6c Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Sat, 26 Nov 2016 14:01:52 +0000
+Subject: [PATCH] ARM: dts: Restore dtbs_install functionality
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/Makefile | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -806,10 +806,11 @@ dtstree := $(srctree)/$(src)
+ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
+
+ always := $(dtb-y)
+-subdir-y := $(dts-dirs) overlays
++subdir-y := overlays
+ clean-files := *.dtb
+
+ # Enable fixups to support overlays on BCM2708 platforms
+ ifeq ($(RPI_DT_OVERLAYS),y)
+ DTC_FLAGS ?= -@ -H epapr
++ dts-dirs += overlays
+ endif
--- /dev/null
+From 1efce478669516e7a0fad7fa9943c889fcc21d2e Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Sun, 27 Nov 2016 21:45:55 +0000
+Subject: [PATCH] BCM270X_DT: Update UART0 clock-frequency
+
+The Raspberry Pi firmware now sets the UART0 clock frequency to
+48MHz (was 3MHz), to allow for baudrates up to 3MHz. This value
+is overwritten by the firmware, but alternative loaders such
+as U-Boot ignore the firmware-provided DTB. And besides, the
+default ought to be correct.
+
+See: https://github.com/raspberrypi/linux/issues/1732
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/bcm2708_common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2708_common.dtsi
++++ b/arch/arm/boot/dts/bcm2708_common.dtsi
+@@ -456,7 +456,7 @@
+ reg = <2>;
+ #clock-cells = <0>;
+ clock-output-names = "uart0_pclk";
+- clock-frequency = <3000000>;
++ clock-frequency = <48000000>;
+ };
+
+ clk_apb_p: clock@3 {
--- /dev/null
+From 05b2785cb7e1f40900dad84579c6f7fd4ad8aeda Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <6by9@users.noreply.github.com>
+Date: Wed, 30 Nov 2016 20:17:14 +0000
+Subject: [PATCH] BCM2835-v4l2: Fix a conformance test failure
+
+Format ioctls:
+ test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
+ warn: v4l2-test-formats.cpp(1195): S_PARM is supported but
+ doesn't report V4L2_CAP_TIMEPERFRAME.
+ fail: v4l2-test-formats.cpp(1118): node->has_frmintervals
+ && !cap->capability
+---
+ drivers/media/platform/bcm2835/bcm2835-camera.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/media/platform/bcm2835/bcm2835-camera.c
++++ b/drivers/media/platform/bcm2835/bcm2835-camera.c
+@@ -1397,6 +1397,7 @@ static int vidioc_s_parm(struct file *fi
+ dev->capture.timeperframe = tpf;
+ parm->parm.capture.timeperframe = tpf;
+ parm->parm.capture.readbuffers = 1;
++ parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME;
+
+ fps_param.num = 0; /* Select variable fps, and then use
+ * FPS_RANGE to select the actual limits.
projects / openwrt / openwrt.git / commitdiff