system: add RISC-V CPU info

system: add RISC-V CPU info

This patch adds the missing information about RISC-V architecture,
which has been supported by OpenWrt. Currently, LuCI shows "?" at the
field of Architecture, we add "RISC-V" with isa string parsed from
/proc/cpuinfo.

For example, the following platform generates "RISC-V (rv64imafdc)":

root@OpenWrt:/# cat /proc/cpuinfo
processor       : 0
hart            : 0
isa             : rv64imafdc
mmu             : sv48
mvendorid       : 0x31e
marchid         : 0x8000000000008a45
mimpid          : 0x820

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>