ramips: 5.10: port and refresh patches, ralink drv

[openwrt/staging/rmilecki.git] / target / linux / ramips / patches-5.10 / 410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch

diff --git a/target/linux/ramips/patches-5.10/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch b/target/linux/ramips/patches-5.10/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
index ba844fed0f0e752e79c83c9d306082fc30a7b94b..a37426edecf944a060b2ff70d7da35218cc21c99 100644 (file)
--- a/target/linux/ramips/patches-5.10/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
+++ b/target/linux/ramips/patches-5.10/410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch
@@ -20,7 +20,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
-@@ -391,6 +391,14 @@ config MTD_NAND_QCOM
+@@ -387,6 +387,14 @@ config MTD_NAND_QCOM
          Enables support for NAND flash chips on SoCs containing the EBI2 NAND
          controller. This controller is found on IPQ806x SoC.
  
@@ -37,7 +37,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
        depends on ARCH_MEDIATEK || COMPILE_TEST
 --- a/drivers/mtd/nand/raw/Makefile
 +++ b/drivers/mtd/nand/raw/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI)         += sunxi_n
+@@ -51,6 +51,7 @@ obj-$(CONFIG_MTD_NAND_SUNXI)         += sunxi_n
  obj-$(CONFIG_MTD_NAND_HISI504)                += hisi504_nand.o
  obj-$(CONFIG_MTD_NAND_BRCMNAND)               += brcmnand/
  obj-$(CONFIG_MTD_NAND_QCOM)           += qcom_nandc.o
@@ -47,7 +47,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
  obj-$(CONFIG_MTD_NAND_TEGRA)          += tegra_nand.o
 --- /dev/null
 +++ b/drivers/mtd/nand/raw/mt7621_nand.c
-@@ -0,0 +1,1350 @@
+@@ -0,0 +1,1353 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * MediaTek MT7621 NAND Flash Controller driver
@@ -734,8 +734,8 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      return 0;
 +}
 +
-+static int mt7621_nfc_setup_data_interface(struct nand_chip *nand, int csline,
-+                                         const struct nand_data_interface *conf)
++static int mt7621_nfc_setup_interface(struct nand_chip *nand, int csline,
++                                    const struct nand_interface_config *conf)
 +{
 +      struct mt7621_nfc *nfc = nand_get_controller_data(nand);
 +      const struct nand_sdr_timings *timings;
@@ -883,7 +883,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      int ecc_cap;
 +
 +      /* Only hardware ECC mode is supported */
-+      if (nand->ecc.mode != NAND_ECC_HW_SYNDROME) {
++      if (nand->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) {
 +              dev_err(nfc->dev, "Only hardware ECC mode is supported\n");
 +              return -EINVAL;
 +      }
@@ -970,7 +970,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +static const struct nand_controller_ops mt7621_nfc_controller_ops = {
 +      .attach_chip = mt7621_nfc_attach_chip,
 +      .exec_op = mt7621_nfc_exec_op,
-+      .setup_data_interface = mt7621_nfc_setup_data_interface,
++      .setup_interface = mt7621_nfc_setup_interface,
 +};
 +
 +static int mt7621_nfc_ooblayout_free(struct mtd_info *mtd, int section,
@@ -1275,11 +1275,11 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      nand_set_controller_data(nand, (void *)nfc);
 +      nand_set_flash_node(nand, nfc->dev->of_node);
 +
-+      nand->options |= NAND_USE_BOUNCE_BUFFER | NAND_NO_SUBPAGE_WRITE;
++      nand->options |= NAND_USES_DMA | NAND_NO_SUBPAGE_WRITE;
 +      if (!nfc->nfi_clk)
 +              nand->options |= NAND_KEEP_TIMINGS;
 +
-+      nand->ecc.mode = NAND_ECC_HW_SYNDROME;
++      nand->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
 +      nand->ecc.read_page = mt7621_nfc_read_page_hwecc;
 +      nand->ecc.read_page_raw = mt7621_nfc_read_page_raw;
 +      nand->ecc.write_page = mt7621_nfc_write_page_hwecc;
@@ -1304,7 +1304,7 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +      ret = mtd_device_register(mtd, NULL, 0);
 +      if (ret) {
 +              dev_err(nfc->dev, "Failed to register MTD: %d\n", ret);
-+              nand_release(nand);
++              nand_cleanup(nand);
 +              return ret;
 +      }
 +
@@ -1371,8 +1371,11 @@ Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
 +static int mt7621_nfc_remove(struct platform_device *pdev)
 +{
 +      struct mt7621_nfc *nfc = platform_get_drvdata(pdev);
++      struct nand_chip *nand = &nfc->nand;
++      struct mtd_info *mtd = nand_to_mtd(nand);
 +
-+      nand_release(&nfc->nand);
++      mtd_device_unregister(mtd);
++      nand_cleanup(nand);
 +      clk_disable_unprepare(nfc->nfi_clk);
 +
 +      return 0;