ath79: ar: convert to nvmem-layout

[openwrt/staging/jow.git] / target / linux / ath79 / dts / ar9344_atheros_db120.dts

diff --git a/target/linux/ath79/dts/ar9344_atheros_db120.dts b/target/linux/ath79/dts/ar9344_atheros_db120.dts
index 8811d4f4576baa7a0ac5774fba110773ec50b59e..9d5044141245c60a0586901c7cf632cd0e25d89c 100644 (file)
--- a/target/linux/ath79/dts/ar9344_atheros_db120.dts
+++ b/target/linux/ath79/dts/ar9344_atheros_db120.dts
@@ -140,24 +140,26 @@
                                reg = <0x7f0000 0x010000>;
                                read-only;
 
-                               compatible = "nvmem-cells";
-                               #address-cells = <1>;
-                               #size-cells = <1>;
-
-                               macaddr_art_0: macaddr@0 {
-                                       reg = <0x0 0x6>;
-                               };
-
-                               macaddr_art_6: macaddr@6 {
-                                       reg = <0x6 0x6>;
-                               };
-
-                               calibration_art_1000: calibration@1000 {
-                                       reg = <0x1000 0x440>;
-                               };
-
-                               calibration_art_5000: calibration@5000 {
-                                       reg = <0x5000 0x440>;
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_art_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_art_6: macaddr@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+
+                                       calibration_art_1000: calibration@1000 {
+                                               reg = <0x1000 0x440>;
+                                       };
+
+                                       calibration_art_5000: calibration@5000 {
+                                               reg = <0x5000 0x440>;
+                                       };
                                };
                        };
                };