From dc4aafb30939316a163c2eaede6811d871cace2f Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Mon, 31 Jul 2023 18:05:22 +0100 Subject: [PATCH] mediatek: filogic: enable driver for MediaTek XS-PHY Enable driver for MediaTek SuperSpeedPlus XS-PHY transceiver for the USB3.1 GEN2 controllers found in the MT7988 SoC. Signed-off-by: Daniel Golle --- target/linux/mediatek/filogic/config-5.15 | 2 +- target/linux/mediatek/filogic/config-6.1 | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/mediatek/filogic/config-5.15 b/target/linux/mediatek/filogic/config-5.15 index 4cae8c50ac..2ffc466b7c 100644 --- a/target/linux/mediatek/filogic/config-5.15 +++ b/target/linux/mediatek/filogic/config-5.15 @@ -306,7 +306,7 @@ CONFIG_PHYLINK=y CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PHY_MTK_TPHY=y # CONFIG_PHY_MTK_UFS is not set -# CONFIG_PHY_MTK_XSPHY is not set +CONFIG_PHY_MTK_XSPHY=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_MT2712 is not set # CONFIG_PINCTRL_MT6765 is not set diff --git a/target/linux/mediatek/filogic/config-6.1 b/target/linux/mediatek/filogic/config-6.1 index 96a7566735..334dfa8502 100644 --- a/target/linux/mediatek/filogic/config-6.1 +++ b/target/linux/mediatek/filogic/config-6.1 @@ -330,7 +330,7 @@ CONFIG_PHYS_ADDR_T_64BIT=y # CONFIG_PHY_MTK_PCIE is not set CONFIG_PHY_MTK_TPHY=y # CONFIG_PHY_MTK_UFS is not set -# CONFIG_PHY_MTK_XSPHY is not set +CONFIG_PHY_MTK_XSPHY=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_MT2712 is not set # CONFIG_PINCTRL_MT6765 is not set -- 2.30.2