From e4e4aa90d3810707c390ef5c00c0314317ffd585 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sat, 24 Oct 2009 20:55:36 +0000 Subject: [PATCH] adds mach type for fonera20n SVN-Revision: 18132 --- .../include/asm/mach-ralink/rt305x_regs.h | 2 +- .../files/arch/mips/ralink/common/prom.c | 3 + .../files/arch/mips/ralink/rt305x/Kconfig | 5 + .../files/arch/mips/ralink/rt305x/Makefile | 1 + .../arch/mips/ralink/rt305x/mach-fonera20n.c | 100 ++++++++++++++++++ 5 files changed, 110 insertions(+), 1 deletion(-) create mode 100644 target/linux/ramips/files/arch/mips/ralink/rt305x/mach-fonera20n.c diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index a17962d5aa..4056b163de 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -41,7 +41,7 @@ #define RT305X_UART0_SIZE 0x100 #define RT305X_UART1_SIZE 0x100 #define RT305X_FLASH1_SIZE (16 * 1024 * 1024) -#define RT305X_FLASH0_SIZE (4 * 1024 * 1024) +#define RT305X_FLASH0_SIZE (8 * 1024 * 1024) /* SYSC registers */ #define SYSC_REG_CHIP_NAME0 0x000 /* Chip Name 0 */ diff --git a/target/linux/ramips/files/arch/mips/ralink/common/prom.c b/target/linux/ramips/files/arch/mips/ralink/common/prom.c index 20b8d5fb64..587f161107 100644 --- a/target/linux/ramips/files/arch/mips/ralink/common/prom.c +++ b/target/linux/ramips/files/arch/mips/ralink/common/prom.c @@ -41,6 +41,9 @@ static struct board_rec boards[] __initdata = { }, { .name = "WHR-G300N", .mach_type = RAMIPS_MACH_WHR_G300N, + }, { + .name = "FONERA20N", + .mach_type = RAMIPS_MACH_FONERA20N, } }; diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/Kconfig b/target/linux/ramips/files/arch/mips/ralink/rt305x/Kconfig index 383f79d2b6..ef52c05df9 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/Kconfig +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/Kconfig @@ -17,6 +17,11 @@ config RT305X_MACH_V22RW_2X2 default y select RALINK_DEV_GPIO_LEDS +config RT305X_MACH_FONERA20N + bool "La Fonera20N board support" + default y + select RALINK_DEV_GPIO_LEDS + endmenu endif diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/Makefile b/target/linux/ramips/files/arch/mips/ralink/rt305x/Makefile index 4eeaf21390..a1278c3057 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/Makefile +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/Makefile @@ -14,3 +14,4 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_RT305X_MACH_DIR_300_REVB) += mach-dir-300-revb.o obj-$(CONFIG_RT305X_MACH_V22RW_2X2) += mach-v22rw-2x2.o obj-$(CONFIG_RT305X_MACH_WHR_G300N) += mach-whr-g300n.o +obj-$(CONFIG_RT305X_MACH_FONERA20N) += mach-fonera20n.o diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-fonera20n.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-fonera20n.c new file mode 100644 index 0000000000..3a444caeb8 --- /dev/null +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/mach-fonera20n.c @@ -0,0 +1,100 @@ +/* + * La Fonera20N board support + * + * Copyright (C) 2009 John Crispin + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "devices.h" + +#define FONERA20N_GPIO_BUTTON_RESET 12 +#define FONERA20N_GPIO_SWITCH 13 +#define FONERA20N_GPIO_LED_WIFI 7 +#define FONERA20N_GPIO_LED_POWER 9 +#define FONERA20N_GPIO_LED_USB 14 + +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition fonera20n_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x030000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x030000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "factory", + .offset = 0x040000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x050000, + .size = 0x0a0000, + }, { + .name = "rootfs", + .offset = 0x150000, + .size = 0x6b0000, + }, { + .name = "openwrt", + .offset = 0x050000, + .size = 0x7b0000, + } +}; +#endif /* CONFIG_MTD_PARTITIONS */ + +static struct physmap_flash_data fonera20n_flash_data = { +#ifdef CONFIG_MTD_PARTITIONS + .nr_parts = ARRAY_SIZE(fonera20n_partitions), + .parts = fonera20n_partitions, +#endif +}; + +static struct gpio_led fonera20n_leds_gpio[] __initdata = { + { + .name = "fonera20n:orange:wifi", + .gpio = FONERA20N_GPIO_LED_WIFI, + .active_low = 1, + }, { + .name = "fonera20n:green:power", + .gpio = FONERA20N_GPIO_LED_POWER, + .active_low = 1, + }, { + .name = "fonera20n:orange:usb", + .gpio = FONERA20N_GPIO_LED_USB, + .active_low = 1, + } +}; + +static void __init fonera20n_init(void) +{ + rt305x_gpio_init(RT305X_GPIO_MODE_GPIO << RT305X_GPIO_MODE_UART0_SHIFT); + + rt305x_register_flash(0, &fonera20n_flash_data); + + ramips_register_gpio_leds(-1, ARRAY_SIZE(fonera20n_leds_gpio), + fonera20n_leds_gpio); + + rt305x_register_ethernet(); +} + +MIPS_MACHINE(RAMIPS_MACH_FONERA20N, "La Fonera 2.0N", fonera20n_init); -- 2.30.2