kernel: update 4.9 to 4.9.50
[openwrt/openwrt.git] / target / linux / ipq806x / patches-4.9 / 860-qcom-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch
index 20940514eb4418df1c0b9677f4de2af13a003e01..5a3c02c700b646286f12462bb9e06d353e32ace2 100644 (file)
@@ -116,7 +116,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
                compatible = "qcom,nandcs";
 --- a/drivers/mtd/nand/qcom_nandc.c
 +++ b/drivers/mtd/nand/qcom_nandc.c
-@@ -226,6 +226,7 @@ struct nandc_regs {
+@@ -234,6 +234,7 @@ struct nandc_regs {
   *                            by upper layers directly
   * @buf_size/count/start:     markers for chip->read_buf/write_buf functions
   * @reg_read_buf:             local buffer for reading back registers via DMA
@@ -124,7 +124,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
   * @reg_read_pos:             marker for data read in reg_read_buf
   *
   * @regs:                     a contiguous chunk of memory for DMA register
-@@ -234,7 +235,10 @@ struct nandc_regs {
+@@ -242,7 +243,10 @@ struct nandc_regs {
   * @cmd1/vld:                 some fixed controller register values
   * @ecc_modes:                        supported ECC modes by the current controller,
   *                            initialized via DT match data
@@ -136,7 +136,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  struct qcom_nand_controller {
        struct nand_hw_control controller;
        struct list_head host_list;
-@@ -247,17 +251,28 @@ struct qcom_nand_controller {
+@@ -255,17 +259,28 @@ struct qcom_nand_controller {
        struct clk *core_clk;
        struct clk *aon_clk;
  
@@ -168,7 +168,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
        int reg_read_pos;
  
        struct nandc_regs *regs;
-@@ -316,6 +331,17 @@ struct qcom_nand_host {
+@@ -324,6 +339,17 @@ struct qcom_nand_host {
        u32 clrreadstatus;
  };
  
@@ -186,16 +186,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
  {
        return container_of(chip, struct qcom_nand_host, chip);
-@@ -1893,7 +1919,7 @@ static int qcom_nand_host_setup(struct q
-                               | wide_bus << WIDE_FLASH
-                               | 1 << DEV0_CFG1_ECC_DISABLE;
--      host->ecc_bch_cfg = host->bch_enabled << ECC_CFG_ECC_DISABLE
-+      host->ecc_bch_cfg = !host->bch_enabled << ECC_CFG_ECC_DISABLE
-                               | 0 << ECC_SW_RESET
-                               | host->cw_data << ECC_NUM_DATA_BYTES
-                               | 1 << ECC_FORCE_CLK_OPEN
-@@ -1942,16 +1968,46 @@ static int qcom_nandc_alloc(struct qcom_
+@@ -1949,16 +1975,46 @@ static int qcom_nandc_alloc(struct qcom_
        if (!nandc->regs)
                return -ENOMEM;
  
@@ -251,7 +242,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
        }
  
        INIT_LIST_HEAD(&nandc->desc_list);
-@@ -1964,8 +2020,35 @@ static int qcom_nandc_alloc(struct qcom_
+@@ -1971,8 +2027,35 @@ static int qcom_nandc_alloc(struct qcom_
  
  static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc)
  {
@@ -289,7 +280,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  
  /* one time setup of a few nand controller registers */
  static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
-@@ -2002,6 +2085,8 @@ static int qcom_nand_host_init(struct qc
+@@ -2010,6 +2093,8 @@ static int qcom_nand_host_init(struct qc
        mtd->name = devm_kasprintf(dev, GFP_KERNEL, "qcom_nand.%d", host->cs);
        mtd->owner = THIS_MODULE;
        mtd->dev.parent = dev;
@@ -298,7 +289,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  
        chip->cmdfunc           = qcom_nandc_command;
        chip->select_chip       = qcom_nandc_select_chip;
-@@ -2049,16 +2134,20 @@ static int qcom_nandc_parse_dt(struct pl
+@@ -2057,16 +2142,20 @@ static int qcom_nandc_parse_dt(struct pl
        struct device_node *np = nandc->dev->of_node;
        int ret;
  
@@ -328,7 +319,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
        }
  
        return 0;
-@@ -2073,6 +2162,7 @@ static int qcom_nandc_probe(struct platf
+@@ -2081,6 +2170,7 @@ static int qcom_nandc_probe(struct platf
        struct device_node *dn = dev->of_node, *child;
        struct resource *res;
        int ret;
@@ -336,7 +327,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  
        nandc = devm_kzalloc(&pdev->dev, sizeof(*nandc), GFP_KERNEL);
        if (!nandc)
-@@ -2087,7 +2177,10 @@ static int qcom_nandc_probe(struct platf
+@@ -2095,7 +2185,10 @@ static int qcom_nandc_probe(struct platf
                return -ENODEV;
        }
  
@@ -348,7 +339,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        nandc->base = devm_ioremap_resource(dev, res);
-@@ -2179,7 +2272,15 @@ static int qcom_nandc_remove(struct plat
+@@ -2187,7 +2280,15 @@ static int qcom_nandc_remove(struct plat
        return 0;
  }
  
@@ -365,7 +356,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  
  /*
   * data will hold a struct pointer containing more differences once we support
-@@ -2187,7 +2288,10 @@ static int qcom_nandc_remove(struct plat
+@@ -2195,7 +2296,10 @@ static int qcom_nandc_remove(struct plat
   */
  static const struct of_device_id qcom_nandc_of_match[] = {
        {       .compatible = "qcom,ipq806x-nand",