kernel: ar8327/ar8337: disable ARL access code to avoid lockups (FS#384)
[openwrt/openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8327.c
index 02fd2e77bf9a20259899e8879900c0c659367f7e..72e0abc9d67c1887f5a0362bb8e85b8af4bcc878 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * ar8327.c: AR8216 switch driver
  *
- * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
+ * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
  * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
  *
  * This program is free software; you can redistribute it and/or
@@ -139,13 +139,10 @@ ar8327_phy_fixup(struct ar8xxx_priv *priv, int phy)
                break;
 
        case 2:
-               ar8xxx_phy_mmd_write(priv, phy, 0x7, 0x3c);
-               ar8xxx_phy_mmd_write(priv, phy, 0x4007, 0x0);
+               ar8xxx_phy_mmd_write(priv, phy, 0x7, 0x3c, 0x0);
                /* fallthrough */
        case 4:
-               ar8xxx_phy_mmd_write(priv, phy, 0x3, 0x800d);
-               ar8xxx_phy_mmd_write(priv, phy, 0x4003, 0x803f);
-
+               ar8xxx_phy_mmd_write(priv, phy, 0x3, 0x800d, 0x803f);
                ar8xxx_phy_dbg_write(priv, phy, 0x3d, 0x6860);
                ar8xxx_phy_dbg_write(priv, phy, 0x5, 0x2c46);
                ar8xxx_phy_dbg_write(priv, phy, 0x3c, 0x6000);
@@ -226,9 +223,7 @@ ar8327_led_work_func(struct work_struct *work)
 
        aled = container_of(work, struct ar8327_led, led_work);
 
-       spin_lock(&aled->lock);
        pattern = aled->pattern;
-       spin_unlock(&aled->lock);
 
        ar8327_set_led_pattern(aled->sw_priv, aled->led_num,
                               pattern);
@@ -311,9 +306,7 @@ ar8327_led_enable_hw_mode_show(struct device *dev,
        struct ar8327_led *aled = led_cdev_to_ar8327_led(led_cdev);
        ssize_t ret = 0;
 
-       spin_lock(&aled->lock);
-       ret += sprintf(buf, "%d\n", aled->enable_hw_mode);
-       spin_unlock(&aled->lock);
+       ret += scnprintf(buf, PAGE_SIZE, "%d\n", aled->enable_hw_mode);
 
        return ret;
 }
@@ -692,12 +685,20 @@ ar8327_init_port(struct ar8xxx_priv *priv, int port)
        else
                t = AR8216_PORT_STATUS_LINK_AUTO;
 
-       ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t);
+       if (port != AR8216_PORT_CPU && port != 6) {
+               /*hw limitation:if configure mac when there is traffic,
+               port MAC may work abnormal. Need disable lan&wan mac at fisrt*/
+               ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), 0);
+               msleep(100);
+               t |= AR8216_PORT_STATUS_FLOW_CONTROL;
+               ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t);
+       } else {
+               ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t);
+       }
+
        ar8xxx_write(priv, AR8327_REG_PORT_HEADER(port), 0);
 
-       t = 1 << AR8327_PORT_VLAN0_DEF_SVID_S;
-       t |= 1 << AR8327_PORT_VLAN0_DEF_CVID_S;
-       ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), t);
+       ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), 0);
 
        t = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH << AR8327_PORT_VLAN1_OUT_MODE_S;
        ar8xxx_write(priv, AR8327_REG_PORT_VLAN1(port), t);
@@ -744,8 +745,7 @@ ar8327_read_port_eee_status(struct ar8xxx_priv *priv, int port)
        phy = port - 1;
 
        /* EEE Ability Auto-negotiation Result */
-       ar8xxx_phy_mmd_write(priv, phy, 0x7, 0x8000);
-       t = ar8xxx_phy_mmd_read(priv, phy, 0x4007);
+       t = ar8xxx_phy_mmd_read(priv, phy, 0x7, 0x8000);
 
        return mmd_eee_adv_to_ethtool_adv_t(t);
 }
@@ -1040,6 +1040,7 @@ ar8327_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1)
                pr_err("ar8327: timeout waiting for atu to become ready\n");
 }
 
+#if 0
 static void ar8327_get_arl_entry(struct ar8xxx_priv *priv,
                                 struct arl_entry *a, u32 *status, enum arl_op op)
 {
@@ -1099,6 +1100,7 @@ static void ar8327_get_arl_entry(struct ar8xxx_priv *priv,
                break;
        }
 }
+#endif
 
 static int
 ar8327_sw_hw_apply(struct switch_dev *dev)
@@ -1274,6 +1276,13 @@ static const struct switch_attr ar8327_sw_attr_globals[] = {
                .get = ar8xxx_sw_get_mirror_source_port,
                .max = AR8327_NUM_PORTS - 1
        },
+       {
+               .type = SWITCH_TYPE_INT,
+               .name = "arl_age_time",
+               .description = "ARL age time (secs)",
+               .set = ar8xxx_sw_set_arl_age_time,
+               .get = ar8xxx_sw_get_arl_age_time,
+       },
        {
                .type = SWITCH_TYPE_STRING,
                .name = "arl_table",
@@ -1377,6 +1386,7 @@ const struct ar8xxx_chip ar8327_chip = {
 
        .reg_port_stats_start = 0x1000,
        .reg_port_stats_length = 0x100,
+       .reg_arl_ctrl = AR8327_REG_ARL_CTRL,
 
        .hw_init = ar8327_hw_init,
        .cleanup = ar8327_cleanup,
@@ -1391,7 +1401,9 @@ const struct ar8xxx_chip ar8327_chip = {
        .vtu_load_vlan = ar8327_vtu_load_vlan,
        .phy_fixup = ar8327_phy_fixup,
        .set_mirror_regs = ar8327_set_mirror_regs,
+#if 0
        .get_arl_entry = ar8327_get_arl_entry,
+#endif
        .sw_hw_apply = ar8327_sw_hw_apply,
 
        .num_mibs = ARRAY_SIZE(ar8236_mibs),
@@ -1411,6 +1423,7 @@ const struct ar8xxx_chip ar8337_chip = {
 
        .reg_port_stats_start = 0x1000,
        .reg_port_stats_length = 0x100,
+       .reg_arl_ctrl = AR8327_REG_ARL_CTRL,
 
        .hw_init = ar8327_hw_init,
        .cleanup = ar8327_cleanup,
@@ -1425,11 +1438,12 @@ const struct ar8xxx_chip ar8337_chip = {
        .vtu_load_vlan = ar8327_vtu_load_vlan,
        .phy_fixup = ar8327_phy_fixup,
        .set_mirror_regs = ar8327_set_mirror_regs,
+#if 0
        .get_arl_entry = ar8327_get_arl_entry,
+#endif
        .sw_hw_apply = ar8327_sw_hw_apply,
 
        .num_mibs = ARRAY_SIZE(ar8236_mibs),
        .mib_decs = ar8236_mibs,
        .mib_func = AR8327_REG_MIB_FUNC
 };
-