--- a/drivers/usb/host/bcma-hcd.c
+++ b/drivers/usb/host/bcma-hcd.c
-@@ -29,6 +29,7 @@
- #include <linux/of_gpio.h>
+@@ -30,6 +30,7 @@
+ #include <linux/of_platform.h>
#include <linux/usb/ehci_pdriver.h>
#include <linux/usb/ohci_pdriver.h>
+#include <linux/usb/xhci_pdriver.h>
MODULE_AUTHOR("Hauke Mehrtens");
MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
-@@ -38,6 +39,7 @@ struct bcma_hcd_device {
+@@ -42,6 +43,7 @@ struct bcma_hcd_device {
struct bcma_device *core;
struct platform_device *ehci_dev;
struct platform_device *ohci_dev;
struct gpio_desc *gpio_desc;
};
-@@ -245,6 +247,10 @@ static const struct usb_ehci_pdata ehci_
+@@ -319,6 +321,10 @@ static const struct usb_ehci_pdata ehci_
static const struct usb_ohci_pdata ohci_pdata = {
};
static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
const char *name, u32 addr,
const void *data,
-@@ -338,6 +344,216 @@ err_unregister_ohci_dev:
+@@ -412,6 +418,150 @@ err_unregister_ohci_dev:
return err;
}
+ u32 cru_straps_ctrl;
+
+ if (chipinfo->id != BCMA_CHIP_ID_BCM4707 &&
++ chipinfo->id != BCMA_CHIP_ID_BCM47094 &&
+ chipinfo->id != BCMA_CHIP_ID_BCM53018)
+ return;
+
+ iowrite32(0x0000009a, ccb->mii + 0x000);
+ udelay(2);
+
-+ switch (chipinfo->id) {
-+ case BCMA_CHIP_ID_BCM4707:
-+ if (chipinfo->rev == 4) {
++ if (chipinfo->id == BCMA_CHIP_ID_BCM53018 ||
++ (chipinfo->id == BCMA_CHIP_ID_BCM4707 && (chipinfo->rev == 4 || chipinfo->rev == 6)) ||
++ chipinfo->id == BCMA_CHIP_ID_BCM47094) {
+ /* For NS-B0, USB3 PLL Block */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
+ iowrite32(0x587e8000, ccb->mii + 0x004);
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
+ iowrite32(0x582e8000, ccb->mii + 0x004);
+
++ /* Waiting MII Mgt interface idle */
++ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
++
+ /* Deasserting USB3 system reset */
+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
+
-+ /* Set ana_pllSeqStart */
++ /* PLL frequency monitor enable */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
+ iowrite32(0x58069000, ccb->mii + 0x004);
+
-+ /* RXPMD block */
++ /* PIPE Block */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x587e8020, ccb->mii + 0x004);
++ iowrite32(0x587e8060, ccb->mii + 0x004);
+
-+ /* CDR int loop locking BW to 1 */
++ /* CMPMAX & CMPMINTH setting */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x58120049, ccb->mii + 0x004);
++ iowrite32(0x580af30d, ccb->mii + 0x004);
+
-+ /* CDR int loop acquisition BW to 1 */
++ /* DEGLITCH MIN & MAX setting */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x580e0049, ccb->mii + 0x004);
++ iowrite32(0x580e6302, ccb->mii + 0x004);
+
-+ /* CDR prop loop BW to 1 */
++ /* TXPMD block */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x580a005c, ccb->mii + 0x004);
++ iowrite32(0x587e8040, ccb->mii + 0x004);
++
++ /* Enabling SSC */
++ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
++ iowrite32(0x58061003, ccb->mii + 0x004);
+
+ /* Waiting MII Mgt interface idle */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ } else {
++ } else if (chipinfo->id == BCMA_CHIP_ID_BCM4707) {
+ /* PLL30 block */
+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
+ iowrite32(0x587e8000, ccb->mii + 0x004);
+
+ /* Deasserting USB3 system reset */
+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
-+ }
-+ break;
-+ case BCMA_CHIP_ID_BCM53018:
-+ /* USB3 PLL Block */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x587e8000, ccb->mii + 0x004);
-+
-+ /* Assert Ana_Pllseq start */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x58061000, ccb->mii + 0x004);
-+
-+ /* Assert CML Divider ratio to 26 */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x582a6400, ccb->mii + 0x004);
-+
-+ /* Asserting PLL Reset */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x582ec000, ccb->mii + 0x004);
-+
-+ /* Deaaserting PLL Reset */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x582e8000, ccb->mii + 0x004);
-+
-+ /* Waiting MII Mgt interface idle */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+
-+ /* Deasserting USB3 system reset */
-+ bcma_awrite32(core, BCMA_RESET_CTL, 0);
-+
-+ /* PLL frequency monitor enable */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x58069000, ccb->mii + 0x004);
-+
-+ /* PIPE Block */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x587e8060, ccb->mii + 0x004);
-+
-+ /* CMPMAX & CMPMINTH setting */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x580af30d, ccb->mii + 0x004);
-+
-+ /* DEGLITCH MIN & MAX setting */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x580e6302, ccb->mii + 0x004);
-+
-+ /* TXPMD block */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x587e8040, ccb->mii + 0x004);
-+
-+ /* Enabling SSC */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+ iowrite32(0x58061003, ccb->mii + 0x004);
-+
-+ /* Waiting MII Mgt interface idle */
-+ bcma_wait_reg(bus, ccb->mii + 0x000, 0x0100, 0x0000, 1000);
-+
-+ break;
+ }
+out:
+ if (dmu)
+ iounmap(dmu);
+}
+
-+static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
-+{
-+ struct bcma_device *core = bcma_hcd->core;
-+
-+ bcma_core_enable(core, 0);
-+
+ static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
+ {
+ struct bcma_device *core = bcma_hcd->core;
+@@ -419,6 +569,14 @@ static int bcma_hcd_usb30_init(struct bc
+
+ bcma_core_enable(core, 0);
+
+ bcma_hcd_usb30_phy_init(bcma_hcd);
+
+ bcma_hcd->xhci_dev = bcma_hcd_create_pdev(core, "xhci-hcd", core->addr,
+ if (IS_ERR(bcma_hcd->ohci_dev))
+ return PTR_ERR(bcma_hcd->ohci_dev);
+
-+ return 0;
-+}
-+
- static int bcma_hcd_probe(struct bcma_device *dev)
- {
- int err;
-@@ -364,6 +580,11 @@ static int bcma_hcd_probe(struct bcma_de
- if (err)
- return err;
- break;
-+ case BCMA_CORE_NS_USB30:
-+ err = bcma_hcd_usb30_init(usb_dev);
-+ if (err)
-+ return err;
-+ break;
- default:
- return -ENODEV;
- }
-@@ -377,11 +598,14 @@ static void bcma_hcd_remove(struct bcma_
+ of_platform_default_populate(dev->of_node, NULL, dev);
+
+ return 0;
+@@ -471,11 +629,14 @@ static void bcma_hcd_remove(struct bcma_
struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
struct platform_device *ohci_dev = usb_dev->ohci_dev;
struct platform_device *ehci_dev = usb_dev->ehci_dev;
bcma_core_disable(dev, 0);
}
-@@ -418,6 +642,7 @@ static int bcma_hcd_resume(struct bcma_d
- static const struct bcma_device_id bcma_hcd_table[] = {
- BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
- BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
-+ BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
- {},
- };
- MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
projects / openwrt / openwrt.git / blobdiff