kernel: bump 5.15 to 5.15.100

[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.15 / 950-0423-drm-vc4-plane-Add-support-for-YUV-color-encodings-an.patch

diff --git a/target/linux/bcm27xx/patches-5.15/950-0423-drm-vc4-plane-Add-support-for-YUV-color-encodings-an.patch b/target/linux/bcm27xx/patches-5.15/950-0423-drm-vc4-plane-Add-support-for-YUV-color-encodings-an.patch
index 8620d083dd5b6cb9e6b890497ef9c83dbeb120ff..d230566e61a2011cfc4918dca822474285c5822c 100644 (file)
--- a/target/linux/bcm27xx/patches-5.15/950-0423-drm-vc4-plane-Add-support-for-YUV-color-encodings-an.patch
+++ b/target/linux/bcm27xx/patches-5.15/950-0423-drm-vc4-plane-Add-support-for-YUV-color-encodings-an.patch
@@ -21,7 +21,7 @@ Link: https://lore.kernel.org/r/20211215091739.135042-4-maxime@cerno.tech
 
 --- a/drivers/gpu/drm/vc4/vc4_plane.c
 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
-@@ -619,6 +619,51 @@ static int vc4_plane_allocate_lbm(struct
+@@ -621,6 +621,51 @@ static int vc4_plane_allocate_lbm(struct
        return 0;
  }
  
@@ -73,7 +73,7 @@ Link: https://lore.kernel.org/r/20211215091739.135042-4-maxime@cerno.tech
  /* Writes out a full display list for an active plane to the plane's
   * private dlist state.
   */
-@@ -1013,9 +1058,20 @@ static int vc4_plane_mode_set(struct drm
+@@ -1015,9 +1060,20 @@ static int vc4_plane_mode_set(struct drm
  
        /* Colorspace conversion words */
        if (vc4_state->is_yuv) {
@@ -97,7 +97,7 @@ Link: https://lore.kernel.org/r/20211215091739.135042-4-maxime@cerno.tech
        }
  
        vc4_state->lbm_offset = 0;
-@@ -1444,6 +1500,15 @@ struct drm_plane *vc4_plane_init(struct
+@@ -1446,6 +1502,15 @@ struct drm_plane *vc4_plane_init(struct
                                           DRM_MODE_REFLECT_X |
                                           DRM_MODE_REFLECT_Y);
  
@@ -115,7 +115,7 @@ Link: https://lore.kernel.org/r/20211215091739.135042-4-maxime@cerno.tech
  
 --- a/drivers/gpu/drm/vc4/vc4_regs.h
 +++ b/drivers/gpu/drm/vc4/vc4_regs.h
-@@ -983,7 +983,10 @@ enum hvs_pixel_format {
+@@ -989,7 +989,10 @@ enum hvs_pixel_format {
  #define SCALER_CSC0_COEF_CR_OFS_SHIFT         0
  #define SCALER_CSC0_ITR_R_601_5                       0x00f00000
  #define SCALER_CSC0_ITR_R_709_3                       0x00f00000
@@ -126,7 +126,7 @@ Link: https://lore.kernel.org/r/20211215091739.135042-4-maxime@cerno.tech
  
  /* S2.8 contribution of Cb to Green */
  #define SCALER_CSC1_COEF_CB_GRN_MASK          VC4_MASK(31, 22)
-@@ -998,8 +1001,11 @@ enum hvs_pixel_format {
+@@ -1004,8 +1007,11 @@ enum hvs_pixel_format {
  #define SCALER_CSC1_COEF_CR_BLU_MASK          VC4_MASK(1, 0)
  #define SCALER_CSC1_COEF_CR_BLU_SHIFT         0
  #define SCALER_CSC1_ITR_R_601_5                       0xe73304a8
@@ -140,7 +140,7 @@ Link: https://lore.kernel.org/r/20211215091739.135042-4-maxime@cerno.tech
  
  /* S2.8 contribution of Cb to Red */
  #define SCALER_CSC2_COEF_CB_RED_MASK          VC4_MASK(29, 20)
-@@ -1010,9 +1016,12 @@ enum hvs_pixel_format {
+@@ -1016,9 +1022,12 @@ enum hvs_pixel_format {
  /* S2.8 contribution of Cb to Blue */
  #define SCALER_CSC2_COEF_CB_BLU_MASK          VC4_MASK(19, 10)
  #define SCALER_CSC2_COEF_CB_BLU_SHIFT         10