-LINUX_VERSION-5.15 = .40
-LINUX_KERNEL_HASH-5.15.40 = c787f7eecbabbfca4dd3224827292a5fb98e3370c6e04b859714fba25bb8c33b
+LINUX_VERSION-5.15 = .41
+LINUX_KERNEL_HASH-5.15.41 = 3c7cb1fc3b029b1b765a33af9608b6f18f734246050640def019ee4c4ad6591e
#include <linux/types.h>
+#include <linux/in6.h>
- u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport);
- u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr,
+ u64 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport);
+ u64 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr,
--- a/include/uapi/linux/in.h
+++ b/include/uapi/linux/in.h
@@ -88,7 +88,7 @@ enum {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1739,7 +1739,7 @@ static irqreturn_t vc4_cec_irq_handler(i
+@@ -1740,7 +1740,7 @@ static irqreturn_t vc4_cec_irq_handler(i
return ret;
}
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
-@@ -1752,38 +1752,53 @@ static int vc4_hdmi_cec_adap_enable(stru
+@@ -1753,38 +1753,53 @@ static int vc4_hdmi_cec_adap_enable(stru
val |= ((4700 / usecs) << VC4_HDMI_CEC_CNT_TO_4700_US_SHIFT) |
((4500 / usecs) << VC4_HDMI_CEC_CNT_TO_4500_US_SHIFT);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1744,8 +1744,14 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1745,8 +1745,14 @@ static int vc4_hdmi_cec_enable(struct ce
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
VC4_HDMI_CEC_CNT_TO_4500_US_MASK);
-@@ -1788,6 +1794,8 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1789,6 +1795,8 @@ static int vc4_hdmi_cec_disable(struct c
HDMI_WRITE(HDMI_CEC_CNTRL_5, HDMI_READ(HDMI_CEC_CNTRL_5) |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -175,8 +175,6 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -176,8 +176,6 @@ vc4_hdmi_connector_detect(struct drm_con
if (vc4_hdmi->hpd_gpio &&
gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio)) {
connected = true;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2377,7 +2377,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2378,7 +2378,7 @@ static const struct vc4_hdmi_variant bcm
.encoder_type = VC4_ENCODER_TYPE_HDMI0,
.debugfs_name = "hdmi0_regs",
.card_name = "vc4-hdmi-0",
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -172,9 +172,9 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -173,9 +173,9 @@ vc4_hdmi_connector_detect(struct drm_con
WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -118,6 +118,10 @@ static int vc4_hdmi_debugfs_regs(struct
+@@ -119,6 +119,10 @@ static int vc4_hdmi_debugfs_regs(struct
static void vc4_hdmi_reset(struct vc4_hdmi *vc4_hdmi)
{
HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_SW_RST);
udelay(1);
HDMI_WRITE(HDMI_M_CTL, 0);
-@@ -129,24 +133,36 @@ static void vc4_hdmi_reset(struct vc4_hd
+@@ -130,24 +134,36 @@ static void vc4_hdmi_reset(struct vc4_hd
VC4_HDMI_SW_RESET_FORMAT_DETECT);
HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
value = HDMI_READ(HDMI_CEC_CNTRL_1);
value &= ~VC4_HDMI_CEC_DIV_CLK_CNT_MASK;
-@@ -154,9 +170,11 @@ static void vc4_hdmi_cec_update_clk_div(
+@@ -155,9 +171,11 @@ static void vc4_hdmi_cec_update_clk_div(
* Set the clock divider: the hsm_clock rate and this divider
* setting will give a 40 kHz CEC clock.
*/
}
#else
static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) {}
-@@ -175,8 +193,16 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -176,8 +194,16 @@ vc4_hdmi_connector_detect(struct drm_con
if (vc4_hdmi->hpd_gpio) {
if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
connected = true;
}
if (connected) {
-@@ -370,9 +396,12 @@ static int vc4_hdmi_stop_packet(struct d
+@@ -371,9 +397,12 @@ static int vc4_hdmi_stop_packet(struct d
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
u32 packet_id = type - 0x80;
if (!poll)
return 0;
-@@ -392,6 +421,7 @@ static void vc4_hdmi_write_infoframe(str
+@@ -393,6 +422,7 @@ static void vc4_hdmi_write_infoframe(str
void __iomem *base = __vc4_hdmi_get_field_base(vc4_hdmi,
ram_packet_start->reg);
uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
ssize_t len, i;
int ret;
-@@ -409,6 +439,8 @@ static void vc4_hdmi_write_infoframe(str
+@@ -410,6 +440,8 @@ static void vc4_hdmi_write_infoframe(str
return;
}
for (i = 0; i < len; i += 7) {
writel(buffer[i + 0] << 0 |
buffer[i + 1] << 8 |
-@@ -426,6 +458,9 @@ static void vc4_hdmi_write_infoframe(str
+@@ -427,6 +459,9 @@ static void vc4_hdmi_write_infoframe(str
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
HDMI_READ(HDMI_RAM_PACKET_CONFIG) | BIT(packet_id));
ret = wait_for((HDMI_READ(HDMI_RAM_PACKET_STATUS) &
BIT(packet_id)), 100);
if (ret)
-@@ -545,6 +580,7 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -546,6 +581,7 @@ static void vc4_hdmi_enable_scrambling(s
{
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
-@@ -555,8 +591,10 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -556,8 +592,10 @@ static void vc4_hdmi_enable_scrambling(s
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true);
drm_scdc_set_scrambling(vc4_hdmi->ddc, true);
queue_delayed_work(system_wq, &vc4_hdmi->scrambling_work,
msecs_to_jiffies(SCRAMBLING_POLLING_DELAY_MS));
-@@ -566,6 +604,7 @@ static void vc4_hdmi_disable_scrambling(
+@@ -567,6 +605,7 @@ static void vc4_hdmi_disable_scrambling(
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_crtc *crtc = encoder->crtc;
/*
* At boot, encoder->crtc will be NULL. Since we don't know the
-@@ -581,8 +620,10 @@ static void vc4_hdmi_disable_scrambling(
+@@ -582,8 +621,10 @@ static void vc4_hdmi_disable_scrambling(
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
cancel_delayed_work_sync(&vc4_hdmi->scrambling_work);
drm_scdc_set_scrambling(vc4_hdmi->ddc, false);
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, false);
-@@ -608,15 +649,23 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -609,15 +650,23 @@ static void vc4_hdmi_encoder_post_crtc_d
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
vc4_hdmi_disable_scrambling(encoder);
}
-@@ -624,10 +673,13 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -625,10 +674,13 @@ static void vc4_hdmi_encoder_post_crtc_p
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_hdmi->variant->phy_disable)
vc4_hdmi->variant->phy_disable(vc4_hdmi);
-@@ -646,8 +698,11 @@ static void vc4_hdmi_encoder_disable(str
+@@ -647,8 +699,11 @@ static void vc4_hdmi_encoder_disable(str
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
{
csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
VC4_HD_CSC_CTL_ORDER);
-@@ -677,14 +732,19 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -678,14 +733,19 @@ static void vc4_hdmi_csc_setup(struct vc
/* The RGB order applies even when CSC is disabled. */
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
if (enable) {
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
-@@ -716,6 +776,8 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -717,6 +777,8 @@ static void vc5_hdmi_csc_setup(struct vc
}
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
}
static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
-@@ -739,6 +801,9 @@ static void vc4_hdmi_set_timings(struct
+@@ -740,6 +802,9 @@ static void vc4_hdmi_set_timings(struct
mode->crtc_vsync_end -
interlaced,
VC4_HDMI_VERTB_VBP));
HDMI_WRITE(HDMI_HORZA,
(vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
-@@ -762,6 +827,8 @@ static void vc4_hdmi_set_timings(struct
+@@ -763,6 +828,8 @@ static void vc4_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
}
static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
-@@ -785,10 +852,13 @@ static void vc5_hdmi_set_timings(struct
+@@ -786,10 +853,13 @@ static void vc5_hdmi_set_timings(struct
mode->crtc_vsync_end -
interlaced,
VC4_HDMI_VERTB_VBP));
HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
HDMI_WRITE(HDMI_HORZA,
(vsync_pos ? VC5_HDMI_HORZA_VPOS : 0) |
-@@ -847,13 +917,18 @@ static void vc5_hdmi_set_timings(struct
+@@ -848,13 +918,18 @@ static void vc5_hdmi_set_timings(struct
HDMI_WRITE(HDMI_GCP_CONFIG, reg);
HDMI_WRITE(HDMI_CLOCK_STOP, 0);
drift = HDMI_READ(HDMI_FIFO_CTL);
drift &= VC4_HDMI_FIFO_VALID_WRITE_MASK;
-@@ -861,12 +936,20 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -862,12 +937,20 @@ static void vc4_hdmi_recenter_fifo(struc
drift & ~VC4_HDMI_FIFO_CTL_RECENTER);
HDMI_WRITE(HDMI_FIFO_CTL,
drift | VC4_HDMI_FIFO_CTL_RECENTER);
ret = wait_for(HDMI_READ(HDMI_FIFO_CTL) &
VC4_HDMI_FIFO_CTL_RECENTER_DONE, 1);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -900,6 +983,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -901,6 +984,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long pixel_rate = vc4_conn_state->pixel_rate;
unsigned long bvb_rate, hsm_rate;
int ret;
/*
-@@ -968,11 +1052,15 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -969,11 +1053,15 @@ static void vc4_hdmi_encoder_pre_crtc_co
if (vc4_hdmi->variant->phy_init)
vc4_hdmi->variant->phy_init(vc4_hdmi, vc4_conn_state);
if (vc4_hdmi->variant->set_timings)
vc4_hdmi->variant->set_timings(vc4_hdmi, conn_state, mode);
-@@ -992,6 +1080,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -993,6 +1081,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_encoder->hdmi_monitor &&
drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
-@@ -1006,7 +1095,9 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1007,7 +1096,9 @@ static void vc4_hdmi_encoder_pre_crtc_en
vc4_encoder->limited_rgb_range = false;
}
}
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
-@@ -1017,8 +1108,11 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1018,8 +1109,11 @@ static void vc4_hdmi_encoder_post_crtc_e
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
HDMI_WRITE(HDMI_VID_CTL,
VC4_HD_VID_CTL_ENABLE |
VC4_HD_VID_CTL_CLRRGB |
-@@ -1035,6 +1129,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1036,6 +1130,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_READ(HDMI_SCHEDULER_CONTROL) |
VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
ret = wait_for(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE, 1000);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -1047,6 +1143,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1048,6 +1144,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_READ(HDMI_SCHEDULER_CONTROL) &
~VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
ret = wait_for(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE), 1000);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -1054,6 +1152,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1055,6 +1153,8 @@ static void vc4_hdmi_encoder_post_crtc_e
}
if (vc4_encoder->hdmi_monitor) {
WARN_ON(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE));
HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
-@@ -1063,6 +1163,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1064,6 +1164,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
VC4_HDMI_RAM_PACKET_ENABLE);
vc4_hdmi_set_infoframes(encoder);
}
-@@ -1186,6 +1288,7 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1187,6 +1289,7 @@ static void vc4_hdmi_audio_set_mai_clock
unsigned int samplerate)
{
u32 hsm_clock = clk_get_rate(vc4_hdmi->audio_clock);
unsigned long n, m;
rational_best_approximation(hsm_clock, samplerate,
-@@ -1195,9 +1298,11 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1196,9 +1299,11 @@ static void vc4_hdmi_audio_set_mai_clock
VC4_HD_MAI_SMP_M_SHIFT) + 1,
&n, &m);
}
static void vc4_hdmi_set_n_cts(struct vc4_hdmi *vc4_hdmi, unsigned int samplerate)
-@@ -1208,6 +1313,8 @@ static void vc4_hdmi_set_n_cts(struct vc
+@@ -1209,6 +1314,8 @@ static void vc4_hdmi_set_n_cts(struct vc
u32 n, cts;
u64 tmp;
n = 128 * samplerate / 1000;
tmp = (u64)(mode->clock * 1000) * n;
do_div(tmp, 128 * samplerate);
-@@ -1237,6 +1344,7 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1238,6 +1345,7 @@ static int vc4_hdmi_audio_startup(struct
{
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
/*
* If the HDMI encoder hasn't probed, or the encoder is
-@@ -1248,12 +1356,14 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1249,12 +1357,14 @@ static int vc4_hdmi_audio_startup(struct
vc4_hdmi->audio.streaming = true;
if (vc4_hdmi->variant->phy_rng_enable)
vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
-@@ -1265,6 +1375,7 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1266,6 +1376,7 @@ static void vc4_hdmi_audio_reset(struct
{
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
struct device *dev = &vc4_hdmi->pdev->dev;
int ret;
vc4_hdmi->audio.streaming = false;
-@@ -1272,20 +1383,29 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1273,20 +1384,29 @@ static void vc4_hdmi_audio_reset(struct
if (ret)
dev_err(dev, "Failed to stop audio infoframe: %d\n", ret);
if (vc4_hdmi->variant->phy_rng_disable)
vc4_hdmi->variant->phy_rng_disable(vc4_hdmi);
-@@ -1340,6 +1460,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1341,6 +1461,7 @@ static int vc4_hdmi_audio_prepare(struct
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
unsigned int sample_rate = params->sample_rate;
unsigned int channels = params->channels;
u32 audio_packet_config, channel_mask;
u32 channel_map;
u32 mai_audio_format;
-@@ -1348,14 +1469,15 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1349,14 +1470,15 @@ static int vc4_hdmi_audio_prepare(struct
dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
sample_rate, params->sample_width, channels);
mai_sample_rate = sample_rate_to_mai_fmt(sample_rate);
if (params->iec.status[0] & IEC958_AES0_NONAUDIO &&
params->channels == 8)
-@@ -1393,8 +1515,11 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1394,8 +1516,11 @@ static int vc4_hdmi_audio_prepare(struct
channel_map = vc4_hdmi->variant->channel_map(vc4_hdmi, channel_mask);
HDMI_WRITE(HDMI_MAI_CHANNEL_MAP, channel_map);
HDMI_WRITE(HDMI_AUDIO_PACKET_CONFIG, audio_packet_config);
memcpy(&vc4_hdmi->audio.infoframe, ¶ms->cea, sizeof(params->cea));
vc4_hdmi_set_audio_infoframe(encoder);
-@@ -1668,6 +1793,8 @@ static void vc4_cec_read_msg(struct vc4_
+@@ -1669,6 +1794,8 @@ static void vc4_cec_read_msg(struct vc4_
struct cec_msg *msg = &vc4_hdmi->cec_rx_msg;
unsigned int i;
msg->len = 1 + ((cntrl1 & VC4_HDMI_CEC_REC_WRD_CNT_MASK) >>
VC4_HDMI_CEC_REC_WRD_CNT_SHIFT);
-@@ -1686,11 +1813,12 @@ static void vc4_cec_read_msg(struct vc4_
+@@ -1687,11 +1814,12 @@ static void vc4_cec_read_msg(struct vc4_
}
}
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
vc4_hdmi->cec_tx_ok = cntrl1 & VC4_HDMI_CEC_TX_STATUS_GOOD;
cntrl1 &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
-@@ -1699,11 +1827,24 @@ static irqreturn_t vc4_cec_irq_handler_t
+@@ -1700,11 +1828,24 @@ static irqreturn_t vc4_cec_irq_handler_t
return IRQ_WAKE_THREAD;
}
vc4_hdmi->cec_rx_msg.len = 0;
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
vc4_cec_read_msg(vc4_hdmi, cntrl1);
-@@ -1716,6 +1857,18 @@ static irqreturn_t vc4_cec_irq_handler_r
+@@ -1717,6 +1858,18 @@ static irqreturn_t vc4_cec_irq_handler_r
return IRQ_WAKE_THREAD;
}
static irqreturn_t vc4_cec_irq_handler(int irq, void *priv)
{
struct vc4_hdmi *vc4_hdmi = priv;
-@@ -1726,14 +1879,17 @@ static irqreturn_t vc4_cec_irq_handler(i
+@@ -1727,14 +1880,17 @@ static irqreturn_t vc4_cec_irq_handler(i
if (!(stat & VC4_HDMI_CPU_CEC))
return IRQ_NONE;
return ret;
}
-@@ -1742,6 +1898,7 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1743,6 +1899,7 @@ static int vc4_hdmi_cec_enable(struct ce
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
u32 val;
int ret;
-@@ -1749,6 +1906,8 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1750,6 +1907,8 @@ static int vc4_hdmi_cec_enable(struct ce
if (ret)
return ret;
val = HDMI_READ(HDMI_CEC_CNTRL_5);
val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
-@@ -1779,12 +1938,17 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1780,12 +1939,17 @@ static int vc4_hdmi_cec_enable(struct ce
if (!vc4_hdmi->variant->external_irq_controller)
HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
if (!vc4_hdmi->variant->external_irq_controller)
HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
-@@ -1792,6 +1956,8 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1793,6 +1957,8 @@ static int vc4_hdmi_cec_disable(struct c
HDMI_WRITE(HDMI_CEC_CNTRL_5, HDMI_READ(HDMI_CEC_CNTRL_5) |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
pm_runtime_put(&vc4_hdmi->pdev->dev);
return 0;
-@@ -1808,10 +1974,14 @@ static int vc4_hdmi_cec_adap_enable(stru
+@@ -1809,10 +1975,14 @@ static int vc4_hdmi_cec_adap_enable(stru
static int vc4_hdmi_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
return 0;
}
-@@ -1820,6 +1990,7 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1821,6 +1991,7 @@ static int vc4_hdmi_cec_adap_transmit(st
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
struct drm_device *dev = vc4_hdmi->connector.dev;
u32 val;
unsigned int i;
-@@ -1828,6 +1999,8 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1829,6 +2000,8 @@ static int vc4_hdmi_cec_adap_transmit(st
return -ENOMEM;
}
for (i = 0; i < msg->len; i += 4)
HDMI_WRITE(HDMI_CEC_TX_DATA_1 + (i >> 2),
(msg->msg[i]) |
-@@ -1843,6 +2016,9 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1844,6 +2017,9 @@ static int vc4_hdmi_cec_adap_transmit(st
val |= VC4_HDMI_CEC_START_XMIT_BEGIN;
HDMI_WRITE(HDMI_CEC_CNTRL_1, val);
return 0;
}
-@@ -1857,6 +2033,7 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1858,6 +2034,7 @@ static int vc4_hdmi_cec_init(struct vc4_
struct cec_connector_info conn_info;
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
u32 value;
int ret;
-@@ -1876,10 +2053,12 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1877,10 +2054,12 @@ static int vc4_hdmi_cec_init(struct vc4_
cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
vc4_hdmi_cec_update_clk_div(vc4_hdmi);
-@@ -1898,7 +2077,9 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1899,7 +2078,9 @@ static int vc4_hdmi_cec_init(struct vc4_
if (ret)
goto err_remove_cec_rx_handler;
} else {
ret = request_threaded_irq(platform_get_irq(pdev, 0),
vc4_cec_irq_handler,
-@@ -2168,6 +2349,7 @@ static int vc4_hdmi_bind(struct device *
+@@ -2169,6 +2350,7 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi = devm_kzalloc(dev, sizeof(*vc4_hdmi), GFP_KERNEL);
if (!vc4_hdmi)
return -ENOMEM;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -188,6 +188,8 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -189,6 +189,8 @@ vc4_hdmi_connector_detect(struct drm_con
struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector);
bool connected = false;
WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
if (vc4_hdmi->hpd_gpio) {
-@@ -218,11 +220,13 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -219,11 +221,13 @@ vc4_hdmi_connector_detect(struct drm_con
vc4_hdmi_enable_scrambling(&vc4_hdmi->encoder.base.base);
pm_runtime_put(&vc4_hdmi->pdev->dev);
return connector_status_disconnected;
}
-@@ -239,10 +243,14 @@ static int vc4_hdmi_connector_get_modes(
+@@ -240,10 +244,14 @@ static int vc4_hdmi_connector_get_modes(
int ret = 0;
struct edid *edid;
vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid);
-@@ -262,6 +270,9 @@ static int vc4_hdmi_connector_get_modes(
+@@ -263,6 +271,9 @@ static int vc4_hdmi_connector_get_modes(
}
}
return ret;
}
-@@ -478,6 +489,8 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -479,6 +490,8 @@ static void vc4_hdmi_set_avi_infoframe(s
union hdmi_infoframe frame;
int ret;
ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
connector, mode);
if (ret < 0) {
-@@ -529,6 +542,8 @@ static void vc4_hdmi_set_hdr_infoframe(s
+@@ -530,6 +543,8 @@ static void vc4_hdmi_set_hdr_infoframe(s
struct drm_connector_state *conn_state = connector->state;
union hdmi_infoframe frame;
if (!vc4_hdmi->variant->supports_hdr)
return;
-@@ -545,6 +560,8 @@ static void vc4_hdmi_set_infoframes(stru
+@@ -546,6 +561,8 @@ static void vc4_hdmi_set_infoframes(stru
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
vc4_hdmi_set_avi_infoframe(encoder);
vc4_hdmi_set_spd_infoframe(encoder);
/*
-@@ -564,6 +581,8 @@ static bool vc4_hdmi_supports_scrambling
+@@ -565,6 +582,8 @@ static bool vc4_hdmi_supports_scrambling
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_display_info *display = &vc4_hdmi->connector.display_info;
if (!vc4_encoder->hdmi_monitor)
return false;
-@@ -582,6 +601,8 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -583,6 +602,8 @@ static void vc4_hdmi_enable_scrambling(s
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long flags;
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
-@@ -651,6 +672,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -652,6 +673,8 @@ static void vc4_hdmi_encoder_post_crtc_d
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, 0);
-@@ -667,6 +690,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -668,6 +691,8 @@ static void vc4_hdmi_encoder_post_crtc_d
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
vc4_hdmi_disable_scrambling(encoder);
}
static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
-@@ -676,6 +701,8 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -677,6 +702,8 @@ static void vc4_hdmi_encoder_post_crtc_p
unsigned long flags;
int ret;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_VID_CTL,
HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX);
-@@ -690,6 +717,8 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -691,6 +718,8 @@ static void vc4_hdmi_encoder_post_crtc_p
ret = pm_runtime_put(&vc4_hdmi->pdev->dev);
if (ret < 0)
DRM_ERROR("Failed to release power domain: %d\n", ret);
}
static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
-@@ -986,6 +1015,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -987,6 +1016,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
unsigned long flags;
int ret;
/*
* As stated in RPi's vc4 firmware "HDMI state machine (HSM) clock must
* be faster than pixel clock, infinitesimally faster, tested in
-@@ -1006,13 +1037,13 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -1007,13 +1038,13 @@ static void vc4_hdmi_encoder_pre_crtc_co
ret = clk_set_min_rate(vc4_hdmi->hsm_clock, hsm_rate);
if (ret) {
DRM_ERROR("Failed to set HSM clock rate: %d\n", ret);
}
ret = clk_set_rate(vc4_hdmi->pixel_clock, pixel_rate);
-@@ -1064,13 +1095,16 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -1065,13 +1096,16 @@ static void vc4_hdmi_encoder_pre_crtc_co
if (vc4_hdmi->variant->set_timings)
vc4_hdmi->variant->set_timings(vc4_hdmi, conn_state, mode);
return;
}
-@@ -1082,6 +1116,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1083,6 +1117,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long flags;
if (vc4_encoder->hdmi_monitor &&
drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
if (vc4_hdmi->variant->csc_setup)
-@@ -1098,6 +1134,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1099,6 +1135,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
-@@ -1111,6 +1149,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1112,6 +1150,8 @@ static void vc4_hdmi_encoder_post_crtc_e
unsigned long flags;
int ret;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_VID_CTL,
-@@ -1170,6 +1210,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1171,6 +1211,8 @@ static void vc4_hdmi_encoder_post_crtc_e
vc4_hdmi_recenter_fifo(vc4_hdmi);
vc4_hdmi_enable_scrambling(encoder);
}
static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
-@@ -1313,6 +1355,7 @@ static void vc4_hdmi_set_n_cts(struct vc
+@@ -1314,6 +1356,7 @@ static void vc4_hdmi_set_n_cts(struct vc
u32 n, cts;
u64 tmp;
lockdep_assert_held(&vc4_hdmi->hw_lock);
n = 128 * samplerate / 1000;
-@@ -1346,13 +1389,17 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1347,13 +1390,17 @@ static int vc4_hdmi_audio_startup(struct
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
unsigned long flags;
vc4_hdmi->audio.streaming = true;
-@@ -1368,6 +1415,8 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1369,6 +1416,8 @@ static int vc4_hdmi_audio_startup(struct
if (vc4_hdmi->variant->phy_rng_enable)
vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
return 0;
}
-@@ -1378,6 +1427,8 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1379,6 +1428,8 @@ static void vc4_hdmi_audio_reset(struct
unsigned long flags;
int ret;
vc4_hdmi->audio.streaming = false;
ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO, false);
if (ret)
-@@ -1397,6 +1448,8 @@ static void vc4_hdmi_audio_shutdown(stru
+@@ -1398,6 +1449,8 @@ static void vc4_hdmi_audio_shutdown(stru
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_MAI_CTL,
-@@ -1411,6 +1464,8 @@ static void vc4_hdmi_audio_shutdown(stru
+@@ -1412,6 +1465,8 @@ static void vc4_hdmi_audio_shutdown(stru
vc4_hdmi->audio.streaming = false;
vc4_hdmi_audio_reset(vc4_hdmi);
}
static int sample_rate_to_mai_fmt(int samplerate)
-@@ -1469,6 +1524,8 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1470,6 +1525,8 @@ static int vc4_hdmi_audio_prepare(struct
dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
sample_rate, params->sample_width, channels);
vc4_hdmi_audio_set_mai_clock(vc4_hdmi, sample_rate);
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
-@@ -1523,6 +1580,8 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1524,6 +1581,8 @@ static int vc4_hdmi_audio_prepare(struct
memcpy(&vc4_hdmi->audio.infoframe, ¶ms->cea, sizeof(params->cea));
vc4_hdmi_set_audio_infoframe(encoder);
return 0;
}
-@@ -1565,7 +1624,9 @@ static int vc4_hdmi_audio_get_eld(struct
+@@ -1566,7 +1625,9 @@ static int vc4_hdmi_audio_get_eld(struct
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_connector *connector = &vc4_hdmi->connector;
return 0;
}
-@@ -1902,6 +1963,17 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1903,6 +1964,17 @@ static int vc4_hdmi_cec_enable(struct ce
u32 val;
int ret;
ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
if (ret)
return ret;
-@@ -1948,6 +2020,17 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1949,6 +2021,17 @@ static int vc4_hdmi_cec_disable(struct c
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
if (!vc4_hdmi->variant->external_irq_controller)
-@@ -1976,6 +2059,17 @@ static int vc4_hdmi_cec_adap_log_addr(st
+@@ -1977,6 +2060,17 @@ static int vc4_hdmi_cec_adap_log_addr(st
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
unsigned long flags;
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_CEC_CNTRL_1,
(HDMI_READ(HDMI_CEC_CNTRL_1) & ~VC4_HDMI_CEC_ADDR_MASK) |
-@@ -1994,6 +2088,17 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1995,6 +2089,17 @@ static int vc4_hdmi_cec_adap_transmit(st
u32 val;
unsigned int i;
if (msg->len > 16) {
drm_err(dev, "Attempting to transmit too much data (%d)\n", msg->len);
return -ENOMEM;
-@@ -2349,6 +2454,7 @@ static int vc4_hdmi_bind(struct device *
+@@ -2350,6 +2455,7 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi = devm_kzalloc(dev, sizeof(*vc4_hdmi), GFP_KERNEL);
if (!vc4_hdmi)
return -ENOMEM;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -484,8 +484,7 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -485,8 +485,7 @@ static void vc4_hdmi_set_avi_infoframe(s
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
struct drm_connector *connector = &vc4_hdmi->connector;
struct drm_connector_state *cstate = connector->state;
union hdmi_infoframe frame;
int ret;
-@@ -597,8 +596,8 @@ static bool vc4_hdmi_supports_scrambling
+@@ -598,8 +597,8 @@ static bool vc4_hdmi_supports_scrambling
static void vc4_hdmi_enable_scrambling(struct drm_encoder *encoder)
{
unsigned long flags;
lockdep_assert_held(&vc4_hdmi->mutex);
-@@ -624,18 +623,21 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -625,18 +624,21 @@ static void vc4_hdmi_enable_scrambling(s
static void vc4_hdmi_disable_scrambling(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
return;
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
-@@ -1008,8 +1010,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -1009,8 +1011,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi_encoder_get_connector_state(encoder, state);
struct vc4_hdmi_connector_state *vc4_conn_state =
conn_state_to_vc4_hdmi_conn_state(conn_state);
unsigned long pixel_rate = vc4_conn_state->pixel_rate;
unsigned long bvb_rate, hsm_rate;
unsigned long flags;
-@@ -1111,9 +1113,9 @@ out:
+@@ -1112,9 +1114,9 @@ out:
static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
unsigned long flags;
mutex_lock(&vc4_hdmi->mutex);
-@@ -1141,8 +1143,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1142,8 +1144,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
-@@ -1218,6 +1220,19 @@ static void vc4_hdmi_encoder_enable(stru
+@@ -1219,6 +1221,19 @@ static void vc4_hdmi_encoder_enable(stru
{
}
#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
-@@ -1296,6 +1311,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
+@@ -1297,6 +1312,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
.atomic_check = vc4_hdmi_encoder_atomic_check,
.mode_valid = vc4_hdmi_encoder_mode_valid,
.disable = vc4_hdmi_encoder_disable,
.enable = vc4_hdmi_encoder_enable,
-@@ -1349,9 +1365,7 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1350,9 +1366,7 @@ static void vc4_hdmi_audio_set_mai_clock
static void vc4_hdmi_set_n_cts(struct vc4_hdmi *vc4_hdmi, unsigned int samplerate)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1397,20 +1397,36 @@ static inline struct vc4_hdmi *dai_to_hd
+@@ -1398,20 +1398,36 @@ static inline struct vc4_hdmi *dai_to_hd
return snd_soc_card_get_drvdata(card);
}
mutex_unlock(&vc4_hdmi->mutex);
return -ENODEV;
}
-@@ -1540,6 +1556,11 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1541,6 +1557,11 @@ static int vc4_hdmi_audio_prepare(struct
mutex_lock(&vc4_hdmi->mutex);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -725,6 +725,11 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -726,6 +726,11 @@ static void vc4_hdmi_encoder_post_crtc_p
static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
{
}
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
-@@ -1218,6 +1223,11 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1219,6 +1224,11 @@ static void vc4_hdmi_encoder_post_crtc_e
static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
{
}
static void vc4_hdmi_encoder_atomic_mode_set(struct drm_encoder *encoder,
-@@ -1399,14 +1409,12 @@ static inline struct vc4_hdmi *dai_to_hd
+@@ -1400,14 +1410,12 @@ static inline struct vc4_hdmi *dai_to_hd
static bool vc4_hdmi_audio_can_stream(struct vc4_hdmi *vc4_hdmi)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -616,6 +616,8 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -617,6 +617,8 @@ static void vc4_hdmi_enable_scrambling(s
VC5_HDMI_SCRAMBLER_CTL_ENABLE);
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
queue_delayed_work(system_wq, &vc4_hdmi->scrambling_work,
msecs_to_jiffies(SCRAMBLING_POLLING_DELAY_MS));
}
-@@ -623,22 +625,14 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -624,22 +626,14 @@ static void vc4_hdmi_enable_scrambling(s
static void vc4_hdmi_disable_scrambling(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
cancel_delayed_work_sync(&vc4_hdmi->scrambling_work);
-@@ -2512,6 +2506,14 @@ static int vc4_hdmi_bind(struct device *
+@@ -2513,6 +2507,14 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi->pdev = pdev;
vc4_hdmi->variant = variant;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1792,10 +1792,11 @@ static void vc4_hdmi_audio_exit(struct v
+@@ -1793,10 +1793,11 @@ static void vc4_hdmi_audio_exit(struct v
static irqreturn_t vc4_hdmi_hpd_irq_thread(int irq, void *priv)
{
struct vc4_hdmi *vc4_hdmi = priv;
/* Disable rate control for now */
bcmgenet_tdma_ring_writel(priv, index, flow_period_val,
TDMA_FLOW_PERIOD);
-@@ -4071,9 +4071,12 @@ static int bcmgenet_probe(struct platfor
+@@ -4075,9 +4075,12 @@ static int bcmgenet_probe(struct platfor
netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1);
/* Set default coalescing parameters */
/* Reinitialize TDMA and RDMA and SW housekeeping */
ret = bcmgenet_init_dma(priv);
-@@ -4200,7 +4208,7 @@ static int bcmgenet_resume(struct device
+@@ -4204,7 +4212,7 @@ static int bcmgenet_resume(struct device
bcmgenet_hfb_create_rxnfc_filter(priv, rule);
/* Disable RX/TX DMA and flush TX queues */
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1692,10 +1692,12 @@ static int vc4_hdmi_audio_init(struct vc
+@@ -1693,10 +1693,12 @@ static int vc4_hdmi_audio_init(struct vc
const __be32 *addr;
int index;
int ret;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -112,6 +112,12 @@ static int vc4_hdmi_debugfs_regs(struct
+@@ -113,6 +113,12 @@ static int vc4_hdmi_debugfs_regs(struct
drm_print_regset32(&p, &vc4_hdmi->hdmi_regset);
drm_print_regset32(&p, &vc4_hdmi->hd_regset);
return 0;
}
-@@ -2361,6 +2367,7 @@ static int vc5_hdmi_init_resources(struc
+@@ -2362,6 +2368,7 @@ static int vc5_hdmi_init_resources(struc
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
struct resource *res;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi");
if (!res)
-@@ -2457,6 +2464,38 @@ static int vc5_hdmi_init_resources(struc
+@@ -2458,6 +2465,38 @@ static int vc5_hdmi_init_resources(struc
return PTR_ERR(vc4_hdmi->reset);
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -398,6 +398,7 @@ static int vc4_hdmi_connector_init(struc
+@@ -399,6 +399,7 @@ static int vc4_hdmi_connector_init(struc
connector->interlace_allowed = 1;
connector->doublescan_allowed = 0;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -436,9 +436,11 @@ static void vc4_hdmi_write_infoframe(str
+@@ -437,9 +437,11 @@ static void vc4_hdmi_write_infoframe(str
const struct vc4_hdmi_register *ram_packet_start =
&vc4_hdmi->variant->registers[HDMI_RAM_PACKET_START];
u32 packet_reg = ram_packet_start->offset + VC4_HDMI_PACKET_STRIDE * packet_id;
unsigned long flags;
ssize_t len, i;
int ret;
-@@ -474,6 +476,13 @@ static void vc4_hdmi_write_infoframe(str
+@@ -475,6 +477,13 @@ static void vc4_hdmi_write_infoframe(str
packet_reg += 4;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1612,10 +1612,10 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1613,10 +1613,10 @@ static int vc4_hdmi_audio_prepare(struct
/* Set the MAI threshold */
HDMI_WRITE(HDMI_MAI_THR,
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1002,30 +1002,15 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -1003,30 +1003,15 @@ static void vc4_hdmi_recenter_fifo(struc
"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
}
} else {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -840,12 +840,12 @@ static void vc4_hdmi_set_timings(struct
+@@ -841,12 +841,12 @@ static void vc4_hdmi_set_timings(struct
VC4_HDMI_VERTA_VFP) |
VC4_SET_FIELD(mode->crtc_vdisplay, VC4_HDMI_VERTA_VAL));
u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
VC4_HDMI_VERTB_VBP));
unsigned long flags;
-@@ -891,12 +891,12 @@ static void vc5_hdmi_set_timings(struct
+@@ -892,12 +892,12 @@ static void vc5_hdmi_set_timings(struct
VC5_HDMI_VERTA_VFP) |
VC4_SET_FIELD(mode->crtc_vdisplay, VC5_HDMI_VERTA_VAL));
u32 vertb = (VC4_SET_FIELD(0, VC5_HDMI_VERTB_VSPO) |
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -78,6 +78,9 @@
+@@ -79,6 +79,9 @@
#define VC5_HDMI_VERTB_VSPO_SHIFT 16
#define VC5_HDMI_VERTB_VSPO_MASK VC4_MASK(29, 16)
#define VC5_HDMI_SCRAMBLER_CTL_ENABLE BIT(0)
#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT 8
-@@ -962,6 +965,11 @@ static void vc5_hdmi_set_timings(struct
+@@ -963,6 +966,11 @@ static void vc5_hdmi_set_timings(struct
reg |= gcp_en ? VC5_HDMI_GCP_CONFIG_GCP_ENABLE : 0;
HDMI_WRITE(HDMI_GCP_CONFIG, reg);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2557,7 +2557,8 @@ static int vc4_hdmi_bind(struct device *
+@@ -2558,7 +2558,8 @@ static int vc4_hdmi_bind(struct device *
* vc4_hdmi_disable_scrambling() will thus run at boot, make
* sure it's disabled, and avoid any inconsistency.
*/
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -205,14 +205,8 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -206,14 +206,8 @@ vc4_hdmi_connector_detect(struct drm_con
if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
connected = true;
} else {
connected = true;
}
-@@ -1354,6 +1348,18 @@ static u32 vc5_hdmi_channel_map(struct v
+@@ -1355,6 +1349,18 @@ static u32 vc5_hdmi_channel_map(struct v
return channel_map;
}
/* HDMI audio codec callbacks */
static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *vc4_hdmi,
unsigned int samplerate)
-@@ -2778,6 +2784,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2779,6 +2785,7 @@ static const struct vc4_hdmi_variant bcm
.phy_rng_disable = vc5_hdmi_phy_rng_disable,
.channel_map = vc5_hdmi_channel_map,
.supports_hdr = true,
};
static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
-@@ -2806,6 +2813,7 @@ static const struct vc4_hdmi_variant bcm
+@@ -2807,6 +2814,7 @@ static const struct vc4_hdmi_variant bcm
.phy_rng_disable = vc5_hdmi_phy_rng_disable,
.channel_map = vc5_hdmi_channel_map,
.supports_hdr = true,
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2194,7 +2194,6 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2195,7 +2195,6 @@ static int vc4_hdmi_cec_init(struct vc4_
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
unsigned long flags;
int ret;
if (!of_find_property(dev->of_node, "interrupts", NULL)) {
-@@ -2213,15 +2212,6 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2214,15 +2213,6 @@ static int vc4_hdmi_cec_init(struct vc4_
cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
if (vc4_hdmi->variant->external_irq_controller) {
ret = request_threaded_irq(platform_get_irq_byname(pdev, "cec-rx"),
vc4_cec_irq_handler_rx_bare,
-@@ -2284,6 +2274,29 @@ static void vc4_hdmi_cec_exit(struct vc4
+@@ -2285,6 +2275,29 @@ static void vc4_hdmi_cec_exit(struct vc4
cec_unregister_adapter(vc4_hdmi->cec_adap);
}
#else
static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
{
-@@ -2292,6 +2305,10 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2293,6 +2306,10 @@ static int vc4_hdmi_cec_init(struct vc4_
static void vc4_hdmi_cec_exit(struct vc4_hdmi *vc4_hdmi) {};
#endif
static int vc4_hdmi_build_regset(struct vc4_hdmi *vc4_hdmi,
-@@ -2526,6 +2543,15 @@ static int vc4_hdmi_runtime_resume(struc
+@@ -2527,6 +2544,15 @@ static int vc4_hdmi_runtime_resume(struc
if (ret)
return ret;
return 0;
}
-@@ -2616,20 +2642,11 @@ static int vc4_hdmi_bind(struct device *
+@@ -2617,20 +2643,11 @@ static int vc4_hdmi_bind(struct device *
if (ret)
goto err_put_ddc;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -210,6 +210,7 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -211,6 +211,7 @@ vc4_hdmi_connector_detect(struct drm_con
connected = true;
}
if (connected) {
if (connector->status != connector_status_connected) {
struct edid *edid = drm_get_edid(connector, vc4_hdmi->ddc);
-@@ -730,15 +731,6 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -731,15 +732,6 @@ static void vc4_hdmi_encoder_post_crtc_p
mutex_unlock(&vc4_hdmi->mutex);
}
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
{
unsigned long flags;
-@@ -1218,15 +1210,6 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1219,15 +1211,6 @@ static void vc4_hdmi_encoder_post_crtc_e
mutex_unlock(&vc4_hdmi->mutex);
}
static void vc4_hdmi_encoder_atomic_mode_set(struct drm_encoder *encoder,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
-@@ -1320,8 +1303,6 @@ static const struct drm_encoder_helper_f
+@@ -1321,8 +1304,6 @@ static const struct drm_encoder_helper_f
.atomic_check = vc4_hdmi_encoder_atomic_check,
.atomic_mode_set = vc4_hdmi_encoder_atomic_mode_set,
.mode_valid = vc4_hdmi_encoder_mode_valid,
};
static u32 vc4_hdmi_channel_map(struct vc4_hdmi *vc4_hdmi, u32 channel_mask)
-@@ -1421,16 +1402,10 @@ static bool vc4_hdmi_audio_can_stream(st
+@@ -1422,16 +1403,10 @@ static bool vc4_hdmi_audio_can_stream(st
lockdep_assert_held(&vc4_hdmi->mutex);
/*
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -2280,7 +2280,7 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -2281,7 +2281,7 @@ static int vc4_hdmi_cec_init(struct vc4_
static void vc4_hdmi_cec_exit(struct vc4_hdmi *vc4_hdmi) {};
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -684,6 +684,7 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -685,6 +685,7 @@ static void vc4_hdmi_encoder_post_crtc_d
mutex_lock(&vc4_hdmi->mutex);
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG, 0);
-@@ -1200,6 +1201,7 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1201,6 +1202,7 @@ static void vc4_hdmi_encoder_post_crtc_e
VC4_HDMI_RAM_PACKET_ENABLE);
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
vc4_hdmi_set_infoframes(encoder);
}
-@@ -1605,7 +1607,8 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1606,7 +1608,8 @@ static int vc4_hdmi_audio_prepare(struct
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
memcpy(&vc4_hdmi->audio.infoframe, ¶ms->cea, sizeof(params->cea));
drm_WARN_ON(encoder->base.dev, crtc_state->limited_color_range &&
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -516,7 +516,7 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -517,7 +517,7 @@ static void vc4_hdmi_set_avi_infoframe(s
vc4_encoder->limited_rgb_range ?
HDMI_QUANTIZATION_RANGE_LIMITED :
HDMI_QUANTIZATION_RANGE_FULL);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -107,6 +107,15 @@ static bool vc4_hdmi_mode_needs_scrambli
+@@ -108,6 +108,15 @@ static bool vc4_hdmi_mode_needs_scrambli
return (mode->clock * 1000) > HDMI_14_MAX_TMDS_CLK;
}
static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
{
struct drm_info_node *node = (struct drm_info_node *)m->private;
-@@ -1115,8 +1124,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1116,8 +1125,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
mutex_lock(&vc4_hdmi->mutex);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -504,7 +504,6 @@ static void vc4_hdmi_write_infoframe(str
+@@ -505,7 +505,6 @@ static void vc4_hdmi_write_infoframe(str
static void vc4_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_connector *connector = &vc4_hdmi->connector;
struct drm_connector_state *cstate = connector->state;
const struct drm_display_mode *mode = &vc4_hdmi->saved_adjusted_mode;
-@@ -522,9 +521,9 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -523,9 +522,9 @@ static void vc4_hdmi_set_avi_infoframe(s
drm_hdmi_avi_infoframe_quant_range(&frame.avi,
connector, mode,
drm_hdmi_avi_infoframe_colorimetry(&frame.avi, cstate);
drm_hdmi_avi_infoframe_bars(&frame.avi, cstate);
-@@ -741,7 +740,8 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -742,7 +741,8 @@ static void vc4_hdmi_encoder_post_crtc_p
mutex_unlock(&vc4_hdmi->mutex);
}
{
unsigned long flags;
u32 csc_ctl;
-@@ -751,7 +751,7 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -752,7 +752,7 @@ static void vc4_hdmi_csc_setup(struct vc
csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
VC4_HD_CSC_CTL_ORDER);
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
* Apply a colorspace conversion to squash 0-255 down
-@@ -781,7 +781,8 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -782,7 +782,8 @@ static void vc4_hdmi_csc_setup(struct vc
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}
{
unsigned long flags;
u32 csc_ctl;
-@@ -790,7 +791,7 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -791,7 +792,7 @@ static void vc5_hdmi_csc_setup(struct vc
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
* Apply a colorspace conversion to squash 0-255 down
-@@ -1119,22 +1120,12 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1120,22 +1121,12 @@ static void vc4_hdmi_encoder_pre_crtc_en
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_display_mode *mode = &vc4_hdmi->saved_adjusted_mode;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -791,6 +791,8 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -792,6 +792,8 @@ static void vc5_hdmi_csc_setup(struct vc
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
if (!vc4_hdmi_is_full_range_rgb(vc4_hdmi, mode)) {
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
-@@ -905,7 +907,6 @@ static void vc5_hdmi_set_timings(struct
+@@ -906,7 +908,6 @@ static void vc5_hdmi_set_timings(struct
spin_lock_irqsave(&vc4_hdmi->hw_lock, flags);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -785,9 +785,8 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -786,9 +786,8 @@ static void vc5_hdmi_csc_setup(struct vc
const struct drm_display_mode *mode)
{
unsigned long flags;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -781,6 +781,52 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -782,6 +782,52 @@ static void vc4_hdmi_csc_setup(struct vc
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}
static void vc5_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi,
const struct drm_display_mode *mode)
{
-@@ -792,35 +838,10 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -793,35 +839,10 @@ static void vc5_hdmi_csc_setup(struct vc
HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -741,6 +741,7 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -742,6 +742,7 @@ static void vc4_hdmi_encoder_post_crtc_p
}
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi,
const struct drm_display_mode *mode)
{
unsigned long flags;
-@@ -828,6 +829,7 @@ static void vc5_hdmi_set_csc_coeffs(stru
+@@ -829,6 +830,7 @@ static void vc5_hdmi_set_csc_coeffs(stru
}
static void vc5_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi,
const struct drm_display_mode *mode)
{
unsigned long flags;
-@@ -1140,13 +1142,16 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1141,13 +1143,16 @@ static void vc4_hdmi_encoder_pre_crtc_en
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1250,6 +1250,19 @@ static void vc4_hdmi_encoder_atomic_mode
+@@ -1251,6 +1251,19 @@ static void vc4_hdmi_encoder_atomic_mode
mutex_unlock(&vc4_hdmi->mutex);
}
#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
-@@ -1294,10 +1307,7 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -1295,10 +1308,7 @@ static int vc4_hdmi_encoder_atomic_check
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
pixel_rate = pixel_rate * 2;
return -EINVAL;
vc4_state->pixel_rate = pixel_rate;
-@@ -1317,13 +1327,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
+@@ -1318,13 +1328,7 @@ vc4_hdmi_encoder_mode_valid(struct drm_e
(mode->hsync_end % 2) || (mode->htotal % 2)))
return MODE_H_ILLEGAL;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1263,6 +1263,35 @@ vc4_hdmi_encoder_clock_valid(const struc
+@@ -1264,6 +1264,35 @@ vc4_hdmi_encoder_clock_valid(const struc
return MODE_OK;
}
#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
-@@ -1275,6 +1304,7 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -1276,6 +1305,7 @@ static int vc4_hdmi_encoder_atomic_check
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long long pixel_rate = mode->clock * 1000;
unsigned long long tmds_rate;
if (vc4_hdmi->variant->unsupported_odd_h_timings &&
!(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
-@@ -1296,21 +1326,10 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -1297,21 +1327,10 @@ static int vc4_hdmi_encoder_atomic_check
pixel_rate = mode->clock * 1000;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1254,12 +1254,18 @@ static enum drm_mode_status
+@@ -1255,12 +1255,18 @@ static enum drm_mode_status
vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
unsigned long long clock)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -102,9 +102,17 @@
+@@ -103,9 +103,17 @@
#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
}
static bool vc4_hdmi_is_full_range_rgb(struct vc4_hdmi *vc4_hdmi,
-@@ -276,7 +284,7 @@ static int vc4_hdmi_connector_get_modes(
+@@ -277,7 +285,7 @@ static int vc4_hdmi_connector_get_modes(
struct drm_display_mode *mode;
list_for_each_entry(mode, &connector->probed_modes, head) {
drm_warn_once(drm, "The core clock cannot reach frequencies high enough to support 4k @ 60Hz.");
drm_warn_once(drm, "Please change your config.txt file to add hdmi_enable_4kp60.");
}
-@@ -627,7 +635,7 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -628,7 +636,7 @@ static void vc4_hdmi_enable_scrambling(s
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
return;
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true);
-@@ -1244,6 +1252,7 @@ static void vc4_hdmi_encoder_atomic_mode
+@@ -1245,6 +1253,7 @@ static void vc4_hdmi_encoder_atomic_mode
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
mutex_lock(&vc4_hdmi->mutex);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -356,6 +356,7 @@ vc4_hdmi_connector_duplicate_state(struc
+@@ -357,6 +357,7 @@ vc4_hdmi_connector_duplicate_state(struc
return NULL;
new_state->pixel_rate = vc4_state->pixel_rate;
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
return &new_state->base;
-@@ -913,6 +914,8 @@ static void vc5_hdmi_set_timings(struct
+@@ -914,6 +915,8 @@ static void vc5_hdmi_set_timings(struct
struct drm_connector_state *state,
struct drm_display_mode *mode)
{
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
bool interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
-@@ -960,7 +963,7 @@ static void vc5_hdmi_set_timings(struct
+@@ -961,7 +964,7 @@ static void vc5_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
case 12:
gcp = 6;
gcp_en = true;
-@@ -1250,9 +1253,11 @@ static void vc4_hdmi_encoder_atomic_mode
+@@ -1251,9 +1254,11 @@ static void vc4_hdmi_encoder_atomic_mode
struct drm_connector_state *conn_state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
memcpy(&vc4_hdmi->saved_adjusted_mode,
&crtc_state->adjusted_mode,
sizeof(vc4_hdmi->saved_adjusted_mode));
-@@ -1307,6 +1312,38 @@ vc4_hdmi_encoder_compute_clock(const str
+@@ -1308,6 +1313,38 @@ vc4_hdmi_encoder_compute_clock(const str
return 0;
}
#define WIFI_2_4GHz_CH1_MIN_FREQ 2400000000ULL
#define WIFI_2_4GHz_CH1_MAX_FREQ 2422000000ULL
-@@ -1341,8 +1378,7 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -1342,8 +1379,7 @@ static int vc4_hdmi_encoder_atomic_check
pixel_rate = mode->clock * 1000;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -102,15 +102,30 @@
+@@ -103,15 +103,30 @@
#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000)
return clock > HDMI_14_MAX_TMDS_CLK;
}
-@@ -284,7 +299,7 @@ static int vc4_hdmi_connector_get_modes(
+@@ -285,7 +300,7 @@ static int vc4_hdmi_connector_get_modes(
struct drm_display_mode *mode;
list_for_each_entry(mode, &connector->probed_modes, head) {
drm_warn_once(drm, "The core clock cannot reach frequencies high enough to support 4k @ 60Hz.");
drm_warn_once(drm, "Please change your config.txt file to add hdmi_enable_4kp60.");
}
-@@ -341,6 +356,7 @@ static void vc4_hdmi_connector_reset(str
+@@ -342,6 +357,7 @@ static void vc4_hdmi_connector_reset(str
new_state->base.max_bpc = 8;
new_state->base.max_requested_bpc = 8;
drm_atomic_helper_connector_tv_reset(connector);
}
-@@ -357,6 +373,7 @@ vc4_hdmi_connector_duplicate_state(struc
+@@ -358,6 +374,7 @@ vc4_hdmi_connector_duplicate_state(struc
new_state->pixel_rate = vc4_state->pixel_rate;
new_state->output_bpc = vc4_state->output_bpc;
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
return &new_state->base;
-@@ -510,11 +527,38 @@ static void vc4_hdmi_write_infoframe(str
+@@ -511,11 +528,38 @@ static void vc4_hdmi_write_infoframe(str
DRM_ERROR("Failed to wait for infoframe to start: %d\n", ret);
}
const struct drm_display_mode *mode = &vc4_hdmi->saved_adjusted_mode;
union hdmi_infoframe frame;
int ret;
-@@ -534,6 +578,7 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -535,6 +579,7 @@ static void vc4_hdmi_set_avi_infoframe(s
HDMI_QUANTIZATION_RANGE_FULL :
HDMI_QUANTIZATION_RANGE_LIMITED);
drm_hdmi_avi_infoframe_colorimetry(&frame.avi, cstate);
drm_hdmi_avi_infoframe_bars(&frame.avi, cstate);
vc4_hdmi_write_infoframe(encoder, &frame);
-@@ -636,7 +681,9 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -637,7 +682,9 @@ static void vc4_hdmi_enable_scrambling(s
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
return;
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true);
-@@ -824,6 +871,38 @@ static const u16 vc5_hdmi_csc_full_rgb_t
+@@ -825,6 +872,38 @@ static const u16 vc5_hdmi_csc_full_rgb_t
{ 0x0000, 0x0000, 0x1b80, 0x0400 },
};
static void vc5_hdmi_set_csc_coeffs(struct vc4_hdmi *vc4_hdmi,
const u16 coeffs[3][4])
{
-@@ -841,19 +920,53 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -842,19 +921,53 @@ static void vc5_hdmi_csc_setup(struct vc
struct drm_connector_state *state,
const struct drm_display_mode *mode)
{
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
-@@ -979,6 +1092,15 @@ static void vc5_hdmi_set_timings(struct
+@@ -980,6 +1093,15 @@ static void vc5_hdmi_set_timings(struct
break;
}
reg = HDMI_READ(HDMI_DEEP_COLOR_CONFIG_1);
reg &= ~(VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_MASK |
VC5_HDMI_DEEP_COLOR_CONFIG_1_COLOR_DEPTH_MASK);
-@@ -1258,12 +1380,97 @@ static void vc4_hdmi_encoder_atomic_mode
+@@ -1259,12 +1381,97 @@ static void vc4_hdmi_encoder_atomic_mode
mutex_lock(&vc4_hdmi->mutex);
vc4_hdmi->output_bpc = vc4_state->output_bpc;
static enum drm_mode_status
vc4_hdmi_encoder_clock_valid(const struct vc4_hdmi *vc4_hdmi,
unsigned long long clock)
-@@ -1285,13 +1492,17 @@ vc4_hdmi_encoder_clock_valid(const struc
+@@ -1286,13 +1493,17 @@ vc4_hdmi_encoder_clock_valid(const struc
static unsigned long long
vc4_hdmi_encoder_compute_mode_clock(const struct drm_display_mode *mode,
return clock * bpc / 8;
}
-@@ -1299,11 +1510,11 @@ static int
+@@ -1300,11 +1511,11 @@ static int
vc4_hdmi_encoder_compute_clock(const struct vc4_hdmi *vc4_hdmi,
struct vc4_hdmi_connector_state *vc4_state,
const struct drm_display_mode *mode,
if (vc4_hdmi_encoder_clock_valid(vc4_hdmi, clock) != MODE_OK)
return -EINVAL;
-@@ -1313,10 +1524,55 @@ vc4_hdmi_encoder_compute_clock(const str
+@@ -1314,10 +1525,55 @@ vc4_hdmi_encoder_compute_clock(const str
}
static int
struct drm_connector_state *conn_state = &vc4_state->base;
unsigned int max_bpc = clamp_t(unsigned int, conn_state->max_bpc, 8, 12);
unsigned int bpc;
-@@ -1325,17 +1581,18 @@ vc4_hdmi_encoder_compute_config(const st
+@@ -1326,17 +1582,18 @@ vc4_hdmi_encoder_compute_config(const st
for (bpc = max_bpc; bpc >= 8; bpc -= 2) {
drm_dbg(dev, "Trying with a %d bpc output\n", bpc);
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -242,7 +242,6 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -243,7 +243,6 @@ vc4_hdmi_connector_detect(struct drm_con
connected = true;
}
if (connected) {
if (connector->status != connector_status_connected) {
struct edid *edid = drm_get_edid(connector, vc4_hdmi->ddc);
-@@ -251,6 +250,8 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -252,6 +251,8 @@ vc4_hdmi_connector_detect(struct drm_con
cec_s_phys_addr_from_edid(vc4_hdmi->cec_adap, edid);
vc4_hdmi->encoder.hdmi_monitor = drm_detect_hdmi_monitor(edid);
kfree(edid);
}
}
-@@ -260,6 +261,8 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -261,6 +262,8 @@ vc4_hdmi_connector_detect(struct drm_con
return connector_status_connected;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1414,9 +1414,6 @@ vc4_hdmi_sink_supports_format_bpc(const
+@@ -1415,9 +1415,6 @@ vc4_hdmi_sink_supports_format_bpc(const
case VC4_HDMI_OUTPUT_RGB:
drm_dbg(dev, "RGB Format, checking the constraints.\n");
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1495,7 +1495,7 @@ vc4_hdmi_encoder_compute_mode_clock(cons
+@@ -1496,7 +1496,7 @@ vc4_hdmi_encoder_compute_mode_clock(cons
unsigned int bpc,
enum vc4_hdmi_output_format fmt)
{
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -56,6 +56,14 @@
+@@ -57,6 +57,14 @@
#include "vc4_hdmi_regs.h"
#include "vc4_regs.h"
#define VC5_HDMI_HORZA_HFP_SHIFT 16
#define VC5_HDMI_HORZA_HFP_MASK VC4_MASK(28, 16)
#define VC5_HDMI_HORZA_VPOS BIT(15)
-@@ -135,6 +143,10 @@ static bool vc4_hdmi_is_full_range_rgb(s
+@@ -136,6 +144,10 @@ static bool vc4_hdmi_is_full_range_rgb(s
{
struct vc4_hdmi_encoder *vc4_encoder = &vc4_hdmi->encoder;
return !vc4_encoder->hdmi_monitor ||
drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_FULL;
}
-@@ -341,6 +353,65 @@ static int vc4_hdmi_connector_atomic_che
+@@ -342,6 +354,65 @@ static int vc4_hdmi_connector_atomic_che
return 0;
}
static void vc4_hdmi_connector_reset(struct drm_connector *connector)
{
struct vc4_hdmi_connector_state *old_state =
-@@ -377,6 +448,7 @@ vc4_hdmi_connector_duplicate_state(struc
+@@ -378,6 +449,7 @@ vc4_hdmi_connector_duplicate_state(struc
new_state->pixel_rate = vc4_state->pixel_rate;
new_state->output_bpc = vc4_state->output_bpc;
new_state->output_format = vc4_state->output_format;
__drm_atomic_helper_connector_duplicate_state(connector, &new_state->base);
return &new_state->base;
-@@ -389,6 +461,8 @@ static const struct drm_connector_funcs
+@@ -390,6 +462,8 @@ static const struct drm_connector_funcs
.reset = vc4_hdmi_connector_reset,
.atomic_duplicate_state = vc4_hdmi_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
static const struct drm_connector_helper_funcs vc4_hdmi_connector_helper_funcs = {
-@@ -396,6 +470,32 @@ static const struct drm_connector_helper
+@@ -397,6 +471,32 @@ static const struct drm_connector_helper
.atomic_check = vc4_hdmi_connector_atomic_check,
};
static int vc4_hdmi_connector_init(struct drm_device *dev,
struct vc4_hdmi *vc4_hdmi)
{
-@@ -439,6 +539,8 @@ static int vc4_hdmi_connector_init(struc
+@@ -440,6 +540,8 @@ static int vc4_hdmi_connector_init(struc
if (vc4_hdmi->variant->supports_hdr)
drm_connector_attach_hdr_output_metadata_property(connector);
drm_connector_attach_encoder(connector, encoder);
return 0;
-@@ -1384,6 +1486,7 @@ static void vc4_hdmi_encoder_atomic_mode
+@@ -1385,6 +1487,7 @@ static void vc4_hdmi_encoder_atomic_mode
mutex_lock(&vc4_hdmi->mutex);
vc4_hdmi->output_bpc = vc4_state->output_bpc;
vc4_hdmi->output_format = vc4_state->output_format;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -138,8 +138,8 @@ static bool vc4_hdmi_mode_needs_scrambli
+@@ -139,8 +139,8 @@ static bool vc4_hdmi_mode_needs_scrambli
return clock > HDMI_14_MAX_TMDS_CLK;
}
{
struct vc4_hdmi_encoder *vc4_encoder = &vc4_hdmi->encoder;
-@@ -679,7 +679,7 @@ static void vc4_hdmi_set_avi_infoframe(s
+@@ -680,7 +680,7 @@ static void vc4_hdmi_set_avi_infoframe(s
drm_hdmi_avi_infoframe_quant_range(&frame.avi,
connector, mode,
HDMI_QUANTIZATION_RANGE_FULL :
HDMI_QUANTIZATION_RANGE_LIMITED);
drm_hdmi_avi_infoframe_colorimetry(&frame.avi, cstate);
-@@ -913,7 +913,7 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -914,7 +914,7 @@ static void vc4_hdmi_csc_setup(struct vc
csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
VC4_HD_CSC_CTL_ORDER);
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
* Apply a colorspace conversion to squash 0-255 down
-@@ -943,7 +943,6 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -944,7 +944,6 @@ static void vc4_hdmi_csc_setup(struct vc
spin_unlock_irqrestore(&vc4_hdmi->hw_lock, flags);
}
/*
* If we need to output Full Range RGB, then use the unity matrix
*
-@@ -951,15 +950,6 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -952,15 +951,6 @@ static void vc4_hdmi_csc_setup(struct vc
* [ 0 1 0 0]
* [ 0 0 1 0]
*
* CEA VICs other than #1 require limited range RGB output unless
* overridden by an AVI infoframe. Apply a colorspace conversion to
* squash 0-255 down to 16-235. The matrix here is:
-@@ -970,42 +960,105 @@ static const u16 vc5_hdmi_csc_full_rgb_u
+@@ -971,42 +961,105 @@ static const u16 vc5_hdmi_csc_full_rgb_u
*
* Matrix is signed 2p13 fixed point, with signed 9p6 offsets
*/
};
static void vc5_hdmi_set_csc_coeffs(struct vc4_hdmi *vc4_hdmi,
-@@ -1021,12 +1074,28 @@ static void vc5_hdmi_set_csc_coeffs(stru
+@@ -1022,12 +1075,28 @@ static void vc5_hdmi_set_csc_coeffs(stru
HDMI_WRITE(HDMI_CSC_34_33, (coeffs[2][3] << 16) | coeffs[2][2]);
}
unsigned long flags;
u32 if_cfg = 0;
u32 if_xbar = 0x543210;
-@@ -1038,31 +1107,56 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -1039,31 +1108,56 @@ static void vc5_hdmi_csc_setup(struct vc
switch (vc4_state->output_format) {
case VC4_HDMI_OUTPUT_YUV444:
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1808,6 +1808,9 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -1809,6 +1809,9 @@ static int vc4_hdmi_encoder_atomic_check
struct vc4_hdmi_connector_state *vc4_state = conn_state_to_vc4_hdmi_conn_state(conn_state);
struct drm_display_mode *mode = &crtc_state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long long pixel_rate = mode->clock * 1000;
unsigned long long tmds_rate;
int ret;
-@@ -1836,6 +1839,11 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -1837,6 +1840,11 @@ static int vc4_hdmi_encoder_atomic_check
if (ret)
return ret;
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -1550,9 +1550,6 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1551,9 +1551,6 @@ static void vc4_hdmi_encoder_post_crtc_e
WARN_ON(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE));
struct vc4_plane {
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -291,6 +291,7 @@ static int vc4_hdmi_connector_get_modes(
+@@ -292,6 +292,7 @@ static int vc4_hdmi_connector_get_modes(
{
struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector);
struct vc4_hdmi_encoder *vc4_encoder = &vc4_hdmi->encoder;
int ret = 0;
struct edid *edid;
-@@ -309,7 +310,7 @@ static int vc4_hdmi_connector_get_modes(
+@@ -310,7 +311,7 @@ static int vc4_hdmi_connector_get_modes(
ret = drm_add_edid_modes(connector, edid);
kfree(edid);
struct drm_device *drm = connector->dev;
struct drm_display_mode *mode;
-@@ -1671,11 +1672,12 @@ vc4_hdmi_encoder_clock_valid(const struc
+@@ -1672,11 +1673,12 @@ vc4_hdmi_encoder_clock_valid(const struc
{
const struct drm_connector *connector = &vc4_hdmi->connector;
const struct drm_display_info *info = &connector->display_info;
return MODE_CLOCK_HIGH;
if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000))
-@@ -3157,14 +3159,6 @@ static int vc4_hdmi_bind(struct device *
+@@ -3158,14 +3160,6 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi->disable_wifi_frequencies =
of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence");
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -333,14 +333,17 @@ static int vc4_hdmi_connector_atomic_che
+@@ -334,14 +334,17 @@ static int vc4_hdmi_connector_atomic_che
{
struct drm_connector_state *old_state =
drm_atomic_get_old_connector_state(state, connector);
tools/bpf/resolve_btfids/Makefile | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
-diff --git a/tools/bpf/resolve_btfids/Makefile b/tools/bpf/resolve_btfids/Makefile
-index af9f9d3534c9..e727058bfe15 100644
--- a/tools/bpf/resolve_btfids/Makefile
+++ b/tools/bpf/resolve_btfids/Makefile
@@ -23,6 +23,8 @@ CC = $(HOSTCC)
OUTPUT ?= $(srctree)/tools/bpf/resolve_btfids/
-@@ -45,9 +47,9 @@ $(SUBCMDOBJ): fixdep FORCE | $(OUTPUT)/libsubcmd
+@@ -45,9 +47,9 @@ $(SUBCMDOBJ): fixdep FORCE | $(OUTPUT)/l
$(Q)$(MAKE) -C $(SUBCMD_SRC) OUTPUT=$(abspath $(dir $@))/ $(abspath $@)
$(BPFOBJ): $(wildcard $(LIBBPF_SRC)/*.[ch] $(LIBBPF_SRC)/Makefile) | $(OUTPUT)/libbpf
-I$(srctree)/tools/include \
-I$(srctree)/tools/include/uapi \
-I$(LIBBPF_SRC) \
---
-2.35.1
-
+++ /dev/null
-From f81d97cb646ab8b90fb181d66fccaf9589990de6 Mon Sep 17 00:00:00 2001
-From: Matthew Hagan <mnhagan88@gmail.com>
-Date: Sat, 30 Apr 2022 11:00:49 +0100
-Subject: [PATCH v2] net: sfp: Add tx-fault workaround for Huawei MA5671A SFP
- ONT
-
-As noted elsewhere, various GPON SFP modules exhibit non-standard
-TX-fault behaviour. In the tested case, the Huawei MA5671A, when used
-in combination with a Marvell mv88e6085 switch, was found to
-persistently assert TX-fault, resulting in the module being disabled.
-
-This patch adds a quirk to ignore the SFP_F_TX_FAULT state, allowing the
-module to function.
-
-Change from v1: removal of erroneous return statment (Andrew Lunn)
-
-Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
----
- drivers/net/phy/sfp.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
---- a/drivers/net/phy/sfp.c
-+++ b/drivers/net/phy/sfp.c
-@@ -250,6 +250,7 @@ struct sfp {
- struct sfp_eeprom_id id;
- unsigned int module_power_mW;
- unsigned int module_t_start_up;
-+ bool tx_fault_ignore;
-
- #if IS_ENABLED(CONFIG_HWMON)
- struct sfp_diag diag;
-@@ -1945,6 +1946,12 @@ static int sfp_sm_mod_probe(struct sfp *
- else
- sfp->module_t_start_up = T_START_UP;
-
-+ if (!memcmp(id.base.vendor_name, "HUAWEI ", 16) &&
-+ !memcmp(id.base.vendor_pn, "MA5671A ", 16))
-+ sfp->tx_fault_ignore = true;
-+ else
-+ sfp->tx_fault_ignore = false;
-+
- return 0;
- }
-
-@@ -2397,7 +2404,10 @@ static void sfp_check_state(struct sfp *
- mutex_lock(&sfp->st_mutex);
- state = sfp_get_state(sfp);
- changed = state ^ sfp->state;
-- changed &= SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT;
-+ if (sfp->tx_fault_ignore)
-+ changed &= SFP_F_PRESENT | SFP_F_LOS;
-+ else
-+ changed &= SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT;
-
- for (i = 0; i < GPIO_MAX; i++)
- if (changed & BIT(i))
/*
* Get the required data from the packet.
*/
-@@ -1151,7 +1154,7 @@ int nf_conntrack_tcp_packet(struct nf_co
+@@ -1160,7 +1163,7 @@ int nf_conntrack_tcp_packet(struct nf_co
IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED &&
timeouts[new_state] > timeouts[TCP_CONNTRACK_UNACK])
timeout = timeouts[TCP_CONNTRACK_UNACK];
timeouts[new_state] > timeouts[TCP_CONNTRACK_RETRANS])
timeout = timeouts[TCP_CONNTRACK_RETRANS];
else
-@@ -1451,6 +1454,9 @@ int nf_conntrack_tcp_packet(struct nf_co
- * If it's non-zero, we mark only out of window RST segments as INVALID.
+@@ -1476,6 +1479,9 @@ void nf_conntrack_tcp_init_net(struct ne
*/
tn->tcp_be_liberal = 0;
-+
+
+ /* Skip Windows Check */
+ tn->tcp_no_window_check = 0;
-
++
/* If it's non-zero, we turn off RST sequence number check */
tn->tcp_ignore_invalid_rst = 0;
+
--- a/net/netfilter/nf_conntrack_standalone.c
+++ b/net/netfilter/nf_conntrack_standalone.c
-@@ -671,6 +671,7 @@ enum nf_ct_sysctl_index {
+@@ -633,6 +633,7 @@ enum nf_ct_sysctl_index {
#endif
NF_SYSCTL_CT_PROTO_TCP_LOOSE,
NF_SYSCTL_CT_PROTO_TCP_LIBERAL,
NF_SYSCTL_CT_PROTO_TCP_IGNORE_INVALID_RST,
NF_SYSCTL_CT_PROTO_TCP_MAX_RETRANS,
NF_SYSCTL_CT_PROTO_TIMEOUT_UDP,
-@@ -800,6 +800,14 @@ static struct ctl_table nf_ct_sysctl_tab
+@@ -849,6 +850,14 @@ static struct ctl_table nf_ct_sysctl_tab
.extra1 = SYSCTL_ZERO,
.extra2 = SYSCTL_ONE,
},
[NF_SYSCTL_CT_PROTO_TCP_IGNORE_INVALID_RST] = {
.procname = "nf_conntrack_tcp_ignore_invalid_rst",
.maxlen = sizeof(u8),
-@@ -900,6 +900,7 @@ static int nf_conntrack_standalone_init_
+@@ -1065,6 +1074,7 @@ static void nf_conntrack_standalone_init
XASSIGN(LOOSE, &tn->tcp_loose);
XASSIGN(LIBERAL, &tn->tcp_be_liberal);
#undef XASSIGN
--- a/include/net/netns/conntrack.h
+++ b/include/net/netns/conntrack.h
-@@ -109,6 +109,7 @@ struct netns_ct {
+@@ -26,6 +26,7 @@ struct nf_tcp_net {
unsigned int timeouts[TCP_CONNTRACK_TIMEOUT_MAX];
u8 tcp_loose;
u8 tcp_be_liberal;
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
-@@ -1633,9 +1633,7 @@ static int advk_pcie_enable_phy(struct a
+@@ -1622,9 +1622,7 @@ static int advk_pcie_enable_phy(struct a
}
ret = phy_power_on(pcie->phy);
}
return 0;
-@@ -1149,7 +1149,7 @@ void phy_state_machine(struct work_struc
+@@ -1154,7 +1154,7 @@ void phy_state_machine(struct work_struc
case PHY_HALTED:
if (phydev->link) {
phydev->link = 0;
}
return 0;
-@@ -1149,7 +1152,10 @@ void phy_state_machine(struct work_struc
+@@ -1154,7 +1157,10 @@ void phy_state_machine(struct work_struc
case PHY_HALTED:
if (phydev->link) {
phydev->link = 0;
projects / openwrt / staging / stintel.git / commitdiff