BUILD_DEVICES:=olimex_a13-olimex-som
endef
+define U-Boot/licheepi_nano
+ BUILD_SUBTARGET:=arm926ejs
+ NAME:=LicheePi Nano
+ BUILD_DEVICES:=licheepi-nano
+endef
+
define U-Boot/Linksprite_pcDuino
BUILD_SUBTARGET:=cortexa8
NAME:=Linksprite pcDuino
UENV:=pangolin
endef
+define U-Boot/popstick
+ BUILD_SUBTARGET:=arm926ejs
+ NAME:=PopStick
+ BUILD_DEVICES:=popstick-v1.1
+endef
+
define U-Boot/libretech_all_h3_cc_h5
BUILD_SUBTARGET:=cortexa53
NAME:=Libre Computer ALL-H3-CC H5
Marsboard_A10 \
Mele_M9 \
OLIMEX_A13_SOM \
+ licheepi_nano \
Linksprite_pcDuino \
Linksprite_pcDuino3 \
Linksprite_pcDuino3_Nano \
orangepi_zero2 \
orangepi_zero3 \
pangolin \
+ popstick \
pine64_plus \
Sinovoip_BPI_M3 \
sopine_baseboard \
--- /dev/null
+From 08d194d881e10e09cba7551da8079734d89ed16d Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <uwu@icenowy.me>
+Date: Thu, 16 Jun 2022 00:28:41 +0800
+Subject: [PATCH 1/2] add USB support and PopStick support
+
+Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
+---
+ arch/arm/dts/Makefile | 3 +-
+ arch/arm/dts/suniv-f1c100s-licheepi-nano.dts | 16 ++++
+ arch/arm/dts/suniv-f1c100s.dtsi | 26 ++++++
+ arch/arm/dts/suniv-f1c200s-popstick.dts | 89 ++++++++++++++++++++
+ drivers/phy/allwinner/phy-sun4i-usb.c | 14 +++
+ drivers/usb/musb-new/sunxi.c | 6 ++
+ 6 files changed, 153 insertions(+), 1 deletion(-)
+ create mode 100644 arch/arm/dts/suniv-f1c200s-popstick.dts
+
+--- a/arch/arm/dts/Makefile
++++ b/arch/arm/dts/Makefile
+@@ -647,7 +647,8 @@ dtb-$(CONFIG_STM32H7) += stm32h743i-disc
+ stm32h750i-art-pi.dtb
+
+ dtb-$(CONFIG_MACH_SUNIV) += \
+- suniv-f1c100s-licheepi-nano.dtb
++ suniv-f1c100s-licheepi-nano.dtb \
++ suniv-f1c200s-popstick.dtb
+ dtb-$(CONFIG_MACH_SUN4I) += \
+ sun4i-a10-a1000.dtb \
+ sun4i-a10-ba10-tvbox.dtb \
+--- /dev/null
++++ b/arch/arm/dts/suniv-f1c200s-popstick.dts
+@@ -0,0 +1,89 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
++ */
++
++/dts-v1/;
++#include "suniv-f1c100s.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++
++/ {
++ model = "Popcorn Computer PopStick";
++ compatible = "sourceparts,popstick", "allwinner,suniv-f1c200s",
++ "allwinner,suniv-f1c100s";
++
++ aliases {
++ mmc0 = &mmc0;
++ serial0 = &uart0;
++ spi0 = &spi0;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ reg_vcc3v3: vcc3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++};
++
++&mmc0 {
++ broken-cd;
++ bus-width = <4>;
++ disable-wp;
++ status = "okay";
++ vmmc-supply = <®_vcc3v3>;
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pc_pins>;
++ status = "okay";
++
++ flash@0 {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ compatible = "spi-nand";
++ reg = <0>;
++ spi-max-frequency = <1000000>;
++
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ partition@0 {
++ label = "u-boot-with-spl";
++ reg = <0x0 0x100000>;
++ };
++
++ ubi@100000 {
++ label = "ubi";
++ reg = <0x100000 0x7f00000>;
++ };
++ };
++ };
++};
++
++&otg_sram {
++ status = "okay";
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pe_pins>;
++ status = "okay";
++};
++
++&usb_otg {
++ dr_mode = "peripheral";
++ status = "okay";
++};
++
++&usbphy {
++ status = "okay";
++};
--- /dev/null
+From 0d263e1071ee3f63d2047a8bb9af4434f1cd4bb1 Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <uwu@icenowy.me>
+Date: Thu, 16 Jun 2022 09:46:42 +0800
+Subject: [PATCH 2/2] HACK for UBI env and add defconfig
+
+---
+ board/sunxi/board.c | 1 +
+ configs/popstick_defconfig | 37 +++++++++++++++++++++++++++++++++++++
+ 2 files changed, 38 insertions(+)
+ create mode 100644 configs/popstick_defconfig
+
+--- a/board/sunxi/board.c
++++ b/board/sunxi/board.c
+@@ -135,6 +135,7 @@ void i2c_init_board(void)
+ */
+ enum env_location env_get_location(enum env_operation op, int prio)
+ {
++ return prio ? ENVL_UNKNOWN : ENVL_UBI;
+ if (prio > 1)
+ return ENVL_UNKNOWN;
+
+--- /dev/null
++++ b/configs/popstick_defconfig
+@@ -0,0 +1,37 @@
++CONFIG_ARM=y
++CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
++CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
++CONFIG_ARCH_SUNXI=y
++CONFIG_ENV_SIZE=0x1f000
++CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c200s-popstick"
++CONFIG_SPL=y
++CONFIG_MACH_SUNIV=y
++CONFIG_DRAM_CLK=156
++CONFIG_DRAM_ZQ=0
++# CONFIG_VIDEO_SUNXI is not set
++CONFIG_SPL_SPI_SUNXI=y
++CONFIG_SPL_SPI_SUNXI_NAND=y
++CONFIG_SPL_SPI_SUNXI_NAND_ASSUMED_PAGESIZE=0x800
++# CONFIG_ANDROID_BOOT_IMAGE is not set
++CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
++CONFIG_CMD_MTD=y
++# CONFIG_CMD_SF is not set
++CONFIG_CMD_MTDPARTS=y
++CONFIG_CMD_UBI=y
++# CONFIG_ENV_IS_IN_FAT is not set
++# CONFIG_ENV_IS_IN_SPI_FLASH is not set
++CONFIG_ENV_IS_IN_UBI=y
++CONFIG_ENV_UBI_PART="ubi"
++CONFIG_ENV_UBI_VOLUME="env"
++# CONFIG_NET is not set
++CONFIG_MTD=y
++CONFIG_DM_MTD=y
++CONFIG_MTD_SPI_NAND=y
++# CONFIG_SPI_FLASH is not set
++CONFIG_SF_DEFAULT_SPEED=25000000
++# CONFIG_UBI_SILENCE_MSG is not set
++CONFIG_PHY_SUN4I_USB=y
++CONFIG_SPI=y
++CONFIG_USB_MUSB_GADGET=y
++CONFIG_USB_FUNCTION_SDP=y
++# CONFIG_UBIFS_SILENCE_MSG is not set
BOARD:=sunxi
BOARDNAME:=Allwinner ARM SoCs
FEATURES:=usb ext4 display rootfs-part rtc squashfs
-SUBTARGETS:=cortexa8 cortexa7 cortexa53
+SUBTARGETS:=cortexa8 cortexa7 cortexa53 arm926ejs
KERNEL_PATCHVER:=6.1
--- /dev/null
+# CONFIG_ARCH_MULTI_V4 is not set
+# CONFIG_ARCH_MULTI_V4T is not set
+CONFIG_ARCH_MULTI_V4_V5=y
+CONFIG_ARCH_MULTI_V5=y
+CONFIG_ARCH_MULTIPLATFORM=y
+CONFIG_ARCH_MULTI_CPU_AUTO=y
+CONFIG_ARCH_NR_GPIO=416
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_HAS_BINFMT_FLAT=y
+CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y
+CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
+CONFIG_COMPAT_32BIT_TIME=y
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
+CONFIG_MACH_SUNIV=y
+# CONFIG_MACH_SUN4I is not set
+# CONFIG_MACH_SUN5I is not set
+# CONFIG_MACH_SUN6I is not set
+# CONFIG_MACH_SUN7I is not set
+# CONFIG_MACH_SUN8I is not set
+# CONFIG_MACH_SUN9I is not set
+CONFIG_MDIO_BUS_MUX=y
+CONFIG_MUSB_PIO_ONLY=y
+# CONFIG_PHY_SUN9I_USB is not set
+# CONFIG_PINCTRL_SUN4I_A10 is not set
+# CONFIG_PINCTRL_SUN50I_A64 is not set
+# CONFIG_PINCTRL_SUN50I_A64_R is not set
+# CONFIG_PINCTRL_SUN50I_H5 is not set
+# CONFIG_PINCTRL_SUN50I_H6 is not set
+# CONFIG_PINCTRL_SUN50I_H6_R is not set
+# CONFIG_PINCTRL_SUN5I is not set
+# CONFIG_PINCTRL_SUN6I_A31 is not set
+# CONFIG_PINCTRL_SUN6I_A31_R is not set
+# CONFIG_PINCTRL_SUN8I_A23 is not set
+# CONFIG_PINCTRL_SUN8I_A23_R is not set
+# CONFIG_PINCTRL_SUN8I_A33 is not set
+# CONFIG_PINCTRL_SUN8I_A83T is not set
+# CONFIG_PINCTRL_SUN8I_A83T_R is not set
+# CONFIG_PINCTRL_SUN8I_H3 is not set
+# CONFIG_PINCTRL_SUN8I_H3_R is not set
+# CONFIG_PINCTRL_SUN8I_V3S is not set
+# CONFIG_PINCTRL_SUN9I_A80 is not set
+# CONFIG_PINCTRL_SUN9I_A80_R is not set
+CONFIG_PINCTRL_SUNIV_F1C100S=y
+CONFIG_PINCTRL_SUNXI=y
+CONFIG_SUNIV_F1C100S_CCU=y
+CONFIG_UNWINDER_ARM=y
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_DUAL_ROLE=y
+CONFIG_USB_MUSB_SUNXI=y
--- /dev/null
+#
+# Copyright (C) 2024 Zoltan HERPAI
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+BOARDNAME:=Allwinner F1C100/200s
+CPU_TYPE:=arm926ej-s
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
-CONFIG_ARCH_MULTI_V6_V7=y
-CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_NR_GPIO=416
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
CONFIG_B53=y
CONFIG_B53_MDIO_DRIVER=y
CONFIG_CRYPTO_BLAKE2S_ARM=y
+CONFIG_ARCH_MULTI_V6_V7=y
+CONFIG_ARCH_MULTI_V7=y
# CONFIG_ARM_LPAE is not set
CONFIG_CRYPTO_BLAKE2S_ARM=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
--- /dev/null
+#
+# Copyright (C) 2013-2024 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+KERNEL_LOADADDR=0x81000000
+
+define Device/licheepi-nano
+ DEVICE_VENDOR := LicheePi
+ DEVICE_MODEL := Nano
+ DEVICE_PACKAGES := kmod-rtc-sunxi
+ SOC := suniv-f1c100s
+endef
+TARGET_DEVICES += licheepi-nano
+
+define Device/popstick-v1.1
+ DEVICE_VENDOR := PopStick
+ DEVICE_MODEL := v1.1
+ DEVICE_PACKAGES := kmod-rtc-sunxi
+ SOC := suniv-f1c200s
+endef
+TARGET_DEVICES += popstick-v1.1
--- /dev/null
+--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
++++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
+@@ -133,6 +133,32 @@
+ #size-cells = <0>;
+ };
+
++ usb_otg: usb@1c13000 {
++ compatible = "allwinner,suniv-f1c100s-musb";
++ reg = <0x01c13000 0x0400>;
++ clocks = <&ccu CLK_BUS_OTG>;
++ resets = <&ccu RST_BUS_OTG>;
++ interrupts = <26>;
++ interrupt-names = "mc";
++ phys = <&usbphy 0>;
++ phy-names = "usb";
++ extcon = <&usbphy 0>;
++ allwinner,sram = <&otg_sram 1>;
++ status = "disabled";
++ };
++
++ usbphy: phy@1c13400 {
++ compatible = "allwinner,suniv-f1c100s-usb-phy";
++ reg = <0x01c13400 0x10>;
++ reg-names = "phy_ctrl";
++ clocks = <&ccu CLK_USB_PHY0>;
++ clock-names = "usb0_phy";
++ resets = <&ccu RST_USB_PHY0>;
++ reset-names = "usb0_reset";
++ #phy-cells = <1>;
++ status = "disabled";
++ };
++
+ ccu: clock@1c20000 {
+ compatible = "allwinner,suniv-f1c100s-ccu";
+ reg = <0x01c20000 0x400>;
--- /dev/null
+From 7452d4799c5b352d6987cff3db8b1e415466586e Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <uwu@icenowy.me>
+Date: Sun, 19 Mar 2023 21:29:35 +0000
+Subject: ARM: dts: suniv: add device tree for PopStick v1.1
+
+PopStick is a minimal Allwinner F1C200s dongle, with its USB controller
+wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and
+an on-board CH340 USB-UART converted connected to F1C200s's UART0.
+
+Add a device tree for it. As F1C200s is just F1C100s with a different
+DRAM chip co-packaged, directly use F1C100s DTSI here.
+
+This commit covers the v1.1 version of this board, which is now shipped.
+v1.0 is some internal sample that have not been shipped at all.
+
+Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts | 81 +++++++++++++++++++++++
+ 1 file changed, 81 insertions(+)
+ create mode 100644 arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts
+
+(limited to 'arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts')
+
+--- /dev/null
++++ b/arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts
+@@ -0,0 +1,81 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright 2022 Icenowy Zheng <uwu@icenowy.me>
++ */
++
++/dts-v1/;
++#include "suniv-f1c100s.dtsi"
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++
++/ {
++ model = "Popcorn Computer PopStick v1.1";
++ compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick",
++ "allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s";
++
++ aliases {
++ serial0 = &uart0;
++ };
++
++ chosen {
++ stdout-path = "serial0:115200n8";
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ led {
++ function = LED_FUNCTION_STATUS;
++ color = <LED_COLOR_ID_GREEN>;
++ gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
++ reg_vcc3v3: regulator-3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "vcc3v3";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ };
++};
++
++&mmc0 {
++ cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */
++ bus-width = <4>;
++ disable-wp;
++ vmmc-supply = <®_vcc3v3>;
++ status = "okay";
++};
++
++&otg_sram {
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pc_pins>;
++ status = "okay";
++
++ flash@0 {
++ compatible = "spi-nand";
++ reg = <0>;
++ spi-max-frequency = <40000000>;
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pe_pins>;
++ status = "okay";
++};
++
++&usb_otg {
++ dr_mode = "peripheral";
++ status = "okay";
++};
++
++&usbphy {
++ status = "okay";
++};
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -1396,7 +1396,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \
+ sun9i-a80-optimus.dtb \
+ sun9i-a80-cubieboard4.dtb
+ dtb-$(CONFIG_MACH_SUNIV) += \
+- suniv-f1c100s-licheepi-nano.dtb
++ suniv-f1c100s-licheepi-nano.dtb \
++ suniv-f1c200s-popstick-v1.1.dtb
+ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
+ tegra20-acer-a500-picasso.dtb \
+ tegra20-asus-tf101.dtb \
--- /dev/null
+From bedc7c5490fce4e57b55e025b4adfbd31f25623d Mon Sep 17 00:00:00 2001
+From: Icenowy Zheng <uwu@icenowy.me>
+Date: Sun, 19 Mar 2023 21:29:32 +0000
+Subject: ARM: dts: suniv: licheepi-nano: enable USB
+
+Lichee Pi Nano has a Micro-USB connector, with its D+, D- pins connected
+to the USB pins of the SoC and ID pin connected to PE2 GPIO.
+
+Enable the USB functionality.
+
+Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
+Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+Link: https://lore.kernel.org/r/20230319212936.26649-3-andre.przywara@arm.com
+Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
+---
+ arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+(limited to 'arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts')
+
+--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
++++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
+@@ -6,6 +6,8 @@
+ /dts-v1/;
+ #include "suniv-f1c100s.dtsi"
+
++#include <dt-bindings/gpio/gpio.h>
++
+ / {
+ model = "Lichee Pi Nano";
+ compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
+@@ -50,8 +52,22 @@
+ };
+ };
+
++&otg_sram {
++ status = "okay";
++};
++
+ &uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pe_pins>;
+ status = "okay";
+ };
++
++&usb_otg {
++ dr_mode = "otg";
++ status = "okay";
++};
++
++&usbphy {
++ usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
++ status = "okay";
++};
--- /dev/null
+Allwinner ARMv5 F1C100s has similar sram controller to sun4i A10
+Add compatible strings for it.
+
+Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
+Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
+---
+ drivers/soc/sunxi/sunxi_sram.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/soc/sunxi/sunxi_sram.c
++++ b/drivers/soc/sunxi/sunxi_sram.c
+@@ -99,6 +99,10 @@ static const struct of_device_id sunxi_s
+ .compatible = "allwinner,sun50i-a64-sram-c",
+ .data = &sun50i_a64_sram_c.data,
+ },
++ {
++ .compatible = "allwinner,suniv-f1c100s-sram-d",
++ .data = &sun4i_a10_sram_d.data,
++ },
+ {}
+ };
+
+@@ -429,6 +433,10 @@ static const struct of_device_id sunxi_s
+ .compatible = "allwinner,sun50i-h616-system-control",
+ .data = &sun50i_h616_sramc_variant,
+ },
++ {
++ .compatible = "allwinner,suniv-f1c100s-system-control",
++ .data = &sun4i_a10_sramc_variant,
++ },
+ { },
+ };
+ MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match);
--- /dev/null
+Allwinner ARMv5 F1C100s has similar watchdog timer to sun6i A31.
+Add compatible string for it.
+
+Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
+---
+ drivers/watchdog/sunxi_wdt.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/watchdog/sunxi_wdt.c
++++ b/drivers/watchdog/sunxi_wdt.c
+@@ -241,6 +241,7 @@ static const struct of_device_id sunxi_w
+ { .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
+ { .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
+ { .compatible = "allwinner,sun20i-d1-wdt", .data = &sun20i_wdt_reg },
++ { .compatible = "allwinner,suniv-f1c100s-wdt", .data = &sun6i_wdt_reg },
+ { /* sentinel */ }
+ };
+ MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
projects / openwrt / staging / wigyori.git / commitdiff