sqlite3: fix arm endian issue 9057/head
authorSebastian Kemper <sebastian_ml@gmx.net>
Thu, 23 May 2019 18:03:00 +0000 (20:03 +0200)
committerSebastian Kemper <sebastian_ml@gmx.net>
Thu, 23 May 2019 18:16:12 +0000 (20:16 +0200)
Forum user portuquesa raised a topic (see [1]) about being unable to use
Asterisk on his armeb xscale device. We narrowed it down to sqlite3.
Asterisk was unable to insert a simple table into its db.

In short, sqlite3 assumes little endian for every ARM device. This
worked OK for 4 Byte bit (unaligned) access. But once upstream (back in
2015) added a function which accesses 2 Bytes (see [2]) this failed for
some (if not all) ARM big endian devices. ARM CPUs are bi-endian for 4
Byte reads but not for 2 Byte reads.

This patch fixes the problem by setting the endianness adequately for
ARM targets, for both 32 bit and 64 bit varieties. The patch was applied
upstream (see [3]).

[1] https://forum.openwrt.org/t/solved-asterisk13-or-15-sqlite3-database-problem/36856
[2] https://github.com/sqlite/sqlite/commit/329428e2088aabb1db2dc6e48108b76551405a8e
[3] https://www.sqlite.org/src/info/b7aad929619f7043

Signed-off-by: Sebastian Kemper <sebastian_ml@gmx.net>
libs/sqlite3/Makefile
libs/sqlite3/patches/01-sqlite-arm-endian.patch [new file with mode: 0644]

index 059efa6f11b03c955b20493fb03b2d2e804d394d..ffa0a68a4a5bedf0d3455d08a4bbf563b53dbbb5 100644 (file)
@@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
 
 PKG_NAME:=sqlite
 PKG_VERSION:=3270200
-PKG_RELEASE:=1
+PKG_RELEASE:=2
 
 PKG_SOURCE:=$(PKG_NAME)-autoconf-$(PKG_VERSION).tar.gz
 PKG_HASH:=50c39e85ea28b5ecfdb3f9e860afe9ba606381e21836b2849efca6a0bfe6ef6e
diff --git a/libs/sqlite3/patches/01-sqlite-arm-endian.patch b/libs/sqlite3/patches/01-sqlite-arm-endian.patch
new file mode 100644 (file)
index 0000000..65fe771
--- /dev/null
@@ -0,0 +1,21 @@
+--- a/sqlite3.c
++++ b/sqlite3.c
+@@ -13920,12 +13920,13 @@ typedef INT16_TYPE LogEst;
+ ** at run-time.
+ */
+ #ifndef SQLITE_BYTEORDER
+-# if defined(i386)     || defined(__i386__)   || defined(_M_IX86) ||    \
+-     defined(__x86_64) || defined(__x86_64__) || defined(_M_X64)  ||    \
+-     defined(_M_AMD64) || defined(_M_ARM)     || defined(__x86)   ||    \
+-     defined(__arm__)  || defined(_M_ARM64)
++# if defined(i386)      || defined(__i386__)      || defined(_M_IX86) ||    \
++     defined(__x86_64)  || defined(__x86_64__)    || defined(_M_X64)  ||    \
++     defined(_M_AMD64)  || defined(_M_ARM)        || defined(__x86)   ||    \
++     defined(__ARMEL__) || defined(__AARCH64EL__) || defined(_M_ARM64)
+ #   define SQLITE_BYTEORDER    1234
+-# elif defined(sparc)    || defined(__ppc__)
++# elif defined(sparc)     || defined(__ppc__) || \
++       defined(__ARMEB__) || defined(__AARCH64EB__)
+ #   define SQLITE_BYTEORDER    4321
+ # else
+ #   define SQLITE_BYTEORDER 0