ramips: dts: rt5350: reset FE and ESW cores together
authorLech Perczak <lech.perczak@gmail.com>
Mon, 11 Dec 2023 23:25:02 +0000 (00:25 +0100)
committerHauke Mehrtens <hauke@hauke-m.de>
Fri, 5 Jan 2024 22:32:59 +0000 (23:32 +0100)
commitee4a042483d28f1c866614ea8e7307d18a74af73
tree6e355115d0c4bc1bbf693b1fd4215cfa61852e04
parent4e1bf2a50c43b48f9e47c7cdff87a0dcfa998bb8
ramips: dts: rt5350: reset FE and ESW cores together

Failing to do so will cause the DMA engine to not initialize properly
and fail to forward packets between them, and in some cases will cause
spurious transmission with size exceeding allowed packet size, causing a
kernel panic.

This is behaviour of downstream driver as well, however I
haven't observed bug reports about this SoC in the wild, so this
commit's purpose is to align this chip with all other SoC's - MT7620
were already using this arrangement.

Fixes: #9284
Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe")
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
(cherry picked from commit fc92fecfc7ddf19bbfd7d1305a29c666f00543af)
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
target/linux/ramips/dts/rt5350.dtsi