ar71xx: enable ddr wb flush on qca955x
authorTomislav Požega <pozega.tomislav@gmail.com>
Tue, 3 Sep 2019 15:10:31 +0000 (17:10 +0200)
committerKoen Vandeputte <koen.vandeputte@ncentric.com>
Wed, 11 Sep 2019 07:47:49 +0000 (09:47 +0200)
commite8350c998bbac54f6d17bf809e30386ef3cf7563
tree2a4b3dbbc59368b6cdd28ba0dce50e5ec5122ffb
parent5b98061bb1ac7e3affadda7b55c6f4ed4eb8268e
ar71xx: enable ddr wb flush on qca955x

Enable flushing of write buffers on qca955x. GPL code has 0x88 reg
defined for PCI flush which is likely an error since the device
freezes on boot. So use DS default value 0xA8 for PCI flush.

Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch [new file with mode: 0644]