X-Git-Url: http://git.openwrt.org/?a=blobdiff_plain;f=target%2Flinux%2Fmediatek%2Ffiles%2Farch%2Farm%2Fboot%2Fdts%2Fmt7623-NAND.dts;h=d9f08d015dab65109289ba877ad80bff217f9807;hb=1f068588efddf0175e954ffc07ec8478bddd52c7;hp=43551f7a074c512c34f7ca16d6643e7900eb401f;hpb=f5f173e2b794bd996fa6171bb6b18f13c4ed1e90;p=openwrt%2Fopenwrt.git

diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
index 43551f7a07..d9f08d015d 100644
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
+++ b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
@@ -18,8 +18,8 @@
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-	model = "MediaTek MT7623 NAND evaluation board";
-	compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
+	model = "MediaTek MT7623 NAND reference board";
+	compatible = "mediatek,mt7623-rfb-nand", "mediatek,mt7623";
 
 	chosen {
 		stdout-path = &uart2;
@@ -280,6 +280,34 @@
 				regulator-enable-ramp-delay = <216>;
 			};
 		};
+
+		mt6323led: leds {
+			compatible = "mediatek,mt6323-led";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			led@0 {
+				reg = <0>;
+				label = "LED0";
+				linux,default-trigger = "timer";
+				default-state = "on";
+			};
+			led@1 {
+				reg = <1>;
+				label = "LED1";
+				default-state = "off";
+			};
+			led@2 {
+				reg = <2>;
+				label = "LED2";
+				default-state = "on";
+			};
+			led@3 {
+				reg = <3>;
+				label = "LED3";
+				default-state = "on";
+			};
+		};
 	};
 };
 
@@ -332,10 +360,9 @@
 				 <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
 				 <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
 				 <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
-				 <MT7623_PIN_273_ESW_INT_FUNC_ESW_INT>,
 				 <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
 		};
-		
+
 		pins_eth_rst {
 			pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
 			output-low;
@@ -360,7 +387,6 @@
 	nand@0 {
 		reg = <0>;
 		spare_per_sector = <64>;
-		nand-on-flash-bbt;
 		nand-ecc-mode = "hw";
 		nand-ecc-strength = <12>;
 		nand-ecc-step-size = <1024>;
@@ -390,7 +416,7 @@
 			};
 
 			partition@4140000 {
-				label = "rootfs";
+				label = "ubi";
 				reg = <0x4140000 0x1000000>;
 			};
 		};
@@ -421,13 +447,21 @@
 &gmac1 {
 	mac-address = [00 11 22 33 44 56];
 	status = "okay";
+
+	phy-mode = "trgmii";
+
+	fixed-link {
+		speed = <1000>;
+		full-duplex;
+		pause;
+	};
 };
 
 &gmac2 {
 	mac-address = [00 11 22 33 44 55];
 	status = "okay";
 
-	phy-mode = "rgmii";
+	phy-mode = "trgmii";
 
 	fixed-link {
 		speed = <1000>;
@@ -436,11 +470,80 @@
 	};
 };
 
-&gsw {
-	pinctrl-names = "default";
-	pinctrl-0 = <&eth_default>;
-	mediatek,reset-pin = <&pio 15 0>;
-	status = "okay";
+&mdio0 {
+	switch@0 {
+		compatible = "mediatek,mt7530";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&eth_default>;
+
+		core-supply = <&mt6323_vpa_reg>;
+		io-supply = <&mt6323_vemc3v3_reg>;
+
+		mediatek,mcm;
+		resets = <&ethsys 2>;
+		reset-names = "mcm";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			port@0 {
+				reg = <0>;
+				label = "lan0";
+				cpu = <&cpu_port0>;
+			};
+
+			port@1 {
+				reg = <1>;
+				label = "lan1";
+				cpu = <&cpu_port0>;
+			};
+
+			port@2 {
+				reg = <2>;
+				label = "lan2";
+				cpu = <&cpu_port0>;
+			};
+
+			port@3 {
+				reg = <3>;
+				label = "lan3";
+				cpu = <&cpu_port0>;
+			};
+
+			port@4 {
+				reg = <4>;
+				label = "wan";
+				cpu = <&cpu_port1>;
+			};
+
+			cpu_port1: port@5 {
+				reg = <5>;
+				label = "cpu";
+				ethernet = <&gmac2>;
+				phy-mode = "trgmii";
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+
+			cpu_port0: port@6 {
+				reg = <6>;
+				label = "cpu";
+				ethernet = <&gmac1>;
+				phy-mode = "trgmii";
+				fixed-link {
+					speed = <1000>;
+					full-duplex;
+				};
+			};
+		};
+	};
 };
 
 &pwm {