ramips: set usb led trigger via devicetree
[openwrt/staging/lynxis.git] / target / linux / ramips / dts / mt7628an.dtsi
index b5edf506f8dfa46932e55bc08371ff4d4f47a4e2..b8a8bb910334cd9ba86b4b69ad2702e772fe4768 100644 (file)
@@ -1,11 +1,15 @@
 / {
        #address-cells = <1>;
        #size-cells = <1>;
-       compatible = "ralink,mtk7628an-soc";
+       compatible = "mediatek,mt7628an-soc";
 
        cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
                cpu@0 {
                        compatible = "mips,mips24KEc";
+                       reg = <0>;
                };
        };
 
@@ -17,7 +21,7 @@
                serial0 = &uartlite;
        };
 
-       cpuintc: cpuintc@0 {
+       cpuintc: cpuintc {
                #address-cells = <0>;
                #interrupt-cells = <1>;
                interrupt-controller;
@@ -37,9 +41,9 @@
                        reg = <0x0 0x100>;
                };
 
-               watchdog: watchdog@120 {
+               watchdog: watchdog@100 {
                        compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
-                       reg = <0x120 0x10>;
+                       reg = <0x100 0x30>;
 
                        resets = <&rstctrl 8>;
                        reset-names = "wdt";
        };
 
        usbphy: usbphy@10120000 {
-               compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
+               compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
                reg = <0x10120000 0x1000>;
                #phy-cells = <0>;
 
        };
 
        ehci: ehci@101c0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
                compatible = "generic-ehci";
                reg = <0x101c0000 0x1000>;
 
 
                interrupt-parent = <&intc>;
                interrupts = <18>;
+
+               ehci_port1: port@1 {
+                       reg = <1>;
+                       #trigger-source-cells = <0>;
+               };
        };
 
        ohci: ohci@101c1000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
                compatible = "generic-ohci";
                reg = <0x101c1000 0x1000>;
 
 
                interrupt-parent = <&intc>;
                interrupts = <18>;
+
+               ohci_port1: port@1 {
+                       reg = <1>;
+                       #trigger-source-cells = <0>;
+               };
        };
 
        ethernet: ethernet@10100000 {
                        0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
                >;
 
-               pcie-bridge {
+               pcie0: pcie@0,0 {
                        reg = <0x0000 0 0 0 0>;
 
                        #address-cells = <3>;
                        #size-cells = <2>;
 
                        device_type = "pci";
+
+                       ranges;
                };
        };