drivers/mmc/host/mtk-sd.c | 51 ++++++++++++++++++++++++++++++-----------------
1 file changed, 33 insertions(+), 18 deletions(-)
-diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
-index ab2fbbbdfda3..bcd83d6f2b86 100644
--- a/drivers/mmc/host/mtk-sd.c
+++ b/drivers/mmc/host/mtk-sd.c
@@ -75,6 +75,7 @@
};
static const struct of_device_id msdc_of_ids[] = {
-@@ -581,6 +587,7 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz)
+@@ -581,6 +587,7 @@ static void msdc_set_mclk(struct msdc_ho
u32 flags;
u32 div;
u32 sclk;
if (!hz) {
dev_dbg(host->dev, "set mclk to 0\n");
-@@ -663,10 +670,10 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz)
+@@ -663,10 +670,10 @@ static void msdc_set_mclk(struct msdc_ho
*/
if (host->sclk <= 52000000) {
writel(host->def_tune_para.iocon, host->base + MSDC_IOCON);
writel(host->saved_tune_para.pad_cmd_tune,
host->base + PAD_CMD_TUNE);
}
-@@ -1224,6 +1231,7 @@ static irqreturn_t msdc_irq(int irq, void *dev_id)
+@@ -1224,6 +1231,7 @@ static irqreturn_t msdc_irq(int irq, voi
static void msdc_init_hw(struct msdc_host *host)
{
u32 val;
/* Configure to MMC/SD mode, clock free running */
sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN);
-@@ -1239,7 +1247,7 @@ static void msdc_init_hw(struct msdc_host *host)
+@@ -1239,7 +1247,7 @@ static void msdc_init_hw(struct msdc_hos
val = readl(host->base + MSDC_INT);
writel(val, host->base + MSDC_INT);
writel(0, host->base + MSDC_IOCON);
sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
writel(0x403c0046, host->base + MSDC_PATCH_BIT);
-@@ -1259,7 +1267,7 @@ static void msdc_init_hw(struct msdc_host *host)
+@@ -1259,7 +1267,7 @@ static void msdc_init_hw(struct msdc_hos
sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);
host->def_tune_para.iocon = readl(host->base + MSDC_IOCON);
dev_dbg(host->dev, "init hardware done!");
}
-@@ -1402,18 +1410,19 @@ static int msdc_tune_response(struct mmc_host *mmc, u32 opcode)
+@@ -1402,18 +1410,19 @@ static int msdc_tune_response(struct mmc
struct msdc_delay_phase internal_delay_phase;
u8 final_delay, final_maxlen;
u32 internal_delay = 0;
MSDC_PAD_TUNE_CMDRDLY, i);
/*
* Using the same parameters, it may sometimes pass the test,
-@@ -1437,7 +1446,7 @@ static int msdc_tune_response(struct mmc_host *mmc, u32 opcode)
+@@ -1437,7 +1446,7 @@ static int msdc_tune_response(struct mmc
sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
for (i = 0; i < PAD_DELAY_MAX; i++) {
MSDC_PAD_TUNE_CMDRDLY, i);
/*
* Using the same parameters, it may sometimes pass the test,
-@@ -1462,12 +1471,12 @@ static int msdc_tune_response(struct mmc_host *mmc, u32 opcode)
+@@ -1462,12 +1471,12 @@ skip_fall:
final_maxlen = final_fall_delay.maxlen;
if (final_maxlen == final_rise_delay.maxlen) {
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
final_fall_delay.final_phase);
final_delay = final_fall_delay.final_phase;
}
-@@ -1475,7 +1484,7 @@ static int msdc_tune_response(struct mmc_host *mmc, u32 opcode)
+@@ -1475,7 +1484,7 @@ skip_fall:
goto skip_internal;
for (i = 0; i < PAD_DELAY_MAX; i++) {
MSDC_PAD_TUNE_CMDRRDLY, i);
mmc_send_tuning(mmc, opcode, &cmd_err);
if (!cmd_err)
-@@ -1483,7 +1492,7 @@ static int msdc_tune_response(struct mmc_host *mmc, u32 opcode)
+@@ -1483,7 +1492,7 @@ skip_fall:
}
dev_dbg(host->dev, "Final internal delay: 0x%x\n", internal_delay);
internal_delay_phase = get_best_delay(host, internal_delay);
internal_delay_phase.final_phase);
skip_internal:
dev_dbg(host->dev, "Final cmd pad delay: %x\n", final_delay);
-@@ -1545,12 +1554,13 @@ static int msdc_tune_data(struct mmc_host *mmc, u32 opcode)
+@@ -1545,12 +1554,13 @@ static int msdc_tune_data(struct mmc_hos
u32 rise_delay = 0, fall_delay = 0;
struct msdc_delay_phase final_rise_delay, final_fall_delay = { 0,};
u8 final_delay, final_maxlen;
MSDC_PAD_TUNE_DATRRDLY, i);
ret = mmc_send_tuning(mmc, opcode, NULL);
if (!ret)
-@@ -1565,7 +1575,7 @@ static int msdc_tune_data(struct mmc_host *mmc, u32 opcode)
+@@ -1565,7 +1575,7 @@ static int msdc_tune_data(struct mmc_hos
sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
for (i = 0; i < PAD_DELAY_MAX; i++) {
MSDC_PAD_TUNE_DATRRDLY, i);
ret = mmc_send_tuning(mmc, opcode, NULL);
if (!ret)
-@@ -1578,14 +1588,14 @@ static int msdc_tune_data(struct mmc_host *mmc, u32 opcode)
+@@ -1578,14 +1588,14 @@ skip_fall:
if (final_maxlen == final_rise_delay.maxlen) {
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
MSDC_PAD_TUNE_DATRRDLY,
final_fall_delay.final_phase);
final_delay = final_fall_delay.final_phase;
-@@ -1599,6 +1609,7 @@ static int msdc_execute_tuning(struct mmc_host *mmc, u32 opcode)
+@@ -1599,6 +1609,7 @@ static int msdc_execute_tuning(struct mm
{
struct msdc_host *host = mmc_priv(mmc);
int ret;
if (host->hs400_mode &&
host->dev_comp->hs400_tune)
-@@ -1616,7 +1627,7 @@ static int msdc_execute_tuning(struct mmc_host *mmc, u32 opcode)
+@@ -1616,7 +1627,7 @@ static int msdc_execute_tuning(struct mm
}
host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON);
host->saved_tune_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
return ret;
}
-@@ -1857,10 +1868,12 @@ static int msdc_drv_remove(struct platform_device *pdev)
+@@ -1857,10 +1868,12 @@ static int msdc_drv_remove(struct platfo
#ifdef CONFIG_PM
static void msdc_save_reg(struct msdc_host *host)
{
host->save_para.patch_bit0 = readl(host->base + MSDC_PATCH_BIT);
host->save_para.patch_bit1 = readl(host->base + MSDC_PATCH_BIT1);
host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
-@@ -1870,10 +1883,12 @@ static void msdc_save_reg(struct msdc_host *host)
+@@ -1870,10 +1883,12 @@ static void msdc_save_reg(struct msdc_ho
static void msdc_restore_reg(struct msdc_host *host)
{
writel(host->save_para.patch_bit0, host->base + MSDC_PATCH_BIT);
writel(host->save_para.patch_bit1, host->base + MSDC_PATCH_BIT1);
writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE);
---
-2.11.0
-
projects / openwrt / staging / lynxis.git / blobdiff