lantiq: enable cpu temp driver for all vr9 boards

[openwrt/staging/lynxis/omap.git] / target / linux / lantiq / dts / vr9.dtsi

diff --git a/target/linux/lantiq/dts/vr9.dtsi b/target/linux/lantiq/dts/vr9.dtsi
index 8f9635807ed1c967e07a5084f94ff97e024fadb2..8a7935ce8be593c5e4daa4ff70745b8b239dd90c 100644 (file)
--- a/target/linux/lantiq/dts/vr9.dtsi
+++ b/target/linux/lantiq/dts/vr9.dtsi
@@ -1,3 +1,6 @@
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
 / {
        #address-cells = <1>;
        #size-cells = <1>;
@@ -13,6 +16,10 @@
                device_type = "memory";
        };
 
+       cputemp@0 {
+               compatible = "lantiq,cputemp";
+       };
+
        biu@1F800000 {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -50,7 +57,7 @@
                        compatible = "lantiq,eiu-xway";
                        reg = <0x101000 0x1000>;
                        interrupt-parent = <&icu0>;
-                       interrupts = <166 135 66 40 41 42>;
+                       lantiq,eiu-irqs = <166 135 66 40 41 42>;
                };
 
                pmu0: pmu@102000 {
@@ -112,6 +119,18 @@
                        status = "disabled";
                };
 
+               spi: spi@E100800 {
+                       compatible = "lantiq,xrx200-spi";
+                       reg = <0xE100800 0x100>;
+                       interrupt-parent = <&icu0>;
+                       interrupts = <22 23 24>;
+                       interrupt-names = "spi_rx", "spi_tx", "spi_err",
+                                       "spi_frm";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       status = "disabled";
+               };
+
                gpio: pinmux@E100B10 {
                        compatible = "lantiq,xrx200-pinctrl";
                        #gpio-cells = <2>;
@@ -158,6 +177,19 @@
                        interrupts = <91>;
                };
 
+               eth0: eth@E108000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "lantiq,xrx200-net";
+                       reg = < 0xE108000 0x3000 /* switch */
+                               0xE10B100 0x70 /* mdio */
+                               0xE10B1D8 0x30 /* mii */
+                               0xE10B308 0x30 /* pmac */
+                       >;
+                       interrupt-parent = <&icu0>;
+                       interrupts = <75 73 72>;
+               };
+
                mei@E116000 {
                        compatible = "lantiq,mei-xrx200";
                        reg = <0xE116000 0x9c>;
@@ -175,6 +207,7 @@
                        interrupt-parent = <&icu0>;
                        interrupts = <161 144>;
                        compatible = "lantiq,pcie-xrx200";
+                       gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
                };
 
                pci0: pci@E105400 {