ipq806x: 6.6: rework kernel patches for new kernel
[openwrt/staging/nbd.git] / target / linux / ipq806x / patches-6.6 / 107-10-ARM-dts-qcom-add-saw-for-l2-cache-and-kraitcc-for.patch
index 0a594b268886db0e4637a3bd839b245eb20c9244..228368b6cd733c3eea5f23fb88cb3f5c5802f802 100644 (file)
@@ -11,11 +11,11 @@ for the secondary mux.
 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
 Tested-by: Jonathan McDowell <noodles@earth.li>
 ---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
  1 file changed, 32 insertions(+), 2 deletions(-)
 
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
 @@ -301,6 +301,12 @@
        };
  
@@ -29,30 +29,7 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
                cxo_board: cxo_board {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
-@@ -575,15 +581,30 @@
-                       clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
-                       clock-names = "pll8_vote", "pxo";
-                       clock-output-names = "acpu_l2_aux";
-+                      #clock-cells = <0>;
-+              };
-+
-+              kraitcc: clock-controller {
-+                      compatible = "qcom,krait-cc-v1";
-+                      clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
-+                               <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
-+                      clock-names = "hfpll0", "hfpll1", "hfpll_l2",
-+                                    "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
-+                                    "qsb", "pxo";
-+                      #clock-cells = <1>;
-               };
-               acc0: clock-controller@2088000 {
-                       compatible = "qcom,kpss-acc-v1";
-                       reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
-+                      clock-output-names = "acpu0_aux";
-+                      clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
-+                      clock-names = "pll8_vote", "pxo";
-+                      #clock-cells = <0>;
+@@ -575,7 +581,7 @@
                };
  
                saw0: regulator@2089000 {
@@ -61,14 +38,7 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
                        reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
                        regulator;
                };
-@@ -591,14 +612,24 @@
-               acc1: clock-controller@2098000 {
-                       compatible = "qcom,kpss-acc-v1";
-                       reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
-+                      clock-output-names = "acpu1_aux";
-+                      clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
-+                      clock-names = "pll8_vote", "pxo";
-+                      #clock-cells = <0>;
+@@ -591,11 +612,27 @@
                };
  
                saw1: regulator@2099000 {
@@ -84,6 +54,16 @@ Tested-by: Jonathan McDowell <noodles@earth.li>
 +                      regulator;
 +              };
 +
-               nss_common: syscon@03000000 {
++              kraitcc: clock-controller {
++                      compatible = "qcom,krait-cc-v1";
++                      clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
++                               <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
++                      clock-names = "hfpll0", "hfpll1", "hfpll_l2",
++                                    "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
++                                    "qsb", "pxo";
++                      #clock-cells = <1>;
++              };
++
+               nss_common: syscon@3000000 {
                        compatible = "syscon";
                        reg = <0x03000000 0x0000FFFF>;