// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "qcom-ipq8064-v2.0.dtsi"
+#include "qcom-ipq8064-v2.0-smb208.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
led-running = &led_dome_blue;
led-upgrade = &led_dome_blue;
mdio-gpio0 = &mdio0;
- ethernet0 = &gmac1;
- ethernet1 = &gmac2;
+ ethernet0 = &gmac2;
+ ethernet1 = &gmac1;
};
leds {
gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
+ wakeup-source;
};
};
};
label = "EEPROM";
reg = <0x1c0000 0x10000>;
read-only;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_eeprom_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ macaddr_eeprom_6: macaddr@6 {
+ reg = <0x6 0x6>;
+ };
+ };
};
partition@1d0000 {
status = "okay";
};
-&nand_controller {
+&nand {
status = "okay";
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
nand-ecc-strength = <4>;
nand-bus-width = <8>;
};
phy-mode = "sgmii";
qcom,id = <1>;
- mtd-mac-address = <&eeprom 0x6>;
+ nvmem-cells = <&macaddr_eeprom_6>;
+ nvmem-cell-names = "mac-address";
};
&gmac2 {
phy-mode = "sgmii";
qcom,id = <2>;
- mtd-mac-address = <&eeprom 0x0>;
+ nvmem-cells = <&macaddr_eeprom_0>;
+ nvmem-cell-names = "mac-address";
};
&pcie0 {