kernel/ipq806x: Restore kernel files for v6.1

[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-r7500.dts

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
index c7d26a0772fc96451a2d7fd9f77f59efb27cddf3..c2703b05d7860b69c8b71659ad943b573c67b0a4 100644 (file)
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
@@ -1,6 +1,7 @@
 #include "qcom-ipq8064-v1.0.dtsi"
 
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
 
 / {
@@ -81,22 +82,26 @@
                };
 
                power_amber: power_amber {
-                       label = "amber:power";
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_AMBER>;
                        gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
                };
 
                wan_white {
-                       label = "white:wan";
+                       function = LED_FUNCTION_WAN;
+                       color = <LED_COLOR_ID_WHITE>;
                        gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
                };
 
                wan_amber {
-                       label = "amber:wan";
+                       function = LED_FUNCTION_WAN;
+                       color = <LED_COLOR_ID_AMBER>;
                        gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
                };
 
                wps {
-                       label = "white:wps";
+                       function = LED_FUNCTION_WPS;
+                       color = <LED_COLOR_ID_WHITE>;
                        gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
                };
 
@@ -106,7 +111,8 @@
                };
 
                power_white: power_white {
-                       label = "white:power";
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_WHITE>;
                        gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
                        default-state = "keep";
                };
@@ -147,13 +153,27 @@
        };
 };
 
+&hs_phy_0 {
+       status = "okay";
+};
+
+&ss_phy_0 {
+       status = "okay";
+};
+
 &usb3_0 {
-       clocks = <&gcc USB30_1_MASTER_CLK>;
+       status = "okay";
+};
+
+&hs_phy_1 {
+       status = "okay";
+};
+
+&ss_phy_1 {
        status = "okay";
 };
 
 &usb3_1 {
-       clocks = <&gcc USB30_0_MASTER_CLK>;
        status = "okay";
 };
 
@@ -166,12 +186,9 @@
        max-link-speed = <1>;
 };
 
-&nand_controller {
+&nand {
        status = "okay";
 
-       pinctrl-0 = <&nand_pins>;
-       pinctrl-names = "default";
-
        nand@0 {
                reg = <0>;
                compatible = "qcom,nandcs";
@@ -181,7 +198,7 @@
                nand-ecc-step-size = <512>;
 
                nand-is-boot-medium;
-               qcom,boot_pages_size = <0x1180000>;
+               qcom,boot-partitions = <0x0 0x1180000>;
 
                partitions {
                        compatible = "fixed-partitions";
@@ -210,6 +227,20 @@
                                label = "art";
                                reg = <0x1200000 0x0140000>;
                                read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_art_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_art_6: macaddr@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+                               };
                        };
 
                        kernel@1340000 {
@@ -243,21 +274,103 @@
        pinctrl-0 = <&mdio0_pins>;
        pinctrl-names = "default";
 
-       phy0: ethernet-phy@0 {
-               reg = <0>;
-               qca,ar8327-initvals = <
-                       0x00004 0x7600000   /* PAD0_MODE */
-                       0x00008 0x1000000   /* PAD5_MODE */
-                       0x0000c 0x80        /* PAD6_MODE */
-                       0x000e4 0x6a545     /* MAC_POWER_SEL */
-                       0x000e0 0xc74164de  /* SGMII_CTRL */
-                       0x0007c 0x4e        /* PORT0_STATUS */
-                       0x00094 0x4e        /* PORT6_STATUS */
-                       >;
-       };
+       switch@10 {
+               compatible = "qca,qca8337";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x10>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               label = "cpu";
+                               ethernet = <&gmac1>;
+                               phy-mode = "rgmii";
+                               tx-internal-delay-ps = <1000>;
+                               rx-internal-delay-ps = <1000>;
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               label = "lan1";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port1>;
+                       };
+
+                       port@2 {
+                               reg = <2>;
+                               label = "lan2";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port2>;
+                       };
 
-       phy4: ethernet-phy@4 {
-               reg = <4>;
+                       port@3 {
+                               reg = <3>;
+                               label = "lan3";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port3>;
+                       };
+
+                       port@4 {
+                               reg = <4>;
+                               label = "lan4";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port4>;
+                       };
+
+                       port@5 {
+                               reg = <5>;
+                               label = "wan";
+                               phy-mode = "internal";
+                               phy-handle = <&phy_port5>;
+                       };
+
+                       port@6 {
+                               reg = <6>;
+                               label = "cpu";
+                               ethernet = <&gmac2>;
+                               phy-mode = "sgmii";
+                               qca,sgmii-enable-pll;
+
+                               fixed-link {
+                                       speed = <1000>;
+                                       full-duplex;
+                               };
+                       };
+               };
+
+               mdio {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       phy_port1: phy@0 {
+                               reg = <0>;
+                       };
+
+                       phy_port2: phy@1 {
+                               reg = <1>;
+                       };
+
+                       phy_port3: phy@2 {
+                               reg = <2>;
+                       };
+
+                       phy_port4: phy@3 {
+                               reg = <3>;
+                       };
+
+                       phy_port5: phy@4 {
+                               reg = <4>;
+                       };
+               };
        };
 };
 
@@ -300,17 +413,3 @@
 &adm_dma {
        status = "okay";
 };
-
-&art {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_art_0: macaddr@0 {
-               reg = <0x0 0x6>;
-       };
-
-       macaddr_art_6: macaddr@6 {
-               reg = <0x6 0x6>;
-       };
-};