aliases {
pflash = &pflash;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ spi0 = &lsspi;
};
cpus {
cpu@1 {
compatible = "brcm,bmips4350", "mips,mips4Kc";
device_type = "cpu";
- reg = <0>;
+ reg = <1>;
};
};
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
ext_intc0: interrupt-controller@10000018 {
compatible = "brcm,bcm6345-ext-intc";
interrupt-controller;
#interrupt-cells = <2>;
- interrupt-parent = <&periph_intc>;
interrupts = <20>, <21>, <22>, <23>;
};
interrupt-controller;
#interrupt-cells = <2>;
- interrupt-parent = <&periph_intc>;
interrupts = <24>, <25>;
};
periph_intc: interrupt-controller@10000020 {
- compatible = "brcm,bcm6345-l2-intc";
+ compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x10>,
<0x10000030 0x10>;
interrupt-parent = <&cpu_intc>;
interrupts = <2>, <3>;
};
+
+ gpio1: gpio-controller@10000080 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000080 4>, <0x10000088 4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ngpios = <6>;
+
+ interrupts-extended = <&ext_intc1 0 0>,
+ <&ext_intc1 1 0>,
+ <&ext_intc0 0 0>,
+ <&ext_intc0 1 0>,
+ <&ext_intc0 2 0>,
+ <&ext_intc0 3 0>;
+ interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3",
+ "gpio4", "gpio5";
+ };
+
+ gpio0: gpio-controller@10000084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000084 4>, <0x1000008c 4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ lsspi: spi@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
};
pflash: nor@18000000 {