brcm63xx: register SPI controllers through DT

[openwrt/openwrt.git] / target / linux / brcm63xx / dts / bcm6348.dtsi

diff --git a/target/linux/brcm63xx/dts/bcm6348.dtsi b/target/linux/brcm63xx/dts/bcm6348.dtsi
index c83931389be950aaee7f901ae9f5dc43bc96e478..47c06d0ce075bdc08a71451bd91f93dec9d6eb67 100644 (file)
--- a/target/linux/brcm63xx/dts/bcm6348.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6348.dtsi
@@ -5,14 +5,30 @@
 
        aliases {
                pflash = &pflash;
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
+               spi0 = &lsspi;
        };
 
        cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
                cpu@0 {
                        compatible = "brcm,bmips3300", "mips,mips4Kc";
+                       device_type = "cpu";
+                       reg = <0>;
                };
        };
 
+       cpu_intc: interrupt-controller {
+               #address-cells = <0>;
+               compatible = "mti,cpu-interrupt-controller";
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+       };
+
        memory { device_type = "memory"; reg = <0 0>; };
 
        pflash: nor@1fc00000 {
@@ -28,6 +44,64 @@
        ubus@fff00000 {
                #address-cells = <1>;
                #size-cells = <1>;
+               ranges;
                compatible = "simple-bus";
+               interrupt-parent = <&periph_intc>;
+
+               periph_intc: interrupt-controller@fffe000c {
+                       compatible = "brcm,bcm6345-l1-intc";
+                       reg = <0xfffe000c 0x8>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+
+                       interrupt-parent = <&cpu_intc>;
+                       interrupts = <2>;
+               };
+
+               ext_intc: interrupt-controller@fffe0014 {
+                       compatible = "brcm,bcm6345-ext-intc";
+                       reg = <0xfffe0014 0x4>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&cpu_intc>;
+                       interrupts = <3>, <4>, <5>, <6>;
+
+                       brcm,field-width = <5>;
+               };
+
+               gpio1: gpio-controller@fffe0400 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0xfffe0400 4>, <0xfffe0408 4>;
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       ngpios = <5>;
+
+                       interrupt-parent = <&ext_intc>;
+                       interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+                       interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3";
+               };
+
+               gpio0: gpio-controller@fffe0404 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0xfffe0404 4>, <0xfffe040c 4>;
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
+               lsspi: spi@fffe0c00 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm6348-spi";
+                       reg = <0xfffe0c00 0x40>;
+                       interrupts = <1>;
+                       /* clocks = <&clkctl 9>; */
+
+               };
        };
 };