pflash = &pflash;
gpio0 = &gpio0;
gpio1 = &gpio1;
+ spi0 = &lsspi;
};
cpus {
#size-cells = <1>;
ranges;
compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
periph_intc: interrupt-controller@fffe000c {
- compatible = "brcm,bcm6345-periph-intc";
+ compatible = "brcm,bcm6345-l1-intc";
reg = <0xfffe000c 0x8>;
interrupt-controller;
};
ext_intc: interrupt-controller@fffe0014 {
- compatible = "brcm,bcm6348-ext-intc";
+ compatible = "brcm,bcm6345-ext-intc";
reg = <0xfffe0014 0x4>;
interrupt-controller;
#gpio-cells = <2>;
ngpios = <5>;
+
+ interrupt-parent = <&ext_intc>;
+ interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+ interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3";
};
gpio0: gpio-controller@fffe0404 {
gpio-controller;
#gpio-cells = <2>;
};
+
+ lsspi: spi@fffe0c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6348-spi";
+ reg = <0xfffe0c00 0x40>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+
+ };
};
};