--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -119,6 +119,10 @@ static int vc4_hdmi_debugfs_regs(struct
+@@ -122,6 +122,10 @@ static int vc4_hdmi_debugfs_regs(struct
static void vc4_hdmi_reset(struct vc4_hdmi *vc4_hdmi)
{
HDMI_WRITE(HDMI_M_CTL, VC4_HD_M_SW_RST);
udelay(1);
HDMI_WRITE(HDMI_M_CTL, 0);
-@@ -130,24 +134,36 @@ static void vc4_hdmi_reset(struct vc4_hd
+@@ -133,24 +137,36 @@ static void vc4_hdmi_reset(struct vc4_hd
VC4_HDMI_SW_RESET_FORMAT_DETECT);
HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
value = HDMI_READ(HDMI_CEC_CNTRL_1);
value &= ~VC4_HDMI_CEC_DIV_CLK_CNT_MASK;
-@@ -155,9 +171,11 @@ static void vc4_hdmi_cec_update_clk_div(
+@@ -158,9 +174,11 @@ static void vc4_hdmi_cec_update_clk_div(
* Set the clock divider: the hsm_clock rate and this divider
* setting will give a 40 kHz CEC clock.
*/
}
#else
static void vc4_hdmi_cec_update_clk_div(struct vc4_hdmi *vc4_hdmi) {}
-@@ -176,8 +194,16 @@ vc4_hdmi_connector_detect(struct drm_con
+@@ -179,8 +197,16 @@ vc4_hdmi_connector_detect(struct drm_con
if (vc4_hdmi->hpd_gpio) {
if (gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio))
connected = true;
}
if (connected) {
-@@ -371,9 +397,12 @@ static int vc4_hdmi_stop_packet(struct d
+@@ -374,9 +400,12 @@ static int vc4_hdmi_stop_packet(struct d
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
u32 packet_id = type - 0x80;
if (!poll)
return 0;
-@@ -393,6 +422,7 @@ static void vc4_hdmi_write_infoframe(str
+@@ -396,6 +425,7 @@ static void vc4_hdmi_write_infoframe(str
void __iomem *base = __vc4_hdmi_get_field_base(vc4_hdmi,
ram_packet_start->reg);
uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
ssize_t len, i;
int ret;
-@@ -410,6 +440,8 @@ static void vc4_hdmi_write_infoframe(str
+@@ -413,6 +443,8 @@ static void vc4_hdmi_write_infoframe(str
return;
}
for (i = 0; i < len; i += 7) {
writel(buffer[i + 0] << 0 |
buffer[i + 1] << 8 |
-@@ -427,6 +459,9 @@ static void vc4_hdmi_write_infoframe(str
+@@ -430,6 +462,9 @@ static void vc4_hdmi_write_infoframe(str
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
HDMI_READ(HDMI_RAM_PACKET_CONFIG) | BIT(packet_id));
ret = wait_for((HDMI_READ(HDMI_RAM_PACKET_STATUS) &
BIT(packet_id)), 100);
if (ret)
-@@ -546,6 +581,7 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -549,6 +584,7 @@ static void vc4_hdmi_enable_scrambling(s
{
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (!vc4_hdmi_supports_scrambling(encoder, mode))
return;
-@@ -556,8 +592,10 @@ static void vc4_hdmi_enable_scrambling(s
+@@ -559,8 +595,10 @@ static void vc4_hdmi_enable_scrambling(s
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, true);
drm_scdc_set_scrambling(vc4_hdmi->ddc, true);
queue_delayed_work(system_wq, &vc4_hdmi->scrambling_work,
msecs_to_jiffies(SCRAMBLING_POLLING_DELAY_MS));
-@@ -567,6 +605,7 @@ static void vc4_hdmi_disable_scrambling(
+@@ -570,6 +608,7 @@ static void vc4_hdmi_disable_scrambling(
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
struct drm_crtc *crtc = encoder->crtc;
/*
* At boot, encoder->crtc will be NULL. Since we don't know the
-@@ -582,8 +621,10 @@ static void vc4_hdmi_disable_scrambling(
+@@ -585,8 +624,10 @@ static void vc4_hdmi_disable_scrambling(
if (delayed_work_pending(&vc4_hdmi->scrambling_work))
cancel_delayed_work_sync(&vc4_hdmi->scrambling_work);
drm_scdc_set_scrambling(vc4_hdmi->ddc, false);
drm_scdc_set_high_tmds_clock_ratio(vc4_hdmi->ddc, false);
-@@ -609,15 +650,23 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -612,15 +653,23 @@ static void vc4_hdmi_encoder_post_crtc_d
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
vc4_hdmi_disable_scrambling(encoder);
}
-@@ -625,10 +674,13 @@ static void vc4_hdmi_encoder_post_crtc_p
+@@ -628,10 +677,13 @@ static void vc4_hdmi_encoder_post_crtc_p
struct drm_atomic_state *state)
{
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_hdmi->variant->phy_disable)
vc4_hdmi->variant->phy_disable(vc4_hdmi);
-@@ -647,8 +699,11 @@ static void vc4_hdmi_encoder_disable(str
+@@ -650,8 +702,11 @@ static void vc4_hdmi_encoder_disable(str
static void vc4_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, bool enable)
{
csc_ctl = VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
VC4_HD_CSC_CTL_ORDER);
-@@ -678,14 +733,19 @@ static void vc4_hdmi_csc_setup(struct vc
+@@ -681,14 +736,19 @@ static void vc4_hdmi_csc_setup(struct vc
/* The RGB order applies even when CSC is disabled. */
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
if (enable) {
/* CEA VICs other than #1 requre limited range RGB
* output unless overridden by an AVI infoframe.
-@@ -717,6 +777,8 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -720,6 +780,8 @@ static void vc5_hdmi_csc_setup(struct vc
}
HDMI_WRITE(HDMI_CSC_CTL, csc_ctl);
}
static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
-@@ -740,6 +802,9 @@ static void vc4_hdmi_set_timings(struct
- mode->crtc_vsync_end -
- interlaced,
+@@ -743,6 +805,9 @@ static void vc4_hdmi_set_timings(struct
+ VC4_SET_FIELD(mode->crtc_vtotal -
+ mode->crtc_vsync_end,
VC4_HDMI_VERTB_VBP));
+ unsigned long flags;
+
HDMI_WRITE(HDMI_HORZA,
(vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
-@@ -763,6 +828,8 @@ static void vc4_hdmi_set_timings(struct
+@@ -766,6 +831,8 @@ static void vc4_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
}
static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
-@@ -786,10 +853,13 @@ static void vc5_hdmi_set_timings(struct
- mode->crtc_vsync_end -
- interlaced,
+@@ -789,10 +856,13 @@ static void vc5_hdmi_set_timings(struct
+ VC4_SET_FIELD(mode->crtc_vtotal -
+ mode->crtc_vsync_end - interlaced,
VC4_HDMI_VERTB_VBP));
+ unsigned long flags;
unsigned char gcp;
HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
HDMI_WRITE(HDMI_HORZA,
(vsync_pos ? VC5_HDMI_HORZA_VPOS : 0) |
-@@ -848,13 +918,18 @@ static void vc5_hdmi_set_timings(struct
- HDMI_WRITE(HDMI_GCP_CONFIG, reg);
+@@ -856,13 +926,18 @@ static void vc5_hdmi_set_timings(struct
+ HDMI_WRITE(HDMI_MISC_CONTROL, reg);
HDMI_WRITE(HDMI_CLOCK_STOP, 0);
+
drift = HDMI_READ(HDMI_FIFO_CTL);
drift &= VC4_HDMI_FIFO_VALID_WRITE_MASK;
-@@ -862,12 +937,20 @@ static void vc4_hdmi_recenter_fifo(struc
+@@ -870,12 +945,20 @@ static void vc4_hdmi_recenter_fifo(struc
drift & ~VC4_HDMI_FIFO_CTL_RECENTER);
HDMI_WRITE(HDMI_FIFO_CTL,
drift | VC4_HDMI_FIFO_CTL_RECENTER);
ret = wait_for(HDMI_READ(HDMI_FIFO_CTL) &
VC4_HDMI_FIFO_CTL_RECENTER_DONE, 1);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -901,6 +984,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -909,6 +992,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
unsigned long pixel_rate = vc4_conn_state->pixel_rate;
unsigned long bvb_rate, hsm_rate;
int ret;
/*
-@@ -969,11 +1053,15 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -977,11 +1061,15 @@ static void vc4_hdmi_encoder_pre_crtc_co
if (vc4_hdmi->variant->phy_init)
vc4_hdmi->variant->phy_init(vc4_hdmi, vc4_conn_state);
if (vc4_hdmi->variant->set_timings)
vc4_hdmi->variant->set_timings(vc4_hdmi, conn_state, mode);
-@@ -993,6 +1081,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1001,6 +1089,7 @@ static void vc4_hdmi_encoder_pre_crtc_en
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
if (vc4_encoder->hdmi_monitor &&
drm_default_rgb_quant_range(mode) == HDMI_QUANTIZATION_RANGE_LIMITED) {
-@@ -1007,7 +1096,9 @@ static void vc4_hdmi_encoder_pre_crtc_en
+@@ -1015,7 +1104,9 @@ static void vc4_hdmi_encoder_pre_crtc_en
vc4_encoder->limited_rgb_range = false;
}
}
static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
-@@ -1018,8 +1109,11 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1026,8 +1117,11 @@ static void vc4_hdmi_encoder_post_crtc_e
struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
HDMI_WRITE(HDMI_VID_CTL,
VC4_HD_VID_CTL_ENABLE |
VC4_HD_VID_CTL_CLRRGB |
-@@ -1036,6 +1130,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1044,6 +1138,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_READ(HDMI_SCHEDULER_CONTROL) |
VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
ret = wait_for(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE, 1000);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -1048,6 +1144,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1056,6 +1152,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_READ(HDMI_SCHEDULER_CONTROL) &
~VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
ret = wait_for(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE), 1000);
WARN_ONCE(ret, "Timeout waiting for "
-@@ -1055,6 +1153,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1063,6 +1161,8 @@ static void vc4_hdmi_encoder_post_crtc_e
}
if (vc4_encoder->hdmi_monitor) {
WARN_ON(!(HDMI_READ(HDMI_SCHEDULER_CONTROL) &
VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE));
HDMI_WRITE(HDMI_SCHEDULER_CONTROL,
-@@ -1064,6 +1164,8 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -1072,6 +1172,8 @@ static void vc4_hdmi_encoder_post_crtc_e
HDMI_WRITE(HDMI_RAM_PACKET_CONFIG,
VC4_HDMI_RAM_PACKET_ENABLE);
vc4_hdmi_set_infoframes(encoder);
}
-@@ -1187,6 +1289,7 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1195,6 +1297,7 @@ static void vc4_hdmi_audio_set_mai_clock
unsigned int samplerate)
{
u32 hsm_clock = clk_get_rate(vc4_hdmi->audio_clock);
unsigned long n, m;
rational_best_approximation(hsm_clock, samplerate,
-@@ -1196,9 +1299,11 @@ static void vc4_hdmi_audio_set_mai_clock
+@@ -1204,9 +1307,11 @@ static void vc4_hdmi_audio_set_mai_clock
VC4_HD_MAI_SMP_M_SHIFT) + 1,
&n, &m);
}
static void vc4_hdmi_set_n_cts(struct vc4_hdmi *vc4_hdmi, unsigned int samplerate)
-@@ -1209,6 +1314,8 @@ static void vc4_hdmi_set_n_cts(struct vc
+@@ -1217,6 +1322,8 @@ static void vc4_hdmi_set_n_cts(struct vc
u32 n, cts;
u64 tmp;
n = 128 * samplerate / 1000;
tmp = (u64)(mode->clock * 1000) * n;
do_div(tmp, 128 * samplerate);
-@@ -1238,6 +1345,7 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1246,6 +1353,7 @@ static int vc4_hdmi_audio_startup(struct
{
struct vc4_hdmi *vc4_hdmi = dev_get_drvdata(dev);
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
/*
* If the HDMI encoder hasn't probed, or the encoder is
-@@ -1249,12 +1357,14 @@ static int vc4_hdmi_audio_startup(struct
+@@ -1257,12 +1365,14 @@ static int vc4_hdmi_audio_startup(struct
vc4_hdmi->audio.streaming = true;
if (vc4_hdmi->variant->phy_rng_enable)
vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
-@@ -1266,6 +1376,7 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1274,6 +1384,7 @@ static void vc4_hdmi_audio_reset(struct
{
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
struct device *dev = &vc4_hdmi->pdev->dev;
int ret;
vc4_hdmi->audio.streaming = false;
-@@ -1273,20 +1384,29 @@ static void vc4_hdmi_audio_reset(struct
+@@ -1281,20 +1392,29 @@ static void vc4_hdmi_audio_reset(struct
if (ret)
dev_err(dev, "Failed to stop audio infoframe: %d\n", ret);
if (vc4_hdmi->variant->phy_rng_disable)
vc4_hdmi->variant->phy_rng_disable(vc4_hdmi);
-@@ -1341,6 +1461,7 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1349,6 +1469,7 @@ static int vc4_hdmi_audio_prepare(struct
struct drm_encoder *encoder = &vc4_hdmi->encoder.base.base;
unsigned int sample_rate = params->sample_rate;
unsigned int channels = params->channels;
u32 audio_packet_config, channel_mask;
u32 channel_map;
u32 mai_audio_format;
-@@ -1349,14 +1470,15 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1357,14 +1478,15 @@ static int vc4_hdmi_audio_prepare(struct
dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
sample_rate, params->sample_width, channels);
mai_sample_rate = sample_rate_to_mai_fmt(sample_rate);
if (params->iec.status[0] & IEC958_AES0_NONAUDIO &&
params->channels == 8)
-@@ -1394,8 +1516,11 @@ static int vc4_hdmi_audio_prepare(struct
+@@ -1402,8 +1524,11 @@ static int vc4_hdmi_audio_prepare(struct
channel_map = vc4_hdmi->variant->channel_map(vc4_hdmi, channel_mask);
HDMI_WRITE(HDMI_MAI_CHANNEL_MAP, channel_map);
HDMI_WRITE(HDMI_AUDIO_PACKET_CONFIG, audio_packet_config);
memcpy(&vc4_hdmi->audio.infoframe, ¶ms->cea, sizeof(params->cea));
vc4_hdmi_set_audio_infoframe(encoder);
-@@ -1669,6 +1794,8 @@ static void vc4_cec_read_msg(struct vc4_
+@@ -1677,6 +1802,8 @@ static void vc4_cec_read_msg(struct vc4_
struct cec_msg *msg = &vc4_hdmi->cec_rx_msg;
unsigned int i;
msg->len = 1 + ((cntrl1 & VC4_HDMI_CEC_REC_WRD_CNT_MASK) >>
VC4_HDMI_CEC_REC_WRD_CNT_SHIFT);
-@@ -1687,11 +1814,12 @@ static void vc4_cec_read_msg(struct vc4_
+@@ -1695,11 +1822,12 @@ static void vc4_cec_read_msg(struct vc4_
}
}
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
vc4_hdmi->cec_tx_ok = cntrl1 & VC4_HDMI_CEC_TX_STATUS_GOOD;
cntrl1 &= ~VC4_HDMI_CEC_START_XMIT_BEGIN;
-@@ -1700,11 +1828,24 @@ static irqreturn_t vc4_cec_irq_handler_t
+@@ -1708,11 +1836,24 @@ static irqreturn_t vc4_cec_irq_handler_t
return IRQ_WAKE_THREAD;
}
vc4_hdmi->cec_rx_msg.len = 0;
cntrl1 = HDMI_READ(HDMI_CEC_CNTRL_1);
vc4_cec_read_msg(vc4_hdmi, cntrl1);
-@@ -1717,6 +1858,18 @@ static irqreturn_t vc4_cec_irq_handler_r
+@@ -1725,6 +1866,18 @@ static irqreturn_t vc4_cec_irq_handler_r
return IRQ_WAKE_THREAD;
}
static irqreturn_t vc4_cec_irq_handler(int irq, void *priv)
{
struct vc4_hdmi *vc4_hdmi = priv;
-@@ -1727,14 +1880,17 @@ static irqreturn_t vc4_cec_irq_handler(i
+@@ -1735,14 +1888,17 @@ static irqreturn_t vc4_cec_irq_handler(i
if (!(stat & VC4_HDMI_CPU_CEC))
return IRQ_NONE;
return ret;
}
-@@ -1743,6 +1899,7 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1751,6 +1907,7 @@ static int vc4_hdmi_cec_enable(struct ce
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
/* clock period in microseconds */
const u32 usecs = 1000000 / CEC_CLOCK_FREQ;
u32 val;
int ret;
-@@ -1750,6 +1907,8 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1758,6 +1915,8 @@ static int vc4_hdmi_cec_enable(struct ce
if (ret)
return ret;
val = HDMI_READ(HDMI_CEC_CNTRL_5);
val &= ~(VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET |
VC4_HDMI_CEC_CNT_TO_4700_US_MASK |
-@@ -1780,12 +1939,17 @@ static int vc4_hdmi_cec_enable(struct ce
+@@ -1788,12 +1947,17 @@ static int vc4_hdmi_cec_enable(struct ce
if (!vc4_hdmi->variant->external_irq_controller)
HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
if (!vc4_hdmi->variant->external_irq_controller)
HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
-@@ -1793,6 +1957,8 @@ static int vc4_hdmi_cec_disable(struct c
+@@ -1801,6 +1965,8 @@ static int vc4_hdmi_cec_disable(struct c
HDMI_WRITE(HDMI_CEC_CNTRL_5, HDMI_READ(HDMI_CEC_CNTRL_5) |
VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
pm_runtime_put(&vc4_hdmi->pdev->dev);
return 0;
-@@ -1809,10 +1975,14 @@ static int vc4_hdmi_cec_adap_enable(stru
+@@ -1817,10 +1983,14 @@ static int vc4_hdmi_cec_adap_enable(stru
static int vc4_hdmi_cec_adap_log_addr(struct cec_adapter *adap, u8 log_addr)
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
return 0;
}
-@@ -1821,6 +1991,7 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1829,6 +1999,7 @@ static int vc4_hdmi_cec_adap_transmit(st
{
struct vc4_hdmi *vc4_hdmi = cec_get_drvdata(adap);
struct drm_device *dev = vc4_hdmi->connector.dev;
u32 val;
unsigned int i;
-@@ -1829,6 +2000,8 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1837,6 +2008,8 @@ static int vc4_hdmi_cec_adap_transmit(st
return -ENOMEM;
}
for (i = 0; i < msg->len; i += 4)
HDMI_WRITE(HDMI_CEC_TX_DATA_1 + (i >> 2),
(msg->msg[i]) |
-@@ -1844,6 +2017,9 @@ static int vc4_hdmi_cec_adap_transmit(st
+@@ -1852,6 +2025,9 @@ static int vc4_hdmi_cec_adap_transmit(st
val |= VC4_HDMI_CEC_START_XMIT_BEGIN;
HDMI_WRITE(HDMI_CEC_CNTRL_1, val);
return 0;
}
-@@ -1858,6 +2034,7 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1866,6 +2042,7 @@ static int vc4_hdmi_cec_init(struct vc4_
struct cec_connector_info conn_info;
struct platform_device *pdev = vc4_hdmi->pdev;
struct device *dev = &pdev->dev;
u32 value;
int ret;
-@@ -1877,10 +2054,12 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1885,10 +2062,12 @@ static int vc4_hdmi_cec_init(struct vc4_
cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
vc4_hdmi_cec_update_clk_div(vc4_hdmi);
-@@ -1899,7 +2078,9 @@ static int vc4_hdmi_cec_init(struct vc4_
+@@ -1907,7 +2086,9 @@ static int vc4_hdmi_cec_init(struct vc4_
if (ret)
goto err_remove_cec_rx_handler;
} else {
ret = request_threaded_irq(platform_get_irq(pdev, 0),
vc4_cec_irq_handler,
-@@ -2169,6 +2350,7 @@ static int vc4_hdmi_bind(struct device *
+@@ -2177,6 +2358,7 @@ static int vc4_hdmi_bind(struct device *
vc4_hdmi = devm_kzalloc(dev, sizeof(*vc4_hdmi), GFP_KERNEL);
if (!vc4_hdmi)
return -ENOMEM;
}
--- a/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_hdmi_regs.h
-@@ -442,6 +442,8 @@ static inline void vc4_hdmi_write(struct
+@@ -445,6 +445,8 @@ static inline void vc4_hdmi_write(struct
const struct vc4_hdmi_variant *variant = hdmi->variant;
void __iomem *base;
projects / openwrt / staging / nbd.git / blobdiff