# define VC4_HD_M_SW_RST BIT(2)
# define VC4_HD_M_ENABLE BIT(0)
-@@ -228,6 +239,8 @@ static void vc4_hdmi_connector_reset(str
+@@ -229,6 +240,8 @@ static void vc4_hdmi_connector_reset(str
if (!new_state)
return;
drm_atomic_helper_connector_tv_reset(connector);
}
-@@ -274,12 +287,20 @@ static int vc4_hdmi_connector_init(struc
+@@ -275,12 +288,20 @@ static int vc4_hdmi_connector_init(struc
vc4_hdmi->ddc);
drm_connector_helper_add(connector, &vc4_hdmi_connector_helper_funcs);
connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
DRM_CONNECTOR_POLL_DISCONNECT);
-@@ -554,6 +575,7 @@ static void vc5_hdmi_csc_setup(struct vc
+@@ -555,6 +576,7 @@ static void vc5_hdmi_csc_setup(struct vc
}
static void vc4_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi,
struct drm_display_mode *mode)
{
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
-@@ -597,7 +619,9 @@ static void vc4_hdmi_set_timings(struct
+@@ -598,7 +620,9 @@ static void vc4_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
}
struct drm_display_mode *mode)
{
bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
-@@ -617,6 +641,9 @@ static void vc5_hdmi_set_timings(struct
+@@ -618,6 +642,9 @@ static void vc5_hdmi_set_timings(struct
mode->crtc_vsync_end -
interlaced,
VC4_HDMI_VERTB_VBP));
HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021);
HDMI_WRITE(HDMI_HORZA,
-@@ -642,6 +669,39 @@ static void vc5_hdmi_set_timings(struct
+@@ -643,6 +670,39 @@ static void vc5_hdmi_set_timings(struct
HDMI_WRITE(HDMI_VERTB0, vertb_even);
HDMI_WRITE(HDMI_VERTB1, vertb);
HDMI_WRITE(HDMI_CLOCK_STOP, 0);
}
-@@ -769,7 +829,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -770,7 +830,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS);
if (vc4_hdmi->variant->set_timings)
}
static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder,
-@@ -890,6 +950,14 @@ static int vc4_hdmi_encoder_atomic_check
+@@ -891,6 +951,14 @@ static int vc4_hdmi_encoder_atomic_check
pixel_rate = mode->clock * 1000;
}