ath79: enable UART in SoC DTSI files

[openwrt/staging/jow.git] / target / linux / ath79 / dts / qca9531_glinet_gl-x750.dts

diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts b/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts
index f32cb6e39a06a26522ce57a13d8cf2a3ae83bbfb..c755e00033b0ef0ba8600354de82c16664a15328 100644 (file)
--- a/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts
+++ b/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts
@@ -59,10 +59,6 @@
        status = "okay";
 };
 
-&uart {
-       status = "okay";
-};
-
 &usb0 {
        #address-cells = <1>;
        #size-cells = <0>;