ar71xx: remove AP81 reference design board support
[openwrt/openwrt.git] / target / linux / ar71xx / patches-4.4 / 620-MIPS-ath79-add-support-for-QCA953x-SoC.patch
index 6fd6dafd47740953782bb0db0f694fd54abea47c..27d47dc9fbd884afdc00c1c9a7ecac084807d8a4 100644 (file)
@@ -22,7 +22,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
 
 --- a/arch/mips/ath79/Kconfig
 +++ b/arch/mips/ath79/Kconfig
-@@ -117,6 +117,10 @@ config SOC_AR934X
+@@ -116,6 +116,10 @@ config SOC_AR934X
        select PCI_AR724X if PCI
        def_bool n
  
@@ -33,7 +33,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
  config SOC_QCA955X
        select HW_HAS_PCI
        select PCI_AR724X if PCI
-@@ -156,7 +160,7 @@ config ATH79_DEV_USB
+@@ -155,7 +159,7 @@ config ATH79_DEV_USB
        def_bool n
  
  config ATH79_DEV_WMAC
@@ -335,10 +335,10 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
 +      status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS);
 +
 +      if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) {
-+              ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_PCIE);
++              ath79_ddr_wb_flush(3);
 +              generic_handle_irq(ATH79_IP2_IRQ(0));
 +      } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) {
-+              ath79_ddr_wb_flush(QCA953X_DDR_REG_FLUSH_WMAC);
++              ath79_ddr_wb_flush(4);
 +              generic_handle_irq(ATH79_IP2_IRQ(1));
 +      } else {
 +              spurious_interrupt();