/*
* ADM5120 HCD (Host Controller Driver) for USB
*
- * Copyright (C) 2007,2008 Gabor Juhos <juhosg at openwrt.org>
+ * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
*
* This file was derived from: drivers/usb/host/ohci-hcd.c
* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
#include <linux/list.h>
#include <linux/usb.h>
#include <linux/usb/otg.h>
+#include <linux/usb/hcd.h>
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
-#include <linux/reboot.h>
#include <linux/debugfs.h>
+#include <linux/io.h>
-#include <asm/io.h>
#include <asm/irq.h>
-#include <asm/system.h>
#include <asm/unaligned.h>
#include <asm/byteorder.h>
-#include "../core/hcd.h"
-#include "../core/hub.h"
-
-#define DRIVER_VERSION "0.25.0"
-#define DRIVER_AUTHOR "Gabor Juhos <juhosg at openwrt.org>"
+#define DRIVER_VERSION "0.27.0"
+#define DRIVER_AUTHOR "Gabor Juhos <juhosg@openwrt.org>"
#define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver"
/*-------------------------------------------------------------------------*/
#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
#define ADMHC_INTR_INIT \
- ( ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
- | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI )
+ (ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
+ | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI)
/*-------------------------------------------------------------------------*/
-static const char hcd_name [] = "admhc-hcd";
+static const char hcd_name[] = "admhc-hcd";
#define STATECHANGE_DELAY msecs_to_jiffies(300)
td_cnt = 2;
/* FALLTHROUGH */
case PIPE_BULK:
- /* one TD for every 4096 Bytes (can be upto 8K) */
+ /* one TD for every 4096 Bytes (can be up to 8K) */
td_cnt += urb->transfer_buffer_length / TD_DATALEN_MAX;
/* ... and for any remaining bytes ... */
if ((urb->transfer_buffer_length % TD_DATALEN_MAX) != 0)
else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
&& (urb->transfer_buffer_length
% usb_maxpacket(urb->dev, pipe,
- usb_pipeout (pipe))) == 0)
+ usb_pipeout(pipe))) == 0)
td_cnt++;
break;
case PIPE_INTERRUPT:
spin_lock_irqsave(&ahcd->lock, flags);
/* don't submit to a dead HC */
- if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
+ if (!HCD_HW_ACCESSIBLE(hcd)) {
ret = -ENODEV;
goto fail;
}
goto rescan;
case ED_IDLE: /* fully unlinked */
if (list_empty(&ed->td_list)) {
- td_free (ahcd, ed->dummy);
- ed_free (ahcd, ed);
+ td_free(ahcd, ed->dummy);
+ ed_free(ahcd, ed);
break;
}
/* else FALL THROUGH */
ep->hcpriv = NULL;
spin_unlock_irqrestore(&ahcd->lock, flags);
- return;
}
static int admhc_get_frame_number(struct usb_hcd *hcd)
#else
/* FIXME */
ahcd->host_control = ADMHC_BUSS_RESET;
- admhc_writel(ahcd, ahcd->host_control ,&ahcd->regs->host_control);
+ admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
#endif
}
*/
static int admhc_run(struct admhcd *ahcd)
{
- u32 temp;
+ u32 val;
int first = ahcd->fminterval == 0;
struct usb_hcd *hcd = admhcd_to_hcd(ahcd);
/* boot firmware should have set this up (5.1.1.3.1) */
if (first) {
- temp = admhc_readl(ahcd, &ahcd->regs->fminterval);
- ahcd->fminterval = temp & ADMHC_SFI_FI_MASK;
+ val = admhc_readl(ahcd, &ahcd->regs->fminterval);
+ ahcd->fminterval = val & ADMHC_SFI_FI_MASK;
if (ahcd->fminterval != FI)
admhc_dbg(ahcd, "fminterval delta %d\n",
ahcd->fminterval - FI);
}
#if 0 /* TODO: not applicable */
- /* Reset USB nearly "by the book". RemoteWakeupConnected was
- * saved if boot firmware (BIOS/SMM/...) told us it's connected,
- * or if bus glue did the same (e.g. for PCI add-in cards with
- * PCI PM support).
+ /* Reset USB nearly "by the book". RemoteWakeupConnected has
+ * to be checked in case boot firmware (BIOS/SMM/...) has set up
+ * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
+ * If the bus glue detected wakeup capability then it should
+ * already be enabled; if so we'll just enable it again.
*/
- if ((ahcd->hc_control & OHCI_CTRL_RWC) != 0
- && !device_may_wakeup(hcd->self.controller))
- device_init_wakeup(hcd->self.controller, 1);
+ if ((ahcd->hc_control & OHCI_CTRL_RWC) != 0)
+ device_set_wakeup_capable(hcd->self.controller, 1);
#endif
switch (ahcd->host_control & ADMHC_HC_BUSS) {
case ADMHC_BUSS_OPER:
- temp = 0;
+ val = 0;
break;
case ADMHC_BUSS_SUSPEND:
/* FALLTHROUGH ? */
case ADMHC_BUSS_RESUME:
ahcd->host_control = ADMHC_BUSS_RESUME;
- temp = 10 /* msec wait */;
+ val = 10 /* msec wait */;
break;
/* case ADMHC_BUSS_RESET: */
default:
ahcd->host_control = ADMHC_BUSS_RESET;
- temp = 50 /* msec wait */;
+ val = 50 /* msec wait */;
break;
}
admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
/* flush the writes */
admhc_writel_flush(ahcd);
- msleep(temp);
- temp = admhc_read_rhdesc(ahcd);
- if (!(temp & ADMHC_RH_NPS)) {
+ msleep(val);
+ val = admhc_read_rhdesc(ahcd);
+ if (!(val & ADMHC_RH_NPS)) {
/* power down each port */
- for (temp = 0; temp < ahcd->num_ports; temp++)
- admhc_write_portstatus(ahcd, temp, ADMHC_PS_CPP);
+ for (val = 0; val < ahcd->num_ports; val++)
+ admhc_write_portstatus(ahcd, val, ADMHC_PS_CPP);
}
/* flush those writes */
admhc_writel_flush(ahcd);
spin_lock_irq(&ahcd->lock);
admhc_writel(ahcd, ADMHC_CTRL_SR, &ahcd->regs->gencontrol);
- temp = 30; /* ... allow extra time */
+ val = 30; /* ... allow extra time */
while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) {
- if (--temp == 0) {
+ if (--val == 0) {
spin_unlock_irq(&ahcd->lock);
admhc_err(ahcd, "USB HC reset timed out!\n");
return -1;
periodic_reinit(ahcd);
/* use rhsc irqs after khubd is fully initialized */
- hcd->poll_rh = 1;
+ set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
hcd->uses_new_polling = 1;
#if 0
ahcd->host_control = ADMHC_BUSS_OPER;
admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
- temp = 20;
+ val = 20;
while ((admhc_readl(ahcd, &ahcd->regs->host_control)
& ADMHC_HC_BUSS) != ADMHC_BUSS_OPER) {
- if (--temp == 0) {
+ if (--val == 0) {
spin_unlock_irq(&ahcd->lock);
admhc_err(ahcd, "unable to setup operational mode!\n");
return -1;
/* FIXME: enabling DMA is always failed here for an unknown reason */
admhc_dma_enable(ahcd);
- temp = 200;
+ val = 200;
while ((admhc_readl(ahcd, &ahcd->regs->host_control)
& ADMHC_HC_DMAE) != ADMHC_HC_DMAE) {
- if (--temp == 0) {
+ if (--val == 0) {
spin_unlock_irq(&ahcd->lock);
admhc_err(ahcd, "unable to enable DMA!\n");
admhc_dump(ahcd, 1);
{
struct admhcd *ahcd = hcd_to_admhcd(hcd);
struct admhcd_regs __iomem *regs = ahcd->regs;
- u32 ints;
+ u32 ints;
ints = admhc_readl(ahcd, ®s->int_status);
if ((ints & ADMHC_INTR_INTA) == 0) {
*/
admhc_vdbg(ahcd, "Resume Detect\n");
admhc_intr_ack(ahcd, ADMHC_INTR_RESI);
- hcd->poll_rh = 1;
+ set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
if (ahcd->autostop) {
spin_lock(&ahcd->lock);
admhc_rh_resume(ahcd);
/*-------------------------------------------------------------------------*/
-#ifdef CONFIG_MIPS_ADM5120
+#ifdef CONFIG_ADM5120
#include "adm5120-drv.c"
#define PLATFORM_DRIVER usb_hcd_adm5120_driver
#endif
pr_info("%s: " DRIVER_INFO "\n", hcd_name);
pr_info("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
- sizeof (struct ed), sizeof (struct td));
+ sizeof(struct ed), sizeof(struct td));
+ set_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
#ifdef DEBUG
- admhc_debug_root = debugfs_create_dir("admhc", NULL);
+ admhc_debug_root = debugfs_create_dir("admhc", usb_debug_root);
if (!admhc_debug_root) {
ret = -ENOENT;
goto error_debug;
admhc_debug_root = NULL;
error_debug:
#endif
+ clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
return ret;
}
module_init(admhc_hcd_mod_init);
#ifdef DEBUG
debugfs_remove(admhc_debug_root);
#endif
+ clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded);
}
module_exit(admhc_hcd_mod_exit);
projects / openwrt / openwrt.git / blobdiff