// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Device Tree Source for Linksys xx8300 (Dallas) * * Copyright (C) 2019, 2022 Jeff Kletsky * Updated 2020 Hans Geiblinger * */ #include "qcom-ipq4019.dtsi" #include #include #include // // OEM U-Boot provides either // init=/sbin/init rootfstype=ubifs ubi.mtd=11,2048 \ // root=ubi0:ubifs rootwait rw // or the same with ubi.mtd=13,2048 // / { chosen { bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro"; }; soc { rng@22000 { status = "okay"; }; mdio@90000 { status = "okay"; }; tcsr@1949000 { compatible = "qcom,tcsr"; reg = <0x1949000 0x100>; qcom,wifi_glb_cfg = ; }; tcsr@194b000 { compatible = "qcom,tcsr"; reg = <0x194b000 0x100>; qcom,usb-hsphy-mode-select = ; }; ess_tcsr@1953000 { compatible = "qcom,tcsr"; reg = <0x1953000 0x1000>; qcom,ess-interface-select = ; }; tcsr@1957000 { compatible = "qcom,tcsr"; reg = <0x1957000 0x100>; qcom,wifi_noc_memtype_m0_m2 = ; }; usb2@60f8800 { status = "okay"; dwc3@6000000 { #address-cells = <1>; #size-cells = <0>; usb2_port1: port@1 { reg = <1>; #trigger-source-cells = <0>; }; }; }; usb3@8af8800 { status = "okay"; dwc3@8a00000 { #address-cells = <1>; #size-cells = <0>; usb3_port1: port@1 { reg = <1>; #trigger-source-cells = <0>; }; usb3_port2: port@2 { reg = <2>; #trigger-source-cells = <0>; }; }; }; crypto@8e3a000 { status = "okay"; }; watchdog@b017000 { status = "okay"; }; }; }; &blsp_dma { status = "okay"; }; &blsp1_uart1 { status = "okay"; pinctrl-0 = <&serial_0_pins>; pinctrl-names = "default"; }; &cryptobam { status = "okay"; }; &nand { status = "okay"; pinctrl-0 = <&nand_pins>; pinctrl-names = "default"; nand@0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "sbl1"; reg = <0x0 0x100000>; read-only; }; partition@100000 { label = "mibib"; reg = <0x100000 0x100000>; read-only; }; partition@200000 { label = "qsee"; reg = <0x200000 0x100000>; read-only; }; partition@300000 { label = "cdt"; reg = <0x300000 0x80000>; read-only; }; partition@380000 { label = "appsblenv"; reg = <0x380000 0x80000>; read-only; }; partition@400000 { label = "ART"; reg = <0x400000 0x80000>; read-only; }; partition@480000 { label = "appsbl"; reg = <0x480000 0x200000>; read-only; }; partition@680000 { label = "u_env"; reg = <0x680000 0x80000>; // writable -- U-Boot environment }; partition@700000 { label = "s_env"; reg = <0x700000 0x40000>; // writable -- Boot counter records }; partition@740000 { label = "devinfo"; reg = <0x740000 0x40000>; read-only; }; partition@780000 { label = "kernel"; reg = <0x780000 0x5800000>; }; partition@a80000 { label = "rootfs"; reg = <0xa80000 0x5500000>; }; partition@5f80000 { label = "alt_kernel"; reg = <0x5f80000 0x5800000>; }; partition@6280000 { label = "alt_rootfs"; reg = <0x6280000 0x5500000>; }; partition@b780000 { label = "sysdiag"; reg = <0xb780000 0x100000>; read-only; }; partition@b880000 { label = "syscfg"; reg = <0xb880000 0x4680000>; read-only; }; }; }; }; &pcie0 { status = "okay"; perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; bridge@0,0 { reg = <0x00000000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; ranges; wifi2: wifi@1,0 { compatible = "qcom,ath10k"; reg = <0x00010000 0 0 0 0>; }; }; }; &qpic_bam { status = "okay"; }; &tlmm { serial_0_pins: serial0-pinmux { pins = "gpio16", "gpio17"; function = "blsp_uart0"; bias-disable; }; nand_pins: nand_pins { pullups { pins = "gpio53", "gpio58", "gpio59"; function = "qpic"; bias-pull-up; }; // gpio61 controls led_usb pulldowns { pins = "gpio55", "gpio56", "gpio57", "gpio60", "gpio62", "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69"; function = "qpic"; bias-pull-down; }; }; }; &usb2_hs_phy { status = "okay"; }; &usb3_hs_phy { status = "okay"; }; &usb3_ss_phy { status = "okay"; }; &gmac { status = "okay"; }; &switch { status = "okay"; }; &swport1 { status = "okay"; }; &swport2 { status = "okay"; }; &swport3 { status = "okay"; }; &swport4 { status = "okay"; }; &swport5 { status = "okay"; };