1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/of_mdio.h>
4 #include <linux/of_platform.h>
6 #include <net/nexthop.h>
7 #include <net/neighbour.h>
8 #include <net/netevent.h>
9 #include <linux/inetdevice.h>
10 #include <linux/rhashtable.h>
11 #include <linux/of_net.h>
12 #include <asm/mach-rtl838x/mach-rtl83xx.h>
16 extern struct rtl83xx_soc_info soc_info
;
18 extern const struct rtl838x_reg rtl838x_reg
;
19 extern const struct rtl838x_reg rtl839x_reg
;
20 extern const struct rtl838x_reg rtl930x_reg
;
21 extern const struct rtl838x_reg rtl931x_reg
;
23 extern const struct dsa_switch_ops rtl83xx_switch_ops
;
24 extern const struct dsa_switch_ops rtl930x_switch_ops
;
26 DEFINE_MUTEX(smi_lock
);
28 int rtl83xx_port_get_stp_state(struct rtl838x_switch_priv
*priv
, int port
)
34 int n
= priv
->port_width
<< 1;
36 /* Ports above or equal CPU port can never be configured */
37 if (port
>= priv
->cpu_port
)
40 mutex_lock(&priv
->reg_mutex
);
42 /* For the RTL839x and following, the bits are left-aligned in the 64/128 bit field */
43 if (priv
->family_id
== RTL8390_FAMILY_ID
)
45 if (priv
->family_id
== RTL9300_FAMILY_ID
)
47 if (priv
->family_id
== RTL9310_FAMILY_ID
)
50 index
= n
- (pos
>> 4) - 1;
51 bit
= (pos
<< 1) % 32;
53 priv
->r
->stp_get(priv
, msti
, port_state
);
55 mutex_unlock(&priv
->reg_mutex
);
57 return (port_state
[index
] >> bit
) & 3;
60 static struct table_reg rtl838x_tbl_regs
[] = {
61 TBL_DESC(0x6900, 0x6908, 3, 15, 13, 1), // RTL8380_TBL_L2
62 TBL_DESC(0x6914, 0x6918, 18, 14, 12, 1), // RTL8380_TBL_0
63 TBL_DESC(0xA4C8, 0xA4CC, 6, 14, 12, 1), // RTL8380_TBL_1
65 TBL_DESC(0x1180, 0x1184, 3, 16, 14, 0), // RTL8390_TBL_L2
66 TBL_DESC(0x1190, 0x1194, 17, 15, 12, 0), // RTL8390_TBL_0
67 TBL_DESC(0x6B80, 0x6B84, 4, 14, 12, 0), // RTL8390_TBL_1
68 TBL_DESC(0x611C, 0x6120, 9, 8, 6, 0), // RTL8390_TBL_2
70 TBL_DESC(0xB320, 0xB334, 3, 18, 16, 0), // RTL9300_TBL_L2
71 TBL_DESC(0xB340, 0xB344, 19, 16, 12, 0), // RTL9300_TBL_0
72 TBL_DESC(0xB3A0, 0xB3A4, 20, 16, 13, 0), // RTL9300_TBL_1
73 TBL_DESC(0xCE04, 0xCE08, 6, 14, 12, 0), // RTL9300_TBL_2
74 TBL_DESC(0xD600, 0xD604, 30, 7, 6, 0), // RTL9300_TBL_HSB
75 TBL_DESC(0x7880, 0x7884, 22, 9, 8, 0), // RTL9300_TBL_HSA
77 TBL_DESC(0x8500, 0x8508, 8, 19, 15, 0), // RTL9310_TBL_0
78 TBL_DESC(0x40C0, 0x40C4, 22, 16, 14, 0), // RTL9310_TBL_1
79 TBL_DESC(0x8528, 0x852C, 6, 18, 14, 0), // RTL9310_TBL_2
80 TBL_DESC(0x0200, 0x0204, 9, 15, 12, 0), // RTL9310_TBL_3
81 TBL_DESC(0x20dc, 0x20e0, 29, 7, 6, 0), // RTL9310_TBL_4
82 TBL_DESC(0x7e1c, 0x7e20, 53, 8, 6, 0), // RTL9310_TBL_5
85 void rtl_table_init(void)
89 for (i
= 0; i
< RTL_TBL_END
; i
++)
90 mutex_init(&rtl838x_tbl_regs
[i
].lock
);
93 /* Request access to table t in table access register r
94 * Returns a handle to a lock for that table
96 struct table_reg
*rtl_table_get(rtl838x_tbl_reg_t r
, int t
)
101 if (t
>= BIT(rtl838x_tbl_regs
[r
].c_bit
-rtl838x_tbl_regs
[r
].t_bit
))
104 mutex_lock(&rtl838x_tbl_regs
[r
].lock
);
105 rtl838x_tbl_regs
[r
].tbl
= t
;
107 return &rtl838x_tbl_regs
[r
];
110 /* Release a table r, unlock the corresponding lock */
111 void rtl_table_release(struct table_reg
*r
)
116 // pr_info("Unlocking %08x\n", (u32)r);
117 mutex_unlock(&r
->lock
);
118 // pr_info("Unlock done\n");
121 static int rtl_table_exec(struct table_reg
*r
, bool is_write
, int idx
)
126 /* Read/write bit has inverted meaning on RTL838x */
128 cmd
= is_write
? 0 : BIT(r
->c_bit
);
130 cmd
= is_write
? BIT(r
->c_bit
) : 0;
132 cmd
|= BIT(r
->c_bit
+ 1); /* Execute bit */
133 cmd
|= r
->tbl
<< r
->t_bit
; /* Table type */
134 cmd
|= idx
& (BIT(r
->t_bit
) - 1); /* Index */
136 sw_w32(cmd
, r
->addr
);
138 ret
= readx_poll_timeout(sw_r32
, r
->addr
, val
,
139 !(val
& BIT(r
->c_bit
+ 1)), 20, 10000);
141 pr_err("%s: timeout\n", __func__
);
146 /* Reads table index idx into the data registers of the table */
147 int rtl_table_read(struct table_reg
*r
, int idx
)
149 return rtl_table_exec(r
, false, idx
);
152 /* Writes the content of the table data registers into the table at index idx */
153 int rtl_table_write(struct table_reg
*r
, int idx
)
155 return rtl_table_exec(r
, true, idx
);
158 /* Returns the address of the ith data register of table register r
159 * the address is relative to the beginning of the Switch-IO block at 0xbb000000
161 inline u16
rtl_table_data(struct table_reg
*r
, int i
)
163 if (i
>= r
->max_data
)
165 return r
->data
+ i
* 4;
168 inline u32
rtl_table_data_r(struct table_reg
*r
, int i
)
170 return sw_r32(rtl_table_data(r
, i
));
173 inline void rtl_table_data_w(struct table_reg
*r
, u32 v
, int i
)
175 sw_w32(v
, rtl_table_data(r
, i
));
178 /* Port register accessor functions for the RTL838x and RTL930X SoCs */
179 void rtl838x_mask_port_reg(u64 clear
, u64 set
, int reg
)
181 sw_w32_mask((u32
)clear
, (u32
)set
, reg
);
184 void rtl838x_set_port_reg(u64 set
, int reg
)
186 sw_w32((u32
)set
, reg
);
189 u64
rtl838x_get_port_reg(int reg
)
191 return ((u64
)sw_r32(reg
));
194 /* Port register accessor functions for the RTL839x and RTL931X SoCs */
195 void rtl839x_mask_port_reg_be(u64 clear
, u64 set
, int reg
)
197 sw_w32_mask((u32
)(clear
>> 32), (u32
)(set
>> 32), reg
);
198 sw_w32_mask((u32
)(clear
& 0xffffffff), (u32
)(set
& 0xffffffff), reg
+ 4);
201 u64
rtl839x_get_port_reg_be(int reg
)
206 v
|= sw_r32(reg
+ 4);
211 void rtl839x_set_port_reg_be(u64 set
, int reg
)
213 sw_w32(set
>> 32, reg
);
214 sw_w32(set
& 0xffffffff, reg
+ 4);
217 void rtl839x_mask_port_reg_le(u64 clear
, u64 set
, int reg
)
219 sw_w32_mask((u32
)clear
, (u32
)set
, reg
);
220 sw_w32_mask((u32
)(clear
>> 32), (u32
)(set
>> 32), reg
+ 4);
223 void rtl839x_set_port_reg_le(u64 set
, int reg
)
226 sw_w32(set
>> 32, reg
+ 4);
229 u64
rtl839x_get_port_reg_le(int reg
)
231 u64 v
= sw_r32(reg
+ 4);
239 int read_phy(u32 port
, u32 page
, u32 reg
, u32
*val
)
241 switch (soc_info
.family
) {
242 case RTL8380_FAMILY_ID
:
243 return rtl838x_read_phy(port
, page
, reg
, val
);
244 case RTL8390_FAMILY_ID
:
245 return rtl839x_read_phy(port
, page
, reg
, val
);
246 case RTL9300_FAMILY_ID
:
247 return rtl930x_read_phy(port
, page
, reg
, val
);
248 case RTL9310_FAMILY_ID
:
249 return rtl931x_read_phy(port
, page
, reg
, val
);
255 int write_phy(u32 port
, u32 page
, u32 reg
, u32 val
)
257 switch (soc_info
.family
) {
258 case RTL8380_FAMILY_ID
:
259 return rtl838x_write_phy(port
, page
, reg
, val
);
260 case RTL8390_FAMILY_ID
:
261 return rtl839x_write_phy(port
, page
, reg
, val
);
262 case RTL9300_FAMILY_ID
:
263 return rtl930x_write_phy(port
, page
, reg
, val
);
264 case RTL9310_FAMILY_ID
:
265 return rtl931x_write_phy(port
, page
, reg
, val
);
271 static int __init
rtl83xx_mdio_probe(struct rtl838x_switch_priv
*priv
)
273 struct device
*dev
= priv
->dev
;
274 struct device_node
*dn
, *phy_node
, *mii_np
= dev
->of_node
;
279 pr_debug("In %s\n", __func__
);
280 mii_np
= of_find_compatible_node(NULL
, NULL
, "realtek,rtl838x-mdio");
282 pr_debug("Found compatible MDIO node!\n");
284 dev_err(priv
->dev
, "no %s child node found", "mdio-bus");
288 priv
->mii_bus
= of_mdio_find_bus(mii_np
);
289 if (!priv
->mii_bus
) {
290 pr_debug("Deferring probe of mdio bus\n");
291 return -EPROBE_DEFER
;
293 if (!of_device_is_available(mii_np
))
296 bus
= devm_mdiobus_alloc(priv
->ds
->dev
);
300 bus
->name
= "rtl838x slave mii";
302 /* Since the NIC driver is loaded first, we can use the mdio rw functions
305 bus
->read
= priv
->mii_bus
->read
;
306 bus
->write
= priv
->mii_bus
->write
;
307 bus
->read_paged
= priv
->mii_bus
->read_paged
;
308 bus
->write_paged
= priv
->mii_bus
->write_paged
;
309 snprintf(bus
->id
, MII_BUS_ID_SIZE
, "%s-%d", bus
->name
, dev
->id
);
312 priv
->ds
->slave_mii_bus
= bus
;
313 priv
->ds
->slave_mii_bus
->priv
= priv
->mii_bus
->priv
;
314 priv
->ds
->slave_mii_bus
->access_capabilities
= priv
->mii_bus
->access_capabilities
;
316 ret
= mdiobus_register(priv
->ds
->slave_mii_bus
);
322 dn
= of_find_compatible_node(NULL
, NULL
, "realtek,rtl83xx-switch");
324 dev_err(priv
->dev
, "No RTL switch node in DTS\n");
328 for_each_node_by_name(dn
, "port") {
329 phy_interface_t interface
;
332 if (!of_device_is_available(dn
))
335 if (of_property_read_u32(dn
, "reg", &pn
))
338 phy_node
= of_parse_phandle(dn
, "phy-handle", 0);
340 if (pn
!= priv
->cpu_port
)
341 dev_err(priv
->dev
, "Port node %d misses phy-handle\n", pn
);
345 if (of_property_read_u32(phy_node
, "sds", &priv
->ports
[pn
].sds_num
))
346 priv
->ports
[pn
].sds_num
= -1;
347 pr_debug("%s port %d has SDS %d\n", __func__
, pn
, priv
->ports
[pn
].sds_num
);
349 if (of_get_phy_mode(dn
, &interface
))
350 interface
= PHY_INTERFACE_MODE_NA
;
351 if (interface
== PHY_INTERFACE_MODE_HSGMII
)
352 priv
->ports
[pn
].is2G5
= true;
353 if (interface
== PHY_INTERFACE_MODE_USXGMII
)
354 priv
->ports
[pn
].is2G5
= priv
->ports
[pn
].is10G
= true;
355 if (interface
== PHY_INTERFACE_MODE_10GBASER
)
356 priv
->ports
[pn
].is10G
= true;
358 if (of_property_read_u32(dn
, "led-set", &led_set
))
360 priv
->ports
[pn
].led_set
= led_set
;
362 // Check for the integrated SerDes of the RTL8380M first
363 if (of_property_read_bool(phy_node
, "phy-is-integrated")
364 && priv
->id
== 0x8380 && pn
>= 24) {
365 pr_debug("----> FÓUND A SERDES\n");
366 priv
->ports
[pn
].phy
= PHY_RTL838X_SDS
;
370 if (priv
->id
>= 0x9300) {
371 priv
->ports
[pn
].phy_is_integrated
= false;
372 if (of_property_read_bool(phy_node
, "phy-is-integrated")) {
373 priv
->ports
[pn
].phy_is_integrated
= true;
374 priv
->ports
[pn
].phy
= PHY_RTL930X_SDS
;
377 if (of_property_read_bool(phy_node
, "phy-is-integrated") &&
378 !of_property_read_bool(phy_node
, "sfp")) {
379 priv
->ports
[pn
].phy
= PHY_RTL8218B_INT
;
384 if (!of_property_read_bool(phy_node
, "phy-is-integrated") &&
385 of_property_read_bool(phy_node
, "sfp")) {
386 priv
->ports
[pn
].phy
= PHY_RTL8214FC
;
390 if (!of_property_read_bool(phy_node
, "phy-is-integrated") &&
391 !of_property_read_bool(phy_node
, "sfp")) {
392 priv
->ports
[pn
].phy
= PHY_RTL8218B_EXT
;
397 /* Disable MAC polling the PHY so that we can start configuration */
398 priv
->r
->set_port_reg_le(0ULL, priv
->r
->smi_poll_ctrl
);
400 /* Enable PHY control via SoC */
401 if (priv
->family_id
== RTL8380_FAMILY_ID
) {
402 /* Enable SerDes NWAY and PHY control via SoC */
403 sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL
);
404 } else if (priv
->family_id
== RTL8390_FAMILY_ID
) {
405 /* Disable PHY polling via SoC */
406 sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL
);
409 /* Power on fibre ports and reset them if necessary */
410 if (priv
->ports
[24].phy
== PHY_RTL838X_SDS
) {
411 pr_debug("Powering on fibre ports & reset\n");
412 rtl8380_sds_power(24, 1);
413 rtl8380_sds_power(26, 1);
416 pr_debug("%s done\n", __func__
);
421 static int __init
rtl83xx_get_l2aging(struct rtl838x_switch_priv
*priv
)
423 int t
= sw_r32(priv
->r
->l2_ctrl_1
);
425 t
&= priv
->family_id
== RTL8380_FAMILY_ID
? 0x7fffff : 0x1FFFFF;
427 if (priv
->family_id
== RTL8380_FAMILY_ID
)
428 t
= t
* 128 / 625; /* Aging time in seconds. 0: L2 aging disabled */
432 pr_debug("L2 AGING time: %d sec\n", t
);
433 pr_debug("Dynamic aging for ports: %x\n", sw_r32(priv
->r
->l2_port_aging_out
));
438 /* Caller must hold priv->reg_mutex */
439 int rtl83xx_lag_add(struct dsa_switch
*ds
, int group
, int port
, struct netdev_lag_upper_info
*info
)
441 struct rtl838x_switch_priv
*priv
= ds
->priv
;
446 if (info
->tx_type
!= NETDEV_LAG_TX_TYPE_HASH
) {
447 pr_err("%s: Only mode LACP 802.3ad (4) allowed.\n", __func__
);
451 if (group
>= priv
->n_lags
) {
452 pr_err("%s: LAG %d invalid.\n", __func__
, group
);
456 if (port
>= priv
->cpu_port
) {
457 pr_err("%s: Port %d invalid.\n", __func__
, port
);
461 for (i
= 0; i
< priv
->n_lags
; i
++) {
462 if (priv
->lags_port_members
[i
] & BIT_ULL(port
))
465 if (i
!= priv
->n_lags
) {
466 pr_err("%s: Port %d already member of LAG %d.\n", __func__
, port
, i
);
470 switch(info
->hash_type
) {
471 case NETDEV_LAG_HASH_L2
:
472 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT
;
473 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT
;
475 case NETDEV_LAG_HASH_L23
:
476 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DMAC_BIT
;
477 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SMAC_BIT
;
478 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SIP_BIT
; //source ip
479 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DIP_BIT
; //dest ip
482 case NETDEV_LAG_HASH_L34
:
483 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SRC_L4PORT_BIT
; //sport
484 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DST_L4PORT_BIT
; //dport
485 algomsk
|= TRUNK_DISTRIBUTION_ALGO_SIP_BIT
; //source ip
486 algomsk
|= TRUNK_DISTRIBUTION_ALGO_DIP_BIT
; //dest ip
492 priv
->r
->set_distribution_algorithm(group
, algoidx
, algomsk
);
493 priv
->r
->mask_port_reg_be(0, BIT_ULL(port
), priv
->r
->trk_mbr_ctr(group
));
494 priv
->lags_port_members
[group
] |= BIT_ULL(port
);
496 pr_info("%s: Added port %d to LAG %d. Members now %016llx.\n",
497 __func__
, port
, group
, priv
->lags_port_members
[group
]);
502 /* Caller must hold priv->reg_mutex */
503 int rtl83xx_lag_del(struct dsa_switch
*ds
, int group
, int port
)
505 struct rtl838x_switch_priv
*priv
= ds
->priv
;
507 if (group
>= priv
->n_lags
) {
508 pr_err("%s: LAG %d invalid.\n", __func__
, group
);
512 if (port
>= priv
->cpu_port
) {
513 pr_err("%s: Port %d invalid.\n", __func__
, port
);
517 if (!(priv
->lags_port_members
[group
] & BIT_ULL(port
))) {
518 pr_err("%s: Port %d not member of LAG %d.\n", __func__
, port
, group
);
522 // 0x7f algo mask all
523 priv
->r
->mask_port_reg_be(BIT_ULL(port
), 0, priv
->r
->trk_mbr_ctr(group
));
524 priv
->lags_port_members
[group
] &= ~BIT_ULL(port
);
526 pr_info("%s: Removed port %d from LAG %d. Members now %016llx.\n",
527 __func__
, port
, group
, priv
->lags_port_members
[group
]);
532 /* Allocate a 64 bit octet counter located in the LOG HW table */
533 static int rtl83xx_octet_cntr_alloc(struct rtl838x_switch_priv
*priv
)
537 mutex_lock(&priv
->reg_mutex
);
539 idx
= find_first_zero_bit(priv
->octet_cntr_use_bm
, MAX_COUNTERS
);
540 if (idx
>= priv
->n_counters
) {
541 mutex_unlock(&priv
->reg_mutex
);
545 set_bit(idx
, priv
->octet_cntr_use_bm
);
546 mutex_unlock(&priv
->reg_mutex
);
551 /* Allocate a 32-bit packet counter
552 * 2 32-bit packet counters share the location of a 64-bit octet counter
553 * Initially there are no free packet counters and 2 new ones need to be freed
554 * by allocating the corresponding octet counter
556 int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv
*priv
)
560 mutex_lock(&priv
->reg_mutex
);
562 /* Because initially no packet counters are free, the logic is reversed:
563 * a 0-bit means the counter is already allocated (for octets)
565 idx
= find_first_bit(priv
->packet_cntr_use_bm
, MAX_COUNTERS
* 2);
566 if (idx
>= priv
->n_counters
* 2) {
567 j
= find_first_zero_bit(priv
->octet_cntr_use_bm
, MAX_COUNTERS
);
568 if (j
>= priv
->n_counters
) {
569 mutex_unlock(&priv
->reg_mutex
);
572 set_bit(j
, priv
->octet_cntr_use_bm
);
574 set_bit(j
* 2 + 1, priv
->packet_cntr_use_bm
);
577 clear_bit(idx
, priv
->packet_cntr_use_bm
);
580 mutex_unlock(&priv
->reg_mutex
);
585 /* Add an L2 nexthop entry for the L3 routing system / PIE forwarding in the SoC
586 * Use VID and MAC in rtl838x_l2_entry to identify either a free slot in the L2 hash table
587 * or mark an existing entry as a nexthop by setting it's nexthop bit
588 * Called from the L3 layer
589 * The index in the L2 hash table is filled into nh->l2_id;
591 int rtl83xx_l2_nexthop_add(struct rtl838x_switch_priv
*priv
, struct rtl83xx_nexthop
*nh
)
593 struct rtl838x_l2_entry e
;
594 u64 seed
= priv
->r
->l2_hash_seed(nh
->mac
, nh
->rvid
);
595 u32 key
= priv
->r
->l2_hash_key(priv
, seed
);
599 pr_debug("%s searching for %08llx vid %d with key %d, seed: %016llx\n",
600 __func__
, nh
->mac
, nh
->rvid
, key
, seed
);
603 u64_to_ether_addr(nh
->mac
, &e
.mac
[0]);
606 // Loop over all entries in the hash-bucket and over the second block on 93xx SoCs
607 for (i
= 0; i
< priv
->l2_bucket_size
; i
++) {
608 entry
= priv
->r
->read_l2_entry_using_hash(key
, i
, &e
);
610 if (!e
.valid
|| ((entry
& 0x0fffffffffffffffULL
) == seed
)) {
611 idx
= i
> 3 ? ((key
>> 14) & 0xffff) | i
>> 1
612 : ((key
<< 2) | i
) & 0xffff;
618 pr_err("%s: No more L2 forwarding entries available\n", __func__
);
622 // Found an existing (e->valid is true) or empty entry, make it a nexthop entry
626 nh
->vid
= e
.vid
; // Save VID
628 nh
->dev_id
= e
.stack_dev
;
629 // If the entry is already a valid next hop entry, don't change it
637 e
.is_ipv6_mc
= false;
641 e
.age
= 0; // With port-ignore
642 e
.port
= priv
->port_ignore
;
643 u64_to_ether_addr(nh
->mac
, &e
.mac
[0]);
646 e
.nh_route_id
= nh
->id
; // NH route ID takes place of VID
647 e
.nh_vlan_target
= false;
649 priv
->r
->write_l2_entry_using_hash(idx
>> 2, idx
& 0x3, &e
);
654 /* Removes a Layer 2 next hop entry in the forwarding database
655 * If it was static, the entire entry is removed, otherwise the nexthop bit is cleared
656 * and we wait until the entry ages out
658 int rtl83xx_l2_nexthop_rm(struct rtl838x_switch_priv
*priv
, struct rtl83xx_nexthop
*nh
)
660 struct rtl838x_l2_entry e
;
661 u32 key
= nh
->l2_id
>> 2;
662 int i
= nh
->l2_id
& 0x3;
663 u64 entry
= entry
= priv
->r
->read_l2_entry_using_hash(key
, i
, &e
);
665 pr_debug("%s: id %d, key %d, index %d\n", __func__
, nh
->l2_id
, key
, i
);
667 dev_err(priv
->dev
, "unknown nexthop, id %x\n", nh
->l2_id
);
674 e
.vid
= nh
->vid
; // Restore VID
677 priv
->r
->write_l2_entry_using_hash(key
, i
, &e
);
682 static int rtl83xx_handle_changeupper(struct rtl838x_switch_priv
*priv
,
683 struct net_device
*ndev
,
684 struct netdev_notifier_changeupper_info
*info
)
686 struct net_device
*upper
= info
->upper_dev
;
687 struct netdev_lag_upper_info
*lag_upper_info
= NULL
;
690 if (!netif_is_lag_master(upper
))
693 mutex_lock(&priv
->reg_mutex
);
695 for (i
= 0; i
< priv
->n_lags
; i
++) {
696 if ((!priv
->lag_devs
[i
]) || (priv
->lag_devs
[i
] == upper
))
699 for (j
= 0; j
< priv
->cpu_port
; j
++) {
700 if (priv
->ports
[j
].dp
->slave
== ndev
)
703 if (j
>= priv
->cpu_port
) {
709 lag_upper_info
= info
->upper_info
;
710 if (!priv
->lag_devs
[i
])
711 priv
->lag_devs
[i
] = upper
;
712 err
= rtl83xx_lag_add(priv
->ds
, i
, priv
->ports
[j
].dp
->index
, lag_upper_info
);
718 if (!priv
->lag_devs
[i
])
720 err
= rtl83xx_lag_del(priv
->ds
, i
, priv
->ports
[j
].dp
->index
);
725 if (!priv
->lags_port_members
[i
])
726 priv
->lag_devs
[i
] = NULL
;
730 mutex_unlock(&priv
->reg_mutex
);
735 /* Is the lower network device a DSA slave network device of our RTL930X-switch?
736 * Unfortunately we cannot just follow dev->dsa_prt as this is only set for the
739 int rtl83xx_port_is_under(const struct net_device
* dev
, struct rtl838x_switch_priv
*priv
)
744 // if(!dsa_slave_dev_check(dev)) {
745 // netdev_info(dev, "%s: not a DSA device.\n", __func__);
749 for (i
= 0; i
< priv
->cpu_port
; i
++) {
750 if (!priv
->ports
[i
].dp
)
752 if (priv
->ports
[i
].dp
->slave
== dev
)
759 static int rtl83xx_netdevice_event(struct notifier_block
*this,
760 unsigned long event
, void *ptr
)
762 struct net_device
*ndev
= netdev_notifier_info_to_dev(ptr
);
763 struct rtl838x_switch_priv
*priv
;
766 pr_debug("In: %s, event: %lu\n", __func__
, event
);
768 if ((event
!= NETDEV_CHANGEUPPER
) && (event
!= NETDEV_CHANGELOWERSTATE
))
771 priv
= container_of(this, struct rtl838x_switch_priv
, nb
);
773 case NETDEV_CHANGEUPPER
:
774 err
= rtl83xx_handle_changeupper(priv
, ndev
, ptr
);
784 const static struct rhashtable_params route_ht_params
= {
785 .key_len
= sizeof(u32
),
786 .key_offset
= offsetof(struct rtl83xx_route
, gw_ip
),
787 .head_offset
= offsetof(struct rtl83xx_route
, linkage
),
790 /* Updates an L3 next hop entry in the ROUTING table */
791 static int rtl83xx_l3_nexthop_update(struct rtl838x_switch_priv
*priv
, __be32 ip_addr
, u64 mac
)
793 struct rtl83xx_route
*r
;
794 struct rhlist_head
*tmp
, *list
;
797 list
= rhltable_lookup(&priv
->routes
, &ip_addr
, route_ht_params
);
803 rhl_for_each_entry_rcu(r
, tmp
, list
, linkage
) {
804 pr_info("%s: Setting up fwding: ip %pI4, GW mac %016llx\n",
805 __func__
, &ip_addr
, mac
);
807 // Reads the ROUTING table entry associated with the route
808 priv
->r
->route_read(r
->id
, r
);
809 pr_info("Route with id %d to %pI4 / %d\n", r
->id
, &r
->dst_ip
, r
->prefix_len
);
811 r
->nh
.mac
= r
->nh
.gw
= mac
;
812 r
->nh
.port
= priv
->port_ignore
;
815 // Do we need to explicitly add a DMAC entry with the route's nh index?
816 if (priv
->r
->set_l3_egress_mac
)
817 priv
->r
->set_l3_egress_mac(r
->id
, mac
);
819 // Update ROUTING table: map gateway-mac and switch-mac id to route id
820 rtl83xx_l2_nexthop_add(priv
, &r
->nh
);
822 r
->attr
.valid
= true;
823 r
->attr
.action
= ROUTE_ACT_FORWARD
;
825 r
->attr
.hit
= false; // Reset route-used indicator
827 // Add PIE entry with dst_ip and prefix_len
828 r
->pr
.dip
= r
->dst_ip
;
829 r
->pr
.dip_m
= inet_make_mask(r
->prefix_len
);
831 if (r
->is_host_route
) {
832 int slot
= priv
->r
->find_l3_slot(r
, false);
834 pr_info("%s: Got slot for route: %d\n", __func__
, slot
);
835 priv
->r
->host_route_write(slot
, r
);
837 priv
->r
->route_write(r
->id
, r
);
838 r
->pr
.fwd_sel
= true;
839 r
->pr
.fwd_data
= r
->nh
.l2_id
;
840 r
->pr
.fwd_act
= PIE_ACT_ROUTE_UC
;
843 if (priv
->r
->set_l3_nexthop
)
844 priv
->r
->set_l3_nexthop(r
->nh
.id
, r
->nh
.l2_id
, r
->nh
.if_id
);
847 r
->pr
.packet_cntr
= rtl83xx_packet_cntr_alloc(priv
);
848 if (r
->pr
.packet_cntr
>= 0) {
849 pr_info("Using packet counter %d\n", r
->pr
.packet_cntr
);
850 r
->pr
.log_sel
= true;
851 r
->pr
.log_data
= r
->pr
.packet_cntr
;
853 priv
->r
->pie_rule_add(priv
, &r
->pr
);
855 int pkts
= priv
->r
->packet_cntr_read(r
->pr
.packet_cntr
);
856 pr_info("%s: total packets: %d\n", __func__
, pkts
);
858 priv
->r
->pie_rule_write(priv
, r
->pr
.id
, &r
->pr
);
866 static int rtl83xx_port_ipv4_resolve(struct rtl838x_switch_priv
*priv
,
867 struct net_device
*dev
, __be32 ip_addr
)
869 struct neighbour
*n
= neigh_lookup(&arp_tbl
, &ip_addr
, dev
);
874 n
= neigh_create(&arp_tbl
, &ip_addr
, dev
);
879 /* If the neigh is already resolved, then go ahead and
880 * install the entry, otherwise start the ARP process to
883 if (n
->nud_state
& NUD_VALID
) {
884 mac
= ether_addr_to_u64(n
->ha
);
885 pr_info("%s: resolved mac: %016llx\n", __func__
, mac
);
886 rtl83xx_l3_nexthop_update(priv
, ip_addr
, mac
);
888 pr_info("%s: need to wait\n", __func__
);
889 neigh_event_send(n
, NULL
);
897 struct rtl83xx_walk_data
{
898 struct rtl838x_switch_priv
*priv
;
902 static int rtl83xx_port_lower_walk(struct net_device
*lower
, struct netdev_nested_priv
*_priv
)
904 struct rtl83xx_walk_data
*data
= (struct rtl83xx_walk_data
*)_priv
->data
;
905 struct rtl838x_switch_priv
*priv
= data
->priv
;
909 index
= rtl83xx_port_is_under(lower
, priv
);
912 pr_debug("Found DSA-port, index %d\n", index
);
919 int rtl83xx_port_dev_lower_find(struct net_device
*dev
, struct rtl838x_switch_priv
*priv
)
921 struct rtl83xx_walk_data data
;
922 struct netdev_nested_priv _priv
;
926 _priv
.data
= (void *)&data
;
928 netdev_walk_all_lower_dev(dev
, rtl83xx_port_lower_walk
, &_priv
);
933 static struct rtl83xx_route
*rtl83xx_route_alloc(struct rtl838x_switch_priv
*priv
, u32 ip
)
935 struct rtl83xx_route
*r
;
938 mutex_lock(&priv
->reg_mutex
);
940 idx
= find_first_zero_bit(priv
->route_use_bm
, MAX_ROUTES
);
941 pr_debug("%s id: %d, ip %pI4\n", __func__
, idx
, &ip
);
943 r
= kzalloc(sizeof(*r
), GFP_KERNEL
);
945 mutex_unlock(&priv
->reg_mutex
);
951 r
->pr
.id
= -1; // We still need to allocate a rule in HW
952 r
->is_host_route
= false;
954 err
= rhltable_insert(&priv
->routes
, &r
->linkage
, route_ht_params
);
956 pr_err("Could not insert new rule\n");
957 mutex_unlock(&priv
->reg_mutex
);
961 set_bit(idx
, priv
->route_use_bm
);
963 mutex_unlock(&priv
->reg_mutex
);
974 static struct rtl83xx_route
*rtl83xx_host_route_alloc(struct rtl838x_switch_priv
*priv
, u32 ip
)
976 struct rtl83xx_route
*r
;
979 mutex_lock(&priv
->reg_mutex
);
981 idx
= find_first_zero_bit(priv
->host_route_use_bm
, MAX_HOST_ROUTES
);
982 pr_debug("%s id: %d, ip %pI4\n", __func__
, idx
, &ip
);
984 r
= kzalloc(sizeof(*r
), GFP_KERNEL
);
986 mutex_unlock(&priv
->reg_mutex
);
990 /* We require a unique route ID irrespective of whether it is a prefix or host
991 * route (on RTL93xx) as we use this ID to associate a DMAC and next-hop entry
993 r
->id
= idx
+ MAX_ROUTES
;
996 r
->pr
.id
= -1; // We still need to allocate a rule in HW
997 r
->is_host_route
= true;
999 err
= rhltable_insert(&priv
->routes
, &r
->linkage
, route_ht_params
);
1001 pr_err("Could not insert new rule\n");
1002 mutex_unlock(&priv
->reg_mutex
);
1006 set_bit(idx
, priv
->host_route_use_bm
);
1008 mutex_unlock(&priv
->reg_mutex
);
1020 static void rtl83xx_route_rm(struct rtl838x_switch_priv
*priv
, struct rtl83xx_route
*r
)
1024 if (rhltable_remove(&priv
->routes
, &r
->linkage
, route_ht_params
))
1025 dev_warn(priv
->dev
, "Could not remove route\n");
1027 if (r
->is_host_route
) {
1028 id
= priv
->r
->find_l3_slot(r
, false);
1029 pr_debug("%s: Got id for host route: %d\n", __func__
, id
);
1030 r
->attr
.valid
= false;
1031 priv
->r
->host_route_write(id
, r
);
1032 clear_bit(r
->id
- MAX_ROUTES
, priv
->host_route_use_bm
);
1034 // If there is a HW representation of the route, delete it
1035 if (priv
->r
->route_lookup_hw
) {
1036 id
= priv
->r
->route_lookup_hw(r
);
1037 pr_info("%s: Got id for prefix route: %d\n", __func__
, id
);
1038 r
->attr
.valid
= false;
1039 priv
->r
->route_write(id
, r
);
1041 clear_bit(r
->id
, priv
->route_use_bm
);
1047 static int rtl83xx_fib4_del(struct rtl838x_switch_priv
*priv
,
1048 struct fib_entry_notifier_info
*info
)
1050 struct fib_nh
*nh
= fib_info_nh(info
->fi
, 0);
1051 struct rtl83xx_route
*r
;
1052 struct rhlist_head
*tmp
, *list
;
1054 pr_debug("In %s, ip %pI4, len %d\n", __func__
, &info
->dst
, info
->dst_len
);
1056 list
= rhltable_lookup(&priv
->routes
, &nh
->fib_nh_gw4
, route_ht_params
);
1059 pr_err("%s: no such gateway: %pI4\n", __func__
, &nh
->fib_nh_gw4
);
1062 rhl_for_each_entry_rcu(r
, tmp
, list
, linkage
) {
1063 if (r
->dst_ip
== info
->dst
&& r
->prefix_len
== info
->dst_len
) {
1064 pr_info("%s: found a route with id %d, nh-id %d\n",
1065 __func__
, r
->id
, r
->nh
.id
);
1071 rtl83xx_l2_nexthop_rm(priv
, &r
->nh
);
1073 pr_debug("%s: Releasing packet counter %d\n", __func__
, r
->pr
.packet_cntr
);
1074 set_bit(r
->pr
.packet_cntr
, priv
->packet_cntr_use_bm
);
1075 priv
->r
->pie_rule_rm(priv
, &r
->pr
);
1077 rtl83xx_route_rm(priv
, r
);
1079 nh
->fib_nh_flags
&= ~RTNH_F_OFFLOAD
;
1084 /* On the RTL93xx, an L3 termination endpoint MAC address on which the router waits
1085 * for packets to be routed needs to be allocated.
1087 static int rtl83xx_alloc_router_mac(struct rtl838x_switch_priv
*priv
, u64 mac
)
1089 int i
, free_mac
= -1;
1090 struct rtl93xx_rt_mac m
;
1092 mutex_lock(&priv
->reg_mutex
);
1093 for (i
= 0; i
< MAX_ROUTER_MACS
; i
++) {
1094 priv
->r
->get_l3_router_mac(i
, &m
);
1095 if (free_mac
< 0 && !m
.valid
) {
1099 if (m
.valid
&& m
.mac
== mac
) {
1106 pr_err("No free router MACs, cannot offload\n");
1107 mutex_unlock(&priv
->reg_mutex
);
1113 m
.p_type
= 0; // An individual port, not a trunk port
1114 m
.p_id
= 0x3f; // Listen on any port
1116 m
.vid
= 0; // Listen on any VLAN...
1117 m
.vid_mask
= 0; // ... so mask needs to be 0
1118 m
.mac_mask
= 0xffffffffffffULL
; // We want an exact match of the interface MAC
1119 m
.action
= L3_FORWARD
; // Route the packet
1120 priv
->r
->set_l3_router_mac(free_mac
, &m
);
1122 mutex_unlock(&priv
->reg_mutex
);
1127 static int rtl83xx_alloc_egress_intf(struct rtl838x_switch_priv
*priv
, u64 mac
, int vlan
)
1129 int i
, free_mac
= -1;
1130 struct rtl838x_l3_intf intf
;
1133 mutex_lock(&priv
->reg_mutex
);
1134 for (i
= 0; i
< MAX_SMACS
; i
++) {
1135 m
= priv
->r
->get_l3_egress_mac(L3_EGRESS_DMACS
+ i
);
1136 if (free_mac
< 0 && !m
) {
1141 mutex_unlock(&priv
->reg_mutex
);
1147 pr_err("No free egress interface, cannot offload\n");
1151 // Set up default egress interface 1
1153 intf
.smac_idx
= free_mac
;
1154 intf
.ip4_mtu_id
= 1;
1155 intf
.ip6_mtu_id
= 1;
1156 intf
.ttl_scope
= 1; // TTL
1157 intf
.hl_scope
= 1; // Hop Limit
1158 intf
.ip4_icmp_redirect
= intf
.ip6_icmp_redirect
= 2; // FORWARD
1159 intf
.ip4_pbr_icmp_redirect
= intf
.ip6_pbr_icmp_redirect
= 2; // FORWARD;
1160 priv
->r
->set_l3_egress_intf(free_mac
, &intf
);
1162 priv
->r
->set_l3_egress_mac(L3_EGRESS_DMACS
+ free_mac
, mac
);
1164 mutex_unlock(&priv
->reg_mutex
);
1169 static int rtl83xx_fib4_add(struct rtl838x_switch_priv
*priv
,
1170 struct fib_entry_notifier_info
*info
)
1172 struct fib_nh
*nh
= fib_info_nh(info
->fi
, 0);
1173 struct net_device
*dev
= fib_info_nh(info
->fi
, 0)->fib_nh_dev
;
1175 struct rtl83xx_route
*r
;
1177 int vlan
= is_vlan_dev(dev
) ? vlan_dev_vlan_id(dev
) : 0;
1179 pr_debug("In %s, ip %pI4, len %d\n", __func__
, &info
->dst
, info
->dst_len
);
1181 pr_info("Not offloading default route for now\n");
1185 pr_debug("GW: %pI4, interface name %s, mac %016llx, vlan %d\n", &nh
->fib_nh_gw4
, dev
->name
,
1186 ether_addr_to_u64(dev
->dev_addr
), vlan
1189 port
= rtl83xx_port_dev_lower_find(dev
, priv
);
1193 // For now we only work with routes that have a gateway and are not ourself
1194 // if ((!nh->fib_nh_gw4) && (info->dst_len != 32))
1197 if ((info
->dst
& 0xff) == 0xff)
1200 // Do not offload routes to 192.168.100.x
1201 if ((info
->dst
& 0xffffff00) == 0xc0a86400)
1204 // Do not offload routes to 127.x.x.x
1205 if ((info
->dst
& 0xff000000) == 0x7f000000)
1208 // Allocate route or host-route (entry if hardware supports this)
1209 if (info
->dst_len
== 32 && priv
->r
->host_route_write
)
1210 r
= rtl83xx_host_route_alloc(priv
, nh
->fib_nh_gw4
);
1212 r
= rtl83xx_route_alloc(priv
, nh
->fib_nh_gw4
);
1215 pr_err("%s: No more free route entries\n", __func__
);
1219 r
->dst_ip
= info
->dst
;
1220 r
->prefix_len
= info
->dst_len
;
1222 to_localhost
= !nh
->fib_nh_gw4
;
1224 if (priv
->r
->set_l3_router_mac
) {
1225 u64 mac
= ether_addr_to_u64(dev
->dev_addr
);
1227 pr_debug("Local route and router mac %016llx\n", mac
);
1229 if (rtl83xx_alloc_router_mac(priv
, mac
))
1232 // vid = 0: Do not care about VID
1233 r
->nh
.if_id
= rtl83xx_alloc_egress_intf(priv
, mac
, vlan
);
1234 if (r
->nh
.if_id
< 0)
1241 r
->nh
.port
= priv
->port_ignore
;
1242 r
->attr
.valid
= true;
1243 r
->attr
.action
= ROUTE_ACT_TRAP2CPU
;
1246 slot
= priv
->r
->find_l3_slot(r
, false);
1247 pr_debug("%s: Got slot for route: %d\n", __func__
, slot
);
1248 priv
->r
->host_route_write(slot
, r
);
1252 // We need to resolve the mac address of the GW
1254 rtl83xx_port_ipv4_resolve(priv
, dev
, nh
->fib_nh_gw4
);
1256 nh
->fib_nh_flags
|= RTNH_F_OFFLOAD
;
1265 static int rtl83xx_fib6_add(struct rtl838x_switch_priv
*priv
,
1266 struct fib6_entry_notifier_info
*info
)
1268 pr_debug("In %s\n", __func__
);
1269 // nh->fib_nh_flags |= RTNH_F_OFFLOAD;
1274 struct net_event_work
{
1275 struct work_struct work
;
1276 struct rtl838x_switch_priv
*priv
;
1281 static void rtl83xx_net_event_work_do(struct work_struct
*work
)
1283 struct net_event_work
*net_work
=
1284 container_of(work
, struct net_event_work
, work
);
1285 struct rtl838x_switch_priv
*priv
= net_work
->priv
;
1287 rtl83xx_l3_nexthop_update(priv
, net_work
->gw_addr
, net_work
->mac
);
1290 static int rtl83xx_netevent_event(struct notifier_block
*this,
1291 unsigned long event
, void *ptr
)
1293 struct rtl838x_switch_priv
*priv
;
1294 struct net_device
*dev
;
1295 struct neighbour
*n
= ptr
;
1297 struct net_event_work
*net_work
;
1299 priv
= container_of(this, struct rtl838x_switch_priv
, ne_nb
);
1301 net_work
= kzalloc(sizeof(*net_work
), GFP_ATOMIC
);
1305 INIT_WORK(&net_work
->work
, rtl83xx_net_event_work_do
);
1306 net_work
->priv
= priv
;
1309 case NETEVENT_NEIGH_UPDATE
:
1310 if (n
->tbl
!= &arp_tbl
)
1313 port
= rtl83xx_port_dev_lower_find(dev
, priv
);
1314 if (port
< 0 || !(n
->nud_state
& NUD_VALID
)) {
1315 pr_debug("%s: Neigbour invalid, not updating\n", __func__
);
1320 net_work
->mac
= ether_addr_to_u64(n
->ha
);
1321 net_work
->gw_addr
= *(__be32
*) n
->primary_key
;
1323 pr_debug("%s: updating neighbour on port %d, mac %016llx\n",
1324 __func__
, port
, net_work
->mac
);
1325 schedule_work(&net_work
->work
);
1327 netdev_warn(dev
, "failed to handle neigh update (err %d)\n", err
);
1334 struct rtl83xx_fib_event_work
{
1335 struct work_struct work
;
1337 struct fib_entry_notifier_info fen_info
;
1338 struct fib6_entry_notifier_info fen6_info
;
1339 struct fib_rule_notifier_info fr_info
;
1341 struct rtl838x_switch_priv
*priv
;
1343 unsigned long event
;
1346 static void rtl83xx_fib_event_work_do(struct work_struct
*work
)
1348 struct rtl83xx_fib_event_work
*fib_work
=
1349 container_of(work
, struct rtl83xx_fib_event_work
, work
);
1350 struct rtl838x_switch_priv
*priv
= fib_work
->priv
;
1351 struct fib_rule
*rule
;
1354 /* Protect internal structures from changes */
1356 pr_debug("%s: doing work, event %ld\n", __func__
, fib_work
->event
);
1357 switch (fib_work
->event
) {
1358 case FIB_EVENT_ENTRY_ADD
:
1359 case FIB_EVENT_ENTRY_REPLACE
:
1360 case FIB_EVENT_ENTRY_APPEND
:
1361 if (fib_work
->is_fib6
) {
1362 err
= rtl83xx_fib6_add(priv
, &fib_work
->fen6_info
);
1364 err
= rtl83xx_fib4_add(priv
, &fib_work
->fen_info
);
1365 fib_info_put(fib_work
->fen_info
.fi
);
1368 pr_err("%s: FIB4 failed\n", __func__
);
1370 case FIB_EVENT_ENTRY_DEL
:
1371 rtl83xx_fib4_del(priv
, &fib_work
->fen_info
);
1372 fib_info_put(fib_work
->fen_info
.fi
);
1374 case FIB_EVENT_RULE_ADD
:
1375 case FIB_EVENT_RULE_DEL
:
1376 rule
= fib_work
->fr_info
.rule
;
1377 if (!fib4_rule_default(rule
))
1378 pr_err("%s: FIB4 default rule failed\n", __func__
);
1386 /* Called with rcu_read_lock() */
1387 static int rtl83xx_fib_event(struct notifier_block
*this, unsigned long event
, void *ptr
)
1389 struct fib_notifier_info
*info
= ptr
;
1390 struct rtl838x_switch_priv
*priv
;
1391 struct rtl83xx_fib_event_work
*fib_work
;
1393 if ((info
->family
!= AF_INET
&& info
->family
!= AF_INET6
&&
1394 info
->family
!= RTNL_FAMILY_IPMR
&&
1395 info
->family
!= RTNL_FAMILY_IP6MR
))
1398 priv
= container_of(this, struct rtl838x_switch_priv
, fib_nb
);
1400 fib_work
= kzalloc(sizeof(*fib_work
), GFP_ATOMIC
);
1404 INIT_WORK(&fib_work
->work
, rtl83xx_fib_event_work_do
);
1405 fib_work
->priv
= priv
;
1406 fib_work
->event
= event
;
1407 fib_work
->is_fib6
= false;
1410 case FIB_EVENT_ENTRY_ADD
:
1411 case FIB_EVENT_ENTRY_REPLACE
:
1412 case FIB_EVENT_ENTRY_APPEND
:
1413 case FIB_EVENT_ENTRY_DEL
:
1414 pr_debug("%s: FIB_ENTRY ADD/DEL, event %ld\n", __func__
, event
);
1415 if (info
->family
== AF_INET
) {
1416 struct fib_entry_notifier_info
*fen_info
= ptr
;
1418 if (fen_info
->fi
->fib_nh_is_v6
) {
1419 NL_SET_ERR_MSG_MOD(info
->extack
,
1420 "IPv6 gateway with IPv4 route is not supported");
1422 return notifier_from_errno(-EINVAL
);
1425 memcpy(&fib_work
->fen_info
, ptr
, sizeof(fib_work
->fen_info
));
1426 /* Take referece on fib_info to prevent it from being
1427 * freed while work is queued. Release it afterwards.
1429 fib_info_hold(fib_work
->fen_info
.fi
);
1431 } else if (info
->family
== AF_INET6
) {
1432 struct fib6_entry_notifier_info
*fen6_info
= ptr
;
1433 pr_warn("%s: FIB_RULE ADD/DEL for IPv6 not supported\n", __func__
);
1439 case FIB_EVENT_RULE_ADD
:
1440 case FIB_EVENT_RULE_DEL
:
1441 pr_debug("%s: FIB_RULE ADD/DEL, event: %ld\n", __func__
, event
);
1442 memcpy(&fib_work
->fr_info
, ptr
, sizeof(fib_work
->fr_info
));
1443 fib_rule_get(fib_work
->fr_info
.rule
);
1447 schedule_work(&fib_work
->work
);
1452 static int __init
rtl83xx_sw_probe(struct platform_device
*pdev
)
1455 struct rtl838x_switch_priv
*priv
;
1456 struct device
*dev
= &pdev
->dev
;
1459 pr_debug("Probing RTL838X switch device\n");
1460 if (!pdev
->dev
.of_node
) {
1461 dev_err(dev
, "No DT found\n");
1465 // Initialize access to RTL switch tables
1468 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
1472 priv
->ds
= devm_kzalloc(dev
, sizeof(*priv
->ds
), GFP_KERNEL
);
1476 priv
->ds
->dev
= dev
;
1477 priv
->ds
->priv
= priv
;
1478 priv
->ds
->ops
= &rtl83xx_switch_ops
;
1479 priv
->ds
->needs_standalone_vlan_filtering
= true;
1482 mutex_init(&priv
->reg_mutex
);
1484 priv
->family_id
= soc_info
.family
;
1485 priv
->id
= soc_info
.id
;
1486 switch(soc_info
.family
) {
1487 case RTL8380_FAMILY_ID
:
1488 priv
->ds
->ops
= &rtl83xx_switch_ops
;
1489 priv
->cpu_port
= RTL838X_CPU_PORT
;
1490 priv
->port_mask
= 0x1f;
1491 priv
->port_width
= 1;
1492 priv
->irq_mask
= 0x0FFFFFFF;
1493 priv
->r
= &rtl838x_reg
;
1494 priv
->ds
->num_ports
= 29;
1495 priv
->fib_entries
= 8192;
1496 rtl8380_get_version(priv
);
1498 priv
->l2_bucket_size
= 4;
1499 priv
->n_pie_blocks
= 12;
1500 priv
->port_ignore
= 0x1f;
1501 priv
->n_counters
= 128;
1503 case RTL8390_FAMILY_ID
:
1504 priv
->ds
->ops
= &rtl83xx_switch_ops
;
1505 priv
->cpu_port
= RTL839X_CPU_PORT
;
1506 priv
->port_mask
= 0x3f;
1507 priv
->port_width
= 2;
1508 priv
->irq_mask
= 0xFFFFFFFFFFFFFULL
;
1509 priv
->r
= &rtl839x_reg
;
1510 priv
->ds
->num_ports
= 53;
1511 priv
->fib_entries
= 16384;
1512 rtl8390_get_version(priv
);
1514 priv
->l2_bucket_size
= 4;
1515 priv
->n_pie_blocks
= 18;
1516 priv
->port_ignore
= 0x3f;
1517 priv
->n_counters
= 1024;
1519 case RTL9300_FAMILY_ID
:
1520 priv
->ds
->ops
= &rtl930x_switch_ops
;
1521 priv
->cpu_port
= RTL930X_CPU_PORT
;
1522 priv
->port_mask
= 0x1f;
1523 priv
->port_width
= 1;
1524 priv
->irq_mask
= 0x0FFFFFFF;
1525 priv
->r
= &rtl930x_reg
;
1526 priv
->ds
->num_ports
= 29;
1527 priv
->fib_entries
= 16384;
1528 priv
->version
= RTL8390_VERSION_A
;
1530 sw_w32(1, RTL930X_ST_CTRL
);
1531 priv
->l2_bucket_size
= 8;
1532 priv
->n_pie_blocks
= 16;
1533 priv
->port_ignore
= 0x3f;
1534 priv
->n_counters
= 2048;
1536 case RTL9310_FAMILY_ID
:
1537 priv
->ds
->ops
= &rtl930x_switch_ops
;
1538 priv
->cpu_port
= RTL931X_CPU_PORT
;
1539 priv
->port_mask
= 0x3f;
1540 priv
->port_width
= 2;
1541 priv
->irq_mask
= 0xFFFFFFFFFFFFFULL
;
1542 priv
->r
= &rtl931x_reg
;
1543 priv
->ds
->num_ports
= 57;
1544 priv
->fib_entries
= 16384;
1545 priv
->version
= RTL8390_VERSION_A
;
1547 priv
->l2_bucket_size
= 8;
1550 pr_debug("Chip version %c\n", priv
->version
);
1552 err
= rtl83xx_mdio_probe(priv
);
1554 /* Probing fails the 1st time because of missing ethernet driver
1555 * initialization. Use this to disable traffic in case the bootloader left if on
1560 err
= dsa_register_switch(priv
->ds
);
1562 dev_err(dev
, "Error registering switch: %d\n", err
);
1566 /* dsa_to_port returns dsa_port from the port list in
1567 * dsa_switch_tree, the tree is built when the switch
1568 * is registered by dsa_register_switch
1570 for (i
= 0; i
<= priv
->cpu_port
; i
++)
1571 priv
->ports
[i
].dp
= dsa_to_port(priv
->ds
, i
);
1573 /* Enable link and media change interrupts. Are the SERDES masks needed? */
1574 sw_w32_mask(0, 3, priv
->r
->isr_glb_src
);
1576 priv
->r
->set_port_reg_le(priv
->irq_mask
, priv
->r
->isr_port_link_sts_chg
);
1577 priv
->r
->set_port_reg_le(priv
->irq_mask
, priv
->r
->imr_port_link_sts_chg
);
1579 priv
->link_state_irq
= platform_get_irq(pdev
, 0);
1580 pr_info("LINK state irq: %d\n", priv
->link_state_irq
);
1581 switch (priv
->family_id
) {
1582 case RTL8380_FAMILY_ID
:
1583 err
= request_irq(priv
->link_state_irq
, rtl838x_switch_irq
,
1584 IRQF_SHARED
, "rtl838x-link-state", priv
->ds
);
1586 case RTL8390_FAMILY_ID
:
1587 err
= request_irq(priv
->link_state_irq
, rtl839x_switch_irq
,
1588 IRQF_SHARED
, "rtl839x-link-state", priv
->ds
);
1590 case RTL9300_FAMILY_ID
:
1591 err
= request_irq(priv
->link_state_irq
, rtl930x_switch_irq
,
1592 IRQF_SHARED
, "rtl930x-link-state", priv
->ds
);
1594 case RTL9310_FAMILY_ID
:
1595 err
= request_irq(priv
->link_state_irq
, rtl931x_switch_irq
,
1596 IRQF_SHARED
, "rtl931x-link-state", priv
->ds
);
1600 dev_err(dev
, "Error setting up switch interrupt.\n");
1601 /* Need to free allocated switch here */
1604 /* Enable interrupts for switch, on RTL931x, the IRQ is always on globally */
1605 if (soc_info
.family
!= RTL9310_FAMILY_ID
)
1606 sw_w32(0x1, priv
->r
->imr_glb
);
1608 rtl83xx_get_l2aging(priv
);
1610 rtl83xx_setup_qos(priv
);
1612 priv
->r
->l3_setup(priv
);
1614 /* Clear all destination ports for mirror groups */
1615 for (i
= 0; i
< 4; i
++)
1616 priv
->mirror_group_ports
[i
] = -1;
1618 /* Register netdevice event callback to catch changes in link aggregation groups */
1619 priv
->nb
.notifier_call
= rtl83xx_netdevice_event
;
1620 if (register_netdevice_notifier(&priv
->nb
)) {
1621 priv
->nb
.notifier_call
= NULL
;
1622 dev_err(dev
, "Failed to register LAG netdev notifier\n");
1623 goto err_register_nb
;
1626 // Initialize hash table for L3 routing
1627 rhltable_init(&priv
->routes
, &route_ht_params
);
1629 /* Register netevent notifier callback to catch notifications about neighboring
1630 * changes to update nexthop entries for L3 routing.
1632 priv
->ne_nb
.notifier_call
= rtl83xx_netevent_event
;
1633 if (register_netevent_notifier(&priv
->ne_nb
)) {
1634 priv
->ne_nb
.notifier_call
= NULL
;
1635 dev_err(dev
, "Failed to register netevent notifier\n");
1636 goto err_register_ne_nb
;
1639 priv
->fib_nb
.notifier_call
= rtl83xx_fib_event
;
1641 /* Register Forwarding Information Base notifier to offload routes where
1643 * Only FIBs pointing to our own netdevs are programmed into
1644 * the device, so no need to pass a callback.
1646 err
= register_fib_notifier(&init_net
, &priv
->fib_nb
, NULL
, NULL
);
1648 goto err_register_fib_nb
;
1650 // TODO: put this into l2_setup()
1651 // Flood BPDUs to all ports including cpu-port
1652 if (soc_info
.family
!= RTL9300_FAMILY_ID
) {
1653 bpdu_mask
= soc_info
.family
== RTL8380_FAMILY_ID
? 0x1FFFFFFF : 0x1FFFFFFFFFFFFF;
1654 priv
->r
->set_port_reg_be(bpdu_mask
, priv
->r
->rma_bpdu_fld_pmask
);
1656 // TRAP 802.1X frames (EAPOL) to the CPU-Port, bypass STP and VLANs
1657 sw_w32(7, priv
->r
->spcl_trap_eapol_ctrl
);
1659 rtl838x_dbgfs_init(priv
);
1661 rtl930x_dbgfs_init(priv
);
1666 err_register_fib_nb
:
1667 unregister_netevent_notifier(&priv
->ne_nb
);
1669 unregister_netdevice_notifier(&priv
->nb
);
1674 static int rtl83xx_sw_remove(struct platform_device
*pdev
)
1677 pr_debug("Removing platform driver for rtl83xx-sw\n");
1682 static const struct of_device_id rtl83xx_switch_of_ids
[] = {
1683 { .compatible
= "realtek,rtl83xx-switch"},
1688 MODULE_DEVICE_TABLE(of
, rtl83xx_switch_of_ids
);
1690 static struct platform_driver rtl83xx_switch_driver
= {
1691 .probe
= rtl83xx_sw_probe
,
1692 .remove
= rtl83xx_sw_remove
,
1694 .name
= "rtl83xx-switch",
1696 .of_match_table
= rtl83xx_switch_of_ids
,
1700 module_platform_driver(rtl83xx_switch_driver
);
1702 MODULE_AUTHOR("B. Koblitz");
1703 MODULE_DESCRIPTION("RTL83XX SoC Switch Driver");
1704 MODULE_LICENSE("GPL");