target/linux/realtek/dts-5.15/rtl9302_zyxel_xgs1250-12.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /dts-v1/;
   3
   4 #include "rtl930x.dtsi"
   5
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/leds/common.h>
   9
  10 / {
  11         compatible = "zyxel,xgs1250-12", "realtek,rtl838x-soc";
  12         model = "Zyxel XGS1250-12 Switch";
  13
  14         aliases {
  15                 led-boot = &led_pwr_sys;
  16                 led-failsafe = &led_pwr_sys;
  17                 led-running = &led_pwr_sys;
  18                 led-upgrade = &led_pwr_sys;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 mode {
  25                         label = "reset";
  26                         gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                 };
  29         };
  30
  31         /* i2c of the SFP cage: port 12 */
  32         i2c0: i2c-rtl9300@1b00036c {
  33                 compatible = "realtek,rtl9300-i2c";
  34                 reg = <0x1b00036c 0x3c>;
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37                 sda-pin = <10>;
  38                 scl-pin = <8>;
  39                 clock-frequency = <100000>;
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&pinmux_disable_sys_led>;
  47
  48                 led_pwr_sys: led-0 {
  49                         color = <LED_COLOR_ID_GREEN>;
  50                         function = LED_FUNCTION_POWER;
  51                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  52                 };
  53         };
  54
  55         sfp0: sfp-p12 {
  56                 compatible = "sff,sfp";
  57                 i2c-bus = <&i2c0>;
  58                 los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  59                 tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  60                 mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
  61                 tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
  62         };
  63
  64         led_set: led_set {
  65                 compatible = "realtek,rtl9300-leds";
  66                 active-low;
  67
  68                 led_set0 = <0x0a20 0x0b80>; // LED set 0: 1000Mbps,  10/100Mbps
  69                 led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
  70                                                           // (5G, 10/100) (10G, 5G, 2.5G)
  71                 led_set2 = <0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
  72         };
  73 };
  74
  75 &spi0 {
  76         status = "okay";
  77         flash@0 {
  78                 compatible = "jedec,spi-nor";
  79                 reg = <0>;
  80                 spi-max-frequency = <10000000>;
  81
  82                 partitions {
  83                         compatible = "fixed-partitions";
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86
  87                         partition@0 {
  88                                 label = "u-boot";
  89                                 reg = <0x0 0xe0000>;
  90                                 read-only;
  91                         };
  92                         partition@e0000 {
  93                                 label = "u-boot-env";
  94                                 reg = <0xe0000 0x10000>;
  95                         };
  96                         partition@f0000 {
  97                                 label = "u-boot-env2";
  98                                 reg = <0xf0000 0x10000>;
  99                                 read-only;
 100                         };
 101                         partition@100000 {
 102                                 label = "jffs";
 103                                 reg = <0x100000 0x100000>;
 104                         };
 105                         partition@200000 {
 106                                 label = "jffs2";
 107                                 reg = <0x200000 0x100000>;
 108                         };
 109                         partition@b300000 {
 110                                 label = "firmware";
 111                                 reg = <0x300000 0xce0000>;
 112                                 compatible = "openwrt,uimage", "denx,uimage";
 113                                 openwrt,ih-magic = <0x93001250>;
 114                         };
 115                         partition@fe0000 {
 116                                 label = "log";
 117                                 reg = <0xfe0000 0x20000>;
 118                         };
 119                 };
 120         };
 121 };
 122
 123 &ethernet0 {
 124         mdio: mdio-bus {
 125                 compatible = "realtek,rtl838x-mdio";
 126                 regmap = <&ethernet0>;
 127                 #address-cells = <1>;
 128                 #size-cells = <0>;
 129
 130                 /* External RTL8218D PHY */
 131                 phy0: ethernet-phy@0 {
 132                         reg = <0>;
 133                         compatible = "ethernet-phy-ieee802.3-c22";
 134                         rtl9300,smi-address = <0 0>;
 135                         sds = < 2 >;
 136                         // Disabled because we do not know how to bring up again
 137                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 138                 };
 139                 phy1: ethernet-phy@1 {
 140                         reg = <1>;
 141                         compatible = "ethernet-phy-ieee802.3-c22";
 142                         rtl9300,smi-address = <0 1>;
 143                 };
 144                 phy2: ethernet-phy@2 {
 145                         reg = <2>;
 146                         compatible = "ethernet-phy-ieee802.3-c22";
 147                         rtl9300,smi-address = <0 2>;
 148                 };
 149                 phy3: ethernet-phy@3 {
 150                         reg = <3>;
 151                         compatible = "ethernet-phy-ieee802.3-c22";
 152                         rtl9300,smi-address = <0 3>;
 153                 };
 154                 phy4: ethernet-phy@4 {
 155                         reg = <4>;
 156                         compatible = "ethernet-phy-ieee802.3-c22";
 157                         rtl9300,smi-address = <0 4>;
 158                 };
 159                 phy5: ethernet-phy@5 {
 160                         reg = <5>;
 161                         compatible = "ethernet-phy-ieee802.3-c22";
 162                         rtl9300,smi-address = <0 5>;
 163                 };
 164                 phy6: ethernet-phy@6 {
 165                         reg = <6>;
 166                         compatible = "ethernet-phy-ieee802.3-c22";
 167                         rtl9300,smi-address = <0 6>;
 168                 };
 169                 phy7: ethernet-phy@7 {
 170                         reg = <7>;
 171                         compatible = "ethernet-phy-ieee802.3-c22";
 172                         rtl9300,smi-address = <0 7>;
 173                 };
 174
 175                 /* External Aquantia 113C PHYs */
 176                 phy24: ethernet-phy@24 {
 177                         reg = <24>;
 178                         compatible = "ethernet-phy-ieee802.3-c45";
 179                         rtl9300,smi-address = <1 8>;
 180                         sds = < 6 >;
 181                         // Disabled because we do not know how to bring up again
 182                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 183                 };
 184
 185                 phy25: ethernet-phy@25 {
 186                         reg = <25>;
 187                         compatible = "ethernet-phy-ieee802.3-c45";
 188                         rtl9300,smi-address = <2 8>;
 189                         sds = < 7 >;
 190                         // Disabled because we do not know how to bring up again
 191                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 192                 };
 193
 194                 phy26: ethernet-phy@26 {
 195                         reg = <26>;
 196                         compatible = "ethernet-phy-ieee802.3-c45";
 197                         rtl9300,smi-address = <3 8>;
 198                         sds = < 8 >;
 199                         // Disabled because we do not know how to bring up again
 200                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 201                 };
 202
 203                 /* SFP Ports */
 204                 phy27: ethernet-phy@27 {
 205                         compatible = "ethernet-phy-ieee802.3-c22";
 206                         phy-is-integrated;
 207                         reg = <27>;
 208                         rtl9300,smi-address = <4 0>;
 209                         sds = < 9 >;
 210                 };
 211
 212         };
 213 };
 214
 215 &switch0 {
 216         ports {
 217                 #address-cells = <1>;
 218                 #size-cells = <0>;
 219
 220                 port@0 {
 221                         reg = <0>;
 222                         label = "lan1";
 223                         phy-handle = <&phy0>;
 224                         phy-mode = "xgmii";
 225                         led-set = <0>;
 226                 };
 227                 port@1 {
 228                         reg = <1>;
 229                         label = "lan2";
 230                         phy-handle = <&phy1>;
 231                         phy-mode = "xgmii";
 232                         led-set = <0>;
 233                 };
 234                 port@2 {
 235                         reg = <2>;
 236                         label = "lan3";
 237                         phy-handle = <&phy2>;
 238                         phy-mode = "xgmii";
 239                         led-set = <0>;
 240                 };
 241                 port@3 {
 242                         reg = <3>;
 243                         label = "lan4";
 244                         phy-handle = <&phy3>;
 245                         phy-mode = "xgmii";
 246                         led-set = <0>;
 247                 };
 248                 port@4 {
 249                         reg = <4>;
 250                         label = "lan5";
 251                         phy-handle = <&phy4>;
 252                         phy-mode = "xgmii";
 253                         led-set = <0>;
 254                 };
 255                 port@5 {
 256                         reg = <5>;
 257                         label = "lan6";
 258                         phy-handle = <&phy5>;
 259                         phy-mode = "xgmii";
 260                         led-set = <0>;
 261                 };
 262                 port@6 {
 263                         reg = <6>;
 264                         label = "lan7";
 265                         phy-handle = <&phy6>;
 266                         phy-mode = "xgmii";
 267                         led-set = <0>;
 268                 };
 269                 port@7 {
 270                         reg = <7>;
 271                         label = "lan8";
 272                         phy-handle = <&phy7>;
 273                         phy-mode = "xgmii";
 274                         led-set = <0>;
 275                 };
 276
 277                 port@24 {
 278                         reg = <24>;
 279                         label = "lan9";
 280                         phy-mode = "usxgmii";
 281                         phy-handle = <&phy24>;
 282                         led-set = <1>;
 283                 };
 284                 port@25 {
 285                         reg = <25>;
 286                         label = "lan10";
 287                         phy-mode = "usxgmii";
 288                         phy-handle = <&phy25>;
 289                         led-set = <1>;
 290                 };
 291                 port@26 {
 292                         reg = <26>;
 293                         label = "lan11";
 294                         phy-mode = "usxgmii";
 295                         phy-handle = <&phy26>;
 296                         led-set = <1>;
 297                 };
 298
 299                 port@27 {
 300                         reg = <27>;
 301                         label = "lan12";
 302                         phy-mode = "1000base-x";
 303                         phy-handle = <&phy27>;
 304                         sfp = <&sfp0>;
 305                         led-set = <2>;
 306                         managed = "in-band-status";
 307                 };
 308
 309                 port@28 {
 310                         ethernet = <&ethernet0>;
 311                         reg = <28>;
 312                         phy-mode = "internal";
 313                         fixed-link {
 314                                 speed = <10000>;
 315                                 full-duplex;
 316                         };
 317                 };
 318         };
 319 };