realtek: copy dts/files/patches/configs for 5.15
[openwrt/staging/pepe2k.git] / target / linux / realtek / dts-5.15 / rtl8380_engenius_ews2910p.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "rtl838x.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "engenius,ews2910p", "realtek,rtl838x-soc";
10 model = "EnGenius EWS2910P";
11
12 aliases {
13 led-boot = &led_power;
14 led-failsafe = &led_fault;
15 led-running = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x10000000>;
22 };
23
24 keys {
25 compatible = "gpio-keys";
26
27 reset {
28 label = "reset";
29 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
30 linux,code = <KEY_RESTART>;
31 };
32
33 led_mode {
34 label = "led-mode";
35 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
36 linux,code = <BTN_0>;
37 };
38 };
39
40 gpio1: rtl8231-gpio {
41 compatible = "realtek,rtl8231-gpio";
42 #gpio-cells = <2>;
43 gpio-controller;
44 indirect-access-bus-id = <0>;
45
46 poe_enable {
47 gpio-hog;
48 gpios = <1 GPIO_ACTIVE_HIGH>;
49 output-high;
50 line-name = "poe-enable";
51 };
52
53 sff_p9_gpios {
54 gpio-hog;
55 gpios = < 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>,
56 < 11 GPIO_ACTIVE_HIGH>, /* los-gpio */
57 < 12 GPIO_ACTIVE_LOW>; /* mod-def0-gpio */
58 input;
59 line-name = "sff-p9-gpios";
60 };
61 };
62
63 gpio-export {
64 compatible = "gpio-export";
65
66 sff-p9-tx-disable {
67 gpio-export,name = "sff-p9-tx-disable";
68 gpio-export,output = <1>;
69 gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
70 };
71 };
72
73 gpio-restart {
74 compatible = "gpio-restart";
75 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
76 };
77
78 leds {
79 compatible = "gpio-leds";
80
81 led_power: led-0 {
82 label = "green:power";
83 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
84 };
85
86 led_lan_mode: led-1 {
87 label = "green:lan-mode";
88 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
89 };
90
91 led_fault: led-2 {
92 label = "amber:fault";
93 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
94 };
95
96 led_poe_max: led-3 {
97 label = "amber:poe-max";
98 gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
99 };
100 };
101
102 i2c1: i2c-gpio-1 {
103 compatible = "i2c-gpio";
104 sda-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
105 scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
106 i2c-gpio,delay-us = <2>;
107 #address-cells = <1>;
108 #size-cells = <0>;
109 };
110 sfp1: sfp-p10 {
111 compatible = "sff,sfp";
112 i2c-bus = <&i2c1>;
113 tx-disable-gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
114 los-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
115 mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
116 };
117 };
118
119 &spi0 {
120 status = "okay";
121
122 flash@0 {
123 compatible = "jedec,spi-nor";
124 reg = <0>;
125 spi-max-frequency = <10000000>;
126
127 partitions {
128 compatible = "fixed-partitions";
129 #address-cells = <1>;
130 #size-cells = <1>;
131
132 partition@0 {
133 label = "u-boot";
134 reg = <0x0 0x80000>;
135 read-only;
136 };
137 partition@80000 {
138 label = "u-boot-env";
139 reg = <0x80000 0x10000>;
140 read-only;
141 };
142 partition@90000 {
143 label = "u-boot-env2";
144 reg = <0x90000 0x10000>;
145 };
146 partition@a0000 {
147 label = "rootfs_data";
148 reg = <0xa0000 0xd60000>;
149 };
150 partition@e00000 {
151 label = "jffs2-log";
152 reg = <0xe00000 0x200000>;
153 };
154 partition@1000000 {
155 compatible = "openwrt,uimage";
156 label = "firmware";
157 reg = <0x1000000 0x800000>;
158 openwrt,ih-magic = <0x03802910>;
159 };
160 partition@1800000 {
161 label = "firmware2";
162 reg = <0x1800000 0x800000>;
163 };
164 };
165 };
166 };
167
168 &ethernet0 {
169 mdio: mdio-bus {
170 compatible = "realtek,rtl838x-mdio";
171 regmap = <&ethernet0>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174
175 INTERNAL_PHY(8)
176 INTERNAL_PHY(9)
177 INTERNAL_PHY(10)
178 INTERNAL_PHY(11)
179 INTERNAL_PHY(12)
180 INTERNAL_PHY(13)
181 INTERNAL_PHY(14)
182 INTERNAL_PHY(15)
183
184 INTERNAL_PHY(24)
185 INTERNAL_PHY(26)
186 };
187 };
188
189 &switch0 {
190 ports {
191 #address-cells = <1>;
192 #size-cells = <0>;
193
194 SWITCH_PORT(8, 1, internal)
195 SWITCH_PORT(9, 2, internal)
196 SWITCH_PORT(10, 3, internal)
197 SWITCH_PORT(11, 4, internal)
198 SWITCH_PORT(12, 5, internal)
199 SWITCH_PORT(13, 6, internal)
200 SWITCH_PORT(14, 7, internal)
201 SWITCH_PORT(15, 8, internal)
202
203 SWITCH_SFP_PORT(24, 9, 1000base-x)
204
205 port@26 {
206 reg = <26>;
207 label = "lan10";
208 phy-mode = "1000base-x";
209 phy-handle = <&phy26>;
210 managed = "in-band-status";
211 sfp = <&sfp1>;
212 };
213
214 port@28 {
215 ethernet = <&ethernet0>;
216 reg = <28>;
217 phy-mode = "internal";
218
219 fixed-link {
220 speed = <1000>;
221 full-duplex;
222 };
223 };
224 };
225 };
226
227 &uart1 {
228 status = "okay";
229 };