target/linux/realtek/dts-5.10/rtl838x.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 /dts-v1/;
   4
   5 #define STRINGIZE(s) #s
   6 #define LAN_LABEL(p, s) STRINGIZE(p ## s)
   7 #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
   8
   9 #define INTERNAL_PHY(n) \
  10         phy##n: ethernet-phy@##n { \
  11                 reg = <##n>; \
  12                 compatible = "ethernet-phy-ieee802.3-c22"; \
  13                 phy-is-integrated; \
  14         };
  15
  16 #define EXTERNAL_PHY(n) \
  17         phy##n: ethernet-phy@##n { \
  18                 reg = <##n>; \
  19                 compatible = "ethernet-phy-ieee802.3-c22"; \
  20         };
  21
  22 #define EXTERNAL_SFP_PHY(n) \
  23         phy##n: ethernet-phy@##n { \
  24                 compatible = "ethernet-phy-ieee802.3-c22"; \
  25                 sfp; \
  26                 media = "fibre"; \
  27                 reg = <##n>; \
  28         };
  29
  30 #define SWITCH_PORT(n, s, m) \
  31         port@##n { \
  32                 reg = <##n>; \
  33                 label = SWITCH_PORT_LABEL(s) ; \
  34                 phy-handle = <&phy##n>; \
  35                 phy-mode = #m ; \
  36         };
  37
  38 #define SWITCH_SFP_PORT(n, s, m) \
  39         port@##n { \
  40                 reg = <##n>; \
  41                 label = SWITCH_PORT_LABEL(s) ; \
  42                 phy-handle = <&phy##n>; \
  43                 phy-mode = #m ; \
  44                 fixed-link { \
  45                         speed = <1000>; \
  46                         full-duplex; \
  47                 }; \
  48         };
  49
  50 / {
  51         #address-cells = <1>;
  52         #size-cells = <1>;
  53
  54         compatible = "realtek,rtl838x-soc";
  55
  56         cpus {
  57                 #address-cells = <1>;
  58                 #size-cells = <0>;
  59                 frequency = <500000000>;
  60
  61                 cpu@0 {
  62                         compatible = "mips,mips4KEc";
  63                         reg = <0>;
  64                 };
  65         };
  66
  67         chosen {
  68                 bootargs = "console=ttyS0,115200";
  69         };
  70
  71         lx_clk: lx_clk {
  72                 compatible = "fixed-clock";
  73                 #clock-cells = <0>;
  74                 clock-frequency = <200000000>;
  75         };
  76
  77         cpuintc: cpuintc {
  78                 compatible = "mti,cpu-interrupt-controller";
  79                 #address-cells = <0>;
  80                 #interrupt-cells = <1>;
  81                 interrupt-controller;
  82         };
  83
  84         soc: soc {
  85                 compatible = "simple-bus";
  86                 #address-cells = <1>;
  87                 #size-cells = <1>;
  88                 ranges = <0x0 0x18000000 0x10000>;
  89
  90                 intc: rtlintc@3000 {
  91                         compatible = "realtek,rtl-intc";
  92                         reg = <0x3000 0x20>;
  93                         #address-cells = <0>;
  94                         #interrupt-cells = <1>;
  95                         interrupt-controller;
  96                         interrupt-map =
  97                                 <31 &cpuintc 2>, /* UART0 */
  98                                 <30 &cpuintc 1>, /* UART1 */
  99                                 <29 &cpuintc 5>, /* TC0 */
 100                                 <28 &cpuintc 1>, /* TC1 */
 101                                 <27 &cpuintc 1>, /* OCPTO */
 102                                 <26 &cpuintc 1>, /* HLXTO */
 103                                 <25 &cpuintc 1>, /* SLXTO */
 104                                 <24 &cpuintc 4>, /* NIC */
 105                                 <23 &cpuintc 4>, /* GPIO_ABCD */
 106                                 <22 &cpuintc 4>, /* GPIO_EFGH */
 107                                 <21 &cpuintc 4>, /* RTC */
 108                                 <20 &cpuintc 3>, /* SWCORE */
 109                                 <19 &cpuintc 4>, /* WDT_IP1 */
 110                                 <18 &cpuintc 5>; /* WDT_IP2 */
 111                 };
 112
 113                 spi0: spi@1200 {
 114                         compatible = "realtek,rtl8380-spi";
 115                         reg = <0x1200 0x100>;
 116
 117                         #address-cells = <1>;
 118                         #size-cells = <0>;
 119                 };
 120
 121                 uart0: uart@2000 {
 122                         compatible = "ns16550a";
 123                         reg = <0x2000 0x100>;
 124
 125                         clocks = <&lx_clk>;
 126
 127                         interrupt-parent = <&intc>;
 128                         interrupts = <31>;
 129
 130                         reg-io-width = <1>;
 131                         reg-shift = <2>;
 132                         fifo-size = <1>;
 133                         no-loopback-test;
 134                 };
 135
 136                 uart1: uart@2100 {
 137                         pinctrl-names = "default";
 138                         pinctrl-0 = <&enable_uart1>;
 139
 140                         compatible = "ns16550a";
 141                         reg = <0x2100 0x100>;
 142
 143                         clocks = <&lx_clk>;
 144
 145                         interrupt-parent = <&intc>;
 146                         interrupts = <30>;
 147
 148                         reg-io-width = <1>;
 149                         reg-shift = <2>;
 150                         fifo-size = <1>;
 151                         no-loopback-test;
 152
 153                         status = "disabled";
 154                 };
 155
 156                 watchdog0: watchdog@3150 {
 157                         compatible = "realtek,rtl8380-wdt";
 158                         reg = <0x3150 0xc>;
 159
 160                         realtek,reset-mode = "soc";
 161
 162                         clocks = <&lx_clk>;
 163                         timeout-sec = <30>;
 164
 165                         interrupt-parent = <&intc>;
 166                         interrupt-names = "phase1", "phase2";
 167                         interrupts = <19>, <18>;
 168                 };
 169
 170                 gpio0: gpio-controller@3500 {
 171                         compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
 172                         reg = <0x3500 0x20>;
 173
 174                         gpio-controller;
 175                         #gpio-cells = <2>;
 176                         ngpios = <24>;
 177
 178                         interrupt-controller;
 179                         #interrupt-cells = <2>;
 180                         interrupt-parent = <&intc>;
 181                         interrupts = <23>;
 182                 };
 183         };
 184
 185         gpio1: rtl8231-gpio {
 186                 compatible = "realtek,rtl8231-gpio";
 187                 #gpio-cells = <2>;
 188                 indirect-access-bus-id = <0>;
 189                 gpio-controller;
 190
 191                 status = "disabled";
 192         };
 193
 194         pinmux: pinmux@1b001000 {
 195                 compatible = "pinctrl-single";
 196                 reg = <0x1b001000 0x4>;
 197
 198                 pinctrl-single,bit-per-mux;
 199                 pinctrl-single,register-width = <32>;
 200                 pinctrl-single,function-mask = <0x1>;
 201                 #pinctrl-cells = <2>;
 202
 203                 enable_uart1: pinmux_enable_uart1 {
 204                         pinctrl-single,bits = <0x0 0x10 0x10>;
 205                 };
 206         };
 207
 208         /* LED_GLB_CTRL */
 209         pinmux_led: pinmux@1b00a000 {
 210                 compatible = "pinctrl-single";
 211                 reg = <0x1b00a000 0x4>;
 212
 213                 pinctrl-single,bit-per-mux;
 214                 pinctrl-single,register-width = <32>;
 215                 pinctrl-single,function-mask = <0x1>;
 216                 #pinctrl-cells = <2>;
 217
 218                 /* enable GPIO 0 */
 219                 pinmux_disable_sys_led: disable_sys_led {
 220                         pinctrl-single,bits = <0x0 0x0 0x8000>;
 221                 };
 222         };
 223
 224         ethernet0: ethernet@1b00a300 {
 225                 compatible = "realtek,rtl838x-eth";
 226                 reg = <0x1b00a300 0x100>;
 227                 interrupt-parent = <&intc>;
 228                 interrupts = <24>;
 229                 #interrupt-cells = <1>;
 230                 phy-mode = "internal";
 231
 232                 fixed-link {
 233                         speed = <1000>;
 234                         full-duplex;
 235                 };
 236         };
 237
 238         switch0: switch@1b000000 {
 239                 compatible = "realtek,rtl83xx-switch";
 240
 241                 interrupt-parent = <&intc>;
 242                 interrupts = <20>;
 243         };
 244 };