37b149c0693f3892fe9f7bcddf9b1af143508452
[openwrt/staging/jow.git] / target / linux / ramips / patches-4.3 / 0065-mt7688-fixes.patch
1 --- a/arch/mips/ralink/mt7620.c
2 +++ b/arch/mips/ralink/mt7620.c
3 @@ -104,31 +104,31 @@
4 };
5
6 static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
7 - FUNC("sdcx d6", 3, 19, 1),
8 + FUNC("sdxc d6", 3, 19, 1),
9 FUNC("utif", 2, 19, 1),
10 FUNC("gpio", 1, 19, 1),
11 FUNC("pwm1", 0, 19, 1),
12 };
13
14 static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
15 - FUNC("sdcx d7", 3, 18, 1),
16 + FUNC("sdxc d7", 3, 18, 1),
17 FUNC("utif", 2, 18, 1),
18 FUNC("gpio", 1, 18, 1),
19 FUNC("pwm0", 0, 18, 1),
20 };
21
22 static struct rt2880_pmx_func uart2_grp_mt7628[] = {
23 - FUNC("sdcx d5 d4", 3, 20, 2),
24 + FUNC("sdxc d5 d4", 3, 20, 2),
25 FUNC("pwm", 2, 20, 2),
26 FUNC("gpio", 1, 20, 2),
27 - FUNC("uart", 0, 20, 2),
28 + FUNC("uart2", 0, 20, 2),
29 };
30
31 static struct rt2880_pmx_func uart1_grp_mt7628[] = {
32 FUNC("sw_r", 3, 45, 2),
33 FUNC("pwm", 2, 45, 2),
34 FUNC("gpio", 1, 45, 2),
35 - FUNC("uart", 0, 45, 2),
36 + FUNC("uart1", 0, 45, 2),
37 };
38
39 static struct rt2880_pmx_func i2c_grp_mt7628[] = {
40 @@ -140,21 +140,21 @@
41
42 static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 36, 1) };
43 static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 37, 1) };
44 -static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 15, 38) };
45 +static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) };
46 static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) };
47
48 static struct rt2880_pmx_func sd_mode_grp_mt7628[] = {
49 FUNC("jtag", 3, 22, 8),
50 FUNC("utif", 2, 22, 8),
51 FUNC("gpio", 1, 22, 8),
52 - FUNC("sdcx", 0, 22, 8),
53 + FUNC("sdxc", 0, 22, 8),
54 };
55
56 static struct rt2880_pmx_func uart0_grp_mt7628[] = {
57 FUNC("-", 3, 12, 2),
58 FUNC("-", 2, 12, 2),
59 FUNC("gpio", 1, 12, 2),
60 - FUNC("uart", 0, 12, 2),
61 + FUNC("uart0", 0, 12, 2),
62 };
63
64 static struct rt2880_pmx_func i2s_grp_mt7628[] = {
65 @@ -449,6 +449,8 @@
66 ralink_clk_add("10000b00.spi", sys_rate);
67 ralink_clk_add("10000b40.spi", sys_rate);
68 ralink_clk_add("10000c00.uartlite", periph_rate);
69 + ralink_clk_add("10000d00.uart1", periph_rate);
70 + ralink_clk_add("10000e00.uart2", periph_rate);
71 ralink_clk_add("10180000.wmac", xtal_rate);
72
73 if (IS_ENABLED(CONFIG_USB) &&
74 @@ -571,13 +573,13 @@
75
76 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
77
78 - if (ralink_soc == MT762X_SOC_MT7628AN)
79 + if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
80 dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
81 else
82 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
83
84 soc_info->mem_base = MT7620_DRAM_BASE;
85 - if (ralink_soc == MT762X_SOC_MT7628AN)
86 + if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
87 mt7628_dram_init(soc_info);
88 else
89 mt7620_dram_init(soc_info);