target/linux/ramips/patches-4.3/0048-asoc-add-mt7620-support.patch

   1 From 7f29222b1731e8182ba94a331531dec18865a1e4 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 09:31:47 +0100
   4 Subject: [PATCH 48/53] asoc: add mt7620 support
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/ralink/of.c            |    2 +
   9  sound/soc/Kconfig                |    1 +
  10  sound/soc/Makefile               |    1 +
  11  sound/soc/ralink/Kconfig         |   15 ++
  12  sound/soc/ralink/Makefile        |   11 +
  13  sound/soc/ralink/mt7620-i2s.c    |  436 ++++++++++++++++++++++++++++++++++++++
  14  sound/soc/ralink/mt7620-wm8960.c |  233 ++++++++++++++++++++
  15  7 files changed, 699 insertions(+)
  16  create mode 100644 sound/soc/ralink/Kconfig
  17  create mode 100644 sound/soc/ralink/Makefile
  18  create mode 100644 sound/soc/ralink/mt7620-i2s.c
  19  create mode 100644 sound/soc/ralink/mt7620-wm8960.c
  20
  21 diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c
  22 index da85bbf..371baa5 100644
  23 --- a/arch/mips/ralink/of.c
  24 +++ b/arch/mips/ralink/of.c
  25 @@ -15,6 +15,7 @@
  26  #include <linux/of_fdt.h>
  27  #include <linux/kernel.h>
  28  #include <linux/bootmem.h>
  29 +#include <linux/module.h>
  30  #include <linux/of_platform.h>
  31  #include <linux/of_address.h>
  32
  33 @@ -26,6 +27,7 @@
  34  #include "common.h"
  35
  36  __iomem void *rt_sysc_membase;
  37 +EXPORT_SYMBOL(rt_sysc_membase);
  38  __iomem void *rt_memc_membase;
  39
  40  __iomem void *plat_of_remap_node(const char *node)
  41 diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
  42 index 225bfda..76ce95c 100644
  43 --- a/sound/soc/Kconfig
  44 +++ b/sound/soc/Kconfig
  45 @@ -53,6 +53,7 @@ source "sound/soc/mxs/Kconfig"
  46  source "sound/soc/pxa/Kconfig"
  47  source "sound/soc/qcom/Kconfig"
  48  source "sound/soc/rockchip/Kconfig"
  49 +source "sound/soc/ralink/Kconfig"
  50  source "sound/soc/samsung/Kconfig"
  51  source "sound/soc/sh/Kconfig"
  52  source "sound/soc/sirf/Kconfig"
  53 diff --git a/sound/soc/Makefile b/sound/soc/Makefile
  54 index 134aca1..e9d8e0e 100644
  55 --- a/sound/soc/Makefile
  56 +++ b/sound/soc/Makefile
  57 @@ -35,6 +35,7 @@ obj-$(CONFIG_SND_SOC) += kirkwood/
  58  obj-$(CONFIG_SND_SOC)  += pxa/
  59  obj-$(CONFIG_SND_SOC)  += qcom/
  60  obj-$(CONFIG_SND_SOC)  += rockchip/
  61 +obj-$(CONFIG_SND_SOC)  += ralink/
  62  obj-$(CONFIG_SND_SOC)  += samsung/
  63  obj-$(CONFIG_SND_SOC)  += sh/
  64  obj-$(CONFIG_SND_SOC)  += sirf/
  65 diff --git a/sound/soc/ralink/Kconfig b/sound/soc/ralink/Kconfig
  66 new file mode 100644
  67 index 0000000..d462622
  68 --- /dev/null
  69 +++ b/sound/soc/ralink/Kconfig
  70 @@ -0,0 +1,15 @@
  71 +config SND_MT7620_SOC_I2S
  72 +       depends on SOC_MT7620 && SND_SOC
  73 +       select SND_SOC_GENERIC_DMAENGINE_PCM
  74 +       tristate "SoC Audio (I2S protocol) for Ralink MT7620 SoC"
  75 +       help
  76 +         Say Y if you want to use I2S protocol and I2S codec on Ingenic MT7620
  77 +         based boards.
  78 +
  79 +config SND_MT7620_SOC_WM8960
  80 +       tristate "SoC Audio support for Ralink WM8960"
  81 +       select SND_MT7620_SOC_I2S
  82 +       select SND_SOC_WM8960
  83 +       help
  84 +         Say Y if you want to add support for ASoC audio on the Qi LB60 board
  85 +         a.k.a Qi Ben NanoNote.
  86 diff --git a/sound/soc/ralink/Makefile b/sound/soc/ralink/Makefile
  87 new file mode 100644
  88 index 0000000..3d79980
  89 --- /dev/null
  90 +++ b/sound/soc/ralink/Makefile
  91 @@ -0,0 +1,11 @@
  92 +#
  93 +# Jz4740 Platform Support
  94 +#
  95 +snd-soc-mt7620-i2s-objs := mt7620-i2s.o
  96 +
  97 +obj-$(CONFIG_SND_MT7620_SOC_I2S) += snd-soc-mt7620-i2s.o
  98 +
  99 +# Jz4740 Machine Support
 100 +snd-soc-mt7620-wm8960-objs := mt7620-wm8960.o
 101 +
 102 +obj-$(CONFIG_SND_MT7620_SOC_WM8960) += snd-soc-mt7620-wm8960.o
 103 diff --git a/sound/soc/ralink/mt7620-i2s.c b/sound/soc/ralink/mt7620-i2s.c
 104 new file mode 100644
 105 index 0000000..2ce9b21
 106 --- /dev/null
 107 +++ b/sound/soc/ralink/mt7620-i2s.c
 108 @@ -0,0 +1,436 @@
 109 +/*
 110 + *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
 111 + *
 112 + *  This program is free software; you can redistribute it and/or modify it
 113 + *  under  the terms of the GNU General  Public License as published by the
 114 + *  Free Software Foundation;  either version 2 of the License, or (at your
 115 + *  option) any later version.
 116 + *
 117 + *  You should have received a copy of the GNU General Public License along
 118 + *  with this program; if not, write to the Free Software Foundation, Inc.,
 119 + *  675 Mass Ave, Cambridge, MA 02139, USA.
 120 + *
 121 + */
 122 +
 123 +#include <linux/init.h>
 124 +#include <linux/io.h>
 125 +#include <linux/kernel.h>
 126 +#include <linux/module.h>
 127 +#include <linux/platform_device.h>
 128 +#include <linux/slab.h>
 129 +
 130 +#include <linux/delay.h>
 131 +
 132 +#include <linux/dma-mapping.h>
 133 +
 134 +#include <sound/core.h>
 135 +#include <sound/pcm.h>
 136 +#include <sound/pcm_params.h>
 137 +#include <sound/soc.h>
 138 +#include <sound/initval.h>
 139 +#include <sound/dmaengine_pcm.h>
 140 +
 141 +#include <ralink_regs.h>
 142 +
 143 +#define I2S_REG_CFG0           0x00
 144 +#define I2S_REG_CFG0_EN                BIT(31)
 145 +#define I2S_REG_CFG0_DMA_EN    BIT(30)
 146 +#define I2S_REG_CFG0_BYTE_SWAP BIT(28)
 147 +#define I2S_REG_CFG0_TX_EN     BIT(24)
 148 +#define I2S_REG_CFG0_RX_EN     BIT(20)
 149 +#define I2S_REG_CFG0_SLAVE     BIT(16)
 150 +#define I2S_REG_CFG0_RX_THRES  12
 151 +#define I2S_REG_CFG0_TX_THRES  4
 152 +#define I2S_REG_CFG0_DFT_THRES (4 << I2S_REG_CFG0_RX_THRES) | \
 153 +                                       (4 << I2S_REG_CFG0_TX_THRES)
 154 +
 155 +#define I2S_REG_INT_STATUS     0x04
 156 +#define I2S_REG_INT_EN         0x08
 157 +#define I2S_REG_FF_STATUS      0x0c
 158 +#define I2S_REG_WREG           0x10
 159 +#define I2S_REG_RREG           0x14
 160 +#define I2S_REG_CFG1           0x18
 161 +
 162 +#define I2S_REG_DIVCMP         0x20
 163 +#define I2S_REG_DIVINT         0x24
 164 +#define I2S_REG_CLK_EN         BIT(31)
 165 +
 166 +struct mt7620_i2s {
 167 +       struct resource *mem;
 168 +       void __iomem *base;
 169 +       dma_addr_t phys_base;
 170 +
 171 +       struct snd_dmaengine_dai_dma_data playback_dma_data;
 172 +       struct snd_dmaengine_dai_dma_data capture_dma_data;
 173 +};
 174 +
 175 +static inline uint32_t mt7620_i2s_read(const struct mt7620_i2s *i2s,
 176 +       unsigned int reg)
 177 +{
 178 +       return readl(i2s->base + reg);
 179 +}
 180 +
 181 +static inline void mt7620_i2s_write(const struct mt7620_i2s *i2s,
 182 +       unsigned int reg, uint32_t value)
 183 +{
 184 +       //printk("i2s --> %p = 0x%08X\n", i2s->base + reg, value);
 185 +       writel(value, i2s->base + reg);
 186 +}
 187 +
 188 +static int mt7620_i2s_startup(struct snd_pcm_substream *substream,
 189 +       struct snd_soc_dai *dai)
 190 +{
 191 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 192 +       uint32_t cfg;
 193 +
 194 +       if (dai->active)
 195 +               return 0;
 196 +
 197 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 198 +       cfg |= I2S_REG_CFG0_EN;
 199 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 200 +
 201 +       return 0;
 202 +}
 203 +
 204 +static void mt7620_i2s_shutdown(struct snd_pcm_substream *substream,
 205 +       struct snd_soc_dai *dai)
 206 +{
 207 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 208 +       uint32_t cfg;
 209 +
 210 +       if (dai->active)
 211 +               return;
 212 +
 213 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 214 +       cfg &= ~I2S_REG_CFG0_EN;
 215 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 216 +}
 217 +
 218 +static int mt7620_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 219 +       struct snd_soc_dai *dai)
 220 +{
 221 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 222 +
 223 +       uint32_t cfg;
 224 +       uint32_t mask;
 225 +
 226 +       if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 227 +               mask = I2S_REG_CFG0_TX_EN;
 228 +       else
 229 +               mask = I2S_REG_CFG0_RX_EN;
 230 +
 231 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 232 +
 233 +       switch (cmd) {
 234 +       case SNDRV_PCM_TRIGGER_START:
 235 +       case SNDRV_PCM_TRIGGER_RESUME:
 236 +       case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 237 +               cfg |= mask;
 238 +               break;
 239 +       case SNDRV_PCM_TRIGGER_STOP:
 240 +       case SNDRV_PCM_TRIGGER_SUSPEND:
 241 +       case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 242 +               cfg &= ~mask;
 243 +               break;
 244 +       default:
 245 +               return -EINVAL;
 246 +       }
 247 +
 248 +       if (cfg & (I2S_REG_CFG0_TX_EN | I2S_REG_CFG0_RX_EN))
 249 +               cfg |= I2S_REG_CFG0_DMA_EN;
 250 +       else
 251 +               cfg &= ~I2S_REG_CFG0_DMA_EN;
 252 +
 253 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 254 +
 255 +       return 0;
 256 +}
 257 +
 258 +static int mt7620_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 259 +{
 260 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 261 +       uint32_t cfg;
 262 +
 263 +       cfg = mt7620_i2s_read(i2s, I2S_REG_CFG0);
 264 +
 265 +       switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 266 +       case SND_SOC_DAIFMT_CBS_CFS:
 267 +               cfg |= I2S_REG_CFG0_SLAVE;
 268 +               break;
 269 +       case SND_SOC_DAIFMT_CBM_CFM:
 270 +               cfg &= ~I2S_REG_CFG0_SLAVE;
 271 +               break;
 272 +       case SND_SOC_DAIFMT_CBM_CFS:
 273 +       default:
 274 +               return -EINVAL;
 275 +       }
 276 +
 277 +       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 278 +       case SND_SOC_DAIFMT_I2S:
 279 +       case SND_SOC_DAIFMT_MSB:
 280 +               cfg &= ~I2S_REG_CFG0_BYTE_SWAP;
 281 +               break;
 282 +       case SND_SOC_DAIFMT_LSB:
 283 +               cfg |= I2S_REG_CFG0_BYTE_SWAP;
 284 +               break;
 285 +       default:
 286 +               return -EINVAL;
 287 +       }
 288 +
 289 +       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 290 +       case SND_SOC_DAIFMT_NB_NF:
 291 +               break;
 292 +       default:
 293 +               return -EINVAL;
 294 +       }
 295 +
 296 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, cfg);
 297 +
 298 +       return 0;
 299 +}
 300 +
 301 +static int mt7620_i2s_hw_params(struct snd_pcm_substream *substream,
 302 +       struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 303 +{
 304 +
 305 +       return 0;
 306 +}
 307 +
 308 +unsigned long i2sMaster_inclk_int[11] = {
 309 +       78,     56,     52,     39,     28,     26,     19,     14,     13,     9,      6};
 310 +unsigned long i2sMaster_inclk_comp[11] = {
 311 +       64,     352,    42,     32,     176,    21,     272,    88,     10,     455,    261};
 312 +
 313 +
 314 +static int mt7620_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 315 +       unsigned int freq, int dir)
 316 +{
 317 +        struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 318 +
 319 +       printk("Internal REFCLK with fractional division\n");
 320 +
 321 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 322 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 323 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 324 +
 325 +/*     struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 326 +       struct clk *parent;
 327 +       int ret = 0;
 328 +
 329 +       switch (clk_id) {
 330 +       case JZ4740_I2S_CLKSRC_EXT:
 331 +               parent = clk_get(NULL, "ext");
 332 +               clk_set_parent(i2s->clk_i2s, parent);
 333 +               break;
 334 +       case JZ4740_I2S_CLKSRC_PLL:
 335 +               parent = clk_get(NULL, "pll half");
 336 +               clk_set_parent(i2s->clk_i2s, parent);
 337 +               ret = clk_set_rate(i2s->clk_i2s, freq);
 338 +               break;
 339 +       default:
 340 +               return -EINVAL;
 341 +       }
 342 +       clk_put(parent);
 343 +
 344 +       return ret;*/
 345 +       return 0;
 346 +}
 347 +
 348 +static void mt7620_i2c_init_pcm_config(struct mt7620_i2s *i2s)
 349 +{
 350 +       struct snd_dmaengine_dai_dma_data *dma_data;
 351 +
 352 +       /* Playback */
 353 +       dma_data = &i2s->playback_dma_data;
 354 +       dma_data->maxburst = 16;
 355 +       dma_data->slave_id = 2; //JZ4740_DMA_TYPE_AIC_TRANSMIT;
 356 +       dma_data->addr = i2s->phys_base + I2S_REG_WREG;
 357 +
 358 +       /* Capture */
 359 +       dma_data = &i2s->capture_dma_data;
 360 +       dma_data->maxburst = 16;
 361 +       dma_data->slave_id = 3; //JZ4740_DMA_TYPE_AIC_RECEIVE;
 362 +       dma_data->addr = i2s->phys_base + I2S_REG_RREG;
 363 +}
 364 +
 365 +static int mt7620_i2s_dai_probe(struct snd_soc_dai *dai)
 366 +{
 367 +       struct mt7620_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 368 +       uint32_t data;
 369 +
 370 +       mt7620_i2c_init_pcm_config(i2s);
 371 +       dai->playback_dma_data = &i2s->playback_dma_data;
 372 +       dai->capture_dma_data = &i2s->capture_dma_data;
 373 +
 374 +       /* set share pins to i2s/gpio mode and i2c mode */
 375 +       data = rt_sysc_r32(0x60);
 376 +       data &= 0xFFFFFFE2;
 377 +       data |= 0x00000018;
 378 +       rt_sysc_w32(data, 0x60);
 379 +
 380 +       printk("Internal REFCLK with fractional division\n");
 381 +
 382 +       mt7620_i2s_write(i2s, I2S_REG_CFG0, I2S_REG_CFG0_DFT_THRES);
 383 +       mt7620_i2s_write(i2s, I2S_REG_CFG1, 0);
 384 +       mt7620_i2s_write(i2s, I2S_REG_INT_EN, 0);
 385 +
 386 +       mt7620_i2s_write(i2s, I2S_REG_DIVINT, i2sMaster_inclk_int[7]);
 387 +       mt7620_i2s_write(i2s, I2S_REG_DIVCMP,
 388 +               i2sMaster_inclk_comp[7] | I2S_REG_CLK_EN);
 389 +
 390 +       return 0;
 391 +}
 392 +
 393 +static int mt7620_i2s_dai_remove(struct snd_soc_dai *dai)
 394 +{
 395 +       return 0;
 396 +}
 397 +
 398 +static const struct snd_soc_dai_ops mt7620_i2s_dai_ops = {
 399 +       .startup = mt7620_i2s_startup,
 400 +       .shutdown = mt7620_i2s_shutdown,
 401 +       .trigger = mt7620_i2s_trigger,
 402 +       .hw_params = mt7620_i2s_hw_params,
 403 +       .set_fmt = mt7620_i2s_set_fmt,
 404 +       .set_sysclk = mt7620_i2s_set_sysclk,
 405 +};
 406 +
 407 +#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
 408 +                        SNDRV_PCM_FMTBIT_S24_LE)
 409 +
 410 +static struct snd_soc_dai_driver mt7620_i2s_dai = {
 411 +       .probe = mt7620_i2s_dai_probe,
 412 +       .remove = mt7620_i2s_dai_remove,
 413 +       .playback = {
 414 +               .channels_min = 1,
 415 +               .channels_max = 2,
 416 +               .rates = SNDRV_PCM_RATE_8000_48000,
 417 +               .formats = JZ4740_I2S_FMTS,
 418 +       },
 419 +       .capture = {
 420 +               .channels_min = 2,
 421 +               .channels_max = 2,
 422 +               .rates = SNDRV_PCM_RATE_8000_48000,
 423 +               .formats = JZ4740_I2S_FMTS,
 424 +       },
 425 +       .symmetric_rates = 1,
 426 +       .ops = &mt7620_i2s_dai_ops,
 427 +};
 428 +
 429 +static const struct snd_pcm_hardware mt7620_pcm_hardware = {
 430 +       .info = SNDRV_PCM_INFO_MMAP |
 431 +               SNDRV_PCM_INFO_MMAP_VALID |
 432 +               SNDRV_PCM_INFO_INTERLEAVED |
 433 +               SNDRV_PCM_INFO_BLOCK_TRANSFER,
 434 +       .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
 435 +       .period_bytes_min       = PAGE_SIZE,
 436 +       .period_bytes_max       = 64 * 1024,
 437 +       .periods_min            = 2,
 438 +       .periods_max            = 128,
 439 +       .buffer_bytes_max       = 128 * 1024,
 440 +       .fifo_size              = 32,
 441 +};
 442 +
 443 +static const struct snd_dmaengine_pcm_config mt7620_dmaengine_pcm_config = {
 444 +       .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
 445 +       .pcm_hardware = &mt7620_pcm_hardware,
 446 +       .prealloc_buffer_size = 256 * PAGE_SIZE,
 447 +};
 448 +
 449 +static const struct snd_soc_component_driver mt7620_i2s_component = {
 450 +       .name = "mt7620-i2s",
 451 +};
 452 +
 453 +static int mt7620_i2s_dev_probe(struct platform_device *pdev)
 454 +{
 455 +       struct mt7620_i2s *i2s;
 456 +       int ret;
 457 +
 458 +       snd_dmaengine_pcm_register(&pdev->dev,
 459 +               &mt7620_dmaengine_pcm_config,
 460 +               SND_DMAENGINE_PCM_FLAG_COMPAT);
 461 +
 462 +       i2s = kzalloc(sizeof(*i2s), GFP_KERNEL);
 463 +       if (!i2s)
 464 +               return -ENOMEM;
 465 +
 466 +       i2s->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 467 +       if (!i2s->mem) {
 468 +               ret = -ENOENT;
 469 +               goto err_free;
 470 +       }
 471 +
 472 +       i2s->mem = request_mem_region(i2s->mem->start, resource_size(i2s->mem),
 473 +                               pdev->name);
 474 +       if (!i2s->mem) {
 475 +               ret = -EBUSY;
 476 +               goto err_free;
 477 +       }
 478 +
 479 +       i2s->base = ioremap_nocache(i2s->mem->start, resource_size(i2s->mem));
 480 +       if (!i2s->base) {
 481 +               ret = -EBUSY;
 482 +               goto err_release_mem_region;
 483 +       }
 484 +
 485 +       i2s->phys_base = i2s->mem->start;
 486 +
 487 +       platform_set_drvdata(pdev, i2s);
 488 +       ret = snd_soc_register_component(&pdev->dev, &mt7620_i2s_component,
 489 +                                        &mt7620_i2s_dai, 1);
 490 +
 491 +       if (!ret) {
 492 +               dev_err(&pdev->dev, "loaded\n");
 493 +               return ret;
 494 +       }
 495 +
 496 +       dev_err(&pdev->dev, "Failed to register DAI\n");
 497 +       iounmap(i2s->base);
 498 +
 499 +err_release_mem_region:
 500 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 501 +err_free:
 502 +       kfree(i2s);
 503 +
 504 +       return ret;
 505 +}
 506 +
 507 +static int mt7620_i2s_dev_remove(struct platform_device *pdev)
 508 +{
 509 +       struct mt7620_i2s *i2s = platform_get_drvdata(pdev);
 510 +
 511 +       snd_soc_unregister_component(&pdev->dev);
 512 +
 513 +       iounmap(i2s->base);
 514 +       release_mem_region(i2s->mem->start, resource_size(i2s->mem));
 515 +
 516 +       kfree(i2s);
 517 +
 518 +       snd_dmaengine_pcm_unregister(&pdev->dev);
 519 +
 520 +       return 0;
 521 +}
 522 +
 523 +static const struct of_device_id mt7620_i2s_match[] = {
 524 +       { .compatible = "ralink,mt7620a-i2s" },
 525 +       {},
 526 +};
 527 +MODULE_DEVICE_TABLE(of, mt7620_i2s_match);
 528 +
 529 +static struct platform_driver mt7620_i2s_driver = {
 530 +       .probe = mt7620_i2s_dev_probe,
 531 +       .remove = mt7620_i2s_dev_remove,
 532 +       .driver = {
 533 +               .name = "mt7620-i2s",
 534 +               .owner = THIS_MODULE,
 535 +               .of_match_table = mt7620_i2s_match,
 536 +       },
 537 +};
 538 +
 539 +module_platform_driver(mt7620_i2s_driver);
 540 +
 541 +MODULE_AUTHOR("Lars-Peter Clausen, <lars@metafoo.de>");
 542 +MODULE_DESCRIPTION("Ingenic JZ4740 SoC I2S driver");
 543 +MODULE_LICENSE("GPL");
 544 +MODULE_ALIAS("platform:mt7620-i2s");
 545 diff --git a/sound/soc/ralink/mt7620-wm8960.c b/sound/soc/ralink/mt7620-wm8960.c
 546 new file mode 100644
 547 index 0000000..3389988
 548 --- /dev/null
 549 +++ b/sound/soc/ralink/mt7620-wm8960.c
 550 @@ -0,0 +1,233 @@
 551 +/*
 552 + * Copyright 2013 Freescale Semiconductor, Inc.
 553 + *
 554 + * Based on mt7620-sgtl5000.c
 555 + * Copyright 2012 Freescale Semiconductor, Inc.
 556 + * Copyright 2012 Linaro Ltd.
 557 + *
 558 + * The code contained herein is licensed under the GNU General Public
 559 + * License. You may obtain a copy of the GNU General Public License
 560 + * Version 2 or later at the following locations:
 561 + *
 562 + * http://www.opensource.org/licenses/gpl-license.html
 563 + * http://www.gnu.org/copyleft/gpl.html
 564 + */
 565 +
 566 +#include <linux/module.h>
 567 +#include <linux/of_platform.h>
 568 +#include <linux/i2c.h>
 569 +#include <linux/slab.h>
 570 +#include <sound/soc.h>
 571 +#include <sound/pcm_params.h>
 572 +#include <sound/soc-dapm.h>
 573 +#include <linux/pinctrl/consumer.h>
 574 +
 575 +#include "../codecs/wm8960.h"
 576 +
 577 +#define DAI_NAME_SIZE  32
 578 +
 579 +struct mt7620_wm8960_data {
 580 +       struct snd_soc_dai_link dai;
 581 +       struct snd_soc_card card;
 582 +       char codec_dai_name[DAI_NAME_SIZE];
 583 +       char platform_name[DAI_NAME_SIZE];
 584 +       unsigned int clk_frequency;
 585 +};
 586 +
 587 +struct mt7620_priv {
 588 +       struct platform_device *pdev;
 589 +};
 590 +static struct mt7620_priv card_priv;
 591 +
 592 +static const struct snd_soc_dapm_widget mt7620_wm8960_dapm_widgets[] = {
 593 +       SND_SOC_DAPM_HP("Headphone Jack", NULL),
 594 +       SND_SOC_DAPM_SPK("Ext Spk", NULL),
 595 +       SND_SOC_DAPM_MIC("AMIC", NULL),
 596 +       SND_SOC_DAPM_MIC("DMIC", NULL),
 597 +};
 598 +
 599 +static int sample_rate = 44100;
 600 +static snd_pcm_format_t sample_format = SNDRV_PCM_FORMAT_S16_LE;
 601 +
 602 +static int mt7620_hifi_hw_params(struct snd_pcm_substream *substream,
 603 +               struct snd_pcm_hw_params *params)
 604 +{
 605 +       sample_rate = params_rate(params);
 606 +       sample_format = params_format(params);
 607 +
 608 +       return 0;
 609 +}
 610 +
 611 +static struct snd_soc_ops mt7620_hifi_ops = {
 612 +       .hw_params = mt7620_hifi_hw_params,
 613 +};
 614 +
 615 +static int mt7620_wm8960_set_bias_level(struct snd_soc_card *card,
 616 +                                       struct snd_soc_dapm_context *dapm,
 617 +                                       enum snd_soc_bias_level level)
 618 +{
 619 +       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
 620 +       struct mt7620_priv *priv = &card_priv;
 621 +       struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
 622 +       struct device *dev = &priv->pdev->dev;
 623 +       int ret;
 624 +
 625 +       if (dapm->dev != codec_dai->dev)
 626 +               return 0;
 627 +
 628 +       switch (level) {
 629 +       case SND_SOC_BIAS_PREPARE:
 630 +               if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
 631 +               }
 632 +               break;
 633 +
 634 +       case SND_SOC_BIAS_STANDBY:
 635 +               if (dapm->bias_level == SND_SOC_BIAS_PREPARE) {
 636 +                       ret = snd_soc_dai_set_sysclk(codec_dai,
 637 +                                       WM8960_SYSCLK_MCLK, data->clk_frequency,
 638 +                                       SND_SOC_CLOCK_IN);
 639 +                       if (ret < 0) {
 640 +                               dev_err(dev,
 641 +                                       "failed to switch away from FLL: %d\n",
 642 +                                       ret);
 643 +                               return ret;
 644 +                       }
 645 +               }
 646 +               break;
 647 +
 648 +       default:
 649 +               break;
 650 +       }
 651 +
 652 +       return 0;
 653 +}
 654 +
 655 +static int mt7620_wm8960_late_probe(struct snd_soc_card *card)
 656 +{
 657 +       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
 658 +       struct mt7620_priv *priv = &card_priv;
 659 +       struct mt7620_wm8960_data *data = snd_soc_card_get_drvdata(card);
 660 +       struct device *dev = &priv->pdev->dev;
 661 +       int ret;
 662 +
 663 +       ret = snd_soc_dai_set_sysclk(codec_dai, WM8960_SYSCLK_MCLK,
 664 +                       data->clk_frequency, SND_SOC_CLOCK_IN);
 665 +       if (ret < 0)
 666 +               dev_err(dev, "failed to set sysclk in %s\n", __func__);
 667 +
 668 +       return ret;
 669 +}
 670 +
 671 +static int mt7620_wm8960_probe(struct platform_device *pdev)
 672 +{
 673 +       struct device_node *i2s_np, *codec_np;
 674 +       struct platform_device *i2s_pdev;
 675 +       struct mt7620_priv *priv = &card_priv;
 676 +       struct i2c_client *codec_dev;
 677 +       struct mt7620_wm8960_data *data;
 678 +       int ret;
 679 +
 680 +       priv->pdev = pdev;
 681 +
 682 +       i2s_np = of_parse_phandle(pdev->dev.of_node, "i2s-controller", 0);
 683 +       codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0);
 684 +       if (!i2s_np || !codec_np) {
 685 +               dev_err(&pdev->dev, "phandle missing or invalid\n");
 686 +               ret = -EINVAL;
 687 +               goto fail;
 688 +       }
 689 +
 690 +       i2s_pdev = of_find_device_by_node(i2s_np);
 691 +       if (!i2s_pdev) {
 692 +               dev_err(&pdev->dev, "failed to find SSI platform device\n");
 693 +               ret = -EINVAL;
 694 +               goto fail;
 695 +       }
 696 +       codec_dev = of_find_i2c_device_by_node(codec_np);
 697 +       if (!codec_dev || !codec_dev->dev.driver) {
 698 +               dev_err(&pdev->dev, "failed to find codec platform device\n");
 699 +               ret = -EINVAL;
 700 +               goto fail;
 701 +       }
 702 +
 703 +       data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 704 +       if (!data) {
 705 +               ret = -ENOMEM;
 706 +               goto fail;
 707 +       }
 708 +
 709 +       data->clk_frequency = 12000000;
 710 +       data->dai.name = "HiFi";
 711 +       data->dai.stream_name = "HiFi";
 712 +       data->dai.codec_dai_name = "wm8960-hifi";
 713 +       data->dai.codec_of_node = codec_np;
 714 +       data->dai.cpu_dai_name = dev_name(&i2s_pdev->dev);
 715 +       data->dai.platform_of_node = i2s_np;
 716 +       data->dai.ops = &mt7620_hifi_ops;
 717 +       data->dai.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
 718 +                           SND_SOC_DAIFMT_CBM_CFM;
 719 +
 720 +       data->card.dev = &pdev->dev;
 721 +       ret = snd_soc_of_parse_card_name(&data->card, "model");
 722 +       if (ret)
 723 +               goto fail;
 724 +       ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing");
 725 +       if (ret)
 726 +               goto fail;
 727 +       data->card.num_links = 1;
 728 +       data->card.dai_link = &data->dai;
 729 +       data->card.dapm_widgets = mt7620_wm8960_dapm_widgets;
 730 +       data->card.num_dapm_widgets = ARRAY_SIZE(mt7620_wm8960_dapm_widgets);
 731 +
 732 +       data->card.late_probe = mt7620_wm8960_late_probe;
 733 +       data->card.set_bias_level = mt7620_wm8960_set_bias_level;
 734 +
 735 +       platform_set_drvdata(pdev, &data->card);
 736 +       snd_soc_card_set_drvdata(&data->card, data);
 737 +
 738 +       ret = devm_snd_soc_register_card(&pdev->dev, &data->card);
 739 +       if (ret) {
 740 +               dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
 741 +               goto fail;
 742 +       }
 743 +
 744 +       of_node_put(i2s_np);
 745 +       of_node_put(codec_np);
 746 +
 747 +       return 0;
 748 +fail:
 749 +       if (i2s_np)
 750 +               of_node_put(i2s_np);
 751 +       if (codec_np)
 752 +               of_node_put(codec_np);
 753 +
 754 +       return ret;
 755 +}
 756 +
 757 +static int mt7620_wm8960_remove(struct platform_device *pdev)
 758 +{
 759 +       return 0;
 760 +}
 761 +
 762 +static const struct of_device_id mt7620_wm8960_dt_ids[] = {
 763 +       { .compatible = "mediatek,mt7620-audio-wm8960", },
 764 +       { /* sentinel */ }
 765 +};
 766 +MODULE_DEVICE_TABLE(of, mt7620_wm8960_dt_ids);
 767 +
 768 +static struct platform_driver mt7620_wm8960_driver = {
 769 +       .driver = {
 770 +               .name = "mt7620-wm8960",
 771 +               .owner = THIS_MODULE,
 772 +               .pm = &snd_soc_pm_ops,
 773 +               .of_match_table = mt7620_wm8960_dt_ids,
 774 +       },
 775 +       .probe = mt7620_wm8960_probe,
 776 +       .remove = mt7620_wm8960_remove,
 777 +};
 778 +module_platform_driver(mt7620_wm8960_driver);
 779 +
 780 +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 781 +MODULE_DESCRIPTION("Freescale i.MX WM8962 ASoC machine driver");
 782 +MODULE_LICENSE("GPL v2");
 783 +MODULE_ALIAS("platform:mt7620-wm8962");
 784 --
 785 1.7.10.4
 786