1 From 22ee5168a5dfeda748cabd0bbf728d6bdc6b925b Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 7 Dec 2015 17:12:38 +0100
4 Subject: [PATCH 11/53] arch: mips: ralink: unify soc detection
6 Signed-off-by: John Crispin <blogic@openwrt.org>
8 arch/mips/include/asm/mach-ralink/mt7620.h | 8 --------
9 arch/mips/include/asm/mach-ralink/ralink_regs.h | 14 ++++++++++++++
10 arch/mips/include/asm/mach-ralink/rt305x.h | 21 ++++++---------------
11 arch/mips/ralink/prom.c | 5 ++++-
12 arch/mips/ralink/rt305x.c | 12 +++++-------
13 5 files changed, 29 insertions(+), 31 deletions(-)
15 diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
16 index 72e64fa..0ef882b 100644
17 --- a/arch/mips/include/asm/mach-ralink/mt7620.h
18 +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
20 #ifndef _MT7620_REGS_H_
21 #define _MT7620_REGS_H_
23 -enum mt762x_soc_type {
24 - MT762X_SOC_UNKNOWN = 0,
27 - MT762X_SOC_MT7628AN,
29 -extern enum mt762x_soc_type mt762x_soc;
31 #define MT7620_SYSC_BASE 0x10000000
33 #define SYSC_REG_CHIP_NAME0 0x00
34 diff --git a/arch/mips/include/asm/mach-ralink/ralink_regs.h b/arch/mips/include/asm/mach-ralink/ralink_regs.h
35 index bd93014..8fcbd0f 100644
36 --- a/arch/mips/include/asm/mach-ralink/ralink_regs.h
37 +++ b/arch/mips/include/asm/mach-ralink/ralink_regs.h
39 #ifndef _RALINK_REGS_H_
40 #define _RALINK_REGS_H_
42 +enum ralink_soc_type {
51 + MT762X_SOC_MT7621AT,
52 + MT762X_SOC_MT7628AN,
54 +extern enum ralink_soc_type ralink_soc;
56 extern __iomem void *rt_sysc_membase;
57 extern __iomem void *rt_memc_membase;
59 diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h b/arch/mips/include/asm/mach-ralink/rt305x.h
60 index 96f731b..2eea793 100644
61 --- a/arch/mips/include/asm/mach-ralink/rt305x.h
62 +++ b/arch/mips/include/asm/mach-ralink/rt305x.h
64 #ifndef _RT305X_REGS_H_
65 #define _RT305X_REGS_H_
67 -enum rt305x_soc_type {
68 - RT305X_SOC_UNKNOWN = 0,
76 -extern enum rt305x_soc_type rt305x_soc;
77 +extern enum ralink_soc_type ralink_soc;
79 static inline int soc_is_rt3050(void)
81 - return rt305x_soc == RT305X_SOC_RT3050;
82 + return ralink_soc == RT305X_SOC_RT3050;
85 static inline int soc_is_rt3052(void)
87 - return rt305x_soc == RT305X_SOC_RT3052;
88 + return ralink_soc == RT305X_SOC_RT3052;
91 static inline int soc_is_rt305x(void)
92 @@ -41,17 +32,17 @@ static inline int soc_is_rt305x(void)
94 static inline int soc_is_rt3350(void)
96 - return rt305x_soc == RT305X_SOC_RT3350;
97 + return ralink_soc == RT305X_SOC_RT3350;
100 static inline int soc_is_rt3352(void)
102 - return rt305x_soc == RT305X_SOC_RT3352;
103 + return ralink_soc == RT305X_SOC_RT3352;
106 static inline int soc_is_rt5350(void)
108 - return rt305x_soc == RT305X_SOC_RT5350;
109 + return ralink_soc == RT305X_SOC_RT5350;
112 #define RT305X_SYSC_BASE 0x10000000
113 diff --git a/arch/mips/ralink/prom.c b/arch/mips/ralink/prom.c
114 index 09419f6..d0978d5 100644
115 --- a/arch/mips/ralink/prom.c
116 +++ b/arch/mips/ralink/prom.c
118 #include <asm/bootinfo.h>
119 #include <asm/addrspace.h>
121 +#include <asm/mach-ralink/ralink_regs.h>
125 struct ralink_soc_info soc_info;
126 -struct rt2880_pmx_group *rt2880_pinmux_data = NULL;
127 +enum ralink_soc_type ralink_soc;
128 +EXPORT_SYMBOL_GPL(ralink_soc);
130 const char *get_system_type(void)
132 diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
133 index eeb747a..51f33a5 100644
134 --- a/arch/mips/ralink/rt305x.c
135 +++ b/arch/mips/ralink/rt305x.c
140 -enum rt305x_soc_type rt305x_soc;
142 static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
143 static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) };
144 static struct rt2880_pmx_func uartf_func[] = {
145 @@ -236,24 +234,24 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
147 icache_sets = (read_c0_config1() >> 22) & 7;
148 if (icache_sets == 1) {
149 - rt305x_soc = RT305X_SOC_RT3050;
150 + ralink_soc = RT305X_SOC_RT3050;
152 soc_info->compatible = "ralink,rt3050-soc";
154 - rt305x_soc = RT305X_SOC_RT3052;
155 + ralink_soc = RT305X_SOC_RT3052;
157 soc_info->compatible = "ralink,rt3052-soc";
159 } else if (n0 == RT3350_CHIP_NAME0 && n1 == RT3350_CHIP_NAME1) {
160 - rt305x_soc = RT305X_SOC_RT3350;
161 + ralink_soc = RT305X_SOC_RT3350;
163 soc_info->compatible = "ralink,rt3350-soc";
164 } else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) {
165 - rt305x_soc = RT305X_SOC_RT3352;
166 + ralink_soc = RT305X_SOC_RT3352;
168 soc_info->compatible = "ralink,rt3352-soc";
169 } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) {
170 - rt305x_soc = RT305X_SOC_RT5350;
171 + ralink_soc = RT305X_SOC_RT5350;
173 soc_info->compatible = "ralink,rt5350-soc";