target/linux/ramips/patches-3.8/0204-owrt-MIPS-ralink-add-usb-platform-support.patch

   1 From d7e679017ec92824145b275572f6ef83d461f076 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Tue, 19 Mar 2013 09:26:22 +0100
   4 Subject: [PATCH 204/208] owrt: MIPS: ralink: add usb platform support
   5
   6 Add code to load the platform ehci/ohci driver on Ralink SoC. For the usb core
   7 to work we need to populate the platform_data during boot, prior to the usb
   8 driver being loaded.
   9
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 ---
  12  arch/mips/ralink/Makefile     |    4 +-
  13  arch/mips/ralink/common.h     |    1 +
  14  arch/mips/ralink/mt7620.c     |    5 ++
  15  arch/mips/ralink/of.c         |    1 +
  16  arch/mips/ralink/rt305x-usb.c |  120 +++++++++++++++++++++++++++++++++++++++++
  17  arch/mips/ralink/rt3883-usb.c |  118 ++++++++++++++++++++++++++++++++++++++++
  18  6 files changed, 247 insertions(+), 2 deletions(-)
  19  create mode 100644 arch/mips/ralink/rt305x-usb.c
  20  create mode 100644 arch/mips/ralink/rt3883-usb.c
  21
  22 Index: linux-3.8.11/arch/mips/ralink/Makefile
  23 ===================================================================
  24 --- linux-3.8.11.orig/arch/mips/ralink/Makefile 2013-05-06 09:58:57.772224085 +0200
  25 +++ linux-3.8.11/arch/mips/ralink/Makefile      2013-05-06 10:01:59.252231955 +0200
  26 @@ -9,8 +9,8 @@
  27  obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o timer.o
  28
  29  obj-$(CONFIG_SOC_RT288X) += rt288x.o
  30 -obj-$(CONFIG_SOC_RT305X) += rt305x.o
  31 -obj-$(CONFIG_SOC_RT3883) += rt3883.o
  32 +obj-$(CONFIG_SOC_RT305X) += rt305x.o rt305x-usb.o
  33 +obj-$(CONFIG_SOC_RT3883) += rt3883.o rt3883-usb.o
  34  obj-$(CONFIG_SOC_MT7620) += mt7620.o
  35
  36  obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
  37 Index: linux-3.8.11/arch/mips/ralink/common.h
  38 ===================================================================
  39 --- linux-3.8.11.orig/arch/mips/ralink/common.h 2013-05-06 09:58:57.748224086 +0200
  40 +++ linux-3.8.11/arch/mips/ralink/common.h      2013-05-06 09:58:58.100224099 +0200
  41 @@ -51,5 +51,6 @@
  42  __iomem void *plat_of_remap_node(const char *node);
  43
  44  void ralink_pinmux(void);
  45 +void ralink_usb_platform(void);
  46
  47  #endif /* _RALINK_COMMON_H__ */
  48 Index: linux-3.8.11/arch/mips/ralink/mt7620.c
  49 ===================================================================
  50 --- linux-3.8.11.orig/arch/mips/ralink/mt7620.c 2013-05-06 09:58:57.696224079 +0200
  51 +++ linux-3.8.11/arch/mips/ralink/mt7620.c      2013-05-06 09:58:58.100224099 +0200
  52 @@ -140,6 +140,11 @@
  53         .uart_mask = MT7620_GPIO_MODE_GPIO,
  54  };
  55
  56 +void ralink_usb_platform(void)
  57 +{
  58 +
  59 +}
  60 +
  61  void __init ralink_clk_init(void)
  62  {
  63         unsigned long cpu_rate, sys_rate;
  64 Index: linux-3.8.11/arch/mips/ralink/of.c
  65 ===================================================================
  66 --- linux-3.8.11.orig/arch/mips/ralink/of.c     2013-05-06 09:58:57.748224086 +0200
  67 +++ linux-3.8.11/arch/mips/ralink/of.c  2013-05-06 10:01:59.252231955 +0200
  68 @@ -111,6 +111,7 @@
  69                 panic("failed to populate DT\n");
  70
  71         ralink_pinmux();
  72 +       ralink_usb_platform();
  73
  74         return 0;
  75  }
  76 Index: linux-3.8.11/arch/mips/ralink/rt305x-usb.c
  77 ===================================================================
  78 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  79 +++ linux-3.8.11/arch/mips/ralink/rt305x-usb.c  2013-05-06 09:58:58.100224099 +0200
  80 @@ -0,0 +1,120 @@
  81 +/*
  82 + * This program is free software; you can redistribute it and/or modify it
  83 + * under the terms of the GNU General Public License version 2 as published
  84 + * by the Free Software Foundation.
  85 + *
  86 + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  87 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  88 + */
  89 +
  90 +#include <linux/kernel.h>
  91 +#include <linux/init.h>
  92 +#include <linux/module.h>
  93 +
  94 +#include <linux/delay.h>
  95 +#include <linux/of_platform.h>
  96 +#include <linux/dma-mapping.h>
  97 +#include <linux/usb/ehci_pdriver.h>
  98 +#include <linux/usb/ohci_pdriver.h>
  99 +
 100 +#include <asm/mach-ralink/ralink_regs.h>
 101 +#include <asm/mach-ralink/rt305x.h>
 102 +
 103 +static atomic_t rt3352_usb_pwr_ref = ATOMIC_INIT(0);
 104 +
 105 +static int rt3352_usb_power_on(struct platform_device *pdev)
 106 +{
 107 +
 108 +       if (atomic_inc_return(&rt3352_usb_pwr_ref) == 1) {
 109 +               u32 t;
 110 +
 111 +               t = rt_sysc_r32(RT3352_SYSC_REG_USB_PS);
 112 +
 113 +               /* enable clock for port0's and port1's phys */
 114 +               t = rt_sysc_r32(RT3352_SYSC_REG_CLKCFG1);
 115 +               t |= RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN;
 116 +               rt_sysc_w32(t, RT3352_SYSC_REG_CLKCFG1);
 117 +               mdelay(500);
 118 +
 119 +               /* pull USBHOST and USBDEV out from reset */
 120 +               t = rt_sysc_r32(RT3352_SYSC_REG_RSTCTRL);
 121 +               t &= ~(RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV);
 122 +               rt_sysc_w32(t, RT3352_SYSC_REG_RSTCTRL);
 123 +               mdelay(500);
 124 +
 125 +               /* enable host mode */
 126 +               t = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG1);
 127 +               t |= RT3352_SYSCFG1_USB0_HOST_MODE;
 128 +               rt_sysc_w32(t, RT3352_SYSC_REG_SYSCFG1);
 129 +
 130 +               t = rt_sysc_r32(RT3352_SYSC_REG_USB_PS);
 131 +       }
 132 +
 133 +       return 0;
 134 +}
 135 +
 136 +static void rt3352_usb_power_off(struct platform_device *pdev)
 137 +{
 138 +       if (atomic_dec_return(&rt3352_usb_pwr_ref) == 0) {
 139 +               u32 t;
 140 +
 141 +               /* put USBHOST and USBDEV into reset */
 142 +               t = rt_sysc_r32(RT3352_SYSC_REG_RSTCTRL);
 143 +               t |= RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV;
 144 +               rt_sysc_w32(t, RT3352_SYSC_REG_RSTCTRL);
 145 +               udelay(10000);
 146 +
 147 +               /* disable clock for port0's and port1's phys*/
 148 +               t = rt_sysc_r32(RT3352_SYSC_REG_CLKCFG1);
 149 +               t &= ~(RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN);
 150 +               rt_sysc_w32(t, RT3352_SYSC_REG_CLKCFG1);
 151 +               udelay(10000);
 152 +       }
 153 +}
 154 +
 155 +static struct usb_ehci_pdata rt3352_ehci_data = {
 156 +       .power_on       = rt3352_usb_power_on,
 157 +       .power_off      = rt3352_usb_power_off,
 158 +};
 159 +
 160 +static struct usb_ohci_pdata rt3352_ohci_data = {
 161 +       .power_on       = rt3352_usb_power_on,
 162 +       .power_off      = rt3352_usb_power_off,
 163 +};
 164 +
 165 +static void ralink_add_usb(char *name, void *pdata, u64 *mask)
 166 +{
 167 +       struct device_node *node;
 168 +       struct platform_device *pdev;
 169 +
 170 +       node = of_find_compatible_node(NULL, NULL, name);
 171 +       if (!node)
 172 +               return;
 173 +
 174 +       pdev = of_find_device_by_node(node);
 175 +       if (!pdev)
 176 +               goto error_out;
 177 +
 178 +       if (pdata)
 179 +               pdev->dev.platform_data = pdata;
 180 +       if (mask) {
 181 +               pdev->dev.dma_mask = mask;
 182 +               pdev->dev.coherent_dma_mask = *mask;
 183 +       }
 184 +
 185 +error_out:
 186 +       of_node_put(node);
 187 +}
 188 +
 189 +static u64 rt3352_ohci_dmamask = DMA_BIT_MASK(32);
 190 +static u64 rt3352_ehci_dmamask = DMA_BIT_MASK(32);
 191 +
 192 +void ralink_usb_platform(void)
 193 +{
 194 +       if (soc_is_rt3352() || soc_is_rt5350()) {
 195 +               ralink_add_usb("ohci-platform",
 196 +                               &rt3352_ohci_data, &rt3352_ohci_dmamask);
 197 +               ralink_add_usb("ehci-platform",
 198 +                               &rt3352_ehci_data, &rt3352_ehci_dmamask);
 199 +       }
 200 +}
 201 Index: linux-3.8.11/arch/mips/ralink/rt3883-usb.c
 202 ===================================================================
 203 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
 204 +++ linux-3.8.11/arch/mips/ralink/rt3883-usb.c  2013-05-06 09:58:58.100224099 +0200
 205 @@ -0,0 +1,118 @@
 206 +/*
 207 + * This program is free software; you can redistribute it and/or modify it
 208 + * under the terms of the GNU General Public License version 2 as published
 209 + * by the Free Software Foundation.
 210 + *
 211 + * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
 212 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
 213 + */
 214 +
 215 +#include <linux/kernel.h>
 216 +#include <linux/init.h>
 217 +#include <linux/module.h>
 218 +
 219 +#include <linux/delay.h>
 220 +#include <linux/of_platform.h>
 221 +#include <linux/dma-mapping.h>
 222 +#include <linux/usb/ehci_pdriver.h>
 223 +#include <linux/usb/ohci_pdriver.h>
 224 +
 225 +#include <asm/mach-ralink/ralink_regs.h>
 226 +#include <asm/mach-ralink/rt3883.h>
 227 +
 228 +static atomic_t rt3883_usb_pwr_ref = ATOMIC_INIT(0);
 229 +
 230 +static int rt3883_usb_power_on(struct platform_device *pdev)
 231 +{
 232 +       if (atomic_inc_return(&rt3883_usb_pwr_ref) == 1) {
 233 +               u32 t;
 234 +
 235 +               t = rt_sysc_r32(RT3883_SYSC_REG_USB_PS);
 236 +
 237 +               /* enable clock for port0's and port1's phys */
 238 +               t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1);
 239 +               t |= RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN;
 240 +               rt_sysc_w32(t, RT3883_SYSC_REG_CLKCFG1);
 241 +               mdelay(500);
 242 +
 243 +               /* pull USBHOST and USBDEV out from reset */
 244 +               t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL);
 245 +               t &= ~(RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV);
 246 +               rt_sysc_w32(t, RT3883_SYSC_REG_RSTCTRL);
 247 +               mdelay(500);
 248 +
 249 +               /* enable host mode */
 250 +               t = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG1);
 251 +               t |= RT3883_SYSCFG1_USB0_HOST_MODE;
 252 +               rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);
 253 +
 254 +               t = rt_sysc_r32(RT3883_SYSC_REG_USB_PS);
 255 +       }
 256 +
 257 +       return 0;
 258 +}
 259 +
 260 +static void rt3883_usb_power_off(struct platform_device *pdev)
 261 +{
 262 +       if (atomic_dec_return(&rt3883_usb_pwr_ref) == 0) {
 263 +               u32 t;
 264 +
 265 +               /* put USBHOST and USBDEV into reset */
 266 +               t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL);
 267 +               t |= RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV;
 268 +               rt_sysc_w32(t, RT3883_SYSC_REG_RSTCTRL);
 269 +               udelay(10000);
 270 +
 271 +               /* disable clock for port0's and port1's phys*/
 272 +               t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1);
 273 +               t &= ~(RT3883_CLKCFG1_UPHY0_CLK_EN |
 274 +               RT3883_CLKCFG1_UPHY1_CLK_EN);
 275 +               rt_sysc_w32(t, RT3883_SYSC_REG_CLKCFG1);
 276 +               udelay(10000);
 277 +       }
 278 +}
 279 +
 280 +static struct usb_ohci_pdata rt3883_ohci_data = {
 281 +       .power_on       = rt3883_usb_power_on,
 282 +       .power_off      = rt3883_usb_power_off,
 283 +};
 284 +
 285 +static struct usb_ehci_pdata rt3883_ehci_data = {
 286 +       .power_on       = rt3883_usb_power_on,
 287 +       .power_off      = rt3883_usb_power_off,
 288 +};
 289 +
 290 +static void ralink_add_usb(char *name, void *pdata, u64 *mask)
 291 +{
 292 +       struct device_node *node;
 293 +       struct platform_device *pdev;
 294 +
 295 +       node = of_find_compatible_node(NULL, NULL, name);
 296 +       if (!node)
 297 +               return;
 298 +
 299 +       pdev = of_find_device_by_node(node);
 300 +       if (!pdev)
 301 +               goto error_out;
 302 +
 303 +       if (pdata)
 304 +               pdev->dev.platform_data = pdata;
 305 +       if (mask) {
 306 +               pdev->dev.dma_mask = mask;
 307 +               pdev->dev.coherent_dma_mask = *mask;
 308 +       }
 309 +
 310 +error_out:
 311 +       of_node_put(node);
 312 +}
 313 +
 314 +static u64 rt3883_ohci_dmamask = DMA_BIT_MASK(32);
 315 +static u64 rt3883_ehci_dmamask = DMA_BIT_MASK(32);
 316 +
 317 +void ralink_usb_platform(void)
 318 +{
 319 +       ralink_add_usb("ohci-platform",
 320 +                       &rt3883_ohci_data, &rt3883_ohci_dmamask);
 321 +       ralink_add_usb("ehci-platform",
 322 +                       &rt3883_ehci_data, &rt3883_ehci_dmamask);
 323 +}
 324 Index: linux-3.8.11/arch/mips/ralink/rt288x.c
 325 ===================================================================
 326 --- linux-3.8.11.orig/arch/mips/ralink/rt288x.c 2013-05-06 09:58:57.644224079 +0200
 327 +++ linux-3.8.11/arch/mips/ralink/rt288x.c      2013-05-06 10:02:32.216233389 +0200
 328 @@ -74,6 +74,11 @@
 329         .wdt_reset = rt288x_wdt_reset,
 330  };
 331
 332 +void ralink_usb_platform(void)
 333 +{
 334 +
 335 +}
 336 +
 337  void __init ralink_clk_init(void)
 338  {
 339         unsigned long cpu_rate;