1a9f348974c1fbf55fe4ee54f01439667443e022
[openwrt/openwrt.git] / target / linux / ramips / patches-3.8 / 0108-MIPS-add-rt2880-dts-files.patch
1 From b72ae753b73cbc4b488dcdbf997faec199c8bb3f Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 21 Mar 2013 18:29:02 +0100
4 Subject: [PATCH 108/121] MIPS: add rt2880 dts files
5
6 Add a dtsi file for RT2880 SoC and a sample dts file. This SoC is first one that
7 was released in this SoC family.
8
9 Signed-off-by: John Crispin <blogic@openwrt.org>
10 ---
11 arch/mips/ralink/Kconfig | 4 ++
12 arch/mips/ralink/dts/Makefile | 1 +
13 arch/mips/ralink/dts/rt2880.dtsi | 116 ++++++++++++++++++++++++++++++++++
14 arch/mips/ralink/dts/rt2880_eval.dts | 52 +++++++++++++++
15 4 files changed, 173 insertions(+)
16 create mode 100644 arch/mips/ralink/dts/rt2880.dtsi
17 create mode 100644 arch/mips/ralink/dts/rt2880_eval.dts
18
19 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
20 index 6723b94..0d312fc 100644
21 --- a/arch/mips/ralink/Kconfig
22 +++ b/arch/mips/ralink/Kconfig
23 @@ -26,6 +26,10 @@ choice
24 config DTB_RT_NONE
25 bool "None"
26
27 + config DTB_RT2880_EVAL
28 + bool "RT2880 eval kit"
29 + depends on SOC_RT288X
30 +
31 config DTB_RT305X_EVAL
32 bool "RT305x eval kit"
33 depends on SOC_RT305X
34 diff --git a/arch/mips/ralink/dts/Makefile b/arch/mips/ralink/dts/Makefile
35 index 1a69fb3..f635a01 100644
36 --- a/arch/mips/ralink/dts/Makefile
37 +++ b/arch/mips/ralink/dts/Makefile
38 @@ -1 +1,2 @@
39 +obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
40 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
41 diff --git a/arch/mips/ralink/dts/rt2880.dtsi b/arch/mips/ralink/dts/rt2880.dtsi
42 new file mode 100644
43 index 0000000..b51c227
44 --- /dev/null
45 +++ b/arch/mips/ralink/dts/rt2880.dtsi
46 @@ -0,0 +1,116 @@
47 +/ {
48 + #address-cells = <1>;
49 + #size-cells = <1>;
50 + compatible = "ralink,rt2880-soc";
51 +
52 + cpus {
53 + cpu@0 {
54 + compatible = "mips,mips24KEc";
55 + };
56 + };
57 +
58 + chosen {
59 + bootargs = "console=ttyS0,57600 init=/init";
60 + };
61 +
62 + cpuintc: cpuintc@0 {
63 + #address-cells = <0>;
64 + #interrupt-cells = <1>;
65 + interrupt-controller;
66 + compatible = "mti,cpu-interrupt-controller";
67 + };
68 +
69 + palmbus@10000000 {
70 + compatible = "palmbus";
71 + reg = <0x10000000 0x200000>;
72 + ranges = <0x0 0x10000000 0x1FFFFF>;
73 +
74 + #address-cells = <1>;
75 + #size-cells = <1>;
76 +
77 + sysc@300000 {
78 + compatible = "ralink,rt2880-sysc";
79 + reg = <0x300000 0x100>;
80 + };
81 +
82 + timer@300100 {
83 + compatible = "ralink,rt2880-timer";
84 + reg = <0x300100 0x20>;
85 +
86 + interrupt-parent = <&intc>;
87 + interrupts = <1>;
88 +
89 + status = "disabled";
90 + };
91 +
92 + watchdog@300120 {
93 + compatible = "ralink,rt2880-wdt";
94 + reg = <0x300120 0x10>;
95 + };
96 +
97 + intc: intc@300200 {
98 + compatible = "ralink,rt2880-intc";
99 + reg = <0x300200 0x100>;
100 +
101 + interrupt-controller;
102 + #interrupt-cells = <1>;
103 +
104 + interrupt-parent = <&cpuintc>;
105 + interrupts = <2>;
106 + };
107 +
108 + memc@300300 {
109 + compatible = "ralink,rt2880-memc";
110 + reg = <0x300300 0x100>;
111 + };
112 +
113 + gpio0: gpio@300600 {
114 + compatible = "ralink,rt2880-gpio";
115 + reg = <0x300600 0x34>;
116 +
117 + gpio-controller;
118 + #gpio-cells = <2>;
119 +
120 + ralink,num-gpios = <24>;
121 + ralink,register-map = [ 00 04 08 0c
122 + 20 24 28 2c
123 + 30 34 ];
124 + };
125 +
126 + gpio1: gpio@300638 {
127 + compatible = "ralink,rt2880-gpio";
128 + reg = <0x300638 0x24>;
129 +
130 + gpio-controller;
131 + #gpio-cells = <2>;
132 +
133 + ralink,num-gpios = <16>;
134 + ralink,register-map = [ 00 04 08 0c
135 + 10 14 18 1c
136 + 20 24 ];
137 + };
138 +
139 + gpio2: gpio@300660 {
140 + compatible = "ralink,rt2880-gpio";
141 + reg = <0x300660 0x24>;
142 +
143 + gpio-controller;
144 + #gpio-cells = <2>;
145 +
146 + ralink,num-gpios = <32>;
147 + ralink,register-map = [ 00 04 08 0c
148 + 10 14 18 1c
149 + 20 24 ];
150 + };
151 +
152 + uartlite@300c00 {
153 + compatible = "ralink,rt2880-uart", "ns16550a";
154 + reg = <0x300c00 0x100>;
155 +
156 + interrupt-parent = <&intc>;
157 + interrupts = <12>;
158 +
159 + reg-shift = <2>;
160 + };
161 + };
162 +};
163 diff --git a/arch/mips/ralink/dts/rt2880_eval.dts b/arch/mips/ralink/dts/rt2880_eval.dts
164 new file mode 100644
165 index 0000000..7c74e16
166 --- /dev/null
167 +++ b/arch/mips/ralink/dts/rt2880_eval.dts
168 @@ -0,0 +1,52 @@
169 +/dts-v1/;
170 +
171 +/include/ "rt2880.dtsi"
172 +
173 +/ {
174 + #address-cells = <1>;
175 + #size-cells = <1>;
176 + compatible = "ralink,rt2880-eval-board", "ralink,rt2880-soc";
177 + model = "Ralink RT2880 evaluation board";
178 +
179 + memory@8000000 {
180 + reg = <0x0 0x2000000>;
181 + };
182 +
183 + palmbus@10000000 {
184 + sysc@300000 {
185 + ralink,pinmmux = "uartlite", "spi";
186 + ralink,uartmux = "gpio";
187 + ralink,wdtmux = <0>;
188 + };
189 + };
190 +
191 + cfi@1f000000 {
192 + compatible = "cfi-flash";
193 + reg = <0x1f000000 0x800000>;
194 +
195 + bank-width = <2>;
196 + device-width = <2>;
197 + #address-cells = <1>;
198 + #size-cells = <1>;
199 +
200 + partition@0 {
201 + label = "uboot";
202 + reg = <0x0 0x30000>;
203 + read-only;
204 + };
205 + partition@30000 {
206 + label = "uboot-env";
207 + reg = <0x30000 0x10000>;
208 + read-only;
209 + };
210 + partition@40000 {
211 + label = "calibration";
212 + reg = <0x40000 0x10000>;
213 + read-only;
214 + };
215 + partition@50000 {
216 + label = "linux";
217 + reg = <0x50000 0x7b0000>;
218 + };
219 + };
220 +};
221 --
222 1.7.10.4
223